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Commit | Line | Data |
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0793a61d | 1 | /* |
57c0c15b | 2 | * Performance events: |
0793a61d | 3 | * |
a308444c IM |
4 | * Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de> |
5 | * Copyright (C) 2008-2009, Red Hat, Inc., Ingo Molnar | |
6 | * Copyright (C) 2008-2009, Red Hat, Inc., Peter Zijlstra | |
0793a61d | 7 | * |
57c0c15b | 8 | * Data type definitions, declarations, prototypes. |
0793a61d | 9 | * |
a308444c | 10 | * Started by: Thomas Gleixner and Ingo Molnar |
0793a61d | 11 | * |
57c0c15b | 12 | * For licencing details see kernel-base/COPYING |
0793a61d | 13 | */ |
cdd6c482 IM |
14 | #ifndef _LINUX_PERF_EVENT_H |
15 | #define _LINUX_PERF_EVENT_H | |
0793a61d | 16 | |
f3dfd265 PM |
17 | #include <linux/types.h> |
18 | #include <linux/ioctl.h> | |
9aaa131a | 19 | #include <asm/byteorder.h> |
0793a61d TG |
20 | |
21 | /* | |
9f66a381 IM |
22 | * User-space ABI bits: |
23 | */ | |
24 | ||
25 | /* | |
0d48696f | 26 | * attr.type |
0793a61d | 27 | */ |
1c432d89 | 28 | enum perf_type_id { |
a308444c IM |
29 | PERF_TYPE_HARDWARE = 0, |
30 | PERF_TYPE_SOFTWARE = 1, | |
31 | PERF_TYPE_TRACEPOINT = 2, | |
32 | PERF_TYPE_HW_CACHE = 3, | |
33 | PERF_TYPE_RAW = 4, | |
24f1e32c | 34 | PERF_TYPE_BREAKPOINT = 5, |
b8e83514 | 35 | |
a308444c | 36 | PERF_TYPE_MAX, /* non-ABI */ |
b8e83514 | 37 | }; |
6c594c21 | 38 | |
b8e83514 | 39 | /* |
cdd6c482 IM |
40 | * Generalized performance event event_id types, used by the |
41 | * attr.event_id parameter of the sys_perf_event_open() | |
a308444c | 42 | * syscall: |
b8e83514 | 43 | */ |
1c432d89 | 44 | enum perf_hw_id { |
9f66a381 | 45 | /* |
b8e83514 | 46 | * Common hardware events, generalized by the kernel: |
9f66a381 | 47 | */ |
f4dbfa8f PZ |
48 | PERF_COUNT_HW_CPU_CYCLES = 0, |
49 | PERF_COUNT_HW_INSTRUCTIONS = 1, | |
50 | PERF_COUNT_HW_CACHE_REFERENCES = 2, | |
51 | PERF_COUNT_HW_CACHE_MISSES = 3, | |
52 | PERF_COUNT_HW_BRANCH_INSTRUCTIONS = 4, | |
53 | PERF_COUNT_HW_BRANCH_MISSES = 5, | |
54 | PERF_COUNT_HW_BUS_CYCLES = 6, | |
55 | ||
a308444c | 56 | PERF_COUNT_HW_MAX, /* non-ABI */ |
b8e83514 | 57 | }; |
e077df4f | 58 | |
8326f44d | 59 | /* |
cdd6c482 | 60 | * Generalized hardware cache events: |
8326f44d | 61 | * |
8be6e8f3 | 62 | * { L1-D, L1-I, LLC, ITLB, DTLB, BPU } x |
8326f44d IM |
63 | * { read, write, prefetch } x |
64 | * { accesses, misses } | |
65 | */ | |
1c432d89 | 66 | enum perf_hw_cache_id { |
a308444c IM |
67 | PERF_COUNT_HW_CACHE_L1D = 0, |
68 | PERF_COUNT_HW_CACHE_L1I = 1, | |
69 | PERF_COUNT_HW_CACHE_LL = 2, | |
70 | PERF_COUNT_HW_CACHE_DTLB = 3, | |
71 | PERF_COUNT_HW_CACHE_ITLB = 4, | |
72 | PERF_COUNT_HW_CACHE_BPU = 5, | |
73 | ||
74 | PERF_COUNT_HW_CACHE_MAX, /* non-ABI */ | |
8326f44d IM |
75 | }; |
76 | ||
1c432d89 | 77 | enum perf_hw_cache_op_id { |
a308444c IM |
78 | PERF_COUNT_HW_CACHE_OP_READ = 0, |
79 | PERF_COUNT_HW_CACHE_OP_WRITE = 1, | |
80 | PERF_COUNT_HW_CACHE_OP_PREFETCH = 2, | |
8326f44d | 81 | |
a308444c | 82 | PERF_COUNT_HW_CACHE_OP_MAX, /* non-ABI */ |
8326f44d IM |
83 | }; |
84 | ||
1c432d89 PZ |
85 | enum perf_hw_cache_op_result_id { |
86 | PERF_COUNT_HW_CACHE_RESULT_ACCESS = 0, | |
87 | PERF_COUNT_HW_CACHE_RESULT_MISS = 1, | |
8326f44d | 88 | |
a308444c | 89 | PERF_COUNT_HW_CACHE_RESULT_MAX, /* non-ABI */ |
8326f44d IM |
90 | }; |
91 | ||
b8e83514 | 92 | /* |
cdd6c482 IM |
93 | * Special "software" events provided by the kernel, even if the hardware |
94 | * does not support performance events. These events measure various | |
b8e83514 PZ |
95 | * physical and sw events of the kernel (and allow the profiling of them as |
96 | * well): | |
97 | */ | |
1c432d89 | 98 | enum perf_sw_ids { |
a308444c IM |
99 | PERF_COUNT_SW_CPU_CLOCK = 0, |
100 | PERF_COUNT_SW_TASK_CLOCK = 1, | |
101 | PERF_COUNT_SW_PAGE_FAULTS = 2, | |
102 | PERF_COUNT_SW_CONTEXT_SWITCHES = 3, | |
103 | PERF_COUNT_SW_CPU_MIGRATIONS = 4, | |
104 | PERF_COUNT_SW_PAGE_FAULTS_MIN = 5, | |
105 | PERF_COUNT_SW_PAGE_FAULTS_MAJ = 6, | |
f7d79860 AB |
106 | PERF_COUNT_SW_ALIGNMENT_FAULTS = 7, |
107 | PERF_COUNT_SW_EMULATION_FAULTS = 8, | |
a308444c IM |
108 | |
109 | PERF_COUNT_SW_MAX, /* non-ABI */ | |
0793a61d TG |
110 | }; |
111 | ||
8a057d84 | 112 | /* |
0d48696f | 113 | * Bits that can be set in attr.sample_type to request information |
8a057d84 PZ |
114 | * in the overflow packets. |
115 | */ | |
cdd6c482 | 116 | enum perf_event_sample_format { |
a308444c IM |
117 | PERF_SAMPLE_IP = 1U << 0, |
118 | PERF_SAMPLE_TID = 1U << 1, | |
119 | PERF_SAMPLE_TIME = 1U << 2, | |
120 | PERF_SAMPLE_ADDR = 1U << 3, | |
3dab77fb | 121 | PERF_SAMPLE_READ = 1U << 4, |
a308444c IM |
122 | PERF_SAMPLE_CALLCHAIN = 1U << 5, |
123 | PERF_SAMPLE_ID = 1U << 6, | |
124 | PERF_SAMPLE_CPU = 1U << 7, | |
125 | PERF_SAMPLE_PERIOD = 1U << 8, | |
7f453c24 | 126 | PERF_SAMPLE_STREAM_ID = 1U << 9, |
3a43ce68 | 127 | PERF_SAMPLE_RAW = 1U << 10, |
974802ea | 128 | |
f413cdb8 | 129 | PERF_SAMPLE_MAX = 1U << 11, /* non-ABI */ |
8a057d84 PZ |
130 | }; |
131 | ||
53cfbf59 | 132 | /* |
cdd6c482 | 133 | * The format of the data returned by read() on a perf event fd, |
3dab77fb PZ |
134 | * as specified by attr.read_format: |
135 | * | |
136 | * struct read_format { | |
57c0c15b IM |
137 | * { u64 value; |
138 | * { u64 time_enabled; } && PERF_FORMAT_ENABLED | |
139 | * { u64 time_running; } && PERF_FORMAT_RUNNING | |
140 | * { u64 id; } && PERF_FORMAT_ID | |
141 | * } && !PERF_FORMAT_GROUP | |
3dab77fb | 142 | * |
57c0c15b IM |
143 | * { u64 nr; |
144 | * { u64 time_enabled; } && PERF_FORMAT_ENABLED | |
145 | * { u64 time_running; } && PERF_FORMAT_RUNNING | |
146 | * { u64 value; | |
147 | * { u64 id; } && PERF_FORMAT_ID | |
148 | * } cntr[nr]; | |
149 | * } && PERF_FORMAT_GROUP | |
3dab77fb | 150 | * }; |
53cfbf59 | 151 | */ |
cdd6c482 | 152 | enum perf_event_read_format { |
a308444c IM |
153 | PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0, |
154 | PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1, | |
155 | PERF_FORMAT_ID = 1U << 2, | |
3dab77fb | 156 | PERF_FORMAT_GROUP = 1U << 3, |
974802ea | 157 | |
57c0c15b | 158 | PERF_FORMAT_MAX = 1U << 4, /* non-ABI */ |
53cfbf59 PM |
159 | }; |
160 | ||
974802ea PZ |
161 | #define PERF_ATTR_SIZE_VER0 64 /* sizeof first published struct */ |
162 | ||
9f66a381 | 163 | /* |
cdd6c482 | 164 | * Hardware event_id to monitor via a performance monitoring event: |
9f66a381 | 165 | */ |
cdd6c482 | 166 | struct perf_event_attr { |
974802ea | 167 | |
f4a2deb4 | 168 | /* |
a21ca2ca IM |
169 | * Major type: hardware/software/tracepoint/etc. |
170 | */ | |
171 | __u32 type; | |
974802ea PZ |
172 | |
173 | /* | |
174 | * Size of the attr structure, for fwd/bwd compat. | |
175 | */ | |
176 | __u32 size; | |
a21ca2ca IM |
177 | |
178 | /* | |
179 | * Type specific configuration information. | |
f4a2deb4 PZ |
180 | */ |
181 | __u64 config; | |
9f66a381 | 182 | |
60db5e09 | 183 | union { |
b23f3325 PZ |
184 | __u64 sample_period; |
185 | __u64 sample_freq; | |
60db5e09 PZ |
186 | }; |
187 | ||
b23f3325 PZ |
188 | __u64 sample_type; |
189 | __u64 read_format; | |
9f66a381 | 190 | |
2743a5b0 | 191 | __u64 disabled : 1, /* off by default */ |
0475f9ea PM |
192 | inherit : 1, /* children inherit it */ |
193 | pinned : 1, /* must always be on PMU */ | |
194 | exclusive : 1, /* only group on PMU */ | |
195 | exclude_user : 1, /* don't count user */ | |
196 | exclude_kernel : 1, /* ditto kernel */ | |
197 | exclude_hv : 1, /* ditto hypervisor */ | |
2743a5b0 | 198 | exclude_idle : 1, /* don't count when idle */ |
0a4a9391 | 199 | mmap : 1, /* include mmap data */ |
8d1b2d93 | 200 | comm : 1, /* include comm data */ |
60db5e09 | 201 | freq : 1, /* use freq, not period */ |
bfbd3381 | 202 | inherit_stat : 1, /* per task counts */ |
57e7986e | 203 | enable_on_exec : 1, /* next exec enables */ |
9f498cc5 | 204 | task : 1, /* trace fork/exit */ |
2667de81 | 205 | watermark : 1, /* wakeup_watermark */ |
0475f9ea | 206 | |
2667de81 | 207 | __reserved_1 : 49; |
2743a5b0 | 208 | |
2667de81 PZ |
209 | union { |
210 | __u32 wakeup_events; /* wakeup every n events */ | |
211 | __u32 wakeup_watermark; /* bytes before wakeup */ | |
212 | }; | |
24f1e32c | 213 | |
974802ea | 214 | __u32 __reserved_2; |
9f66a381 | 215 | |
f13c12c6 PZ |
216 | __u64 bp_addr; |
217 | __u32 bp_type; | |
218 | __u32 bp_len; | |
eab656ae TG |
219 | }; |
220 | ||
d859e29f | 221 | /* |
cdd6c482 | 222 | * Ioctls that can be done on a perf event fd: |
d859e29f | 223 | */ |
cdd6c482 | 224 | #define PERF_EVENT_IOC_ENABLE _IO ('$', 0) |
57c0c15b IM |
225 | #define PERF_EVENT_IOC_DISABLE _IO ('$', 1) |
226 | #define PERF_EVENT_IOC_REFRESH _IO ('$', 2) | |
cdd6c482 | 227 | #define PERF_EVENT_IOC_RESET _IO ('$', 3) |
4c49b128 | 228 | #define PERF_EVENT_IOC_PERIOD _IOW('$', 4, __u64) |
cdd6c482 | 229 | #define PERF_EVENT_IOC_SET_OUTPUT _IO ('$', 5) |
6fb2915d | 230 | #define PERF_EVENT_IOC_SET_FILTER _IOW('$', 6, char *) |
cdd6c482 IM |
231 | |
232 | enum perf_event_ioc_flags { | |
3df5edad PZ |
233 | PERF_IOC_FLAG_GROUP = 1U << 0, |
234 | }; | |
d859e29f | 235 | |
37d81828 PM |
236 | /* |
237 | * Structure of the page that can be mapped via mmap | |
238 | */ | |
cdd6c482 | 239 | struct perf_event_mmap_page { |
37d81828 PM |
240 | __u32 version; /* version number of this structure */ |
241 | __u32 compat_version; /* lowest version this is compat with */ | |
38ff667b PZ |
242 | |
243 | /* | |
cdd6c482 | 244 | * Bits needed to read the hw events in user-space. |
38ff667b | 245 | * |
92f22a38 PZ |
246 | * u32 seq; |
247 | * s64 count; | |
38ff667b | 248 | * |
a2e87d06 PZ |
249 | * do { |
250 | * seq = pc->lock; | |
38ff667b | 251 | * |
a2e87d06 PZ |
252 | * barrier() |
253 | * if (pc->index) { | |
254 | * count = pmc_read(pc->index - 1); | |
255 | * count += pc->offset; | |
256 | * } else | |
257 | * goto regular_read; | |
38ff667b | 258 | * |
a2e87d06 PZ |
259 | * barrier(); |
260 | * } while (pc->lock != seq); | |
38ff667b | 261 | * |
92f22a38 PZ |
262 | * NOTE: for obvious reason this only works on self-monitoring |
263 | * processes. | |
38ff667b | 264 | */ |
37d81828 | 265 | __u32 lock; /* seqlock for synchronization */ |
cdd6c482 IM |
266 | __u32 index; /* hardware event identifier */ |
267 | __s64 offset; /* add to hardware event value */ | |
268 | __u64 time_enabled; /* time event active */ | |
269 | __u64 time_running; /* time event on cpu */ | |
7b732a75 | 270 | |
41f95331 PZ |
271 | /* |
272 | * Hole for extension of the self monitor capabilities | |
273 | */ | |
274 | ||
7f8b4e4e | 275 | __u64 __reserved[123]; /* align to 1k */ |
41f95331 | 276 | |
38ff667b PZ |
277 | /* |
278 | * Control data for the mmap() data buffer. | |
279 | * | |
43a21ea8 PZ |
280 | * User-space reading the @data_head value should issue an rmb(), on |
281 | * SMP capable platforms, after reading this value -- see | |
cdd6c482 | 282 | * perf_event_wakeup(). |
43a21ea8 PZ |
283 | * |
284 | * When the mapping is PROT_WRITE the @data_tail value should be | |
285 | * written by userspace to reflect the last read data. In this case | |
286 | * the kernel will not over-write unread data. | |
38ff667b | 287 | */ |
8e3747c1 | 288 | __u64 data_head; /* head in the data section */ |
43a21ea8 | 289 | __u64 data_tail; /* user-space written tail */ |
37d81828 PM |
290 | }; |
291 | ||
cdd6c482 | 292 | #define PERF_RECORD_MISC_CPUMODE_MASK (3 << 0) |
184f412c | 293 | #define PERF_RECORD_MISC_CPUMODE_UNKNOWN (0 << 0) |
cdd6c482 IM |
294 | #define PERF_RECORD_MISC_KERNEL (1 << 0) |
295 | #define PERF_RECORD_MISC_USER (2 << 0) | |
296 | #define PERF_RECORD_MISC_HYPERVISOR (3 << 0) | |
6fab0192 | 297 | |
5c148194 PZ |
298 | struct perf_event_header { |
299 | __u32 type; | |
6fab0192 PZ |
300 | __u16 misc; |
301 | __u16 size; | |
5c148194 PZ |
302 | }; |
303 | ||
304 | enum perf_event_type { | |
5ed00415 | 305 | |
0c593b34 PZ |
306 | /* |
307 | * The MMAP events record the PROT_EXEC mappings so that we can | |
308 | * correlate userspace IPs to code. They have the following structure: | |
309 | * | |
310 | * struct { | |
0127c3ea | 311 | * struct perf_event_header header; |
0c593b34 | 312 | * |
0127c3ea IM |
313 | * u32 pid, tid; |
314 | * u64 addr; | |
315 | * u64 len; | |
316 | * u64 pgoff; | |
317 | * char filename[]; | |
0c593b34 PZ |
318 | * }; |
319 | */ | |
cdd6c482 | 320 | PERF_RECORD_MMAP = 1, |
0a4a9391 | 321 | |
43a21ea8 PZ |
322 | /* |
323 | * struct { | |
57c0c15b IM |
324 | * struct perf_event_header header; |
325 | * u64 id; | |
326 | * u64 lost; | |
43a21ea8 PZ |
327 | * }; |
328 | */ | |
cdd6c482 | 329 | PERF_RECORD_LOST = 2, |
43a21ea8 | 330 | |
8d1b2d93 PZ |
331 | /* |
332 | * struct { | |
0127c3ea | 333 | * struct perf_event_header header; |
8d1b2d93 | 334 | * |
0127c3ea IM |
335 | * u32 pid, tid; |
336 | * char comm[]; | |
8d1b2d93 PZ |
337 | * }; |
338 | */ | |
cdd6c482 | 339 | PERF_RECORD_COMM = 3, |
8d1b2d93 | 340 | |
9f498cc5 PZ |
341 | /* |
342 | * struct { | |
343 | * struct perf_event_header header; | |
344 | * u32 pid, ppid; | |
345 | * u32 tid, ptid; | |
393b2ad8 | 346 | * u64 time; |
9f498cc5 PZ |
347 | * }; |
348 | */ | |
cdd6c482 | 349 | PERF_RECORD_EXIT = 4, |
9f498cc5 | 350 | |
26b119bc PZ |
351 | /* |
352 | * struct { | |
0127c3ea IM |
353 | * struct perf_event_header header; |
354 | * u64 time; | |
689802b2 | 355 | * u64 id; |
7f453c24 | 356 | * u64 stream_id; |
a78ac325 PZ |
357 | * }; |
358 | */ | |
184f412c IM |
359 | PERF_RECORD_THROTTLE = 5, |
360 | PERF_RECORD_UNTHROTTLE = 6, | |
a78ac325 | 361 | |
60313ebe PZ |
362 | /* |
363 | * struct { | |
a21ca2ca IM |
364 | * struct perf_event_header header; |
365 | * u32 pid, ppid; | |
9f498cc5 | 366 | * u32 tid, ptid; |
a6f10a2f | 367 | * u64 time; |
60313ebe PZ |
368 | * }; |
369 | */ | |
cdd6c482 | 370 | PERF_RECORD_FORK = 7, |
60313ebe | 371 | |
38b200d6 PZ |
372 | /* |
373 | * struct { | |
184f412c IM |
374 | * struct perf_event_header header; |
375 | * u32 pid, tid; | |
3dab77fb | 376 | * |
184f412c | 377 | * struct read_format values; |
38b200d6 PZ |
378 | * }; |
379 | */ | |
cdd6c482 | 380 | PERF_RECORD_READ = 8, |
38b200d6 | 381 | |
8a057d84 | 382 | /* |
0c593b34 | 383 | * struct { |
0127c3ea | 384 | * struct perf_event_header header; |
0c593b34 | 385 | * |
43a21ea8 PZ |
386 | * { u64 ip; } && PERF_SAMPLE_IP |
387 | * { u32 pid, tid; } && PERF_SAMPLE_TID | |
388 | * { u64 time; } && PERF_SAMPLE_TIME | |
389 | * { u64 addr; } && PERF_SAMPLE_ADDR | |
e6e18ec7 | 390 | * { u64 id; } && PERF_SAMPLE_ID |
7f453c24 | 391 | * { u64 stream_id;} && PERF_SAMPLE_STREAM_ID |
43a21ea8 | 392 | * { u32 cpu, res; } && PERF_SAMPLE_CPU |
57c0c15b | 393 | * { u64 period; } && PERF_SAMPLE_PERIOD |
0c593b34 | 394 | * |
3dab77fb | 395 | * { struct read_format values; } && PERF_SAMPLE_READ |
0c593b34 | 396 | * |
f9188e02 | 397 | * { u64 nr, |
43a21ea8 | 398 | * u64 ips[nr]; } && PERF_SAMPLE_CALLCHAIN |
3dab77fb | 399 | * |
57c0c15b IM |
400 | * # |
401 | * # The RAW record below is opaque data wrt the ABI | |
402 | * # | |
403 | * # That is, the ABI doesn't make any promises wrt to | |
404 | * # the stability of its content, it may vary depending | |
405 | * # on event, hardware, kernel version and phase of | |
406 | * # the moon. | |
407 | * # | |
408 | * # In other words, PERF_SAMPLE_RAW contents are not an ABI. | |
409 | * # | |
3dab77fb | 410 | * |
a044560c PZ |
411 | * { u32 size; |
412 | * char data[size];}&& PERF_SAMPLE_RAW | |
0c593b34 | 413 | * }; |
8a057d84 | 414 | */ |
184f412c | 415 | PERF_RECORD_SAMPLE = 9, |
e6e18ec7 | 416 | |
cdd6c482 | 417 | PERF_RECORD_MAX, /* non-ABI */ |
5c148194 PZ |
418 | }; |
419 | ||
f9188e02 PZ |
420 | enum perf_callchain_context { |
421 | PERF_CONTEXT_HV = (__u64)-32, | |
422 | PERF_CONTEXT_KERNEL = (__u64)-128, | |
423 | PERF_CONTEXT_USER = (__u64)-512, | |
7522060c | 424 | |
f9188e02 PZ |
425 | PERF_CONTEXT_GUEST = (__u64)-2048, |
426 | PERF_CONTEXT_GUEST_KERNEL = (__u64)-2176, | |
427 | PERF_CONTEXT_GUEST_USER = (__u64)-2560, | |
428 | ||
429 | PERF_CONTEXT_MAX = (__u64)-4095, | |
7522060c IM |
430 | }; |
431 | ||
a4be7c27 PZ |
432 | #define PERF_FLAG_FD_NO_GROUP (1U << 0) |
433 | #define PERF_FLAG_FD_OUTPUT (1U << 1) | |
434 | ||
f3dfd265 | 435 | #ifdef __KERNEL__ |
9f66a381 | 436 | /* |
f3dfd265 | 437 | * Kernel-internal data types and definitions: |
9f66a381 IM |
438 | */ |
439 | ||
cdd6c482 IM |
440 | #ifdef CONFIG_PERF_EVENTS |
441 | # include <asm/perf_event.h> | |
f3dfd265 PM |
442 | #endif |
443 | ||
2ff6cfd7 AB |
444 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
445 | #include <asm/hw_breakpoint.h> | |
446 | #endif | |
447 | ||
f3dfd265 PM |
448 | #include <linux/list.h> |
449 | #include <linux/mutex.h> | |
450 | #include <linux/rculist.h> | |
451 | #include <linux/rcupdate.h> | |
452 | #include <linux/spinlock.h> | |
d6d020e9 | 453 | #include <linux/hrtimer.h> |
3c446b3d | 454 | #include <linux/fs.h> |
709e50cf | 455 | #include <linux/pid_namespace.h> |
906010b2 | 456 | #include <linux/workqueue.h> |
f3dfd265 PM |
457 | #include <asm/atomic.h> |
458 | ||
f9188e02 PZ |
459 | #define PERF_MAX_STACK_DEPTH 255 |
460 | ||
461 | struct perf_callchain_entry { | |
462 | __u64 nr; | |
463 | __u64 ip[PERF_MAX_STACK_DEPTH]; | |
464 | }; | |
465 | ||
3a43ce68 FW |
466 | struct perf_raw_record { |
467 | u32 size; | |
468 | void *data; | |
f413cdb8 FW |
469 | }; |
470 | ||
f3dfd265 PM |
471 | struct task_struct; |
472 | ||
0793a61d | 473 | /** |
cdd6c482 | 474 | * struct hw_perf_event - performance event hardware details: |
0793a61d | 475 | */ |
cdd6c482 IM |
476 | struct hw_perf_event { |
477 | #ifdef CONFIG_PERF_EVENTS | |
d6d020e9 PZ |
478 | union { |
479 | struct { /* hardware */ | |
a308444c | 480 | u64 config; |
447a194b | 481 | u64 last_tag; |
a308444c | 482 | unsigned long config_base; |
cdd6c482 | 483 | unsigned long event_base; |
a308444c | 484 | int idx; |
447a194b | 485 | int last_cpu; |
d6d020e9 | 486 | }; |
721a669b SS |
487 | struct { /* software */ |
488 | s64 remaining; | |
a308444c | 489 | struct hrtimer hrtimer; |
d6d020e9 | 490 | }; |
24f1e32c FW |
491 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
492 | union { /* breakpoint */ | |
493 | struct arch_hw_breakpoint info; | |
494 | }; | |
495 | #endif | |
d6d020e9 | 496 | }; |
ee06094f | 497 | atomic64_t prev_count; |
b23f3325 | 498 | u64 sample_period; |
9e350de3 | 499 | u64 last_period; |
ee06094f | 500 | atomic64_t period_left; |
60db5e09 | 501 | u64 interrupts; |
6a24ed6c | 502 | |
abd50713 PZ |
503 | u64 freq_time_stamp; |
504 | u64 freq_count_stamp; | |
ee06094f | 505 | #endif |
0793a61d TG |
506 | }; |
507 | ||
cdd6c482 | 508 | struct perf_event; |
621a01ea IM |
509 | |
510 | /** | |
4aeb0b42 | 511 | * struct pmu - generic performance monitoring unit |
621a01ea | 512 | */ |
4aeb0b42 | 513 | struct pmu { |
cdd6c482 IM |
514 | int (*enable) (struct perf_event *event); |
515 | void (*disable) (struct perf_event *event); | |
d76a0812 SE |
516 | int (*start) (struct perf_event *event); |
517 | void (*stop) (struct perf_event *event); | |
cdd6c482 IM |
518 | void (*read) (struct perf_event *event); |
519 | void (*unthrottle) (struct perf_event *event); | |
621a01ea IM |
520 | }; |
521 | ||
6a930700 | 522 | /** |
cdd6c482 | 523 | * enum perf_event_active_state - the states of a event |
6a930700 | 524 | */ |
cdd6c482 | 525 | enum perf_event_active_state { |
57c0c15b | 526 | PERF_EVENT_STATE_ERROR = -2, |
cdd6c482 IM |
527 | PERF_EVENT_STATE_OFF = -1, |
528 | PERF_EVENT_STATE_INACTIVE = 0, | |
57c0c15b | 529 | PERF_EVENT_STATE_ACTIVE = 1, |
6a930700 IM |
530 | }; |
531 | ||
9b51f66d IM |
532 | struct file; |
533 | ||
7b732a75 PZ |
534 | struct perf_mmap_data { |
535 | struct rcu_head rcu_head; | |
906010b2 PZ |
536 | #ifdef CONFIG_PERF_USE_VMALLOC |
537 | struct work_struct work; | |
538 | #endif | |
539 | int data_order; | |
8740f941 | 540 | int nr_pages; /* nr of data pages */ |
43a21ea8 | 541 | int writable; /* are we writable */ |
c5078f78 | 542 | int nr_locked; /* nr pages mlocked */ |
8740f941 | 543 | |
c33a0bc4 | 544 | atomic_t poll; /* POLL_ for wakeups */ |
cdd6c482 | 545 | atomic_t events; /* event_id limit */ |
8740f941 | 546 | |
8e3747c1 PZ |
547 | atomic_long_t head; /* write position */ |
548 | atomic_long_t done_head; /* completed head */ | |
549 | ||
c33a0bc4 | 550 | atomic_t lock; /* concurrent writes */ |
c66de4a5 | 551 | atomic_t wakeup; /* needs a wakeup */ |
43a21ea8 | 552 | atomic_t lost; /* nr records lost */ |
c66de4a5 | 553 | |
2667de81 PZ |
554 | long watermark; /* wakeup watermark */ |
555 | ||
57c0c15b | 556 | struct perf_event_mmap_page *user_page; |
0127c3ea | 557 | void *data_pages[0]; |
7b732a75 PZ |
558 | }; |
559 | ||
671dec5d PZ |
560 | struct perf_pending_entry { |
561 | struct perf_pending_entry *next; | |
562 | void (*func)(struct perf_pending_entry *); | |
925d519a PZ |
563 | }; |
564 | ||
453f19ee PZ |
565 | struct perf_sample_data; |
566 | ||
b326e956 FW |
567 | typedef void (*perf_overflow_handler_t)(struct perf_event *, int, |
568 | struct perf_sample_data *, | |
569 | struct pt_regs *regs); | |
570 | ||
d6f962b5 FW |
571 | enum perf_group_flag { |
572 | PERF_GROUP_SOFTWARE = 0x1, | |
573 | }; | |
574 | ||
0793a61d | 575 | /** |
cdd6c482 | 576 | * struct perf_event - performance event kernel representation: |
0793a61d | 577 | */ |
cdd6c482 IM |
578 | struct perf_event { |
579 | #ifdef CONFIG_PERF_EVENTS | |
65abc865 | 580 | struct list_head group_entry; |
592903cd | 581 | struct list_head event_entry; |
04289bb9 | 582 | struct list_head sibling_list; |
0127c3ea | 583 | int nr_siblings; |
d6f962b5 | 584 | int group_flags; |
cdd6c482 IM |
585 | struct perf_event *group_leader; |
586 | struct perf_event *output; | |
4aeb0b42 | 587 | const struct pmu *pmu; |
04289bb9 | 588 | |
cdd6c482 | 589 | enum perf_event_active_state state; |
0793a61d | 590 | atomic64_t count; |
ee06094f | 591 | |
53cfbf59 | 592 | /* |
cdd6c482 | 593 | * These are the total time in nanoseconds that the event |
53cfbf59 | 594 | * has been enabled (i.e. eligible to run, and the task has |
cdd6c482 | 595 | * been scheduled in, if this is a per-task event) |
53cfbf59 PM |
596 | * and running (scheduled onto the CPU), respectively. |
597 | * | |
598 | * They are computed from tstamp_enabled, tstamp_running and | |
cdd6c482 | 599 | * tstamp_stopped when the event is in INACTIVE or ACTIVE state. |
53cfbf59 PM |
600 | */ |
601 | u64 total_time_enabled; | |
602 | u64 total_time_running; | |
603 | ||
604 | /* | |
605 | * These are timestamps used for computing total_time_enabled | |
cdd6c482 | 606 | * and total_time_running when the event is in INACTIVE or |
53cfbf59 PM |
607 | * ACTIVE state, measured in nanoseconds from an arbitrary point |
608 | * in time. | |
cdd6c482 IM |
609 | * tstamp_enabled: the notional time when the event was enabled |
610 | * tstamp_running: the notional time when the event was scheduled on | |
53cfbf59 | 611 | * tstamp_stopped: in INACTIVE state, the notional time when the |
cdd6c482 | 612 | * event was scheduled off. |
53cfbf59 PM |
613 | */ |
614 | u64 tstamp_enabled; | |
615 | u64 tstamp_running; | |
616 | u64 tstamp_stopped; | |
617 | ||
24f1e32c | 618 | struct perf_event_attr attr; |
cdd6c482 | 619 | struct hw_perf_event hw; |
0793a61d | 620 | |
cdd6c482 | 621 | struct perf_event_context *ctx; |
9b51f66d | 622 | struct file *filp; |
0793a61d | 623 | |
53cfbf59 PM |
624 | /* |
625 | * These accumulate total time (in nanoseconds) that children | |
cdd6c482 | 626 | * events have been enabled and running, respectively. |
53cfbf59 PM |
627 | */ |
628 | atomic64_t child_total_time_enabled; | |
629 | atomic64_t child_total_time_running; | |
630 | ||
0793a61d | 631 | /* |
d859e29f | 632 | * Protect attach/detach and child_list: |
0793a61d | 633 | */ |
fccc714b PZ |
634 | struct mutex child_mutex; |
635 | struct list_head child_list; | |
cdd6c482 | 636 | struct perf_event *parent; |
0793a61d TG |
637 | |
638 | int oncpu; | |
639 | int cpu; | |
640 | ||
082ff5a2 PZ |
641 | struct list_head owner_entry; |
642 | struct task_struct *owner; | |
643 | ||
7b732a75 PZ |
644 | /* mmap bits */ |
645 | struct mutex mmap_mutex; | |
646 | atomic_t mmap_count; | |
647 | struct perf_mmap_data *data; | |
37d81828 | 648 | |
7b732a75 | 649 | /* poll related */ |
0793a61d | 650 | wait_queue_head_t waitq; |
3c446b3d | 651 | struct fasync_struct *fasync; |
79f14641 PZ |
652 | |
653 | /* delayed work for NMIs and such */ | |
654 | int pending_wakeup; | |
4c9e2542 | 655 | int pending_kill; |
79f14641 | 656 | int pending_disable; |
671dec5d | 657 | struct perf_pending_entry pending; |
592903cd | 658 | |
79f14641 PZ |
659 | atomic_t event_limit; |
660 | ||
cdd6c482 | 661 | void (*destroy)(struct perf_event *); |
592903cd | 662 | struct rcu_head rcu_head; |
709e50cf PZ |
663 | |
664 | struct pid_namespace *ns; | |
8e5799b1 | 665 | u64 id; |
6fb2915d | 666 | |
b326e956 | 667 | perf_overflow_handler_t overflow_handler; |
453f19ee | 668 | |
07b139c8 | 669 | #ifdef CONFIG_EVENT_TRACING |
6fb2915d | 670 | struct event_filter *filter; |
ee06094f | 671 | #endif |
6fb2915d LZ |
672 | |
673 | #endif /* CONFIG_PERF_EVENTS */ | |
0793a61d TG |
674 | }; |
675 | ||
676 | /** | |
cdd6c482 | 677 | * struct perf_event_context - event context structure |
0793a61d | 678 | * |
cdd6c482 | 679 | * Used as a container for task events and CPU events as well: |
0793a61d | 680 | */ |
cdd6c482 | 681 | struct perf_event_context { |
0793a61d | 682 | /* |
cdd6c482 | 683 | * Protect the states of the events in the list, |
d859e29f | 684 | * nr_active, and the list: |
0793a61d | 685 | */ |
e625cce1 | 686 | raw_spinlock_t lock; |
d859e29f | 687 | /* |
cdd6c482 | 688 | * Protect the list of events. Locking either mutex or lock |
d859e29f PM |
689 | * is sufficient to ensure the list doesn't change; to change |
690 | * the list you need to lock both the mutex and the spinlock. | |
691 | */ | |
a308444c | 692 | struct mutex mutex; |
04289bb9 | 693 | |
889ff015 FW |
694 | struct list_head pinned_groups; |
695 | struct list_head flexible_groups; | |
a308444c | 696 | struct list_head event_list; |
cdd6c482 | 697 | int nr_events; |
a308444c IM |
698 | int nr_active; |
699 | int is_active; | |
bfbd3381 | 700 | int nr_stat; |
a308444c IM |
701 | atomic_t refcount; |
702 | struct task_struct *task; | |
53cfbf59 PM |
703 | |
704 | /* | |
4af4998b | 705 | * Context clock, runs when context enabled. |
53cfbf59 | 706 | */ |
a308444c IM |
707 | u64 time; |
708 | u64 timestamp; | |
564c2b21 PM |
709 | |
710 | /* | |
711 | * These fields let us detect when two contexts have both | |
712 | * been cloned (inherited) from a common ancestor. | |
713 | */ | |
cdd6c482 | 714 | struct perf_event_context *parent_ctx; |
a308444c IM |
715 | u64 parent_gen; |
716 | u64 generation; | |
717 | int pin_count; | |
718 | struct rcu_head rcu_head; | |
0793a61d TG |
719 | }; |
720 | ||
721 | /** | |
cdd6c482 | 722 | * struct perf_event_cpu_context - per cpu event context structure |
0793a61d TG |
723 | */ |
724 | struct perf_cpu_context { | |
cdd6c482 IM |
725 | struct perf_event_context ctx; |
726 | struct perf_event_context *task_ctx; | |
0793a61d TG |
727 | int active_oncpu; |
728 | int max_pertask; | |
3b6f9e5c | 729 | int exclusive; |
96f6d444 PZ |
730 | |
731 | /* | |
732 | * Recursion avoidance: | |
733 | * | |
734 | * task, softirq, irq, nmi context | |
735 | */ | |
22a4f650 | 736 | int recursion[4]; |
0793a61d TG |
737 | }; |
738 | ||
5622f295 | 739 | struct perf_output_handle { |
57c0c15b IM |
740 | struct perf_event *event; |
741 | struct perf_mmap_data *data; | |
742 | unsigned long head; | |
743 | unsigned long offset; | |
744 | int nmi; | |
745 | int sample; | |
746 | int locked; | |
5622f295 MM |
747 | }; |
748 | ||
cdd6c482 | 749 | #ifdef CONFIG_PERF_EVENTS |
829b42dd | 750 | |
0793a61d TG |
751 | /* |
752 | * Set by architecture code: | |
753 | */ | |
cdd6c482 | 754 | extern int perf_max_events; |
0793a61d | 755 | |
cdd6c482 | 756 | extern const struct pmu *hw_perf_event_init(struct perf_event *event); |
621a01ea | 757 | |
49f47433 | 758 | extern void perf_event_task_sched_in(struct task_struct *task); |
184f412c | 759 | extern void perf_event_task_sched_out(struct task_struct *task, struct task_struct *next); |
49f47433 | 760 | extern void perf_event_task_tick(struct task_struct *task); |
cdd6c482 IM |
761 | extern int perf_event_init_task(struct task_struct *child); |
762 | extern void perf_event_exit_task(struct task_struct *child); | |
763 | extern void perf_event_free_task(struct task_struct *task); | |
764 | extern void set_perf_event_pending(void); | |
765 | extern void perf_event_do_pending(void); | |
766 | extern void perf_event_print_debug(void); | |
9e35ad38 PZ |
767 | extern void __perf_disable(void); |
768 | extern bool __perf_enable(void); | |
769 | extern void perf_disable(void); | |
770 | extern void perf_enable(void); | |
cdd6c482 IM |
771 | extern int perf_event_task_disable(void); |
772 | extern int perf_event_task_enable(void); | |
773 | extern int hw_perf_group_sched_in(struct perf_event *group_leader, | |
3cbed429 | 774 | struct perf_cpu_context *cpuctx, |
cdd6c482 IM |
775 | struct perf_event_context *ctx, int cpu); |
776 | extern void perf_event_update_userpage(struct perf_event *event); | |
fb0459d7 AV |
777 | extern int perf_event_release_kernel(struct perf_event *event); |
778 | extern struct perf_event * | |
779 | perf_event_create_kernel_counter(struct perf_event_attr *attr, | |
780 | int cpu, | |
97eaf530 | 781 | pid_t pid, |
b326e956 | 782 | perf_overflow_handler_t callback); |
59ed446f PZ |
783 | extern u64 perf_event_read_value(struct perf_event *event, |
784 | u64 *enabled, u64 *running); | |
5c92d124 | 785 | |
df1a132b | 786 | struct perf_sample_data { |
5622f295 MM |
787 | u64 type; |
788 | ||
789 | u64 ip; | |
790 | struct { | |
791 | u32 pid; | |
792 | u32 tid; | |
793 | } tid_entry; | |
794 | u64 time; | |
a308444c | 795 | u64 addr; |
5622f295 MM |
796 | u64 id; |
797 | u64 stream_id; | |
798 | struct { | |
799 | u32 cpu; | |
800 | u32 reserved; | |
801 | } cpu_entry; | |
a308444c | 802 | u64 period; |
5622f295 | 803 | struct perf_callchain_entry *callchain; |
3a43ce68 | 804 | struct perf_raw_record *raw; |
df1a132b PZ |
805 | }; |
806 | ||
5622f295 MM |
807 | extern void perf_output_sample(struct perf_output_handle *handle, |
808 | struct perf_event_header *header, | |
809 | struct perf_sample_data *data, | |
cdd6c482 | 810 | struct perf_event *event); |
5622f295 MM |
811 | extern void perf_prepare_sample(struct perf_event_header *header, |
812 | struct perf_sample_data *data, | |
cdd6c482 | 813 | struct perf_event *event, |
5622f295 MM |
814 | struct pt_regs *regs); |
815 | ||
cdd6c482 | 816 | extern int perf_event_overflow(struct perf_event *event, int nmi, |
5622f295 MM |
817 | struct perf_sample_data *data, |
818 | struct pt_regs *regs); | |
df1a132b | 819 | |
3b6f9e5c | 820 | /* |
cdd6c482 | 821 | * Return 1 for a software event, 0 for a hardware event |
3b6f9e5c | 822 | */ |
cdd6c482 | 823 | static inline int is_software_event(struct perf_event *event) |
3b6f9e5c | 824 | { |
92b67598 PZ |
825 | switch (event->attr.type) { |
826 | case PERF_TYPE_SOFTWARE: | |
827 | case PERF_TYPE_TRACEPOINT: | |
828 | /* for now the breakpoint stuff also works as software event */ | |
829 | case PERF_TYPE_BREAKPOINT: | |
830 | return 1; | |
831 | } | |
832 | return 0; | |
3b6f9e5c PM |
833 | } |
834 | ||
cdd6c482 | 835 | extern atomic_t perf_swevent_enabled[PERF_COUNT_SW_MAX]; |
f29ac756 | 836 | |
cdd6c482 | 837 | extern void __perf_sw_event(u32, u64, int, struct pt_regs *, u64); |
f29ac756 PZ |
838 | |
839 | static inline void | |
cdd6c482 | 840 | perf_sw_event(u32 event_id, u64 nr, int nmi, struct pt_regs *regs, u64 addr) |
f29ac756 | 841 | { |
cdd6c482 IM |
842 | if (atomic_read(&perf_swevent_enabled[event_id])) |
843 | __perf_sw_event(event_id, nr, nmi, regs, addr); | |
f29ac756 | 844 | } |
15dbf27c | 845 | |
cdd6c482 | 846 | extern void __perf_event_mmap(struct vm_area_struct *vma); |
089dd79d | 847 | |
cdd6c482 | 848 | static inline void perf_event_mmap(struct vm_area_struct *vma) |
089dd79d PZ |
849 | { |
850 | if (vma->vm_flags & VM_EXEC) | |
cdd6c482 | 851 | __perf_event_mmap(vma); |
089dd79d | 852 | } |
0a4a9391 | 853 | |
cdd6c482 IM |
854 | extern void perf_event_comm(struct task_struct *tsk); |
855 | extern void perf_event_fork(struct task_struct *tsk); | |
8d1b2d93 | 856 | |
394ee076 PZ |
857 | extern struct perf_callchain_entry *perf_callchain(struct pt_regs *regs); |
858 | ||
cdd6c482 IM |
859 | extern int sysctl_perf_event_paranoid; |
860 | extern int sysctl_perf_event_mlock; | |
861 | extern int sysctl_perf_event_sample_rate; | |
1ccd1549 | 862 | |
cdd6c482 | 863 | extern void perf_event_init(void); |
184f412c | 864 | extern void perf_tp_event(int event_id, u64 addr, u64 count, void *record, int entry_size); |
24f1e32c | 865 | extern void perf_bp_event(struct perf_event *event, void *data); |
0d905bca | 866 | |
9d23a90a | 867 | #ifndef perf_misc_flags |
cdd6c482 IM |
868 | #define perf_misc_flags(regs) (user_mode(regs) ? PERF_RECORD_MISC_USER : \ |
869 | PERF_RECORD_MISC_KERNEL) | |
9d23a90a PM |
870 | #define perf_instruction_pointer(regs) instruction_pointer(regs) |
871 | #endif | |
872 | ||
5622f295 | 873 | extern int perf_output_begin(struct perf_output_handle *handle, |
cdd6c482 | 874 | struct perf_event *event, unsigned int size, |
5622f295 MM |
875 | int nmi, int sample); |
876 | extern void perf_output_end(struct perf_output_handle *handle); | |
877 | extern void perf_output_copy(struct perf_output_handle *handle, | |
878 | const void *buf, unsigned int len); | |
4ed7c92d PZ |
879 | extern int perf_swevent_get_recursion_context(void); |
880 | extern void perf_swevent_put_recursion_context(int rctx); | |
44234adc FW |
881 | extern void perf_event_enable(struct perf_event *event); |
882 | extern void perf_event_disable(struct perf_event *event); | |
0793a61d TG |
883 | #else |
884 | static inline void | |
49f47433 | 885 | perf_event_task_sched_in(struct task_struct *task) { } |
0793a61d | 886 | static inline void |
cdd6c482 | 887 | perf_event_task_sched_out(struct task_struct *task, |
49f47433 | 888 | struct task_struct *next) { } |
0793a61d | 889 | static inline void |
49f47433 | 890 | perf_event_task_tick(struct task_struct *task) { } |
cdd6c482 IM |
891 | static inline int perf_event_init_task(struct task_struct *child) { return 0; } |
892 | static inline void perf_event_exit_task(struct task_struct *child) { } | |
893 | static inline void perf_event_free_task(struct task_struct *task) { } | |
57c0c15b IM |
894 | static inline void perf_event_do_pending(void) { } |
895 | static inline void perf_event_print_debug(void) { } | |
9e35ad38 PZ |
896 | static inline void perf_disable(void) { } |
897 | static inline void perf_enable(void) { } | |
57c0c15b IM |
898 | static inline int perf_event_task_disable(void) { return -EINVAL; } |
899 | static inline int perf_event_task_enable(void) { return -EINVAL; } | |
15dbf27c | 900 | |
925d519a | 901 | static inline void |
cdd6c482 | 902 | perf_sw_event(u32 event_id, u64 nr, int nmi, |
78f13e95 | 903 | struct pt_regs *regs, u64 addr) { } |
24f1e32c | 904 | static inline void |
184f412c | 905 | perf_bp_event(struct perf_event *event, void *data) { } |
0a4a9391 | 906 | |
57c0c15b | 907 | static inline void perf_event_mmap(struct vm_area_struct *vma) { } |
cdd6c482 IM |
908 | static inline void perf_event_comm(struct task_struct *tsk) { } |
909 | static inline void perf_event_fork(struct task_struct *tsk) { } | |
910 | static inline void perf_event_init(void) { } | |
184f412c | 911 | static inline int perf_swevent_get_recursion_context(void) { return -1; } |
4ed7c92d | 912 | static inline void perf_swevent_put_recursion_context(int rctx) { } |
44234adc FW |
913 | static inline void perf_event_enable(struct perf_event *event) { } |
914 | static inline void perf_event_disable(struct perf_event *event) { } | |
0793a61d TG |
915 | #endif |
916 | ||
5622f295 MM |
917 | #define perf_output_put(handle, x) \ |
918 | perf_output_copy((handle), &(x), sizeof(x)) | |
919 | ||
f3dfd265 | 920 | #endif /* __KERNEL__ */ |
cdd6c482 | 921 | #endif /* _LINUX_PERF_EVENT_H */ |