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0793a61d 1/*
57c0c15b 2 * Performance events:
0793a61d 3 *
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4 * Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de>
5 * Copyright (C) 2008-2009, Red Hat, Inc., Ingo Molnar
6 * Copyright (C) 2008-2009, Red Hat, Inc., Peter Zijlstra
0793a61d 7 *
57c0c15b 8 * Data type definitions, declarations, prototypes.
0793a61d 9 *
a308444c 10 * Started by: Thomas Gleixner and Ingo Molnar
0793a61d 11 *
57c0c15b 12 * For licencing details see kernel-base/COPYING
0793a61d 13 */
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14#ifndef _LINUX_PERF_EVENT_H
15#define _LINUX_PERF_EVENT_H
0793a61d 16
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17#include <linux/types.h>
18#include <linux/ioctl.h>
9aaa131a 19#include <asm/byteorder.h>
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20
21/*
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22 * User-space ABI bits:
23 */
24
25/*
0d48696f 26 * attr.type
0793a61d 27 */
1c432d89 28enum perf_type_id {
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29 PERF_TYPE_HARDWARE = 0,
30 PERF_TYPE_SOFTWARE = 1,
31 PERF_TYPE_TRACEPOINT = 2,
32 PERF_TYPE_HW_CACHE = 3,
33 PERF_TYPE_RAW = 4,
24f1e32c 34 PERF_TYPE_BREAKPOINT = 5,
b8e83514 35
a308444c 36 PERF_TYPE_MAX, /* non-ABI */
b8e83514 37};
6c594c21 38
b8e83514 39/*
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40 * Generalized performance event event_id types, used by the
41 * attr.event_id parameter of the sys_perf_event_open()
a308444c 42 * syscall:
b8e83514 43 */
1c432d89 44enum perf_hw_id {
9f66a381 45 /*
b8e83514 46 * Common hardware events, generalized by the kernel:
9f66a381 47 */
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48 PERF_COUNT_HW_CPU_CYCLES = 0,
49 PERF_COUNT_HW_INSTRUCTIONS = 1,
50 PERF_COUNT_HW_CACHE_REFERENCES = 2,
51 PERF_COUNT_HW_CACHE_MISSES = 3,
52 PERF_COUNT_HW_BRANCH_INSTRUCTIONS = 4,
53 PERF_COUNT_HW_BRANCH_MISSES = 5,
54 PERF_COUNT_HW_BUS_CYCLES = 6,
55
a308444c 56 PERF_COUNT_HW_MAX, /* non-ABI */
b8e83514 57};
e077df4f 58
8326f44d 59/*
cdd6c482 60 * Generalized hardware cache events:
8326f44d 61 *
8be6e8f3 62 * { L1-D, L1-I, LLC, ITLB, DTLB, BPU } x
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63 * { read, write, prefetch } x
64 * { accesses, misses }
65 */
1c432d89 66enum perf_hw_cache_id {
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67 PERF_COUNT_HW_CACHE_L1D = 0,
68 PERF_COUNT_HW_CACHE_L1I = 1,
69 PERF_COUNT_HW_CACHE_LL = 2,
70 PERF_COUNT_HW_CACHE_DTLB = 3,
71 PERF_COUNT_HW_CACHE_ITLB = 4,
72 PERF_COUNT_HW_CACHE_BPU = 5,
73
74 PERF_COUNT_HW_CACHE_MAX, /* non-ABI */
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75};
76
1c432d89 77enum perf_hw_cache_op_id {
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78 PERF_COUNT_HW_CACHE_OP_READ = 0,
79 PERF_COUNT_HW_CACHE_OP_WRITE = 1,
80 PERF_COUNT_HW_CACHE_OP_PREFETCH = 2,
8326f44d 81
a308444c 82 PERF_COUNT_HW_CACHE_OP_MAX, /* non-ABI */
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83};
84
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85enum perf_hw_cache_op_result_id {
86 PERF_COUNT_HW_CACHE_RESULT_ACCESS = 0,
87 PERF_COUNT_HW_CACHE_RESULT_MISS = 1,
8326f44d 88
a308444c 89 PERF_COUNT_HW_CACHE_RESULT_MAX, /* non-ABI */
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90};
91
b8e83514 92/*
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93 * Special "software" events provided by the kernel, even if the hardware
94 * does not support performance events. These events measure various
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95 * physical and sw events of the kernel (and allow the profiling of them as
96 * well):
97 */
1c432d89 98enum perf_sw_ids {
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99 PERF_COUNT_SW_CPU_CLOCK = 0,
100 PERF_COUNT_SW_TASK_CLOCK = 1,
101 PERF_COUNT_SW_PAGE_FAULTS = 2,
102 PERF_COUNT_SW_CONTEXT_SWITCHES = 3,
103 PERF_COUNT_SW_CPU_MIGRATIONS = 4,
104 PERF_COUNT_SW_PAGE_FAULTS_MIN = 5,
105 PERF_COUNT_SW_PAGE_FAULTS_MAJ = 6,
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106 PERF_COUNT_SW_ALIGNMENT_FAULTS = 7,
107 PERF_COUNT_SW_EMULATION_FAULTS = 8,
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108
109 PERF_COUNT_SW_MAX, /* non-ABI */
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110};
111
8a057d84 112/*
0d48696f 113 * Bits that can be set in attr.sample_type to request information
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114 * in the overflow packets.
115 */
cdd6c482 116enum perf_event_sample_format {
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117 PERF_SAMPLE_IP = 1U << 0,
118 PERF_SAMPLE_TID = 1U << 1,
119 PERF_SAMPLE_TIME = 1U << 2,
120 PERF_SAMPLE_ADDR = 1U << 3,
3dab77fb 121 PERF_SAMPLE_READ = 1U << 4,
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122 PERF_SAMPLE_CALLCHAIN = 1U << 5,
123 PERF_SAMPLE_ID = 1U << 6,
124 PERF_SAMPLE_CPU = 1U << 7,
125 PERF_SAMPLE_PERIOD = 1U << 8,
7f453c24 126 PERF_SAMPLE_STREAM_ID = 1U << 9,
3a43ce68 127 PERF_SAMPLE_RAW = 1U << 10,
974802ea 128
f413cdb8 129 PERF_SAMPLE_MAX = 1U << 11, /* non-ABI */
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130};
131
53cfbf59 132/*
cdd6c482 133 * The format of the data returned by read() on a perf event fd,
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134 * as specified by attr.read_format:
135 *
136 * struct read_format {
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137 * { u64 value;
138 * { u64 time_enabled; } && PERF_FORMAT_ENABLED
139 * { u64 time_running; } && PERF_FORMAT_RUNNING
140 * { u64 id; } && PERF_FORMAT_ID
141 * } && !PERF_FORMAT_GROUP
3dab77fb 142 *
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143 * { u64 nr;
144 * { u64 time_enabled; } && PERF_FORMAT_ENABLED
145 * { u64 time_running; } && PERF_FORMAT_RUNNING
146 * { u64 value;
147 * { u64 id; } && PERF_FORMAT_ID
148 * } cntr[nr];
149 * } && PERF_FORMAT_GROUP
3dab77fb 150 * };
53cfbf59 151 */
cdd6c482 152enum perf_event_read_format {
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153 PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0,
154 PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1,
155 PERF_FORMAT_ID = 1U << 2,
3dab77fb 156 PERF_FORMAT_GROUP = 1U << 3,
974802ea 157
57c0c15b 158 PERF_FORMAT_MAX = 1U << 4, /* non-ABI */
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159};
160
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161#define PERF_ATTR_SIZE_VER0 64 /* sizeof first published struct */
162
9f66a381 163/*
cdd6c482 164 * Hardware event_id to monitor via a performance monitoring event:
9f66a381 165 */
cdd6c482 166struct perf_event_attr {
974802ea 167
f4a2deb4 168 /*
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169 * Major type: hardware/software/tracepoint/etc.
170 */
171 __u32 type;
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172
173 /*
174 * Size of the attr structure, for fwd/bwd compat.
175 */
176 __u32 size;
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177
178 /*
179 * Type specific configuration information.
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180 */
181 __u64 config;
9f66a381 182
60db5e09 183 union {
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184 __u64 sample_period;
185 __u64 sample_freq;
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186 };
187
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188 __u64 sample_type;
189 __u64 read_format;
9f66a381 190
2743a5b0 191 __u64 disabled : 1, /* off by default */
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192 inherit : 1, /* children inherit it */
193 pinned : 1, /* must always be on PMU */
194 exclusive : 1, /* only group on PMU */
195 exclude_user : 1, /* don't count user */
196 exclude_kernel : 1, /* ditto kernel */
197 exclude_hv : 1, /* ditto hypervisor */
2743a5b0 198 exclude_idle : 1, /* don't count when idle */
0a4a9391 199 mmap : 1, /* include mmap data */
8d1b2d93 200 comm : 1, /* include comm data */
60db5e09 201 freq : 1, /* use freq, not period */
bfbd3381 202 inherit_stat : 1, /* per task counts */
57e7986e 203 enable_on_exec : 1, /* next exec enables */
9f498cc5 204 task : 1, /* trace fork/exit */
2667de81 205 watermark : 1, /* wakeup_watermark */
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206 /*
207 * precise_ip:
208 *
209 * 0 - SAMPLE_IP can have arbitrary skid
210 * 1 - SAMPLE_IP must have constant skid
211 * 2 - SAMPLE_IP requested to have 0 skid
212 * 3 - SAMPLE_IP must have 0 skid
213 *
214 * See also PERF_RECORD_MISC_EXACT_IP
215 */
216 precise_ip : 2, /* skid constraint */
3af9e859 217 mmap_data : 1, /* non-exec mmap data */
ab608344 218
3af9e859 219 __reserved_1 : 46;
2743a5b0 220
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221 union {
222 __u32 wakeup_events; /* wakeup every n events */
223 __u32 wakeup_watermark; /* bytes before wakeup */
224 };
24f1e32c 225
f13c12c6 226 __u32 bp_type;
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227 __u64 bp_addr;
228 __u64 bp_len;
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229};
230
d859e29f 231/*
cdd6c482 232 * Ioctls that can be done on a perf event fd:
d859e29f 233 */
cdd6c482 234#define PERF_EVENT_IOC_ENABLE _IO ('$', 0)
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235#define PERF_EVENT_IOC_DISABLE _IO ('$', 1)
236#define PERF_EVENT_IOC_REFRESH _IO ('$', 2)
cdd6c482 237#define PERF_EVENT_IOC_RESET _IO ('$', 3)
4c49b128 238#define PERF_EVENT_IOC_PERIOD _IOW('$', 4, __u64)
cdd6c482 239#define PERF_EVENT_IOC_SET_OUTPUT _IO ('$', 5)
6fb2915d 240#define PERF_EVENT_IOC_SET_FILTER _IOW('$', 6, char *)
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241
242enum perf_event_ioc_flags {
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243 PERF_IOC_FLAG_GROUP = 1U << 0,
244};
d859e29f 245
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246/*
247 * Structure of the page that can be mapped via mmap
248 */
cdd6c482 249struct perf_event_mmap_page {
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250 __u32 version; /* version number of this structure */
251 __u32 compat_version; /* lowest version this is compat with */
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252
253 /*
cdd6c482 254 * Bits needed to read the hw events in user-space.
38ff667b 255 *
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256 * u32 seq;
257 * s64 count;
38ff667b 258 *
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259 * do {
260 * seq = pc->lock;
38ff667b 261 *
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262 * barrier()
263 * if (pc->index) {
264 * count = pmc_read(pc->index - 1);
265 * count += pc->offset;
266 * } else
267 * goto regular_read;
38ff667b 268 *
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269 * barrier();
270 * } while (pc->lock != seq);
38ff667b 271 *
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272 * NOTE: for obvious reason this only works on self-monitoring
273 * processes.
38ff667b 274 */
37d81828 275 __u32 lock; /* seqlock for synchronization */
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276 __u32 index; /* hardware event identifier */
277 __s64 offset; /* add to hardware event value */
278 __u64 time_enabled; /* time event active */
279 __u64 time_running; /* time event on cpu */
7b732a75 280
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281 /*
282 * Hole for extension of the self monitor capabilities
283 */
284
7f8b4e4e 285 __u64 __reserved[123]; /* align to 1k */
41f95331 286
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287 /*
288 * Control data for the mmap() data buffer.
289 *
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290 * User-space reading the @data_head value should issue an rmb(), on
291 * SMP capable platforms, after reading this value -- see
cdd6c482 292 * perf_event_wakeup().
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293 *
294 * When the mapping is PROT_WRITE the @data_tail value should be
295 * written by userspace to reflect the last read data. In this case
296 * the kernel will not over-write unread data.
38ff667b 297 */
8e3747c1 298 __u64 data_head; /* head in the data section */
43a21ea8 299 __u64 data_tail; /* user-space written tail */
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300};
301
39447b38 302#define PERF_RECORD_MISC_CPUMODE_MASK (7 << 0)
184f412c 303#define PERF_RECORD_MISC_CPUMODE_UNKNOWN (0 << 0)
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304#define PERF_RECORD_MISC_KERNEL (1 << 0)
305#define PERF_RECORD_MISC_USER (2 << 0)
306#define PERF_RECORD_MISC_HYPERVISOR (3 << 0)
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307#define PERF_RECORD_MISC_GUEST_KERNEL (4 << 0)
308#define PERF_RECORD_MISC_GUEST_USER (5 << 0)
6fab0192 309
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310/*
311 * Indicates that the content of PERF_SAMPLE_IP points to
312 * the actual instruction that triggered the event. See also
313 * perf_event_attr::precise_ip.
314 */
315#define PERF_RECORD_MISC_EXACT_IP (1 << 14)
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316/*
317 * Reserve the last bit to indicate some extended misc field
318 */
319#define PERF_RECORD_MISC_EXT_RESERVED (1 << 15)
320
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321struct perf_event_header {
322 __u32 type;
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323 __u16 misc;
324 __u16 size;
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325};
326
327enum perf_event_type {
5ed00415 328
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329 /*
330 * The MMAP events record the PROT_EXEC mappings so that we can
331 * correlate userspace IPs to code. They have the following structure:
332 *
333 * struct {
0127c3ea 334 * struct perf_event_header header;
0c593b34 335 *
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336 * u32 pid, tid;
337 * u64 addr;
338 * u64 len;
339 * u64 pgoff;
340 * char filename[];
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341 * };
342 */
cdd6c482 343 PERF_RECORD_MMAP = 1,
0a4a9391 344
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345 /*
346 * struct {
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347 * struct perf_event_header header;
348 * u64 id;
349 * u64 lost;
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350 * };
351 */
cdd6c482 352 PERF_RECORD_LOST = 2,
43a21ea8 353
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354 /*
355 * struct {
0127c3ea 356 * struct perf_event_header header;
8d1b2d93 357 *
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358 * u32 pid, tid;
359 * char comm[];
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360 * };
361 */
cdd6c482 362 PERF_RECORD_COMM = 3,
8d1b2d93 363
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364 /*
365 * struct {
366 * struct perf_event_header header;
367 * u32 pid, ppid;
368 * u32 tid, ptid;
393b2ad8 369 * u64 time;
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370 * };
371 */
cdd6c482 372 PERF_RECORD_EXIT = 4,
9f498cc5 373
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374 /*
375 * struct {
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376 * struct perf_event_header header;
377 * u64 time;
689802b2 378 * u64 id;
7f453c24 379 * u64 stream_id;
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380 * };
381 */
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382 PERF_RECORD_THROTTLE = 5,
383 PERF_RECORD_UNTHROTTLE = 6,
a78ac325 384
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385 /*
386 * struct {
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387 * struct perf_event_header header;
388 * u32 pid, ppid;
9f498cc5 389 * u32 tid, ptid;
a6f10a2f 390 * u64 time;
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391 * };
392 */
cdd6c482 393 PERF_RECORD_FORK = 7,
60313ebe 394
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395 /*
396 * struct {
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397 * struct perf_event_header header;
398 * u32 pid, tid;
3dab77fb 399 *
184f412c 400 * struct read_format values;
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401 * };
402 */
cdd6c482 403 PERF_RECORD_READ = 8,
38b200d6 404
8a057d84 405 /*
0c593b34 406 * struct {
0127c3ea 407 * struct perf_event_header header;
0c593b34 408 *
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409 * { u64 ip; } && PERF_SAMPLE_IP
410 * { u32 pid, tid; } && PERF_SAMPLE_TID
411 * { u64 time; } && PERF_SAMPLE_TIME
412 * { u64 addr; } && PERF_SAMPLE_ADDR
e6e18ec7 413 * { u64 id; } && PERF_SAMPLE_ID
7f453c24 414 * { u64 stream_id;} && PERF_SAMPLE_STREAM_ID
43a21ea8 415 * { u32 cpu, res; } && PERF_SAMPLE_CPU
57c0c15b 416 * { u64 period; } && PERF_SAMPLE_PERIOD
0c593b34 417 *
3dab77fb 418 * { struct read_format values; } && PERF_SAMPLE_READ
0c593b34 419 *
f9188e02 420 * { u64 nr,
43a21ea8 421 * u64 ips[nr]; } && PERF_SAMPLE_CALLCHAIN
3dab77fb 422 *
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423 * #
424 * # The RAW record below is opaque data wrt the ABI
425 * #
426 * # That is, the ABI doesn't make any promises wrt to
427 * # the stability of its content, it may vary depending
428 * # on event, hardware, kernel version and phase of
429 * # the moon.
430 * #
431 * # In other words, PERF_SAMPLE_RAW contents are not an ABI.
432 * #
3dab77fb 433 *
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434 * { u32 size;
435 * char data[size];}&& PERF_SAMPLE_RAW
0c593b34 436 * };
8a057d84 437 */
184f412c 438 PERF_RECORD_SAMPLE = 9,
e6e18ec7 439
cdd6c482 440 PERF_RECORD_MAX, /* non-ABI */
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441};
442
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443enum perf_callchain_context {
444 PERF_CONTEXT_HV = (__u64)-32,
445 PERF_CONTEXT_KERNEL = (__u64)-128,
446 PERF_CONTEXT_USER = (__u64)-512,
7522060c 447
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448 PERF_CONTEXT_GUEST = (__u64)-2048,
449 PERF_CONTEXT_GUEST_KERNEL = (__u64)-2176,
450 PERF_CONTEXT_GUEST_USER = (__u64)-2560,
451
452 PERF_CONTEXT_MAX = (__u64)-4095,
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453};
454
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455#define PERF_FLAG_FD_NO_GROUP (1U << 0)
456#define PERF_FLAG_FD_OUTPUT (1U << 1)
457
f3dfd265 458#ifdef __KERNEL__
9f66a381 459/*
f3dfd265 460 * Kernel-internal data types and definitions:
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461 */
462
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463#ifdef CONFIG_PERF_EVENTS
464# include <asm/perf_event.h>
7be79236 465# include <asm/local64.h>
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466#endif
467
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468struct perf_guest_info_callbacks {
469 int (*is_in_guest) (void);
470 int (*is_user_mode) (void);
471 unsigned long (*get_guest_ip) (void);
472};
473
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474#ifdef CONFIG_HAVE_HW_BREAKPOINT
475#include <asm/hw_breakpoint.h>
476#endif
477
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478#include <linux/list.h>
479#include <linux/mutex.h>
480#include <linux/rculist.h>
481#include <linux/rcupdate.h>
482#include <linux/spinlock.h>
d6d020e9 483#include <linux/hrtimer.h>
3c446b3d 484#include <linux/fs.h>
709e50cf 485#include <linux/pid_namespace.h>
906010b2 486#include <linux/workqueue.h>
5331d7b8 487#include <linux/ftrace.h>
85cfabbc 488#include <linux/cpu.h>
e360adbe 489#include <linux/irq_work.h>
82cd6def 490#include <linux/jump_label_ref.h>
f3dfd265 491#include <asm/atomic.h>
fa588151 492#include <asm/local.h>
f3dfd265 493
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494#define PERF_MAX_STACK_DEPTH 255
495
496struct perf_callchain_entry {
497 __u64 nr;
498 __u64 ip[PERF_MAX_STACK_DEPTH];
499};
500
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501struct perf_raw_record {
502 u32 size;
503 void *data;
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504};
505
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506struct perf_branch_entry {
507 __u64 from;
508 __u64 to;
509 __u64 flags;
510};
511
512struct perf_branch_stack {
513 __u64 nr;
514 struct perf_branch_entry entries[0];
515};
516
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517struct task_struct;
518
0793a61d 519/**
cdd6c482 520 * struct hw_perf_event - performance event hardware details:
0793a61d 521 */
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522struct hw_perf_event {
523#ifdef CONFIG_PERF_EVENTS
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524 union {
525 struct { /* hardware */
a308444c 526 u64 config;
447a194b 527 u64 last_tag;
a308444c 528 unsigned long config_base;
cdd6c482 529 unsigned long event_base;
a308444c 530 int idx;
447a194b 531 int last_cpu;
d6d020e9 532 };
721a669b 533 struct { /* software */
a308444c 534 struct hrtimer hrtimer;
d6d020e9 535 };
24f1e32c 536#ifdef CONFIG_HAVE_HW_BREAKPOINT
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537 struct { /* breakpoint */
538 struct arch_hw_breakpoint info;
539 struct list_head bp_list;
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540 /*
541 * Crufty hack to avoid the chicken and egg
542 * problem hw_breakpoint has with context
543 * creation and event initalization.
544 */
545 struct task_struct *bp_target;
45a73372 546 };
24f1e32c 547#endif
d6d020e9 548 };
a4eaf7f1 549 int state;
e7850595 550 local64_t prev_count;
b23f3325 551 u64 sample_period;
9e350de3 552 u64 last_period;
e7850595 553 local64_t period_left;
60db5e09 554 u64 interrupts;
6a24ed6c 555
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556 u64 freq_time_stamp;
557 u64 freq_count_stamp;
ee06094f 558#endif
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559};
560
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561/*
562 * hw_perf_event::state flags
563 */
564#define PERF_HES_STOPPED 0x01 /* the counter is stopped */
565#define PERF_HES_UPTODATE 0x02 /* event->count up-to-date */
566#define PERF_HES_ARCH 0x04
567
cdd6c482 568struct perf_event;
621a01ea 569
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570/*
571 * Common implementation detail of pmu::{start,commit,cancel}_txn
572 */
573#define PERF_EVENT_TXN 0x1
6bde9b6c 574
621a01ea 575/**
4aeb0b42 576 * struct pmu - generic performance monitoring unit
621a01ea 577 */
4aeb0b42 578struct pmu {
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579 struct list_head entry;
580
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581 int * __percpu pmu_disable_count;
582 struct perf_cpu_context * __percpu pmu_cpu_context;
8dc85d54 583 int task_ctx_nr;
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584
585 /*
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586 * Fully disable/enable this PMU, can be used to protect from the PMI
587 * as well as for lazy/batch writing of the MSRs.
6bde9b6c 588 */
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589 void (*pmu_enable) (struct pmu *pmu); /* optional */
590 void (*pmu_disable) (struct pmu *pmu); /* optional */
6bde9b6c 591
8d2cacbb 592 /*
a4eaf7f1 593 * Try and initialize the event for this PMU.
24cd7f54 594 * Should return -ENOENT when the @event doesn't match this PMU.
8d2cacbb 595 */
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596 int (*event_init) (struct perf_event *event);
597
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598#define PERF_EF_START 0x01 /* start the counter when adding */
599#define PERF_EF_RELOAD 0x02 /* reload the counter when starting */
600#define PERF_EF_UPDATE 0x04 /* update the counter when stopping */
601
8d2cacbb 602 /*
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603 * Adds/Removes a counter to/from the PMU, can be done inside
604 * a transaction, see the ->*_txn() methods.
605 */
606 int (*add) (struct perf_event *event, int flags);
607 void (*del) (struct perf_event *event, int flags);
608
609 /*
610 * Starts/Stops a counter present on the PMU. The PMI handler
611 * should stop the counter when perf_event_overflow() returns
612 * !0. ->start() will be used to continue.
613 */
614 void (*start) (struct perf_event *event, int flags);
615 void (*stop) (struct perf_event *event, int flags);
616
617 /*
618 * Updates the counter value of the event.
619 */
cdd6c482 620 void (*read) (struct perf_event *event);
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621
622 /*
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623 * Group events scheduling is treated as a transaction, add
624 * group events as a whole and perform one schedulability test.
625 * If the test fails, roll back the whole group
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626 *
627 * Start the transaction, after this ->add() doesn't need to
24cd7f54 628 * do schedulability tests.
8d2cacbb 629 */
ad5133b7 630 void (*start_txn) (struct pmu *pmu); /* optional */
8d2cacbb 631 /*
a4eaf7f1 632 * If ->start_txn() disabled the ->add() schedulability test
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633 * then ->commit_txn() is required to perform one. On success
634 * the transaction is closed. On error the transaction is kept
635 * open until ->cancel_txn() is called.
636 */
ad5133b7 637 int (*commit_txn) (struct pmu *pmu); /* optional */
8d2cacbb 638 /*
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639 * Will cancel the transaction, assumes ->del() is called
640 * for each successfull ->add() during the transaction.
8d2cacbb 641 */
ad5133b7 642 void (*cancel_txn) (struct pmu *pmu); /* optional */
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643};
644
6a930700 645/**
cdd6c482 646 * enum perf_event_active_state - the states of a event
6a930700 647 */
cdd6c482 648enum perf_event_active_state {
57c0c15b 649 PERF_EVENT_STATE_ERROR = -2,
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650 PERF_EVENT_STATE_OFF = -1,
651 PERF_EVENT_STATE_INACTIVE = 0,
57c0c15b 652 PERF_EVENT_STATE_ACTIVE = 1,
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653};
654
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655struct file;
656
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657#define PERF_BUFFER_WRITABLE 0x01
658
ca5135e6 659struct perf_buffer {
ac9721f3 660 atomic_t refcount;
7b732a75 661 struct rcu_head rcu_head;
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662#ifdef CONFIG_PERF_USE_VMALLOC
663 struct work_struct work;
3cafa9fb 664 int page_order; /* allocation order */
906010b2 665#endif
8740f941 666 int nr_pages; /* nr of data pages */
43a21ea8 667 int writable; /* are we writable */
8740f941 668
c33a0bc4 669 atomic_t poll; /* POLL_ for wakeups */
8740f941 670
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671 local_t head; /* write position */
672 local_t nest; /* nested writers */
673 local_t events; /* event limit */
adb8e118 674 local_t wakeup; /* wakeup stamp */
fa588151 675 local_t lost; /* nr records lost */
ef60777c 676
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677 long watermark; /* wakeup watermark */
678
57c0c15b 679 struct perf_event_mmap_page *user_page;
0127c3ea 680 void *data_pages[0];
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681};
682
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683struct perf_sample_data;
684
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685typedef void (*perf_overflow_handler_t)(struct perf_event *, int,
686 struct perf_sample_data *,
687 struct pt_regs *regs);
688
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689enum perf_group_flag {
690 PERF_GROUP_SOFTWARE = 0x1,
691};
692
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693#define SWEVENT_HLIST_BITS 8
694#define SWEVENT_HLIST_SIZE (1 << SWEVENT_HLIST_BITS)
695
696struct swevent_hlist {
697 struct hlist_head heads[SWEVENT_HLIST_SIZE];
698 struct rcu_head rcu_head;
699};
700
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701#define PERF_ATTACH_CONTEXT 0x01
702#define PERF_ATTACH_GROUP 0x02
d580ff86 703#define PERF_ATTACH_TASK 0x04
8a49542c 704
0793a61d 705/**
cdd6c482 706 * struct perf_event - performance event kernel representation:
0793a61d 707 */
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708struct perf_event {
709#ifdef CONFIG_PERF_EVENTS
65abc865 710 struct list_head group_entry;
592903cd 711 struct list_head event_entry;
04289bb9 712 struct list_head sibling_list;
76e1d904 713 struct hlist_node hlist_entry;
0127c3ea 714 int nr_siblings;
d6f962b5 715 int group_flags;
cdd6c482 716 struct perf_event *group_leader;
a4eaf7f1 717 struct pmu *pmu;
04289bb9 718
cdd6c482 719 enum perf_event_active_state state;
8a49542c 720 unsigned int attach_state;
e7850595 721 local64_t count;
a6e6dea6 722 atomic64_t child_count;
ee06094f 723
53cfbf59 724 /*
cdd6c482 725 * These are the total time in nanoseconds that the event
53cfbf59 726 * has been enabled (i.e. eligible to run, and the task has
cdd6c482 727 * been scheduled in, if this is a per-task event)
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728 * and running (scheduled onto the CPU), respectively.
729 *
730 * They are computed from tstamp_enabled, tstamp_running and
cdd6c482 731 * tstamp_stopped when the event is in INACTIVE or ACTIVE state.
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732 */
733 u64 total_time_enabled;
734 u64 total_time_running;
735
736 /*
737 * These are timestamps used for computing total_time_enabled
cdd6c482 738 * and total_time_running when the event is in INACTIVE or
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739 * ACTIVE state, measured in nanoseconds from an arbitrary point
740 * in time.
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741 * tstamp_enabled: the notional time when the event was enabled
742 * tstamp_running: the notional time when the event was scheduled on
53cfbf59 743 * tstamp_stopped: in INACTIVE state, the notional time when the
cdd6c482 744 * event was scheduled off.
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745 */
746 u64 tstamp_enabled;
747 u64 tstamp_running;
748 u64 tstamp_stopped;
749
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750 /*
751 * timestamp shadows the actual context timing but it can
752 * be safely used in NMI interrupt context. It reflects the
753 * context time as it was when the event was last scheduled in.
754 *
755 * ctx_time already accounts for ctx->timestamp. Therefore to
756 * compute ctx_time for a sample, simply add perf_clock().
757 */
758 u64 shadow_ctx_time;
759
24f1e32c 760 struct perf_event_attr attr;
cdd6c482 761 struct hw_perf_event hw;
0793a61d 762
cdd6c482 763 struct perf_event_context *ctx;
9b51f66d 764 struct file *filp;
0793a61d 765
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766 /*
767 * These accumulate total time (in nanoseconds) that children
cdd6c482 768 * events have been enabled and running, respectively.
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769 */
770 atomic64_t child_total_time_enabled;
771 atomic64_t child_total_time_running;
772
0793a61d 773 /*
d859e29f 774 * Protect attach/detach and child_list:
0793a61d 775 */
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776 struct mutex child_mutex;
777 struct list_head child_list;
cdd6c482 778 struct perf_event *parent;
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779
780 int oncpu;
781 int cpu;
782
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783 struct list_head owner_entry;
784 struct task_struct *owner;
785
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786 /* mmap bits */
787 struct mutex mmap_mutex;
788 atomic_t mmap_count;
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789 int mmap_locked;
790 struct user_struct *mmap_user;
ca5135e6 791 struct perf_buffer *buffer;
37d81828 792
7b732a75 793 /* poll related */
0793a61d 794 wait_queue_head_t waitq;
3c446b3d 795 struct fasync_struct *fasync;
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796
797 /* delayed work for NMIs and such */
798 int pending_wakeup;
4c9e2542 799 int pending_kill;
79f14641 800 int pending_disable;
e360adbe 801 struct irq_work pending;
592903cd 802
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803 atomic_t event_limit;
804
cdd6c482 805 void (*destroy)(struct perf_event *);
592903cd 806 struct rcu_head rcu_head;
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807
808 struct pid_namespace *ns;
8e5799b1 809 u64 id;
6fb2915d 810
b326e956 811 perf_overflow_handler_t overflow_handler;
453f19ee 812
07b139c8 813#ifdef CONFIG_EVENT_TRACING
1c024eca 814 struct ftrace_event_call *tp_event;
6fb2915d 815 struct event_filter *filter;
ee06094f 816#endif
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817
818#endif /* CONFIG_PERF_EVENTS */
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819};
820
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821enum perf_event_context_type {
822 task_context,
823 cpu_context,
824};
825
0793a61d 826/**
cdd6c482 827 * struct perf_event_context - event context structure
0793a61d 828 *
cdd6c482 829 * Used as a container for task events and CPU events as well:
0793a61d 830 */
cdd6c482 831struct perf_event_context {
b04243ef 832 enum perf_event_context_type type;
108b02cf 833 struct pmu *pmu;
0793a61d 834 /*
cdd6c482 835 * Protect the states of the events in the list,
d859e29f 836 * nr_active, and the list:
0793a61d 837 */
e625cce1 838 raw_spinlock_t lock;
d859e29f 839 /*
cdd6c482 840 * Protect the list of events. Locking either mutex or lock
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841 * is sufficient to ensure the list doesn't change; to change
842 * the list you need to lock both the mutex and the spinlock.
843 */
a308444c 844 struct mutex mutex;
04289bb9 845
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846 struct list_head pinned_groups;
847 struct list_head flexible_groups;
a308444c 848 struct list_head event_list;
cdd6c482 849 int nr_events;
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850 int nr_active;
851 int is_active;
bfbd3381 852 int nr_stat;
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853 atomic_t refcount;
854 struct task_struct *task;
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855
856 /*
4af4998b 857 * Context clock, runs when context enabled.
53cfbf59 858 */
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859 u64 time;
860 u64 timestamp;
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861
862 /*
863 * These fields let us detect when two contexts have both
864 * been cloned (inherited) from a common ancestor.
865 */
cdd6c482 866 struct perf_event_context *parent_ctx;
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867 u64 parent_gen;
868 u64 generation;
869 int pin_count;
870 struct rcu_head rcu_head;
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871};
872
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873/*
874 * Number of contexts where an event can trigger:
875 * task, softirq, hardirq, nmi.
876 */
877#define PERF_NR_CONTEXTS 4
878
0793a61d 879/**
cdd6c482 880 * struct perf_event_cpu_context - per cpu event context structure
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881 */
882struct perf_cpu_context {
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883 struct perf_event_context ctx;
884 struct perf_event_context *task_ctx;
0793a61d 885 int active_oncpu;
3b6f9e5c 886 int exclusive;
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887 struct list_head rotation_list;
888 int jiffies_interval;
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889};
890
5622f295 891struct perf_output_handle {
57c0c15b 892 struct perf_event *event;
ca5135e6 893 struct perf_buffer *buffer;
6d1acfd5 894 unsigned long wakeup;
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895 unsigned long size;
896 void *addr;
897 int page;
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898 int nmi;
899 int sample;
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900};
901
cdd6c482 902#ifdef CONFIG_PERF_EVENTS
829b42dd 903
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904extern int perf_pmu_register(struct pmu *pmu);
905extern void perf_pmu_unregister(struct pmu *pmu);
621a01ea 906
3bf101ba 907extern int perf_num_counters(void);
84c79910 908extern const char *perf_pmu_name(void);
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909extern void __perf_event_task_sched_in(struct task_struct *task);
910extern void __perf_event_task_sched_out(struct task_struct *task, struct task_struct *next);
911
912extern atomic_t perf_task_events;
913
914static inline void perf_event_task_sched_in(struct task_struct *task)
915{
ebf31f50 916 COND_STMT(&perf_task_events, __perf_event_task_sched_in(task));
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917}
918
919static inline
920void perf_event_task_sched_out(struct task_struct *task, struct task_struct *next)
921{
ebf31f50 922 COND_STMT(&perf_task_events, __perf_event_task_sched_out(task, next));
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923}
924
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925extern int perf_event_init_task(struct task_struct *child);
926extern void perf_event_exit_task(struct task_struct *child);
927extern void perf_event_free_task(struct task_struct *task);
4e231c79 928extern void perf_event_delayed_put(struct task_struct *task);
cdd6c482 929extern void perf_event_print_debug(void);
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930extern void perf_pmu_disable(struct pmu *pmu);
931extern void perf_pmu_enable(struct pmu *pmu);
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932extern int perf_event_task_disable(void);
933extern int perf_event_task_enable(void);
cdd6c482 934extern void perf_event_update_userpage(struct perf_event *event);
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935extern int perf_event_release_kernel(struct perf_event *event);
936extern struct perf_event *
937perf_event_create_kernel_counter(struct perf_event_attr *attr,
938 int cpu,
38a81da2 939 struct task_struct *task,
b326e956 940 perf_overflow_handler_t callback);
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941extern u64 perf_event_read_value(struct perf_event *event,
942 u64 *enabled, u64 *running);
5c92d124 943
df1a132b 944struct perf_sample_data {
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945 u64 type;
946
947 u64 ip;
948 struct {
949 u32 pid;
950 u32 tid;
951 } tid_entry;
952 u64 time;
a308444c 953 u64 addr;
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954 u64 id;
955 u64 stream_id;
956 struct {
957 u32 cpu;
958 u32 reserved;
959 } cpu_entry;
a308444c 960 u64 period;
5622f295 961 struct perf_callchain_entry *callchain;
3a43ce68 962 struct perf_raw_record *raw;
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963};
964
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965static inline
966void perf_sample_data_init(struct perf_sample_data *data, u64 addr)
967{
968 data->addr = addr;
969 data->raw = NULL;
970}
971
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972extern void perf_output_sample(struct perf_output_handle *handle,
973 struct perf_event_header *header,
974 struct perf_sample_data *data,
cdd6c482 975 struct perf_event *event);
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976extern void perf_prepare_sample(struct perf_event_header *header,
977 struct perf_sample_data *data,
cdd6c482 978 struct perf_event *event,
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979 struct pt_regs *regs);
980
cdd6c482 981extern int perf_event_overflow(struct perf_event *event, int nmi,
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982 struct perf_sample_data *data,
983 struct pt_regs *regs);
df1a132b 984
3b6f9e5c 985/*
cdd6c482 986 * Return 1 for a software event, 0 for a hardware event
3b6f9e5c 987 */
cdd6c482 988static inline int is_software_event(struct perf_event *event)
3b6f9e5c 989{
89a1e187 990 return event->pmu->task_ctx_nr == perf_sw_context;
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991}
992
cdd6c482 993extern atomic_t perf_swevent_enabled[PERF_COUNT_SW_MAX];
f29ac756 994
cdd6c482 995extern void __perf_sw_event(u32, u64, int, struct pt_regs *, u64);
f29ac756 996
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997#ifndef perf_arch_fetch_caller_regs
998static inline void
5cfaf214 999perf_arch_fetch_caller_regs(struct pt_regs *regs, unsigned long ip) { }
b0f82b81 1000#endif
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1001
1002/*
1003 * Take a snapshot of the regs. Skip ip and frame pointer to
1004 * the nth caller. We only need a few of the regs:
1005 * - ip for PERF_SAMPLE_IP
1006 * - cs for user_mode() tests
1007 * - bp for callchains
1008 * - eflags, for future purposes, just in case
1009 */
b0f82b81 1010static inline void perf_fetch_caller_regs(struct pt_regs *regs)
5331d7b8 1011{
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1012 memset(regs, 0, sizeof(*regs));
1013
b0f82b81 1014 perf_arch_fetch_caller_regs(regs, CALLER_ADDR0);
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1015}
1016
7e54a5a0 1017static __always_inline void
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1018perf_sw_event(u32 event_id, u64 nr, int nmi, struct pt_regs *regs, u64 addr)
1019{
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1020 struct pt_regs hot_regs;
1021
1022 JUMP_LABEL(&perf_swevent_enabled[event_id], have_event);
1023 return;
1024
1025have_event:
1026 if (!regs) {
1027 perf_fetch_caller_regs(&hot_regs);
1028 regs = &hot_regs;
e49a5bd3 1029 }
7e54a5a0 1030 __perf_sw_event(event_id, nr, nmi, regs, addr);
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1031}
1032
3af9e859 1033extern void perf_event_mmap(struct vm_area_struct *vma);
39447b38 1034extern struct perf_guest_info_callbacks *perf_guest_cbs;
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1035extern int perf_register_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks);
1036extern int perf_unregister_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks);
39447b38 1037
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1038extern void perf_event_comm(struct task_struct *tsk);
1039extern void perf_event_fork(struct task_struct *tsk);
8d1b2d93 1040
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1041/* Callchains */
1042DECLARE_PER_CPU(struct perf_callchain_entry, perf_callchain_entry);
1043
1044extern void perf_callchain_user(struct perf_callchain_entry *entry,
1045 struct pt_regs *regs);
1046extern void perf_callchain_kernel(struct perf_callchain_entry *entry,
1047 struct pt_regs *regs);
56962b44 1048
394ee076 1049
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1050static inline void
1051perf_callchain_store(struct perf_callchain_entry *entry, u64 ip)
1052{
1053 if (entry->nr < PERF_MAX_STACK_DEPTH)
1054 entry->ip[entry->nr++] = ip;
1055}
394ee076 1056
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1057extern int sysctl_perf_event_paranoid;
1058extern int sysctl_perf_event_mlock;
1059extern int sysctl_perf_event_sample_rate;
1ccd1549 1060
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1061static inline bool perf_paranoid_tracepoint_raw(void)
1062{
1063 return sysctl_perf_event_paranoid > -1;
1064}
1065
1066static inline bool perf_paranoid_cpu(void)
1067{
1068 return sysctl_perf_event_paranoid > 0;
1069}
1070
1071static inline bool perf_paranoid_kernel(void)
1072{
1073 return sysctl_perf_event_paranoid > 1;
1074}
1075
cdd6c482 1076extern void perf_event_init(void);
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1077extern void perf_tp_event(u64 addr, u64 count, void *record,
1078 int entry_size, struct pt_regs *regs,
ecc55f84 1079 struct hlist_head *head, int rctx);
24f1e32c 1080extern void perf_bp_event(struct perf_event *event, void *data);
0d905bca 1081
9d23a90a 1082#ifndef perf_misc_flags
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1083#define perf_misc_flags(regs) (user_mode(regs) ? PERF_RECORD_MISC_USER : \
1084 PERF_RECORD_MISC_KERNEL)
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1085#define perf_instruction_pointer(regs) instruction_pointer(regs)
1086#endif
1087
5622f295 1088extern int perf_output_begin(struct perf_output_handle *handle,
cdd6c482 1089 struct perf_event *event, unsigned int size,
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1090 int nmi, int sample);
1091extern void perf_output_end(struct perf_output_handle *handle);
1092extern void perf_output_copy(struct perf_output_handle *handle,
1093 const void *buf, unsigned int len);
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1094extern int perf_swevent_get_recursion_context(void);
1095extern void perf_swevent_put_recursion_context(int rctx);
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1096extern void perf_event_enable(struct perf_event *event);
1097extern void perf_event_disable(struct perf_event *event);
e9d2b064 1098extern void perf_event_task_tick(void);
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1099#else
1100static inline void
49f47433 1101perf_event_task_sched_in(struct task_struct *task) { }
0793a61d 1102static inline void
cdd6c482 1103perf_event_task_sched_out(struct task_struct *task,
49f47433 1104 struct task_struct *next) { }
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1105static inline int perf_event_init_task(struct task_struct *child) { return 0; }
1106static inline void perf_event_exit_task(struct task_struct *child) { }
1107static inline void perf_event_free_task(struct task_struct *task) { }
4e231c79 1108static inline void perf_event_delayed_put(struct task_struct *task) { }
57c0c15b 1109static inline void perf_event_print_debug(void) { }
57c0c15b
IM
1110static inline int perf_event_task_disable(void) { return -EINVAL; }
1111static inline int perf_event_task_enable(void) { return -EINVAL; }
15dbf27c 1112
925d519a 1113static inline void
cdd6c482 1114perf_sw_event(u32 event_id, u64 nr, int nmi,
78f13e95 1115 struct pt_regs *regs, u64 addr) { }
24f1e32c 1116static inline void
184f412c 1117perf_bp_event(struct perf_event *event, void *data) { }
0a4a9391 1118
39447b38 1119static inline int perf_register_guest_info_callbacks
dcf46b94 1120(struct perf_guest_info_callbacks *callbacks) { return 0; }
39447b38 1121static inline int perf_unregister_guest_info_callbacks
dcf46b94 1122(struct perf_guest_info_callbacks *callbacks) { return 0; }
39447b38 1123
57c0c15b 1124static inline void perf_event_mmap(struct vm_area_struct *vma) { }
cdd6c482
IM
1125static inline void perf_event_comm(struct task_struct *tsk) { }
1126static inline void perf_event_fork(struct task_struct *tsk) { }
1127static inline void perf_event_init(void) { }
184f412c 1128static inline int perf_swevent_get_recursion_context(void) { return -1; }
4ed7c92d 1129static inline void perf_swevent_put_recursion_context(int rctx) { }
44234adc
FW
1130static inline void perf_event_enable(struct perf_event *event) { }
1131static inline void perf_event_disable(struct perf_event *event) { }
e9d2b064 1132static inline void perf_event_task_tick(void) { }
0793a61d
TG
1133#endif
1134
5622f295
MM
1135#define perf_output_put(handle, x) \
1136 perf_output_copy((handle), &(x), sizeof(x))
1137
3f6da390
PZ
1138/*
1139 * This has to have a higher priority than migration_notifier in sched.c.
1140 */
1141#define perf_cpu_notifier(fn) \
1142do { \
1143 static struct notifier_block fn##_nb __cpuinitdata = \
50a323b7 1144 { .notifier_call = fn, .priority = CPU_PRI_PERF }; \
3f6da390
PZ
1145 fn(&fn##_nb, (unsigned long)CPU_UP_PREPARE, \
1146 (void *)(unsigned long)smp_processor_id()); \
1147 fn(&fn##_nb, (unsigned long)CPU_STARTING, \
1148 (void *)(unsigned long)smp_processor_id()); \
1149 fn(&fn##_nb, (unsigned long)CPU_ONLINE, \
1150 (void *)(unsigned long)smp_processor_id()); \
1151 register_cpu_notifier(&fn##_nb); \
1152} while (0)
1153
f3dfd265 1154#endif /* __KERNEL__ */
cdd6c482 1155#endif /* _LINUX_PERF_EVENT_H */