[net-next-2.6.git] / include / linux / perf_counter.h

/*
 *  Performance counters:
 *
 *   Copyright(C) 2008, Thomas Gleixner <tglx@linutronix.de>
 *   Copyright(C) 2008, Red Hat, Inc., Ingo Molnar
 *
 *  Data type definitions, declarations, prototypes.
 *
 *  Started by: Thomas Gleixner and Ingo Molnar
 *
 *  For licencing details see kernel-base/COPYING
 */
#ifndef _LINUX_PERF_COUNTER_H
#define _LINUX_PERF_COUNTER_H

#include <linux/types.h>
#include <linux/ioctl.h>
#include <asm/byteorder.h>

/*
 * User-space ABI bits:
 */

/*
 * hw_event.type
 */
enum perf_event_types {
	PERF_TYPE_HARDWARE		= 0,
	PERF_TYPE_SOFTWARE		= 1,
	PERF_TYPE_TRACEPOINT		= 2,

	/*
	 * available TYPE space, raw is the max value.
	 */

	PERF_TYPE_RAW			= 128,
};

/*
 * Generalized performance counter event types, used by the hw_event.event_id
 * parameter of the sys_perf_counter_open() syscall:
 */
enum hw_event_ids {
	/*
	 * Common hardware events, generalized by the kernel:
	 */
	PERF_COUNT_CPU_CYCLES		= 0,
	PERF_COUNT_INSTRUCTIONS		= 1,
	PERF_COUNT_CACHE_REFERENCES	= 2,
	PERF_COUNT_CACHE_MISSES		= 3,
	PERF_COUNT_BRANCH_INSTRUCTIONS	= 4,
	PERF_COUNT_BRANCH_MISSES	= 5,
	PERF_COUNT_BUS_CYCLES		= 6,

	PERF_HW_EVENTS_MAX		= 7,
};

/*
 * Special "software" counters provided by the kernel, even if the hardware
 * does not support performance counters. These counters measure various
 * physical and sw events of the kernel (and allow the profiling of them as
 * well):
 */
enum sw_event_ids {
	PERF_COUNT_CPU_CLOCK		= 0,
	PERF_COUNT_TASK_CLOCK		= 1,
	PERF_COUNT_PAGE_FAULTS		= 2,
	PERF_COUNT_CONTEXT_SWITCHES	= 3,
	PERF_COUNT_CPU_MIGRATIONS	= 4,
	PERF_COUNT_PAGE_FAULTS_MIN	= 5,
	PERF_COUNT_PAGE_FAULTS_MAJ	= 6,

	PERF_SW_EVENTS_MAX		= 7,
};

/*
 * IRQ-notification data record type:
 */
enum perf_counter_record_type {
	PERF_RECORD_SIMPLE		= 0,
	PERF_RECORD_IRQ			= 1,
	PERF_RECORD_GROUP		= 2,
};

#define __PERF_COUNTER_MASK(name) 			\
	(((1ULL << PERF_COUNTER_##name##_BITS) - 1) <<	\
	 PERF_COUNTER_##name##_SHIFT)

#define PERF_COUNTER_RAW_BITS		1
#define PERF_COUNTER_RAW_SHIFT		63
#define PERF_COUNTER_RAW_MASK		__PERF_COUNTER_MASK(RAW)

#define PERF_COUNTER_CONFIG_BITS	63
#define PERF_COUNTER_CONFIG_SHIFT	0
#define PERF_COUNTER_CONFIG_MASK	__PERF_COUNTER_MASK(CONFIG)

#define PERF_COUNTER_TYPE_BITS		7
#define PERF_COUNTER_TYPE_SHIFT		56
#define PERF_COUNTER_TYPE_MASK		__PERF_COUNTER_MASK(TYPE)

#define PERF_COUNTER_EVENT_BITS		56
#define PERF_COUNTER_EVENT_SHIFT	0
#define PERF_COUNTER_EVENT_MASK		__PERF_COUNTER_MASK(EVENT)

/*
 * Bits that can be set in hw_event.read_format to request that
 * reads on the counter should return the indicated quantities,
 * in increasing order of bit value, after the counter value.
 */
enum perf_counter_read_format {
	PERF_FORMAT_TOTAL_TIME_ENABLED	=  1,
	PERF_FORMAT_TOTAL_TIME_RUNNING	=  2,
};

/*
 * Hardware event to monitor via a performance monitoring counter:
 */
struct perf_counter_hw_event {
	/*
	 * The MSB of the config word signifies if the rest contains cpu
	 * specific (raw) counter configuration data, if unset, the next
	 * 7 bits are an event type and the rest of the bits are the event
	 * identifier.
	 */
	__u64			config;

	__u64			irq_period;
	__u64			record_type;
	__u64			read_format;

	__u64			disabled       :  1, /* off by default        */
				nmi	       :  1, /* NMI sampling          */
				inherit	       :  1, /* children inherit it   */
				pinned	       :  1, /* must always be on PMU */
				exclusive      :  1, /* only group on PMU     */
				exclude_user   :  1, /* don't count user      */
				exclude_kernel :  1, /* ditto kernel          */
				exclude_hv     :  1, /* ditto hypervisor      */
				exclude_idle   :  1, /* don't count when idle */
				include_tid    :  1, /* include the tid       */
				mmap           :  1, /* include mmap data     */
				munmap         :  1, /* include munmap data   */

				__reserved_1   : 52;

	__u32			extra_config_len;
	__u32			__reserved_4;

	__u64			__reserved_2;
	__u64			__reserved_3;
};

/*
 * Ioctls that can be done on a perf counter fd:
 */
#define PERF_COUNTER_IOC_ENABLE		_IO('$', 0)
#define PERF_COUNTER_IOC_DISABLE	_IO('$', 1)

/*
 * Structure of the page that can be mapped via mmap
 */
struct perf_counter_mmap_page {
	__u32	version;		/* version number of this structure */
	__u32	compat_version;		/* lowest version this is compat with */

	/*
	 * Bits needed to read the hw counters in user-space.
	 *
	 * The index and offset should be read atomically using the seqlock:
	 *
	 *   __u32 seq, index;
	 *   __s64 offset;
	 *
	 * again:
	 *   rmb();
	 *   seq = pc->lock;
	 *
	 *   if (unlikely(seq & 1)) {
	 *     cpu_relax();
	 *     goto again;
	 *   }
	 *
	 *   index = pc->index;
	 *   offset = pc->offset;
	 *
	 *   rmb();
	 *   if (pc->lock != seq)
	 *     goto again;
	 *
	 * After this, index contains architecture specific counter index + 1,
	 * so that 0 means unavailable, offset contains the value to be added
	 * to the result of the raw timer read to obtain this counter's value.
	 */
	__u32	lock;			/* seqlock for synchronization */
	__u32	index;			/* hardware counter identifier */
	__s64	offset;			/* add to hardware counter value */

	/*
	 * Control data for the mmap() data buffer.
	 *
	 * User-space reading this value should issue an rmb(), on SMP capable
	 * platforms, after reading this value -- see perf_counter_wakeup().
	 */
	__u32   data_head;		/* head in the data section */
};

struct perf_event_header {
	__u32	type;
	__u32	size;
};

enum perf_event_type {
	PERF_EVENT_IP		= 0,
	PERF_EVENT_GROUP	= 1,

	PERF_EVENT_MMAP		= 2,
	PERF_EVENT_MUNMAP	= 3,

	__PERF_EVENT_TID	= 0x100,
};

#ifdef __KERNEL__
/*
 * Kernel-internal data types and definitions:
 */

#ifdef CONFIG_PERF_COUNTERS
# include <asm/perf_counter.h>
#endif

#include <linux/list.h>
#include <linux/mutex.h>
#include <linux/rculist.h>
#include <linux/rcupdate.h>
#include <linux/spinlock.h>
#include <linux/hrtimer.h>
#include <asm/atomic.h>

struct task_struct;

static inline u64 perf_event_raw(struct perf_counter_hw_event *hw_event)
{
	return hw_event->config & PERF_COUNTER_RAW_MASK;
}

static inline u64 perf_event_config(struct perf_counter_hw_event *hw_event)
{
	return hw_event->config & PERF_COUNTER_CONFIG_MASK;
}

static inline u64 perf_event_type(struct perf_counter_hw_event *hw_event)
{
	return (hw_event->config & PERF_COUNTER_TYPE_MASK) >>
		PERF_COUNTER_TYPE_SHIFT;
}

static inline u64 perf_event_id(struct perf_counter_hw_event *hw_event)
{
	return hw_event->config & PERF_COUNTER_EVENT_MASK;
}

/**
 * struct hw_perf_counter - performance counter hardware details:
 */
struct hw_perf_counter {
#ifdef CONFIG_PERF_COUNTERS
	union {
		struct { /* hardware */
			u64				config;
			unsigned long			config_base;
			unsigned long			counter_base;
			int				nmi;
			unsigned int			idx;
		};
		union { /* software */
			atomic64_t			count;
			struct hrtimer			hrtimer;
		};
	};
	atomic64_t			prev_count;
	u64				irq_period;
	atomic64_t			period_left;
#endif
};

struct perf_counter;

/**
 * struct hw_perf_counter_ops - performance counter hw ops
 */
struct hw_perf_counter_ops {
	int (*enable)			(struct perf_counter *counter);
	void (*disable)			(struct perf_counter *counter);
	void (*read)			(struct perf_counter *counter);
};

/**
 * enum perf_counter_active_state - the states of a counter
 */
enum perf_counter_active_state {
	PERF_COUNTER_STATE_ERROR	= -2,
	PERF_COUNTER_STATE_OFF		= -1,
	PERF_COUNTER_STATE_INACTIVE	=  0,
	PERF_COUNTER_STATE_ACTIVE	=  1,
};

struct file;

struct perf_mmap_data {
	struct rcu_head			rcu_head;
	int				nr_pages;
	atomic_t			wakeup;
	atomic_t			head;
	struct perf_counter_mmap_page   *user_page;
	void 				*data_pages[0];
};

struct perf_wakeup_entry {
	struct perf_wakeup_entry *next;
};

/**
 * struct perf_counter - performance counter kernel representation:
 */
struct perf_counter {
#ifdef CONFIG_PERF_COUNTERS
	struct list_head		list_entry;
	struct list_head		event_entry;
	struct list_head		sibling_list;
	int 				nr_siblings;
	struct perf_counter		*group_leader;
	const struct hw_perf_counter_ops *hw_ops;

	enum perf_counter_active_state	state;
	enum perf_counter_active_state	prev_state;
	atomic64_t			count;

	/*
	 * These are the total time in nanoseconds that the counter
	 * has been enabled (i.e. eligible to run, and the task has
	 * been scheduled in, if this is a per-task counter)
	 * and running (scheduled onto the CPU), respectively.
	 *
	 * They are computed from tstamp_enabled, tstamp_running and
	 * tstamp_stopped when the counter is in INACTIVE or ACTIVE state.
	 */
	u64				total_time_enabled;
	u64				total_time_running;

	/*
	 * These are timestamps used for computing total_time_enabled
	 * and total_time_running when the counter is in INACTIVE or
	 * ACTIVE state, measured in nanoseconds from an arbitrary point
	 * in time.
	 * tstamp_enabled: the notional time when the counter was enabled
	 * tstamp_running: the notional time when the counter was scheduled on
	 * tstamp_stopped: in INACTIVE state, the notional time when the
	 *	counter was scheduled off.
	 */
	u64				tstamp_enabled;
	u64				tstamp_running;
	u64				tstamp_stopped;

	struct perf_counter_hw_event	hw_event;
	struct hw_perf_counter		hw;

	struct perf_counter_context	*ctx;
	struct task_struct		*task;
	struct file			*filp;

	struct perf_counter		*parent;
	struct list_head		child_list;

	/*
	 * These accumulate total time (in nanoseconds) that children
	 * counters have been enabled and running, respectively.
	 */
	atomic64_t			child_total_time_enabled;
	atomic64_t			child_total_time_running;

	/*
	 * Protect attach/detach and child_list:
	 */
	struct mutex			mutex;

	int				oncpu;
	int				cpu;

	/* mmap bits */
	struct mutex			mmap_mutex;
	atomic_t			mmap_count;
	struct perf_mmap_data		*data;

	/* poll related */
	wait_queue_head_t		waitq;
	/* optional: for NMIs */
	struct perf_wakeup_entry	wakeup;

	void (*destroy)(struct perf_counter *);
	struct rcu_head			rcu_head;
#endif
};

/**
 * struct perf_counter_context - counter context structure
 *
 * Used as a container for task counters and CPU counters as well:
 */
struct perf_counter_context {
#ifdef CONFIG_PERF_COUNTERS
	/*
	 * Protect the states of the counters in the list,
	 * nr_active, and the list:
	 */
	spinlock_t		lock;
	/*
	 * Protect the list of counters.  Locking either mutex or lock
	 * is sufficient to ensure the list doesn't change; to change
	 * the list you need to lock both the mutex and the spinlock.
	 */
	struct mutex		mutex;

	struct list_head	counter_list;
	struct list_head	event_list;
	int			nr_counters;
	int			nr_active;
	int			is_active;
	struct task_struct	*task;

	/*
	 * time_now is the current time in nanoseconds since an arbitrary
	 * point in the past.  For per-task counters, this is based on the
	 * task clock, and for per-cpu counters it is based on the cpu clock.
	 * time_lost is an offset from the task/cpu clock, used to make it
	 * appear that time only passes while the context is scheduled in.
	 */
	u64			time_now;
	u64			time_lost;
#endif
};

/**
 * struct perf_counter_cpu_context - per cpu counter context structure
 */
struct perf_cpu_context {
	struct perf_counter_context	ctx;
	struct perf_counter_context	*task_ctx;
	int				active_oncpu;
	int				max_pertask;
	int				exclusive;

	/*
	 * Recursion avoidance:
	 *
	 * task, softirq, irq, nmi context
	 */
	int			recursion[4];
};

/*
 * Set by architecture code:
 */
extern int perf_max_counters;

#ifdef CONFIG_PERF_COUNTERS
extern const struct hw_perf_counter_ops *
hw_perf_counter_init(struct perf_counter *counter);

extern void perf_counter_task_sched_in(struct task_struct *task, int cpu);
extern void perf_counter_task_sched_out(struct task_struct *task, int cpu);
extern void perf_counter_task_tick(struct task_struct *task, int cpu);
extern void perf_counter_init_task(struct task_struct *child);
extern void perf_counter_exit_task(struct task_struct *child);
extern void perf_counter_do_pending(void);
extern void perf_counter_print_debug(void);
extern void perf_counter_unthrottle(void);
extern u64 hw_perf_save_disable(void);
extern void hw_perf_restore(u64 ctrl);
extern int perf_counter_task_disable(void);
extern int perf_counter_task_enable(void);
extern int hw_perf_group_sched_in(struct perf_counter *group_leader,
	       struct perf_cpu_context *cpuctx,
	       struct perf_counter_context *ctx, int cpu);
extern void perf_counter_update_userpage(struct perf_counter *counter);

extern void perf_counter_output(struct perf_counter *counter,
				int nmi, struct pt_regs *regs);
/*
 * Return 1 for a software counter, 0 for a hardware counter
 */
static inline int is_software_counter(struct perf_counter *counter)
{
	return !perf_event_raw(&counter->hw_event) &&
		perf_event_type(&counter->hw_event) != PERF_TYPE_HARDWARE;
}

extern void perf_swcounter_event(u32, u64, int, struct pt_regs *);

extern void perf_counter_mmap(unsigned long addr, unsigned long len,
			      unsigned long pgoff, struct file *file);

extern void perf_counter_munmap(unsigned long addr, unsigned long len,
				unsigned long pgoff, struct file *file);

#else
static inline void
perf_counter_task_sched_in(struct task_struct *task, int cpu)		{ }
static inline void
perf_counter_task_sched_out(struct task_struct *task, int cpu)		{ }
static inline void
perf_counter_task_tick(struct task_struct *task, int cpu)		{ }
static inline void perf_counter_init_task(struct task_struct *child)	{ }
static inline void perf_counter_exit_task(struct task_struct *child)	{ }
static inline void perf_counter_do_pending(void)			{ }
static inline void perf_counter_print_debug(void)			{ }
static inline void perf_counter_unthrottle(void)			{ }
static inline void hw_perf_restore(u64 ctrl)				{ }
static inline u64 hw_perf_save_disable(void)		      { return 0; }
static inline int perf_counter_task_disable(void)	{ return -EINVAL; }
static inline int perf_counter_task_enable(void)	{ return -EINVAL; }

static inline void
perf_swcounter_event(u32 event, u64 nr, int nmi, struct pt_regs *regs)	{ }


static inline void
perf_counter_mmap(unsigned long addr, unsigned long len,
		  unsigned long pgoff, struct file *file)		{ }

static inline void
perf_counter_munmap(unsigned long addr, unsigned long len,
		    unsigned long pgoff, struct file *file) 		{ }

#endif

#endif /* __KERNEL__ */
#endif /* _LINUX_PERF_COUNTER_H */
Commit	Line	Data
0793a61d TG	1	/*
	2	* Performance counters:
	3	*
	4	* Copyright(C) 2008, Thomas Gleixner <tglx@linutronix.de>
	5	* Copyright(C) 2008, Red Hat, Inc., Ingo Molnar
	6	*
	7	* Data type definitions, declarations, prototypes.
	8	*
	9	* Started by: Thomas Gleixner and Ingo Molnar
	10	*
	11	* For licencing details see kernel-base/COPYING
	12	*/
	13	#ifndef _LINUX_PERF_COUNTER_H
	14	#define _LINUX_PERF_COUNTER_H
	15
f3dfd265 PM	16	#include <linux/types.h>
f3dfd265 PM	17	#include <linux/ioctl.h>
9aaa131a	18	#include <asm/byteorder.h>
0793a61d TG	19
0793a61d TG	20	/*
9f66a381 IM	21	* User-space ABI bits:
	22	*/
	23
	24	/*
b8e83514	25	* hw_event.type
0793a61d	26	*/
b8e83514 PZ	27	enum perf_event_types {
	28	PERF_TYPE_HARDWARE = 0,
	29	PERF_TYPE_SOFTWARE = 1,
	30	PERF_TYPE_TRACEPOINT = 2,
	31
0793a61d	32	/*
b8e83514	33	* available TYPE space, raw is the max value.
0793a61d	34	*/
9f66a381	35
b8e83514 PZ	36	PERF_TYPE_RAW = 128,
b8e83514 PZ	37	};
6c594c21	38
b8e83514 PZ	39	/*
	40	* Generalized performance counter event types, used by the hw_event.event_id
	41	* parameter of the sys_perf_counter_open() syscall:
	42	*/
	43	enum hw_event_ids {
9f66a381	44	/*
b8e83514	45	* Common hardware events, generalized by the kernel:
9f66a381	46	*/
b8e83514 PZ	47	PERF_COUNT_CPU_CYCLES = 0,
	48	PERF_COUNT_INSTRUCTIONS = 1,
	49	PERF_COUNT_CACHE_REFERENCES = 2,
	50	PERF_COUNT_CACHE_MISSES = 3,
	51	PERF_COUNT_BRANCH_INSTRUCTIONS = 4,
	52	PERF_COUNT_BRANCH_MISSES = 5,
	53	PERF_COUNT_BUS_CYCLES = 6,
	54
	55	PERF_HW_EVENTS_MAX = 7,
	56	};
e077df4f	57
b8e83514 PZ	58	/*
	59	* Special "software" counters provided by the kernel, even if the hardware
	60	* does not support performance counters. These counters measure various
	61	* physical and sw events of the kernel (and allow the profiling of them as
	62	* well):
	63	*/
	64	enum sw_event_ids {
	65	PERF_COUNT_CPU_CLOCK = 0,
	66	PERF_COUNT_TASK_CLOCK = 1,
	67	PERF_COUNT_PAGE_FAULTS = 2,
	68	PERF_COUNT_CONTEXT_SWITCHES = 3,
	69	PERF_COUNT_CPU_MIGRATIONS = 4,
	70	PERF_COUNT_PAGE_FAULTS_MIN = 5,
	71	PERF_COUNT_PAGE_FAULTS_MAJ = 6,
	72
	73	PERF_SW_EVENTS_MAX = 7,
0793a61d TG	74	};
	75
	76	/*
	77	* IRQ-notification data record type:
	78	*/
9f66a381	79	enum perf_counter_record_type {
b8e83514 PZ	80	PERF_RECORD_SIMPLE = 0,
	81	PERF_RECORD_IRQ = 1,
	82	PERF_RECORD_GROUP = 2,
0793a61d TG	83	};
0793a61d TG	84
f4a2deb4 PZ	85	#define __PERF_COUNTER_MASK(name) \
	86	(((1ULL << PERF_COUNTER_##name##_BITS) - 1) << \
	87	PERF_COUNTER_##name##_SHIFT)
	88
	89	#define PERF_COUNTER_RAW_BITS 1
	90	#define PERF_COUNTER_RAW_SHIFT 63
	91	#define PERF_COUNTER_RAW_MASK __PERF_COUNTER_MASK(RAW)
	92
	93	#define PERF_COUNTER_CONFIG_BITS 63
	94	#define PERF_COUNTER_CONFIG_SHIFT 0
	95	#define PERF_COUNTER_CONFIG_MASK __PERF_COUNTER_MASK(CONFIG)
	96
	97	#define PERF_COUNTER_TYPE_BITS 7
	98	#define PERF_COUNTER_TYPE_SHIFT 56
	99	#define PERF_COUNTER_TYPE_MASK __PERF_COUNTER_MASK(TYPE)
	100
	101	#define PERF_COUNTER_EVENT_BITS 56
	102	#define PERF_COUNTER_EVENT_SHIFT 0
	103	#define PERF_COUNTER_EVENT_MASK __PERF_COUNTER_MASK(EVENT)
	104
53cfbf59 PM	105	/*
	106	* Bits that can be set in hw_event.read_format to request that
	107	* reads on the counter should return the indicated quantities,
	108	* in increasing order of bit value, after the counter value.
	109	*/
	110	enum perf_counter_read_format {
	111	PERF_FORMAT_TOTAL_TIME_ENABLED = 1,
	112	PERF_FORMAT_TOTAL_TIME_RUNNING = 2,
	113	};
	114
9f66a381 IM	115	/*
	116	* Hardware event to monitor via a performance monitoring counter:
	117	*/
	118	struct perf_counter_hw_event {
f4a2deb4 PZ	119	/*
	120	* The MSB of the config word signifies if the rest contains cpu
	121	* specific (raw) counter configuration data, if unset, the next
	122	* 7 bits are an event type and the rest of the bits are the event
	123	* identifier.
	124	*/
	125	__u64 config;
9f66a381	126
f3dfd265	127	__u64 irq_period;
2743a5b0 PM	128	__u64 record_type;
2743a5b0 PM	129	__u64 read_format;
9f66a381	130
2743a5b0	131	__u64 disabled : 1, /* off by default */
0475f9ea	132	nmi : 1, /* NMI sampling */
0475f9ea PM	133	inherit : 1, /* children inherit it */
	134	pinned : 1, /* must always be on PMU */
	135	exclusive : 1, /* only group on PMU */
	136	exclude_user : 1, /* don't count user */
	137	exclude_kernel : 1, /* ditto kernel */
	138	exclude_hv : 1, /* ditto hypervisor */
2743a5b0	139	exclude_idle : 1, /* don't count when idle */
0a4a9391 PZ	140	include_tid : 1, /* include the tid */
	141	mmap : 1, /* include mmap data */
	142	munmap : 1, /* include munmap data */
0475f9ea	143
0a4a9391	144	__reserved_1 : 52;
2743a5b0 PM	145
	146	__u32 extra_config_len;
	147	__u32 __reserved_4;
9f66a381	148
f3dfd265	149	__u64 __reserved_2;
2743a5b0	150	__u64 __reserved_3;
eab656ae TG	151	};
eab656ae TG	152
d859e29f PM	153	/*
	154	* Ioctls that can be done on a perf counter fd:
	155	*/
	156	#define PERF_COUNTER_IOC_ENABLE _IO('$', 0)
	157	#define PERF_COUNTER_IOC_DISABLE _IO('$', 1)
	158
37d81828 PM	159	/*
	160	* Structure of the page that can be mapped via mmap
	161	*/
	162	struct perf_counter_mmap_page {
	163	__u32 version; /* version number of this structure */
	164	__u32 compat_version; /* lowest version this is compat with */
38ff667b PZ	165
	166	/*
	167	* Bits needed to read the hw counters in user-space.
	168	*
	169	* The index and offset should be read atomically using the seqlock:
	170	*
	171	* __u32 seq, index;
	172	* __s64 offset;
	173	*
	174	* again:
	175	* rmb();
	176	* seq = pc->lock;
	177	*
	178	* if (unlikely(seq & 1)) {
	179	* cpu_relax();
	180	* goto again;
	181	* }
	182	*
	183	* index = pc->index;
	184	* offset = pc->offset;
	185	*
	186	* rmb();
	187	* if (pc->lock != seq)
	188	* goto again;
	189	*
	190	* After this, index contains architecture specific counter index + 1,
	191	* so that 0 means unavailable, offset contains the value to be added
	192	* to the result of the raw timer read to obtain this counter's value.
	193	*/
37d81828 PM	194	__u32 lock; /* seqlock for synchronization */
	195	__u32 index; /* hardware counter identifier */
	196	__s64 offset; /* add to hardware counter value */
7b732a75	197
38ff667b PZ	198	/*
	199	* Control data for the mmap() data buffer.
	200	*
	201	* User-space reading this value should issue an rmb(), on SMP capable
	202	* platforms, after reading this value -- see perf_counter_wakeup().
	203	*/
7b732a75	204	__u32 data_head; /* head in the data section */
37d81828 PM	205	};
37d81828 PM	206
5c148194 PZ	207	struct perf_event_header {
	208	__u32 type;
	209	__u32 size;
	210	};
	211
	212	enum perf_event_type {
	213	PERF_EVENT_IP = 0,
	214	PERF_EVENT_GROUP = 1,
ea5d20cf	215
0a4a9391 PZ	216	PERF_EVENT_MMAP = 2,
	217	PERF_EVENT_MUNMAP = 3,
	218
ea5d20cf	219	__PERF_EVENT_TID = 0x100,
5c148194 PZ	220	};
5c148194 PZ	221
f3dfd265	222	#ifdef __KERNEL__
9f66a381	223	/*
f3dfd265	224	* Kernel-internal data types and definitions:
9f66a381 IM	225	*/
9f66a381 IM	226
f3dfd265 PM	227	#ifdef CONFIG_PERF_COUNTERS
	228	# include <asm/perf_counter.h>
	229	#endif
	230
	231	#include <linux/list.h>
	232	#include <linux/mutex.h>
	233	#include <linux/rculist.h>
	234	#include <linux/rcupdate.h>
	235	#include <linux/spinlock.h>
d6d020e9	236	#include <linux/hrtimer.h>
f3dfd265 PM	237	#include <asm/atomic.h>
	238
	239	struct task_struct;
	240
f4a2deb4 PZ	241	static inline u64 perf_event_raw(struct perf_counter_hw_event *hw_event)
	242	{
	243	return hw_event->config & PERF_COUNTER_RAW_MASK;
	244	}
	245
	246	static inline u64 perf_event_config(struct perf_counter_hw_event *hw_event)
	247	{
	248	return hw_event->config & PERF_COUNTER_CONFIG_MASK;
	249	}
	250
	251	static inline u64 perf_event_type(struct perf_counter_hw_event *hw_event)
	252	{
	253	return (hw_event->config & PERF_COUNTER_TYPE_MASK) >>
	254	PERF_COUNTER_TYPE_SHIFT;
	255	}
	256
	257	static inline u64 perf_event_id(struct perf_counter_hw_event *hw_event)
	258	{
	259	return hw_event->config & PERF_COUNTER_EVENT_MASK;
	260	}
	261
0793a61d	262	/**
9f66a381	263	* struct hw_perf_counter - performance counter hardware details:
0793a61d TG	264	*/
0793a61d TG	265	struct hw_perf_counter {
ee06094f	266	#ifdef CONFIG_PERF_COUNTERS
d6d020e9 PZ	267	union {
	268	struct { /* hardware */
	269	u64 config;
	270	unsigned long config_base;
	271	unsigned long counter_base;
	272	int nmi;
	273	unsigned int idx;
	274	};
	275	union { /* software */
	276	atomic64_t count;
	277	struct hrtimer hrtimer;
	278	};
	279	};
ee06094f	280	atomic64_t prev_count;
9f66a381	281	u64 irq_period;
ee06094f IM	282	atomic64_t period_left;
ee06094f IM	283	#endif
0793a61d TG	284	};
0793a61d TG	285
621a01ea IM	286	struct perf_counter;
	287
	288	/**
	289	* struct hw_perf_counter_ops - performance counter hw ops
	290	*/
	291	struct hw_perf_counter_ops {
95cdd2e7	292	int (enable) (struct perf_counter counter);
7671581f IM	293	void (disable) (struct perf_counter counter);
7671581f IM	294	void (read) (struct perf_counter counter);
621a01ea IM	295	};
621a01ea IM	296
6a930700 IM	297	/**
	298	* enum perf_counter_active_state - the states of a counter
	299	*/
	300	enum perf_counter_active_state {
3b6f9e5c	301	PERF_COUNTER_STATE_ERROR = -2,
6a930700 IM	302	PERF_COUNTER_STATE_OFF = -1,
	303	PERF_COUNTER_STATE_INACTIVE = 0,
	304	PERF_COUNTER_STATE_ACTIVE = 1,
	305	};
	306
9b51f66d IM	307	struct file;
9b51f66d IM	308
7b732a75 PZ	309	struct perf_mmap_data {
	310	struct rcu_head rcu_head;
	311	int nr_pages;
c7138f37	312	atomic_t wakeup;
7b732a75 PZ	313	atomic_t head;
	314	struct perf_counter_mmap_page *user_page;
	315	void *data_pages[0];
	316	};
	317
925d519a PZ	318	struct perf_wakeup_entry {
	319	struct perf_wakeup_entry *next;
	320	};
	321
0793a61d TG	322	/**
	323	* struct perf_counter - performance counter kernel representation:
	324	*/
	325	struct perf_counter {
ee06094f	326	#ifdef CONFIG_PERF_COUNTERS
04289bb9	327	struct list_head list_entry;
592903cd	328	struct list_head event_entry;
04289bb9	329	struct list_head sibling_list;
5c148194	330	int nr_siblings;
04289bb9	331	struct perf_counter *group_leader;
5c92d124	332	const struct hw_perf_counter_ops *hw_ops;
04289bb9	333
6a930700	334	enum perf_counter_active_state state;
c07c99b6	335	enum perf_counter_active_state prev_state;
0793a61d	336	atomic64_t count;
ee06094f	337
53cfbf59 PM	338	/*
	339	* These are the total time in nanoseconds that the counter
	340	* has been enabled (i.e. eligible to run, and the task has
	341	* been scheduled in, if this is a per-task counter)
	342	* and running (scheduled onto the CPU), respectively.
	343	*
	344	* They are computed from tstamp_enabled, tstamp_running and
	345	* tstamp_stopped when the counter is in INACTIVE or ACTIVE state.
	346	*/
	347	u64 total_time_enabled;
	348	u64 total_time_running;
	349
	350	/*
	351	* These are timestamps used for computing total_time_enabled
	352	* and total_time_running when the counter is in INACTIVE or
	353	* ACTIVE state, measured in nanoseconds from an arbitrary point
	354	* in time.
	355	* tstamp_enabled: the notional time when the counter was enabled
	356	* tstamp_running: the notional time when the counter was scheduled on
	357	* tstamp_stopped: in INACTIVE state, the notional time when the
	358	* counter was scheduled off.
	359	*/
	360	u64 tstamp_enabled;
	361	u64 tstamp_running;
	362	u64 tstamp_stopped;
	363
9f66a381	364	struct perf_counter_hw_event hw_event;
0793a61d TG	365	struct hw_perf_counter hw;
	366
	367	struct perf_counter_context *ctx;
	368	struct task_struct *task;
9b51f66d	369	struct file *filp;
0793a61d	370
9b51f66d	371	struct perf_counter *parent;
d859e29f PM	372	struct list_head child_list;
d859e29f PM	373
53cfbf59 PM	374	/*
	375	* These accumulate total time (in nanoseconds) that children
	376	* counters have been enabled and running, respectively.
	377	*/
	378	atomic64_t child_total_time_enabled;
	379	atomic64_t child_total_time_running;
	380
0793a61d	381	/*
d859e29f	382	* Protect attach/detach and child_list:
0793a61d TG	383	*/
	384	struct mutex mutex;
	385
	386	int oncpu;
	387	int cpu;
	388
7b732a75 PZ	389	/* mmap bits */
	390	struct mutex mmap_mutex;
	391	atomic_t mmap_count;
	392	struct perf_mmap_data *data;
37d81828	393
7b732a75	394	/* poll related */
0793a61d TG	395	wait_queue_head_t waitq;
0793a61d TG	396	/* optional: for NMIs */
925d519a	397	struct perf_wakeup_entry wakeup;
592903cd	398
e077df4f	399	void (destroy)(struct perf_counter );
592903cd	400	struct rcu_head rcu_head;
ee06094f	401	#endif
0793a61d TG	402	};
	403
	404	/**
	405	* struct perf_counter_context - counter context structure
	406	*
	407	* Used as a container for task counters and CPU counters as well:
	408	*/
	409	struct perf_counter_context {
	410	#ifdef CONFIG_PERF_COUNTERS
	411	/*
d859e29f PM	412	* Protect the states of the counters in the list,
d859e29f PM	413	* nr_active, and the list:
0793a61d TG	414	*/
0793a61d TG	415	spinlock_t lock;
d859e29f PM	416	/*
	417	* Protect the list of counters. Locking either mutex or lock
	418	* is sufficient to ensure the list doesn't change; to change
	419	* the list you need to lock both the mutex and the spinlock.
	420	*/
	421	struct mutex mutex;
04289bb9 IM	422
04289bb9 IM	423	struct list_head counter_list;
592903cd	424	struct list_head event_list;
0793a61d TG	425	int nr_counters;
0793a61d TG	426	int nr_active;
d859e29f	427	int is_active;
0793a61d	428	struct task_struct *task;
53cfbf59 PM	429
	430	/*
	431	* time_now is the current time in nanoseconds since an arbitrary
	432	* point in the past. For per-task counters, this is based on the
	433	* task clock, and for per-cpu counters it is based on the cpu clock.
	434	* time_lost is an offset from the task/cpu clock, used to make it
	435	* appear that time only passes while the context is scheduled in.
	436	*/
	437	u64 time_now;
	438	u64 time_lost;
0793a61d TG	439	#endif
	440	};
	441
	442	/**
	443	* struct perf_counter_cpu_context - per cpu counter context structure
	444	*/
	445	struct perf_cpu_context {
	446	struct perf_counter_context ctx;
	447	struct perf_counter_context *task_ctx;
	448	int active_oncpu;
	449	int max_pertask;
3b6f9e5c	450	int exclusive;
96f6d444 PZ	451
	452	/*
	453	* Recursion avoidance:
	454	*
	455	* task, softirq, irq, nmi context
	456	*/
	457	int recursion[4];
0793a61d TG	458	};
	459
	460	/*
	461	* Set by architecture code:
	462	*/
	463	extern int perf_max_counters;
	464
	465	#ifdef CONFIG_PERF_COUNTERS
5c92d124	466	extern const struct hw_perf_counter_ops *
621a01ea IM	467	hw_perf_counter_init(struct perf_counter *counter);
621a01ea IM	468
0793a61d TG	469	extern void perf_counter_task_sched_in(struct task_struct *task, int cpu);
	470	extern void perf_counter_task_sched_out(struct task_struct *task, int cpu);
	471	extern void perf_counter_task_tick(struct task_struct *task, int cpu);
9b51f66d IM	472	extern void perf_counter_init_task(struct task_struct *child);
9b51f66d IM	473	extern void perf_counter_exit_task(struct task_struct *child);
925d519a	474	extern void perf_counter_do_pending(void);
0793a61d	475	extern void perf_counter_print_debug(void);
1b023a96	476	extern void perf_counter_unthrottle(void);
01b2838c IM	477	extern u64 hw_perf_save_disable(void);
01b2838c IM	478	extern void hw_perf_restore(u64 ctrl);
1d1c7ddb IM	479	extern int perf_counter_task_disable(void);
1d1c7ddb IM	480	extern int perf_counter_task_enable(void);
3cbed429 PM	481	extern int hw_perf_group_sched_in(struct perf_counter *group_leader,
	482	struct perf_cpu_context *cpuctx,
	483	struct perf_counter_context *ctx, int cpu);
37d81828	484	extern void perf_counter_update_userpage(struct perf_counter *counter);
5c92d124	485
0322cd6e PZ	486	extern void perf_counter_output(struct perf_counter *counter,
0322cd6e PZ	487	int nmi, struct pt_regs *regs);
3b6f9e5c PM	488	/*
	489	* Return 1 for a software counter, 0 for a hardware counter
	490	*/
	491	static inline int is_software_counter(struct perf_counter *counter)
	492	{
f4a2deb4 PZ	493	return !perf_event_raw(&counter->hw_event) &&
f4a2deb4 PZ	494	perf_event_type(&counter->hw_event) != PERF_TYPE_HARDWARE;
3b6f9e5c PM	495	}
3b6f9e5c PM	496
b8e83514	497	extern void perf_swcounter_event(u32, u64, int, struct pt_regs *);
15dbf27c	498
0a4a9391 PZ	499	extern void perf_counter_mmap(unsigned long addr, unsigned long len,
	500	unsigned long pgoff, struct file *file);
	501
	502	extern void perf_counter_munmap(unsigned long addr, unsigned long len,
	503	unsigned long pgoff, struct file *file);
	504
0793a61d TG	505	#else
	506	static inline void
	507	perf_counter_task_sched_in(struct task_struct *task, int cpu) { }
	508	static inline void
	509	perf_counter_task_sched_out(struct task_struct *task, int cpu) { }
	510	static inline void
	511	perf_counter_task_tick(struct task_struct *task, int cpu) { }
9b51f66d IM	512	static inline void perf_counter_init_task(struct task_struct *child) { }
9b51f66d IM	513	static inline void perf_counter_exit_task(struct task_struct *child) { }
925d519a	514	static inline void perf_counter_do_pending(void) { }
0793a61d	515	static inline void perf_counter_print_debug(void) { }
1b023a96	516	static inline void perf_counter_unthrottle(void) { }
15dbf27c	517	static inline void hw_perf_restore(u64 ctrl) { }
01b2838c	518	static inline u64 hw_perf_save_disable(void) { return 0; }
1d1c7ddb IM	519	static inline int perf_counter_task_disable(void) { return -EINVAL; }
1d1c7ddb IM	520	static inline int perf_counter_task_enable(void) { return -EINVAL; }
15dbf27c	521
925d519a PZ	522	static inline void
	523	perf_swcounter_event(u32 event, u64 nr, int nmi, struct pt_regs *regs) { }
	524
0a4a9391 PZ	525
	526	static inline void
	527	perf_counter_mmap(unsigned long addr, unsigned long len,
	528	unsigned long pgoff, struct file *file) { }
	529
	530	static inline void
	531	perf_counter_munmap(unsigned long addr, unsigned long len,
	532	unsigned long pgoff, struct file *file) { }
	533
0793a61d TG	534	#endif
0793a61d TG	535
f3dfd265	536	#endif /* __KERNEL__ */
0793a61d	537	#endif /* _LINUX_PERF_COUNTER_H */