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[PATCH] PCI: Add pci_walk_bus function to PCI core (nonrecursive)
[net-next-2.6.git] / include / linux / pci.h
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1da177e4
LT		 1/*
2 * pci.h
3 *
4 * PCI defines and function prototypes
5 * Copyright 1994, Drew Eckhardt
6 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
7 *
8 * For more information, please consult the following manuals (look at
9 * http://www.pcisig.com/ for how to get them):
10 *
11 * PCI BIOS Specification
12 * PCI Local Bus Specification
13 * PCI to PCI Bridge Specification
14 * PCI System Design Guide
15 */
16
17#ifndef LINUX_PCI_H
18#define LINUX_PCI_H
19
20#include <linux/mod_devicetable.h>
21
4352dfd5
GKH		 22/* Include the pci register defines */
23#include <linux/pci_regs.h>
1da177e4
LT		 24
25/* Include the ID list */
1da177e4
LT		 26#include <linux/pci_ids.h>
27
28/*
29 * The PCI interface treats multi-function devices as independent
30 * devices. The slot/function address of each device is encoded
31 * in a single byte as follows:
32 *
33 * 7:3 = slot
34 * 2:0 = function
35 */
36#define PCI_DEVFN(slot,func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
37#define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
38#define PCI_FUNC(devfn) ((devfn) & 0x07)
39
40/* Ioctls for /proc/bus/pci/X/Y nodes. */
41#define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)
42#define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */
43#define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */
44#define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */
45#define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */
46
47#ifdef __KERNEL__
48
49#include <linux/types.h>
50#include <linux/config.h>
51#include <linux/ioport.h>
52#include <linux/list.h>
53#include <linux/errno.h>
54#include <linux/device.h>
55
56/* File state for mmap()s on /proc/bus/pci/X/Y */
57enum pci_mmap_state {
58 pci_mmap_io,
59 pci_mmap_mem
60};
61
62/* This defines the direction arg to the DMA mapping routines. */
63#define PCI_DMA_BIDIRECTIONAL 0
64#define PCI_DMA_TODEVICE 1
65#define PCI_DMA_FROMDEVICE 2
66#define PCI_DMA_NONE 3
67
68#define DEVICE_COUNT_COMPATIBLE 4
69#define DEVICE_COUNT_RESOURCE 12
70
71typedef int __bitwise pci_power_t;
72
4352dfd5
GKH		 73#define PCI_D0 ((pci_power_t __force) 0)
74#define PCI_D1 ((pci_power_t __force) 1)
75#define PCI_D2 ((pci_power_t __force) 2)
1da177e4
LT		 76#define PCI_D3hot ((pci_power_t __force) 3)
77#define PCI_D3cold ((pci_power_t __force) 4)
438510f6 78#define PCI_POWER_ERROR ((pci_power_t __force) -1)
1da177e4
LT		 79
80/*
81 * The pci_dev structure is used to describe PCI devices.
82 */
83struct pci_dev {
84 struct list_head global_list; /* node in list of all PCI devices */
85 struct list_head bus_list; /* node in per-bus list */
86 struct pci_bus *bus; /* bus this device is on */
87 struct pci_bus *subordinate; /* bus this device bridges to */
88
89 void *sysdata; /* hook for sys-specific extension */
90 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
91
92 unsigned int devfn; /* encoded device & function index */
93 unsigned short vendor;
94 unsigned short device;
95 unsigned short subsystem_vendor;
96 unsigned short subsystem_device;
97 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
98 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
99 u8 rom_base_reg; /* which config register controls the ROM */
100
101 struct pci_driver *driver; /* which driver has allocated this device */
102 u64 dma_mask; /* Mask of the bits of bus address this
103 device implements. Normally this is
104 0xffffffff. You only need to change
105 this if your device has broken DMA
106 or supports 64-bit transfers. */
107
108 pci_power_t current_state; /* Current operating state. In ACPI-speak,
109 this is D0-D3, D0 being fully functional,
110 and D3 being off. */
111
112 struct device dev; /* Generic device interface */
113
114 /* device is compatible with these IDs */
115 unsigned short vendor_compatible[DEVICE_COUNT_COMPATIBLE];
116 unsigned short device_compatible[DEVICE_COUNT_COMPATIBLE];
117
118 int cfg_size; /* Size of configuration space */
119
120 /*
121 * Instead of touching interrupt line and base address registers
122 * directly, use the values stored here. They might be different!
123 */
124 unsigned int irq;
125 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
126
127 /* These fields are used by common fixups */
128 unsigned int transparent:1; /* Transparent PCI bridge */
129 unsigned int multifunction:1;/* Part of multi-function device */
130 /* keep track of device state */
131 unsigned int is_enabled:1; /* pci_enable_device has been called */
132 unsigned int is_busmaster:1; /* device is busmaster */
4602b88d
KA		 133 unsigned int no_msi:1; /* device may not use msi */
134
1da177e4
LT		 135 u32 saved_config_space[16]; /* config space saved at suspend time */
136 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
137 int rom_attr_enabled; /* has display of the rom attribute been enabled? */
138 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
1da177e4
LT		 139};
140
141#define pci_dev_g(n) list_entry(n, struct pci_dev, global_list)
142#define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)
143#define to_pci_dev(n) container_of(n, struct pci_dev, dev)
144#define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
145
146/*
147 * For PCI devices, the region numbers are assigned this way:
148 *
149 * 0-5 standard PCI regions
150 * 6 expansion ROM
151 * 7-10 bridges: address space assigned to buses behind the bridge
152 */
153
4352dfd5
GKH		 154#define PCI_ROM_RESOURCE 6
155#define PCI_BRIDGE_RESOURCES 7
156#define PCI_NUM_RESOURCES 11
1da177e4
LT		 157
158#ifndef PCI_BUS_NUM_RESOURCES
4352dfd5 159#define PCI_BUS_NUM_RESOURCES 8
1da177e4 160#endif
4352dfd5
GKH		 161
162#define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
1da177e4
LT		 163
164struct pci_bus {
165 struct list_head node; /* node in list of buses */
166 struct pci_bus *parent; /* parent bus this bridge is on */
167 struct list_head children; /* list of child buses */
168 struct list_head devices; /* list of devices on this bus */
169 struct pci_dev *self; /* bridge device as seen by parent */
170 struct resource *resource[PCI_BUS_NUM_RESOURCES];
171 /* address space routed to this bus */
172
173 struct pci_ops *ops; /* configuration access functions */
174 void *sysdata; /* hook for sys-specific extension */
175 struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
176
177 unsigned char number; /* bus number */
178 unsigned char primary; /* number of primary bridge */
179 unsigned char secondary; /* number of secondary bridge */
180 unsigned char subordinate; /* max number of subordinate buses */
181
182 char name[48];
183
184 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */
185 unsigned short pad2;
186 struct device *bridge;
187 struct class_device class_dev;
188 struct bin_attribute *legacy_io; /* legacy I/O for this bus */
189 struct bin_attribute *legacy_mem; /* legacy mem */
190};
191
192#define pci_bus_b(n) list_entry(n, struct pci_bus, node)
193#define to_pci_bus(n) container_of(n, struct pci_bus, class_dev)
194
195/*
196 * Error values that may be returned by PCI functions.
197 */
198#define PCIBIOS_SUCCESSFUL 0x00
199#define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
200#define PCIBIOS_BAD_VENDOR_ID 0x83
201#define PCIBIOS_DEVICE_NOT_FOUND 0x86
202#define PCIBIOS_BAD_REGISTER_NUMBER 0x87
203#define PCIBIOS_SET_FAILED 0x88
204#define PCIBIOS_BUFFER_TOO_SMALL 0x89
205
206/* Low-level architecture-dependent routines */
207
208struct pci_ops {
209 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
210 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
211};
212
213struct pci_raw_ops {
214 int (*read)(unsigned int domain, unsigned int bus, unsigned int devfn,
215 int reg, int len, u32 *val);
216 int (*write)(unsigned int domain, unsigned int bus, unsigned int devfn,
217 int reg, int len, u32 val);
218};
219
220extern struct pci_raw_ops *raw_pci_ops;
221
222struct pci_bus_region {
223 unsigned long start;
224 unsigned long end;
225};
226
227struct pci_dynids {
228 spinlock_t lock; /* protects list, index */
229 struct list_head list; /* for IDs added at runtime */
230 unsigned int use_driver_data:1; /* pci_driver->driver_data is used */
231};
232
233struct module;
234struct pci_driver {
235 struct list_head node;
236 char *name;
237 struct module *owner;
238 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */
239 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
240 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
241 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
242 int (*resume) (struct pci_dev *dev); /* Device woken up */
438510f6 243 int (*enable_wake) (struct pci_dev *dev, pci_power_t state, int enable); /* Enable wake event */
c8958177 244 void (*shutdown) (struct pci_dev *dev);
1da177e4
LT		 245
246 struct device_driver driver;
247 struct pci_dynids dynids;
248};
249
250#define to_pci_driver(drv) container_of(drv,struct pci_driver, driver)
251
252/**
253 * PCI_DEVICE - macro used to describe a specific pci device
254 * @vend: the 16 bit PCI Vendor ID
255 * @dev: the 16 bit PCI Device ID
256 *
257 * This macro is used to create a struct pci_device_id that matches a
258 * specific device. The subvendor and subdevice fields will be set to
259 * PCI_ANY_ID.
260 */
261#define PCI_DEVICE(vend,dev) \
262 .vendor = (vend), .device = (dev), \
263 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
264
265/**
266 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
267 * @dev_class: the class, subclass, prog-if triple for this device
268 * @dev_class_mask: the class mask for this device
269 *
270 * This macro is used to create a struct pci_device_id that matches a
4352dfd5 271 * specific PCI class. The vendor, device, subvendor, and subdevice
1da177e4
LT		 272 * fields will be set to PCI_ANY_ID.
273 */
274#define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
275 .class = (dev_class), .class_mask = (dev_class_mask), \
276 .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
277 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
278
4352dfd5 279/*
1da177e4
LT		 280 * pci_module_init is obsolete, this stays here till we fix up all usages of it
281 * in the tree.
282 */
283#define pci_module_init pci_register_driver
284
285/* these external functions are only available when PCI support is enabled */
286#ifdef CONFIG_PCI
287
288extern struct bus_type pci_bus_type;
289
290/* Do NOT directly access these two variables, unless you are arch specific pci
291 * code, or pci core code. */
292extern struct list_head pci_root_buses; /* list of all known PCI buses */
293extern struct list_head pci_devices; /* list of all devices */
294
295void pcibios_fixup_bus(struct pci_bus *);
296int pcibios_enable_device(struct pci_dev *, int mask);
297char *pcibios_setup (char *str);
298
299/* Used only when drivers/pci/setup.c is used */
300void pcibios_align_resource(void *, struct resource *,
301 unsigned long, unsigned long);
302void pcibios_update_irq(struct pci_dev *, int irq);
303
304/* Generic PCI functions used internally */
305
306extern struct pci_bus *pci_find_bus(int domain, int busnr);
c431ada4 307void pci_bus_add_devices(struct pci_bus *bus);
1da177e4
LT		 308struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);
309static inline struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata)
310{
c431ada4
RS		 311 struct pci_bus *root_bus;
312 root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);
313 if (root_bus)
314 pci_bus_add_devices(root_bus);
315 return root_bus;
1da177e4
LT		 316}
317int pci_scan_slot(struct pci_bus *bus, int devfn);
318struct pci_dev * pci_scan_single_device(struct pci_bus *bus, int devfn);
319unsigned int pci_scan_child_bus(struct pci_bus *bus);
320void pci_bus_add_device(struct pci_dev *dev);
1da177e4
LT		 321void pci_read_bridge_bases(struct pci_bus *child);
322struct resource *pci_find_parent_resource(const struct pci_dev *dev, struct resource *res);
323int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
324extern struct pci_dev *pci_dev_get(struct pci_dev *dev);
325extern void pci_dev_put(struct pci_dev *dev);
326extern void pci_remove_bus(struct pci_bus *b);
327extern void pci_remove_bus_device(struct pci_dev *dev);
328
329/* Generic PCI functions exported to card drivers */
330
331struct pci_dev *pci_find_device (unsigned int vendor, unsigned int device, const struct pci_dev *from);
332struct pci_dev *pci_find_device_reverse (unsigned int vendor, unsigned int device, const struct pci_dev *from);
333struct pci_dev *pci_find_slot (unsigned int bus, unsigned int devfn);
334int pci_find_capability (struct pci_dev *dev, int cap);
335int pci_find_ext_capability (struct pci_dev *dev, int cap);
336struct pci_bus * pci_find_next_bus(const struct pci_bus *from);
337
338struct pci_dev *pci_get_device (unsigned int vendor, unsigned int device, struct pci_dev *from);
339struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,
340 unsigned int ss_vendor, unsigned int ss_device,
341 struct pci_dev *from);
342struct pci_dev *pci_get_slot (struct pci_bus *bus, unsigned int devfn);
343struct pci_dev *pci_get_class (unsigned int class, struct pci_dev *from);
344int pci_dev_present(const struct pci_device_id *ids);
345
346int pci_bus_read_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 *val);
347int pci_bus_read_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 *val);
348int pci_bus_read_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 *val);
349int pci_bus_write_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 val);
350int pci_bus_write_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 val);
351int pci_bus_write_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 val);
352
353static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)
354{
355 return pci_bus_read_config_byte (dev->bus, dev->devfn, where, val);
356}
357static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val)
358{
359 return pci_bus_read_config_word (dev->bus, dev->devfn, where, val);
360}
361static inline int pci_read_config_dword(struct pci_dev *dev, int where, u32 *val)
362{
363 return pci_bus_read_config_dword (dev->bus, dev->devfn, where, val);
364}
365static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val)
366{
367 return pci_bus_write_config_byte (dev->bus, dev->devfn, where, val);
368}
369static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val)
370{
371 return pci_bus_write_config_word (dev->bus, dev->devfn, where, val);
372}
373static inline int pci_write_config_dword(struct pci_dev *dev, int where, u32 val)
374{
375 return pci_bus_write_config_dword (dev->bus, dev->devfn, where, val);
376}
377
378int pci_enable_device(struct pci_dev *dev);
379int pci_enable_device_bars(struct pci_dev *dev, int mask);
380void pci_disable_device(struct pci_dev *dev);
381void pci_set_master(struct pci_dev *dev);
382#define HAVE_PCI_SET_MWI
383int pci_set_mwi(struct pci_dev *dev);
384void pci_clear_mwi(struct pci_dev *dev);
385int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
1da177e4 386int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
064b53db 387void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno);
1da177e4 388int pci_assign_resource(struct pci_dev *dev, int i);
064b53db 389void pci_restore_bars(struct pci_dev *dev);
1da177e4
LT		 390
391/* ROM control related routines */
392void __iomem *pci_map_rom(struct pci_dev *pdev, size_t *size);
393void __iomem *pci_map_rom_copy(struct pci_dev *pdev, size_t *size);
394void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
395void pci_remove_rom(struct pci_dev *pdev);
396
397/* Power management related routines */
398int pci_save_state(struct pci_dev *dev);
399int pci_restore_state(struct pci_dev *dev);
400int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
401pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
402int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
403
404/* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
405void pci_bus_assign_resources(struct pci_bus *bus);
406void pci_bus_size_bridges(struct pci_bus *bus);
407int pci_claim_resource(struct pci_dev *, int);
408void pci_assign_unassigned_resources(void);
409void pdev_enable_device(struct pci_dev *);
410void pdev_sort_resources(struct pci_dev *, struct resource_list *);
411void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
412 int (*)(struct pci_dev *, u8, u8));
413#define HAVE_PCI_REQ_REGIONS 2
414int pci_request_regions(struct pci_dev *, char *);
415void pci_release_regions(struct pci_dev *);
416int pci_request_region(struct pci_dev *, int, char *);
417void pci_release_region(struct pci_dev *, int);
418
419/* drivers/pci/bus.c */
420int pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res,
421 unsigned long size, unsigned long align,
422 unsigned long min, unsigned int type_mask,
423 void (*alignf)(void *, struct resource *,
424 unsigned long, unsigned long),
425 void *alignf_data);
426void pci_enable_bridges(struct pci_bus *bus);
427
428/* New-style probing supporting hot-pluggable devices */
429int pci_register_driver(struct pci_driver *);
430void pci_unregister_driver(struct pci_driver *);
431void pci_remove_behind_bridge(struct pci_dev *);
432struct pci_driver *pci_dev_driver(const struct pci_dev *);
75865858
GKH		 433const struct pci_device_id *pci_match_device(struct pci_driver *drv, struct pci_dev *dev);
434const struct pci_device_id *pci_match_id(const struct pci_device_id *ids, struct pci_dev *dev);
1da177e4
LT		 435int pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max, int pass);
436
cecf4864
PM		 437void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *),
438 void *userdata);
439
1da177e4
LT		 440/* kmem_cache style wrapper around pci_alloc_consistent() */
441
442#include <linux/dmapool.h>
443
444#define pci_pool dma_pool
445#define pci_pool_create(name, pdev, size, align, allocation) \
446 dma_pool_create(name, &pdev->dev, size, align, allocation)
447#define pci_pool_destroy(pool) dma_pool_destroy(pool)
448#define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
449#define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
450
e24c2d96
DM		 451enum pci_dma_burst_strategy {
452 PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
453 strategy_parameter is N/A */
454 PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
455 byte boundaries */
456 PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
457 strategy_parameter byte boundaries */
458};
459
1da177e4
LT		 460#if defined(CONFIG_ISA) || defined(CONFIG_EISA)
461extern struct pci_dev *isa_bridge;
462#endif
463
464struct msix_entry {
465 u16 vector; /* kernel uses to write allocated vector */
466 u16 entry; /* driver uses to specify entry, OS writes */
467};
468
469#ifndef CONFIG_PCI_MSI
470static inline void pci_scan_msi_device(struct pci_dev *dev) {}
471static inline int pci_enable_msi(struct pci_dev *dev) {return -1;}
472static inline void pci_disable_msi(struct pci_dev *dev) {}
473static inline int pci_enable_msix(struct pci_dev* dev,
474 struct msix_entry *entries, int nvec) {return -1;}
475static inline void pci_disable_msix(struct pci_dev *dev) {}
476static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev) {}
477#else
478extern void pci_scan_msi_device(struct pci_dev *dev);
479extern int pci_enable_msi(struct pci_dev *dev);
480extern void pci_disable_msi(struct pci_dev *dev);
481extern int pci_enable_msix(struct pci_dev* dev,
482 struct msix_entry *entries, int nvec);
483extern void pci_disable_msix(struct pci_dev *dev);
484extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
485#endif
486
4352dfd5
GKH		 487/*
488 * PCI domain support. Sometimes called PCI segment (eg by ACPI),
489 * a PCI domain is defined to be a set of PCI busses which share
490 * configuration space.
491 */
492#ifndef CONFIG_PCI_DOMAINS
493static inline int pci_domain_nr(struct pci_bus *bus) { return 0; }
494static inline int pci_proc_domain(struct pci_bus *bus)
495{
496 return 0;
497}
498#endif
1da177e4 499
4352dfd5 500#else /* CONFIG_PCI is not enabled */
1da177e4
LT		 501
502/*
503 * If the system does not have PCI, clearly these return errors. Define
504 * these as simple inline functions to avoid hair in drivers.
505 */
506
1da177e4
LT		 507#define _PCI_NOP(o,s,t) \
508 static inline int pci_##o##_config_##s (struct pci_dev *dev, int where, t val) \
509 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
510#define _PCI_NOP_ALL(o,x) _PCI_NOP(o,byte,u8 x) \
511 _PCI_NOP(o,word,u16 x) \
512 _PCI_NOP(o,dword,u32 x)
513_PCI_NOP_ALL(read, *)
514_PCI_NOP_ALL(write,)
515
516static inline struct pci_dev *pci_find_device(unsigned int vendor, unsigned int device, const struct pci_dev *from)
517{ return NULL; }
518
519static inline struct pci_dev *pci_find_slot(unsigned int bus, unsigned int devfn)
520{ return NULL; }
521
522static inline struct pci_dev *pci_get_device (unsigned int vendor, unsigned int device, struct pci_dev *from)
523{ return NULL; }
524
525static inline struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,
526unsigned int ss_vendor, unsigned int ss_device, struct pci_dev *from)
527{ return NULL; }
528
529static inline struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from)
530{ return NULL; }
531
532#define pci_dev_present(ids) (0)
533#define pci_dev_put(dev) do { } while (0)
534
535static inline void pci_set_master(struct pci_dev *dev) { }
536static inline int pci_enable_device(struct pci_dev *dev) { return -EIO; }
537static inline void pci_disable_device(struct pci_dev *dev) { }
538static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask) { return -EIO; }
1da177e4
LT		 539static inline int pci_assign_resource(struct pci_dev *dev, int i) { return -EBUSY;}
540static inline int pci_register_driver(struct pci_driver *drv) { return 0;}
541static inline void pci_unregister_driver(struct pci_driver *drv) { }
542static inline int pci_find_capability (struct pci_dev *dev, int cap) {return 0; }
543static inline int pci_find_ext_capability (struct pci_dev *dev, int cap) {return 0; }
544static inline const struct pci_device_id *pci_match_device(const struct pci_device_id *ids, const struct pci_dev *dev) { return NULL; }
545
546/* Power management related routines */
547static inline int pci_save_state(struct pci_dev *dev) { return 0; }
548static inline int pci_restore_state(struct pci_dev *dev) { return 0; }
549static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state) { return 0; }
438510f6 550static inline pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state) { return PCI_D0; }
1da177e4
LT		 551static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable) { return 0; }
552
553#define isa_bridge ((struct pci_dev *)NULL)
554
a46e8126
KG		 555#define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
556
4352dfd5 557#endif /* CONFIG_PCI */
1da177e4 558
4352dfd5
GKH		 559/* Include architecture-dependent settings and functions */
560
561#include <asm/pci.h>
1da177e4
LT		 562
563/* these helpers provide future and backwards compatibility
564 * for accessing popular PCI BAR info */
565#define pci_resource_start(dev,bar) ((dev)->resource[(bar)].start)
566#define pci_resource_end(dev,bar) ((dev)->resource[(bar)].end)
567#define pci_resource_flags(dev,bar) ((dev)->resource[(bar)].flags)
568#define pci_resource_len(dev,bar) \
569 ((pci_resource_start((dev),(bar)) == 0 && \
570 pci_resource_end((dev),(bar)) == \
571 pci_resource_start((dev),(bar))) ? 0 : \
572 \
573 (pci_resource_end((dev),(bar)) - \
574 pci_resource_start((dev),(bar)) + 1))
575
576/* Similar to the helpers above, these manipulate per-pci_dev
577 * driver-specific data. They are really just a wrapper around
578 * the generic device structure functions of these calls.
579 */
580static inline void *pci_get_drvdata (struct pci_dev *pdev)
581{
582 return dev_get_drvdata(&pdev->dev);
583}
584
585static inline void pci_set_drvdata (struct pci_dev *pdev, void *data)
586{
587 dev_set_drvdata(&pdev->dev, data);
588}
589
590/* If you want to know what to call your pci_dev, ask this function.
591 * Again, it's a wrapper around the generic device.
592 */
593static inline char *pci_name(struct pci_dev *pdev)
594{
595 return pdev->dev.bus_id;
596}
597
2311b1f2
ME		 598
599/* Some archs don't want to expose struct resource to userland as-is
600 * in sysfs and /proc
601 */
602#ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
603static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
604 const struct resource *rsrc, u64 *start, u64 *end)
605{
606 *start = rsrc->start;
607 *end = rsrc->end;
608}
609#endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
610
611
1da177e4
LT		 612/*
613 * The world is not perfect and supplies us with broken PCI devices.
614 * For at least a part of these bugs we need a work-around, so both
615 * generic (drivers/pci/quirks.c) and per-architecture code can define
616 * fixup hooks to be called for particular buggy devices.
617 */
618
619struct pci_fixup {
620 u16 vendor, device; /* You can use PCI_ANY_ID here of course */
621 void (*hook)(struct pci_dev *dev);
622};
623
624enum pci_fixup_pass {
625 pci_fixup_early, /* Before probing BARs */
626 pci_fixup_header, /* After reading configuration header */
627 pci_fixup_final, /* Final phase of device fixups */
628 pci_fixup_enable, /* pci_enable_device() time */
629};
630
631/* Anonymous variables would be nice... */
632#define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook) \
74d863ee 633 static const struct pci_fixup __pci_fixup_##name __attribute_used__ \
1da177e4
LT		 634 __attribute__((__section__(#section))) = { vendor, device, hook };
635#define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \
636 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
637 vendor##device##hook, vendor, device, hook)
638#define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \
639 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
640 vendor##device##hook, vendor, device, hook)
641#define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \
642 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
643 vendor##device##hook, vendor, device, hook)
644#define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \
645 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
646 vendor##device##hook, vendor, device, hook)
647
648
649void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
650
651extern int pci_pci_problems;
652#define PCIPCI_FAIL 1
653#define PCIPCI_TRITON 2
654#define PCIPCI_NATOMA 4
655#define PCIPCI_VIAETBF 8
656#define PCIPCI_VSFX 16
657#define PCIPCI_ALIMAGIK 32
658
659#endif /* __KERNEL__ */
660#endif /* LINUX_PCI_H */
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