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[net-next-2.6.git] / include / linux / pci.h
CommitLineData
1da177e4
LT		 1/*
2 * pci.h
3 *
4 * PCI defines and function prototypes
5 * Copyright 1994, Drew Eckhardt
6 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
7 *
8 * For more information, please consult the following manuals (look at
9 * http://www.pcisig.com/ for how to get them):
10 *
11 * PCI BIOS Specification
12 * PCI Local Bus Specification
13 * PCI to PCI Bridge Specification
14 * PCI System Design Guide
15 */
16
17#ifndef LINUX_PCI_H
18#define LINUX_PCI_H
19
20#include <linux/mod_devicetable.h>
21
4352dfd5
GKH		 22/* Include the pci register defines */
23#include <linux/pci_regs.h>
1da177e4
LT		 24
25/* Include the ID list */
1da177e4
LT		 26#include <linux/pci_ids.h>
27
28/*
29 * The PCI interface treats multi-function devices as independent
30 * devices. The slot/function address of each device is encoded
31 * in a single byte as follows:
32 *
33 * 7:3 = slot
34 * 2:0 = function
35 */
36#define PCI_DEVFN(slot,func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
37#define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
38#define PCI_FUNC(devfn) ((devfn) & 0x07)
39
40/* Ioctls for /proc/bus/pci/X/Y nodes. */
41#define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)
42#define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */
43#define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */
44#define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */
45#define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */
46
47#ifdef __KERNEL__
48
49#include <linux/types.h>
50#include <linux/config.h>
51#include <linux/ioport.h>
52#include <linux/list.h>
53#include <linux/errno.h>
54#include <linux/device.h>
55
56/* File state for mmap()s on /proc/bus/pci/X/Y */
57enum pci_mmap_state {
58 pci_mmap_io,
59 pci_mmap_mem
60};
61
62/* This defines the direction arg to the DMA mapping routines. */
63#define PCI_DMA_BIDIRECTIONAL 0
64#define PCI_DMA_TODEVICE 1
65#define PCI_DMA_FROMDEVICE 2
66#define PCI_DMA_NONE 3
67
68#define DEVICE_COUNT_COMPATIBLE 4
69#define DEVICE_COUNT_RESOURCE 12
70
71typedef int __bitwise pci_power_t;
72
4352dfd5
GKH		 73#define PCI_D0 ((pci_power_t __force) 0)
74#define PCI_D1 ((pci_power_t __force) 1)
75#define PCI_D2 ((pci_power_t __force) 2)
1da177e4
LT		 76#define PCI_D3hot ((pci_power_t __force) 3)
77#define PCI_D3cold ((pci_power_t __force) 4)
3fe9d19f 78#define PCI_UNKNOWN ((pci_power_t __force) 5)
438510f6 79#define PCI_POWER_ERROR ((pci_power_t __force) -1)
1da177e4
LT		 80
81/*
82 * The pci_dev structure is used to describe PCI devices.
83 */
84struct pci_dev {
85 struct list_head global_list; /* node in list of all PCI devices */
86 struct list_head bus_list; /* node in per-bus list */
87 struct pci_bus *bus; /* bus this device is on */
88 struct pci_bus *subordinate; /* bus this device bridges to */
89
90 void *sysdata; /* hook for sys-specific extension */
91 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
92
93 unsigned int devfn; /* encoded device & function index */
94 unsigned short vendor;
95 unsigned short device;
96 unsigned short subsystem_vendor;
97 unsigned short subsystem_device;
98 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
99 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
100 u8 rom_base_reg; /* which config register controls the ROM */
101
102 struct pci_driver *driver; /* which driver has allocated this device */
103 u64 dma_mask; /* Mask of the bits of bus address this
104 device implements. Normally this is
105 0xffffffff. You only need to change
106 this if your device has broken DMA
107 or supports 64-bit transfers. */
108
109 pci_power_t current_state; /* Current operating state. In ACPI-speak,
110 this is D0-D3, D0 being fully functional,
111 and D3 being off. */
112
113 struct device dev; /* Generic device interface */
114
115 /* device is compatible with these IDs */
116 unsigned short vendor_compatible[DEVICE_COUNT_COMPATIBLE];
117 unsigned short device_compatible[DEVICE_COUNT_COMPATIBLE];
118
119 int cfg_size; /* Size of configuration space */
120
121 /*
122 * Instead of touching interrupt line and base address registers
123 * directly, use the values stored here. They might be different!
124 */
125 unsigned int irq;
126 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
127
128 /* These fields are used by common fixups */
129 unsigned int transparent:1; /* Transparent PCI bridge */
130 unsigned int multifunction:1;/* Part of multi-function device */
131 /* keep track of device state */
132 unsigned int is_enabled:1; /* pci_enable_device has been called */
133 unsigned int is_busmaster:1; /* device is busmaster */
4602b88d 134 unsigned int no_msi:1; /* device may not use msi */
e04b0ea2 135 unsigned int block_ucfg_access:1; /* userspace config space access is blocked */
4602b88d 136
1da177e4
LT		 137 u32 saved_config_space[16]; /* config space saved at suspend time */
138 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
139 int rom_attr_enabled; /* has display of the rom attribute been enabled? */
140 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
1da177e4
LT		 141};
142
143#define pci_dev_g(n) list_entry(n, struct pci_dev, global_list)
144#define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)
145#define to_pci_dev(n) container_of(n, struct pci_dev, dev)
146#define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
147
148/*
149 * For PCI devices, the region numbers are assigned this way:
150 *
151 * 0-5 standard PCI regions
152 * 6 expansion ROM
153 * 7-10 bridges: address space assigned to buses behind the bridge
154 */
155
4352dfd5
GKH		 156#define PCI_ROM_RESOURCE 6
157#define PCI_BRIDGE_RESOURCES 7
158#define PCI_NUM_RESOURCES 11
1da177e4
LT		 159
160#ifndef PCI_BUS_NUM_RESOURCES
4352dfd5 161#define PCI_BUS_NUM_RESOURCES 8
1da177e4 162#endif
4352dfd5
GKH		 163
164#define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
1da177e4
LT		 165
166struct pci_bus {
167 struct list_head node; /* node in list of buses */
168 struct pci_bus *parent; /* parent bus this bridge is on */
169 struct list_head children; /* list of child buses */
170 struct list_head devices; /* list of devices on this bus */
171 struct pci_dev *self; /* bridge device as seen by parent */
172 struct resource *resource[PCI_BUS_NUM_RESOURCES];
173 /* address space routed to this bus */
174
175 struct pci_ops *ops; /* configuration access functions */
176 void *sysdata; /* hook for sys-specific extension */
177 struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
178
179 unsigned char number; /* bus number */
180 unsigned char primary; /* number of primary bridge */
181 unsigned char secondary; /* number of secondary bridge */
182 unsigned char subordinate; /* max number of subordinate buses */
183
184 char name[48];
185
186 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */
187 unsigned short pad2;
188 struct device *bridge;
189 struct class_device class_dev;
190 struct bin_attribute *legacy_io; /* legacy I/O for this bus */
191 struct bin_attribute *legacy_mem; /* legacy mem */
192};
193
194#define pci_bus_b(n) list_entry(n, struct pci_bus, node)
195#define to_pci_bus(n) container_of(n, struct pci_bus, class_dev)
196
197/*
198 * Error values that may be returned by PCI functions.
199 */
200#define PCIBIOS_SUCCESSFUL 0x00
201#define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
202#define PCIBIOS_BAD_VENDOR_ID 0x83
203#define PCIBIOS_DEVICE_NOT_FOUND 0x86
204#define PCIBIOS_BAD_REGISTER_NUMBER 0x87
205#define PCIBIOS_SET_FAILED 0x88
206#define PCIBIOS_BUFFER_TOO_SMALL 0x89
207
208/* Low-level architecture-dependent routines */
209
210struct pci_ops {
211 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
212 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
213};
214
215struct pci_raw_ops {
216 int (*read)(unsigned int domain, unsigned int bus, unsigned int devfn,
217 int reg, int len, u32 *val);
218 int (*write)(unsigned int domain, unsigned int bus, unsigned int devfn,
219 int reg, int len, u32 val);
220};
221
222extern struct pci_raw_ops *raw_pci_ops;
223
224struct pci_bus_region {
225 unsigned long start;
226 unsigned long end;
227};
228
229struct pci_dynids {
230 spinlock_t lock; /* protects list, index */
231 struct list_head list; /* for IDs added at runtime */
232 unsigned int use_driver_data:1; /* pci_driver->driver_data is used */
233};
234
235struct module;
236struct pci_driver {
237 struct list_head node;
238 char *name;
1da177e4
LT		 239 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */
240 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
241 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
242 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
243 int (*resume) (struct pci_dev *dev); /* Device woken up */
438510f6 244 int (*enable_wake) (struct pci_dev *dev, pci_power_t state, int enable); /* Enable wake event */
c8958177 245 void (*shutdown) (struct pci_dev *dev);
1da177e4
LT		 246
247 struct device_driver driver;
248 struct pci_dynids dynids;
249};
250
251#define to_pci_driver(drv) container_of(drv,struct pci_driver, driver)
252
253/**
254 * PCI_DEVICE - macro used to describe a specific pci device
255 * @vend: the 16 bit PCI Vendor ID
256 * @dev: the 16 bit PCI Device ID
257 *
258 * This macro is used to create a struct pci_device_id that matches a
259 * specific device. The subvendor and subdevice fields will be set to
260 * PCI_ANY_ID.
261 */
262#define PCI_DEVICE(vend,dev) \
263 .vendor = (vend), .device = (dev), \
264 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
265
266/**
267 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
268 * @dev_class: the class, subclass, prog-if triple for this device
269 * @dev_class_mask: the class mask for this device
270 *
271 * This macro is used to create a struct pci_device_id that matches a
4352dfd5 272 * specific PCI class. The vendor, device, subvendor, and subdevice
1da177e4
LT		 273 * fields will be set to PCI_ANY_ID.
274 */
275#define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
276 .class = (dev_class), .class_mask = (dev_class_mask), \
277 .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
278 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
279
4352dfd5 280/*
1da177e4
LT		 281 * pci_module_init is obsolete, this stays here till we fix up all usages of it
282 * in the tree.
283 */
284#define pci_module_init pci_register_driver
285
286/* these external functions are only available when PCI support is enabled */
287#ifdef CONFIG_PCI
288
289extern struct bus_type pci_bus_type;
290
291/* Do NOT directly access these two variables, unless you are arch specific pci
292 * code, or pci core code. */
293extern struct list_head pci_root_buses; /* list of all known PCI buses */
294extern struct list_head pci_devices; /* list of all devices */
295
296void pcibios_fixup_bus(struct pci_bus *);
297int pcibios_enable_device(struct pci_dev *, int mask);
298char *pcibios_setup (char *str);
299
300/* Used only when drivers/pci/setup.c is used */
301void pcibios_align_resource(void *, struct resource *,
302 unsigned long, unsigned long);
303void pcibios_update_irq(struct pci_dev *, int irq);
304
305/* Generic PCI functions used internally */
306
307extern struct pci_bus *pci_find_bus(int domain, int busnr);
c431ada4 308void pci_bus_add_devices(struct pci_bus *bus);
1da177e4
LT		 309struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);
310static inline struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata)
311{
c431ada4
RS		 312 struct pci_bus *root_bus;
313 root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);
314 if (root_bus)
315 pci_bus_add_devices(root_bus);
316 return root_bus;
1da177e4 317}
cdb9b9f7
PM		 318struct pci_bus *pci_create_bus(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);
319struct pci_bus * pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, int busnr);
1da177e4
LT		 320int pci_scan_slot(struct pci_bus *bus, int devfn);
321struct pci_dev * pci_scan_single_device(struct pci_bus *bus, int devfn);
cdb9b9f7 322void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
1da177e4
LT		 323unsigned int pci_scan_child_bus(struct pci_bus *bus);
324void pci_bus_add_device(struct pci_dev *dev);
1da177e4
LT		 325void pci_read_bridge_bases(struct pci_bus *child);
326struct resource *pci_find_parent_resource(const struct pci_dev *dev, struct resource *res);
327int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
328extern struct pci_dev *pci_dev_get(struct pci_dev *dev);
329extern void pci_dev_put(struct pci_dev *dev);
330extern void pci_remove_bus(struct pci_bus *b);
331extern void pci_remove_bus_device(struct pci_dev *dev);
b3743fa4 332void pci_setup_cardbus(struct pci_bus *bus);
1da177e4
LT		 333
334/* Generic PCI functions exported to card drivers */
335
336struct pci_dev *pci_find_device (unsigned int vendor, unsigned int device, const struct pci_dev *from);
337struct pci_dev *pci_find_device_reverse (unsigned int vendor, unsigned int device, const struct pci_dev *from);
338struct pci_dev *pci_find_slot (unsigned int bus, unsigned int devfn);
339int pci_find_capability (struct pci_dev *dev, int cap);
24a4e377 340int pci_find_next_capability (struct pci_dev *dev, u8 pos, int cap);
1da177e4
LT		 341int pci_find_ext_capability (struct pci_dev *dev, int cap);
342struct pci_bus * pci_find_next_bus(const struct pci_bus *from);
343
344struct pci_dev *pci_get_device (unsigned int vendor, unsigned int device, struct pci_dev *from);
345struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,
346 unsigned int ss_vendor, unsigned int ss_device,
347 struct pci_dev *from);
348struct pci_dev *pci_get_slot (struct pci_bus *bus, unsigned int devfn);
349struct pci_dev *pci_get_class (unsigned int class, struct pci_dev *from);
350int pci_dev_present(const struct pci_device_id *ids);
351
352int pci_bus_read_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 *val);
353int pci_bus_read_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 *val);
354int pci_bus_read_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 *val);
355int pci_bus_write_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 val);
356int pci_bus_write_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 val);
357int pci_bus_write_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 val);
358
359static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)
360{
361 return pci_bus_read_config_byte (dev->bus, dev->devfn, where, val);
362}
363static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val)
364{
365 return pci_bus_read_config_word (dev->bus, dev->devfn, where, val);
366}
367static inline int pci_read_config_dword(struct pci_dev *dev, int where, u32 *val)
368{
369 return pci_bus_read_config_dword (dev->bus, dev->devfn, where, val);
370}
371static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val)
372{
373 return pci_bus_write_config_byte (dev->bus, dev->devfn, where, val);
374}
375static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val)
376{
377 return pci_bus_write_config_word (dev->bus, dev->devfn, where, val);
378}
379static inline int pci_write_config_dword(struct pci_dev *dev, int where, u32 val)
380{
381 return pci_bus_write_config_dword (dev->bus, dev->devfn, where, val);
382}
383
9c8550ee
LT		 384int pci_enable_device(struct pci_dev *dev);
385int pci_enable_device_bars(struct pci_dev *dev, int mask);
1da177e4
LT		 386void pci_disable_device(struct pci_dev *dev);
387void pci_set_master(struct pci_dev *dev);
388#define HAVE_PCI_SET_MWI
9c8550ee 389int pci_set_mwi(struct pci_dev *dev);
1da177e4 390void pci_clear_mwi(struct pci_dev *dev);
a04ce0ff 391void pci_intx(struct pci_dev *dev, int enable);
9c8550ee
LT		 392int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
393int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
064b53db 394void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno);
1da177e4 395int pci_assign_resource(struct pci_dev *dev, int i);
064b53db 396void pci_restore_bars(struct pci_dev *dev);
1da177e4
LT		 397
398/* ROM control related routines */
144a50ea
DJ		 399void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
400void __iomem __must_check *pci_map_rom_copy(struct pci_dev *pdev, size_t *size);
1da177e4
LT		 401void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
402void pci_remove_rom(struct pci_dev *pdev);
403
404/* Power management related routines */
405int pci_save_state(struct pci_dev *dev);
406int pci_restore_state(struct pci_dev *dev);
9c8550ee
LT		 407int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
408pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
409int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
1da177e4
LT		 410
411/* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
412void pci_bus_assign_resources(struct pci_bus *bus);
413void pci_bus_size_bridges(struct pci_bus *bus);
414int pci_claim_resource(struct pci_dev *, int);
415void pci_assign_unassigned_resources(void);
416void pdev_enable_device(struct pci_dev *);
417void pdev_sort_resources(struct pci_dev *, struct resource_list *);
418void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
419 int (*)(struct pci_dev *, u8, u8));
420#define HAVE_PCI_REQ_REGIONS 2
421int pci_request_regions(struct pci_dev *, char *);
422void pci_release_regions(struct pci_dev *);
423int pci_request_region(struct pci_dev *, int, char *);
424void pci_release_region(struct pci_dev *, int);
425
426/* drivers/pci/bus.c */
427int pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res,
428 unsigned long size, unsigned long align,
429 unsigned long min, unsigned int type_mask,
430 void (*alignf)(void *, struct resource *,
431 unsigned long, unsigned long),
432 void *alignf_data);
433void pci_enable_bridges(struct pci_bus *bus);
434
863b18f4
L		 435/* Proper probing supporting hot-pluggable devices */
436int __pci_register_driver(struct pci_driver *, struct module *);
437static inline int pci_register_driver(struct pci_driver *driver)
438{
439 return __pci_register_driver(driver, THIS_MODULE);
440}
441
1da177e4
LT		 442void pci_unregister_driver(struct pci_driver *);
443void pci_remove_behind_bridge(struct pci_dev *);
444struct pci_driver *pci_dev_driver(const struct pci_dev *);
75865858
GKH		 445const struct pci_device_id *pci_match_device(struct pci_driver *drv, struct pci_dev *dev);
446const struct pci_device_id *pci_match_id(const struct pci_device_id *ids, struct pci_dev *dev);
1da177e4
LT		 447int pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max, int pass);
448
cecf4864
PM		 449void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *),
450 void *userdata);
451
1da177e4
LT		 452/* kmem_cache style wrapper around pci_alloc_consistent() */
453
454#include <linux/dmapool.h>
455
456#define pci_pool dma_pool
457#define pci_pool_create(name, pdev, size, align, allocation) \
458 dma_pool_create(name, &pdev->dev, size, align, allocation)
459#define pci_pool_destroy(pool) dma_pool_destroy(pool)
460#define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
461#define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
462
e24c2d96
DM		 463enum pci_dma_burst_strategy {
464 PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
465 strategy_parameter is N/A */
466 PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
467 byte boundaries */
468 PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
469 strategy_parameter byte boundaries */
470};
471
1da177e4
LT		 472#if defined(CONFIG_ISA) || defined(CONFIG_EISA)
473extern struct pci_dev *isa_bridge;
474#endif
475
476struct msix_entry {
477 u16 vector; /* kernel uses to write allocated vector */
478 u16 entry; /* driver uses to specify entry, OS writes */
479};
480
481#ifndef CONFIG_PCI_MSI
482static inline void pci_scan_msi_device(struct pci_dev *dev) {}
483static inline int pci_enable_msi(struct pci_dev *dev) {return -1;}
484static inline void pci_disable_msi(struct pci_dev *dev) {}
485static inline int pci_enable_msix(struct pci_dev* dev,
486 struct msix_entry *entries, int nvec) {return -1;}
487static inline void pci_disable_msix(struct pci_dev *dev) {}
488static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev) {}
489#else
490extern void pci_scan_msi_device(struct pci_dev *dev);
491extern int pci_enable_msi(struct pci_dev *dev);
492extern void pci_disable_msi(struct pci_dev *dev);
493extern int pci_enable_msix(struct pci_dev* dev,
494 struct msix_entry *entries, int nvec);
495extern void pci_disable_msix(struct pci_dev *dev);
496extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
497#endif
498
e04b0ea2
BK		 499extern void pci_block_user_cfg_access(struct pci_dev *dev);
500extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
501
4352dfd5
GKH		 502/*
503 * PCI domain support. Sometimes called PCI segment (eg by ACPI),
504 * a PCI domain is defined to be a set of PCI busses which share
505 * configuration space.
506 */
507#ifndef CONFIG_PCI_DOMAINS
508static inline int pci_domain_nr(struct pci_bus *bus) { return 0; }
509static inline int pci_proc_domain(struct pci_bus *bus)
510{
511 return 0;
512}
513#endif
1da177e4 514
4352dfd5 515#else /* CONFIG_PCI is not enabled */
1da177e4
LT		 516
517/*
518 * If the system does not have PCI, clearly these return errors. Define
519 * these as simple inline functions to avoid hair in drivers.
520 */
521
1da177e4
LT		 522#define _PCI_NOP(o,s,t) \
523 static inline int pci_##o##_config_##s (struct pci_dev *dev, int where, t val) \
524 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
525#define _PCI_NOP_ALL(o,x) _PCI_NOP(o,byte,u8 x) \
526 _PCI_NOP(o,word,u16 x) \
527 _PCI_NOP(o,dword,u32 x)
528_PCI_NOP_ALL(read, *)
529_PCI_NOP_ALL(write,)
530
531static inline struct pci_dev *pci_find_device(unsigned int vendor, unsigned int device, const struct pci_dev *from)
532{ return NULL; }
533
534static inline struct pci_dev *pci_find_slot(unsigned int bus, unsigned int devfn)
535{ return NULL; }
536
537static inline struct pci_dev *pci_get_device (unsigned int vendor, unsigned int device, struct pci_dev *from)
538{ return NULL; }
539
540static inline struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,
541unsigned int ss_vendor, unsigned int ss_device, struct pci_dev *from)
542{ return NULL; }
543
544static inline struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from)
545{ return NULL; }
546
547#define pci_dev_present(ids) (0)
548#define pci_dev_put(dev) do { } while (0)
549
550static inline void pci_set_master(struct pci_dev *dev) { }
551static inline int pci_enable_device(struct pci_dev *dev) { return -EIO; }
552static inline void pci_disable_device(struct pci_dev *dev) { }
553static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask) { return -EIO; }
1da177e4 554static inline int pci_assign_resource(struct pci_dev *dev, int i) { return -EBUSY;}
863b18f4 555static inline int __pci_register_driver(struct pci_driver *drv, struct module *owner) { return 0;}
1da177e4
LT		 556static inline int pci_register_driver(struct pci_driver *drv) { return 0;}
557static inline void pci_unregister_driver(struct pci_driver *drv) { }
558static inline int pci_find_capability (struct pci_dev *dev, int cap) {return 0; }
24a4e377 559static inline int pci_find_next_capability (struct pci_dev *dev, u8 post, int cap) { return 0; }
1da177e4
LT		 560static inline int pci_find_ext_capability (struct pci_dev *dev, int cap) {return 0; }
561static inline const struct pci_device_id *pci_match_device(const struct pci_device_id *ids, const struct pci_dev *dev) { return NULL; }
562
563/* Power management related routines */
564static inline int pci_save_state(struct pci_dev *dev) { return 0; }
565static inline int pci_restore_state(struct pci_dev *dev) { return 0; }
566static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state) { return 0; }
438510f6 567static inline pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state) { return PCI_D0; }
1da177e4
LT		 568static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable) { return 0; }
569
570#define isa_bridge ((struct pci_dev *)NULL)
571
a46e8126
KG		 572#define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
573
e04b0ea2
BK		 574static inline void pci_block_user_cfg_access(struct pci_dev *dev) { }
575static inline void pci_unblock_user_cfg_access(struct pci_dev *dev) { }
576
4352dfd5 577#endif /* CONFIG_PCI */
1da177e4 578
4352dfd5
GKH		 579/* Include architecture-dependent settings and functions */
580
581#include <asm/pci.h>
1da177e4
LT		 582
583/* these helpers provide future and backwards compatibility
584 * for accessing popular PCI BAR info */
585#define pci_resource_start(dev,bar) ((dev)->resource[(bar)].start)
586#define pci_resource_end(dev,bar) ((dev)->resource[(bar)].end)
587#define pci_resource_flags(dev,bar) ((dev)->resource[(bar)].flags)
588#define pci_resource_len(dev,bar) \
589 ((pci_resource_start((dev),(bar)) == 0 && \
590 pci_resource_end((dev),(bar)) == \
591 pci_resource_start((dev),(bar))) ? 0 : \
592 \
593 (pci_resource_end((dev),(bar)) - \
594 pci_resource_start((dev),(bar)) + 1))
595
596/* Similar to the helpers above, these manipulate per-pci_dev
597 * driver-specific data. They are really just a wrapper around
598 * the generic device structure functions of these calls.
599 */
600static inline void *pci_get_drvdata (struct pci_dev *pdev)
601{
602 return dev_get_drvdata(&pdev->dev);
603}
604
605static inline void pci_set_drvdata (struct pci_dev *pdev, void *data)
606{
607 dev_set_drvdata(&pdev->dev, data);
608}
609
610/* If you want to know what to call your pci_dev, ask this function.
611 * Again, it's a wrapper around the generic device.
612 */
613static inline char *pci_name(struct pci_dev *pdev)
614{
615 return pdev->dev.bus_id;
616}
617
2311b1f2
ME		 618
619/* Some archs don't want to expose struct resource to userland as-is
620 * in sysfs and /proc
621 */
622#ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
623static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
624 const struct resource *rsrc, u64 *start, u64 *end)
625{
626 *start = rsrc->start;
627 *end = rsrc->end;
628}
629#endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
630
631
1da177e4
LT		 632/*
633 * The world is not perfect and supplies us with broken PCI devices.
634 * For at least a part of these bugs we need a work-around, so both
635 * generic (drivers/pci/quirks.c) and per-architecture code can define
636 * fixup hooks to be called for particular buggy devices.
637 */
638
639struct pci_fixup {
640 u16 vendor, device; /* You can use PCI_ANY_ID here of course */
641 void (*hook)(struct pci_dev *dev);
642};
643
644enum pci_fixup_pass {
645 pci_fixup_early, /* Before probing BARs */
646 pci_fixup_header, /* After reading configuration header */
647 pci_fixup_final, /* Final phase of device fixups */
648 pci_fixup_enable, /* pci_enable_device() time */
649};
650
651/* Anonymous variables would be nice... */
652#define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook) \
74d863ee 653 static const struct pci_fixup __pci_fixup_##name __attribute_used__ \
1da177e4
LT		 654 __attribute__((__section__(#section))) = { vendor, device, hook };
655#define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \
656 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
657 vendor##device##hook, vendor, device, hook)
658#define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \
659 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
660 vendor##device##hook, vendor, device, hook)
661#define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \
662 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
663 vendor##device##hook, vendor, device, hook)
664#define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \
665 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
666 vendor##device##hook, vendor, device, hook)
667
668
669void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
670
671extern int pci_pci_problems;
672#define PCIPCI_FAIL 1
673#define PCIPCI_TRITON 2
674#define PCIPCI_NATOMA 4
675#define PCIPCI_VIAETBF 8
676#define PCIPCI_VSFX 16
677#define PCIPCI_ALIMAGIK 32
678
679#endif /* __KERNEL__ */
680#endif /* LINUX_PCI_H */
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