[net-next-2.6.git] / include / linux / hardirq.h

#ifndef LINUX_HARDIRQ_H
#define LINUX_HARDIRQ_H

#include <linux/preempt.h>
#include <linux/smp_lock.h>
#include <linux/lockdep.h>
#include <asm/hardirq.h>
#include <asm/system.h>

/*
 * We put the hardirq and softirq counter into the preemption
 * counter. The bitmask has the following meaning:
 *
 * - bits 0-7 are the preemption count (max preemption depth: 256)
 * - bits 8-15 are the softirq count (max # of softirqs: 256)
 *
 * The hardirq count can be overridden per architecture, the default is:
 *
 * - bits 16-27 are the hardirq count (max # of hardirqs: 4096)
 * - ( bit 28 is the PREEMPT_ACTIVE flag. )
 *
 * PREEMPT_MASK: 0x000000ff
 * SOFTIRQ_MASK: 0x0000ff00
 * HARDIRQ_MASK: 0x0fff0000
 */
#define PREEMPT_BITS	8
#define SOFTIRQ_BITS	8

#ifndef HARDIRQ_BITS
#define HARDIRQ_BITS	12

#ifndef MAX_HARDIRQS_PER_CPU
#define MAX_HARDIRQS_PER_CPU NR_IRQS
#endif

/*
 * The hardirq mask has to be large enough to have space for potentially
 * all IRQ sources in the system nesting on a single CPU.
 */
#if (1 << HARDIRQ_BITS) < MAX_HARDIRQS_PER_CPU
# error HARDIRQ_BITS is too low!
#endif
#endif

#define PREEMPT_SHIFT	0
#define SOFTIRQ_SHIFT	(PREEMPT_SHIFT + PREEMPT_BITS)
#define HARDIRQ_SHIFT	(SOFTIRQ_SHIFT + SOFTIRQ_BITS)

#define __IRQ_MASK(x)	((1UL << (x))-1)

#define PREEMPT_MASK	(__IRQ_MASK(PREEMPT_BITS) << PREEMPT_SHIFT)
#define SOFTIRQ_MASK	(__IRQ_MASK(SOFTIRQ_BITS) << SOFTIRQ_SHIFT)
#define HARDIRQ_MASK	(__IRQ_MASK(HARDIRQ_BITS) << HARDIRQ_SHIFT)

#define PREEMPT_OFFSET	(1UL << PREEMPT_SHIFT)
#define SOFTIRQ_OFFSET	(1UL << SOFTIRQ_SHIFT)
#define HARDIRQ_OFFSET	(1UL << HARDIRQ_SHIFT)

#if PREEMPT_ACTIVE < (1 << (HARDIRQ_SHIFT + HARDIRQ_BITS))
#error PREEMPT_ACTIVE is too low!
#endif

#define hardirq_count()	(preempt_count() & HARDIRQ_MASK)
#define softirq_count()	(preempt_count() & SOFTIRQ_MASK)
#define irq_count()	(preempt_count() & (HARDIRQ_MASK | SOFTIRQ_MASK))

/*
 * Are we doing bottom half or hardware interrupt processing?
 * Are we in a softirq context? Interrupt context?
 */
#define in_irq()		(hardirq_count())
#define in_softirq()		(softirq_count())
#define in_interrupt()		(irq_count())

#define in_atomic()		((preempt_count() & ~PREEMPT_ACTIVE) != 0)

#ifdef CONFIG_PREEMPT
# define PREEMPT_CHECK_OFFSET 1
#else
# define PREEMPT_CHECK_OFFSET 0
#endif

/*
 * Check whether we were atomic before we did preempt_disable():
 * (used by the scheduler)
 */
#define in_atomic_preempt_off() \
		((preempt_count() & ~PREEMPT_ACTIVE) != PREEMPT_CHECK_OFFSET)

#ifdef CONFIG_PREEMPT
# define preemptible()	(preempt_count() == 0 && !irqs_disabled())
# define IRQ_EXIT_OFFSET (HARDIRQ_OFFSET-1)
#else
# define preemptible()	0
# define IRQ_EXIT_OFFSET HARDIRQ_OFFSET
#endif

#ifdef CONFIG_SMP
extern void synchronize_irq(unsigned int irq);
#else
# define synchronize_irq(irq)	barrier()
#endif

struct task_struct;

#ifndef CONFIG_VIRT_CPU_ACCOUNTING
static inline void account_system_vtime(struct task_struct *tsk)
{
}
#endif

#if defined(CONFIG_PREEMPT_RCU) && defined(CONFIG_NO_HZ)
extern void rcu_irq_enter(void);
extern void rcu_irq_exit(void);
#else
# define rcu_irq_enter() do { } while (0)
# define rcu_irq_exit() do { } while (0)
#endif /* CONFIG_PREEMPT_RCU */

/*
 * It is safe to do non-atomic ops on ->hardirq_context,
 * because NMI handlers may not preempt and the ops are
 * always balanced, so the interrupted value of ->hardirq_context
 * will always be restored.
 */
#define __irq_enter()					\
	do {						\
		rcu_irq_enter();			\
		account_system_vtime(current);		\
		add_preempt_count(HARDIRQ_OFFSET);	\
		trace_hardirq_enter();			\
	} while (0)

/*
 * Enter irq context (on NO_HZ, update jiffies):
 */
extern void irq_enter(void);

/*
 * Exit irq context without processing softirqs:
 */
#define __irq_exit()					\
	do {						\
		trace_hardirq_exit();			\
		account_system_vtime(current);		\
		sub_preempt_count(HARDIRQ_OFFSET);	\
		rcu_irq_exit();				\
	} while (0)

/*
 * Exit irq context and process softirqs if needed:
 */
extern void irq_exit(void);

#define nmi_enter()		do { lockdep_off(); __irq_enter(); } while (0)
#define nmi_exit()		do { __irq_exit(); lockdep_on(); } while (0)

#endif /* LINUX_HARDIRQ_H */
Commit	Line	Data
1da177e4 LT	1	#ifndef LINUX_HARDIRQ_H
	2	#define LINUX_HARDIRQ_H
	3
67bc4eb0	4	#include <linux/preempt.h>
1da177e4	5	#include <linux/smp_lock.h>
fbb9ce95	6	#include <linux/lockdep.h>
1da177e4 LT	7	#include <asm/hardirq.h>
	8	#include <asm/system.h>
	9
	10	/*
	11	* We put the hardirq and softirq counter into the preemption
	12	* counter. The bitmask has the following meaning:
	13	*
	14	* - bits 0-7 are the preemption count (max preemption depth: 256)
	15	* - bits 8-15 are the softirq count (max # of softirqs: 256)
	16	*
	17	* The hardirq count can be overridden per architecture, the default is:
	18	*
	19	* - bits 16-27 are the hardirq count (max # of hardirqs: 4096)
	20	* - ( bit 28 is the PREEMPT_ACTIVE flag. )
	21	*
	22	* PREEMPT_MASK: 0x000000ff
	23	* SOFTIRQ_MASK: 0x0000ff00
	24	* HARDIRQ_MASK: 0x0fff0000
	25	*/
	26	#define PREEMPT_BITS 8
	27	#define SOFTIRQ_BITS 8
	28
	29	#ifndef HARDIRQ_BITS
	30	#define HARDIRQ_BITS 12
23d0b8b0 EB	31
	32	#ifndef MAX_HARDIRQS_PER_CPU
	33	#define MAX_HARDIRQS_PER_CPU NR_IRQS
	34	#endif
	35
1da177e4 LT	36	/*
	37	* The hardirq mask has to be large enough to have space for potentially
	38	* all IRQ sources in the system nesting on a single CPU.
	39	*/
23d0b8b0	40	#if (1 << HARDIRQ_BITS) < MAX_HARDIRQS_PER_CPU
1da177e4 LT	41	# error HARDIRQ_BITS is too low!
	42	#endif
	43	#endif
	44
	45	#define PREEMPT_SHIFT 0
	46	#define SOFTIRQ_SHIFT (PREEMPT_SHIFT + PREEMPT_BITS)
	47	#define HARDIRQ_SHIFT (SOFTIRQ_SHIFT + SOFTIRQ_BITS)
	48
	49	#define __IRQ_MASK(x) ((1UL << (x))-1)
	50
	51	#define PREEMPT_MASK (__IRQ_MASK(PREEMPT_BITS) << PREEMPT_SHIFT)
1da177e4	52	#define SOFTIRQ_MASK (__IRQ_MASK(SOFTIRQ_BITS) << SOFTIRQ_SHIFT)
8f28e8fa	53	#define HARDIRQ_MASK (__IRQ_MASK(HARDIRQ_BITS) << HARDIRQ_SHIFT)
1da177e4 LT	54
	55	#define PREEMPT_OFFSET (1UL << PREEMPT_SHIFT)
	56	#define SOFTIRQ_OFFSET (1UL << SOFTIRQ_SHIFT)
	57	#define HARDIRQ_OFFSET (1UL << HARDIRQ_SHIFT)
	58
8f28e8fa PBG	59	#if PREEMPT_ACTIVE < (1 << (HARDIRQ_SHIFT + HARDIRQ_BITS))
	60	#error PREEMPT_ACTIVE is too low!
	61	#endif
	62
1da177e4 LT	63	#define hardirq_count() (preempt_count() & HARDIRQ_MASK)
	64	#define softirq_count() (preempt_count() & SOFTIRQ_MASK)
	65	#define irq_count() (preempt_count() & (HARDIRQ_MASK \| SOFTIRQ_MASK))
	66
	67	/*
	68	* Are we doing bottom half or hardware interrupt processing?
	69	* Are we in a softirq context? Interrupt context?
	70	*/
	71	#define in_irq() (hardirq_count())
	72	#define in_softirq() (softirq_count())
	73	#define in_interrupt() (irq_count())
	74
6478d880	75	#define in_atomic() ((preempt_count() & ~PREEMPT_ACTIVE) != 0)
1da177e4	76
4da1ce6d IM	77	#ifdef CONFIG_PREEMPT
	78	# define PREEMPT_CHECK_OFFSET 1
	79	#else
	80	# define PREEMPT_CHECK_OFFSET 0
	81	#endif
	82
	83	/*
	84	* Check whether we were atomic before we did preempt_disable():
	85	* (used by the scheduler)
	86	*/
	87	#define in_atomic_preempt_off() \
	88	((preempt_count() & ~PREEMPT_ACTIVE) != PREEMPT_CHECK_OFFSET)
	89
1da177e4 LT	90	#ifdef CONFIG_PREEMPT
	91	# define preemptible() (preempt_count() == 0 && !irqs_disabled())
	92	# define IRQ_EXIT_OFFSET (HARDIRQ_OFFSET-1)
	93	#else
	94	# define preemptible() 0
	95	# define IRQ_EXIT_OFFSET HARDIRQ_OFFSET
	96	#endif
	97
	98	#ifdef CONFIG_SMP
	99	extern void synchronize_irq(unsigned int irq);
	100	#else
	101	# define synchronize_irq(irq) barrier()
	102	#endif
	103
f037360f AV	104	struct task_struct;
f037360f AV	105
1da177e4	106	#ifndef CONFIG_VIRT_CPU_ACCOUNTING
1da177e4 LT	107	static inline void account_system_vtime(struct task_struct *tsk)
	108	{
	109	}
	110	#endif
	111
2232c2d8 SR	112	#if defined(CONFIG_PREEMPT_RCU) && defined(CONFIG_NO_HZ)
	113	extern void rcu_irq_enter(void);
	114	extern void rcu_irq_exit(void);
	115	#else
	116	# define rcu_irq_enter() do { } while (0)
	117	# define rcu_irq_exit() do { } while (0)
	118	#endif /* CONFIG_PREEMPT_RCU */
	119
de30a2b3 IM	120	/*
	121	* It is safe to do non-atomic ops on ->hardirq_context,
	122	* because NMI handlers may not preempt and the ops are
	123	* always balanced, so the interrupted value of ->hardirq_context
	124	* will always be restored.
	125	*/
79bf2bb3 TG	126	#define __irq_enter() \
79bf2bb3 TG	127	do { \
2232c2d8	128	rcu_irq_enter(); \
79bf2bb3 TG	129	account_system_vtime(current); \
	130	add_preempt_count(HARDIRQ_OFFSET); \
	131	trace_hardirq_enter(); \
	132	} while (0)
	133
	134	/*
	135	* Enter irq context (on NO_HZ, update jiffies):
	136	*/
dde4b2b5	137	extern void irq_enter(void);
de30a2b3 IM	138
	139	/*
	140	* Exit irq context without processing softirqs:
	141	*/
	142	#define __irq_exit() \
	143	do { \
	144	trace_hardirq_exit(); \
	145	account_system_vtime(current); \
	146	sub_preempt_count(HARDIRQ_OFFSET); \
2232c2d8	147	rcu_irq_exit(); \
1da177e4 LT	148	} while (0)
1da177e4 LT	149
de30a2b3 IM	150	/*
	151	* Exit irq context and process softirqs if needed:
	152	*/
1da177e4 LT	153	extern void irq_exit(void);
1da177e4 LT	154
79bf2bb3	155	#define nmi_enter() do { lockdep_off(); __irq_enter(); } while (0)
fbb9ce95	156	#define nmi_exit() do { __irq_exit(); lockdep_on(); } while (0)
de30a2b3	157
1da177e4	158	#endif /* LINUX_HARDIRQ_H */