[net-next-2.6.git] / include / linux / fsl_devices.h

/*
 * include/linux/fsl_devices.h
 *
 * Definitions for any platform device related flags or structures for
 * Freescale processor devices
 *
 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
 *
 * Copyright 2004 Freescale Semiconductor, Inc
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 */

#ifndef _FSL_DEVICE_H_
#define _FSL_DEVICE_H_

#include <linux/types.h>

/*
 * Some conventions on how we handle peripherals on Freescale chips
 *
 * unique device: a platform_device entry in fsl_plat_devs[] plus
 * associated device information in its platform_data structure.
 *
 * A chip is described by a set of unique devices.
 *
 * Each sub-arch has its own master list of unique devices and
 * enumerates them by enum fsl_devices in a sub-arch specific header
 *
 * The platform data structure is broken into two parts.  The
 * first is device specific information that help identify any
 * unique features of a peripheral.  The second is any
 * information that may be defined by the board or how the device
 * is connected externally of the chip.
 *
 * naming conventions:
 * - platform data structures: <driver>_platform_data
 * - platform data device flags: FSL_<driver>_DEV_<FLAG>
 * - platform data board flags: FSL_<driver>_BRD_<FLAG>
 *
 */

enum fsl_usb2_operating_modes {
	FSL_USB2_MPH_HOST,
	FSL_USB2_DR_HOST,
	FSL_USB2_DR_DEVICE,
	FSL_USB2_DR_OTG,
};

enum fsl_usb2_phy_modes {
	FSL_USB2_PHY_NONE,
	FSL_USB2_PHY_ULPI,
	FSL_USB2_PHY_UTMI,
	FSL_USB2_PHY_UTMI_WIDE,
	FSL_USB2_PHY_SERIAL,
};

struct clk;
struct platform_device;

struct fsl_usb2_platform_data {
	/* board specific information */
	enum fsl_usb2_operating_modes	operating_mode;
	enum fsl_usb2_phy_modes		phy_mode;
	unsigned int			port_enables;
	unsigned int			workaround;

	int		(*init)(struct platform_device *);
	void		(*exit)(struct platform_device *);
	void __iomem	*regs;		/* ioremap'd register base */
	struct clk	*clk;
	unsigned	big_endian_mmio:1;
	unsigned	big_endian_desc:1;
	unsigned	es:1;		/* need USBMODE:ES */
	unsigned	le_setup_buf:1;
	unsigned	have_sysif_regs:1;
	unsigned	invert_drvvbus:1;
	unsigned	invert_pwr_fault:1;
};

/* Flags in fsl_usb2_mph_platform_data */
#define FSL_USB2_PORT0_ENABLED	0x00000001
#define FSL_USB2_PORT1_ENABLED	0x00000002

#define FLS_USB2_WORKAROUND_ENGCM09152	(1 << 0)

struct spi_device;

struct fsl_spi_platform_data {
	u32 	initial_spmode;	/* initial SPMODE value */
	s16	bus_num;
	unsigned int flags;
#define SPI_QE_CPU_MODE		(1 << 0) /* QE CPU ("PIO") mode */
#define SPI_CPM_MODE		(1 << 1) /* CPM/QE ("DMA") mode */
#define SPI_CPM1		(1 << 2) /* SPI unit is in CPM1 block */
#define SPI_CPM2		(1 << 3) /* SPI unit is in CPM2 block */
#define SPI_QE			(1 << 4) /* SPI unit is in QE block */
	/* board specific information */
	u16	max_chipselect;
	void	(*cs_control)(struct spi_device *spi, bool on);
	u32	sysclk;
};

struct mpc8xx_pcmcia_ops {
	void(*hw_ctrl)(int slot, int enable);
	int(*voltage_set)(int slot, int vcc, int vpp);
};

/* Returns non-zero if the current suspend operation would
 * lead to a deep sleep (i.e. power removed from the core,
 * instead of just the clock).
 */
#if defined(CONFIG_PPC_83xx) && defined(CONFIG_SUSPEND)
int fsl_deep_sleep(void);
#else
static inline int fsl_deep_sleep(void) { return 0; }
#endif

#endif /* _FSL_DEVICE_H_ */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* include/linux/fsl_devices.h
	3	*
	4	* Definitions for any platform device related flags or structures for
	5	* Freescale processor devices
	6	*
4c8d3d99	7	* Maintainer: Kumar Gala <galak@kernel.crashing.org>
1da177e4 LT	8	*
	9	* Copyright 2004 Freescale Semiconductor, Inc
	10	*
	11	* This program is free software; you can redistribute it and/or modify it
	12	* under the terms of the GNU General Public License as published by the
	13	* Free Software Foundation; either version 2 of the License, or (at your
	14	* option) any later version.
	15	*/
	16
1da177e4 LT	17	#ifndef _FSL_DEVICE_H_
	18	#define _FSL_DEVICE_H_
	19
	20	#include <linux/types.h>
	21
	22	/*
	23	* Some conventions on how we handle peripherals on Freescale chips
	24	*
	25	* unique device: a platform_device entry in fsl_plat_devs[] plus
	26	* associated device information in its platform_data structure.
	27	*
	28	* A chip is described by a set of unique devices.
	29	*
	30	* Each sub-arch has its own master list of unique devices and
	31	* enumerates them by enum fsl_devices in a sub-arch specific header
	32	*
	33	* The platform data structure is broken into two parts. The
	34	* first is device specific information that help identify any
	35	* unique features of a peripheral. The second is any
	36	* information that may be defined by the board or how the device
	37	* is connected externally of the chip.
	38	*
	39	* naming conventions:
	40	* - platform data structures: <driver>_platform_data
	41	* - platform data device flags: FSL_<driver>_DEV_<FLAG>
	42	* - platform data board flags: FSL_<driver>_BRD_<FLAG>
	43	*
	44	*/
	45
80cb9aee RV	46	enum fsl_usb2_operating_modes {
	47	FSL_USB2_MPH_HOST,
	48	FSL_USB2_DR_HOST,
	49	FSL_USB2_DR_DEVICE,
	50	FSL_USB2_DR_OTG,
	51	};
	52
	53	enum fsl_usb2_phy_modes {
	54	FSL_USB2_PHY_NONE,
	55	FSL_USB2_PHY_ULPI,
	56	FSL_USB2_PHY_UTMI,
	57	FSL_USB2_PHY_UTMI_WIDE,
	58	FSL_USB2_PHY_SERIAL,
	59	};
	60
230f7ede AG	61	struct clk;
	62	struct platform_device;
	63
80cb9aee RV	64	struct fsl_usb2_platform_data {
80cb9aee RV	65	/* board specific information */
98658538 LY	66	enum fsl_usb2_operating_modes operating_mode;
	67	enum fsl_usb2_phy_modes phy_mode;
	68	unsigned int port_enables;
69cb1ec4	69	unsigned int workaround;
230f7ede AG	70
	71	int (init)(struct platform_device );
	72	void (exit)(struct platform_device );
	73	void __iomem regs; / ioremap'd register base */
	74	struct clk *clk;
	75	unsigned big_endian_mmio:1;
	76	unsigned big_endian_desc:1;
	77	unsigned es:1; /* need USBMODE:ES */
	78	unsigned le_setup_buf:1;
	79	unsigned have_sysif_regs:1;
	80	unsigned invert_drvvbus:1;
	81	unsigned invert_pwr_fault:1;
80cb9aee RV	82	};
	83
	84	/* Flags in fsl_usb2_mph_platform_data */
	85	#define FSL_USB2_PORT0_ENABLED 0x00000001
	86	#define FSL_USB2_PORT1_ENABLED 0x00000002
	87
69cb1ec4 EB	88	#define FLS_USB2_WORKAROUND_ENGCM09152 (1 << 0)
69cb1ec4 EB	89
364fdbc0 AV	90	struct spi_device;
364fdbc0 AV	91
ccf06998 KG	92	struct fsl_spi_platform_data {
ccf06998 KG	93	u32 initial_spmode; /* initial SPMODE value */
35b4b3c0	94	s16 bus_num;
87ec0e98	95	unsigned int flags;
7d6709a2 BH	96	#define SPI_QE_CPU_MODE (1 << 0) /* QE CPU ("PIO") mode */
	97	#define SPI_CPM_MODE (1 << 1) /* CPM/QE ("DMA") mode */
	98	#define SPI_CPM1 (1 << 2) /* SPI unit is in CPM1 block */
	99	#define SPI_CPM2 (1 << 3) /* SPI unit is in CPM2 block */
	100	#define SPI_QE (1 << 4) /* SPI unit is in QE block */
ccf06998 KG	101	/* board specific information */
ccf06998 KG	102	u16 max_chipselect;
364fdbc0	103	void (cs_control)(struct spi_device spi, bool on);
ccf06998 KG	104	u32 sysclk;
	105	};
	106
80128ff7 VB	107	struct mpc8xx_pcmcia_ops {
	108	void(*hw_ctrl)(int slot, int enable);
	109	int(*voltage_set)(int slot, int vcc, int vpp);
	110	};
	111
d49747bd SW	112	/* Returns non-zero if the current suspend operation would
	113	* lead to a deep sleep (i.e. power removed from the core,
	114	* instead of just the clock).
	115	*/
2e9d546e	116	#if defined(CONFIG_PPC_83xx) && defined(CONFIG_SUSPEND)
d49747bd	117	int fsl_deep_sleep(void);
2e9d546e AV	118	#else
	119	static inline int fsl_deep_sleep(void) { return 0; }
	120	#endif
d49747bd	121
98658538	122	#endif /* _FSL_DEVICE_H_ */