[net-next-2.6.git] / include / asm-x86 / mmu_context_64.h

#ifndef __X86_64_MMU_CONTEXT_H
#define __X86_64_MMU_CONTEXT_H

#include <asm/desc.h>
#include <asm/atomic.h>
#include <asm/pgalloc.h>
#include <asm/pda.h>
#include <asm/pgtable.h>
#include <asm/tlbflush.h>
#include <asm-generic/mm_hooks.h>

/*
 * possibly do the LDT unload here?
 */
int init_new_context(struct task_struct *tsk, struct mm_struct *mm);
void destroy_context(struct mm_struct *mm);

static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
{
#ifdef CONFIG_SMP
	if (read_pda(mmu_state) == TLBSTATE_OK) 
		write_pda(mmu_state, TLBSTATE_LAZY);
#endif
}

static inline void load_cr3(pgd_t *pgd)
{
	asm volatile("movq %0,%%cr3" :: "r" (__pa(pgd)) : "memory");
}

static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, 
			     struct task_struct *tsk)
{
	unsigned cpu = smp_processor_id();
	if (likely(prev != next)) {
		/* stop flush ipis for the previous mm */
		cpu_clear(cpu, prev->cpu_vm_mask);
#ifdef CONFIG_SMP
		write_pda(mmu_state, TLBSTATE_OK);
		write_pda(active_mm, next);
#endif
		cpu_set(cpu, next->cpu_vm_mask);
		load_cr3(next->pgd);

		if (unlikely(next->context.ldt != prev->context.ldt)) 
			load_LDT_nolock(&next->context, cpu);
	}
#ifdef CONFIG_SMP
	else {
		write_pda(mmu_state, TLBSTATE_OK);
		if (read_pda(active_mm) != next)
			out_of_line_bug();
		if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) {
			/* We were in lazy tlb mode and leave_mm disabled 
			 * tlb flush IPI delivery. We must reload CR3
			 * to make sure to use no freed page tables.
			 */
			load_cr3(next->pgd);
			load_LDT_nolock(&next->context, cpu);
		}
	}
#endif
}

#define deactivate_mm(tsk,mm)	do { \
	load_gs_index(0); \
	asm volatile("movl %0,%%fs"::"r"(0));  \
} while(0)

#define activate_mm(prev, next) \
	switch_mm((prev),(next),NULL)


#endif
Commit	Line	Data
1da177e4 LT	1	#ifndef __X86_64_MMU_CONTEXT_H
	2	#define __X86_64_MMU_CONTEXT_H
	3
1da177e4 LT	4	#include <asm/desc.h>
	5	#include <asm/atomic.h>
	6	#include <asm/pgalloc.h>
	7	#include <asm/pda.h>
	8	#include <asm/pgtable.h>
	9	#include <asm/tlbflush.h>
d6dd61c8	10	#include <asm-generic/mm_hooks.h>
1da177e4 LT	11
	12	/*
	13	* possibly do the LDT unload here?
	14	*/
	15	int init_new_context(struct task_struct tsk, struct mm_struct mm);
	16	void destroy_context(struct mm_struct *mm);
	17
1da177e4 LT	18	static inline void enter_lazy_tlb(struct mm_struct mm, struct task_struct tsk)
1da177e4 LT	19	{
e4b5939a	20	#ifdef CONFIG_SMP
1da177e4 LT	21	if (read_pda(mmu_state) == TLBSTATE_OK)
1da177e4 LT	22	write_pda(mmu_state, TLBSTATE_LAZY);
1da177e4	23	#endif
e4b5939a	24	}
1da177e4 LT	25
	26	static inline void load_cr3(pgd_t *pgd)
	27	{
	28	asm volatile("movq %0,%%cr3" :: "r" (__pa(pgd)) : "memory");
	29	}
	30
	31	static inline void switch_mm(struct mm_struct prev, struct mm_struct next,
	32	struct task_struct *tsk)
	33	{
	34	unsigned cpu = smp_processor_id();
	35	if (likely(prev != next)) {
	36	/* stop flush ipis for the previous mm */
3d1712c9	37	cpu_clear(cpu, prev->cpu_vm_mask);
1da177e4 LT	38	#ifdef CONFIG_SMP
	39	write_pda(mmu_state, TLBSTATE_OK);
	40	write_pda(active_mm, next);
	41	#endif
3d1712c9	42	cpu_set(cpu, next->cpu_vm_mask);
1da177e4 LT	43	load_cr3(next->pgd);
	44
	45	if (unlikely(next->context.ldt != prev->context.ldt))
	46	load_LDT_nolock(&next->context, cpu);
	47	}
	48	#ifdef CONFIG_SMP
	49	else {
	50	write_pda(mmu_state, TLBSTATE_OK);
	51	if (read_pda(active_mm) != next)
	52	out_of_line_bug();
3d1712c9	53	if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) {
1da177e4 LT	54	/* We were in lazy tlb mode and leave_mm disabled
	55	* tlb flush IPI delivery. We must reload CR3
	56	* to make sure to use no freed page tables.
	57	*/
	58	load_cr3(next->pgd);
	59	load_LDT_nolock(&next->context, cpu);
	60	}
	61	}
	62	#endif
	63	}
	64
	65	#define deactivate_mm(tsk,mm) do { \
	66	load_gs_index(0); \
	67	asm volatile("movl %0,%%fs"::"r"(0)); \
	68	} while(0)
	69
	70	#define activate_mm(prev, next) \
	71	switch_mm((prev),(next),NULL)
	72
	73
	74	#endif