]> bbs.cooldavid.org Git - net-next-2.6.git/blame - include/asm-i386/apic.h
IRQ: Maintain regs pointer globally rather than passing to IRQ handlers
[net-next-2.6.git] / include / asm-i386 / apic.h
CommitLineData
1da177e4
LT
1#ifndef __ASM_APIC_H
2#define __ASM_APIC_H
3
1da177e4
LT
4#include <linux/pm.h>
5#include <asm/fixmap.h>
6#include <asm/apicdef.h>
9635b47d 7#include <asm/processor.h>
1da177e4
LT
8#include <asm/system.h>
9
10#define Dprintk(x...)
11
12/*
13 * Debugging macros
14 */
15#define APIC_QUIET 0
16#define APIC_VERBOSE 1
17#define APIC_DEBUG 2
18
19extern int apic_verbosity;
20
21/*
22 * Define the default level of output to be very little
23 * This can be turned up by using apic=verbose for more
24 * information and apic=debug for _lots_ of information.
25 * apic_verbosity is defined in apic.c
26 */
27#define apic_printk(v, s, a...) do { \
28 if ((v) <= apic_verbosity) \
29 printk(s, ##a); \
30 } while (0)
31
32
1a3f239d
RR
33extern void generic_apic_probe(void);
34
1da177e4
LT
35#ifdef CONFIG_X86_LOCAL_APIC
36
37/*
38 * Basic functions accessing APICs.
39 */
40
41static __inline void apic_write(unsigned long reg, unsigned long v)
42{
43 *((volatile unsigned long *)(APIC_BASE+reg)) = v;
44}
45
46static __inline void apic_write_atomic(unsigned long reg, unsigned long v)
47{
48 xchg((volatile unsigned long *)(APIC_BASE+reg), v);
49}
50
51static __inline unsigned long apic_read(unsigned long reg)
52{
53 return *((volatile unsigned long *)(APIC_BASE+reg));
54}
55
56static __inline__ void apic_wait_icr_idle(void)
57{
58 while ( apic_read( APIC_ICR ) & APIC_ICR_BUSY )
59 cpu_relax();
60}
61
62int get_physical_broadcast(void);
63
64#ifdef CONFIG_X86_GOOD_APIC
65# define FORCE_READ_AROUND_WRITE 0
66# define apic_read_around(x)
67# define apic_write_around(x,y) apic_write((x),(y))
68#else
69# define FORCE_READ_AROUND_WRITE 1
70# define apic_read_around(x) apic_read(x)
71# define apic_write_around(x,y) apic_write_atomic((x),(y))
72#endif
73
74static inline void ack_APIC_irq(void)
75{
76 /*
77 * ack_APIC_irq() actually gets compiled as a single instruction:
78 * - a single rmw on Pentium/82489DX
79 * - a single write on P6+ cores (CONFIG_X86_GOOD_APIC)
80 * ... yummie.
81 */
82
83 /* Docs say use 0 for future compatibility */
84 apic_write_around(APIC_EOI, 0);
85}
86
87extern void (*wait_timer_tick)(void);
88
89extern int get_maxlvt(void);
90extern void clear_local_APIC(void);
91extern void connect_bsp_APIC (void);
650927ef 92extern void disconnect_bsp_APIC (int virt_wire_setup);
1da177e4
LT
93extern void disable_local_APIC (void);
94extern void lapic_shutdown (void);
95extern int verify_local_APIC (void);
96extern void cache_APIC_registers (void);
97extern void sync_Arb_IDs (void);
98extern void init_bsp_APIC (void);
99extern void setup_local_APIC (void);
100extern void init_apic_mappings (void);
7d12e780 101extern void smp_local_timer_interrupt (void);
1da177e4
LT
102extern void setup_boot_APIC_clock (void);
103extern void setup_secondary_APIC_clock (void);
1da177e4
LT
104extern int APIC_init_uniprocessor (void);
105extern void disable_APIC_timer(void);
106extern void enable_APIC_timer(void);
107
1da177e4
LT
108extern void enable_NMI_through_LVT0 (void * dummy);
109
7d12e780 110void smp_send_timer_broadcast_ipi(void);
6eb0a0fd
VP
111void switch_APIC_timer_to_ipi(void *cpumask);
112void switch_ipi_to_APIC_timer(void *cpumask);
113#define ARCH_APICTIMER_STOPS_ON_C3 1
114
f9262c12
AK
115extern int timer_over_8254;
116
1da177e4
LT
117#else /* !CONFIG_X86_LOCAL_APIC */
118static inline void lapic_shutdown(void) { }
119
120#endif /* !CONFIG_X86_LOCAL_APIC */
121
122#endif /* __ASM_APIC_H */