[net-next-2.6.git] / drivers / watchdog / rc32434_wdt.c

/*
 *  IDT Interprise 79RC32434 watchdog driver
 *
 *  Copyright (C) 2006, Ondrej Zajicek <santiago@crfreenet.org>
 *  Copyright (C) 2008, Florian Fainelli <florian@openwrt.org>
 *
 *  based on
 *  SoftDog 0.05:	A Software Watchdog Device
 *
 *  (c) Copyright 1996 Alan Cox <alan@lxorguk.ukuu.org.uk>,
 *					All Rights Reserved.
 *
 *  This program is free software; you can redistribute it and/or
 *  modify it under the terms of the GNU General Public License
 *  as published by the Free Software Foundation; either version
 *  2 of the License, or (at your option) any later version.
 *
 */

#include <linux/module.h>		/* For module specific items */
#include <linux/moduleparam.h>		/* For new moduleparam's */
#include <linux/types.h>		/* For standard types (like size_t) */
#include <linux/errno.h>		/* For the -ENODEV/... values */
#include <linux/kernel.h>		/* For printk/panic/... */
#include <linux/fs.h>			/* For file operations */
#include <linux/miscdevice.h>		/* For MODULE_ALIAS_MISCDEV
							(WATCHDOG_MINOR) */
#include <linux/watchdog.h>		/* For the watchdog specific items */
#include <linux/init.h>			/* For __init/__exit/... */
#include <linux/platform_device.h>	/* For platform_driver framework */
#include <linux/spinlock.h>		/* For spin_lock/spin_unlock/... */
#include <linux/uaccess.h>		/* For copy_to_user/put_user/... */

#include <asm/mach-rc32434/integ.h>	/* For the Watchdog registers */

#define PFX KBUILD_MODNAME ": "

#define VERSION "1.0"

static struct {
	unsigned long inuse;
	spinlock_t io_lock;
} rc32434_wdt_device;

static struct integ __iomem *wdt_reg;

static int expect_close;

/* Board internal clock speed in Hz,
 * the watchdog timer ticks at. */
extern unsigned int idt_cpu_freq;

/* translate wtcompare value to seconds and vice versa */
#define WTCOMP2SEC(x)	(x / idt_cpu_freq)
#define SEC2WTCOMP(x)	(x * idt_cpu_freq)

/* Use a default timeout of 20s. This should be
 * safe for CPU clock speeds up to 400MHz, as
 * ((2 ^ 32) - 1) / (400MHz / 2) = 21s.  */
#define WATCHDOG_TIMEOUT 20

static int timeout = WATCHDOG_TIMEOUT;
module_param(timeout, int, 0);
MODULE_PARM_DESC(timeout, "Watchdog timeout value, in seconds (default="
		__MODULE_STRING(WATCHDOG_TIMEOUT) ")");

static int nowayout = WATCHDOG_NOWAYOUT;
module_param(nowayout, int, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
	__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");

/* apply or and nand masks to data read from addr and write back */
#define SET_BITS(addr, or, nand) \
	writel((readl(&addr) | or) & ~nand, &addr)

static int rc32434_wdt_set(int new_timeout)
{
	int max_to = WTCOMP2SEC((u32)-1);

	if (new_timeout < 0 || new_timeout > max_to) {
		printk(KERN_ERR PFX "timeout value must be between 0 and %d",
			max_to);
		return -EINVAL;
	}
	timeout = new_timeout;
	spin_lock(&rc32434_wdt_device.io_lock);
	writel(SEC2WTCOMP(timeout), &wdt_reg->wtcompare);
	spin_unlock(&rc32434_wdt_device.io_lock);

	return 0;
}

static void rc32434_wdt_start(void)
{
	u32 or, nand;

	spin_lock(&rc32434_wdt_device.io_lock);

	/* zero the counter before enabling */
	writel(0, &wdt_reg->wtcount);

	/* don't generate a non-maskable interrupt,
	 * do a warm reset instead */
	nand = 1 << RC32434_ERR_WNE;
	or = 1 << RC32434_ERR_WRE;

	/* reset the ERRCS timeout bit in case it's set */
	nand |= 1 << RC32434_ERR_WTO;

	SET_BITS(wdt_reg->errcs, or, nand);

	/* set the timeout (either default or based on module param) */
	rc32434_wdt_set(timeout);

	/* reset WTC timeout bit and enable WDT */
	nand = 1 << RC32434_WTC_TO;
	or = 1 << RC32434_WTC_EN;

	SET_BITS(wdt_reg->wtc, or, nand);

	spin_unlock(&rc32434_wdt_device.io_lock);
	printk(KERN_INFO PFX "Started watchdog timer.\n");
}

static void rc32434_wdt_stop(void)
{
	spin_lock(&rc32434_wdt_device.io_lock);

	/* Disable WDT */
	SET_BITS(wdt_reg->wtc, 0, 1 << RC32434_WTC_EN);

	spin_unlock(&rc32434_wdt_device.io_lock);
	printk(KERN_INFO PFX "Stopped watchdog timer.\n");
}

static void rc32434_wdt_ping(void)
{
	spin_lock(&rc32434_wdt_device.io_lock);
	writel(0, &wdt_reg->wtcount);
	spin_unlock(&rc32434_wdt_device.io_lock);
}

static int rc32434_wdt_open(struct inode *inode, struct file *file)
{
	if (test_and_set_bit(0, &rc32434_wdt_device.inuse))
		return -EBUSY;

	if (nowayout)
		__module_get(THIS_MODULE);

	rc32434_wdt_start();
	rc32434_wdt_ping();

	return nonseekable_open(inode, file);
}

static int rc32434_wdt_release(struct inode *inode, struct file *file)
{
	if (expect_close == 42) {
		rc32434_wdt_stop();
		module_put(THIS_MODULE);
	} else {
		printk(KERN_CRIT PFX
			"device closed unexpectedly. WDT will not stop!\n");
		rc32434_wdt_ping();
	}
	clear_bit(0, &rc32434_wdt_device.inuse);
	return 0;
}

static ssize_t rc32434_wdt_write(struct file *file, const char *data,
				size_t len, loff_t *ppos)
{
	if (len) {
		if (!nowayout) {
			size_t i;

			/* In case it was set long ago */
			expect_close = 0;

			for (i = 0; i != len; i++) {
				char c;
				if (get_user(c, data + i))
					return -EFAULT;
				if (c == 'V')
					expect_close = 42;
			}
		}
		rc32434_wdt_ping();
		return len;
	}
	return 0;
}

static long rc32434_wdt_ioctl(struct file *file, unsigned int cmd,
				unsigned long arg)
{
	void __user *argp = (void __user *)arg;
	int new_timeout;
	unsigned int value;
	static const struct watchdog_info ident = {
		.options =		WDIOF_SETTIMEOUT |
					WDIOF_KEEPALIVEPING |
					WDIOF_MAGICCLOSE,
		.identity =		"RC32434_WDT Watchdog",
	};
	switch (cmd) {
	case WDIOC_GETSUPPORT:
		if (copy_to_user(argp, &ident, sizeof(ident)))
			return -EFAULT;
		break;
	case WDIOC_GETSTATUS:
	case WDIOC_GETBOOTSTATUS:
		value = 0;
		if (copy_to_user(argp, &value, sizeof(int)))
			return -EFAULT;
		break;
	case WDIOC_SETOPTIONS:
		if (copy_from_user(&value, argp, sizeof(int)))
			return -EFAULT;
		switch (value) {
		case WDIOS_ENABLECARD:
			rc32434_wdt_start();
			break;
		case WDIOS_DISABLECARD:
			rc32434_wdt_stop();
			break;
		default:
			return -EINVAL;
		}
		break;
	case WDIOC_KEEPALIVE:
		rc32434_wdt_ping();
		break;
	case WDIOC_SETTIMEOUT:
		if (copy_from_user(&new_timeout, argp, sizeof(int)))
			return -EFAULT;
		if (rc32434_wdt_set(new_timeout))
			return -EINVAL;
		/* Fall through */
	case WDIOC_GETTIMEOUT:
		return copy_to_user(argp, &timeout, sizeof(int));
	default:
		return -ENOTTY;
	}

	return 0;
}

static const struct file_operations rc32434_wdt_fops = {
	.owner		= THIS_MODULE,
	.llseek		= no_llseek,
	.write		= rc32434_wdt_write,
	.unlocked_ioctl	= rc32434_wdt_ioctl,
	.open		= rc32434_wdt_open,
	.release	= rc32434_wdt_release,
};

static struct miscdevice rc32434_wdt_miscdev = {
	.minor	= WATCHDOG_MINOR,
	.name	= "watchdog",
	.fops	= &rc32434_wdt_fops,
};

static char banner[] __devinitdata = KERN_INFO PFX
		"Watchdog Timer version " VERSION ", timer margin: %d sec\n";

static int __devinit rc32434_wdt_probe(struct platform_device *pdev)
{
	int ret;
	struct resource *r;

	r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "rb532_wdt_res");
	if (!r) {
		printk(KERN_ERR PFX "failed to retrieve resources\n");
		return -ENODEV;
	}

	wdt_reg = ioremap_nocache(r->start, resource_size(r));
	if (!wdt_reg) {
		printk(KERN_ERR PFX "failed to remap I/O resources\n");
		return -ENXIO;
	}

	spin_lock_init(&rc32434_wdt_device.io_lock);

	/* Make sure the watchdog is not running */
	rc32434_wdt_stop();

	/* Check that the heartbeat value is within it's range;
	 * if not reset to the default */
	if (rc32434_wdt_set(timeout)) {
		rc32434_wdt_set(WATCHDOG_TIMEOUT);
		printk(KERN_INFO PFX
			"timeout value must be between 0 and %d\n",
			WTCOMP2SEC((u32)-1));
	}

	ret = misc_register(&rc32434_wdt_miscdev);
	if (ret < 0) {
		printk(KERN_ERR PFX "failed to register watchdog device\n");
		goto unmap;
	}

	printk(banner, timeout);

	return 0;

unmap:
	iounmap(wdt_reg);
	return ret;
}

static int __devexit rc32434_wdt_remove(struct platform_device *pdev)
{
	misc_deregister(&rc32434_wdt_miscdev);
	iounmap(wdt_reg);
	return 0;
}

static void rc32434_wdt_shutdown(struct platform_device *pdev)
{
	rc32434_wdt_stop();
}

static struct platform_driver rc32434_wdt_driver = {
	.probe		= rc32434_wdt_probe,
	.remove		= __devexit_p(rc32434_wdt_remove),
	.shutdown	= rc32434_wdt_shutdown,
	.driver		= {
			.name = "rc32434_wdt",
	}
};

static int __init rc32434_wdt_init(void)
{
	return platform_driver_register(&rc32434_wdt_driver);
}

static void __exit rc32434_wdt_exit(void)
{
	platform_driver_unregister(&rc32434_wdt_driver);
}

module_init(rc32434_wdt_init);
module_exit(rc32434_wdt_exit);

MODULE_AUTHOR("Ondrej Zajicek <santiago@crfreenet.org>,"
		"Florian Fainelli <florian@openwrt.org>");
MODULE_DESCRIPTION("Driver for the IDT RC32434 SoC watchdog");
MODULE_LICENSE("GPL");
MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
Commit	Line	Data
03ec5856 FF	1	/*
	2	* IDT Interprise 79RC32434 watchdog driver
	3	*
	4	* Copyright (C) 2006, Ondrej Zajicek <santiago@crfreenet.org>
	5	* Copyright (C) 2008, Florian Fainelli <florian@openwrt.org>
	6	*
	7	* based on
	8	* SoftDog 0.05: A Software Watchdog Device
	9	*
29fa0586 AC	10	* (c) Copyright 1996 Alan Cox <alan@lxorguk.ukuu.org.uk>,
29fa0586 AC	11	* All Rights Reserved.
03ec5856 FF	12	*
	13	* This program is free software; you can redistribute it and/or
	14	* modify it under the terms of the GNU General Public License
	15	* as published by the Free Software Foundation; either version
	16	* 2 of the License, or (at your option) any later version.
	17	*
	18	*/
	19
9b655e07 PS	20	#include <linux/module.h> /* For module specific items */
	21	#include <linux/moduleparam.h> /* For new moduleparam's */
	22	#include <linux/types.h> /* For standard types (like size_t) */
	23	#include <linux/errno.h> /* For the -ENODEV/... values */
	24	#include <linux/kernel.h> /* For printk/panic/... */
	25	#include <linux/fs.h> /* For file operations */
	26	#include <linux/miscdevice.h> /* For MODULE_ALIAS_MISCDEV
	27	(WATCHDOG_MINOR) */
	28	#include <linux/watchdog.h> /* For the watchdog specific items */
	29	#include <linux/init.h> /* For __init/__exit/... */
	30	#include <linux/platform_device.h> /* For platform_driver framework */
e455b6b4	31	#include <linux/spinlock.h> /* For spin_lock/spin_unlock/... */
9b655e07 PS	32	#include <linux/uaccess.h> /* For copy_to_user/put_user/... */
	33
	34	#include <asm/mach-rc32434/integ.h> /* For the Watchdog registers */
	35
	36	#define PFX KBUILD_MODNAME ": "
03ec5856	37
f296b143	38	#define VERSION "1.0"
03ec5856 FF	39
03ec5856 FF	40	static struct {
03ec5856	41	unsigned long inuse;
e455b6b4	42	spinlock_t io_lock;
03ec5856 FF	43	} rc32434_wdt_device;
	44
	45	static struct integ __iomem *wdt_reg;
03ec5856 FF	46
03ec5856 FF	47	static int expect_close;
0af98d37 PS	48
	49	/* Board internal clock speed in Hz,
	50	* the watchdog timer ticks at. */
	51	extern unsigned int idt_cpu_freq;
	52
	53	/* translate wtcompare value to seconds and vice versa */
	54	#define WTCOMP2SEC(x) (x / idt_cpu_freq)
	55	#define SEC2WTCOMP(x) (x * idt_cpu_freq)
	56
	57	/* Use a default timeout of 20s. This should be
	58	* safe for CPU clock speeds up to 400MHz, as
	59	* ((2 ^ 32) - 1) / (400MHz / 2) = 21s. */
	60	#define WATCHDOG_TIMEOUT 20
	61
	62	static int timeout = WATCHDOG_TIMEOUT;
08eb2e0c PS	63	module_param(timeout, int, 0);
08eb2e0c PS	64	MODULE_PARM_DESC(timeout, "Watchdog timeout value, in seconds (default="
810a90ae	65	__MODULE_STRING(WATCHDOG_TIMEOUT) ")");
03ec5856 FF	66
	67	static int nowayout = WATCHDOG_NOWAYOUT;
	68	module_param(nowayout, int, 0);
	69	MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
	70	__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
	71
0af98d37 PS	72	/* apply or and nand masks to data read from addr and write back */
	73	#define SET_BITS(addr, or, nand) \
	74	writel((readl(&addr) \| or) & ~nand, &addr)
03ec5856	75
08eb2e0c PS	76	static int rc32434_wdt_set(int new_timeout)
	77	{
	78	int max_to = WTCOMP2SEC((u32)-1);
	79
	80	if (new_timeout < 0 \|\| new_timeout > max_to) {
	81	printk(KERN_ERR PFX "timeout value must be between 0 and %d",
	82	max_to);
	83	return -EINVAL;
	84	}
	85	timeout = new_timeout;
e455b6b4	86	spin_lock(&rc32434_wdt_device.io_lock);
08eb2e0c	87	writel(SEC2WTCOMP(timeout), &wdt_reg->wtcompare);
e455b6b4	88	spin_unlock(&rc32434_wdt_device.io_lock);
08eb2e0c PS	89
	90	return 0;
	91	}
	92
03ec5856 FF	93	static void rc32434_wdt_start(void)
03ec5856 FF	94	{
0af98d37	95	u32 or, nand;
03ec5856	96
e455b6b4 WVS	97	spin_lock(&rc32434_wdt_device.io_lock);
e455b6b4 WVS	98
0af98d37 PS	99	/* zero the counter before enabling */
0af98d37 PS	100	writel(0, &wdt_reg->wtcount);
03ec5856	101
0af98d37 PS	102	/* don't generate a non-maskable interrupt,
	103	* do a warm reset instead */
	104	nand = 1 << RC32434_ERR_WNE;
	105	or = 1 << RC32434_ERR_WRE;
03ec5856	106
0af98d37 PS	107	/* reset the ERRCS timeout bit in case it's set */
0af98d37 PS	108	nand \|= 1 << RC32434_ERR_WTO;
03ec5856	109
0af98d37	110	SET_BITS(wdt_reg->errcs, or, nand);
03ec5856	111
08eb2e0c PS	112	/* set the timeout (either default or based on module param) */
	113	rc32434_wdt_set(timeout);
	114
0af98d37 PS	115	/* reset WTC timeout bit and enable WDT */
	116	nand = 1 << RC32434_WTC_TO;
	117	or = 1 << RC32434_WTC_EN;
03ec5856	118
0af98d37	119	SET_BITS(wdt_reg->wtc, or, nand);
9b655e07	120
e455b6b4	121	spin_unlock(&rc32434_wdt_device.io_lock);
9b655e07	122	printk(KERN_INFO PFX "Started watchdog timer.\n");
0af98d37	123	}
03ec5856	124
0af98d37 PS	125	static void rc32434_wdt_stop(void)
0af98d37 PS	126	{
e455b6b4 WVS	127	spin_lock(&rc32434_wdt_device.io_lock);
e455b6b4 WVS	128
0af98d37 PS	129	/* Disable WDT */
0af98d37 PS	130	SET_BITS(wdt_reg->wtc, 0, 1 << RC32434_WTC_EN);
9b655e07	131
e455b6b4	132	spin_unlock(&rc32434_wdt_device.io_lock);
9b655e07	133	printk(KERN_INFO PFX "Stopped watchdog timer.\n");
03ec5856 FF	134	}
03ec5856 FF	135
0af98d37	136	static void rc32434_wdt_ping(void)
03ec5856	137	{
e455b6b4	138	spin_lock(&rc32434_wdt_device.io_lock);
03ec5856	139	writel(0, &wdt_reg->wtcount);
e455b6b4	140	spin_unlock(&rc32434_wdt_device.io_lock);
03ec5856 FF	141	}
	142
	143	static int rc32434_wdt_open(struct inode inode, struct file file)
	144	{
	145	if (test_and_set_bit(0, &rc32434_wdt_device.inuse))
	146	return -EBUSY;
	147
	148	if (nowayout)
	149	__module_get(THIS_MODULE);
	150
0af98d37 PS	151	rc32434_wdt_start();
	152	rc32434_wdt_ping();
	153
03ec5856 FF	154	return nonseekable_open(inode, file);
	155	}
	156
	157	static int rc32434_wdt_release(struct inode inode, struct file file)
	158	{
0af98d37	159	if (expect_close == 42) {
03ec5856	160	rc32434_wdt_stop();
03ec5856	161	module_put(THIS_MODULE);
0af98d37	162	} else {
9b655e07 PS	163	printk(KERN_CRIT PFX
9b655e07 PS	164	"device closed unexpectedly. WDT will not stop!\n");
0af98d37 PS	165	rc32434_wdt_ping();
0af98d37 PS	166	}
03ec5856 FF	167	clear_bit(0, &rc32434_wdt_device.inuse);
	168	return 0;
	169	}
	170
	171	static ssize_t rc32434_wdt_write(struct file file, const char data,
	172	size_t len, loff_t *ppos)
	173	{
	174	if (len) {
	175	if (!nowayout) {
	176	size_t i;
	177
	178	/* In case it was set long ago */
	179	expect_close = 0;
	180
	181	for (i = 0; i != len; i++) {
	182	char c;
	183	if (get_user(c, data + i))
	184	return -EFAULT;
	185	if (c == 'V')
0af98d37	186	expect_close = 42;
03ec5856 FF	187	}
03ec5856 FF	188	}
0af98d37	189	rc32434_wdt_ping();
03ec5856 FF	190	return len;
	191	}
	192	return 0;
	193	}
	194
7275fc8c WVS	195	static long rc32434_wdt_ioctl(struct file *file, unsigned int cmd,
7275fc8c WVS	196	unsigned long arg)
03ec5856 FF	197	{
	198	void __user argp = (void __user )arg;
	199	int new_timeout;
	200	unsigned int value;
42747d71	201	static const struct watchdog_info ident = {
03ec5856 FF	202	.options = WDIOF_SETTIMEOUT \|
	203	WDIOF_KEEPALIVEPING \|
	204	WDIOF_MAGICCLOSE,
	205	.identity = "RC32434_WDT Watchdog",
	206	};
	207	switch (cmd) {
9b655e07 PS	208	case WDIOC_GETSUPPORT:
	209	if (copy_to_user(argp, &ident, sizeof(ident)))
	210	return -EFAULT;
03ec5856 FF	211	break;
	212	case WDIOC_GETSTATUS:
	213	case WDIOC_GETBOOTSTATUS:
0af98d37	214	value = 0;
03ec5856 FF	215	if (copy_to_user(argp, &value, sizeof(int)))
	216	return -EFAULT;
	217	break;
03ec5856 FF	218	case WDIOC_SETOPTIONS:
	219	if (copy_from_user(&value, argp, sizeof(int)))
	220	return -EFAULT;
	221	switch (value) {
	222	case WDIOS_ENABLECARD:
	223	rc32434_wdt_start();
	224	break;
	225	case WDIOS_DISABLECARD:
	226	rc32434_wdt_stop();
0af98d37	227	break;
03ec5856 FF	228	default:
	229	return -EINVAL;
	230	}
	231	break;
9b655e07 PS	232	case WDIOC_KEEPALIVE:
	233	rc32434_wdt_ping();
	234	break;
03ec5856 FF	235	case WDIOC_SETTIMEOUT:
	236	if (copy_from_user(&new_timeout, argp, sizeof(int)))
	237	return -EFAULT;
0af98d37	238	if (rc32434_wdt_set(new_timeout))
03ec5856	239	return -EINVAL;
0af98d37	240	/* Fall through */
03ec5856 FF	241	case WDIOC_GETTIMEOUT:
	242	return copy_to_user(argp, &timeout, sizeof(int));
	243	default:
	244	return -ENOTTY;
	245	}
	246
	247	return 0;
	248	}
	249
d5c26a59	250	static const struct file_operations rc32434_wdt_fops = {
03ec5856 FF	251	.owner = THIS_MODULE,
	252	.llseek = no_llseek,
	253	.write = rc32434_wdt_write,
7275fc8c	254	.unlocked_ioctl = rc32434_wdt_ioctl,
03ec5856 FF	255	.open = rc32434_wdt_open,
	256	.release = rc32434_wdt_release,
	257	};
	258
	259	static struct miscdevice rc32434_wdt_miscdev = {
	260	.minor = WATCHDOG_MINOR,
	261	.name = "watchdog",
	262	.fops = &rc32434_wdt_fops,
	263	};
	264
9b655e07 PS	265	static char banner[] __devinitdata = KERN_INFO PFX
9b655e07 PS	266	"Watchdog Timer version " VERSION ", timer margin: %d sec\n";
03ec5856	267
d9a8798c	268	static int __devinit rc32434_wdt_probe(struct platform_device *pdev)
03ec5856 FF	269	{
	270	int ret;
	271	struct resource *r;
	272
0af98d37	273	r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "rb532_wdt_res");
03ec5856	274	if (!r) {
9b655e07	275	printk(KERN_ERR PFX "failed to retrieve resources\n");
03ec5856 FF	276	return -ENODEV;
	277	}
	278
be088b13	279	wdt_reg = ioremap_nocache(r->start, resource_size(r));
03ec5856	280	if (!wdt_reg) {
9b655e07	281	printk(KERN_ERR PFX "failed to remap I/O resources\n");
03ec5856 FF	282	return -ENXIO;
	283	}
	284
e455b6b4 WVS	285	spin_lock_init(&rc32434_wdt_device.io_lock);
e455b6b4 WVS	286
f296b143 WVS	287	/* Make sure the watchdog is not running */
	288	rc32434_wdt_stop();
	289
08eb2e0c PS	290	/* Check that the heartbeat value is within it's range;
	291	* if not reset to the default */
	292	if (rc32434_wdt_set(timeout)) {
	293	rc32434_wdt_set(WATCHDOG_TIMEOUT);
	294	printk(KERN_INFO PFX
	295	"timeout value must be between 0 and %d\n",
	296	WTCOMP2SEC((u32)-1));
	297	}
	298
03ec5856	299	ret = misc_register(&rc32434_wdt_miscdev);
03ec5856	300	if (ret < 0) {
9b655e07	301	printk(KERN_ERR PFX "failed to register watchdog device\n");
03ec5856 FF	302	goto unmap;
	303	}
	304
03ec5856 FF	305	printk(banner, timeout);
	306
	307	return 0;
	308
	309	unmap:
	310	iounmap(wdt_reg);
	311	return ret;
	312	}
	313
d9a8798c	314	static int __devexit rc32434_wdt_remove(struct platform_device *pdev)
03ec5856	315	{
03ec5856	316	misc_deregister(&rc32434_wdt_miscdev);
03ec5856	317	iounmap(wdt_reg);
03ec5856 FF	318	return 0;
	319	}
	320
0aaae661 WVS	321	static void rc32434_wdt_shutdown(struct platform_device *pdev)
	322	{
	323	rc32434_wdt_stop();
	324	}
	325
9b655e07	326	static struct platform_driver rc32434_wdt_driver = {
0aaae661 WVS	327	.probe = rc32434_wdt_probe,
	328	.remove = __devexit_p(rc32434_wdt_remove),
	329	.shutdown = rc32434_wdt_shutdown,
	330	.driver = {
	331	.name = "rc32434_wdt",
03ec5856 FF	332	}
	333	};
	334
	335	static int __init rc32434_wdt_init(void)
	336	{
9b655e07	337	return platform_driver_register(&rc32434_wdt_driver);
03ec5856 FF	338	}
	339
	340	static void __exit rc32434_wdt_exit(void)
	341	{
9b655e07	342	platform_driver_unregister(&rc32434_wdt_driver);
03ec5856 FF	343	}
	344
	345	module_init(rc32434_wdt_init);
	346	module_exit(rc32434_wdt_exit);
	347
	348	MODULE_AUTHOR("Ondrej Zajicek <santiago@crfreenet.org>,"
	349	"Florian Fainelli <florian@openwrt.org>");
	350	MODULE_DESCRIPTION("Driver for the IDT RC32434 SoC watchdog");
	351	MODULE_LICENSE("GPL");
	352	MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);