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7768a13c 1/*
2817142f 2 * omap_wdt.c
7768a13c 3 *
2817142f 4 * Watchdog driver for the TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog
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5 *
6 * Author: MontaVista Software, Inc.
7 * <gdavis@mvista.com> or <source@mvista.com>
8 *
9 * 2003 (c) MontaVista Software, Inc. This file is licensed under the
10 * terms of the GNU General Public License version 2. This program is
11 * licensed "as is" without any warranty of any kind, whether express
12 * or implied.
13 *
14 * History:
15 *
16 * 20030527: George G. Davis <gdavis@mvista.com>
17 * Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
18 * (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
29fa0586 19 * Based on SoftDog driver by Alan Cox <alan@lxorguk.ukuu.org.uk>
7768a13c
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20 *
21 * Copyright (c) 2004 Texas Instruments.
22 * 1. Modified to support OMAP1610 32-KHz watchdog timer
23 * 2. Ported to 2.6 kernel
24 *
25 * Copyright (c) 2005 David Brownell
26 * Use the driver model and standard identifiers; handle bigger timeouts.
27 */
28
29#include <linux/module.h>
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30#include <linux/types.h>
31#include <linux/kernel.h>
32#include <linux/fs.h>
33#include <linux/mm.h>
34#include <linux/miscdevice.h>
35#include <linux/watchdog.h>
36#include <linux/reboot.h>
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37#include <linux/init.h>
38#include <linux/err.h>
39#include <linux/platform_device.h>
40#include <linux/moduleparam.h>
1977f032 41#include <linux/bitops.h>
089ab079 42#include <linux/io.h>
12b9df7d 43#include <linux/uaccess.h>
5a0e3ad6 44#include <linux/slab.h>
7ec5ad0f 45#include <linux/pm_runtime.h>
a09e64fb 46#include <mach/hardware.h>
ce491cf8 47#include <plat/prcm.h>
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48
49#include "omap_wdt.h"
50
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51static struct platform_device *omap_wdt_dev;
52
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53static unsigned timer_margin;
54module_param(timer_margin, uint, 0);
55MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)");
56
7768a13c 57static unsigned int wdt_trgr_pattern = 0x1234;
12b9df7d 58static spinlock_t wdt_lock;
7768a13c 59
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60struct omap_wdt_dev {
61 void __iomem *base; /* physical */
62 struct device *dev;
63 int omap_wdt_users;
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64 struct resource *mem;
65 struct miscdevice omap_wdt_miscdev;
66};
67
68static void omap_wdt_ping(struct omap_wdt_dev *wdev)
7768a13c 69{
2817142f 70 void __iomem *base = wdev->base;
b3112180 71
7768a13c 72 /* wait for posted write to complete */
9f69e3b0 73 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
7768a13c 74 cpu_relax();
b3112180 75
7768a13c 76 wdt_trgr_pattern = ~wdt_trgr_pattern;
9f69e3b0 77 __raw_writel(wdt_trgr_pattern, (base + OMAP_WATCHDOG_TGR));
b3112180 78
7768a13c 79 /* wait for posted write to complete */
9f69e3b0 80 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
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81 cpu_relax();
82 /* reloaded WCRR from WLDR */
83}
84
2817142f 85static void omap_wdt_enable(struct omap_wdt_dev *wdev)
7768a13c 86{
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87 void __iomem *base = wdev->base;
88
7768a13c 89 /* Sequence to enable the watchdog */
9f69e3b0
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90 __raw_writel(0xBBBB, base + OMAP_WATCHDOG_SPR);
91 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
7768a13c 92 cpu_relax();
b3112180 93
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94 __raw_writel(0x4444, base + OMAP_WATCHDOG_SPR);
95 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
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96 cpu_relax();
97}
98
2817142f 99static void omap_wdt_disable(struct omap_wdt_dev *wdev)
7768a13c 100{
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101 void __iomem *base = wdev->base;
102
7768a13c 103 /* sequence required to disable watchdog */
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104 __raw_writel(0xAAAA, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
105 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
7768a13c 106 cpu_relax();
b3112180 107
9f69e3b0
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108 __raw_writel(0x5555, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
109 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
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110 cpu_relax();
111}
112
113static void omap_wdt_adjust_timeout(unsigned new_timeout)
114{
115 if (new_timeout < TIMER_MARGIN_MIN)
116 new_timeout = TIMER_MARGIN_DEFAULT;
117 if (new_timeout > TIMER_MARGIN_MAX)
118 new_timeout = TIMER_MARGIN_MAX;
119 timer_margin = new_timeout;
120}
121
2817142f 122static void omap_wdt_set_timeout(struct omap_wdt_dev *wdev)
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123{
124 u32 pre_margin = GET_WLDR_VAL(timer_margin);
b3112180 125 void __iomem *base = wdev->base;
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126
127 /* just count up at 32 KHz */
9f69e3b0 128 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
7768a13c 129 cpu_relax();
b3112180 130
9f69e3b0
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131 __raw_writel(pre_margin, base + OMAP_WATCHDOG_LDR);
132 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
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133 cpu_relax();
134}
135
136/*
137 * Allow only one task to hold it open
138 */
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139static int omap_wdt_open(struct inode *inode, struct file *file)
140{
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141 struct omap_wdt_dev *wdev = platform_get_drvdata(omap_wdt_dev);
142 void __iomem *base = wdev->base;
143
2817142f 144 if (test_and_set_bit(1, (unsigned long *)&(wdev->omap_wdt_users)))
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145 return -EBUSY;
146
7ec5ad0f 147 pm_runtime_get_sync(wdev->dev);
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148
149 /* initialize prescaler */
9f69e3b0 150 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
7768a13c 151 cpu_relax();
b3112180 152
9f69e3b0
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153 __raw_writel((1 << 5) | (PTV << 2), base + OMAP_WATCHDOG_CNTRL);
154 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
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155 cpu_relax();
156
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157 file->private_data = (void *) wdev;
158
159 omap_wdt_set_timeout(wdev);
789cd470 160 omap_wdt_ping(wdev); /* trigger loading of new timeout value */
2817142f 161 omap_wdt_enable(wdev);
b3112180 162
ec9505a7 163 return nonseekable_open(inode, file);
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164}
165
166static int omap_wdt_release(struct inode *inode, struct file *file)
167{
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168 struct omap_wdt_dev *wdev = file->private_data;
169
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170 /*
171 * Shut off the timer unless NOWAYOUT is defined.
172 */
173#ifndef CONFIG_WATCHDOG_NOWAYOUT
7768a13c 174
2817142f 175 omap_wdt_disable(wdev);
7768a13c 176
7ec5ad0f 177 pm_runtime_put_sync(wdev->dev);
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178#else
179 printk(KERN_CRIT "omap_wdt: Unexpected close, not stopping!\n");
180#endif
2817142f 181 wdev->omap_wdt_users = 0;
b3112180 182
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183 return 0;
184}
185
12b9df7d 186static ssize_t omap_wdt_write(struct file *file, const char __user *data,
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187 size_t len, loff_t *ppos)
188{
b3112180
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189 struct omap_wdt_dev *wdev = file->private_data;
190
7768a13c 191 /* Refresh LOAD_TIME. */
12b9df7d
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192 if (len) {
193 spin_lock(&wdt_lock);
2817142f 194 omap_wdt_ping(wdev);
12b9df7d
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195 spin_unlock(&wdt_lock);
196 }
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197 return len;
198}
199
12b9df7d
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200static long omap_wdt_ioctl(struct file *file, unsigned int cmd,
201 unsigned long arg)
7768a13c 202{
2817142f 203 struct omap_wdt_dev *wdev;
7768a13c 204 int new_margin;
12b9df7d 205 static const struct watchdog_info ident = {
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206 .identity = "OMAP Watchdog",
207 .options = WDIOF_SETTIMEOUT,
208 .firmware_version = 0,
209 };
b3112180 210
2817142f 211 wdev = file->private_data;
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212
213 switch (cmd) {
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214 case WDIOC_GETSUPPORT:
215 return copy_to_user((struct watchdog_info __user *)arg, &ident,
216 sizeof(ident));
217 case WDIOC_GETSTATUS:
218 return put_user(0, (int __user *)arg);
219 case WDIOC_GETBOOTSTATUS:
220 if (cpu_is_omap16xx())
9f69e3b0 221 return put_user(__raw_readw(ARM_SYSST),
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222 (int __user *)arg);
223 if (cpu_is_omap24xx())
224 return put_user(omap_prcm_get_reset_sources(),
225 (int __user *)arg);
226 case WDIOC_KEEPALIVE:
12b9df7d 227 spin_lock(&wdt_lock);
2817142f 228 omap_wdt_ping(wdev);
12b9df7d 229 spin_unlock(&wdt_lock);
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230 return 0;
231 case WDIOC_SETTIMEOUT:
232 if (get_user(new_margin, (int __user *)arg))
233 return -EFAULT;
234 omap_wdt_adjust_timeout(new_margin);
235
12b9df7d 236 spin_lock(&wdt_lock);
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237 omap_wdt_disable(wdev);
238 omap_wdt_set_timeout(wdev);
239 omap_wdt_enable(wdev);
7768a13c 240
2817142f 241 omap_wdt_ping(wdev);
12b9df7d 242 spin_unlock(&wdt_lock);
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243 /* Fall */
244 case WDIOC_GETTIMEOUT:
245 return put_user(timer_margin, (int __user *)arg);
0c06090c
WVS
246 default:
247 return -ENOTTY;
7768a13c
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248 }
249}
250
2b8693c0 251static const struct file_operations omap_wdt_fops = {
7768a13c
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252 .owner = THIS_MODULE,
253 .write = omap_wdt_write,
12b9df7d 254 .unlocked_ioctl = omap_wdt_ioctl,
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255 .open = omap_wdt_open,
256 .release = omap_wdt_release,
6038f373 257 .llseek = no_llseek,
7768a13c
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258};
259
0e3912c7 260static int __devinit omap_wdt_probe(struct platform_device *pdev)
7768a13c
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261{
262 struct resource *res, *mem;
2817142f 263 struct omap_wdt_dev *wdev;
b3112180 264 int ret;
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265
266 /* reserve static register mappings */
267 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
b3112180
FB
268 if (!res) {
269 ret = -ENOENT;
270 goto err_get_resource;
271 }
7768a13c 272
b3112180
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273 if (omap_wdt_dev) {
274 ret = -EBUSY;
275 goto err_busy;
276 }
2817142f 277
b782a563 278 mem = request_mem_region(res->start, resource_size(res), pdev->name);
b3112180
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279 if (!mem) {
280 ret = -EBUSY;
281 goto err_busy;
282 }
7768a13c 283
2817142f
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284 wdev = kzalloc(sizeof(struct omap_wdt_dev), GFP_KERNEL);
285 if (!wdev) {
286 ret = -ENOMEM;
b3112180 287 goto err_kzalloc;
2817142f 288 }
b3112180 289
2817142f
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290 wdev->omap_wdt_users = 0;
291 wdev->mem = mem;
7ec5ad0f 292 wdev->dev = &pdev->dev;
2817142f 293
b782a563 294 wdev->base = ioremap(res->start, resource_size(res));
9f69e3b0
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295 if (!wdev->base) {
296 ret = -ENOMEM;
b3112180 297 goto err_ioremap;
9f69e3b0
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298 }
299
2817142f 300 platform_set_drvdata(pdev, wdev);
7768a13c 301
7ec5ad0f
VC
302 pm_runtime_enable(wdev->dev);
303 pm_runtime_get_sync(wdev->dev);
789cd470 304
2817142f 305 omap_wdt_disable(wdev);
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306 omap_wdt_adjust_timeout(timer_margin);
307
2817142f
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308 wdev->omap_wdt_miscdev.parent = &pdev->dev;
309 wdev->omap_wdt_miscdev.minor = WATCHDOG_MINOR;
310 wdev->omap_wdt_miscdev.name = "watchdog";
311 wdev->omap_wdt_miscdev.fops = &omap_wdt_fops;
312
313 ret = misc_register(&(wdev->omap_wdt_miscdev));
7768a13c 314 if (ret)
b3112180 315 goto err_misc;
7768a13c 316
2817142f 317 pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n",
9f69e3b0 318 __raw_readl(wdev->base + OMAP_WATCHDOG_REV) & 0xFF,
2817142f 319 timer_margin);
7768a13c 320
7ec5ad0f 321 pm_runtime_put_sync(wdev->dev);
789cd470 322
2817142f
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323 omap_wdt_dev = pdev;
324
7768a13c
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325 return 0;
326
b3112180
FB
327err_misc:
328 platform_set_drvdata(pdev, NULL);
329 iounmap(wdev->base);
330
331err_ioremap:
332 wdev->base = NULL;
b3112180
FB
333 kfree(wdev);
334
335err_kzalloc:
b782a563 336 release_mem_region(res->start, resource_size(res));
b3112180
FB
337
338err_busy:
339err_get_resource:
340
7768a13c
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341 return ret;
342}
343
344static void omap_wdt_shutdown(struct platform_device *pdev)
345{
b3112180 346 struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
2817142f
FB
347
348 if (wdev->omap_wdt_users)
349 omap_wdt_disable(wdev);
7768a13c
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350}
351
0e3912c7 352static int __devexit omap_wdt_remove(struct platform_device *pdev)
7768a13c 353{
b3112180 354 struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
2817142f
FB
355 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
356
357 if (!res)
358 return -ENOENT;
359
360 misc_deregister(&(wdev->omap_wdt_miscdev));
b782a563 361 release_mem_region(res->start, resource_size(res));
2817142f 362 platform_set_drvdata(pdev, NULL);
b3112180 363
9f69e3b0
FB
364 iounmap(wdev->base);
365
2817142f
FB
366 kfree(wdev);
367 omap_wdt_dev = NULL;
b3112180 368
7768a13c
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369 return 0;
370}
371
372#ifdef CONFIG_PM
373
374/* REVISIT ... not clear this is the best way to handle system suspend; and
375 * it's very inappropriate for selective device suspend (e.g. suspending this
376 * through sysfs rather than by stopping the watchdog daemon). Also, this
377 * may not play well enough with NOWAYOUT...
378 */
379
380static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state)
381{
b3112180
FB
382 struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
383
2817142f
FB
384 if (wdev->omap_wdt_users)
385 omap_wdt_disable(wdev);
b3112180 386
7768a13c
KS
387 return 0;
388}
389
390static int omap_wdt_resume(struct platform_device *pdev)
391{
b3112180
FB
392 struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
393
2817142f
FB
394 if (wdev->omap_wdt_users) {
395 omap_wdt_enable(wdev);
396 omap_wdt_ping(wdev);
7768a13c 397 }
b3112180 398
7768a13c
KS
399 return 0;
400}
401
402#else
403#define omap_wdt_suspend NULL
404#define omap_wdt_resume NULL
405#endif
406
407static struct platform_driver omap_wdt_driver = {
408 .probe = omap_wdt_probe,
0e3912c7 409 .remove = __devexit_p(omap_wdt_remove),
7768a13c
KS
410 .shutdown = omap_wdt_shutdown,
411 .suspend = omap_wdt_suspend,
412 .resume = omap_wdt_resume,
413 .driver = {
414 .owner = THIS_MODULE,
415 .name = "omap_wdt",
416 },
417};
418
419static int __init omap_wdt_init(void)
420{
12b9df7d 421 spin_lock_init(&wdt_lock);
7768a13c
KS
422 return platform_driver_register(&omap_wdt_driver);
423}
424
425static void __exit omap_wdt_exit(void)
426{
427 platform_driver_unregister(&omap_wdt_driver);
428}
429
430module_init(omap_wdt_init);
431module_exit(omap_wdt_exit);
432
433MODULE_AUTHOR("George G. Davis");
434MODULE_LICENSE("GPL");
435MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
f37d193c 436MODULE_ALIAS("platform:omap_wdt");