[net-next-2.6.git] / drivers / watchdog / iTCO_vendor_support.c

/*
 *	intel TCO vendor specific watchdog driver support
 *
 *	(c) Copyright 2006-2009 Wim Van Sebroeck <wim@iguana.be>.
 *
 *	This program is free software; you can redistribute it and/or
 *	modify it under the terms of the GNU General Public License
 *	as published by the Free Software Foundation; either version
 *	2 of the License, or (at your option) any later version.
 *
 *	Neither Wim Van Sebroeck nor Iguana vzw. admit liability nor
 *	provide warranty for any of this software. This material is
 *	provided "AS-IS" and at no charge.
 */

/*
 *	Includes, defines, variables, module parameters, ...
 */

/* Module and version information */
#define DRV_NAME	"iTCO_vendor_support"
#define DRV_VERSION	"1.03"
#define PFX		DRV_NAME ": "

/* Includes */
#include <linux/module.h>		/* For module specific items */
#include <linux/moduleparam.h>		/* For new moduleparam's */
#include <linux/types.h>		/* For standard types (like size_t) */
#include <linux/errno.h>		/* For the -ENODEV/... values */
#include <linux/kernel.h>		/* For printk/panic/... */
#include <linux/init.h>			/* For __init/__exit/... */
#include <linux/ioport.h>		/* For io-port access */
#include <linux/io.h>			/* For inb/outb/... */

#include "iTCO_vendor.h"

/* iTCO defines */
#define	SMI_EN		(acpibase + 0x30) /* SMI Control and Enable Register */
#define	TCOBASE		(acpibase + 0x60) /* TCO base address */
#define	TCO1_STS	(TCOBASE + 0x04)  /* TCO1 Status Register */

/* List of vendor support modes */
/* SuperMicro Pentium 3 Era 370SSE+-OEM1/P3TSSE */
#define SUPERMICRO_OLD_BOARD	1
/* SuperMicro Pentium 4 / Xeon 4 / EMT64T Era Systems */
#define SUPERMICRO_NEW_BOARD	2

static int vendorsupport;
module_param(vendorsupport, int, 0);
MODULE_PARM_DESC(vendorsupport, "iTCO vendor specific support mode, default="
			"0 (none), 1=SuperMicro Pent3, 2=SuperMicro Pent4+");

/*
 *	Vendor Specific Support
 */

/*
 *	Vendor Support: 1
 *	Board: Super Micro Computer Inc. 370SSE+-OEM1/P3TSSE
 *	iTCO chipset: ICH2
 *
 *	Code contributed by: R. Seretny <lkpatches@paypc.com>
 *	Documentation obtained by R. Seretny from SuperMicro Technical Support
 *
 *	To enable Watchdog function:
 *	    BIOS setup -> Power -> TCO Logic SMI Enable -> Within5Minutes
 *	    This setting enables SMI to clear the watchdog expired flag.
 *	    If BIOS or CPU fail which may cause SMI hang, then system will
 *	    reboot. When application starts to use watchdog function,
 *	    application has to take over the control from SMI.
 *
 *	    For P3TSSE, J36 jumper needs to be removed to enable the Watchdog
 *	    function.
 *
 *	    Note: The system will reboot when Expire Flag is set TWICE.
 *	    So, if the watchdog timer is 20 seconds, then the maximum hang
 *	    time is about 40 seconds, and the minimum hang time is about
 *	    20.6 seconds.
 */

static void supermicro_old_pre_start(unsigned long acpibase)
{
	unsigned long val32;

	/* Bit 13: TCO_EN -> 0 = Disables TCO logic generating an SMI# */
	val32 = inl(SMI_EN);
	val32 &= 0xffffdfff;	/* Turn off SMI clearing watchdog */
	outl(val32, SMI_EN);	/* Needed to activate watchdog */
}

static void supermicro_old_pre_stop(unsigned long acpibase)
{
	unsigned long val32;

	/* Bit 13: TCO_EN -> 1 = Enables the TCO logic to generate SMI# */
	val32 = inl(SMI_EN);
	val32 |= 0x00002000;	/* Turn on SMI clearing watchdog */
	outl(val32, SMI_EN);	/* Needed to deactivate watchdog */
}

static void supermicro_old_pre_keepalive(unsigned long acpibase)
{
	/* Reload TCO Timer (done in iTCO_wdt_keepalive) + */
	/* Clear "Expire Flag" (Bit 3 of TC01_STS register) */
	outb(0x08, TCO1_STS);
}

/*
 *	Vendor Support: 2
 *	Board: Super Micro Computer Inc. P4SBx, P4DPx
 *	iTCO chipset: ICH4
 *
 *	Code contributed by: R. Seretny <lkpatches@paypc.com>
 *	Documentation obtained by R. Seretny from SuperMicro Technical Support
 *
 *	To enable Watchdog function:
 *	 1. BIOS
 *	  For P4SBx:
 *	  BIOS setup -> Advanced -> Integrated Peripherals -> Watch Dog Feature
 *	  For P4DPx:
 *	  BIOS setup -> Advanced -> I/O Device Configuration -> Watch Dog
 *	 This setting enables or disables Watchdog function. When enabled, the
 *	 default watchdog timer is set to be 5 minutes (about 4m35s). It is
 *	 enough to load and run the OS. The application (service or driver) has
 *	 to take over the control once OS is running up and before watchdog
 *	 expires.
 *
 *	 2. JUMPER
 *	  For P4SBx: JP39
 *	  For P4DPx: JP37
 *	  This jumper is used for safety.  Closed is enabled. This jumper
 *	  prevents user enables watchdog in BIOS by accident.
 *
 *	 To enable Watch Dog function, both BIOS and JUMPER must be enabled.
 *
 *	The documentation lists motherboards P4SBx and P4DPx series as of
 *	20-March-2002. However, this code works flawlessly with much newer
 *	motherboards, such as my X6DHR-8G2 (SuperServer 6014H-82).
 *
 *	The original iTCO driver as written does not actually reset the
 *	watchdog timer on these machines, as a result they reboot after five
 *	minutes.
 *
 *	NOTE: You may leave the Watchdog function disabled in the SuperMicro
 *	BIOS to avoid a "boot-race"... This driver will enable watchdog
 *	functionality even if it's disabled in the BIOS once the /dev/watchdog
 *	file is opened.
 */

/* I/O Port's */
#define SM_REGINDEX	0x2e	/* SuperMicro ICH4+ Register Index */
#define SM_DATAIO	0x2f	/* SuperMicro ICH4+ Register Data I/O */

/* Control Register's */
#define SM_CTLPAGESW	0x07	/* SuperMicro ICH4+ Control Page Switch */
#define SM_CTLPAGE	0x08	/* SuperMicro ICH4+ Control Page Num */

#define SM_WATCHENABLE	0x30	/* Watchdog enable: Bit 0: 0=off, 1=on */

#define SM_WATCHPAGE	0x87	/* Watchdog unlock control page */

#define SM_ENDWATCH	0xAA	/* Watchdog lock control page */

#define SM_COUNTMODE	0xf5	/* Watchdog count mode select */
				/* (Bit 3: 0 = seconds, 1 = minutes */

#define SM_WATCHTIMER	0xf6	/* 8-bits, Watchdog timer counter (RW) */

#define SM_RESETCONTROL	0xf7	/* Watchdog reset control */
				/* Bit 6: timer is reset by kbd interrupt */
				/* Bit 7: timer is reset by mouse interrupt */

static void supermicro_new_unlock_watchdog(void)
{
	/* Write 0x87 to port 0x2e twice */
	outb(SM_WATCHPAGE, SM_REGINDEX);
	outb(SM_WATCHPAGE, SM_REGINDEX);
	/* Switch to watchdog control page */
	outb(SM_CTLPAGESW, SM_REGINDEX);
	outb(SM_CTLPAGE, SM_DATAIO);
}

static void supermicro_new_lock_watchdog(void)
{
	outb(SM_ENDWATCH, SM_REGINDEX);
}

static void supermicro_new_pre_start(unsigned int heartbeat)
{
	unsigned int val;

	supermicro_new_unlock_watchdog();

	/* Watchdog timer setting needs to be in seconds*/
	outb(SM_COUNTMODE, SM_REGINDEX);
	val = inb(SM_DATAIO);
	val &= 0xF7;
	outb(val, SM_DATAIO);

	/* Write heartbeat interval to WDOG */
	outb(SM_WATCHTIMER, SM_REGINDEX);
	outb((heartbeat & 255), SM_DATAIO);

	/* Make sure keyboard/mouse interrupts don't interfere */
	outb(SM_RESETCONTROL, SM_REGINDEX);
	val = inb(SM_DATAIO);
	val &= 0x3f;
	outb(val, SM_DATAIO);

	/* enable watchdog by setting bit 0 of Watchdog Enable to 1 */
	outb(SM_WATCHENABLE, SM_REGINDEX);
	val = inb(SM_DATAIO);
	val |= 0x01;
	outb(val, SM_DATAIO);

	supermicro_new_lock_watchdog();
}

static void supermicro_new_pre_stop(void)
{
	unsigned int val;

	supermicro_new_unlock_watchdog();

	/* disable watchdog by setting bit 0 of Watchdog Enable to 0 */
	outb(SM_WATCHENABLE, SM_REGINDEX);
	val = inb(SM_DATAIO);
	val &= 0xFE;
	outb(val, SM_DATAIO);

	supermicro_new_lock_watchdog();
}

static void supermicro_new_pre_set_heartbeat(unsigned int heartbeat)
{
	supermicro_new_unlock_watchdog();

	/* reset watchdog timeout to heartveat value */
	outb(SM_WATCHTIMER, SM_REGINDEX);
	outb((heartbeat & 255), SM_DATAIO);

	supermicro_new_lock_watchdog();
}

/*
 *	Generic Support Functions
 */

void iTCO_vendor_pre_start(unsigned long acpibase,
			   unsigned int heartbeat)
{
	if (vendorsupport == SUPERMICRO_OLD_BOARD)
		supermicro_old_pre_start(acpibase);
	else if (vendorsupport == SUPERMICRO_NEW_BOARD)
		supermicro_new_pre_start(heartbeat);
}
EXPORT_SYMBOL(iTCO_vendor_pre_start);

void iTCO_vendor_pre_stop(unsigned long acpibase)
{
	if (vendorsupport == SUPERMICRO_OLD_BOARD)
		supermicro_old_pre_stop(acpibase);
	else if (vendorsupport == SUPERMICRO_NEW_BOARD)
		supermicro_new_pre_stop();
}
EXPORT_SYMBOL(iTCO_vendor_pre_stop);

void iTCO_vendor_pre_keepalive(unsigned long acpibase, unsigned int heartbeat)
{
	if (vendorsupport == SUPERMICRO_OLD_BOARD)
		supermicro_old_pre_keepalive(acpibase);
	else if (vendorsupport == SUPERMICRO_NEW_BOARD)
		supermicro_new_pre_set_heartbeat(heartbeat);
}
EXPORT_SYMBOL(iTCO_vendor_pre_keepalive);

void iTCO_vendor_pre_set_heartbeat(unsigned int heartbeat)
{
	if (vendorsupport == SUPERMICRO_NEW_BOARD)
		supermicro_new_pre_set_heartbeat(heartbeat);
}
EXPORT_SYMBOL(iTCO_vendor_pre_set_heartbeat);

int iTCO_vendor_check_noreboot_on(void)
{
	switch (vendorsupport) {
	case SUPERMICRO_OLD_BOARD:
		return 0;
	default:
		return 1;
	}
}
EXPORT_SYMBOL(iTCO_vendor_check_noreboot_on);

static int __init iTCO_vendor_init_module(void)
{
	printk(KERN_INFO PFX "vendor-support=%d\n", vendorsupport);
	return 0;
}

static void __exit iTCO_vendor_exit_module(void)
{
	printk(KERN_INFO PFX "Module Unloaded\n");
}

module_init(iTCO_vendor_init_module);
module_exit(iTCO_vendor_exit_module);

MODULE_AUTHOR("Wim Van Sebroeck <wim@iguana.be>, "
		"R. Seretny <lkpatches@paypc.com>");
MODULE_DESCRIPTION("Intel TCO Vendor Specific WatchDog Timer Driver Support");
MODULE_VERSION(DRV_VERSION);
MODULE_LICENSE("GPL");
Commit	Line	Data
e033351d WVS	1	/*
	2	* intel TCO vendor specific watchdog driver support
	3	*
12d60e28	4	* (c) Copyright 2006-2009 Wim Van Sebroeck <wim@iguana.be>.
e033351d WVS	5	*
	6	* This program is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU General Public License
	8	* as published by the Free Software Foundation; either version
	9	* 2 of the License, or (at your option) any later version.
	10	*
	11	* Neither Wim Van Sebroeck nor Iguana vzw. admit liability nor
	12	* provide warranty for any of this software. This material is
	13	* provided "AS-IS" and at no charge.
	14	*/
	15
	16	/*
	17	* Includes, defines, variables, module parameters, ...
	18	*/
	19
	20	/* Module and version information */
7944d3a5	21	#define DRV_NAME "iTCO_vendor_support"
12d60e28	22	#define DRV_VERSION "1.03"
e033351d WVS	23	#define PFX DRV_NAME ": "
	24
	25	/* Includes */
	26	#include <linux/module.h> /* For module specific items */
	27	#include <linux/moduleparam.h> /* For new moduleparam's */
	28	#include <linux/types.h> /* For standard types (like size_t) */
	29	#include <linux/errno.h> /* For the -ENODEV/... values */
	30	#include <linux/kernel.h> /* For printk/panic/... */
	31	#include <linux/init.h> /* For __init/__exit/... */
	32	#include <linux/ioport.h> /* For io-port access */
0e6fa3fb AC	33	#include <linux/io.h> /* For inb/outb/... */
	34
	35	#include "iTCO_vendor.h"
e033351d WVS	36
e033351d WVS	37	/* iTCO defines */
0a7e6582 WVS	38	#define SMI_EN (acpibase + 0x30) /* SMI Control and Enable Register */
	39	#define TCOBASE (acpibase + 0x60) /* TCO base address */
	40	#define TCO1_STS (TCOBASE + 0x04) /* TCO1 Status Register */
e033351d WVS	41
e033351d WVS	42	/* List of vendor support modes */
0e6fa3fb AC	43	/* SuperMicro Pentium 3 Era 370SSE+-OEM1/P3TSSE */
	44	#define SUPERMICRO_OLD_BOARD 1
	45	/* SuperMicro Pentium 4 / Xeon 4 / EMT64T Era Systems */
	46	#define SUPERMICRO_NEW_BOARD 2
e033351d	47
0e6fa3fb	48	static int vendorsupport;
e033351d	49	module_param(vendorsupport, int, 0);
143a2e54 WVS	50	MODULE_PARM_DESC(vendorsupport, "iTCO vendor specific support mode, default="
143a2e54 WVS	51	"0 (none), 1=SuperMicro Pent3, 2=SuperMicro Pent4+");
e033351d WVS	52
	53	/*
	54	* Vendor Specific Support
	55	*/
	56
	57	/*
	58	* Vendor Support: 1
	59	* Board: Super Micro Computer Inc. 370SSE+-OEM1/P3TSSE
	60	* iTCO chipset: ICH2
	61	*
	62	* Code contributed by: R. Seretny <lkpatches@paypc.com>
	63	* Documentation obtained by R. Seretny from SuperMicro Technical Support
	64	*
	65	* To enable Watchdog function:
	66	* BIOS setup -> Power -> TCO Logic SMI Enable -> Within5Minutes
	67	* This setting enables SMI to clear the watchdog expired flag.
	68	* If BIOS or CPU fail which may cause SMI hang, then system will
	69	* reboot. When application starts to use watchdog function,
	70	* application has to take over the control from SMI.
	71	*
	72	* For P3TSSE, J36 jumper needs to be removed to enable the Watchdog
	73	* function.
	74	*
	75	* Note: The system will reboot when Expire Flag is set TWICE.
	76	* So, if the watchdog timer is 20 seconds, then the maximum hang
	77	* time is about 40 seconds, and the minimum hang time is about
	78	* 20.6 seconds.
	79	*/
	80
12d60e28 WVS	81	static void supermicro_old_pre_start(unsigned long acpibase)
	82	{
	83	unsigned long val32;
	84
	85	/* Bit 13: TCO_EN -> 0 = Disables TCO logic generating an SMI# */
	86	val32 = inl(SMI_EN);
	87	val32 &= 0xffffdfff; /* Turn off SMI clearing watchdog */
	88	outl(val32, SMI_EN); /* Needed to activate watchdog */
	89	}
	90
	91	static void supermicro_old_pre_stop(unsigned long acpibase)
	92	{
	93	unsigned long val32;
	94
	95	/* Bit 13: TCO_EN -> 1 = Enables the TCO logic to generate SMI# */
	96	val32 = inl(SMI_EN);
	97	val32 \|= 0x00002000; /* Turn on SMI clearing watchdog */
	98	outl(val32, SMI_EN); /* Needed to deactivate watchdog */
	99	}
	100
e033351d WVS	101	static void supermicro_old_pre_keepalive(unsigned long acpibase)
	102	{
	103	/* Reload TCO Timer (done in iTCO_wdt_keepalive) + */
	104	/* Clear "Expire Flag" (Bit 3 of TC01_STS register) */
	105	outb(0x08, TCO1_STS);
	106	}
	107
	108	/*
	109	* Vendor Support: 2
	110	* Board: Super Micro Computer Inc. P4SBx, P4DPx
	111	* iTCO chipset: ICH4
	112	*
	113	* Code contributed by: R. Seretny <lkpatches@paypc.com>
	114	* Documentation obtained by R. Seretny from SuperMicro Technical Support
	115	*
	116	* To enable Watchdog function:
	117	* 1. BIOS
	118	* For P4SBx:
	119	* BIOS setup -> Advanced -> Integrated Peripherals -> Watch Dog Feature
	120	* For P4DPx:
	121	* BIOS setup -> Advanced -> I/O Device Configuration -> Watch Dog
	122	* This setting enables or disables Watchdog function. When enabled, the
96de0e25	123	* default watchdog timer is set to be 5 minutes (about 4m35s). It is
e033351d WVS	124	* enough to load and run the OS. The application (service or driver) has
	125	* to take over the control once OS is running up and before watchdog
	126	* expires.
	127	*
	128	* 2. JUMPER
	129	* For P4SBx: JP39
	130	* For P4DPx: JP37
	131	* This jumper is used for safety. Closed is enabled. This jumper
	132	* prevents user enables watchdog in BIOS by accident.
	133	*
	134	* To enable Watch Dog function, both BIOS and JUMPER must be enabled.
	135	*
	136	* The documentation lists motherboards P4SBx and P4DPx series as of
	137	* 20-March-2002. However, this code works flawlessly with much newer
	138	* motherboards, such as my X6DHR-8G2 (SuperServer 6014H-82).
	139	*
	140	* The original iTCO driver as written does not actually reset the
	141	* watchdog timer on these machines, as a result they reboot after five
	142	* minutes.
	143	*
	144	* NOTE: You may leave the Watchdog function disabled in the SuperMicro
	145	* BIOS to avoid a "boot-race"... This driver will enable watchdog
	146	* functionality even if it's disabled in the BIOS once the /dev/watchdog
	147	* file is opened.
	148	*/
	149
	150	/* I/O Port's */
0e6fa3fb AC	151	#define SM_REGINDEX 0x2e /* SuperMicro ICH4+ Register Index */
0e6fa3fb AC	152	#define SM_DATAIO 0x2f /* SuperMicro ICH4+ Register Data I/O */
e033351d WVS	153
e033351d WVS	154	/* Control Register's */
0e6fa3fb AC	155	#define SM_CTLPAGESW 0x07 /* SuperMicro ICH4+ Control Page Switch */
0e6fa3fb AC	156	#define SM_CTLPAGE 0x08 /* SuperMicro ICH4+ Control Page Num */
e033351d	157
0e6fa3fb	158	#define SM_WATCHENABLE 0x30 /* Watchdog enable: Bit 0: 0=off, 1=on */
e033351d	159
0e6fa3fb	160	#define SM_WATCHPAGE 0x87 /* Watchdog unlock control page */
e033351d	161
0e6fa3fb	162	#define SM_ENDWATCH 0xAA /* Watchdog lock control page */
e033351d	163
0e6fa3fb AC	164	#define SM_COUNTMODE 0xf5 /* Watchdog count mode select */
0e6fa3fb AC	165	/* (Bit 3: 0 = seconds, 1 = minutes */
e033351d	166
0e6fa3fb	167	#define SM_WATCHTIMER 0xf6 /* 8-bits, Watchdog timer counter (RW) */
e033351d	168
0e6fa3fb AC	169	#define SM_RESETCONTROL 0xf7 /* Watchdog reset control */
	170	/* Bit 6: timer is reset by kbd interrupt */
	171	/* Bit 7: timer is reset by mouse interrupt */
e033351d WVS	172
	173	static void supermicro_new_unlock_watchdog(void)
	174	{
0e6fa3fb	175	/* Write 0x87 to port 0x2e twice */
e033351d	176	outb(SM_WATCHPAGE, SM_REGINDEX);
0e6fa3fb AC	177	outb(SM_WATCHPAGE, SM_REGINDEX);
	178	/* Switch to watchdog control page */
	179	outb(SM_CTLPAGESW, SM_REGINDEX);
e033351d WVS	180	outb(SM_CTLPAGE, SM_DATAIO);
	181	}
	182
	183	static void supermicro_new_lock_watchdog(void)
	184	{
	185	outb(SM_ENDWATCH, SM_REGINDEX);
	186	}
	187
	188	static void supermicro_new_pre_start(unsigned int heartbeat)
	189	{
	190	unsigned int val;
	191
	192	supermicro_new_unlock_watchdog();
	193
	194	/* Watchdog timer setting needs to be in seconds*/
	195	outb(SM_COUNTMODE, SM_REGINDEX);
	196	val = inb(SM_DATAIO);
	197	val &= 0xF7;
	198	outb(val, SM_DATAIO);
	199
	200	/* Write heartbeat interval to WDOG */
0e6fa3fb	201	outb(SM_WATCHTIMER, SM_REGINDEX);
e033351d WVS	202	outb((heartbeat & 255), SM_DATAIO);
	203
	204	/* Make sure keyboard/mouse interrupts don't interfere */
	205	outb(SM_RESETCONTROL, SM_REGINDEX);
	206	val = inb(SM_DATAIO);
	207	val &= 0x3f;
	208	outb(val, SM_DATAIO);
	209
	210	/* enable watchdog by setting bit 0 of Watchdog Enable to 1 */
	211	outb(SM_WATCHENABLE, SM_REGINDEX);
	212	val = inb(SM_DATAIO);
	213	val \|= 0x01;
	214	outb(val, SM_DATAIO);
	215
	216	supermicro_new_lock_watchdog();
	217	}
	218
	219	static void supermicro_new_pre_stop(void)
	220	{
	221	unsigned int val;
	222
	223	supermicro_new_unlock_watchdog();
	224
	225	/* disable watchdog by setting bit 0 of Watchdog Enable to 0 */
	226	outb(SM_WATCHENABLE, SM_REGINDEX);
	227	val = inb(SM_DATAIO);
	228	val &= 0xFE;
	229	outb(val, SM_DATAIO);
	230
	231	supermicro_new_lock_watchdog();
	232	}
	233
	234	static void supermicro_new_pre_set_heartbeat(unsigned int heartbeat)
	235	{
	236	supermicro_new_unlock_watchdog();
	237
	238	/* reset watchdog timeout to heartveat value */
	239	outb(SM_WATCHTIMER, SM_REGINDEX);
	240	outb((heartbeat & 255), SM_DATAIO);
	241
	242	supermicro_new_lock_watchdog();
	243	}
	244
	245	/*
	246	* Generic Support Functions
	247	*/
	248
	249	void iTCO_vendor_pre_start(unsigned long acpibase,
	250	unsigned int heartbeat)
	251	{
12d60e28 WVS	252	if (vendorsupport == SUPERMICRO_OLD_BOARD)
	253	supermicro_old_pre_start(acpibase);
	254	else if (vendorsupport == SUPERMICRO_NEW_BOARD)
e033351d WVS	255	supermicro_new_pre_start(heartbeat);
	256	}
	257	EXPORT_SYMBOL(iTCO_vendor_pre_start);
	258
	259	void iTCO_vendor_pre_stop(unsigned long acpibase)
	260	{
12d60e28 WVS	261	if (vendorsupport == SUPERMICRO_OLD_BOARD)
	262	supermicro_old_pre_stop(acpibase);
	263	else if (vendorsupport == SUPERMICRO_NEW_BOARD)
e033351d WVS	264	supermicro_new_pre_stop();
	265	}
	266	EXPORT_SYMBOL(iTCO_vendor_pre_stop);
	267
	268	void iTCO_vendor_pre_keepalive(unsigned long acpibase, unsigned int heartbeat)
	269	{
	270	if (vendorsupport == SUPERMICRO_OLD_BOARD)
	271	supermicro_old_pre_keepalive(acpibase);
	272	else if (vendorsupport == SUPERMICRO_NEW_BOARD)
	273	supermicro_new_pre_set_heartbeat(heartbeat);
	274	}
	275	EXPORT_SYMBOL(iTCO_vendor_pre_keepalive);
	276
	277	void iTCO_vendor_pre_set_heartbeat(unsigned int heartbeat)
	278	{
	279	if (vendorsupport == SUPERMICRO_NEW_BOARD)
	280	supermicro_new_pre_set_heartbeat(heartbeat);
	281	}
	282	EXPORT_SYMBOL(iTCO_vendor_pre_set_heartbeat);
	283
	284	int iTCO_vendor_check_noreboot_on(void)
	285	{
0e6fa3fb	286	switch (vendorsupport) {
e033351d WVS	287	case SUPERMICRO_OLD_BOARD:
	288	return 0;
	289	default:
	290	return 1;
	291	}
	292	}
	293	EXPORT_SYMBOL(iTCO_vendor_check_noreboot_on);
	294
	295	static int __init iTCO_vendor_init_module(void)
	296	{
0e6fa3fb	297	printk(KERN_INFO PFX "vendor-support=%d\n", vendorsupport);
e033351d WVS	298	return 0;
	299	}
	300
	301	static void __exit iTCO_vendor_exit_module(void)
	302	{
0e6fa3fb	303	printk(KERN_INFO PFX "Module Unloaded\n");
e033351d WVS	304	}
	305
	306	module_init(iTCO_vendor_init_module);
	307	module_exit(iTCO_vendor_exit_module);
	308
143a2e54 WVS	309	MODULE_AUTHOR("Wim Van Sebroeck <wim@iguana.be>, "
143a2e54 WVS	310	"R. Seretny <lkpatches@paypc.com>");
e033351d WVS	311	MODULE_DESCRIPTION("Intel TCO Vendor Specific WatchDog Timer Driver Support");
	312	MODULE_VERSION(DRV_VERSION);
	313	MODULE_LICENSE("GPL");
	314