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[WATCHDOG] hpwdt: set the mapped BIOS address space as executable
[net-next-2.6.git] / drivers / watchdog / hpwdt.c
CommitLineData
7f4da474
TM
1/*
2 * HP WatchDog Driver
3 * based on
4 *
5 * SoftDog 0.05: A Software Watchdog Device
6 *
7 * (c) Copyright 2007 Hewlett-Packard Development Company, L.P.
8 * Thomas Mingarelli <thomas.mingarelli@hp.com>
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * version 2 as published by the Free Software Foundation
13 *
14 */
15
16#include <linux/device.h>
17#include <linux/fs.h>
18#include <linux/init.h>
19#include <linux/interrupt.h>
20#include <linux/io.h>
21#include <linux/irq.h>
22#include <linux/kernel.h>
23#include <linux/miscdevice.h>
24#include <linux/mm.h>
25#include <linux/module.h>
26#include <linux/kdebug.h>
27#include <linux/moduleparam.h>
28#include <linux/notifier.h>
29#include <linux/pci.h>
30#include <linux/pci_ids.h>
31#include <linux/reboot.h>
32#include <linux/sched.h>
33#include <linux/timer.h>
34#include <linux/types.h>
35#include <linux/uaccess.h>
36#include <linux/watchdog.h>
37#include <linux/dmi.h>
38#include <linux/efi.h>
39#include <linux/string.h>
40#include <linux/bootmem.h>
41#include <linux/slab.h>
7f4da474 42#include <asm/desc.h>
06026413 43#include <asm/cacheflush.h>
7f4da474
TM
44
45#define PCI_BIOS32_SD_VALUE 0x5F32335F /* "_32_" */
46#define CRU_BIOS_SIGNATURE_VALUE 0x55524324
47#define PCI_BIOS32_PARAGRAPH_LEN 16
48#define PCI_ROM_BASE1 0x000F0000
49#define ROM_SIZE 0x10000
50
51struct bios32_service_dir {
52 u32 signature;
53 u32 entry_point;
54 u8 revision;
55 u8 length;
56 u8 checksum;
57 u8 reserved[5];
58};
59
7f4da474
TM
60/* type 212 */
61struct smbios_cru64_info {
62 u8 type;
63 u8 byte_length;
64 u16 handle;
65 u32 signature;
66 u64 physical_address;
67 u32 double_length;
68 u32 double_offset;
69};
70#define SMBIOS_CRU64_INFORMATION 212
71
72struct cmn_registers {
73 union {
74 struct {
75 u8 ral;
76 u8 rah;
77 u16 rea2;
78 };
79 u32 reax;
80 } u1;
81 union {
82 struct {
83 u8 rbl;
84 u8 rbh;
85 u8 reb2l;
86 u8 reb2h;
87 };
88 u32 rebx;
89 } u2;
90 union {
91 struct {
92 u8 rcl;
93 u8 rch;
94 u16 rec2;
95 };
96 u32 recx;
97 } u3;
98 union {
99 struct {
100 u8 rdl;
101 u8 rdh;
102 u16 red2;
103 };
104 u32 redx;
105 } u4;
106
107 u32 resi;
108 u32 redi;
109 u16 rds;
110 u16 res;
111 u32 reflags;
112} __attribute__((packed));
113
114#define DEFAULT_MARGIN 30
115static unsigned int soft_margin = DEFAULT_MARGIN; /* in seconds */
116static unsigned int reload; /* the computed soft_margin */
117static int nowayout = WATCHDOG_NOWAYOUT;
118static char expect_release;
119static unsigned long hpwdt_is_open;
ab4ba3cd 120static unsigned int allow_kdump;
7f4da474
TM
121
122static void __iomem *pci_mem_addr; /* the PCI-memory address */
123static unsigned long __iomem *hpwdt_timer_reg;
124static unsigned long __iomem *hpwdt_timer_con;
125
126static DEFINE_SPINLOCK(rom_lock);
127
128static void *cru_rom_addr;
129
130static struct cmn_registers cmn_regs;
131
132static struct pci_device_id hpwdt_devices[] = {
133 {
134 .vendor = PCI_VENDOR_ID_COMPAQ,
135 .device = 0xB203,
136 .subvendor = PCI_ANY_ID,
137 .subdevice = PCI_ANY_ID,
138 },
139 {0}, /* terminate list */
140};
141MODULE_DEVICE_TABLE(pci, hpwdt_devices);
142
1f6ef234
LT
143extern asmlinkage void asminline_call(struct cmn_registers *pi86Regs, unsigned long *pRomEntry);
144
7f4da474
TM
145#ifndef CONFIG_X86_64
146/* --32 Bit Bios------------------------------------------------------------ */
147
148#define HPWDT_ARCH 32
149
1f6ef234
LT
150asm(".text \n\t"
151 ".align 4 \n"
152 "asminline_call: \n\t"
153 "pushl %ebp \n\t"
154 "movl %esp, %ebp \n\t"
155 "pusha \n\t"
156 "pushf \n\t"
157 "push %es \n\t"
158 "push %ds \n\t"
159 "pop %es \n\t"
160 "movl 8(%ebp),%eax \n\t"
161 "movl 4(%eax),%ebx \n\t"
162 "movl 8(%eax),%ecx \n\t"
163 "movl 12(%eax),%edx \n\t"
164 "movl 16(%eax),%esi \n\t"
165 "movl 20(%eax),%edi \n\t"
166 "movl (%eax),%eax \n\t"
167 "push %cs \n\t"
168 "call *12(%ebp) \n\t"
169 "pushf \n\t"
170 "pushl %eax \n\t"
171 "movl 8(%ebp),%eax \n\t"
172 "movl %ebx,4(%eax) \n\t"
173 "movl %ecx,8(%eax) \n\t"
174 "movl %edx,12(%eax) \n\t"
175 "movl %esi,16(%eax) \n\t"
176 "movl %edi,20(%eax) \n\t"
177 "movw %ds,24(%eax) \n\t"
178 "movw %es,26(%eax) \n\t"
179 "popl %ebx \n\t"
180 "movl %ebx,(%eax) \n\t"
181 "popl %ebx \n\t"
182 "movl %ebx,28(%eax) \n\t"
183 "pop %es \n\t"
184 "popf \n\t"
185 "popa \n\t"
186 "leave \n\t"
187 "ret \n\t"
188 ".previous");
189
7f4da474
TM
190
191/*
192 * cru_detect
193 *
194 * Routine Description:
195 * This function uses the 32-bit BIOS Service Directory record to
196 * search for a $CRU record.
197 *
198 * Return Value:
199 * 0 : SUCCESS
200 * <0 : FAILURE
201 */
202static int __devinit cru_detect(unsigned long map_entry,
203 unsigned long map_offset)
204{
205 void *bios32_map;
206 unsigned long *bios32_entrypoint;
207 unsigned long cru_physical_address;
208 unsigned long cru_length;
209 unsigned long physical_bios_base = 0;
210 unsigned long physical_bios_offset = 0;
211 int retval = -ENODEV;
212
213 bios32_map = ioremap(map_entry, (2 * PAGE_SIZE));
214
215 if (bios32_map == NULL)
216 return -ENODEV;
217
218 bios32_entrypoint = bios32_map + map_offset;
219
220 cmn_regs.u1.reax = CRU_BIOS_SIGNATURE_VALUE;
221
222 asminline_call(&cmn_regs, bios32_entrypoint);
223
224 if (cmn_regs.u1.ral != 0) {
225 printk(KERN_WARNING
ab4ba3cd
TM
226 "hpwdt: Call succeeded but with an error: 0x%x\n",
227 cmn_regs.u1.ral);
7f4da474
TM
228 } else {
229 physical_bios_base = cmn_regs.u2.rebx;
230 physical_bios_offset = cmn_regs.u4.redx;
231 cru_length = cmn_regs.u3.recx;
232 cru_physical_address =
ab4ba3cd 233 physical_bios_base + physical_bios_offset;
7f4da474
TM
234
235 /* If the values look OK, then map it in. */
236 if ((physical_bios_base + physical_bios_offset)) {
237 cru_rom_addr =
ab4ba3cd 238 ioremap(cru_physical_address, cru_length);
7f4da474
TM
239 if (cru_rom_addr)
240 retval = 0;
241 }
242
243 printk(KERN_DEBUG "hpwdt: CRU Base Address: 0x%lx\n",
244 physical_bios_base);
245 printk(KERN_DEBUG "hpwdt: CRU Offset Address: 0x%lx\n",
246 physical_bios_offset);
247 printk(KERN_DEBUG "hpwdt: CRU Length: 0x%lx\n",
248 cru_length);
249 printk(KERN_DEBUG "hpwdt: CRU Mapped Address: 0x%x\n",
250 (unsigned int)&cru_rom_addr);
251 }
252 iounmap(bios32_map);
253 return retval;
254}
255
30ec910e
RD
256/*
257 * bios_checksum
258 */
259static int __devinit bios_checksum(const char __iomem *ptr, int len)
260{
261 char sum = 0;
262 int i;
263
264 /*
265 * calculate checksum of size bytes. This should add up
266 * to zero if we have a valid header.
267 */
268 for (i = 0; i < len; i++)
269 sum += ptr[i];
270
271 return ((sum == 0) && (len > 0));
272}
273
7f4da474
TM
274/*
275 * bios32_present
276 *
277 * Routine Description:
278 * This function finds the 32-bit BIOS Service Directory
279 *
280 * Return Value:
281 * 0 : SUCCESS
282 * <0 : FAILURE
283 */
284static int __devinit bios32_present(const char __iomem *p)
285{
286 struct bios32_service_dir *bios_32_ptr;
287 int length;
288 unsigned long map_entry, map_offset;
289
290 bios_32_ptr = (struct bios32_service_dir *) p;
291
292 /*
293 * Search for signature by checking equal to the swizzled value
294 * instead of calling another routine to perform a strcmp.
295 */
296 if (bios_32_ptr->signature == PCI_BIOS32_SD_VALUE) {
297 length = bios_32_ptr->length * PCI_BIOS32_PARAGRAPH_LEN;
298 if (bios_checksum(p, length)) {
299 /*
300 * According to the spec, we're looking for the
301 * first 4KB-aligned address below the entrypoint
302 * listed in the header. The Service Directory code
303 * is guaranteed to occupy no more than 2 4KB pages.
304 */
305 map_entry = bios_32_ptr->entry_point & ~(PAGE_SIZE - 1);
306 map_offset = bios_32_ptr->entry_point - map_entry;
307
308 return cru_detect(map_entry, map_offset);
309 }
310 }
311 return -ENODEV;
312}
313
314static int __devinit detect_cru_service(void)
315{
316 char __iomem *p, *q;
317 int rc = -1;
318
319 /*
320 * Search from 0x0f0000 through 0x0fffff, inclusive.
321 */
322 p = ioremap(PCI_ROM_BASE1, ROM_SIZE);
323 if (p == NULL)
324 return -ENOMEM;
325
326 for (q = p; q < p + ROM_SIZE; q += 16) {
327 rc = bios32_present(q);
328 if (!rc)
329 break;
330 }
331 iounmap(p);
332 return rc;
333}
334
335#else
336/* --64 Bit Bios------------------------------------------------------------ */
337
338#define HPWDT_ARCH 64
339
1f6ef234
LT
340asm(".text \n\t"
341 ".align 4 \n"
342 "asminline_call: \n\t"
343 "pushq %rbp \n\t"
344 "movq %rsp, %rbp \n\t"
345 "pushq %rax \n\t"
346 "pushq %rbx \n\t"
347 "pushq %rdx \n\t"
348 "pushq %r12 \n\t"
349 "pushq %r9 \n\t"
350 "movq %rsi, %r12 \n\t"
351 "movq %rdi, %r9 \n\t"
352 "movl 4(%r9),%ebx \n\t"
353 "movl 8(%r9),%ecx \n\t"
354 "movl 12(%r9),%edx \n\t"
355 "movl 16(%r9),%esi \n\t"
356 "movl 20(%r9),%edi \n\t"
357 "movl (%r9),%eax \n\t"
358 "call *%r12 \n\t"
359 "pushfq \n\t"
360 "popq %r12 \n\t"
1f6ef234
LT
361 "movl %eax, (%r9) \n\t"
362 "movl %ebx, 4(%r9) \n\t"
363 "movl %ecx, 8(%r9) \n\t"
364 "movl %edx, 12(%r9) \n\t"
365 "movl %esi, 16(%r9) \n\t"
366 "movl %edi, 20(%r9) \n\t"
367 "movq %r12, %rax \n\t"
368 "movl %eax, 28(%r9) \n\t"
369 "popq %r9 \n\t"
370 "popq %r12 \n\t"
371 "popq %rdx \n\t"
372 "popq %rbx \n\t"
373 "popq %rax \n\t"
374 "leave \n\t"
375 "ret \n\t"
376 ".previous");
7f4da474
TM
377
378/*
379 * dmi_find_cru
380 *
381 * Routine Description:
30ec910e 382 * This function checks whether or not a SMBIOS/DMI record is
7f4da474 383 * the 64bit CRU info or not
7f4da474
TM
384 */
385static void __devinit dmi_find_cru(const struct dmi_header *dm)
386{
387 struct smbios_cru64_info *smbios_cru64_ptr;
388 unsigned long cru_physical_address;
389
390 if (dm->type == SMBIOS_CRU64_INFORMATION) {
391 smbios_cru64_ptr = (struct smbios_cru64_info *) dm;
392 if (smbios_cru64_ptr->signature == CRU_BIOS_SIGNATURE_VALUE) {
393 cru_physical_address =
ab4ba3cd
TM
394 smbios_cru64_ptr->physical_address +
395 smbios_cru64_ptr->double_offset;
7f4da474 396 cru_rom_addr = ioremap(cru_physical_address,
ab4ba3cd 397 smbios_cru64_ptr->double_length);
06026413
BW
398 set_memory_x((unsigned long)cru_rom_addr & PAGE_MASK,
399 smbios_cru64_ptr->double_length >> PAGE_SHIFT);
7f4da474
TM
400 }
401 }
402}
403
7f4da474
TM
404static int __devinit detect_cru_service(void)
405{
406 cru_rom_addr = NULL;
407
30ec910e 408 dmi_walk(dmi_find_cru);
7f4da474
TM
409
410 /* if cru_rom_addr has been set then we found a CRU service */
ab4ba3cd 411 return ((cru_rom_addr != NULL) ? 0 : -ENODEV);
7f4da474
TM
412}
413
414/* ------------------------------------------------------------------------- */
415
416#endif
417
7f4da474
TM
418/*
419 * Watchdog operations
420 */
421static void hpwdt_start(void)
422{
423 reload = (soft_margin * 1000) / 128;
424 iowrite16(reload, hpwdt_timer_reg);
425 iowrite16(0x85, hpwdt_timer_con);
426}
427
428static void hpwdt_stop(void)
429{
430 unsigned long data;
431
432 data = ioread16(hpwdt_timer_con);
433 data &= 0xFE;
434 iowrite16(data, hpwdt_timer_con);
435}
436
437static void hpwdt_ping(void)
438{
439 iowrite16(reload, hpwdt_timer_reg);
440}
441
442static int hpwdt_change_timer(int new_margin)
443{
444 /* Arbitrary, can't find the card's limits */
445 if (new_margin < 30 || new_margin > 600) {
446 printk(KERN_WARNING
447 "hpwdt: New value passed in is invalid: %d seconds.\n",
448 new_margin);
449 return -EINVAL;
450 }
451
452 soft_margin = new_margin;
453 printk(KERN_DEBUG
454 "hpwdt: New timer passed in is %d seconds.\n",
455 new_margin);
456 reload = (soft_margin * 1000) / 128;
457
458 return 0;
459}
460
ab4ba3cd
TM
461/*
462 * NMI Handler
463 */
464static int hpwdt_pretimeout(struct notifier_block *nb, unsigned long ulReason,
465 void *data)
466{
467 unsigned long rom_pl;
468 static int die_nmi_called;
469
470 if (ulReason != DIE_NMI && ulReason != DIE_NMI_IPI)
471 return NOTIFY_OK;
472
473 spin_lock_irqsave(&rom_lock, rom_pl);
474 if (!die_nmi_called)
475 asminline_call(&cmn_regs, cru_rom_addr);
476 die_nmi_called = 1;
477 spin_unlock_irqrestore(&rom_lock, rom_pl);
478 if (cmn_regs.u1.ral == 0) {
479 printk(KERN_WARNING "hpwdt: An NMI occurred, "
480 "but unable to determine source.\n");
481 } else {
482 if (allow_kdump)
483 hpwdt_stop();
484 panic("An NMI occurred, please see the Integrated "
485 "Management Log for details.\n");
486 }
487
488 return NOTIFY_STOP;
489}
490
7f4da474
TM
491/*
492 * /dev/watchdog handling
493 */
494static int hpwdt_open(struct inode *inode, struct file *file)
495{
496 /* /dev/watchdog can only be opened once */
497 if (test_and_set_bit(0, &hpwdt_is_open))
498 return -EBUSY;
499
500 /* Start the watchdog */
501 hpwdt_start();
502 hpwdt_ping();
503
504 return nonseekable_open(inode, file);
505}
506
507static int hpwdt_release(struct inode *inode, struct file *file)
508{
509 /* Stop the watchdog */
510 if (expect_release == 42) {
511 hpwdt_stop();
512 } else {
513 printk(KERN_CRIT
514 "hpwdt: Unexpected close, not stopping watchdog!\n");
515 hpwdt_ping();
516 }
517
518 expect_release = 0;
519
520 /* /dev/watchdog is being closed, make sure it can be re-opened */
521 clear_bit(0, &hpwdt_is_open);
522
523 return 0;
524}
525
526static ssize_t hpwdt_write(struct file *file, const char __user *data,
527 size_t len, loff_t *ppos)
528{
529 /* See if we got the magic character 'V' and reload the timer */
530 if (len) {
531 if (!nowayout) {
532 size_t i;
533
534 /* note: just in case someone wrote the magic character
535 * five months ago... */
536 expect_release = 0;
537
538 /* scan to see whether or not we got the magic char. */
539 for (i = 0; i != len; i++) {
540 char c;
7944d3a5 541 if (get_user(c, data + i))
7f4da474
TM
542 return -EFAULT;
543 if (c == 'V')
544 expect_release = 42;
545 }
546 }
547
548 /* someone wrote to us, we should reload the timer */
549 hpwdt_ping();
550 }
551
552 return len;
553}
554
555static struct watchdog_info ident = {
556 .options = WDIOF_SETTIMEOUT |
557 WDIOF_KEEPALIVEPING |
558 WDIOF_MAGICCLOSE,
559 .identity = "HP iLO2 HW Watchdog Timer",
560};
561
562static long hpwdt_ioctl(struct file *file, unsigned int cmd,
563 unsigned long arg)
564{
565 void __user *argp = (void __user *)arg;
566 int __user *p = argp;
567 int new_margin;
568 int ret = -ENOTTY;
569
570 switch (cmd) {
571 case WDIOC_GETSUPPORT:
572 ret = 0;
573 if (copy_to_user(argp, &ident, sizeof(ident)))
574 ret = -EFAULT;
575 break;
576
577 case WDIOC_GETSTATUS:
578 case WDIOC_GETBOOTSTATUS:
579 ret = put_user(0, p);
580 break;
581
582 case WDIOC_KEEPALIVE:
583 hpwdt_ping();
584 ret = 0;
585 break;
586
587 case WDIOC_SETTIMEOUT:
588 ret = get_user(new_margin, p);
589 if (ret)
590 break;
591
592 ret = hpwdt_change_timer(new_margin);
593 if (ret)
594 break;
595
596 hpwdt_ping();
597 /* Fall */
598 case WDIOC_GETTIMEOUT:
599 ret = put_user(soft_margin, p);
600 break;
601 }
602 return ret;
603}
604
605/*
606 * Kernel interfaces
607 */
608static struct file_operations hpwdt_fops = {
609 .owner = THIS_MODULE,
610 .llseek = no_llseek,
611 .write = hpwdt_write,
612 .unlocked_ioctl = hpwdt_ioctl,
613 .open = hpwdt_open,
614 .release = hpwdt_release,
615};
616
617static struct miscdevice hpwdt_miscdev = {
618 .minor = WATCHDOG_MINOR,
619 .name = "watchdog",
620 .fops = &hpwdt_fops,
621};
622
623static struct notifier_block die_notifier = {
624 .notifier_call = hpwdt_pretimeout,
625 .priority = 0x7FFFFFFF,
626};
627
628/*
629 * Init & Exit
630 */
631
632static int __devinit hpwdt_init_one(struct pci_dev *dev,
ab4ba3cd 633 const struct pci_device_id *ent)
7f4da474
TM
634{
635 int retval;
636
637 /*
638 * First let's find out if we are on an iLO2 server. We will
639 * not run on a legacy ASM box.
ab4ba3cd 640 * So we only support the G5 ProLiant servers and higher.
7f4da474
TM
641 */
642 if (dev->subsystem_vendor != PCI_VENDOR_ID_HP) {
643 dev_warn(&dev->dev,
ab4ba3cd 644 "This server does not have an iLO2 ASIC.\n");
7f4da474
TM
645 return -ENODEV;
646 }
647
648 if (pci_enable_device(dev)) {
649 dev_warn(&dev->dev,
650 "Not possible to enable PCI Device: 0x%x:0x%x.\n",
651 ent->vendor, ent->device);
652 return -ENODEV;
653 }
654
655 pci_mem_addr = pci_iomap(dev, 1, 0x80);
656 if (!pci_mem_addr) {
657 dev_warn(&dev->dev,
658 "Unable to detect the iLO2 server memory.\n");
659 retval = -ENOMEM;
660 goto error_pci_iomap;
661 }
662 hpwdt_timer_reg = pci_mem_addr + 0x70;
663 hpwdt_timer_con = pci_mem_addr + 0x72;
664
665 /* Make sure that we have a valid soft_margin */
666 if (hpwdt_change_timer(soft_margin))
667 hpwdt_change_timer(DEFAULT_MARGIN);
668
669 /*
670 * We need to map the ROM to get the CRU service.
671 * For 32 bit Operating Systems we need to go through the 32 Bit
672 * BIOS Service Directory
673 * For 64 bit Operating Systems we get that service through SMBIOS.
674 */
675 retval = detect_cru_service();
676 if (retval < 0) {
677 dev_warn(&dev->dev,
ab4ba3cd 678 "Unable to detect the %d Bit CRU Service.\n",
7f4da474
TM
679 HPWDT_ARCH);
680 goto error_get_cru;
681 }
682
683 /*
684 * We know this is the only CRU call we need to make so lets keep as
685 * few instructions as possible once the NMI comes in.
686 */
687 cmn_regs.u1.rah = 0x0D;
688 cmn_regs.u1.ral = 0x02;
689
690 retval = register_die_notifier(&die_notifier);
691 if (retval != 0) {
692 dev_warn(&dev->dev,
ab4ba3cd 693 "Unable to register a die notifier (err=%d).\n",
7f4da474
TM
694 retval);
695 goto error_die_notifier;
696 }
697
698 retval = misc_register(&hpwdt_miscdev);
699 if (retval < 0) {
700 dev_warn(&dev->dev,
701 "Unable to register miscdev on minor=%d (err=%d).\n",
702 WATCHDOG_MINOR, retval);
703 goto error_misc_register;
704 }
705
706 printk(KERN_INFO
707 "hp Watchdog Timer Driver: 1.00"
ab4ba3cd
TM
708 ", timer margin: %d seconds (nowayout=%d)"
709 ", allow kernel dump: %s (default = 0/OFF).\n",
710 soft_margin, nowayout, (allow_kdump == 0) ? "OFF" : "ON");
7f4da474
TM
711
712 return 0;
713
714error_misc_register:
715 unregister_die_notifier(&die_notifier);
716error_die_notifier:
717 if (cru_rom_addr)
718 iounmap(cru_rom_addr);
719error_get_cru:
720 pci_iounmap(dev, pci_mem_addr);
721error_pci_iomap:
722 pci_disable_device(dev);
723 return retval;
724}
725
726static void __devexit hpwdt_exit(struct pci_dev *dev)
727{
728 if (!nowayout)
729 hpwdt_stop();
730
731 misc_deregister(&hpwdt_miscdev);
732 unregister_die_notifier(&die_notifier);
733
734 if (cru_rom_addr)
735 iounmap(cru_rom_addr);
736 pci_iounmap(dev, pci_mem_addr);
737 pci_disable_device(dev);
738}
739
740static struct pci_driver hpwdt_driver = {
741 .name = "hpwdt",
742 .id_table = hpwdt_devices,
743 .probe = hpwdt_init_one,
744 .remove = __devexit_p(hpwdt_exit),
745};
746
747static void __exit hpwdt_cleanup(void)
748{
749 pci_unregister_driver(&hpwdt_driver);
750}
751
752static int __init hpwdt_init(void)
753{
754 return pci_register_driver(&hpwdt_driver);
755}
756
757MODULE_AUTHOR("Tom Mingarelli");
758MODULE_DESCRIPTION("hp watchdog driver");
759MODULE_LICENSE("GPL");
760MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
761
762module_param(soft_margin, int, 0);
763MODULE_PARM_DESC(soft_margin, "Watchdog timeout in seconds");
764
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765module_param(allow_kdump, int, 0);
766MODULE_PARM_DESC(allow_kdump, "Start a kernel dump after NMI occurs");
767
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768module_param(nowayout, int, 0);
769MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
770 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
771
772module_init(hpwdt_init);
773module_exit(hpwdt_cleanup);