]> bbs.cooldavid.org Git - net-next-2.6.git/blame - drivers/watchdog/ar7_wdt.c
MIPS: AR7: Implement gpiolib
[net-next-2.6.git] / drivers / watchdog / ar7_wdt.c
CommitLineData
c283cf2c
MC
1/*
2 * drivers/watchdog/ar7_wdt.c
3 *
4 * Copyright (C) 2007 Nicolas Thill <nico@openwrt.org>
5 * Copyright (c) 2005 Enrik Berkhan <Enrik.Berkhan@akk.org>
6 *
7 * Some code taken from:
8 * National Semiconductor SCx200 Watchdog support
9 * Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
24 */
25
26#include <linux/module.h>
27#include <linux/moduleparam.h>
28#include <linux/errno.h>
29#include <linux/init.h>
30#include <linux/miscdevice.h>
64d4062a 31#include <linux/platform_device.h>
c283cf2c 32#include <linux/watchdog.h>
c283cf2c
MC
33#include <linux/fs.h>
34#include <linux/ioport.h>
35#include <linux/io.h>
36#include <linux/uaccess.h>
37
38#include <asm/addrspace.h>
c5e7f5a3 39#include <asm/mach-ar7/ar7.h>
c283cf2c
MC
40
41#define DRVNAME "ar7_wdt"
42#define LONGNAME "TI AR7 Watchdog Timer"
43
44MODULE_AUTHOR("Nicolas Thill <nico@openwrt.org>");
45MODULE_DESCRIPTION(LONGNAME);
46MODULE_LICENSE("GPL");
47MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
48
49static int margin = 60;
50module_param(margin, int, 0);
51MODULE_PARM_DESC(margin, "Watchdog margin in seconds");
52
53static int nowayout = WATCHDOG_NOWAYOUT;
54module_param(nowayout, int, 0);
55MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close");
56
57#define READ_REG(x) readl((void __iomem *)&(x))
58#define WRITE_REG(x, v) writel((v), (void __iomem *)&(x))
59
60struct ar7_wdt {
61 u32 kick_lock;
62 u32 kick;
63 u32 change_lock;
64 u32 change;
65 u32 disable_lock;
66 u32 disable;
67 u32 prescale_lock;
68 u32 prescale;
69};
70
670d59c0
AC
71static unsigned long wdt_is_open;
72static spinlock_t wdt_lock;
c283cf2c
MC
73static unsigned expect_close;
74
75/* XXX currently fixed, allows max margin ~68.72 secs */
76#define prescale_value 0xffff
77
64d4062a
FF
78/* Resource of the WDT registers */
79static struct resource *ar7_regs_wdt;
c283cf2c
MC
80/* Pointer to the remapped WDT IO space */
81static struct ar7_wdt *ar7_wdt;
c283cf2c
MC
82
83static void ar7_wdt_kick(u32 value)
84{
85 WRITE_REG(ar7_wdt->kick_lock, 0x5555);
86 if ((READ_REG(ar7_wdt->kick_lock) & 3) == 1) {
87 WRITE_REG(ar7_wdt->kick_lock, 0xaaaa);
88 if ((READ_REG(ar7_wdt->kick_lock) & 3) == 3) {
89 WRITE_REG(ar7_wdt->kick, value);
90 return;
91 }
92 }
93 printk(KERN_ERR DRVNAME ": failed to unlock WDT kick reg\n");
94}
95
96static void ar7_wdt_prescale(u32 value)
97{
98 WRITE_REG(ar7_wdt->prescale_lock, 0x5a5a);
99 if ((READ_REG(ar7_wdt->prescale_lock) & 3) == 1) {
100 WRITE_REG(ar7_wdt->prescale_lock, 0xa5a5);
101 if ((READ_REG(ar7_wdt->prescale_lock) & 3) == 3) {
102 WRITE_REG(ar7_wdt->prescale, value);
103 return;
104 }
105 }
106 printk(KERN_ERR DRVNAME ": failed to unlock WDT prescale reg\n");
107}
108
109static void ar7_wdt_change(u32 value)
110{
111 WRITE_REG(ar7_wdt->change_lock, 0x6666);
112 if ((READ_REG(ar7_wdt->change_lock) & 3) == 1) {
113 WRITE_REG(ar7_wdt->change_lock, 0xbbbb);
114 if ((READ_REG(ar7_wdt->change_lock) & 3) == 3) {
115 WRITE_REG(ar7_wdt->change, value);
116 return;
117 }
118 }
119 printk(KERN_ERR DRVNAME ": failed to unlock WDT change reg\n");
120}
121
122static void ar7_wdt_disable(u32 value)
123{
124 WRITE_REG(ar7_wdt->disable_lock, 0x7777);
125 if ((READ_REG(ar7_wdt->disable_lock) & 3) == 1) {
126 WRITE_REG(ar7_wdt->disable_lock, 0xcccc);
127 if ((READ_REG(ar7_wdt->disable_lock) & 3) == 2) {
128 WRITE_REG(ar7_wdt->disable_lock, 0xdddd);
129 if ((READ_REG(ar7_wdt->disable_lock) & 3) == 3) {
130 WRITE_REG(ar7_wdt->disable, value);
131 return;
132 }
133 }
134 }
135 printk(KERN_ERR DRVNAME ": failed to unlock WDT disable reg\n");
136}
137
138static void ar7_wdt_update_margin(int new_margin)
139{
140 u32 change;
141
142 change = new_margin * (ar7_vbus_freq() / prescale_value);
670d59c0
AC
143 if (change < 1)
144 change = 1;
145 if (change > 0xffff)
146 change = 0xffff;
c283cf2c
MC
147 ar7_wdt_change(change);
148 margin = change * prescale_value / ar7_vbus_freq();
149 printk(KERN_INFO DRVNAME
150 ": timer margin %d seconds (prescale %d, change %d, freq %d)\n",
151 margin, prescale_value, change, ar7_vbus_freq());
152}
153
154static void ar7_wdt_enable_wdt(void)
155{
156 printk(KERN_DEBUG DRVNAME ": enabling watchdog timer\n");
157 ar7_wdt_disable(1);
158 ar7_wdt_kick(1);
159}
160
161static void ar7_wdt_disable_wdt(void)
162{
163 printk(KERN_DEBUG DRVNAME ": disabling watchdog timer\n");
164 ar7_wdt_disable(0);
165}
166
167static int ar7_wdt_open(struct inode *inode, struct file *file)
168{
169 /* only allow one at a time */
670d59c0 170 if (test_and_set_bit(0, &wdt_is_open))
c283cf2c
MC
171 return -EBUSY;
172 ar7_wdt_enable_wdt();
173 expect_close = 0;
174
175 return nonseekable_open(inode, file);
176}
177
178static int ar7_wdt_release(struct inode *inode, struct file *file)
179{
180 if (!expect_close)
181 printk(KERN_WARNING DRVNAME
182 ": watchdog device closed unexpectedly,"
183 "will not disable the watchdog timer\n");
184 else if (!nowayout)
185 ar7_wdt_disable_wdt();
670d59c0 186 clear_bit(0, &wdt_is_open);
c283cf2c
MC
187 return 0;
188}
189
c283cf2c
MC
190static ssize_t ar7_wdt_write(struct file *file, const char *data,
191 size_t len, loff_t *ppos)
192{
193 /* check for a magic close character */
194 if (len) {
195 size_t i;
196
670d59c0 197 spin_lock(&wdt_lock);
c283cf2c 198 ar7_wdt_kick(1);
670d59c0 199 spin_unlock(&wdt_lock);
c283cf2c
MC
200
201 expect_close = 0;
202 for (i = 0; i < len; ++i) {
203 char c;
7944d3a5 204 if (get_user(c, data + i))
c283cf2c
MC
205 return -EFAULT;
206 if (c == 'V')
207 expect_close = 1;
208 }
209
210 }
211 return len;
212}
213
670d59c0
AC
214static long ar7_wdt_ioctl(struct file *file,
215 unsigned int cmd, unsigned long arg)
c283cf2c
MC
216{
217 static struct watchdog_info ident = {
218 .identity = LONGNAME,
219 .firmware_version = 1,
e73a7802
WVS
220 .options = (WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
221 WDIOF_MAGICCLOSE),
c283cf2c
MC
222 };
223 int new_margin;
224
225 switch (cmd) {
c283cf2c
MC
226 case WDIOC_GETSUPPORT:
227 if (copy_to_user((struct watchdog_info *)arg, &ident,
228 sizeof(ident)))
229 return -EFAULT;
230 return 0;
231 case WDIOC_GETSTATUS:
232 case WDIOC_GETBOOTSTATUS:
233 if (put_user(0, (int *)arg))
234 return -EFAULT;
235 return 0;
236 case WDIOC_KEEPALIVE:
237 ar7_wdt_kick(1);
238 return 0;
239 case WDIOC_SETTIMEOUT:
240 if (get_user(new_margin, (int *)arg))
241 return -EFAULT;
242 if (new_margin < 1)
243 return -EINVAL;
244
670d59c0 245 spin_lock(&wdt_lock);
c283cf2c
MC
246 ar7_wdt_update_margin(new_margin);
247 ar7_wdt_kick(1);
670d59c0 248 spin_unlock(&wdt_lock);
c283cf2c
MC
249
250 case WDIOC_GETTIMEOUT:
251 if (put_user(margin, (int *)arg))
252 return -EFAULT;
253 return 0;
0c06090c
WVS
254 default:
255 return -ENOTTY;
c283cf2c
MC
256 }
257}
258
b47a166e 259static const struct file_operations ar7_wdt_fops = {
c283cf2c
MC
260 .owner = THIS_MODULE,
261 .write = ar7_wdt_write,
670d59c0 262 .unlocked_ioctl = ar7_wdt_ioctl,
c283cf2c
MC
263 .open = ar7_wdt_open,
264 .release = ar7_wdt_release,
265};
266
267static struct miscdevice ar7_wdt_miscdev = {
268 .minor = WATCHDOG_MINOR,
269 .name = "watchdog",
270 .fops = &ar7_wdt_fops,
271};
272
64d4062a 273static int __devinit ar7_wdt_probe(struct platform_device *pdev)
c283cf2c
MC
274{
275 int rc;
276
670d59c0
AC
277 spin_lock_init(&wdt_lock);
278
64d4062a
FF
279 ar7_regs_wdt =
280 platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs");
281 if (!ar7_regs_wdt) {
282 printk(KERN_ERR DRVNAME ": could not get registers resource\n");
283 rc = -ENODEV;
284 goto out;
285 }
c283cf2c 286
64d4062a
FF
287 if (!request_mem_region(ar7_regs_wdt->start,
288 resource_size(ar7_regs_wdt), LONGNAME)) {
c283cf2c 289 printk(KERN_WARNING DRVNAME ": watchdog I/O region busy\n");
64d4062a
FF
290 rc = -EBUSY;
291 goto out;
c283cf2c
MC
292 }
293
64d4062a
FF
294 ar7_wdt = ioremap(ar7_regs_wdt->start, resource_size(ar7_regs_wdt));
295 if (!ar7_wdt) {
296 printk(KERN_ERR DRVNAME ": could not ioremap registers\n");
297 rc = -ENXIO;
d7e9791b 298 goto out_mem_region;
64d4062a 299 }
c283cf2c
MC
300
301 ar7_wdt_disable_wdt();
302 ar7_wdt_prescale(prescale_value);
303 ar7_wdt_update_margin(margin);
304
c283cf2c
MC
305 rc = misc_register(&ar7_wdt_miscdev);
306 if (rc) {
307 printk(KERN_ERR DRVNAME ": unable to register misc device\n");
64d4062a 308 goto out_alloc;
c283cf2c
MC
309 }
310 goto out;
311
c283cf2c
MC
312out_alloc:
313 iounmap(ar7_wdt);
d7e9791b 314out_mem_region:
64d4062a 315 release_mem_region(ar7_regs_wdt->start, resource_size(ar7_regs_wdt));
c283cf2c
MC
316out:
317 return rc;
318}
319
64d4062a 320static int __devexit ar7_wdt_remove(struct platform_device *pdev)
c283cf2c
MC
321{
322 misc_deregister(&ar7_wdt_miscdev);
c283cf2c 323 iounmap(ar7_wdt);
64d4062a
FF
324 release_mem_region(ar7_regs_wdt->start, resource_size(ar7_regs_wdt));
325
326 return 0;
327}
328
329static void ar7_wdt_shutdown(struct platform_device *pdev)
330{
331 if (!nowayout)
332 ar7_wdt_disable_wdt();
333}
334
335static struct platform_driver ar7_wdt_driver = {
336 .probe = ar7_wdt_probe,
337 .remove = __devexit_p(ar7_wdt_remove),
338 .shutdown = ar7_wdt_shutdown,
339 .driver = {
340 .owner = THIS_MODULE,
341 .name = "ar7_wdt",
342 },
343};
344
345static int __init ar7_wdt_init(void)
346{
347 return platform_driver_register(&ar7_wdt_driver);
348}
349
350static void __exit ar7_wdt_cleanup(void)
351{
352 platform_driver_unregister(&ar7_wdt_driver);
c283cf2c
MC
353}
354
355module_init(ar7_wdt_init);
356module_exit(ar7_wdt_cleanup);