[net-next-2.6.git] / drivers / video / geode / gxfb_core.c

/*
 * Geode GX framebuffer driver.
 *
 *   Copyright (C) 2006 Arcom Control Systems Ltd.
 *
 *   This program is free software; you can redistribute it and/or modify it
 *   under the terms of the GNU General Public License as published by the
 *   Free Software Foundation; either version 2 of the License, or (at your
 *   option) any later version.
 *
 *
 * This driver assumes that the BIOS has created a virtual PCI device header
 * for the video device. The PCI header is assumed to contain the following
 * BARs:
 *
 *    BAR0 - framebuffer memory
 *    BAR1 - graphics processor registers
 *    BAR2 - display controller registers
 *    BAR3 - video processor and flat panel control registers.
 *
 * 16 MiB of framebuffer memory is assumed to be available.
 */
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/mm.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/fb.h>
#include <linux/console.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <asm/geode.h>

#include "gxfb.h"

static char *mode_option;
static int vram;

/* Modes relevant to the GX (taken from modedb.c) */
static const struct fb_videomode gx_modedb[] __initdata = {
	/* 640x480-60 VESA */
	{ NULL, 60, 640, 480, 39682,  48, 16, 33, 10, 96, 2,
	  0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
	/* 640x480-75 VESA */
	{ NULL, 75, 640, 480, 31746, 120, 16, 16, 01, 64, 3,
	  0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
	/* 640x480-85 VESA */
	{ NULL, 85, 640, 480, 27777, 80, 56, 25, 01, 56, 3,
	  0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
	/* 800x600-60 VESA */
	{ NULL, 60, 800, 600, 25000, 88, 40, 23, 01, 128, 4,
	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
	/* 800x600-75 VESA */
	{ NULL, 75, 800, 600, 20202, 160, 16, 21, 01, 80, 3,
	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
	/* 800x600-85 VESA */
	{ NULL, 85, 800, 600, 17761, 152, 32, 27, 01, 64, 3,
	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
	/* 1024x768-60 VESA */
	{ NULL, 60, 1024, 768, 15384, 160, 24, 29, 3, 136, 6,
	  0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
	/* 1024x768-75 VESA */
	{ NULL, 75, 1024, 768, 12690, 176, 16, 28, 1, 96, 3,
	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
	/* 1024x768-85 VESA */
	{ NULL, 85, 1024, 768, 10582, 208, 48, 36, 1, 96, 3,
	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
	/* 1280x960-60 VESA */
	{ NULL, 60, 1280, 960, 9259, 312, 96, 36, 1, 112, 3,
	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
	/* 1280x960-85 VESA */
	{ NULL, 85, 1280, 960, 6734, 224, 64, 47, 1, 160, 3,
	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
	/* 1280x1024-60 VESA */
	{ NULL, 60, 1280, 1024, 9259, 248, 48, 38, 1, 112, 3,
	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
	/* 1280x1024-75 VESA */
	{ NULL, 75, 1280, 1024, 7407, 248, 16, 38, 1, 144, 3,
	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
	/* 1280x1024-85 VESA */
	{ NULL, 85, 1280, 1024, 6349, 224, 64, 44, 1, 160, 3,
	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
	/* 1600x1200-60 VESA */
	{ NULL, 60, 1600, 1200, 6172, 304, 64, 46, 1, 192, 3,
	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
	/* 1600x1200-75 VESA */
	{ NULL, 75, 1600, 1200, 4938, 304, 64, 46, 1, 192, 3,
	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
	/* 1600x1200-85 VESA */
	{ NULL, 85, 1600, 1200, 4357, 304, 64, 46, 1, 192, 3,
	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
};

static int gxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
{
	if (var->xres > 1600 || var->yres > 1200)
		return -EINVAL;
	if ((var->xres > 1280 || var->yres > 1024) && var->bits_per_pixel > 16)
		return -EINVAL;

	if (var->bits_per_pixel == 32) {
		var->red.offset   = 16; var->red.length   = 8;
		var->green.offset =  8; var->green.length = 8;
		var->blue.offset  =  0; var->blue.length  = 8;
	} else if (var->bits_per_pixel == 16) {
		var->red.offset   = 11; var->red.length   = 5;
		var->green.offset =  5; var->green.length = 6;
		var->blue.offset  =  0; var->blue.length  = 5;
	} else if (var->bits_per_pixel == 8) {
		var->red.offset   = 0; var->red.length   = 8;
		var->green.offset = 0; var->green.length = 8;
		var->blue.offset  = 0; var->blue.length  = 8;
	} else
		return -EINVAL;
	var->transp.offset = 0; var->transp.length = 0;

	/* Enough video memory? */
	if (gx_line_delta(var->xres, var->bits_per_pixel) * var->yres > info->fix.smem_len)
		return -EINVAL;

	/* FIXME: Check timing parameters here? */

	return 0;
}

static int gxfb_set_par(struct fb_info *info)
{
	if (info->var.bits_per_pixel > 8) {
		info->fix.visual = FB_VISUAL_TRUECOLOR;
		fb_dealloc_cmap(&info->cmap);
	} else {
		info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
		fb_alloc_cmap(&info->cmap, 1<<info->var.bits_per_pixel, 0);
	}

	info->fix.line_length = gx_line_delta(info->var.xres, info->var.bits_per_pixel);

	gx_set_mode(info);

	return 0;
}

static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf)
{
	chan &= 0xffff;
	chan >>= 16 - bf->length;
	return chan << bf->offset;
}

static int gxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
			   unsigned blue, unsigned transp,
			   struct fb_info *info)
{
	if (info->var.grayscale) {
		/* grayscale = 0.30*R + 0.59*G + 0.11*B */
		red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
	}

	/* Truecolor has hardware independent palette */
	if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
		u32 *pal = info->pseudo_palette;
		u32 v;

		if (regno >= 16)
			return -EINVAL;

		v  = chan_to_field(red, &info->var.red);
		v |= chan_to_field(green, &info->var.green);
		v |= chan_to_field(blue, &info->var.blue);

		pal[regno] = v;
	} else {
		if (regno >= 256)
			return -EINVAL;

		gx_set_hw_palette_reg(info, regno, red, green, blue);
	}

	return 0;
}

static int gxfb_blank(int blank_mode, struct fb_info *info)
{
	return gx_blank_display(info, blank_mode);
}

static int __init gxfb_map_video_memory(struct fb_info *info, struct pci_dev *dev)
{
	struct gxfb_par *par = info->par;
	int ret;

	ret = pci_enable_device(dev);
	if (ret < 0)
		return ret;

	ret = pci_request_region(dev, 3, "gxfb (video processor)");
	if (ret < 0)
		return ret;
	par->vid_regs = ioremap(pci_resource_start(dev, 3),
				pci_resource_len(dev, 3));
	if (!par->vid_regs)
		return -ENOMEM;

	ret = pci_request_region(dev, 2, "gxfb (display controller)");
	if (ret < 0)
		return ret;
	par->dc_regs = ioremap(pci_resource_start(dev, 2), pci_resource_len(dev, 2));
	if (!par->dc_regs)
		return -ENOMEM;

	ret = pci_request_region(dev, 1, "gxfb (graphics processor)");
	if (ret < 0)
		return ret;
	par->gp_regs = ioremap(pci_resource_start(dev, 1),
	pci_resource_len(dev, 1));

	if (!par->gp_regs)
		return -ENOMEM;

	ret = pci_request_region(dev, 0, "gxfb (framebuffer)");
	if (ret < 0)
		return ret;

	info->fix.smem_start = pci_resource_start(dev, 0);
	info->fix.smem_len = vram ? vram : gx_frame_buffer_size();
	info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
	if (!info->screen_base)
		return -ENOMEM;

	/* Set the 16MiB aligned base address of the graphics memory region
	 * in the display controller */

	write_dc(par, DC_GLIU0_MEM_OFFSET, info->fix.smem_start & 0xFF000000);

	dev_info(&dev->dev, "%d KiB of video memory at 0x%lx\n",
		 info->fix.smem_len / 1024, info->fix.smem_start);

	return 0;
}

static struct fb_ops gxfb_ops = {
	.owner		= THIS_MODULE,
	.fb_check_var	= gxfb_check_var,
	.fb_set_par	= gxfb_set_par,
	.fb_setcolreg	= gxfb_setcolreg,
	.fb_blank       = gxfb_blank,
	/* No HW acceleration for now. */
	.fb_fillrect	= cfb_fillrect,
	.fb_copyarea	= cfb_copyarea,
	.fb_imageblit	= cfb_imageblit,
};

static struct fb_info * __init gxfb_init_fbinfo(struct device *dev)
{
	struct gxfb_par *par;
	struct fb_info *info;

	/* Alloc enough space for the pseudo palette. */
	info = framebuffer_alloc(sizeof(struct gxfb_par) + sizeof(u32) * 16,
			dev);
	if (!info)
		return NULL;

	par = info->par;

	strcpy(info->fix.id, "Geode GX");

	info->fix.type		= FB_TYPE_PACKED_PIXELS;
	info->fix.type_aux	= 0;
	info->fix.xpanstep	= 0;
	info->fix.ypanstep	= 0;
	info->fix.ywrapstep	= 0;
	info->fix.accel		= FB_ACCEL_NONE;

	info->var.nonstd	= 0;
	info->var.activate	= FB_ACTIVATE_NOW;
	info->var.height	= -1;
	info->var.width	= -1;
	info->var.accel_flags = 0;
	info->var.vmode	= FB_VMODE_NONINTERLACED;

	info->fbops		= &gxfb_ops;
	info->flags		= FBINFO_DEFAULT;
	info->node		= -1;

	info->pseudo_palette	= (void *)par + sizeof(struct gxfb_par);

	info->var.grayscale	= 0;

	return info;
}

#ifdef CONFIG_PM
static int gxfb_suspend(struct pci_dev *pdev, pm_message_t state)
{
	struct fb_info *info = pci_get_drvdata(pdev);

	if (state.event == PM_EVENT_SUSPEND) {
		acquire_console_sem();
		gx_powerdown(info);
		fb_set_suspend(info, 1);
		release_console_sem();
	}

	/* there's no point in setting PCI states; we emulate PCI, so
	 * we don't end up getting power savings anyways */

	return 0;
}

static int gxfb_resume(struct pci_dev *pdev)
{
	struct fb_info *info = pci_get_drvdata(pdev);
	int ret;

	acquire_console_sem();
	ret = gx_powerup(info);
	if (ret) {
		printk(KERN_ERR "gxfb:  power up failed!\n");
		return ret;
	}

	fb_set_suspend(info, 0);
	release_console_sem();
	return 0;
}
#endif

static int __init gxfb_probe(struct pci_dev *pdev, const struct pci_device_id *id)
{
	struct gxfb_par *par;
	struct fb_info *info;
	int ret;
	unsigned long val;

	info = gxfb_init_fbinfo(&pdev->dev);
	if (!info)
		return -ENOMEM;
	par = info->par;

	if ((ret = gxfb_map_video_memory(info, pdev)) < 0) {
		dev_err(&pdev->dev, "failed to map frame buffer or controller registers\n");
		goto err;
	}

	/* Figure out if this is a TFT or CRT part */

	rdmsrl(MSR_GX_GLD_MSR_CONFIG, val);

	if ((val & MSR_GX_GLD_MSR_CONFIG_FP) == MSR_GX_GLD_MSR_CONFIG_FP)
		par->enable_crt = 0;
	else
		par->enable_crt = 1;

	ret = fb_find_mode(&info->var, info, mode_option,
			   gx_modedb, ARRAY_SIZE(gx_modedb), NULL, 16);
	if (ret == 0 || ret == 4) {
		dev_err(&pdev->dev, "could not find valid video mode\n");
		ret = -EINVAL;
		goto err;
	}


	/* Clear the frame buffer of garbage. */
        memset_io(info->screen_base, 0, info->fix.smem_len);

	gxfb_check_var(&info->var, info);
	gxfb_set_par(info);

	if (register_framebuffer(info) < 0) {
		ret = -EINVAL;
		goto err;
	}
	pci_set_drvdata(pdev, info);
	printk(KERN_INFO "fb%d: %s frame buffer device\n", info->node, info->fix.id);
	return 0;

  err:
	if (info->screen_base) {
		iounmap(info->screen_base);
		pci_release_region(pdev, 0);
	}
	if (par->vid_regs) {
		iounmap(par->vid_regs);
		pci_release_region(pdev, 3);
	}
	if (par->dc_regs) {
		iounmap(par->dc_regs);
		pci_release_region(pdev, 2);
	}
	if (par->gp_regs) {
		iounmap(par->gp_regs);
		pci_release_region(pdev, 1);
	}

	if (info)
		framebuffer_release(info);
	return ret;
}

static void gxfb_remove(struct pci_dev *pdev)
{
	struct fb_info *info = pci_get_drvdata(pdev);
	struct gxfb_par *par = info->par;

	unregister_framebuffer(info);

	iounmap((void __iomem *)info->screen_base);
	pci_release_region(pdev, 0);

	iounmap(par->vid_regs);
	pci_release_region(pdev, 3);

	iounmap(par->dc_regs);
	pci_release_region(pdev, 2);

	iounmap(par->gp_regs);
	pci_release_region(pdev, 1);

	pci_set_drvdata(pdev, NULL);

	framebuffer_release(info);
}

static struct pci_device_id gxfb_id_table[] = {
	{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_GX_VIDEO) },
	{ 0, }
};

MODULE_DEVICE_TABLE(pci, gxfb_id_table);

static struct pci_driver gxfb_driver = {
	.name		= "gxfb",
	.id_table	= gxfb_id_table,
	.probe		= gxfb_probe,
	.remove		= gxfb_remove,
#ifdef CONFIG_PM
	.suspend	= gxfb_suspend,
	.resume		= gxfb_resume,
#endif
};

#ifndef MODULE
static int __init gxfb_setup(char *options)
{

	char *opt;

	if (!options || !*options)
		return 0;

	while ((opt = strsep(&options, ",")) != NULL) {
		if (!*opt)
			continue;

		mode_option = opt;
	}

	return 0;
}
#endif

static int __init gxfb_init(void)
{
#ifndef MODULE
	char *option = NULL;

	if (fb_get_options("gxfb", &option))
		return -ENODEV;

	gxfb_setup(option);
#endif
	return pci_register_driver(&gxfb_driver);
}

static void __exit gxfb_cleanup(void)
{
	pci_unregister_driver(&gxfb_driver);
}

module_init(gxfb_init);
module_exit(gxfb_cleanup);

module_param(mode_option, charp, 0);
MODULE_PARM_DESC(mode_option, "video mode (<x>x<y>[-<bpp>][@<refr>])");

module_param(vram, int, 0);
MODULE_PARM_DESC(vram, "video memory size");

MODULE_DESCRIPTION("Framebuffer driver for the AMD Geode GX");
MODULE_LICENSE("GPL");
Commit	Line	Data
fc4effc7 DV	1	/*
	2	* Geode GX framebuffer driver.
	3	*
	4	* Copyright (C) 2006 Arcom Control Systems Ltd.
	5	*
	6	* This program is free software; you can redistribute it and/or modify it
	7	* under the terms of the GNU General Public License as published by the
	8	* Free Software Foundation; either version 2 of the License, or (at your
	9	* option) any later version.
	10	*
	11	*
	12	* This driver assumes that the BIOS has created a virtual PCI device header
	13	* for the video device. The PCI header is assumed to contain the following
	14	* BARs:
	15	*
	16	* BAR0 - framebuffer memory
	17	* BAR1 - graphics processor registers
	18	* BAR2 - display controller registers
	19	* BAR3 - video processor and flat panel control registers.
	20	*
	21	* 16 MiB of framebuffer memory is assumed to be available.
	22	*/
	23	#include <linux/module.h>
	24	#include <linux/kernel.h>
	25	#include <linux/errno.h>
	26	#include <linux/string.h>
	27	#include <linux/mm.h>
fc4effc7 DV	28	#include <linux/slab.h>
	29	#include <linux/delay.h>
	30	#include <linux/fb.h>
46fb6f11	31	#include <linux/console.h>
fc4effc7 DV	32	#include <linux/init.h>
fc4effc7 DV	33	#include <linux/pci.h>
32bf87e3	34	#include <asm/geode.h>
fc4effc7	35
ab06aaf6	36	#include "gxfb.h"
fc4effc7	37
16ef9870	38	static char *mode_option;
fa20c8a6	39	static int vram;
fc4effc7 DV	40
fc4effc7 DV	41	/* Modes relevant to the GX (taken from modedb.c) */
16ef9870	42	static const struct fb_videomode gx_modedb[] __initdata = {
fc4effc7 DV	43	/* 640x480-60 VESA */
	44	{ NULL, 60, 640, 480, 39682, 48, 16, 33, 10, 96, 2,
	45	0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
	46	/* 640x480-75 VESA */
	47	{ NULL, 75, 640, 480, 31746, 120, 16, 16, 01, 64, 3,
	48	0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
	49	/* 640x480-85 VESA */
	50	{ NULL, 85, 640, 480, 27777, 80, 56, 25, 01, 56, 3,
	51	0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
	52	/* 800x600-60 VESA */
	53	{ NULL, 60, 800, 600, 25000, 88, 40, 23, 01, 128, 4,
	54	FB_SYNC_HOR_HIGH_ACT \| FB_SYNC_VERT_HIGH_ACT,
	55	FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
	56	/* 800x600-75 VESA */
	57	{ NULL, 75, 800, 600, 20202, 160, 16, 21, 01, 80, 3,
	58	FB_SYNC_HOR_HIGH_ACT \| FB_SYNC_VERT_HIGH_ACT,
	59	FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
	60	/* 800x600-85 VESA */
	61	{ NULL, 85, 800, 600, 17761, 152, 32, 27, 01, 64, 3,
	62	FB_SYNC_HOR_HIGH_ACT \| FB_SYNC_VERT_HIGH_ACT,
	63	FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
	64	/* 1024x768-60 VESA */
	65	{ NULL, 60, 1024, 768, 15384, 160, 24, 29, 3, 136, 6,
	66	0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
	67	/* 1024x768-75 VESA */
	68	{ NULL, 75, 1024, 768, 12690, 176, 16, 28, 1, 96, 3,
	69	FB_SYNC_HOR_HIGH_ACT \| FB_SYNC_VERT_HIGH_ACT,
	70	FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
	71	/* 1024x768-85 VESA */
	72	{ NULL, 85, 1024, 768, 10582, 208, 48, 36, 1, 96, 3,
	73	FB_SYNC_HOR_HIGH_ACT \| FB_SYNC_VERT_HIGH_ACT,
	74	FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
	75	/* 1280x960-60 VESA */
	76	{ NULL, 60, 1280, 960, 9259, 312, 96, 36, 1, 112, 3,
	77	FB_SYNC_HOR_HIGH_ACT \| FB_SYNC_VERT_HIGH_ACT,
	78	FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
	79	/* 1280x960-85 VESA */
	80	{ NULL, 85, 1280, 960, 6734, 224, 64, 47, 1, 160, 3,
	81	FB_SYNC_HOR_HIGH_ACT \| FB_SYNC_VERT_HIGH_ACT,
	82	FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
	83	/* 1280x1024-60 VESA */
	84	{ NULL, 60, 1280, 1024, 9259, 248, 48, 38, 1, 112, 3,
	85	FB_SYNC_HOR_HIGH_ACT \| FB_SYNC_VERT_HIGH_ACT,
	86	FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
	87	/* 1280x1024-75 VESA */
	88	{ NULL, 75, 1280, 1024, 7407, 248, 16, 38, 1, 144, 3,
	89	FB_SYNC_HOR_HIGH_ACT \| FB_SYNC_VERT_HIGH_ACT,
	90	FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
	91	/* 1280x1024-85 VESA */
	92	{ NULL, 85, 1280, 1024, 6349, 224, 64, 44, 1, 160, 3,
	93	FB_SYNC_HOR_HIGH_ACT \| FB_SYNC_VERT_HIGH_ACT,
	94	FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
	95	/* 1600x1200-60 VESA */
	96	{ NULL, 60, 1600, 1200, 6172, 304, 64, 46, 1, 192, 3,
	97	FB_SYNC_HOR_HIGH_ACT \| FB_SYNC_VERT_HIGH_ACT,
	98	FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
	99	/* 1600x1200-75 VESA */
	100	{ NULL, 75, 1600, 1200, 4938, 304, 64, 46, 1, 192, 3,
	101	FB_SYNC_HOR_HIGH_ACT \| FB_SYNC_VERT_HIGH_ACT,
	102	FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
	103	/* 1600x1200-85 VESA */
	104	{ NULL, 85, 1600, 1200, 4357, 304, 64, 46, 1, 192, 3,
	105	FB_SYNC_HOR_HIGH_ACT \| FB_SYNC_VERT_HIGH_ACT,
	106	FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
107	};
108
109	static int gxfb_check_var(struct fb_var_screeninfo var, struct fb_info info)
110	{
111	if (var->xres > 1600 \|\| var->yres > 1200)
112	return -EINVAL;
113	if ((var->xres > 1280 \|\| var->yres > 1024) && var->bits_per_pixel > 16)
114	return -EINVAL;
115
116	if (var->bits_per_pixel == 32) {
117	var->red.offset = 16; var->red.length = 8;
118	var->green.offset = 8; var->green.length = 8;
119	var->blue.offset = 0; var->blue.length = 8;
120	} else if (var->bits_per_pixel == 16) {
121	var->red.offset = 11; var->red.length = 5;
122	var->green.offset = 5; var->green.length = 6;
123	var->blue.offset = 0; var->blue.length = 5;
124	} else if (var->bits_per_pixel == 8) {
125	var->red.offset = 0; var->red.length = 8;
126	var->green.offset = 0; var->green.length = 8;
127	var->blue.offset = 0; var->blue.length = 8;
128	} else
129	return -EINVAL;
130	var->transp.offset = 0; var->transp.length = 0;
131
132	/* Enough video memory? */
133	if (gx_line_delta(var->xres, var->bits_per_pixel) * var->yres > info->fix.smem_len)
134	return -EINVAL;
135
136	/* FIXME: Check timing parameters here? */
137
138	return 0;
139	}
140
141	static int gxfb_set_par(struct fb_info *info)
142	{
fc4effc7 DV	143	if (info->var.bits_per_pixel > 8) {
	144	info->fix.visual = FB_VISUAL_TRUECOLOR;
	145	fb_dealloc_cmap(&info->cmap);
	146	} else {
	147	info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
	148	fb_alloc_cmap(&info->cmap, 1<<info->var.bits_per_pixel, 0);
	149	}
	150
	151	info->fix.line_length = gx_line_delta(info->var.xres, info->var.bits_per_pixel);
	152
d1b4cc3e	153	gx_set_mode(info);
fc4effc7 DV	154
	155	return 0;
	156	}
	157
	158	static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf)
	159	{
	160	chan &= 0xffff;
	161	chan >>= 16 - bf->length;
	162	return chan << bf->offset;
	163	}
	164
	165	static int gxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
	166	unsigned blue, unsigned transp,
	167	struct fb_info *info)
	168	{
fc4effc7 DV	169	if (info->var.grayscale) {
	170	/* grayscale = 0.30R + 0.59G + 0.11B /
	171	red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
	172	}
	173
	174	/* Truecolor has hardware independent palette */
	175	if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
	176	u32 *pal = info->pseudo_palette;
	177	u32 v;
	178
	179	if (regno >= 16)
	180	return -EINVAL;
	181
	182	v = chan_to_field(red, &info->var.red);
	183	v \|= chan_to_field(green, &info->var.green);
	184	v \|= chan_to_field(blue, &info->var.blue);
	185
	186	pal[regno] = v;
	187	} else {
	188	if (regno >= 256)
	189	return -EINVAL;
	190
d1b4cc3e	191	gx_set_hw_palette_reg(info, regno, red, green, blue);
fc4effc7 DV	192	}
	193
	194	return 0;
	195	}
	196
	197	static int gxfb_blank(int blank_mode, struct fb_info *info)
	198	{
d1b4cc3e	199	return gx_blank_display(info, blank_mode);
fc4effc7 DV	200	}
	201
	202	static int __init gxfb_map_video_memory(struct fb_info info, struct pci_dev dev)
	203	{
d1b4cc3e	204	struct gxfb_par *par = info->par;
fc4effc7 DV	205	int ret;
	206
	207	ret = pci_enable_device(dev);
	208	if (ret < 0)
	209	return ret;
	210
	211	ret = pci_request_region(dev, 3, "gxfb (video processor)");
	212	if (ret < 0)
	213	return ret;
	214	par->vid_regs = ioremap(pci_resource_start(dev, 3),
	215	pci_resource_len(dev, 3));
	216	if (!par->vid_regs)
	217	return -ENOMEM;
	218
	219	ret = pci_request_region(dev, 2, "gxfb (display controller)");
	220	if (ret < 0)
	221	return ret;
	222	par->dc_regs = ioremap(pci_resource_start(dev, 2), pci_resource_len(dev, 2));
	223	if (!par->dc_regs)
	224	return -ENOMEM;
	225
46fb6f11 AS	226	ret = pci_request_region(dev, 1, "gxfb (graphics processor)");
	227	if (ret < 0)
	228	return ret;
	229	par->gp_regs = ioremap(pci_resource_start(dev, 1),
	230	pci_resource_len(dev, 1));
	231
	232	if (!par->gp_regs)
	233	return -ENOMEM;
	234
fc4effc7 DV	235	ret = pci_request_region(dev, 0, "gxfb (framebuffer)");
	236	if (ret < 0)
	237	return ret;
fa20c8a6	238
fc4effc7	239	info->fix.smem_start = pci_resource_start(dev, 0);
fa20c8a6	240	info->fix.smem_len = vram ? vram : gx_frame_buffer_size();
fc4effc7 DV	241	info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
	242	if (!info->screen_base)
	243	return -ENOMEM;
	244
fa20c8a6	245	/* Set the 16MiB aligned base address of the graphics memory region
f378819a JC	246	* in the display controller */
f378819a JC	247
ab06aaf6	248	write_dc(par, DC_GLIU0_MEM_OFFSET, info->fix.smem_start & 0xFF000000);
f378819a	249
fa20c8a6	250	dev_info(&dev->dev, "%d KiB of video memory at 0x%lx\n",
fc4effc7 DV	251	info->fix.smem_len / 1024, info->fix.smem_start);
	252
	253	return 0;
	254	}
	255
	256	static struct fb_ops gxfb_ops = {
	257	.owner = THIS_MODULE,
	258	.fb_check_var = gxfb_check_var,
	259	.fb_set_par = gxfb_set_par,
	260	.fb_setcolreg = gxfb_setcolreg,
	261	.fb_blank = gxfb_blank,
	262	/* No HW acceleration for now. */
	263	.fb_fillrect = cfb_fillrect,
	264	.fb_copyarea = cfb_copyarea,
	265	.fb_imageblit = cfb_imageblit,
	266	};
	267
	268	static struct fb_info * __init gxfb_init_fbinfo(struct device *dev)
	269	{
d1b4cc3e	270	struct gxfb_par *par;
fc4effc7 DV	271	struct fb_info *info;
	272
	273	/* Alloc enough space for the pseudo palette. */
d1b4cc3e AS	274	info = framebuffer_alloc(sizeof(struct gxfb_par) + sizeof(u32) * 16,
d1b4cc3e AS	275	dev);
fc4effc7 DV	276	if (!info)
	277	return NULL;
	278
	279	par = info->par;
	280
	281	strcpy(info->fix.id, "Geode GX");
	282
	283	info->fix.type = FB_TYPE_PACKED_PIXELS;
	284	info->fix.type_aux = 0;
	285	info->fix.xpanstep = 0;
	286	info->fix.ypanstep = 0;
	287	info->fix.ywrapstep = 0;
	288	info->fix.accel = FB_ACCEL_NONE;
	289
	290	info->var.nonstd = 0;
	291	info->var.activate = FB_ACTIVATE_NOW;
	292	info->var.height = -1;
	293	info->var.width = -1;
	294	info->var.accel_flags = 0;
	295	info->var.vmode = FB_VMODE_NONINTERLACED;
	296
	297	info->fbops = &gxfb_ops;
	298	info->flags = FBINFO_DEFAULT;
	299	info->node = -1;
	300
d1b4cc3e	301	info->pseudo_palette = (void *)par + sizeof(struct gxfb_par);
fc4effc7 DV	302
	303	info->var.grayscale = 0;
	304
	305	return info;
	306	}
	307
46fb6f11 AS	308	#ifdef CONFIG_PM
	309	static int gxfb_suspend(struct pci_dev *pdev, pm_message_t state)
	310	{
	311	struct fb_info *info = pci_get_drvdata(pdev);
	312
	313	if (state.event == PM_EVENT_SUSPEND) {
	314	acquire_console_sem();
	315	gx_powerdown(info);
	316	fb_set_suspend(info, 1);
	317	release_console_sem();
	318	}
	319
	320	/* there's no point in setting PCI states; we emulate PCI, so
	321	* we don't end up getting power savings anyways */
	322
	323	return 0;
	324	}
	325
	326	static int gxfb_resume(struct pci_dev *pdev)
	327	{
	328	struct fb_info *info = pci_get_drvdata(pdev);
	329	int ret;
	330
	331	acquire_console_sem();
	332	ret = gx_powerup(info);
	333	if (ret) {
	334	printk(KERN_ERR "gxfb: power up failed!\n");
	335	return ret;
	336	}
	337
	338	fb_set_suspend(info, 0);
	339	release_console_sem();
	340	return 0;
	341	}
	342	#endif
	343
fc4effc7 DV	344	static int __init gxfb_probe(struct pci_dev pdev, const struct pci_device_id id)
fc4effc7 DV	345	{
d1b4cc3e	346	struct gxfb_par *par;
fc4effc7 DV	347	struct fb_info *info;
fc4effc7 DV	348	int ret;
ab1db0cf	349	unsigned long val;
fc4effc7 DV	350
	351	info = gxfb_init_fbinfo(&pdev->dev);
	352	if (!info)
	353	return -ENOMEM;
	354	par = info->par;
	355
fc4effc7 DV	356	if ((ret = gxfb_map_video_memory(info, pdev)) < 0) {
	357	dev_err(&pdev->dev, "failed to map frame buffer or controller registers\n");
	358	goto err;
	359	}
	360
ab1db0cf JC	361	/* Figure out if this is a TFT or CRT part */
ab1db0cf JC	362
32bf87e3	363	rdmsrl(MSR_GX_GLD_MSR_CONFIG, val);
ab1db0cf	364
9f1277bd	365	if ((val & MSR_GX_GLD_MSR_CONFIG_FP) == MSR_GX_GLD_MSR_CONFIG_FP)
ab1db0cf JC	366	par->enable_crt = 0;
	367	else
	368	par->enable_crt = 1;
	369
fc4effc7 DV	370	ret = fb_find_mode(&info->var, info, mode_option,
	371	gx_modedb, ARRAY_SIZE(gx_modedb), NULL, 16);
	372	if (ret == 0 \|\| ret == 4) {
	373	dev_err(&pdev->dev, "could not find valid video mode\n");
	374	ret = -EINVAL;
	375	goto err;
	376	}
	377
16ef9870 JC	378
16ef9870 JC	379	/* Clear the frame buffer of garbage. */
fc4effc7 DV	380	memset_io(info->screen_base, 0, info->fix.smem_len);
	381
	382	gxfb_check_var(&info->var, info);
	383	gxfb_set_par(info);
	384
	385	if (register_framebuffer(info) < 0) {
	386	ret = -EINVAL;
	387	goto err;
	388	}
	389	pci_set_drvdata(pdev, info);
	390	printk(KERN_INFO "fb%d: %s frame buffer device\n", info->node, info->fix.id);
	391	return 0;
	392
	393	err:
	394	if (info->screen_base) {
	395	iounmap(info->screen_base);
	396	pci_release_region(pdev, 0);
	397	}
	398	if (par->vid_regs) {
	399	iounmap(par->vid_regs);
	400	pci_release_region(pdev, 3);
	401	}
	402	if (par->dc_regs) {
	403	iounmap(par->dc_regs);
	404	pci_release_region(pdev, 2);
	405	}
46fb6f11 AS	406	if (par->gp_regs) {
	407	iounmap(par->gp_regs);
	408	pci_release_region(pdev, 1);
	409	}
fc4effc7	410
fc4effc7 DV	411	if (info)
	412	framebuffer_release(info);
	413	return ret;
	414	}
	415
	416	static void gxfb_remove(struct pci_dev *pdev)
	417	{
	418	struct fb_info *info = pci_get_drvdata(pdev);
d1b4cc3e	419	struct gxfb_par *par = info->par;
fc4effc7 DV	420
	421	unregister_framebuffer(info);
	422
	423	iounmap((void __iomem *)info->screen_base);
	424	pci_release_region(pdev, 0);
	425
	426	iounmap(par->vid_regs);
	427	pci_release_region(pdev, 3);
	428
	429	iounmap(par->dc_regs);
	430	pci_release_region(pdev, 2);
	431
46fb6f11 AS	432	iounmap(par->gp_regs);
	433	pci_release_region(pdev, 1);
	434
fc4effc7 DV	435	pci_set_drvdata(pdev, NULL);
	436
	437	framebuffer_release(info);
	438	}
	439
	440	static struct pci_device_id gxfb_id_table[] = {
0a5e7909	441	{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_GX_VIDEO) },
fc4effc7 DV	442	{ 0, }
	443	};
	444
	445	MODULE_DEVICE_TABLE(pci, gxfb_id_table);
	446
	447	static struct pci_driver gxfb_driver = {
	448	.name = "gxfb",
	449	.id_table = gxfb_id_table,
	450	.probe = gxfb_probe,
	451	.remove = gxfb_remove,
46fb6f11 AS	452	#ifdef CONFIG_PM
	453	.suspend = gxfb_suspend,
	454	.resume = gxfb_resume,
	455	#endif
fc4effc7 DV	456	};
fc4effc7 DV	457
16ef9870 JC	458	#ifndef MODULE
	459	static int __init gxfb_setup(char *options)
	460	{
	461
	462	char *opt;
	463
	464	if (!options \|\| !*options)
	465	return 0;
	466
	467	while ((opt = strsep(&options, ",")) != NULL) {
	468	if (!*opt)
	469	continue;
	470
	471	mode_option = opt;
	472	}
	473
	474	return 0;
	475	}
	476	#endif
	477
fc4effc7 DV	478	static int __init gxfb_init(void)
	479	{
	480	#ifndef MODULE
16ef9870 JC	481	char *option = NULL;
	482
	483	if (fb_get_options("gxfb", &option))
fc4effc7	484	return -ENODEV;
16ef9870 JC	485
16ef9870 JC	486	gxfb_setup(option);
fc4effc7 DV	487	#endif
	488	return pci_register_driver(&gxfb_driver);
	489	}
	490
	491	static void __exit gxfb_cleanup(void)
	492	{
	493	pci_unregister_driver(&gxfb_driver);
	494	}
	495
	496	module_init(gxfb_init);
	497	module_exit(gxfb_cleanup);
	498
16ef9870 JC	499	module_param(mode_option, charp, 0);
16ef9870 JC	500	MODULE_PARM_DESC(mode_option, "video mode (<x>x<y>[-<bpp>][@<refr>])");
fc4effc7	501
fa20c8a6 AS	502	module_param(vram, int, 0);
	503	MODULE_PARM_DESC(vram, "video memory size");
	504
fc4effc7 DV	505	MODULE_DESCRIPTION("Framebuffer driver for the AMD Geode GX");
fc4effc7 DV	506	MODULE_LICENSE("GPL");