[net-next-2.6.git] / drivers / video / clps711xfb.c

/*
 *  linux/drivers/video/clps711xfb.c
 *
 *  Copyright (C) 2000-2001 Deep Blue Solutions Ltd.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 *
 *  Framebuffer driver for the CLPS7111 and EP7212 processors.
 */
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/seq_file.h>
#include <linux/slab.h>
#include <linux/fb.h>
#include <linux/init.h>
#include <linux/proc_fs.h>
#include <linux/delay.h>

#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <linux/uaccess.h>

#include <asm/hardware/clps7111.h>
#include <mach/syspld.h>

struct fb_info	*cfb;

#define CMAP_MAX_SIZE	16

/*
 * LCD AC Prescale.  This comes from the LCD panel manufacturers specifications.
 * This determines how many clocks + 1 of CL1 before the M signal toggles.
 * The number of lines on the display must not be divisible by this number.
 */
static unsigned int lcd_ac_prescale = 13;

/*
 *    Set a single color register. Return != 0 for invalid regno.
 */
static int
clps7111fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
		     u_int transp, struct fb_info *info)
{
	unsigned int level, mask, shift, pal;

	if (regno >= (1 << info->var.bits_per_pixel))
		return 1;

	/* gray = 0.30*R + 0.58*G + 0.11*B */
	level = (red * 77 + green * 151 + blue * 28) >> 20;

	/*
	 * On an LCD, a high value is dark, while a low value is light. 
	 * So we invert the level.
	 *
	 * This isn't true on all machines, so we only do it on EDB7211.
	 *  --rmk
	 */
	if (machine_is_edb7211()) {
		level = 15 - level;
	}

	shift = 4 * (regno & 7);
	level <<= shift;
	mask  = 15 << shift;
	level &= mask;

	regno = regno < 8 ? PALLSW : PALMSW;

	pal = clps_readl(regno);
	pal = (pal & ~mask) | level;
	clps_writel(pal, regno);

	return 0;
}

/*
 * Validate the purposed mode.
 */	
static int
clps7111fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
{
	var->transp.msb_right	= 0;
	var->transp.offset	= 0;
	var->transp.length	= 0;
	var->red.msb_right	= 0;
	var->red.offset		= 0;
	var->red.length		= var->bits_per_pixel;
	var->green		= var->red;
	var->blue		= var->red;

	if (var->bits_per_pixel > 4) 
		return -EINVAL;

	return 0;
}

/*
 * Set the hardware state.
 */ 
static int 
clps7111fb_set_par(struct fb_info *info)
{
	unsigned int lcdcon, syscon, pixclock;

	switch (info->var.bits_per_pixel) {
	case 1:
		info->fix.visual = FB_VISUAL_MONO01;
		break;
	case 2:
		info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
		break;
	case 4:
		info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
		break;
	}

	info->fix.line_length = info->var.xres_virtual * info->var.bits_per_pixel / 8;

	lcdcon = (info->var.xres_virtual * info->var.yres_virtual * info->var.bits_per_pixel) / 128 - 1;
	lcdcon |= ((info->var.xres_virtual / 16) - 1) << 13;
	lcdcon |= lcd_ac_prescale << 25;

	/*
	 * Calculate pixel prescale value from the pixclock.  This is:
	 *  36.864MHz / pixclock_mhz - 1.
	 * However, pixclock is in picoseconds, so this ends up being:
	 *  36864000 * pixclock_ps / 10^12 - 1
	 * and this will overflow the 32-bit math.  We perform this as
	 * (9 * 4096000 == 36864000):
	 *  pixclock_ps * 9 * (4096000 / 10^12) - 1
	 */
	pixclock = 9 * info->var.pixclock / 244140 - 1;
	lcdcon |= pixclock << 19;

	if (info->var.bits_per_pixel == 4)
		lcdcon |= LCDCON_GSMD;
	if (info->var.bits_per_pixel >= 2)
		lcdcon |= LCDCON_GSEN;

	/*
	 * LCDCON must only be changed while the LCD is disabled
	 */
	syscon = clps_readl(SYSCON1);
	clps_writel(syscon & ~SYSCON1_LCDEN, SYSCON1);
	clps_writel(lcdcon, LCDCON);
	clps_writel(syscon | SYSCON1_LCDEN, SYSCON1);
	return 0;
}

static int clps7111fb_blank(int blank, struct fb_info *info)
{
    	if (blank) {
		if (machine_is_edb7211()) {
			/* Turn off the LCD backlight. */
			clps_writeb(clps_readb(PDDR) & ~EDB_PD3_LCDBL, PDDR);

			/* Power off the LCD DC-DC converter. */
			clps_writeb(clps_readb(PDDR) & ~EDB_PD1_LCD_DC_DC_EN, PDDR);

			/* Delay for a little while (half a second). */
			udelay(100);

			/* Power off the LCD panel. */
			clps_writeb(clps_readb(PDDR) & ~EDB_PD2_LCDEN, PDDR);

			/* Power off the LCD controller. */
			clps_writel(clps_readl(SYSCON1) & ~SYSCON1_LCDEN, 
					SYSCON1);
		}
	} else {
		if (machine_is_edb7211()) {
			/* Power up the LCD controller. */
			clps_writel(clps_readl(SYSCON1) | SYSCON1_LCDEN,
					SYSCON1);

			/* Power up the LCD panel. */
			clps_writeb(clps_readb(PDDR) | EDB_PD2_LCDEN, PDDR);

			/* Delay for a little while. */
			udelay(100);

			/* Power up the LCD DC-DC converter. */
			clps_writeb(clps_readb(PDDR) | EDB_PD1_LCD_DC_DC_EN,
					PDDR);

			/* Turn on the LCD backlight. */
			clps_writeb(clps_readb(PDDR) | EDB_PD3_LCDBL, PDDR);
		}
	}
	return 0;
}

static struct fb_ops clps7111fb_ops = {
	.owner		= THIS_MODULE,
	.fb_check_var	= clps7111fb_check_var,
	.fb_set_par	= clps7111fb_set_par,
	.fb_setcolreg	= clps7111fb_setcolreg,
	.fb_blank	= clps7111fb_blank,
	.fb_fillrect	= cfb_fillrect,
	.fb_copyarea	= cfb_copyarea,
	.fb_imageblit	= cfb_imageblit,
};

static int backlight_proc_show(struct seq_file *m, void *v)
{
	if (machine_is_edb7211()) {
		seq_printf(m, "%d\n",
				(clps_readb(PDDR) & EDB_PD3_LCDBL) ? 1 : 0);
	}

	return 0;
}

static int backlight_proc_open(struct inode *inode, struct file *file)
{
	return single_open(file, backlight_proc_show, NULL);
}

static ssize_t backlight_proc_write(struct file *file, const char *buffer,
				    size_t count, loff_t *pos)
{
	unsigned char char_value;
	int value;

	if (count < 1) {
		return -EINVAL;
	}

	if (copy_from_user(&char_value, buffer, 1)) 
		return -EFAULT;

	value = char_value - '0';

	if (machine_is_edb7211()) {
		unsigned char port_d;

		port_d = clps_readb(PDDR);

		if (value) {
			port_d |= EDB_PD3_LCDBL;
		} else {
			port_d &= ~EDB_PD3_LCDBL;
		}

		clps_writeb(port_d, PDDR);
	}

	return count;
}

static const struct file_operations backlight_proc_fops = {
	.owner		= THIS_MODULE,
	.open		= backlight_proc_open,
	.read		= seq_read,
	.llseek		= seq_lseek,
	.release	= single_release,
	.write		= backlight_proc_write,
};

static void __init clps711x_guess_lcd_params(struct fb_info *info)
{
	unsigned int lcdcon, syscon, size;
	unsigned long phys_base = PAGE_OFFSET;
	void *virt_base = (void *)PAGE_OFFSET;

	info->var.xres_virtual	 = 640;
	info->var.yres_virtual	 = 240;
	info->var.bits_per_pixel = 4;
	info->var.activate	 = FB_ACTIVATE_NOW;
	info->var.height	 = -1;
	info->var.width		 = -1;
	info->var.pixclock	 = 93006; /* 10.752MHz pixel clock */

	/*
	 * If the LCD controller is already running, decode the values
	 * in LCDCON to xres/yres/bpp/pixclock/acprescale
	 */
	syscon = clps_readl(SYSCON1);
	if (syscon & SYSCON1_LCDEN) {
		lcdcon = clps_readl(LCDCON);

		/*
		 * Decode GSMD and GSEN bits to bits per pixel
		 */
		switch (lcdcon & (LCDCON_GSMD | LCDCON_GSEN)) {
		case LCDCON_GSMD | LCDCON_GSEN:
			info->var.bits_per_pixel = 4;
			break;

		case LCDCON_GSEN:
			info->var.bits_per_pixel = 2;
			break;

		default:
			info->var.bits_per_pixel = 1;
			break;
		}

		/*
		 * Decode xres/yres
		 */
		info->var.xres_virtual = (((lcdcon >> 13) & 0x3f) + 1) * 16;
		info->var.yres_virtual = (((lcdcon & 0x1fff) + 1) * 128) /
					  (info->var.xres_virtual *
					   info->var.bits_per_pixel);

		/*
		 * Calculate pixclock
		 */
		info->var.pixclock = (((lcdcon >> 19) & 0x3f) + 1) * 244140 / 9;

		/*
		 * Grab AC prescale
		 */
		lcd_ac_prescale = (lcdcon >> 25) & 0x1f;
	}

	info->var.xres = info->var.xres_virtual;
	info->var.yres = info->var.yres_virtual;
	info->var.grayscale = info->var.bits_per_pixel > 1;

	size = info->var.xres * info->var.yres * info->var.bits_per_pixel / 8;

	/*
	 * Might be worth checking to see if we can use the on-board
	 * RAM if size here...
	 * CLPS7110 - no on-board SRAM
	 * EP7212   - 38400 bytes
	 */
	if (size <= 38400) {
		printk(KERN_INFO "CLPS711xFB: could use on-board SRAM?\n");
	}

	if ((syscon & SYSCON1_LCDEN) == 0) {
		/*
		 * The display isn't running.  Ensure that
		 * the display memory is empty.
		 */
		memset(virt_base, 0, size);
	}

	info->screen_base    = virt_base;
	info->fix.smem_start = phys_base;
	info->fix.smem_len   = PAGE_ALIGN(size);
	info->fix.type       = FB_TYPE_PACKED_PIXELS;
}

int __init clps711xfb_init(void)
{
	int err = -ENOMEM;

	if (fb_get_options("clps711xfb", NULL))
		return -ENODEV;

	cfb = kzalloc(sizeof(*cfb), GFP_KERNEL);
	if (!cfb)
		goto out;

	strcpy(cfb->fix.id, "clps711x");

	cfb->fbops		= &clps7111fb_ops;
	cfb->flags		= FBINFO_DEFAULT;

	clps711x_guess_lcd_params(cfb);

	fb_alloc_cmap(&cfb->cmap, CMAP_MAX_SIZE, 0);

	if (!proc_create("backlight", 0444, NULL, &backlight_proc_fops)) {
		printk("Couldn't create the /proc entry for the backlight.\n");
		return -EINVAL;
	}

	/*
	 * Power up the LCD
	 */
	if (machine_is_p720t()) {
		PLD_LCDEN = PLD_LCDEN_EN;
		PLD_PWR |= (PLD_S4_ON|PLD_S3_ON|PLD_S2_ON|PLD_S1_ON);
	}

	if (machine_is_edb7211()) {
		/* Power up the LCD panel. */
		clps_writeb(clps_readb(PDDR) | EDB_PD2_LCDEN, PDDR);

		/* Delay for a little while. */
		udelay(100);

		/* Power up the LCD DC-DC converter. */
		clps_writeb(clps_readb(PDDR) | EDB_PD1_LCD_DC_DC_EN, PDDR);

		/* Turn on the LCD backlight. */
		clps_writeb(clps_readb(PDDR) | EDB_PD3_LCDBL, PDDR);
	}

	err = register_framebuffer(cfb);

out:	return err;
}

static void __exit clps711xfb_exit(void)
{
	unregister_framebuffer(cfb);
	kfree(cfb);

	/*
	 * Power down the LCD
	 */
	if (machine_is_p720t()) {
		PLD_LCDEN = 0;
		PLD_PWR &= ~(PLD_S4_ON|PLD_S3_ON|PLD_S2_ON|PLD_S1_ON);
	}
}

module_init(clps711xfb_init);
module_exit(clps711xfb_exit);

MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>");
MODULE_DESCRIPTION("CLPS711x framebuffer driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
1da177e4 LT	1	/*
	2	* linux/drivers/video/clps711xfb.c
	3	*
	4	* Copyright (C) 2000-2001 Deep Blue Solutions Ltd.
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program; if not, write to the Free Software
	18	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	19	*
	20	* Framebuffer driver for the CLPS7111 and EP7212 processors.
	21	*/
fa1f136e	22	#include <linux/mm.h>
1da177e4 LT	23	#include <linux/module.h>
1da177e4 LT	24	#include <linux/kernel.h>
fa1f136e	25	#include <linux/seq_file.h>
1da177e4 LT	26	#include <linux/slab.h>
	27	#include <linux/fb.h>
	28	#include <linux/init.h>
	29	#include <linux/proc_fs.h>
	30	#include <linux/delay.h>
	31
a09e64fb	32	#include <mach/hardware.h>
1da177e4	33	#include <asm/mach-types.h>
84902b7a	34	#include <linux/uaccess.h>
1da177e4 LT	35
1da177e4 LT	36	#include <asm/hardware/clps7111.h>
a09e64fb	37	#include <mach/syspld.h>
1da177e4 LT	38
	39	struct fb_info *cfb;
	40
	41	#define CMAP_MAX_SIZE 16
	42
1da177e4 LT	43	/*
	44	* LCD AC Prescale. This comes from the LCD panel manufacturers specifications.
	45	* This determines how many clocks + 1 of CL1 before the M signal toggles.
	46	* The number of lines on the display must not be divisible by this number.
	47	*/
	48	static unsigned int lcd_ac_prescale = 13;
	49
	50	/*
	51	* Set a single color register. Return != 0 for invalid regno.
	52	*/
	53	static int
	54	clps7111fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
	55	u_int transp, struct fb_info *info)
	56	{
	57	unsigned int level, mask, shift, pal;
	58
	59	if (regno >= (1 << info->var.bits_per_pixel))
	60	return 1;
	61
	62	/* gray = 0.30R + 0.58G + 0.11B /
	63	level = (red * 77 + green * 151 + blue * 28) >> 20;
	64
	65	/*
	66	* On an LCD, a high value is dark, while a low value is light.
	67	* So we invert the level.
	68	*
	69	* This isn't true on all machines, so we only do it on EDB7211.
	70	* --rmk
	71	*/
	72	if (machine_is_edb7211()) {
	73	level = 15 - level;
	74	}
	75
	76	shift = 4 * (regno & 7);
	77	level <<= shift;
	78	mask = 15 << shift;
	79	level &= mask;
	80
	81	regno = regno < 8 ? PALLSW : PALMSW;
	82
	83	pal = clps_readl(regno);
	84	pal = (pal & ~mask) \| level;
	85	clps_writel(pal, regno);
	86
	87	return 0;
	88	}
	89
	90	/*
	91	* Validate the purposed mode.
	92	*/
	93	static int
	94	clps7111fb_check_var(struct fb_var_screeninfo var, struct fb_info info)
	95	{
	96	var->transp.msb_right = 0;
	97	var->transp.offset = 0;
	98	var->transp.length = 0;
	99	var->red.msb_right = 0;
	100	var->red.offset = 0;
	101	var->red.length = var->bits_per_pixel;
	102	var->green = var->red;
	103	var->blue = var->red;
	104
	105	if (var->bits_per_pixel > 4)
	106	return -EINVAL;
107
108	return 0;
109	}
110
111	/*
112	* Set the hardware state.
113	*/
114	static int
115	clps7111fb_set_par(struct fb_info *info)
116	{
117	unsigned int lcdcon, syscon, pixclock;
118
119	switch (info->var.bits_per_pixel) {
120	case 1:
121	info->fix.visual = FB_VISUAL_MONO01;
122	break;
123	case 2:
124	info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
125	break;
126	case 4:
127	info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
128	break;
129	}
130
131	info->fix.line_length = info->var.xres_virtual * info->var.bits_per_pixel / 8;
132
133	lcdcon = (info->var.xres_virtual * info->var.yres_virtual * info->var.bits_per_pixel) / 128 - 1;
134	lcdcon \|= ((info->var.xres_virtual / 16) - 1) << 13;
135	lcdcon \|= lcd_ac_prescale << 25;
136
137	/*
138	* Calculate pixel prescale value from the pixclock. This is:
139	* 36.864MHz / pixclock_mhz - 1.
140	* However, pixclock is in picoseconds, so this ends up being:
141	* 36864000 * pixclock_ps / 10^12 - 1
142	* and this will overflow the 32-bit math. We perform this as
143	* (9 * 4096000 == 36864000):
144	* pixclock_ps * 9 * (4096000 / 10^12) - 1
145	*/
146	pixclock = 9 * info->var.pixclock / 244140 - 1;
147	lcdcon \|= pixclock << 19;
148
149	if (info->var.bits_per_pixel == 4)
150	lcdcon \|= LCDCON_GSMD;
151	if (info->var.bits_per_pixel >= 2)
152	lcdcon \|= LCDCON_GSEN;
153
154	/*
155	* LCDCON must only be changed while the LCD is disabled
156	*/
157	syscon = clps_readl(SYSCON1);
158	clps_writel(syscon & ~SYSCON1_LCDEN, SYSCON1);
159	clps_writel(lcdcon, LCDCON);
160	clps_writel(syscon \| SYSCON1_LCDEN, SYSCON1);
161	return 0;
162	}
163
164	static int clps7111fb_blank(int blank, struct fb_info *info)
165	{
166	if (blank) {
167	if (machine_is_edb7211()) {
168	/* Turn off the LCD backlight. */
169	clps_writeb(clps_readb(PDDR) & ~EDB_PD3_LCDBL, PDDR);
170
171	/* Power off the LCD DC-DC converter. */
172	clps_writeb(clps_readb(PDDR) & ~EDB_PD1_LCD_DC_DC_EN, PDDR);
173
174	/* Delay for a little while (half a second). */
175	udelay(100);
176
177	/* Power off the LCD panel. */
178	clps_writeb(clps_readb(PDDR) & ~EDB_PD2_LCDEN, PDDR);
179
180	/* Power off the LCD controller. */
181	clps_writel(clps_readl(SYSCON1) & ~SYSCON1_LCDEN,
182	SYSCON1);
183	}
184	} else {
185	if (machine_is_edb7211()) {
186	/* Power up the LCD controller. */
187	clps_writel(clps_readl(SYSCON1) \| SYSCON1_LCDEN,
188	SYSCON1);
189
190	/* Power up the LCD panel. */
191	clps_writeb(clps_readb(PDDR) \| EDB_PD2_LCDEN, PDDR);
192
193	/* Delay for a little while. */
194	udelay(100);
195
196	/* Power up the LCD DC-DC converter. */
197	clps_writeb(clps_readb(PDDR) \| EDB_PD1_LCD_DC_DC_EN,
198	PDDR);
199
200	/* Turn on the LCD backlight. */
201	clps_writeb(clps_readb(PDDR) \| EDB_PD3_LCDBL, PDDR);
202	}
203	}
204	return 0;
205	}
206
207	static struct fb_ops clps7111fb_ops = {
208	.owner = THIS_MODULE,
209	.fb_check_var = clps7111fb_check_var,
210	.fb_set_par = clps7111fb_set_par,
211	.fb_setcolreg = clps7111fb_setcolreg,
212	.fb_blank = clps7111fb_blank,
213	.fb_fillrect = cfb_fillrect,
214	.fb_copyarea = cfb_copyarea,
215	.fb_imageblit = cfb_imageblit,
1da177e4 LT	216	};
1da177e4 LT	217
fa1f136e	218	static int backlight_proc_show(struct seq_file m, void v)
1da177e4	219	{
1da177e4	220	if (machine_is_edb7211()) {
fa1f136e	221	seq_printf(m, "%d\n",
1da177e4 LT	222	(clps_readb(PDDR) & EDB_PD3_LCDBL) ? 1 : 0);
	223	}
	224
	225	return 0;
	226	}
	227
fa1f136e AD	228	static int backlight_proc_open(struct inode inode, struct file file)
	229	{
	230	return single_open(file, backlight_proc_show, NULL);
	231	}
	232
	233	static ssize_t backlight_proc_write(struct file file, const char buffer,
	234	size_t count, loff_t *pos)
1da177e4 LT	235	{
	236	unsigned char char_value;
	237	int value;
	238
	239	if (count < 1) {
	240	return -EINVAL;
	241	}
	242
	243	if (copy_from_user(&char_value, buffer, 1))
	244	return -EFAULT;
	245
	246	value = char_value - '0';
	247
	248	if (machine_is_edb7211()) {
	249	unsigned char port_d;
	250
	251	port_d = clps_readb(PDDR);
	252
	253	if (value) {
	254	port_d \|= EDB_PD3_LCDBL;
	255	} else {
	256	port_d &= ~EDB_PD3_LCDBL;
	257	}
	258
	259	clps_writeb(port_d, PDDR);
	260	}
	261
	262	return count;
	263	}
	264
fa1f136e AD	265	static const struct file_operations backlight_proc_fops = {
	266	.owner = THIS_MODULE,
	267	.open = backlight_proc_open,
	268	.read = seq_read,
	269	.llseek = seq_lseek,
	270	.release = single_release,
	271	.write = backlight_proc_write,
	272	};
	273
1da177e4 LT	274	static void __init clps711x_guess_lcd_params(struct fb_info *info)
	275	{
	276	unsigned int lcdcon, syscon, size;
	277	unsigned long phys_base = PAGE_OFFSET;
	278	void virt_base = (void )PAGE_OFFSET;
	279
	280	info->var.xres_virtual = 640;
	281	info->var.yres_virtual = 240;
	282	info->var.bits_per_pixel = 4;
	283	info->var.activate = FB_ACTIVATE_NOW;
	284	info->var.height = -1;
	285	info->var.width = -1;
	286	info->var.pixclock = 93006; /* 10.752MHz pixel clock */
	287
	288	/*
	289	* If the LCD controller is already running, decode the values
	290	* in LCDCON to xres/yres/bpp/pixclock/acprescale
	291	*/
	292	syscon = clps_readl(SYSCON1);
	293	if (syscon & SYSCON1_LCDEN) {
	294	lcdcon = clps_readl(LCDCON);
	295
	296	/*
	297	* Decode GSMD and GSEN bits to bits per pixel
	298	*/
	299	switch (lcdcon & (LCDCON_GSMD \| LCDCON_GSEN)) {
	300	case LCDCON_GSMD \| LCDCON_GSEN:
	301	info->var.bits_per_pixel = 4;
	302	break;
	303
	304	case LCDCON_GSEN:
	305	info->var.bits_per_pixel = 2;
	306	break;
	307
	308	default:
	309	info->var.bits_per_pixel = 1;
	310	break;
	311	}
	312
	313	/*
	314	* Decode xres/yres
	315	*/
	316	info->var.xres_virtual = (((lcdcon >> 13) & 0x3f) + 1) * 16;
	317	info->var.yres_virtual = (((lcdcon & 0x1fff) + 1) * 128) /
	318	(info->var.xres_virtual *
	319	info->var.bits_per_pixel);
	320
	321	/*
	322	* Calculate pixclock
	323	*/
	324	info->var.pixclock = (((lcdcon >> 19) & 0x3f) + 1) * 244140 / 9;
	325
	326	/*
	327	* Grab AC prescale
	328	*/
	329	lcd_ac_prescale = (lcdcon >> 25) & 0x1f;
	330	}
	331
	332	info->var.xres = info->var.xres_virtual;
	333	info->var.yres = info->var.yres_virtual;
	334	info->var.grayscale = info->var.bits_per_pixel > 1;
	335
	336	size = info->var.xres * info->var.yres * info->var.bits_per_pixel / 8;
	337
338	/*
339	* Might be worth checking to see if we can use the on-board
340	* RAM if size here...
341	* CLPS7110 - no on-board SRAM
342	* EP7212 - 38400 bytes
343	*/
344	if (size <= 38400) {
345	printk(KERN_INFO "CLPS711xFB: could use on-board SRAM?\n");
346	}
347
348	if ((syscon & SYSCON1_LCDEN) == 0) {
349	/*
350	* The display isn't running. Ensure that
351	* the display memory is empty.
352	*/
353	memset(virt_base, 0, size);
354	}
355
356	info->screen_base = virt_base;
357	info->fix.smem_start = phys_base;
358	info->fix.smem_len = PAGE_ALIGN(size);
359	info->fix.type = FB_TYPE_PACKED_PIXELS;
360	}
361
362	int __init clps711xfb_init(void)
363	{
364	int err = -ENOMEM;
365
366	if (fb_get_options("clps711xfb", NULL))
367	return -ENODEV;
368
dd00cc48	369	cfb = kzalloc(sizeof(*cfb), GFP_KERNEL);
1da177e4 LT	370	if (!cfb)
	371	goto out;
	372
1da177e4 LT	373	strcpy(cfb->fix.id, "clps711x");
	374
	375	cfb->fbops = &clps7111fb_ops;
	376	cfb->flags = FBINFO_DEFAULT;
	377
	378	clps711x_guess_lcd_params(cfb);
	379
	380	fb_alloc_cmap(&cfb->cmap, CMAP_MAX_SIZE, 0);
	381
fa1f136e	382	if (!proc_create("backlight", 0444, NULL, &backlight_proc_fops)) {
1da177e4 LT	383	printk("Couldn't create the /proc entry for the backlight.\n");
	384	return -EINVAL;
	385	}
	386
1da177e4 LT	387	/*
	388	* Power up the LCD
	389	*/
	390	if (machine_is_p720t()) {
	391	PLD_LCDEN = PLD_LCDEN_EN;
	392	PLD_PWR \|= (PLD_S4_ON\|PLD_S3_ON\|PLD_S2_ON\|PLD_S1_ON);
	393	}
	394
	395	if (machine_is_edb7211()) {
	396	/* Power up the LCD panel. */
	397	clps_writeb(clps_readb(PDDR) \| EDB_PD2_LCDEN, PDDR);
	398
	399	/* Delay for a little while. */
	400	udelay(100);
	401
	402	/* Power up the LCD DC-DC converter. */
	403	clps_writeb(clps_readb(PDDR) \| EDB_PD1_LCD_DC_DC_EN, PDDR);
	404
	405	/* Turn on the LCD backlight. */
	406	clps_writeb(clps_readb(PDDR) \| EDB_PD3_LCDBL, PDDR);
	407	}
	408
	409	err = register_framebuffer(cfb);
	410
	411	out: return err;
	412	}
	413
	414	static void __exit clps711xfb_exit(void)
	415	{
	416	unregister_framebuffer(cfb);
	417	kfree(cfb);
	418
	419	/*
	420	* Power down the LCD
	421	*/
	422	if (machine_is_p720t()) {
	423	PLD_LCDEN = 0;
	424	PLD_PWR &= ~(PLD_S4_ON\|PLD_S3_ON\|PLD_S2_ON\|PLD_S1_ON);
	425	}
	426	}
	427
	428	module_init(clps711xfb_init);
	429	module_exit(clps711xfb_exit);
	430
	431	MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>");
	432	MODULE_DESCRIPTION("CLPS711x framebuffer driver");
	433	MODULE_LICENSE("GPL");