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c4144247 YS |
1 | /* |
2 | * R8A66597 UDC (USB gadget) | |
3 | * | |
4 | * Copyright (C) 2006-2009 Renesas Solutions Corp. | |
5 | * | |
6 | * Author : Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; version 2 of the License. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
20 | * | |
21 | */ | |
22 | ||
23 | #include <linux/module.h> | |
24 | #include <linux/interrupt.h> | |
25 | #include <linux/delay.h> | |
fa7bf342 | 26 | #include <linux/err.h> |
c4144247 YS |
27 | #include <linux/io.h> |
28 | #include <linux/platform_device.h> | |
d2e27bdf | 29 | #include <linux/clk.h> |
ae3a0792 | 30 | #include <linux/err.h> |
5a0e3ad6 | 31 | #include <linux/slab.h> |
c4144247 YS |
32 | |
33 | #include <linux/usb/ch9.h> | |
34 | #include <linux/usb/gadget.h> | |
35 | ||
36 | #include "r8a66597-udc.h" | |
37 | ||
38 | #define DRIVER_VERSION "2009-08-18" | |
39 | ||
40 | static const char udc_name[] = "r8a66597_udc"; | |
41 | static const char *r8a66597_ep_name[] = { | |
42 | "ep0", "ep1", "ep2", "ep3", "ep4", "ep5", "ep6", "ep7", | |
43 | "ep8", "ep9", | |
44 | }; | |
45 | ||
46 | static void disable_controller(struct r8a66597 *r8a66597); | |
47 | static void irq_ep0_write(struct r8a66597_ep *ep, struct r8a66597_request *req); | |
48 | static void irq_packet_write(struct r8a66597_ep *ep, | |
49 | struct r8a66597_request *req); | |
50 | static int r8a66597_queue(struct usb_ep *_ep, struct usb_request *_req, | |
51 | gfp_t gfp_flags); | |
52 | ||
53 | static void transfer_complete(struct r8a66597_ep *ep, | |
54 | struct r8a66597_request *req, int status); | |
55 | ||
56 | /*-------------------------------------------------------------------------*/ | |
57 | static inline u16 get_usb_speed(struct r8a66597 *r8a66597) | |
58 | { | |
59 | return r8a66597_read(r8a66597, DVSTCTR0) & RHST; | |
60 | } | |
61 | ||
62 | static void enable_pipe_irq(struct r8a66597 *r8a66597, u16 pipenum, | |
63 | unsigned long reg) | |
64 | { | |
65 | u16 tmp; | |
66 | ||
67 | tmp = r8a66597_read(r8a66597, INTENB0); | |
68 | r8a66597_bclr(r8a66597, BEMPE | NRDYE | BRDYE, | |
69 | INTENB0); | |
70 | r8a66597_bset(r8a66597, (1 << pipenum), reg); | |
71 | r8a66597_write(r8a66597, tmp, INTENB0); | |
72 | } | |
73 | ||
74 | static void disable_pipe_irq(struct r8a66597 *r8a66597, u16 pipenum, | |
75 | unsigned long reg) | |
76 | { | |
77 | u16 tmp; | |
78 | ||
79 | tmp = r8a66597_read(r8a66597, INTENB0); | |
80 | r8a66597_bclr(r8a66597, BEMPE | NRDYE | BRDYE, | |
81 | INTENB0); | |
82 | r8a66597_bclr(r8a66597, (1 << pipenum), reg); | |
83 | r8a66597_write(r8a66597, tmp, INTENB0); | |
84 | } | |
85 | ||
86 | static void r8a66597_usb_connect(struct r8a66597 *r8a66597) | |
87 | { | |
88 | r8a66597_bset(r8a66597, CTRE, INTENB0); | |
89 | r8a66597_bset(r8a66597, BEMPE | BRDYE, INTENB0); | |
90 | ||
91 | r8a66597_bset(r8a66597, DPRPU, SYSCFG0); | |
92 | } | |
93 | ||
94 | static void r8a66597_usb_disconnect(struct r8a66597 *r8a66597) | |
95 | __releases(r8a66597->lock) | |
96 | __acquires(r8a66597->lock) | |
97 | { | |
98 | r8a66597_bclr(r8a66597, CTRE, INTENB0); | |
99 | r8a66597_bclr(r8a66597, BEMPE | BRDYE, INTENB0); | |
100 | r8a66597_bclr(r8a66597, DPRPU, SYSCFG0); | |
101 | ||
102 | r8a66597->gadget.speed = USB_SPEED_UNKNOWN; | |
103 | spin_unlock(&r8a66597->lock); | |
104 | r8a66597->driver->disconnect(&r8a66597->gadget); | |
105 | spin_lock(&r8a66597->lock); | |
106 | ||
107 | disable_controller(r8a66597); | |
108 | INIT_LIST_HEAD(&r8a66597->ep[0].queue); | |
109 | } | |
110 | ||
111 | static inline u16 control_reg_get_pid(struct r8a66597 *r8a66597, u16 pipenum) | |
112 | { | |
113 | u16 pid = 0; | |
114 | unsigned long offset; | |
115 | ||
116 | if (pipenum == 0) | |
117 | pid = r8a66597_read(r8a66597, DCPCTR) & PID; | |
118 | else if (pipenum < R8A66597_MAX_NUM_PIPE) { | |
119 | offset = get_pipectr_addr(pipenum); | |
120 | pid = r8a66597_read(r8a66597, offset) & PID; | |
121 | } else | |
122 | printk(KERN_ERR "unexpect pipe num (%d)\n", pipenum); | |
123 | ||
124 | return pid; | |
125 | } | |
126 | ||
127 | static inline void control_reg_set_pid(struct r8a66597 *r8a66597, u16 pipenum, | |
128 | u16 pid) | |
129 | { | |
130 | unsigned long offset; | |
131 | ||
132 | if (pipenum == 0) | |
133 | r8a66597_mdfy(r8a66597, pid, PID, DCPCTR); | |
134 | else if (pipenum < R8A66597_MAX_NUM_PIPE) { | |
135 | offset = get_pipectr_addr(pipenum); | |
136 | r8a66597_mdfy(r8a66597, pid, PID, offset); | |
137 | } else | |
138 | printk(KERN_ERR "unexpect pipe num (%d)\n", pipenum); | |
139 | } | |
140 | ||
141 | static inline void pipe_start(struct r8a66597 *r8a66597, u16 pipenum) | |
142 | { | |
143 | control_reg_set_pid(r8a66597, pipenum, PID_BUF); | |
144 | } | |
145 | ||
146 | static inline void pipe_stop(struct r8a66597 *r8a66597, u16 pipenum) | |
147 | { | |
148 | control_reg_set_pid(r8a66597, pipenum, PID_NAK); | |
149 | } | |
150 | ||
151 | static inline void pipe_stall(struct r8a66597 *r8a66597, u16 pipenum) | |
152 | { | |
153 | control_reg_set_pid(r8a66597, pipenum, PID_STALL); | |
154 | } | |
155 | ||
156 | static inline u16 control_reg_get(struct r8a66597 *r8a66597, u16 pipenum) | |
157 | { | |
158 | u16 ret = 0; | |
159 | unsigned long offset; | |
160 | ||
161 | if (pipenum == 0) | |
162 | ret = r8a66597_read(r8a66597, DCPCTR); | |
163 | else if (pipenum < R8A66597_MAX_NUM_PIPE) { | |
164 | offset = get_pipectr_addr(pipenum); | |
165 | ret = r8a66597_read(r8a66597, offset); | |
166 | } else | |
167 | printk(KERN_ERR "unexpect pipe num (%d)\n", pipenum); | |
168 | ||
169 | return ret; | |
170 | } | |
171 | ||
172 | static inline void control_reg_sqclr(struct r8a66597 *r8a66597, u16 pipenum) | |
173 | { | |
174 | unsigned long offset; | |
175 | ||
176 | pipe_stop(r8a66597, pipenum); | |
177 | ||
178 | if (pipenum == 0) | |
179 | r8a66597_bset(r8a66597, SQCLR, DCPCTR); | |
180 | else if (pipenum < R8A66597_MAX_NUM_PIPE) { | |
181 | offset = get_pipectr_addr(pipenum); | |
182 | r8a66597_bset(r8a66597, SQCLR, offset); | |
183 | } else | |
184 | printk(KERN_ERR "unexpect pipe num(%d)\n", pipenum); | |
185 | } | |
186 | ||
187 | static inline int get_buffer_size(struct r8a66597 *r8a66597, u16 pipenum) | |
188 | { | |
189 | u16 tmp; | |
190 | int size; | |
191 | ||
192 | if (pipenum == 0) { | |
193 | tmp = r8a66597_read(r8a66597, DCPCFG); | |
194 | if ((tmp & R8A66597_CNTMD) != 0) | |
195 | size = 256; | |
196 | else { | |
197 | tmp = r8a66597_read(r8a66597, DCPMAXP); | |
198 | size = tmp & MAXP; | |
199 | } | |
200 | } else { | |
201 | r8a66597_write(r8a66597, pipenum, PIPESEL); | |
202 | tmp = r8a66597_read(r8a66597, PIPECFG); | |
203 | if ((tmp & R8A66597_CNTMD) != 0) { | |
204 | tmp = r8a66597_read(r8a66597, PIPEBUF); | |
205 | size = ((tmp >> 10) + 1) * 64; | |
206 | } else { | |
207 | tmp = r8a66597_read(r8a66597, PIPEMAXP); | |
208 | size = tmp & MXPS; | |
209 | } | |
210 | } | |
211 | ||
212 | return size; | |
213 | } | |
214 | ||
215 | static inline unsigned short mbw_value(struct r8a66597 *r8a66597) | |
216 | { | |
217 | if (r8a66597->pdata->on_chip) | |
218 | return MBW_32; | |
219 | else | |
220 | return MBW_16; | |
221 | } | |
222 | ||
223 | static inline void pipe_change(struct r8a66597 *r8a66597, u16 pipenum) | |
224 | { | |
225 | struct r8a66597_ep *ep = r8a66597->pipenum2ep[pipenum]; | |
226 | ||
227 | if (ep->use_dma) | |
228 | return; | |
229 | ||
230 | r8a66597_mdfy(r8a66597, pipenum, CURPIPE, ep->fifosel); | |
231 | ||
232 | ndelay(450); | |
233 | ||
234 | r8a66597_bset(r8a66597, mbw_value(r8a66597), ep->fifosel); | |
235 | } | |
236 | ||
237 | static int pipe_buffer_setting(struct r8a66597 *r8a66597, | |
238 | struct r8a66597_pipe_info *info) | |
239 | { | |
240 | u16 bufnum = 0, buf_bsize = 0; | |
241 | u16 pipecfg = 0; | |
242 | ||
243 | if (info->pipe == 0) | |
244 | return -EINVAL; | |
245 | ||
246 | r8a66597_write(r8a66597, info->pipe, PIPESEL); | |
247 | ||
248 | if (info->dir_in) | |
249 | pipecfg |= R8A66597_DIR; | |
250 | pipecfg |= info->type; | |
251 | pipecfg |= info->epnum; | |
252 | switch (info->type) { | |
253 | case R8A66597_INT: | |
254 | bufnum = 4 + (info->pipe - R8A66597_BASE_PIPENUM_INT); | |
255 | buf_bsize = 0; | |
256 | break; | |
257 | case R8A66597_BULK: | |
ef5ce3b6 MD |
258 | /* isochronous pipes may be used as bulk pipes */ |
259 | if (info->pipe > R8A66597_BASE_PIPENUM_BULK) | |
260 | bufnum = info->pipe - R8A66597_BASE_PIPENUM_BULK; | |
261 | else | |
262 | bufnum = info->pipe - R8A66597_BASE_PIPENUM_ISOC; | |
263 | ||
264 | bufnum = R8A66597_BASE_BUFNUM + (bufnum * 16); | |
c4144247 YS |
265 | buf_bsize = 7; |
266 | pipecfg |= R8A66597_DBLB; | |
267 | if (!info->dir_in) | |
268 | pipecfg |= R8A66597_SHTNAK; | |
269 | break; | |
270 | case R8A66597_ISO: | |
ef5ce3b6 | 271 | bufnum = R8A66597_BASE_BUFNUM + |
c4144247 | 272 | (info->pipe - R8A66597_BASE_PIPENUM_ISOC) * 16; |
c4144247 YS |
273 | buf_bsize = 7; |
274 | break; | |
275 | } | |
ef5ce3b6 MD |
276 | |
277 | if (buf_bsize && ((bufnum + 16) >= R8A66597_MAX_BUFNUM)) { | |
278 | pr_err(KERN_ERR "r8a66597 pipe memory is insufficient\n"); | |
c4144247 YS |
279 | return -ENOMEM; |
280 | } | |
281 | ||
282 | r8a66597_write(r8a66597, pipecfg, PIPECFG); | |
283 | r8a66597_write(r8a66597, (buf_bsize << 10) | (bufnum), PIPEBUF); | |
284 | r8a66597_write(r8a66597, info->maxpacket, PIPEMAXP); | |
285 | if (info->interval) | |
286 | info->interval--; | |
287 | r8a66597_write(r8a66597, info->interval, PIPEPERI); | |
288 | ||
289 | return 0; | |
290 | } | |
291 | ||
292 | static void pipe_buffer_release(struct r8a66597 *r8a66597, | |
293 | struct r8a66597_pipe_info *info) | |
294 | { | |
295 | if (info->pipe == 0) | |
296 | return; | |
297 | ||
c4144247 YS |
298 | if (is_bulk_pipe(info->pipe)) |
299 | r8a66597->bulk--; | |
300 | else if (is_interrupt_pipe(info->pipe)) | |
301 | r8a66597->interrupt--; | |
302 | else if (is_isoc_pipe(info->pipe)) { | |
303 | r8a66597->isochronous--; | |
304 | if (info->type == R8A66597_BULK) | |
305 | r8a66597->bulk--; | |
306 | } else | |
307 | printk(KERN_ERR "ep_release: unexpect pipenum (%d)\n", | |
308 | info->pipe); | |
309 | } | |
310 | ||
311 | static void pipe_initialize(struct r8a66597_ep *ep) | |
312 | { | |
313 | struct r8a66597 *r8a66597 = ep->r8a66597; | |
314 | ||
315 | r8a66597_mdfy(r8a66597, 0, CURPIPE, ep->fifosel); | |
316 | ||
317 | r8a66597_write(r8a66597, ACLRM, ep->pipectr); | |
318 | r8a66597_write(r8a66597, 0, ep->pipectr); | |
319 | r8a66597_write(r8a66597, SQCLR, ep->pipectr); | |
320 | if (ep->use_dma) { | |
321 | r8a66597_mdfy(r8a66597, ep->pipenum, CURPIPE, ep->fifosel); | |
322 | ||
323 | ndelay(450); | |
324 | ||
325 | r8a66597_bset(r8a66597, mbw_value(r8a66597), ep->fifosel); | |
326 | } | |
327 | } | |
328 | ||
329 | static void r8a66597_ep_setting(struct r8a66597 *r8a66597, | |
330 | struct r8a66597_ep *ep, | |
331 | const struct usb_endpoint_descriptor *desc, | |
332 | u16 pipenum, int dma) | |
333 | { | |
334 | ep->use_dma = 0; | |
335 | ep->fifoaddr = CFIFO; | |
336 | ep->fifosel = CFIFOSEL; | |
337 | ep->fifoctr = CFIFOCTR; | |
338 | ep->fifotrn = 0; | |
339 | ||
340 | ep->pipectr = get_pipectr_addr(pipenum); | |
341 | ep->pipenum = pipenum; | |
342 | ep->ep.maxpacket = le16_to_cpu(desc->wMaxPacketSize); | |
343 | r8a66597->pipenum2ep[pipenum] = ep; | |
344 | r8a66597->epaddr2ep[desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK] | |
345 | = ep; | |
346 | INIT_LIST_HEAD(&ep->queue); | |
347 | } | |
348 | ||
349 | static void r8a66597_ep_release(struct r8a66597_ep *ep) | |
350 | { | |
351 | struct r8a66597 *r8a66597 = ep->r8a66597; | |
352 | u16 pipenum = ep->pipenum; | |
353 | ||
354 | if (pipenum == 0) | |
355 | return; | |
356 | ||
357 | if (ep->use_dma) | |
358 | r8a66597->num_dma--; | |
359 | ep->pipenum = 0; | |
360 | ep->busy = 0; | |
361 | ep->use_dma = 0; | |
362 | } | |
363 | ||
364 | static int alloc_pipe_config(struct r8a66597_ep *ep, | |
365 | const struct usb_endpoint_descriptor *desc) | |
366 | { | |
367 | struct r8a66597 *r8a66597 = ep->r8a66597; | |
368 | struct r8a66597_pipe_info info; | |
369 | int dma = 0; | |
370 | unsigned char *counter; | |
371 | int ret; | |
372 | ||
373 | ep->desc = desc; | |
374 | ||
375 | if (ep->pipenum) /* already allocated pipe */ | |
376 | return 0; | |
377 | ||
378 | switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) { | |
379 | case USB_ENDPOINT_XFER_BULK: | |
380 | if (r8a66597->bulk >= R8A66597_MAX_NUM_BULK) { | |
381 | if (r8a66597->isochronous >= R8A66597_MAX_NUM_ISOC) { | |
382 | printk(KERN_ERR "bulk pipe is insufficient\n"); | |
383 | return -ENODEV; | |
384 | } else { | |
385 | info.pipe = R8A66597_BASE_PIPENUM_ISOC | |
386 | + r8a66597->isochronous; | |
387 | counter = &r8a66597->isochronous; | |
388 | } | |
389 | } else { | |
390 | info.pipe = R8A66597_BASE_PIPENUM_BULK + r8a66597->bulk; | |
391 | counter = &r8a66597->bulk; | |
392 | } | |
393 | info.type = R8A66597_BULK; | |
394 | dma = 1; | |
395 | break; | |
396 | case USB_ENDPOINT_XFER_INT: | |
397 | if (r8a66597->interrupt >= R8A66597_MAX_NUM_INT) { | |
398 | printk(KERN_ERR "interrupt pipe is insufficient\n"); | |
399 | return -ENODEV; | |
400 | } | |
401 | info.pipe = R8A66597_BASE_PIPENUM_INT + r8a66597->interrupt; | |
402 | info.type = R8A66597_INT; | |
403 | counter = &r8a66597->interrupt; | |
404 | break; | |
405 | case USB_ENDPOINT_XFER_ISOC: | |
406 | if (r8a66597->isochronous >= R8A66597_MAX_NUM_ISOC) { | |
407 | printk(KERN_ERR "isochronous pipe is insufficient\n"); | |
408 | return -ENODEV; | |
409 | } | |
410 | info.pipe = R8A66597_BASE_PIPENUM_ISOC + r8a66597->isochronous; | |
411 | info.type = R8A66597_ISO; | |
412 | counter = &r8a66597->isochronous; | |
413 | break; | |
414 | default: | |
415 | printk(KERN_ERR "unexpect xfer type\n"); | |
416 | return -EINVAL; | |
417 | } | |
418 | ep->type = info.type; | |
419 | ||
420 | info.epnum = desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; | |
421 | info.maxpacket = le16_to_cpu(desc->wMaxPacketSize); | |
422 | info.interval = desc->bInterval; | |
423 | if (desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) | |
424 | info.dir_in = 1; | |
425 | else | |
426 | info.dir_in = 0; | |
427 | ||
428 | ret = pipe_buffer_setting(r8a66597, &info); | |
429 | if (ret < 0) { | |
430 | printk(KERN_ERR "pipe_buffer_setting fail\n"); | |
431 | return ret; | |
432 | } | |
433 | ||
434 | (*counter)++; | |
435 | if ((counter == &r8a66597->isochronous) && info.type == R8A66597_BULK) | |
436 | r8a66597->bulk++; | |
437 | ||
438 | r8a66597_ep_setting(r8a66597, ep, desc, info.pipe, dma); | |
439 | pipe_initialize(ep); | |
440 | ||
441 | return 0; | |
442 | } | |
443 | ||
444 | static int free_pipe_config(struct r8a66597_ep *ep) | |
445 | { | |
446 | struct r8a66597 *r8a66597 = ep->r8a66597; | |
447 | struct r8a66597_pipe_info info; | |
448 | ||
449 | info.pipe = ep->pipenum; | |
450 | info.type = ep->type; | |
451 | pipe_buffer_release(r8a66597, &info); | |
452 | r8a66597_ep_release(ep); | |
453 | ||
454 | return 0; | |
455 | } | |
456 | ||
457 | /*-------------------------------------------------------------------------*/ | |
458 | static void pipe_irq_enable(struct r8a66597 *r8a66597, u16 pipenum) | |
459 | { | |
460 | enable_irq_ready(r8a66597, pipenum); | |
461 | enable_irq_nrdy(r8a66597, pipenum); | |
462 | } | |
463 | ||
464 | static void pipe_irq_disable(struct r8a66597 *r8a66597, u16 pipenum) | |
465 | { | |
466 | disable_irq_ready(r8a66597, pipenum); | |
467 | disable_irq_nrdy(r8a66597, pipenum); | |
468 | } | |
469 | ||
470 | /* if complete is true, gadget driver complete function is not call */ | |
471 | static void control_end(struct r8a66597 *r8a66597, unsigned ccpl) | |
472 | { | |
473 | r8a66597->ep[0].internal_ccpl = ccpl; | |
474 | pipe_start(r8a66597, 0); | |
475 | r8a66597_bset(r8a66597, CCPL, DCPCTR); | |
476 | } | |
477 | ||
478 | static void start_ep0_write(struct r8a66597_ep *ep, | |
479 | struct r8a66597_request *req) | |
480 | { | |
481 | struct r8a66597 *r8a66597 = ep->r8a66597; | |
482 | ||
483 | pipe_change(r8a66597, ep->pipenum); | |
484 | r8a66597_mdfy(r8a66597, ISEL, (ISEL | CURPIPE), CFIFOSEL); | |
485 | r8a66597_write(r8a66597, BCLR, ep->fifoctr); | |
486 | if (req->req.length == 0) { | |
487 | r8a66597_bset(r8a66597, BVAL, ep->fifoctr); | |
488 | pipe_start(r8a66597, 0); | |
489 | transfer_complete(ep, req, 0); | |
490 | } else { | |
491 | r8a66597_write(r8a66597, ~BEMP0, BEMPSTS); | |
492 | irq_ep0_write(ep, req); | |
493 | } | |
494 | } | |
495 | ||
496 | static void start_packet_write(struct r8a66597_ep *ep, | |
497 | struct r8a66597_request *req) | |
498 | { | |
499 | struct r8a66597 *r8a66597 = ep->r8a66597; | |
500 | u16 tmp; | |
501 | ||
502 | pipe_change(r8a66597, ep->pipenum); | |
503 | disable_irq_empty(r8a66597, ep->pipenum); | |
504 | pipe_start(r8a66597, ep->pipenum); | |
505 | ||
506 | tmp = r8a66597_read(r8a66597, ep->fifoctr); | |
507 | if (unlikely((tmp & FRDY) == 0)) | |
508 | pipe_irq_enable(r8a66597, ep->pipenum); | |
509 | else | |
510 | irq_packet_write(ep, req); | |
511 | } | |
512 | ||
513 | static void start_packet_read(struct r8a66597_ep *ep, | |
514 | struct r8a66597_request *req) | |
515 | { | |
516 | struct r8a66597 *r8a66597 = ep->r8a66597; | |
517 | u16 pipenum = ep->pipenum; | |
518 | ||
519 | if (ep->pipenum == 0) { | |
520 | r8a66597_mdfy(r8a66597, 0, (ISEL | CURPIPE), CFIFOSEL); | |
521 | r8a66597_write(r8a66597, BCLR, ep->fifoctr); | |
522 | pipe_start(r8a66597, pipenum); | |
523 | pipe_irq_enable(r8a66597, pipenum); | |
524 | } else { | |
525 | if (ep->use_dma) { | |
526 | r8a66597_bset(r8a66597, TRCLR, ep->fifosel); | |
527 | pipe_change(r8a66597, pipenum); | |
528 | r8a66597_bset(r8a66597, TRENB, ep->fifosel); | |
529 | r8a66597_write(r8a66597, | |
530 | (req->req.length + ep->ep.maxpacket - 1) | |
531 | / ep->ep.maxpacket, | |
532 | ep->fifotrn); | |
533 | } | |
534 | pipe_start(r8a66597, pipenum); /* trigger once */ | |
535 | pipe_irq_enable(r8a66597, pipenum); | |
536 | } | |
537 | } | |
538 | ||
539 | static void start_packet(struct r8a66597_ep *ep, struct r8a66597_request *req) | |
540 | { | |
541 | if (ep->desc->bEndpointAddress & USB_DIR_IN) | |
542 | start_packet_write(ep, req); | |
543 | else | |
544 | start_packet_read(ep, req); | |
545 | } | |
546 | ||
547 | static void start_ep0(struct r8a66597_ep *ep, struct r8a66597_request *req) | |
548 | { | |
549 | u16 ctsq; | |
550 | ||
551 | ctsq = r8a66597_read(ep->r8a66597, INTSTS0) & CTSQ; | |
552 | ||
553 | switch (ctsq) { | |
554 | case CS_RDDS: | |
555 | start_ep0_write(ep, req); | |
556 | break; | |
557 | case CS_WRDS: | |
558 | start_packet_read(ep, req); | |
559 | break; | |
560 | ||
561 | case CS_WRND: | |
562 | control_end(ep->r8a66597, 0); | |
563 | break; | |
564 | default: | |
565 | printk(KERN_ERR "start_ep0: unexpect ctsq(%x)\n", ctsq); | |
566 | break; | |
567 | } | |
568 | } | |
569 | ||
570 | static void init_controller(struct r8a66597 *r8a66597) | |
571 | { | |
572 | u16 vif = r8a66597->pdata->vif ? LDRV : 0; | |
573 | u16 irq_sense = r8a66597->irq_sense_low ? INTL : 0; | |
574 | u16 endian = r8a66597->pdata->endian ? BIGEND : 0; | |
575 | ||
576 | if (r8a66597->pdata->on_chip) { | |
577 | r8a66597_bset(r8a66597, 0x04, SYSCFG1); | |
578 | r8a66597_bset(r8a66597, HSE, SYSCFG0); | |
579 | ||
580 | r8a66597_bclr(r8a66597, USBE, SYSCFG0); | |
581 | r8a66597_bclr(r8a66597, DPRPU, SYSCFG0); | |
582 | r8a66597_bset(r8a66597, USBE, SYSCFG0); | |
583 | ||
584 | r8a66597_bset(r8a66597, SCKE, SYSCFG0); | |
585 | ||
586 | r8a66597_bset(r8a66597, irq_sense, INTENB1); | |
587 | r8a66597_write(r8a66597, BURST | CPU_ADR_RD_WR, | |
588 | DMA0CFG); | |
589 | } else { | |
590 | r8a66597_bset(r8a66597, vif | endian, PINCFG); | |
591 | r8a66597_bset(r8a66597, HSE, SYSCFG0); /* High spd */ | |
592 | r8a66597_mdfy(r8a66597, get_xtal_from_pdata(r8a66597->pdata), | |
593 | XTAL, SYSCFG0); | |
594 | ||
595 | r8a66597_bclr(r8a66597, USBE, SYSCFG0); | |
596 | r8a66597_bclr(r8a66597, DPRPU, SYSCFG0); | |
597 | r8a66597_bset(r8a66597, USBE, SYSCFG0); | |
598 | ||
599 | r8a66597_bset(r8a66597, XCKE, SYSCFG0); | |
600 | ||
601 | msleep(3); | |
602 | ||
603 | r8a66597_bset(r8a66597, PLLC, SYSCFG0); | |
604 | ||
605 | msleep(1); | |
606 | ||
607 | r8a66597_bset(r8a66597, SCKE, SYSCFG0); | |
608 | ||
609 | r8a66597_bset(r8a66597, irq_sense, INTENB1); | |
610 | r8a66597_write(r8a66597, BURST | CPU_ADR_RD_WR, | |
611 | DMA0CFG); | |
612 | } | |
613 | } | |
614 | ||
615 | static void disable_controller(struct r8a66597 *r8a66597) | |
616 | { | |
617 | if (r8a66597->pdata->on_chip) { | |
618 | r8a66597_bset(r8a66597, SCKE, SYSCFG0); | |
619 | ||
0bb886d2 | 620 | /* disable interrupts */ |
c4144247 YS |
621 | r8a66597_write(r8a66597, 0, INTENB0); |
622 | r8a66597_write(r8a66597, 0, INTENB1); | |
0bb886d2 MD |
623 | r8a66597_write(r8a66597, 0, BRDYENB); |
624 | r8a66597_write(r8a66597, 0, BEMPENB); | |
625 | r8a66597_write(r8a66597, 0, NRDYENB); | |
626 | ||
627 | /* clear status */ | |
628 | r8a66597_write(r8a66597, 0, BRDYSTS); | |
629 | r8a66597_write(r8a66597, 0, NRDYSTS); | |
630 | r8a66597_write(r8a66597, 0, BEMPSTS); | |
c4144247 YS |
631 | |
632 | r8a66597_bclr(r8a66597, USBE, SYSCFG0); | |
633 | r8a66597_bclr(r8a66597, SCKE, SYSCFG0); | |
634 | ||
635 | } else { | |
636 | r8a66597_bclr(r8a66597, SCKE, SYSCFG0); | |
637 | udelay(1); | |
638 | r8a66597_bclr(r8a66597, PLLC, SYSCFG0); | |
639 | udelay(1); | |
640 | udelay(1); | |
641 | r8a66597_bclr(r8a66597, XCKE, SYSCFG0); | |
642 | } | |
643 | } | |
644 | ||
645 | static void r8a66597_start_xclock(struct r8a66597 *r8a66597) | |
646 | { | |
647 | u16 tmp; | |
648 | ||
649 | if (!r8a66597->pdata->on_chip) { | |
650 | tmp = r8a66597_read(r8a66597, SYSCFG0); | |
651 | if (!(tmp & XCKE)) | |
652 | r8a66597_bset(r8a66597, XCKE, SYSCFG0); | |
653 | } | |
654 | } | |
655 | ||
656 | static struct r8a66597_request *get_request_from_ep(struct r8a66597_ep *ep) | |
657 | { | |
658 | return list_entry(ep->queue.next, struct r8a66597_request, queue); | |
659 | } | |
660 | ||
661 | /*-------------------------------------------------------------------------*/ | |
662 | static void transfer_complete(struct r8a66597_ep *ep, | |
663 | struct r8a66597_request *req, int status) | |
664 | __releases(r8a66597->lock) | |
665 | __acquires(r8a66597->lock) | |
666 | { | |
667 | int restart = 0; | |
668 | ||
669 | if (unlikely(ep->pipenum == 0)) { | |
670 | if (ep->internal_ccpl) { | |
671 | ep->internal_ccpl = 0; | |
672 | return; | |
673 | } | |
674 | } | |
675 | ||
676 | list_del_init(&req->queue); | |
677 | if (ep->r8a66597->gadget.speed == USB_SPEED_UNKNOWN) | |
678 | req->req.status = -ESHUTDOWN; | |
679 | else | |
680 | req->req.status = status; | |
681 | ||
682 | if (!list_empty(&ep->queue)) | |
683 | restart = 1; | |
684 | ||
685 | spin_unlock(&ep->r8a66597->lock); | |
686 | req->req.complete(&ep->ep, &req->req); | |
687 | spin_lock(&ep->r8a66597->lock); | |
688 | ||
689 | if (restart) { | |
690 | req = get_request_from_ep(ep); | |
691 | if (ep->desc) | |
692 | start_packet(ep, req); | |
693 | } | |
694 | } | |
695 | ||
696 | static void irq_ep0_write(struct r8a66597_ep *ep, struct r8a66597_request *req) | |
697 | { | |
698 | int i; | |
699 | u16 tmp; | |
700 | unsigned bufsize; | |
701 | size_t size; | |
702 | void *buf; | |
703 | u16 pipenum = ep->pipenum; | |
704 | struct r8a66597 *r8a66597 = ep->r8a66597; | |
705 | ||
706 | pipe_change(r8a66597, pipenum); | |
707 | r8a66597_bset(r8a66597, ISEL, ep->fifosel); | |
708 | ||
709 | i = 0; | |
710 | do { | |
711 | tmp = r8a66597_read(r8a66597, ep->fifoctr); | |
712 | if (i++ > 100000) { | |
713 | printk(KERN_ERR "pipe0 is busy. maybe cpu i/o bus" | |
714 | "conflict. please power off this controller."); | |
715 | return; | |
716 | } | |
717 | ndelay(1); | |
718 | } while ((tmp & FRDY) == 0); | |
719 | ||
720 | /* prepare parameters */ | |
721 | bufsize = get_buffer_size(r8a66597, pipenum); | |
722 | buf = req->req.buf + req->req.actual; | |
723 | size = min(bufsize, req->req.length - req->req.actual); | |
724 | ||
725 | /* write fifo */ | |
726 | if (req->req.buf) { | |
727 | if (size > 0) | |
728 | r8a66597_write_fifo(r8a66597, ep->fifoaddr, buf, size); | |
729 | if ((size == 0) || ((size % ep->ep.maxpacket) != 0)) | |
730 | r8a66597_bset(r8a66597, BVAL, ep->fifoctr); | |
731 | } | |
732 | ||
733 | /* update parameters */ | |
734 | req->req.actual += size; | |
735 | ||
736 | /* check transfer finish */ | |
737 | if ((!req->req.zero && (req->req.actual == req->req.length)) | |
738 | || (size % ep->ep.maxpacket) | |
739 | || (size == 0)) { | |
740 | disable_irq_ready(r8a66597, pipenum); | |
741 | disable_irq_empty(r8a66597, pipenum); | |
742 | } else { | |
743 | disable_irq_ready(r8a66597, pipenum); | |
744 | enable_irq_empty(r8a66597, pipenum); | |
745 | } | |
746 | pipe_start(r8a66597, pipenum); | |
747 | } | |
748 | ||
749 | static void irq_packet_write(struct r8a66597_ep *ep, | |
750 | struct r8a66597_request *req) | |
751 | { | |
752 | u16 tmp; | |
753 | unsigned bufsize; | |
754 | size_t size; | |
755 | void *buf; | |
756 | u16 pipenum = ep->pipenum; | |
757 | struct r8a66597 *r8a66597 = ep->r8a66597; | |
758 | ||
759 | pipe_change(r8a66597, pipenum); | |
760 | tmp = r8a66597_read(r8a66597, ep->fifoctr); | |
761 | if (unlikely((tmp & FRDY) == 0)) { | |
762 | pipe_stop(r8a66597, pipenum); | |
763 | pipe_irq_disable(r8a66597, pipenum); | |
764 | printk(KERN_ERR "write fifo not ready. pipnum=%d\n", pipenum); | |
765 | return; | |
766 | } | |
767 | ||
768 | /* prepare parameters */ | |
769 | bufsize = get_buffer_size(r8a66597, pipenum); | |
770 | buf = req->req.buf + req->req.actual; | |
771 | size = min(bufsize, req->req.length - req->req.actual); | |
772 | ||
773 | /* write fifo */ | |
774 | if (req->req.buf) { | |
775 | r8a66597_write_fifo(r8a66597, ep->fifoaddr, buf, size); | |
776 | if ((size == 0) | |
777 | || ((size % ep->ep.maxpacket) != 0) | |
778 | || ((bufsize != ep->ep.maxpacket) | |
779 | && (bufsize > size))) | |
780 | r8a66597_bset(r8a66597, BVAL, ep->fifoctr); | |
781 | } | |
782 | ||
783 | /* update parameters */ | |
784 | req->req.actual += size; | |
785 | /* check transfer finish */ | |
786 | if ((!req->req.zero && (req->req.actual == req->req.length)) | |
787 | || (size % ep->ep.maxpacket) | |
788 | || (size == 0)) { | |
789 | disable_irq_ready(r8a66597, pipenum); | |
790 | enable_irq_empty(r8a66597, pipenum); | |
791 | } else { | |
792 | disable_irq_empty(r8a66597, pipenum); | |
793 | pipe_irq_enable(r8a66597, pipenum); | |
794 | } | |
795 | } | |
796 | ||
797 | static void irq_packet_read(struct r8a66597_ep *ep, | |
798 | struct r8a66597_request *req) | |
799 | { | |
800 | u16 tmp; | |
801 | int rcv_len, bufsize, req_len; | |
802 | int size; | |
803 | void *buf; | |
804 | u16 pipenum = ep->pipenum; | |
805 | struct r8a66597 *r8a66597 = ep->r8a66597; | |
806 | int finish = 0; | |
807 | ||
808 | pipe_change(r8a66597, pipenum); | |
809 | tmp = r8a66597_read(r8a66597, ep->fifoctr); | |
810 | if (unlikely((tmp & FRDY) == 0)) { | |
811 | req->req.status = -EPIPE; | |
812 | pipe_stop(r8a66597, pipenum); | |
813 | pipe_irq_disable(r8a66597, pipenum); | |
814 | printk(KERN_ERR "read fifo not ready"); | |
815 | return; | |
816 | } | |
817 | ||
818 | /* prepare parameters */ | |
819 | rcv_len = tmp & DTLN; | |
820 | bufsize = get_buffer_size(r8a66597, pipenum); | |
821 | ||
822 | buf = req->req.buf + req->req.actual; | |
823 | req_len = req->req.length - req->req.actual; | |
824 | if (rcv_len < bufsize) | |
825 | size = min(rcv_len, req_len); | |
826 | else | |
827 | size = min(bufsize, req_len); | |
828 | ||
829 | /* update parameters */ | |
830 | req->req.actual += size; | |
831 | ||
832 | /* check transfer finish */ | |
833 | if ((!req->req.zero && (req->req.actual == req->req.length)) | |
834 | || (size % ep->ep.maxpacket) | |
835 | || (size == 0)) { | |
836 | pipe_stop(r8a66597, pipenum); | |
837 | pipe_irq_disable(r8a66597, pipenum); | |
838 | finish = 1; | |
839 | } | |
840 | ||
841 | /* read fifo */ | |
842 | if (req->req.buf) { | |
843 | if (size == 0) | |
844 | r8a66597_write(r8a66597, BCLR, ep->fifoctr); | |
845 | else | |
846 | r8a66597_read_fifo(r8a66597, ep->fifoaddr, buf, size); | |
847 | ||
848 | } | |
849 | ||
850 | if ((ep->pipenum != 0) && finish) | |
851 | transfer_complete(ep, req, 0); | |
852 | } | |
853 | ||
854 | static void irq_pipe_ready(struct r8a66597 *r8a66597, u16 status, u16 enb) | |
855 | { | |
856 | u16 check; | |
857 | u16 pipenum; | |
858 | struct r8a66597_ep *ep; | |
859 | struct r8a66597_request *req; | |
860 | ||
861 | if ((status & BRDY0) && (enb & BRDY0)) { | |
862 | r8a66597_write(r8a66597, ~BRDY0, BRDYSTS); | |
863 | r8a66597_mdfy(r8a66597, 0, CURPIPE, CFIFOSEL); | |
864 | ||
865 | ep = &r8a66597->ep[0]; | |
866 | req = get_request_from_ep(ep); | |
867 | irq_packet_read(ep, req); | |
868 | } else { | |
869 | for (pipenum = 1; pipenum < R8A66597_MAX_NUM_PIPE; pipenum++) { | |
870 | check = 1 << pipenum; | |
871 | if ((status & check) && (enb & check)) { | |
872 | r8a66597_write(r8a66597, ~check, BRDYSTS); | |
873 | ep = r8a66597->pipenum2ep[pipenum]; | |
874 | req = get_request_from_ep(ep); | |
875 | if (ep->desc->bEndpointAddress & USB_DIR_IN) | |
876 | irq_packet_write(ep, req); | |
877 | else | |
878 | irq_packet_read(ep, req); | |
879 | } | |
880 | } | |
881 | } | |
882 | } | |
883 | ||
884 | static void irq_pipe_empty(struct r8a66597 *r8a66597, u16 status, u16 enb) | |
885 | { | |
886 | u16 tmp; | |
887 | u16 check; | |
888 | u16 pipenum; | |
889 | struct r8a66597_ep *ep; | |
890 | struct r8a66597_request *req; | |
891 | ||
892 | if ((status & BEMP0) && (enb & BEMP0)) { | |
893 | r8a66597_write(r8a66597, ~BEMP0, BEMPSTS); | |
894 | ||
895 | ep = &r8a66597->ep[0]; | |
896 | req = get_request_from_ep(ep); | |
897 | irq_ep0_write(ep, req); | |
898 | } else { | |
899 | for (pipenum = 1; pipenum < R8A66597_MAX_NUM_PIPE; pipenum++) { | |
900 | check = 1 << pipenum; | |
901 | if ((status & check) && (enb & check)) { | |
902 | r8a66597_write(r8a66597, ~check, BEMPSTS); | |
903 | tmp = control_reg_get(r8a66597, pipenum); | |
904 | if ((tmp & INBUFM) == 0) { | |
905 | disable_irq_empty(r8a66597, pipenum); | |
906 | pipe_irq_disable(r8a66597, pipenum); | |
907 | pipe_stop(r8a66597, pipenum); | |
908 | ep = r8a66597->pipenum2ep[pipenum]; | |
909 | req = get_request_from_ep(ep); | |
910 | if (!list_empty(&ep->queue)) | |
911 | transfer_complete(ep, req, 0); | |
912 | } | |
913 | } | |
914 | } | |
915 | } | |
916 | } | |
917 | ||
918 | static void get_status(struct r8a66597 *r8a66597, struct usb_ctrlrequest *ctrl) | |
919 | __releases(r8a66597->lock) | |
920 | __acquires(r8a66597->lock) | |
921 | { | |
922 | struct r8a66597_ep *ep; | |
923 | u16 pid; | |
924 | u16 status = 0; | |
925 | u16 w_index = le16_to_cpu(ctrl->wIndex); | |
926 | ||
927 | switch (ctrl->bRequestType & USB_RECIP_MASK) { | |
928 | case USB_RECIP_DEVICE: | |
929 | status = 1 << USB_DEVICE_SELF_POWERED; | |
930 | break; | |
931 | case USB_RECIP_INTERFACE: | |
932 | status = 0; | |
933 | break; | |
934 | case USB_RECIP_ENDPOINT: | |
935 | ep = r8a66597->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK]; | |
936 | pid = control_reg_get_pid(r8a66597, ep->pipenum); | |
937 | if (pid == PID_STALL) | |
938 | status = 1 << USB_ENDPOINT_HALT; | |
939 | else | |
940 | status = 0; | |
941 | break; | |
942 | default: | |
943 | pipe_stall(r8a66597, 0); | |
944 | return; /* exit */ | |
945 | } | |
946 | ||
947 | r8a66597->ep0_data = cpu_to_le16(status); | |
948 | r8a66597->ep0_req->buf = &r8a66597->ep0_data; | |
949 | r8a66597->ep0_req->length = 2; | |
950 | /* AV: what happens if we get called again before that gets through? */ | |
951 | spin_unlock(&r8a66597->lock); | |
952 | r8a66597_queue(r8a66597->gadget.ep0, r8a66597->ep0_req, GFP_KERNEL); | |
953 | spin_lock(&r8a66597->lock); | |
954 | } | |
955 | ||
956 | static void clear_feature(struct r8a66597 *r8a66597, | |
957 | struct usb_ctrlrequest *ctrl) | |
958 | { | |
959 | switch (ctrl->bRequestType & USB_RECIP_MASK) { | |
960 | case USB_RECIP_DEVICE: | |
961 | control_end(r8a66597, 1); | |
962 | break; | |
963 | case USB_RECIP_INTERFACE: | |
964 | control_end(r8a66597, 1); | |
965 | break; | |
966 | case USB_RECIP_ENDPOINT: { | |
967 | struct r8a66597_ep *ep; | |
968 | struct r8a66597_request *req; | |
969 | u16 w_index = le16_to_cpu(ctrl->wIndex); | |
970 | ||
971 | ep = r8a66597->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK]; | |
9e7291c1 YS |
972 | if (!ep->wedge) { |
973 | pipe_stop(r8a66597, ep->pipenum); | |
974 | control_reg_sqclr(r8a66597, ep->pipenum); | |
975 | spin_unlock(&r8a66597->lock); | |
976 | usb_ep_clear_halt(&ep->ep); | |
977 | spin_lock(&r8a66597->lock); | |
978 | } | |
c4144247 YS |
979 | |
980 | control_end(r8a66597, 1); | |
981 | ||
982 | req = get_request_from_ep(ep); | |
983 | if (ep->busy) { | |
984 | ep->busy = 0; | |
985 | if (list_empty(&ep->queue)) | |
986 | break; | |
987 | start_packet(ep, req); | |
988 | } else if (!list_empty(&ep->queue)) | |
989 | pipe_start(r8a66597, ep->pipenum); | |
990 | } | |
991 | break; | |
992 | default: | |
993 | pipe_stall(r8a66597, 0); | |
994 | break; | |
995 | } | |
996 | } | |
997 | ||
998 | static void set_feature(struct r8a66597 *r8a66597, struct usb_ctrlrequest *ctrl) | |
999 | { | |
1000 | ||
1001 | switch (ctrl->bRequestType & USB_RECIP_MASK) { | |
1002 | case USB_RECIP_DEVICE: | |
1003 | control_end(r8a66597, 1); | |
1004 | break; | |
1005 | case USB_RECIP_INTERFACE: | |
1006 | control_end(r8a66597, 1); | |
1007 | break; | |
1008 | case USB_RECIP_ENDPOINT: { | |
1009 | struct r8a66597_ep *ep; | |
1010 | u16 w_index = le16_to_cpu(ctrl->wIndex); | |
1011 | ||
1012 | ep = r8a66597->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK]; | |
1013 | pipe_stall(r8a66597, ep->pipenum); | |
1014 | ||
1015 | control_end(r8a66597, 1); | |
1016 | } | |
1017 | break; | |
1018 | default: | |
1019 | pipe_stall(r8a66597, 0); | |
1020 | break; | |
1021 | } | |
1022 | } | |
1023 | ||
1024 | /* if return value is true, call class driver's setup() */ | |
1025 | static int setup_packet(struct r8a66597 *r8a66597, struct usb_ctrlrequest *ctrl) | |
1026 | { | |
1027 | u16 *p = (u16 *)ctrl; | |
1028 | unsigned long offset = USBREQ; | |
1029 | int i, ret = 0; | |
1030 | ||
1031 | /* read fifo */ | |
1032 | r8a66597_write(r8a66597, ~VALID, INTSTS0); | |
1033 | ||
1034 | for (i = 0; i < 4; i++) | |
1035 | p[i] = r8a66597_read(r8a66597, offset + i*2); | |
1036 | ||
1037 | /* check request */ | |
1038 | if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) { | |
1039 | switch (ctrl->bRequest) { | |
1040 | case USB_REQ_GET_STATUS: | |
1041 | get_status(r8a66597, ctrl); | |
1042 | break; | |
1043 | case USB_REQ_CLEAR_FEATURE: | |
1044 | clear_feature(r8a66597, ctrl); | |
1045 | break; | |
1046 | case USB_REQ_SET_FEATURE: | |
1047 | set_feature(r8a66597, ctrl); | |
1048 | break; | |
1049 | default: | |
1050 | ret = 1; | |
1051 | break; | |
1052 | } | |
1053 | } else | |
1054 | ret = 1; | |
1055 | return ret; | |
1056 | } | |
1057 | ||
1058 | static void r8a66597_update_usb_speed(struct r8a66597 *r8a66597) | |
1059 | { | |
1060 | u16 speed = get_usb_speed(r8a66597); | |
1061 | ||
1062 | switch (speed) { | |
1063 | case HSMODE: | |
1064 | r8a66597->gadget.speed = USB_SPEED_HIGH; | |
1065 | break; | |
1066 | case FSMODE: | |
1067 | r8a66597->gadget.speed = USB_SPEED_FULL; | |
1068 | break; | |
1069 | default: | |
1070 | r8a66597->gadget.speed = USB_SPEED_UNKNOWN; | |
1071 | printk(KERN_ERR "USB speed unknown\n"); | |
1072 | } | |
1073 | } | |
1074 | ||
1075 | static void irq_device_state(struct r8a66597 *r8a66597) | |
1076 | { | |
1077 | u16 dvsq; | |
1078 | ||
1079 | dvsq = r8a66597_read(r8a66597, INTSTS0) & DVSQ; | |
1080 | r8a66597_write(r8a66597, ~DVST, INTSTS0); | |
1081 | ||
1082 | if (dvsq == DS_DFLT) { | |
1083 | /* bus reset */ | |
1084 | r8a66597->driver->disconnect(&r8a66597->gadget); | |
1085 | r8a66597_update_usb_speed(r8a66597); | |
1086 | } | |
1087 | if (r8a66597->old_dvsq == DS_CNFG && dvsq != DS_CNFG) | |
1088 | r8a66597_update_usb_speed(r8a66597); | |
1089 | if ((dvsq == DS_CNFG || dvsq == DS_ADDS) | |
1090 | && r8a66597->gadget.speed == USB_SPEED_UNKNOWN) | |
1091 | r8a66597_update_usb_speed(r8a66597); | |
1092 | ||
1093 | r8a66597->old_dvsq = dvsq; | |
1094 | } | |
1095 | ||
1096 | static void irq_control_stage(struct r8a66597 *r8a66597) | |
1097 | __releases(r8a66597->lock) | |
1098 | __acquires(r8a66597->lock) | |
1099 | { | |
1100 | struct usb_ctrlrequest ctrl; | |
1101 | u16 ctsq; | |
1102 | ||
1103 | ctsq = r8a66597_read(r8a66597, INTSTS0) & CTSQ; | |
1104 | r8a66597_write(r8a66597, ~CTRT, INTSTS0); | |
1105 | ||
1106 | switch (ctsq) { | |
1107 | case CS_IDST: { | |
1108 | struct r8a66597_ep *ep; | |
1109 | struct r8a66597_request *req; | |
1110 | ep = &r8a66597->ep[0]; | |
1111 | req = get_request_from_ep(ep); | |
1112 | transfer_complete(ep, req, 0); | |
1113 | } | |
1114 | break; | |
1115 | ||
1116 | case CS_RDDS: | |
1117 | case CS_WRDS: | |
1118 | case CS_WRND: | |
1119 | if (setup_packet(r8a66597, &ctrl)) { | |
1120 | spin_unlock(&r8a66597->lock); | |
1121 | if (r8a66597->driver->setup(&r8a66597->gadget, &ctrl) | |
1122 | < 0) | |
1123 | pipe_stall(r8a66597, 0); | |
1124 | spin_lock(&r8a66597->lock); | |
1125 | } | |
1126 | break; | |
1127 | case CS_RDSS: | |
1128 | case CS_WRSS: | |
1129 | control_end(r8a66597, 0); | |
1130 | break; | |
1131 | default: | |
1132 | printk(KERN_ERR "ctrl_stage: unexpect ctsq(%x)\n", ctsq); | |
1133 | break; | |
1134 | } | |
1135 | } | |
1136 | ||
1137 | static irqreturn_t r8a66597_irq(int irq, void *_r8a66597) | |
1138 | { | |
1139 | struct r8a66597 *r8a66597 = _r8a66597; | |
1140 | u16 intsts0; | |
1141 | u16 intenb0; | |
1142 | u16 brdysts, nrdysts, bempsts; | |
1143 | u16 brdyenb, nrdyenb, bempenb; | |
1144 | u16 savepipe; | |
1145 | u16 mask0; | |
1146 | ||
1147 | spin_lock(&r8a66597->lock); | |
1148 | ||
1149 | intsts0 = r8a66597_read(r8a66597, INTSTS0); | |
1150 | intenb0 = r8a66597_read(r8a66597, INTENB0); | |
1151 | ||
1152 | savepipe = r8a66597_read(r8a66597, CFIFOSEL); | |
1153 | ||
1154 | mask0 = intsts0 & intenb0; | |
1155 | if (mask0) { | |
1156 | brdysts = r8a66597_read(r8a66597, BRDYSTS); | |
1157 | nrdysts = r8a66597_read(r8a66597, NRDYSTS); | |
1158 | bempsts = r8a66597_read(r8a66597, BEMPSTS); | |
1159 | brdyenb = r8a66597_read(r8a66597, BRDYENB); | |
1160 | nrdyenb = r8a66597_read(r8a66597, NRDYENB); | |
1161 | bempenb = r8a66597_read(r8a66597, BEMPENB); | |
1162 | ||
1163 | if (mask0 & VBINT) { | |
1164 | r8a66597_write(r8a66597, 0xffff & ~VBINT, | |
1165 | INTSTS0); | |
1166 | r8a66597_start_xclock(r8a66597); | |
1167 | ||
1168 | /* start vbus sampling */ | |
1169 | r8a66597->old_vbus = r8a66597_read(r8a66597, INTSTS0) | |
1170 | & VBSTS; | |
1171 | r8a66597->scount = R8A66597_MAX_SAMPLING; | |
1172 | ||
1173 | mod_timer(&r8a66597->timer, | |
1174 | jiffies + msecs_to_jiffies(50)); | |
1175 | } | |
1176 | if (intsts0 & DVSQ) | |
1177 | irq_device_state(r8a66597); | |
1178 | ||
1179 | if ((intsts0 & BRDY) && (intenb0 & BRDYE) | |
1180 | && (brdysts & brdyenb)) | |
1181 | irq_pipe_ready(r8a66597, brdysts, brdyenb); | |
1182 | if ((intsts0 & BEMP) && (intenb0 & BEMPE) | |
1183 | && (bempsts & bempenb)) | |
1184 | irq_pipe_empty(r8a66597, bempsts, bempenb); | |
1185 | ||
1186 | if (intsts0 & CTRT) | |
1187 | irq_control_stage(r8a66597); | |
1188 | } | |
1189 | ||
1190 | r8a66597_write(r8a66597, savepipe, CFIFOSEL); | |
1191 | ||
1192 | spin_unlock(&r8a66597->lock); | |
1193 | return IRQ_HANDLED; | |
1194 | } | |
1195 | ||
1196 | static void r8a66597_timer(unsigned long _r8a66597) | |
1197 | { | |
1198 | struct r8a66597 *r8a66597 = (struct r8a66597 *)_r8a66597; | |
1199 | unsigned long flags; | |
1200 | u16 tmp; | |
1201 | ||
1202 | spin_lock_irqsave(&r8a66597->lock, flags); | |
1203 | tmp = r8a66597_read(r8a66597, SYSCFG0); | |
1204 | if (r8a66597->scount > 0) { | |
1205 | tmp = r8a66597_read(r8a66597, INTSTS0) & VBSTS; | |
1206 | if (tmp == r8a66597->old_vbus) { | |
1207 | r8a66597->scount--; | |
1208 | if (r8a66597->scount == 0) { | |
1209 | if (tmp == VBSTS) | |
1210 | r8a66597_usb_connect(r8a66597); | |
1211 | else | |
1212 | r8a66597_usb_disconnect(r8a66597); | |
1213 | } else { | |
1214 | mod_timer(&r8a66597->timer, | |
1215 | jiffies + msecs_to_jiffies(50)); | |
1216 | } | |
1217 | } else { | |
1218 | r8a66597->scount = R8A66597_MAX_SAMPLING; | |
1219 | r8a66597->old_vbus = tmp; | |
1220 | mod_timer(&r8a66597->timer, | |
1221 | jiffies + msecs_to_jiffies(50)); | |
1222 | } | |
1223 | } | |
1224 | spin_unlock_irqrestore(&r8a66597->lock, flags); | |
1225 | } | |
1226 | ||
1227 | /*-------------------------------------------------------------------------*/ | |
1228 | static int r8a66597_enable(struct usb_ep *_ep, | |
1229 | const struct usb_endpoint_descriptor *desc) | |
1230 | { | |
1231 | struct r8a66597_ep *ep; | |
1232 | ||
1233 | ep = container_of(_ep, struct r8a66597_ep, ep); | |
1234 | return alloc_pipe_config(ep, desc); | |
1235 | } | |
1236 | ||
1237 | static int r8a66597_disable(struct usb_ep *_ep) | |
1238 | { | |
1239 | struct r8a66597_ep *ep; | |
1240 | struct r8a66597_request *req; | |
1241 | unsigned long flags; | |
1242 | ||
1243 | ep = container_of(_ep, struct r8a66597_ep, ep); | |
1244 | BUG_ON(!ep); | |
1245 | ||
1246 | while (!list_empty(&ep->queue)) { | |
1247 | req = get_request_from_ep(ep); | |
1248 | spin_lock_irqsave(&ep->r8a66597->lock, flags); | |
1249 | transfer_complete(ep, req, -ECONNRESET); | |
1250 | spin_unlock_irqrestore(&ep->r8a66597->lock, flags); | |
1251 | } | |
1252 | ||
1253 | pipe_irq_disable(ep->r8a66597, ep->pipenum); | |
1254 | return free_pipe_config(ep); | |
1255 | } | |
1256 | ||
1257 | static struct usb_request *r8a66597_alloc_request(struct usb_ep *_ep, | |
1258 | gfp_t gfp_flags) | |
1259 | { | |
1260 | struct r8a66597_request *req; | |
1261 | ||
1262 | req = kzalloc(sizeof(struct r8a66597_request), gfp_flags); | |
1263 | if (!req) | |
1264 | return NULL; | |
1265 | ||
1266 | INIT_LIST_HEAD(&req->queue); | |
1267 | ||
1268 | return &req->req; | |
1269 | } | |
1270 | ||
1271 | static void r8a66597_free_request(struct usb_ep *_ep, struct usb_request *_req) | |
1272 | { | |
1273 | struct r8a66597_request *req; | |
1274 | ||
1275 | req = container_of(_req, struct r8a66597_request, req); | |
1276 | kfree(req); | |
1277 | } | |
1278 | ||
1279 | static int r8a66597_queue(struct usb_ep *_ep, struct usb_request *_req, | |
1280 | gfp_t gfp_flags) | |
1281 | { | |
1282 | struct r8a66597_ep *ep; | |
1283 | struct r8a66597_request *req; | |
1284 | unsigned long flags; | |
1285 | int request = 0; | |
1286 | ||
1287 | ep = container_of(_ep, struct r8a66597_ep, ep); | |
1288 | req = container_of(_req, struct r8a66597_request, req); | |
1289 | ||
1290 | if (ep->r8a66597->gadget.speed == USB_SPEED_UNKNOWN) | |
1291 | return -ESHUTDOWN; | |
1292 | ||
1293 | spin_lock_irqsave(&ep->r8a66597->lock, flags); | |
1294 | ||
1295 | if (list_empty(&ep->queue)) | |
1296 | request = 1; | |
1297 | ||
1298 | list_add_tail(&req->queue, &ep->queue); | |
1299 | req->req.actual = 0; | |
1300 | req->req.status = -EINPROGRESS; | |
1301 | ||
1302 | if (ep->desc == NULL) /* control */ | |
1303 | start_ep0(ep, req); | |
1304 | else { | |
1305 | if (request && !ep->busy) | |
1306 | start_packet(ep, req); | |
1307 | } | |
1308 | ||
1309 | spin_unlock_irqrestore(&ep->r8a66597->lock, flags); | |
1310 | ||
1311 | return 0; | |
1312 | } | |
1313 | ||
1314 | static int r8a66597_dequeue(struct usb_ep *_ep, struct usb_request *_req) | |
1315 | { | |
1316 | struct r8a66597_ep *ep; | |
1317 | struct r8a66597_request *req; | |
1318 | unsigned long flags; | |
1319 | ||
1320 | ep = container_of(_ep, struct r8a66597_ep, ep); | |
1321 | req = container_of(_req, struct r8a66597_request, req); | |
1322 | ||
1323 | spin_lock_irqsave(&ep->r8a66597->lock, flags); | |
1324 | if (!list_empty(&ep->queue)) | |
1325 | transfer_complete(ep, req, -ECONNRESET); | |
1326 | spin_unlock_irqrestore(&ep->r8a66597->lock, flags); | |
1327 | ||
1328 | return 0; | |
1329 | } | |
1330 | ||
1331 | static int r8a66597_set_halt(struct usb_ep *_ep, int value) | |
1332 | { | |
1333 | struct r8a66597_ep *ep; | |
1334 | struct r8a66597_request *req; | |
1335 | unsigned long flags; | |
1336 | int ret = 0; | |
1337 | ||
1338 | ep = container_of(_ep, struct r8a66597_ep, ep); | |
1339 | req = get_request_from_ep(ep); | |
1340 | ||
1341 | spin_lock_irqsave(&ep->r8a66597->lock, flags); | |
1342 | if (!list_empty(&ep->queue)) { | |
1343 | ret = -EAGAIN; | |
1344 | goto out; | |
1345 | } | |
1346 | if (value) { | |
1347 | ep->busy = 1; | |
1348 | pipe_stall(ep->r8a66597, ep->pipenum); | |
1349 | } else { | |
1350 | ep->busy = 0; | |
9e7291c1 | 1351 | ep->wedge = 0; |
c4144247 YS |
1352 | pipe_stop(ep->r8a66597, ep->pipenum); |
1353 | } | |
1354 | ||
1355 | out: | |
1356 | spin_unlock_irqrestore(&ep->r8a66597->lock, flags); | |
1357 | return ret; | |
1358 | } | |
1359 | ||
9e7291c1 YS |
1360 | static int r8a66597_set_wedge(struct usb_ep *_ep) |
1361 | { | |
1362 | struct r8a66597_ep *ep; | |
1363 | unsigned long flags; | |
1364 | ||
1365 | ep = container_of(_ep, struct r8a66597_ep, ep); | |
1366 | ||
1367 | if (!ep || !ep->desc) | |
1368 | return -EINVAL; | |
1369 | ||
1370 | spin_lock_irqsave(&ep->r8a66597->lock, flags); | |
1371 | ep->wedge = 1; | |
1372 | spin_unlock_irqrestore(&ep->r8a66597->lock, flags); | |
1373 | ||
1374 | return usb_ep_set_halt(_ep); | |
1375 | } | |
1376 | ||
c4144247 YS |
1377 | static void r8a66597_fifo_flush(struct usb_ep *_ep) |
1378 | { | |
1379 | struct r8a66597_ep *ep; | |
1380 | unsigned long flags; | |
1381 | ||
1382 | ep = container_of(_ep, struct r8a66597_ep, ep); | |
1383 | spin_lock_irqsave(&ep->r8a66597->lock, flags); | |
1384 | if (list_empty(&ep->queue) && !ep->busy) { | |
1385 | pipe_stop(ep->r8a66597, ep->pipenum); | |
1386 | r8a66597_bclr(ep->r8a66597, BCLR, ep->fifoctr); | |
1387 | } | |
1388 | spin_unlock_irqrestore(&ep->r8a66597->lock, flags); | |
1389 | } | |
1390 | ||
1391 | static struct usb_ep_ops r8a66597_ep_ops = { | |
1392 | .enable = r8a66597_enable, | |
1393 | .disable = r8a66597_disable, | |
1394 | ||
1395 | .alloc_request = r8a66597_alloc_request, | |
1396 | .free_request = r8a66597_free_request, | |
1397 | ||
1398 | .queue = r8a66597_queue, | |
1399 | .dequeue = r8a66597_dequeue, | |
1400 | ||
1401 | .set_halt = r8a66597_set_halt, | |
9e7291c1 | 1402 | .set_wedge = r8a66597_set_wedge, |
c4144247 YS |
1403 | .fifo_flush = r8a66597_fifo_flush, |
1404 | }; | |
1405 | ||
1406 | /*-------------------------------------------------------------------------*/ | |
1407 | static struct r8a66597 *the_controller; | |
1408 | ||
1409 | int usb_gadget_register_driver(struct usb_gadget_driver *driver) | |
1410 | { | |
1411 | struct r8a66597 *r8a66597 = the_controller; | |
1412 | int retval; | |
1413 | ||
1414 | if (!driver | |
1415 | || driver->speed != USB_SPEED_HIGH | |
1416 | || !driver->bind | |
1417 | || !driver->setup) | |
1418 | return -EINVAL; | |
1419 | if (!r8a66597) | |
1420 | return -ENODEV; | |
1421 | if (r8a66597->driver) | |
1422 | return -EBUSY; | |
1423 | ||
1424 | /* hook up the driver */ | |
1425 | driver->driver.bus = NULL; | |
1426 | r8a66597->driver = driver; | |
1427 | r8a66597->gadget.dev.driver = &driver->driver; | |
1428 | ||
1429 | retval = device_add(&r8a66597->gadget.dev); | |
1430 | if (retval) { | |
1431 | printk(KERN_ERR "device_add error (%d)\n", retval); | |
1432 | goto error; | |
1433 | } | |
1434 | ||
1435 | retval = driver->bind(&r8a66597->gadget); | |
1436 | if (retval) { | |
1437 | printk(KERN_ERR "bind to driver error (%d)\n", retval); | |
1438 | device_del(&r8a66597->gadget.dev); | |
1439 | goto error; | |
1440 | } | |
1441 | ||
1442 | r8a66597_bset(r8a66597, VBSE, INTENB0); | |
1443 | if (r8a66597_read(r8a66597, INTSTS0) & VBSTS) { | |
1444 | r8a66597_start_xclock(r8a66597); | |
1445 | /* start vbus sampling */ | |
1446 | r8a66597->old_vbus = r8a66597_read(r8a66597, | |
1447 | INTSTS0) & VBSTS; | |
1448 | r8a66597->scount = R8A66597_MAX_SAMPLING; | |
1449 | mod_timer(&r8a66597->timer, jiffies + msecs_to_jiffies(50)); | |
1450 | } | |
1451 | ||
1452 | return 0; | |
1453 | ||
1454 | error: | |
1455 | r8a66597->driver = NULL; | |
1456 | r8a66597->gadget.dev.driver = NULL; | |
1457 | ||
1458 | return retval; | |
1459 | } | |
1460 | EXPORT_SYMBOL(usb_gadget_register_driver); | |
1461 | ||
1462 | int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) | |
1463 | { | |
1464 | struct r8a66597 *r8a66597 = the_controller; | |
1465 | unsigned long flags; | |
1466 | ||
1467 | if (driver != r8a66597->driver || !driver->unbind) | |
1468 | return -EINVAL; | |
1469 | ||
1470 | spin_lock_irqsave(&r8a66597->lock, flags); | |
1471 | if (r8a66597->gadget.speed != USB_SPEED_UNKNOWN) | |
1472 | r8a66597_usb_disconnect(r8a66597); | |
1473 | spin_unlock_irqrestore(&r8a66597->lock, flags); | |
1474 | ||
1475 | r8a66597_bclr(r8a66597, VBSE, INTENB0); | |
1476 | ||
1477 | driver->unbind(&r8a66597->gadget); | |
1478 | ||
1479 | init_controller(r8a66597); | |
1480 | disable_controller(r8a66597); | |
1481 | ||
1482 | device_del(&r8a66597->gadget.dev); | |
1483 | r8a66597->driver = NULL; | |
1484 | return 0; | |
1485 | } | |
1486 | EXPORT_SYMBOL(usb_gadget_unregister_driver); | |
1487 | ||
1488 | /*-------------------------------------------------------------------------*/ | |
1489 | static int r8a66597_get_frame(struct usb_gadget *_gadget) | |
1490 | { | |
1491 | struct r8a66597 *r8a66597 = gadget_to_r8a66597(_gadget); | |
1492 | return r8a66597_read(r8a66597, FRMNUM) & 0x03FF; | |
1493 | } | |
1494 | ||
1495 | static struct usb_gadget_ops r8a66597_gadget_ops = { | |
1496 | .get_frame = r8a66597_get_frame, | |
1497 | }; | |
1498 | ||
1499 | static int __exit r8a66597_remove(struct platform_device *pdev) | |
1500 | { | |
1501 | struct r8a66597 *r8a66597 = dev_get_drvdata(&pdev->dev); | |
1502 | ||
1503 | del_timer_sync(&r8a66597->timer); | |
1504 | iounmap((void *)r8a66597->reg); | |
1505 | free_irq(platform_get_irq(pdev, 0), r8a66597); | |
1506 | r8a66597_free_request(&r8a66597->ep[0].ep, r8a66597->ep0_req); | |
d2e27bdf MD |
1507 | #ifdef CONFIG_HAVE_CLK |
1508 | if (r8a66597->pdata->on_chip) { | |
1509 | clk_disable(r8a66597->clk); | |
1510 | clk_put(r8a66597->clk); | |
1511 | } | |
1512 | #endif | |
c4144247 YS |
1513 | kfree(r8a66597); |
1514 | return 0; | |
1515 | } | |
1516 | ||
1517 | static void nop_completion(struct usb_ep *ep, struct usb_request *r) | |
1518 | { | |
1519 | } | |
1520 | ||
1521 | static int __init r8a66597_probe(struct platform_device *pdev) | |
1522 | { | |
d2e27bdf MD |
1523 | #ifdef CONFIG_HAVE_CLK |
1524 | char clk_name[8]; | |
1525 | #endif | |
c4144247 YS |
1526 | struct resource *res, *ires; |
1527 | int irq; | |
1528 | void __iomem *reg = NULL; | |
1529 | struct r8a66597 *r8a66597 = NULL; | |
1530 | int ret = 0; | |
1531 | int i; | |
1532 | unsigned long irq_trigger; | |
1533 | ||
1534 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
1535 | if (!res) { | |
1536 | ret = -ENODEV; | |
1537 | printk(KERN_ERR "platform_get_resource error.\n"); | |
1538 | goto clean_up; | |
1539 | } | |
1540 | ||
1541 | ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | |
1542 | irq = ires->start; | |
1543 | irq_trigger = ires->flags & IRQF_TRIGGER_MASK; | |
1544 | ||
1545 | if (irq < 0) { | |
1546 | ret = -ENODEV; | |
1547 | printk(KERN_ERR "platform_get_irq error.\n"); | |
1548 | goto clean_up; | |
1549 | } | |
1550 | ||
1551 | reg = ioremap(res->start, resource_size(res)); | |
1552 | if (reg == NULL) { | |
1553 | ret = -ENOMEM; | |
1554 | printk(KERN_ERR "ioremap error.\n"); | |
1555 | goto clean_up; | |
1556 | } | |
1557 | ||
1558 | /* initialize ucd */ | |
1559 | r8a66597 = kzalloc(sizeof(struct r8a66597), GFP_KERNEL); | |
1560 | if (r8a66597 == NULL) { | |
1561 | printk(KERN_ERR "kzalloc error\n"); | |
1562 | goto clean_up; | |
1563 | } | |
1564 | ||
1565 | spin_lock_init(&r8a66597->lock); | |
1566 | dev_set_drvdata(&pdev->dev, r8a66597); | |
1567 | r8a66597->pdata = pdev->dev.platform_data; | |
1568 | r8a66597->irq_sense_low = irq_trigger == IRQF_TRIGGER_LOW; | |
1569 | ||
1570 | r8a66597->gadget.ops = &r8a66597_gadget_ops; | |
1571 | device_initialize(&r8a66597->gadget.dev); | |
1572 | dev_set_name(&r8a66597->gadget.dev, "gadget"); | |
1573 | r8a66597->gadget.is_dualspeed = 1; | |
1574 | r8a66597->gadget.dev.parent = &pdev->dev; | |
1575 | r8a66597->gadget.dev.dma_mask = pdev->dev.dma_mask; | |
1576 | r8a66597->gadget.dev.release = pdev->dev.release; | |
1577 | r8a66597->gadget.name = udc_name; | |
1578 | ||
1579 | init_timer(&r8a66597->timer); | |
1580 | r8a66597->timer.function = r8a66597_timer; | |
1581 | r8a66597->timer.data = (unsigned long)r8a66597; | |
1582 | r8a66597->reg = (unsigned long)reg; | |
1583 | ||
d2e27bdf MD |
1584 | #ifdef CONFIG_HAVE_CLK |
1585 | if (r8a66597->pdata->on_chip) { | |
1586 | snprintf(clk_name, sizeof(clk_name), "usb%d", pdev->id); | |
1587 | r8a66597->clk = clk_get(&pdev->dev, clk_name); | |
1588 | if (IS_ERR(r8a66597->clk)) { | |
1589 | dev_err(&pdev->dev, "cannot get clock \"%s\"\n", | |
1590 | clk_name); | |
1591 | ret = PTR_ERR(r8a66597->clk); | |
1592 | goto clean_up; | |
1593 | } | |
1594 | clk_enable(r8a66597->clk); | |
1595 | } | |
1596 | #endif | |
1597 | ||
c4144247 YS |
1598 | disable_controller(r8a66597); /* make sure controller is disabled */ |
1599 | ||
1600 | ret = request_irq(irq, r8a66597_irq, IRQF_DISABLED | IRQF_SHARED, | |
1601 | udc_name, r8a66597); | |
1602 | if (ret < 0) { | |
1603 | printk(KERN_ERR "request_irq error (%d)\n", ret); | |
d2e27bdf | 1604 | goto clean_up2; |
c4144247 YS |
1605 | } |
1606 | ||
1607 | INIT_LIST_HEAD(&r8a66597->gadget.ep_list); | |
1608 | r8a66597->gadget.ep0 = &r8a66597->ep[0].ep; | |
1609 | INIT_LIST_HEAD(&r8a66597->gadget.ep0->ep_list); | |
1610 | for (i = 0; i < R8A66597_MAX_NUM_PIPE; i++) { | |
1611 | struct r8a66597_ep *ep = &r8a66597->ep[i]; | |
1612 | ||
1613 | if (i != 0) { | |
1614 | INIT_LIST_HEAD(&r8a66597->ep[i].ep.ep_list); | |
1615 | list_add_tail(&r8a66597->ep[i].ep.ep_list, | |
1616 | &r8a66597->gadget.ep_list); | |
1617 | } | |
1618 | ep->r8a66597 = r8a66597; | |
1619 | INIT_LIST_HEAD(&ep->queue); | |
1620 | ep->ep.name = r8a66597_ep_name[i]; | |
1621 | ep->ep.ops = &r8a66597_ep_ops; | |
1622 | ep->ep.maxpacket = 512; | |
1623 | } | |
1624 | r8a66597->ep[0].ep.maxpacket = 64; | |
1625 | r8a66597->ep[0].pipenum = 0; | |
1626 | r8a66597->ep[0].fifoaddr = CFIFO; | |
1627 | r8a66597->ep[0].fifosel = CFIFOSEL; | |
1628 | r8a66597->ep[0].fifoctr = CFIFOCTR; | |
1629 | r8a66597->ep[0].fifotrn = 0; | |
1630 | r8a66597->ep[0].pipectr = get_pipectr_addr(0); | |
1631 | r8a66597->pipenum2ep[0] = &r8a66597->ep[0]; | |
1632 | r8a66597->epaddr2ep[0] = &r8a66597->ep[0]; | |
1633 | ||
1634 | the_controller = r8a66597; | |
1635 | ||
1636 | r8a66597->ep0_req = r8a66597_alloc_request(&r8a66597->ep[0].ep, | |
1637 | GFP_KERNEL); | |
1638 | if (r8a66597->ep0_req == NULL) | |
d2e27bdf | 1639 | goto clean_up3; |
c4144247 YS |
1640 | r8a66597->ep0_req->complete = nop_completion; |
1641 | ||
1642 | init_controller(r8a66597); | |
1643 | ||
1644 | dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION); | |
1645 | return 0; | |
1646 | ||
d2e27bdf | 1647 | clean_up3: |
c4144247 | 1648 | free_irq(irq, r8a66597); |
d2e27bdf MD |
1649 | clean_up2: |
1650 | #ifdef CONFIG_HAVE_CLK | |
1651 | if (r8a66597->pdata->on_chip) { | |
1652 | clk_disable(r8a66597->clk); | |
1653 | clk_put(r8a66597->clk); | |
1654 | } | |
1655 | #endif | |
c4144247 YS |
1656 | clean_up: |
1657 | if (r8a66597) { | |
1658 | if (r8a66597->ep0_req) | |
1659 | r8a66597_free_request(&r8a66597->ep[0].ep, | |
1660 | r8a66597->ep0_req); | |
1661 | kfree(r8a66597); | |
1662 | } | |
1663 | if (reg) | |
1664 | iounmap(reg); | |
1665 | ||
1666 | return ret; | |
1667 | } | |
1668 | ||
1669 | /*-------------------------------------------------------------------------*/ | |
1670 | static struct platform_driver r8a66597_driver = { | |
1671 | .remove = __exit_p(r8a66597_remove), | |
1672 | .driver = { | |
1673 | .name = (char *) udc_name, | |
1674 | }, | |
1675 | }; | |
1676 | ||
1677 | static int __init r8a66597_udc_init(void) | |
1678 | { | |
1679 | return platform_driver_probe(&r8a66597_driver, r8a66597_probe); | |
1680 | } | |
1681 | module_init(r8a66597_udc_init); | |
1682 | ||
1683 | static void __exit r8a66597_udc_cleanup(void) | |
1684 | { | |
1685 | platform_driver_unregister(&r8a66597_driver); | |
1686 | } | |
1687 | module_exit(r8a66597_udc_cleanup); | |
1688 | ||
1689 | MODULE_DESCRIPTION("R8A66597 USB gadget driver"); | |
1690 | MODULE_LICENSE("GPL"); | |
1691 | MODULE_AUTHOR("Yoshihiro Shimoda"); | |
1692 |