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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit...
[net-next-2.6.git] / drivers / usb / gadget / atmel_usba_udc.c
CommitLineData
914a3f3b
HS		 1/*
2 * Driver for the Atmel USBA high speed USB device controller
3 *
4 * Copyright (C) 2005-2007 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <linux/clk.h>
11#include <linux/module.h>
12#include <linux/init.h>
13#include <linux/interrupt.h>
14#include <linux/io.h>
5a0e3ad6 15#include <linux/slab.h>
914a3f3b
HS		 16#include <linux/device.h>
17#include <linux/dma-mapping.h>
18#include <linux/list.h>
19#include <linux/platform_device.h>
20#include <linux/usb/ch9.h>
21#include <linux/usb/gadget.h>
8d855317 22#include <linux/usb/atmel_usba_udc.h>
914a3f3b
HS		 23#include <linux/delay.h>
24
25#include <asm/gpio.h>
a09e64fb 26#include <mach/board.h>
914a3f3b
HS		 27
28#include "atmel_usba_udc.h"
29
30
31static struct usba_udc the_udc;
8d855317 32static struct usba_ep *usba_ep;
914a3f3b
HS		 33
34#ifdef CONFIG_USB_GADGET_DEBUG_FS
35#include <linux/debugfs.h>
36#include <linux/uaccess.h>
37
38static int queue_dbg_open(struct inode *inode, struct file *file)
39{
40 struct usba_ep *ep = inode->i_private;
41 struct usba_request *req, *req_copy;
42 struct list_head *queue_data;
43
44 queue_data = kmalloc(sizeof(*queue_data), GFP_KERNEL);
45 if (!queue_data)
46 return -ENOMEM;
47 INIT_LIST_HEAD(queue_data);
48
49 spin_lock_irq(&ep->udc->lock);
50 list_for_each_entry(req, &ep->queue, queue) {
51 req_copy = kmalloc(sizeof(*req_copy), GFP_ATOMIC);
52 if (!req_copy)
53 goto fail;
54 memcpy(req_copy, req, sizeof(*req_copy));
55 list_add_tail(&req_copy->queue, queue_data);
56 }
57 spin_unlock_irq(&ep->udc->lock);
58
59 file->private_data = queue_data;
60 return 0;
61
62fail:
63 spin_unlock_irq(&ep->udc->lock);
64 list_for_each_entry_safe(req, req_copy, queue_data, queue) {
65 list_del(&req->queue);
66 kfree(req);
67 }
68 kfree(queue_data);
69 return -ENOMEM;
70}
71
72/*
73 * bbbbbbbb llllllll IZS sssss nnnn FDL\n\0
74 *
75 * b: buffer address
76 * l: buffer length
77 * I/i: interrupt/no interrupt
78 * Z/z: zero/no zero
79 * S/s: short ok/short not ok
80 * s: status
81 * n: nr_packets
82 * F/f: submitted/not submitted to FIFO
83 * D/d: using/not using DMA
84 * L/l: last transaction/not last transaction
85 */
86static ssize_t queue_dbg_read(struct file *file, char __user *buf,
87 size_t nbytes, loff_t *ppos)
88{
89 struct list_head *queue = file->private_data;
90 struct usba_request *req, *tmp_req;
91 size_t len, remaining, actual = 0;
92 char tmpbuf[38];
93
94 if (!access_ok(VERIFY_WRITE, buf, nbytes))
95 return -EFAULT;
96
97 mutex_lock(&file->f_dentry->d_inode->i_mutex);
98 list_for_each_entry_safe(req, tmp_req, queue, queue) {
99 len = snprintf(tmpbuf, sizeof(tmpbuf),
100 "%8p %08x %c%c%c %5d %c%c%c\n",
101 req->req.buf, req->req.length,
102 req->req.no_interrupt ? 'i' : 'I',
103 req->req.zero ? 'Z' : 'z',
104 req->req.short_not_ok ? 's' : 'S',
105 req->req.status,
106 req->submitted ? 'F' : 'f',
107 req->using_dma ? 'D' : 'd',
108 req->last_transaction ? 'L' : 'l');
109 len = min(len, sizeof(tmpbuf));
110 if (len > nbytes)
111 break;
112
113 list_del(&req->queue);
114 kfree(req);
115
116 remaining = __copy_to_user(buf, tmpbuf, len);
117 actual += len - remaining;
118 if (remaining)
119 break;
120
121 nbytes -= len;
122 buf += len;
123 }
124 mutex_unlock(&file->f_dentry->d_inode->i_mutex);
125
126 return actual;
127}
128
129static int queue_dbg_release(struct inode *inode, struct file *file)
130{
131 struct list_head *queue_data = file->private_data;
132 struct usba_request *req, *tmp_req;
133
134 list_for_each_entry_safe(req, tmp_req, queue_data, queue) {
135 list_del(&req->queue);
136 kfree(req);
137 }
138 kfree(queue_data);
139 return 0;
140}
141
142static int regs_dbg_open(struct inode *inode, struct file *file)
143{
144 struct usba_udc *udc;
145 unsigned int i;
146 u32 *data;
147 int ret = -ENOMEM;
148
149 mutex_lock(&inode->i_mutex);
150 udc = inode->i_private;
151 data = kmalloc(inode->i_size, GFP_KERNEL);
152 if (!data)
153 goto out;
154
155 spin_lock_irq(&udc->lock);
156 for (i = 0; i < inode->i_size / 4; i++)
157 data[i] = __raw_readl(udc->regs + i * 4);
158 spin_unlock_irq(&udc->lock);
159
160 file->private_data = data;
161 ret = 0;
162
163out:
164 mutex_unlock(&inode->i_mutex);
165
166 return ret;
167}
168
169static ssize_t regs_dbg_read(struct file *file, char __user *buf,
170 size_t nbytes, loff_t *ppos)
171{
172 struct inode *inode = file->f_dentry->d_inode;
173 int ret;
174
175 mutex_lock(&inode->i_mutex);
176 ret = simple_read_from_buffer(buf, nbytes, ppos,
177 file->private_data,
178 file->f_dentry->d_inode->i_size);
179 mutex_unlock(&inode->i_mutex);
180
181 return ret;
182}
183
184static int regs_dbg_release(struct inode *inode, struct file *file)
185{
186 kfree(file->private_data);
187 return 0;
188}
189
190const struct file_operations queue_dbg_fops = {
191 .owner = THIS_MODULE,
192 .open = queue_dbg_open,
193 .llseek = no_llseek,
194 .read = queue_dbg_read,
195 .release = queue_dbg_release,
196};
197
198const struct file_operations regs_dbg_fops = {
199 .owner = THIS_MODULE,
200 .open = regs_dbg_open,
201 .llseek = generic_file_llseek,
202 .read = regs_dbg_read,
203 .release = regs_dbg_release,
204};
205
206static void usba_ep_init_debugfs(struct usba_udc *udc,
207 struct usba_ep *ep)
208{
209 struct dentry *ep_root;
210
211 ep_root = debugfs_create_dir(ep->ep.name, udc->debugfs_root);
212 if (!ep_root)
213 goto err_root;
214 ep->debugfs_dir = ep_root;
215
216 ep->debugfs_queue = debugfs_create_file("queue", 0400, ep_root,
217 ep, &queue_dbg_fops);
218 if (!ep->debugfs_queue)
219 goto err_queue;
220
221 if (ep->can_dma) {
222 ep->debugfs_dma_status
223 = debugfs_create_u32("dma_status", 0400, ep_root,
224 &ep->last_dma_status);
225 if (!ep->debugfs_dma_status)
226 goto err_dma_status;
227 }
228 if (ep_is_control(ep)) {
229 ep->debugfs_state
230 = debugfs_create_u32("state", 0400, ep_root,
231 &ep->state);
232 if (!ep->debugfs_state)
233 goto err_state;
234 }
235
236 return;
237
238err_state:
239 if (ep->can_dma)
240 debugfs_remove(ep->debugfs_dma_status);
241err_dma_status:
242 debugfs_remove(ep->debugfs_queue);
243err_queue:
244 debugfs_remove(ep_root);
245err_root:
246 dev_err(&ep->udc->pdev->dev,
247 "failed to create debugfs directory for %s\n", ep->ep.name);
248}
249
250static void usba_ep_cleanup_debugfs(struct usba_ep *ep)
251{
252 debugfs_remove(ep->debugfs_queue);
253 debugfs_remove(ep->debugfs_dma_status);
254 debugfs_remove(ep->debugfs_state);
255 debugfs_remove(ep->debugfs_dir);
256 ep->debugfs_dma_status = NULL;
257 ep->debugfs_dir = NULL;
258}
259
260static void usba_init_debugfs(struct usba_udc *udc)
261{
262 struct dentry *root, *regs;
263 struct resource *regs_resource;
264
265 root = debugfs_create_dir(udc->gadget.name, NULL);
266 if (IS_ERR(root) || !root)
267 goto err_root;
268 udc->debugfs_root = root;
269
270 regs = debugfs_create_file("regs", 0400, root, udc, &regs_dbg_fops);
271 if (!regs)
272 goto err_regs;
273
274 regs_resource = platform_get_resource(udc->pdev, IORESOURCE_MEM,
275 CTRL_IOMEM_ID);
276 regs->d_inode->i_size = regs_resource->end - regs_resource->start + 1;
277 udc->debugfs_regs = regs;
278
279 usba_ep_init_debugfs(udc, to_usba_ep(udc->gadget.ep0));
280
281 return;
282
283err_regs:
284 debugfs_remove(root);
285err_root:
286 udc->debugfs_root = NULL;
287 dev_err(&udc->pdev->dev, "debugfs is not available\n");
288}
289
290static void usba_cleanup_debugfs(struct usba_udc *udc)
291{
292 usba_ep_cleanup_debugfs(to_usba_ep(udc->gadget.ep0));
293 debugfs_remove(udc->debugfs_regs);
294 debugfs_remove(udc->debugfs_root);
295 udc->debugfs_regs = NULL;
296 udc->debugfs_root = NULL;
297}
298#else
299static inline void usba_ep_init_debugfs(struct usba_udc *udc,
300 struct usba_ep *ep)
301{
302
303}
304
305static inline void usba_ep_cleanup_debugfs(struct usba_ep *ep)
306{
307
308}
309
310static inline void usba_init_debugfs(struct usba_udc *udc)
311{
312
313}
314
315static inline void usba_cleanup_debugfs(struct usba_udc *udc)
316{
317
318}
319#endif
320
321static int vbus_is_present(struct usba_udc *udc)
322{
472a6786 323 if (gpio_is_valid(udc->vbus_pin))
640e95ab 324 return gpio_get_value(udc->vbus_pin) ^ udc->vbus_pin_inverted;
914a3f3b
HS		 325
326 /* No Vbus detection: Assume always present */
327 return 1;
328}
329
e60c65d3 330#if defined(CONFIG_ARCH_AT91SAM9RL)
16a45bc8 331
a09e64fb 332#include <mach/at91_pmc.h>
16a45bc8
SP		 333
334static void toggle_bias(int is_on)
914a3f3b 335{
16a45bc8
SP		 336 unsigned int uckr = at91_sys_read(AT91_CKGR_UCKR);
337
338 if (is_on)
339 at91_sys_write(AT91_CKGR_UCKR, uckr | AT91_PMC_BIASEN);
340 else
341 at91_sys_write(AT91_CKGR_UCKR, uckr & ~(AT91_PMC_BIASEN));
914a3f3b
HS		 342}
343
e60c65d3
NF		 344#else
345
346static void toggle_bias(int is_on)
347{
348}
349
350#endif /* CONFIG_ARCH_AT91SAM9RL */
16a45bc8 351
914a3f3b
HS		 352static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req)
353{
354 unsigned int transaction_len;
355
356 transaction_len = req->req.length - req->req.actual;
357 req->last_transaction = 1;
358 if (transaction_len > ep->ep.maxpacket) {
359 transaction_len = ep->ep.maxpacket;
360 req->last_transaction = 0;
361 } else if (transaction_len == ep->ep.maxpacket && req->req.zero)
362 req->last_transaction = 0;
363
364 DBG(DBG_QUEUE, "%s: submit_transaction, req %p (length %d)%s\n",
365 ep->ep.name, req, transaction_len,
366 req->last_transaction ? ", done" : "");
367
5d4c2707 368 memcpy_toio(ep->fifo, req->req.buf + req->req.actual, transaction_len);
914a3f3b
HS		 369 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
370 req->req.actual += transaction_len;
371}
372
373static void submit_request(struct usba_ep *ep, struct usba_request *req)
374{
375 DBG(DBG_QUEUE, "%s: submit_request: req %p (length %d)\n",
376 ep->ep.name, req, req->req.length);
377
378 req->req.actual = 0;
379 req->submitted = 1;
380
381 if (req->using_dma) {
382 if (req->req.length == 0) {
383 usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
384 return;
385 }
386
387 if (req->req.zero)
388 usba_ep_writel(ep, CTL_ENB, USBA_SHORT_PACKET);
389 else
390 usba_ep_writel(ep, CTL_DIS, USBA_SHORT_PACKET);
391
392 usba_dma_writel(ep, ADDRESS, req->req.dma);
393 usba_dma_writel(ep, CONTROL, req->ctrl);
394 } else {
395 next_fifo_transaction(ep, req);
396 if (req->last_transaction) {
397 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
398 usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
399 } else {
400 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
401 usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
402 }
403 }
404}
405
406static void submit_next_request(struct usba_ep *ep)
407{
408 struct usba_request *req;
409
410 if (list_empty(&ep->queue)) {
411 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY | USBA_RX_BK_RDY);
412 return;
413 }
414
415 req = list_entry(ep->queue.next, struct usba_request, queue);
416 if (!req->submitted)
417 submit_request(ep, req);
418}
419
420static void send_status(struct usba_udc *udc, struct usba_ep *ep)
421{
422 ep->state = STATUS_STAGE_IN;
423 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
424 usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
425}
426
427static void receive_data(struct usba_ep *ep)
428{
429 struct usba_udc *udc = ep->udc;
430 struct usba_request *req;
431 unsigned long status;
432 unsigned int bytecount, nr_busy;
433 int is_complete = 0;
434
435 status = usba_ep_readl(ep, STA);
436 nr_busy = USBA_BFEXT(BUSY_BANKS, status);
437
438 DBG(DBG_QUEUE, "receive data: nr_busy=%u\n", nr_busy);
439
440 while (nr_busy > 0) {
441 if (list_empty(&ep->queue)) {
442 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
443 break;
444 }
445 req = list_entry(ep->queue.next,
446 struct usba_request, queue);
447
448 bytecount = USBA_BFEXT(BYTE_COUNT, status);
449
450 if (status & (1 << 31))
451 is_complete = 1;
452 if (req->req.actual + bytecount >= req->req.length) {
453 is_complete = 1;
454 bytecount = req->req.length - req->req.actual;
455 }
456
5d4c2707 457 memcpy_fromio(req->req.buf + req->req.actual,
914a3f3b
HS		 458 ep->fifo, bytecount);
459 req->req.actual += bytecount;
460
461 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
462
463 if (is_complete) {
464 DBG(DBG_QUEUE, "%s: request done\n", ep->ep.name);
465 req->req.status = 0;
466 list_del_init(&req->queue);
467 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
468 spin_unlock(&udc->lock);
469 req->req.complete(&ep->ep, &req->req);
470 spin_lock(&udc->lock);
471 }
472
473 status = usba_ep_readl(ep, STA);
474 nr_busy = USBA_BFEXT(BUSY_BANKS, status);
475
476 if (is_complete && ep_is_control(ep)) {
477 send_status(udc, ep);
478 break;
479 }
480 }
481}
482
483static void
484request_complete(struct usba_ep *ep, struct usba_request *req, int status)
485{
486 struct usba_udc *udc = ep->udc;
487
488 WARN_ON(!list_empty(&req->queue));
489
490 if (req->req.status == -EINPROGRESS)
491 req->req.status = status;
492
493 if (req->mapped) {
494 dma_unmap_single(
495 &udc->pdev->dev, req->req.dma, req->req.length,
496 ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
497 req->req.dma = DMA_ADDR_INVALID;
498 req->mapped = 0;
499 }
500
501 DBG(DBG_GADGET | DBG_REQ,
502 "%s: req %p complete: status %d, actual %u\n",
503 ep->ep.name, req, req->req.status, req->req.actual);
504
505 spin_unlock(&udc->lock);
506 req->req.complete(&ep->ep, &req->req);
507 spin_lock(&udc->lock);
508}
509
510static void
511request_complete_list(struct usba_ep *ep, struct list_head *list, int status)
512{
513 struct usba_request *req, *tmp_req;
514
515 list_for_each_entry_safe(req, tmp_req, list, queue) {
516 list_del_init(&req->queue);
517 request_complete(ep, req, status);
518 }
519}
520
521static int
522usba_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
523{
524 struct usba_ep *ep = to_usba_ep(_ep);
525 struct usba_udc *udc = ep->udc;
526 unsigned long flags, ept_cfg, maxpacket;
527 unsigned int nr_trans;
528
529 DBG(DBG_GADGET, "%s: ep_enable: desc=%p\n", ep->ep.name, desc);
530
531 maxpacket = le16_to_cpu(desc->wMaxPacketSize) & 0x7ff;
532
533 if (((desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) != ep->index)
534 || ep->index == 0
535 || desc->bDescriptorType != USB_DT_ENDPOINT
536 || maxpacket == 0
537 || maxpacket > ep->fifo_size) {
538 DBG(DBG_ERR, "ep_enable: Invalid argument");
539 return -EINVAL;
540 }
541
542 ep->is_isoc = 0;
543 ep->is_in = 0;
544
545 if (maxpacket <= 8)
546 ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8);
547 else
548 /* LSB is bit 1, not 0 */
549 ept_cfg = USBA_BF(EPT_SIZE, fls(maxpacket - 1) - 3);
550
551 DBG(DBG_HW, "%s: EPT_SIZE = %lu (maxpacket = %lu)\n",
552 ep->ep.name, ept_cfg, maxpacket);
553
71de6b63 554 if (usb_endpoint_dir_in(desc)) {
914a3f3b
HS		 555 ep->is_in = 1;
556 ept_cfg |= USBA_EPT_DIR_IN;
557 }
558
71de6b63 559 switch (usb_endpoint_type(desc)) {
914a3f3b
HS		 560 case USB_ENDPOINT_XFER_CONTROL:
561 ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL);
562 ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE);
563 break;
564 case USB_ENDPOINT_XFER_ISOC:
565 if (!ep->can_isoc) {
566 DBG(DBG_ERR, "ep_enable: %s is not isoc capable\n",
567 ep->ep.name);
568 return -EINVAL;
569 }
570
571 /*
572 * Bits 11:12 specify number of _additional_
573 * transactions per microframe.
574 */
575 nr_trans = ((le16_to_cpu(desc->wMaxPacketSize) >> 11) & 3) + 1;
576 if (nr_trans > 3)
577 return -EINVAL;
578
579 ep->is_isoc = 1;
580 ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_ISO);
581
582 /*
583 * Do triple-buffering on high-bandwidth iso endpoints.
584 */
585 if (nr_trans > 1 && ep->nr_banks == 3)
586 ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_TRIPLE);
587 else
588 ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
589 ept_cfg |= USBA_BF(NB_TRANS, nr_trans);
590 break;
591 case USB_ENDPOINT_XFER_BULK:
592 ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK);
593 ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
594 break;
595 case USB_ENDPOINT_XFER_INT:
596 ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_INT);
597 ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
598 break;
599 }
600
601 spin_lock_irqsave(&ep->udc->lock, flags);
602
603 if (ep->desc) {
604 spin_unlock_irqrestore(&ep->udc->lock, flags);
605 DBG(DBG_ERR, "ep%d already enabled\n", ep->index);
606 return -EBUSY;
607 }
608
609 ep->desc = desc;
610 ep->ep.maxpacket = maxpacket;
611
612 usba_ep_writel(ep, CFG, ept_cfg);
613 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
614
615 if (ep->can_dma) {
616 u32 ctrl;
617
618 usba_writel(udc, INT_ENB,
619 (usba_readl(udc, INT_ENB)
620 | USBA_BF(EPT_INT, 1 << ep->index)
621 | USBA_BF(DMA_INT, 1 << ep->index)));
622 ctrl = USBA_AUTO_VALID | USBA_INTDIS_DMA;
623 usba_ep_writel(ep, CTL_ENB, ctrl);
624 } else {
625 usba_writel(udc, INT_ENB,
626 (usba_readl(udc, INT_ENB)
627 | USBA_BF(EPT_INT, 1 << ep->index)));
628 }
629
630 spin_unlock_irqrestore(&udc->lock, flags);
631
632 DBG(DBG_HW, "EPT_CFG%d after init: %#08lx\n", ep->index,
633 (unsigned long)usba_ep_readl(ep, CFG));
634 DBG(DBG_HW, "INT_ENB after init: %#08lx\n",
635 (unsigned long)usba_readl(udc, INT_ENB));
636
637 return 0;
638}
639
640static int usba_ep_disable(struct usb_ep *_ep)
641{
642 struct usba_ep *ep = to_usba_ep(_ep);
643 struct usba_udc *udc = ep->udc;
644 LIST_HEAD(req_list);
645 unsigned long flags;
646
647 DBG(DBG_GADGET, "ep_disable: %s\n", ep->ep.name);
648
649 spin_lock_irqsave(&udc->lock, flags);
650
651 if (!ep->desc) {
652 spin_unlock_irqrestore(&udc->lock, flags);
40517707
DB		 653 /* REVISIT because this driver disables endpoints in
654 * reset_all_endpoints() before calling disconnect(),
655 * most gadget drivers would trigger this non-error ...
656 */
657 if (udc->gadget.speed != USB_SPEED_UNKNOWN)
658 DBG(DBG_ERR, "ep_disable: %s not enabled\n",
659 ep->ep.name);
914a3f3b
HS		 660 return -EINVAL;
661 }
662 ep->desc = NULL;
663
664 list_splice_init(&ep->queue, &req_list);
665 if (ep->can_dma) {
666 usba_dma_writel(ep, CONTROL, 0);
667 usba_dma_writel(ep, ADDRESS, 0);
668 usba_dma_readl(ep, STATUS);
669 }
670 usba_ep_writel(ep, CTL_DIS, USBA_EPT_ENABLE);
671 usba_writel(udc, INT_ENB,
672 usba_readl(udc, INT_ENB)
673 & ~USBA_BF(EPT_INT, 1 << ep->index));
674
675 request_complete_list(ep, &req_list, -ESHUTDOWN);
676
677 spin_unlock_irqrestore(&udc->lock, flags);
678
679 return 0;
680}
681
682static struct usb_request *
683usba_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
684{
685 struct usba_request *req;
686
687 DBG(DBG_GADGET, "ep_alloc_request: %p, 0x%x\n", _ep, gfp_flags);
688
689 req = kzalloc(sizeof(*req), gfp_flags);
690 if (!req)
691 return NULL;
692
693 INIT_LIST_HEAD(&req->queue);
694 req->req.dma = DMA_ADDR_INVALID;
695
696 return &req->req;
697}
698
699static void
700usba_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
701{
702 struct usba_request *req = to_usba_req(_req);
703
704 DBG(DBG_GADGET, "ep_free_request: %p, %p\n", _ep, _req);
705
706 kfree(req);
707}
708
709static int queue_dma(struct usba_udc *udc, struct usba_ep *ep,
710 struct usba_request *req, gfp_t gfp_flags)
711{
712 unsigned long flags;
713 int ret;
714
715 DBG(DBG_DMA, "%s: req l/%u d/%08x %c%c%c\n",
716 ep->ep.name, req->req.length, req->req.dma,
717 req->req.zero ? 'Z' : 'z',
718 req->req.short_not_ok ? 'S' : 's',
719 req->req.no_interrupt ? 'I' : 'i');
720
721 if (req->req.length > 0x10000) {
722 /* Lengths from 0 to 65536 (inclusive) are supported */
723 DBG(DBG_ERR, "invalid request length %u\n", req->req.length);
724 return -EINVAL;
725 }
726
727 req->using_dma = 1;
728
729 if (req->req.dma == DMA_ADDR_INVALID) {
730 req->req.dma = dma_map_single(
731 &udc->pdev->dev, req->req.buf, req->req.length,
732 ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
733 req->mapped = 1;
734 } else {
735 dma_sync_single_for_device(
736 &udc->pdev->dev, req->req.dma, req->req.length,
737 ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
738 req->mapped = 0;
739 }
740
741 req->ctrl = USBA_BF(DMA_BUF_LEN, req->req.length)
742 | USBA_DMA_CH_EN | USBA_DMA_END_BUF_IE
743 | USBA_DMA_END_TR_EN | USBA_DMA_END_TR_IE;
744
745 if (ep->is_in)
746 req->ctrl |= USBA_DMA_END_BUF_EN;
747
748 /*
749 * Add this request to the queue and submit for DMA if
750 * possible. Check if we're still alive first -- we may have
751 * received a reset since last time we checked.
752 */
753 ret = -ESHUTDOWN;
754 spin_lock_irqsave(&udc->lock, flags);
755 if (ep->desc) {
756 if (list_empty(&ep->queue))
757 submit_request(ep, req);
758
759 list_add_tail(&req->queue, &ep->queue);
760 ret = 0;
761 }
762 spin_unlock_irqrestore(&udc->lock, flags);
763
764 return ret;
765}
766
767static int
768usba_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
769{
770 struct usba_request *req = to_usba_req(_req);
771 struct usba_ep *ep = to_usba_ep(_ep);
772 struct usba_udc *udc = ep->udc;
773 unsigned long flags;
774 int ret;
775
776 DBG(DBG_GADGET | DBG_QUEUE | DBG_REQ, "%s: queue req %p, len %u\n",
777 ep->ep.name, req, _req->length);
778
779 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN || !ep->desc)
780 return -ESHUTDOWN;
781
782 req->submitted = 0;
783 req->using_dma = 0;
784 req->last_transaction = 0;
785
786 _req->status = -EINPROGRESS;
787 _req->actual = 0;
788
789 if (ep->can_dma)
790 return queue_dma(udc, ep, req, gfp_flags);
791
792 /* May have received a reset since last time we checked */
793 ret = -ESHUTDOWN;
794 spin_lock_irqsave(&udc->lock, flags);
795 if (ep->desc) {
796 list_add_tail(&req->queue, &ep->queue);
797
f42706c9
MF		 798 if ((!ep_is_control(ep) && ep->is_in) ||
799 (ep_is_control(ep)
914a3f3b
HS		 800 && (ep->state == DATA_STAGE_IN
801 || ep->state == STATUS_STAGE_IN)))
802 usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
803 else
804 usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
805 ret = 0;
806 }
807 spin_unlock_irqrestore(&udc->lock, flags);
808
809 return ret;
810}
811
812static void
813usba_update_req(struct usba_ep *ep, struct usba_request *req, u32 status)
814{
815 req->req.actual = req->req.length - USBA_BFEXT(DMA_BUF_LEN, status);
816}
817
818static int stop_dma(struct usba_ep *ep, u32 *pstatus)
819{
820 unsigned int timeout;
821 u32 status;
822
823 /*
824 * Stop the DMA controller. When writing both CH_EN
825 * and LINK to 0, the other bits are not affected.
826 */
827 usba_dma_writel(ep, CONTROL, 0);
828
829 /* Wait for the FIFO to empty */
830 for (timeout = 40; timeout; --timeout) {
831 status = usba_dma_readl(ep, STATUS);
832 if (!(status & USBA_DMA_CH_EN))
833 break;
834 udelay(1);
835 }
836
837 if (pstatus)
838 *pstatus = status;
839
840 if (timeout == 0) {
841 dev_err(&ep->udc->pdev->dev,
842 "%s: timed out waiting for DMA FIFO to empty\n",
843 ep->ep.name);
844 return -ETIMEDOUT;
845 }
846
847 return 0;
848}
849
850static int usba_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
851{
852 struct usba_ep *ep = to_usba_ep(_ep);
853 struct usba_udc *udc = ep->udc;
854 struct usba_request *req = to_usba_req(_req);
855 unsigned long flags;
856 u32 status;
857
858 DBG(DBG_GADGET | DBG_QUEUE, "ep_dequeue: %s, req %p\n",
859 ep->ep.name, req);
860
861 spin_lock_irqsave(&udc->lock, flags);
862
863 if (req->using_dma) {
864 /*
865 * If this request is currently being transferred,
866 * stop the DMA controller and reset the FIFO.
867 */
868 if (ep->queue.next == &req->queue) {
869 status = usba_dma_readl(ep, STATUS);
870 if (status & USBA_DMA_CH_EN)
871 stop_dma(ep, &status);
872
873#ifdef CONFIG_USB_GADGET_DEBUG_FS
874 ep->last_dma_status = status;
875#endif
876
877 usba_writel(udc, EPT_RST, 1 << ep->index);
878
879 usba_update_req(ep, req, status);
880 }
881 }
882
883 /*
884 * Errors should stop the queue from advancing until the
885 * completion function returns.
886 */
887 list_del_init(&req->queue);
888
889 request_complete(ep, req, -ECONNRESET);
890
891 /* Process the next request if any */
892 submit_next_request(ep);
893 spin_unlock_irqrestore(&udc->lock, flags);
894
895 return 0;
896}
897
898static int usba_ep_set_halt(struct usb_ep *_ep, int value)
899{
900 struct usba_ep *ep = to_usba_ep(_ep);
901 struct usba_udc *udc = ep->udc;
902 unsigned long flags;
903 int ret = 0;
904
905 DBG(DBG_GADGET, "endpoint %s: %s HALT\n", ep->ep.name,
906 value ? "set" : "clear");
907
908 if (!ep->desc) {
909 DBG(DBG_ERR, "Attempted to halt uninitialized ep %s\n",
910 ep->ep.name);
911 return -ENODEV;
912 }
913 if (ep->is_isoc) {
914 DBG(DBG_ERR, "Attempted to halt isochronous ep %s\n",
915 ep->ep.name);
916 return -ENOTTY;
917 }
918
919 spin_lock_irqsave(&udc->lock, flags);
920
921 /*
922 * We can't halt IN endpoints while there are still data to be
923 * transferred
924 */
925 if (!list_empty(&ep->queue)
926 || ((value && ep->is_in && (usba_ep_readl(ep, STA)
927 & USBA_BF(BUSY_BANKS, -1L))))) {
928 ret = -EAGAIN;
929 } else {
930 if (value)
931 usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
932 else
933 usba_ep_writel(ep, CLR_STA,
934 USBA_FORCE_STALL | USBA_TOGGLE_CLR);
935 usba_ep_readl(ep, STA);
936 }
937
938 spin_unlock_irqrestore(&udc->lock, flags);
939
940 return ret;
941}
942
943static int usba_ep_fifo_status(struct usb_ep *_ep)
944{
945 struct usba_ep *ep = to_usba_ep(_ep);
946
947 return USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
948}
949
950static void usba_ep_fifo_flush(struct usb_ep *_ep)
951{
952 struct usba_ep *ep = to_usba_ep(_ep);
953 struct usba_udc *udc = ep->udc;
954
955 usba_writel(udc, EPT_RST, 1 << ep->index);
956}
957
958static const struct usb_ep_ops usba_ep_ops = {
959 .enable = usba_ep_enable,
960 .disable = usba_ep_disable,
961 .alloc_request = usba_ep_alloc_request,
962 .free_request = usba_ep_free_request,
963 .queue = usba_ep_queue,
964 .dequeue = usba_ep_dequeue,
965 .set_halt = usba_ep_set_halt,
966 .fifo_status = usba_ep_fifo_status,
967 .fifo_flush = usba_ep_fifo_flush,
968};
969
970static int usba_udc_get_frame(struct usb_gadget *gadget)
971{
972 struct usba_udc *udc = to_usba_udc(gadget);
973
974 return USBA_BFEXT(FRAME_NUMBER, usba_readl(udc, FNUM));
975}
976
58ed7b94
HS		 977static int usba_udc_wakeup(struct usb_gadget *gadget)
978{
979 struct usba_udc *udc = to_usba_udc(gadget);
980 unsigned long flags;
981 u32 ctrl;
982 int ret = -EINVAL;
983
984 spin_lock_irqsave(&udc->lock, flags);
985 if (udc->devstatus & (1 << USB_DEVICE_REMOTE_WAKEUP)) {
986 ctrl = usba_readl(udc, CTRL);
987 usba_writel(udc, CTRL, ctrl | USBA_REMOTE_WAKE_UP);
988 ret = 0;
989 }
990 spin_unlock_irqrestore(&udc->lock, flags);
991
992 return ret;
993}
994
995static int
996usba_udc_set_selfpowered(struct usb_gadget *gadget, int is_selfpowered)
997{
998 struct usba_udc *udc = to_usba_udc(gadget);
999 unsigned long flags;
1000
1001 spin_lock_irqsave(&udc->lock, flags);
1002 if (is_selfpowered)
1003 udc->devstatus |= 1 << USB_DEVICE_SELF_POWERED;
1004 else
1005 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
1006 spin_unlock_irqrestore(&udc->lock, flags);
1007
1008 return 0;
1009}
1010
914a3f3b 1011static const struct usb_gadget_ops usba_udc_ops = {
58ed7b94
HS		 1012 .get_frame = usba_udc_get_frame,
1013 .wakeup = usba_udc_wakeup,
1014 .set_selfpowered = usba_udc_set_selfpowered,
914a3f3b
HS		 1015};
1016
914a3f3b
HS		 1017static struct usb_endpoint_descriptor usba_ep0_desc = {
1018 .bLength = USB_DT_ENDPOINT_SIZE,
1019 .bDescriptorType = USB_DT_ENDPOINT,
1020 .bEndpointAddress = 0,
1021 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
551509d2 1022 .wMaxPacketSize = cpu_to_le16(64),
914a3f3b
HS		 1023 /* FIXME: I have no idea what to put here */
1024 .bInterval = 1,
1025};
1026
1027static void nop_release(struct device *dev)
1028{
1029
1030}
1031
1032static struct usba_udc the_udc = {
1033 .gadget = {
1034 .ops = &usba_udc_ops,
914a3f3b
HS		 1035 .ep_list = LIST_HEAD_INIT(the_udc.gadget.ep_list),
1036 .is_dualspeed = 1,
1037 .name = "atmel_usba_udc",
1038 .dev = {
c682b170 1039 .init_name = "gadget",
914a3f3b
HS		 1040 .release = nop_release,
1041 },
1042 },
914a3f3b
HS		 1043};
1044
1045/*
1046 * Called with interrupts disabled and udc->lock held.
1047 */
1048static void reset_all_endpoints(struct usba_udc *udc)
1049{
1050 struct usba_ep *ep;
1051 struct usba_request *req, *tmp_req;
1052
1053 usba_writel(udc, EPT_RST, ~0UL);
1054
1055 ep = to_usba_ep(udc->gadget.ep0);
1056 list_for_each_entry_safe(req, tmp_req, &ep->queue, queue) {
1057 list_del_init(&req->queue);
1058 request_complete(ep, req, -ECONNRESET);
1059 }
1060
40517707
DB		 1061 /* NOTE: normally, the next call to the gadget driver is in
1062 * charge of disabling endpoints... usually disconnect().
1063 * The exception would be entering a high speed test mode.
1064 *
1065 * FIXME remove this code ... and retest thoroughly.
1066 */
914a3f3b 1067 list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
58ed7b94
HS		 1068 if (ep->desc) {
1069 spin_unlock(&udc->lock);
914a3f3b 1070 usba_ep_disable(&ep->ep);
58ed7b94
HS		 1071 spin_lock(&udc->lock);
1072 }
914a3f3b
HS		 1073 }
1074}
1075
1076static struct usba_ep *get_ep_by_addr(struct usba_udc *udc, u16 wIndex)
1077{
1078 struct usba_ep *ep;
1079
1080 if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
1081 return to_usba_ep(udc->gadget.ep0);
1082
1083 list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) {
1084 u8 bEndpointAddress;
1085
1086 if (!ep->desc)
1087 continue;
1088 bEndpointAddress = ep->desc->bEndpointAddress;
1089 if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
1090 continue;
1091 if ((bEndpointAddress & USB_ENDPOINT_NUMBER_MASK)
1092 == (wIndex & USB_ENDPOINT_NUMBER_MASK))
1093 return ep;
1094 }
1095
1096 return NULL;
1097}
1098
1099/* Called with interrupts disabled and udc->lock held */
1100static inline void set_protocol_stall(struct usba_udc *udc, struct usba_ep *ep)
1101{
1102 usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
1103 ep->state = WAIT_FOR_SETUP;
1104}
1105
1106static inline int is_stalled(struct usba_udc *udc, struct usba_ep *ep)
1107{
1108 if (usba_ep_readl(ep, STA) & USBA_FORCE_STALL)
1109 return 1;
1110 return 0;
1111}
1112
1113static inline void set_address(struct usba_udc *udc, unsigned int addr)
1114{
1115 u32 regval;
1116
1117 DBG(DBG_BUS, "setting address %u...\n", addr);
1118 regval = usba_readl(udc, CTRL);
1119 regval = USBA_BFINS(DEV_ADDR, addr, regval);
1120 usba_writel(udc, CTRL, regval);
1121}
1122
1123static int do_test_mode(struct usba_udc *udc)
1124{
1125 static const char test_packet_buffer[] = {
1126 /* JKJKJKJK * 9 */
1127 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1128 /* JJKKJJKK * 8 */
1129 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA,
1130 /* JJKKJJKK * 8 */
1131 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE,
1132 /* JJJJJJJKKKKKKK * 8 */
1133 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
1134 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
1135 /* JJJJJJJK * 8 */
1136 0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD,
1137 /* {JKKKKKKK * 10}, JK */
1138 0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E
1139 };
1140 struct usba_ep *ep;
1141 struct device *dev = &udc->pdev->dev;
1142 int test_mode;
1143
1144 test_mode = udc->test_mode;
1145
1146 /* Start from a clean slate */
1147 reset_all_endpoints(udc);
1148
1149 switch (test_mode) {
1150 case 0x0100:
1151 /* Test_J */
1152 usba_writel(udc, TST, USBA_TST_J_MODE);
1153 dev_info(dev, "Entering Test_J mode...\n");
1154 break;
1155 case 0x0200:
1156 /* Test_K */
1157 usba_writel(udc, TST, USBA_TST_K_MODE);
1158 dev_info(dev, "Entering Test_K mode...\n");
1159 break;
1160 case 0x0300:
1161 /*
1162 * Test_SE0_NAK: Force high-speed mode and set up ep0
1163 * for Bulk IN transfers
1164 */
1165 ep = &usba_ep[0];
1166 usba_writel(udc, TST,
1167 USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_HIGH));
1168 usba_ep_writel(ep, CFG,
1169 USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
1170 | USBA_EPT_DIR_IN
1171 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
1172 | USBA_BF(BK_NUMBER, 1));
1173 if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
1174 set_protocol_stall(udc, ep);
1175 dev_err(dev, "Test_SE0_NAK: ep0 not mapped\n");
1176 } else {
1177 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
1178 dev_info(dev, "Entering Test_SE0_NAK mode...\n");
1179 }
1180 break;
1181 case 0x0400:
1182 /* Test_Packet */
1183 ep = &usba_ep[0];
1184 usba_ep_writel(ep, CFG,
1185 USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
1186 | USBA_EPT_DIR_IN
1187 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
1188 | USBA_BF(BK_NUMBER, 1));
1189 if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
1190 set_protocol_stall(udc, ep);
1191 dev_err(dev, "Test_Packet: ep0 not mapped\n");
1192 } else {
1193 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
1194 usba_writel(udc, TST, USBA_TST_PKT_MODE);
5d4c2707 1195 memcpy_toio(ep->fifo, test_packet_buffer,
914a3f3b
HS		 1196 sizeof(test_packet_buffer));
1197 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
1198 dev_info(dev, "Entering Test_Packet mode...\n");
1199 }
1200 break;
1201 default:
1202 dev_err(dev, "Invalid test mode: 0x%04x\n", test_mode);
1203 return -EINVAL;
1204 }
1205
1206 return 0;
1207}
1208
1209/* Avoid overly long expressions */
1210static inline bool feature_is_dev_remote_wakeup(struct usb_ctrlrequest *crq)
1211{
551509d2 1212 if (crq->wValue == cpu_to_le16(USB_DEVICE_REMOTE_WAKEUP))
914a3f3b
HS		 1213 return true;
1214 return false;
1215}
1216
1217static inline bool feature_is_dev_test_mode(struct usb_ctrlrequest *crq)
1218{
551509d2 1219 if (crq->wValue == cpu_to_le16(USB_DEVICE_TEST_MODE))
914a3f3b
HS		 1220 return true;
1221 return false;
1222}
1223
1224static inline bool feature_is_ep_halt(struct usb_ctrlrequest *crq)
1225{
551509d2 1226 if (crq->wValue == cpu_to_le16(USB_ENDPOINT_HALT))
914a3f3b
HS		 1227 return true;
1228 return false;
1229}
1230
1231static int handle_ep0_setup(struct usba_udc *udc, struct usba_ep *ep,
1232 struct usb_ctrlrequest *crq)
1233{
40517707 1234 int retval = 0;
914a3f3b
HS		 1235
1236 switch (crq->bRequest) {
1237 case USB_REQ_GET_STATUS: {
1238 u16 status;
1239
1240 if (crq->bRequestType == (USB_DIR_IN | USB_RECIP_DEVICE)) {
58ed7b94 1241 status = cpu_to_le16(udc->devstatus);
914a3f3b
HS		 1242 } else if (crq->bRequestType
1243 == (USB_DIR_IN | USB_RECIP_INTERFACE)) {
551509d2 1244 status = cpu_to_le16(0);
914a3f3b
HS		 1245 } else if (crq->bRequestType
1246 == (USB_DIR_IN | USB_RECIP_ENDPOINT)) {
1247 struct usba_ep *target;
1248
1249 target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1250 if (!target)
1251 goto stall;
1252
1253 status = 0;
1254 if (is_stalled(udc, target))
551509d2 1255 status |= cpu_to_le16(1);
914a3f3b
HS		 1256 } else
1257 goto delegate;
1258
1259 /* Write directly to the FIFO. No queueing is done. */
551509d2 1260 if (crq->wLength != cpu_to_le16(sizeof(status)))
914a3f3b
HS		 1261 goto stall;
1262 ep->state = DATA_STAGE_IN;
1263 __raw_writew(status, ep->fifo);
1264 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
1265 break;
1266 }
1267
1268 case USB_REQ_CLEAR_FEATURE: {
1269 if (crq->bRequestType == USB_RECIP_DEVICE) {
58ed7b94
HS		 1270 if (feature_is_dev_remote_wakeup(crq))
1271 udc->devstatus
1272 &= ~(1 << USB_DEVICE_REMOTE_WAKEUP);
1273 else
914a3f3b
HS		 1274 /* Can't CLEAR_FEATURE TEST_MODE */
1275 goto stall;
914a3f3b
HS		 1276 } else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
1277 struct usba_ep *target;
1278
551509d2 1279 if (crq->wLength != cpu_to_le16(0)
914a3f3b
HS		 1280 || !feature_is_ep_halt(crq))
1281 goto stall;
1282 target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1283 if (!target)
1284 goto stall;
1285
1286 usba_ep_writel(target, CLR_STA, USBA_FORCE_STALL);
1287 if (target->index != 0)
1288 usba_ep_writel(target, CLR_STA,
1289 USBA_TOGGLE_CLR);
1290 } else {
1291 goto delegate;
1292 }
1293
1294 send_status(udc, ep);
1295 break;
1296 }
1297
1298 case USB_REQ_SET_FEATURE: {
1299 if (crq->bRequestType == USB_RECIP_DEVICE) {
1300 if (feature_is_dev_test_mode(crq)) {
1301 send_status(udc, ep);
1302 ep->state = STATUS_STAGE_TEST;
1303 udc->test_mode = le16_to_cpu(crq->wIndex);
1304 return 0;
1305 } else if (feature_is_dev_remote_wakeup(crq)) {
58ed7b94 1306 udc->devstatus |= 1 << USB_DEVICE_REMOTE_WAKEUP;
914a3f3b
HS		 1307 } else {
1308 goto stall;
1309 }
1310 } else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
1311 struct usba_ep *target;
1312
551509d2 1313 if (crq->wLength != cpu_to_le16(0)
914a3f3b
HS		 1314 || !feature_is_ep_halt(crq))
1315 goto stall;
1316
1317 target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1318 if (!target)
1319 goto stall;
1320
1321 usba_ep_writel(target, SET_STA, USBA_FORCE_STALL);
1322 } else
1323 goto delegate;
1324
1325 send_status(udc, ep);
1326 break;
1327 }
1328
1329 case USB_REQ_SET_ADDRESS:
1330 if (crq->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE))
1331 goto delegate;
1332
1333 set_address(udc, le16_to_cpu(crq->wValue));
1334 send_status(udc, ep);
1335 ep->state = STATUS_STAGE_ADDR;
1336 break;
1337
1338 default:
1339delegate:
1340 spin_unlock(&udc->lock);
1341 retval = udc->driver->setup(&udc->gadget, crq);
1342 spin_lock(&udc->lock);
1343 }
1344
1345 return retval;
1346
1347stall:
00274921 1348 pr_err("udc: %s: Invalid setup request: %02x.%02x v%04x i%04x l%d, "
914a3f3b
HS		 1349 "halting endpoint...\n",
1350 ep->ep.name, crq->bRequestType, crq->bRequest,
1351 le16_to_cpu(crq->wValue), le16_to_cpu(crq->wIndex),
1352 le16_to_cpu(crq->wLength));
1353 set_protocol_stall(udc, ep);
1354 return -1;
1355}
1356
1357static void usba_control_irq(struct usba_udc *udc, struct usba_ep *ep)
1358{
1359 struct usba_request *req;
1360 u32 epstatus;
1361 u32 epctrl;
1362
1363restart:
1364 epstatus = usba_ep_readl(ep, STA);
1365 epctrl = usba_ep_readl(ep, CTL);
1366
1367 DBG(DBG_INT, "%s [%d]: s/%08x c/%08x\n",
1368 ep->ep.name, ep->state, epstatus, epctrl);
1369
1370 req = NULL;
1371 if (!list_empty(&ep->queue))
1372 req = list_entry(ep->queue.next,
1373 struct usba_request, queue);
1374
1375 if ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
1376 if (req->submitted)
1377 next_fifo_transaction(ep, req);
1378 else
1379 submit_request(ep, req);
1380
1381 if (req->last_transaction) {
1382 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
1383 usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
1384 }
1385 goto restart;
1386 }
1387 if ((epstatus & epctrl) & USBA_TX_COMPLETE) {
1388 usba_ep_writel(ep, CLR_STA, USBA_TX_COMPLETE);
1389
1390 switch (ep->state) {
1391 case DATA_STAGE_IN:
1392 usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
1393 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1394 ep->state = STATUS_STAGE_OUT;
1395 break;
1396 case STATUS_STAGE_ADDR:
1397 /* Activate our new address */
1398 usba_writel(udc, CTRL, (usba_readl(udc, CTRL)
1399 | USBA_FADDR_EN));
1400 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1401 ep->state = WAIT_FOR_SETUP;
1402 break;
1403 case STATUS_STAGE_IN:
1404 if (req) {
1405 list_del_init(&req->queue);
1406 request_complete(ep, req, 0);
1407 submit_next_request(ep);
1408 }
1409 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1410 ep->state = WAIT_FOR_SETUP;
1411 break;
1412 case STATUS_STAGE_TEST:
1413 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1414 ep->state = WAIT_FOR_SETUP;
1415 if (do_test_mode(udc))
1416 set_protocol_stall(udc, ep);
1417 break;
1418 default:
00274921 1419 pr_err("udc: %s: TXCOMP: Invalid endpoint state %d, "
914a3f3b
HS		 1420 "halting endpoint...\n",
1421 ep->ep.name, ep->state);
1422 set_protocol_stall(udc, ep);
1423 break;
1424 }
1425
1426 goto restart;
1427 }
1428 if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
1429 switch (ep->state) {
1430 case STATUS_STAGE_OUT:
1431 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
1432 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1433
1434 if (req) {
1435 list_del_init(&req->queue);
1436 request_complete(ep, req, 0);
1437 }
1438 ep->state = WAIT_FOR_SETUP;
1439 break;
1440
1441 case DATA_STAGE_OUT:
1442 receive_data(ep);
1443 break;
1444
1445 default:
1446 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
1447 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
00274921 1448 pr_err("udc: %s: RXRDY: Invalid endpoint state %d, "
914a3f3b
HS		 1449 "halting endpoint...\n",
1450 ep->ep.name, ep->state);
1451 set_protocol_stall(udc, ep);
1452 break;
1453 }
1454
1455 goto restart;
1456 }
1457 if (epstatus & USBA_RX_SETUP) {
1458 union {
1459 struct usb_ctrlrequest crq;
1460 unsigned long data[2];
1461 } crq;
1462 unsigned int pkt_len;
1463 int ret;
1464
1465 if (ep->state != WAIT_FOR_SETUP) {
1466 /*
1467 * Didn't expect a SETUP packet at this
1468 * point. Clean up any pending requests (which
1469 * may be successful).
1470 */
1471 int status = -EPROTO;
1472
1473 /*
1474 * RXRDY and TXCOMP are dropped when SETUP
1475 * packets arrive. Just pretend we received
1476 * the status packet.
1477 */
1478 if (ep->state == STATUS_STAGE_OUT
1479 || ep->state == STATUS_STAGE_IN) {
1480 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1481 status = 0;
1482 }
1483
1484 if (req) {
1485 list_del_init(&req->queue);
1486 request_complete(ep, req, status);
1487 }
1488 }
1489
1490 pkt_len = USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
1491 DBG(DBG_HW, "Packet length: %u\n", pkt_len);
1492 if (pkt_len != sizeof(crq)) {
00274921 1493 pr_warning("udc: Invalid packet length %u "
16a45bc8 1494 "(expected %zu)\n", pkt_len, sizeof(crq));
914a3f3b
HS		 1495 set_protocol_stall(udc, ep);
1496 return;
1497 }
1498
1499 DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo);
5d4c2707 1500 memcpy_fromio(crq.data, ep->fifo, sizeof(crq));
914a3f3b
HS		 1501
1502 /* Free up one bank in the FIFO so that we can
1503 * generate or receive a reply right away. */
1504 usba_ep_writel(ep, CLR_STA, USBA_RX_SETUP);
1505
1506 /* printk(KERN_DEBUG "setup: %d: %02x.%02x\n",
1507 ep->state, crq.crq.bRequestType,
1508 crq.crq.bRequest); */
1509
1510 if (crq.crq.bRequestType & USB_DIR_IN) {
1511 /*
1512 * The USB 2.0 spec states that "if wLength is
1513 * zero, there is no data transfer phase."
1514 * However, testusb #14 seems to actually
1515 * expect a data phase even if wLength = 0...
1516 */
1517 ep->state = DATA_STAGE_IN;
1518 } else {
551509d2 1519 if (crq.crq.wLength != cpu_to_le16(0))
914a3f3b
HS		 1520 ep->state = DATA_STAGE_OUT;
1521 else
1522 ep->state = STATUS_STAGE_IN;
1523 }
1524
1525 ret = -1;
1526 if (ep->index == 0)
1527 ret = handle_ep0_setup(udc, ep, &crq.crq);
1528 else {
1529 spin_unlock(&udc->lock);
1530 ret = udc->driver->setup(&udc->gadget, &crq.crq);
1531 spin_lock(&udc->lock);
1532 }
1533
1534 DBG(DBG_BUS, "req %02x.%02x, length %d, state %d, ret %d\n",
1535 crq.crq.bRequestType, crq.crq.bRequest,
1536 le16_to_cpu(crq.crq.wLength), ep->state, ret);
1537
1538 if (ret < 0) {
1539 /* Let the host know that we failed */
1540 set_protocol_stall(udc, ep);
1541 }
1542 }
1543}
1544
1545static void usba_ep_irq(struct usba_udc *udc, struct usba_ep *ep)
1546{
1547 struct usba_request *req;
1548 u32 epstatus;
1549 u32 epctrl;
1550
1551 epstatus = usba_ep_readl(ep, STA);
1552 epctrl = usba_ep_readl(ep, CTL);
1553
1554 DBG(DBG_INT, "%s: interrupt, status: 0x%08x\n", ep->ep.name, epstatus);
1555
1556 while ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
1557 DBG(DBG_BUS, "%s: TX PK ready\n", ep->ep.name);
1558
1559 if (list_empty(&ep->queue)) {
1560 dev_warn(&udc->pdev->dev, "ep_irq: queue empty\n");
1561 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
1562 return;
1563 }
1564
1565 req = list_entry(ep->queue.next, struct usba_request, queue);
1566
1567 if (req->using_dma) {
1568 /* Send a zero-length packet */
1569 usba_ep_writel(ep, SET_STA,
1570 USBA_TX_PK_RDY);
1571 usba_ep_writel(ep, CTL_DIS,
1572 USBA_TX_PK_RDY);
1573 list_del_init(&req->queue);
1574 submit_next_request(ep);
1575 request_complete(ep, req, 0);
1576 } else {
1577 if (req->submitted)
1578 next_fifo_transaction(ep, req);
1579 else
1580 submit_request(ep, req);
1581
1582 if (req->last_transaction) {
1583 list_del_init(&req->queue);
1584 submit_next_request(ep);
1585 request_complete(ep, req, 0);
1586 }
1587 }
1588
1589 epstatus = usba_ep_readl(ep, STA);
1590 epctrl = usba_ep_readl(ep, CTL);
1591 }
1592 if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
1593 DBG(DBG_BUS, "%s: RX data ready\n", ep->ep.name);
1594 receive_data(ep);
1595 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
1596 }
1597}
1598
1599static void usba_dma_irq(struct usba_udc *udc, struct usba_ep *ep)
1600{
1601 struct usba_request *req;
1602 u32 status, control, pending;
1603
1604 status = usba_dma_readl(ep, STATUS);
1605 control = usba_dma_readl(ep, CONTROL);
1606#ifdef CONFIG_USB_GADGET_DEBUG_FS
1607 ep->last_dma_status = status;
1608#endif
1609 pending = status & control;
1610 DBG(DBG_INT | DBG_DMA, "dma irq, s/%#08x, c/%#08x\n", status, control);
1611
1612 if (status & USBA_DMA_CH_EN) {
1613 dev_err(&udc->pdev->dev,
1614 "DMA_CH_EN is set after transfer is finished!\n");
1615 dev_err(&udc->pdev->dev,
1616 "status=%#08x, pending=%#08x, control=%#08x\n",
1617 status, pending, control);
1618
1619 /*
1620 * try to pretend nothing happened. We might have to
1621 * do something here...
1622 */
1623 }
1624
1625 if (list_empty(&ep->queue))
1626 /* Might happen if a reset comes along at the right moment */
1627 return;
1628
1629 if (pending & (USBA_DMA_END_TR_ST | USBA_DMA_END_BUF_ST)) {
1630 req = list_entry(ep->queue.next, struct usba_request, queue);
1631 usba_update_req(ep, req, status);
1632
1633 list_del_init(&req->queue);
1634 submit_next_request(ep);
1635 request_complete(ep, req, 0);
1636 }
1637}
1638
1639static irqreturn_t usba_udc_irq(int irq, void *devid)
1640{
1641 struct usba_udc *udc = devid;
1642 u32 status;
1643 u32 dma_status;
1644 u32 ep_status;
1645
1646 spin_lock(&udc->lock);
1647
1648 status = usba_readl(udc, INT_STA);
1649 DBG(DBG_INT, "irq, status=%#08x\n", status);
1650
1651 if (status & USBA_DET_SUSPEND) {
16a45bc8 1652 toggle_bias(0);
914a3f3b
HS		 1653 usba_writel(udc, INT_CLR, USBA_DET_SUSPEND);
1654 DBG(DBG_BUS, "Suspend detected\n");
1655 if (udc->gadget.speed != USB_SPEED_UNKNOWN
1656 && udc->driver && udc->driver->suspend) {
1657 spin_unlock(&udc->lock);
1658 udc->driver->suspend(&udc->gadget);
1659 spin_lock(&udc->lock);
1660 }
1661 }
1662
1663 if (status & USBA_WAKE_UP) {
16a45bc8 1664 toggle_bias(1);
914a3f3b
HS		 1665 usba_writel(udc, INT_CLR, USBA_WAKE_UP);
1666 DBG(DBG_BUS, "Wake Up CPU detected\n");
1667 }
1668
1669 if (status & USBA_END_OF_RESUME) {
1670 usba_writel(udc, INT_CLR, USBA_END_OF_RESUME);
1671 DBG(DBG_BUS, "Resume detected\n");
1672 if (udc->gadget.speed != USB_SPEED_UNKNOWN
1673 && udc->driver && udc->driver->resume) {
1674 spin_unlock(&udc->lock);
1675 udc->driver->resume(&udc->gadget);
1676 spin_lock(&udc->lock);
1677 }
1678 }
1679
1680 dma_status = USBA_BFEXT(DMA_INT, status);
1681 if (dma_status) {
1682 int i;
1683
1684 for (i = 1; i < USBA_NR_ENDPOINTS; i++)
1685 if (dma_status & (1 << i))
1686 usba_dma_irq(udc, &usba_ep[i]);
1687 }
1688
1689 ep_status = USBA_BFEXT(EPT_INT, status);
1690 if (ep_status) {
1691 int i;
1692
1693 for (i = 0; i < USBA_NR_ENDPOINTS; i++)
1694 if (ep_status & (1 << i)) {
1695 if (ep_is_control(&usba_ep[i]))
1696 usba_control_irq(udc, &usba_ep[i]);
1697 else
1698 usba_ep_irq(udc, &usba_ep[i]);
1699 }
1700 }
1701
1702 if (status & USBA_END_OF_RESET) {
1703 struct usba_ep *ep0;
1704
1705 usba_writel(udc, INT_CLR, USBA_END_OF_RESET);
1706 reset_all_endpoints(udc);
1707
40517707
DB		 1708 if (udc->gadget.speed != USB_SPEED_UNKNOWN
1709 && udc->driver->disconnect) {
1710 udc->gadget.speed = USB_SPEED_UNKNOWN;
1711 spin_unlock(&udc->lock);
1712 udc->driver->disconnect(&udc->gadget);
1713 spin_lock(&udc->lock);
1714 }
1715
914a3f3b
HS		 1716 if (status & USBA_HIGH_SPEED) {
1717 DBG(DBG_BUS, "High-speed bus reset detected\n");
1718 udc->gadget.speed = USB_SPEED_HIGH;
1719 } else {
1720 DBG(DBG_BUS, "Full-speed bus reset detected\n");
1721 udc->gadget.speed = USB_SPEED_FULL;
1722 }
1723
1724 ep0 = &usba_ep[0];
1725 ep0->desc = &usba_ep0_desc;
1726 ep0->state = WAIT_FOR_SETUP;
1727 usba_ep_writel(ep0, CFG,
1728 (USBA_BF(EPT_SIZE, EP0_EPT_SIZE)
1729 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL)
1730 | USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE)));
1731 usba_ep_writel(ep0, CTL_ENB,
1732 USBA_EPT_ENABLE | USBA_RX_SETUP);
1733 usba_writel(udc, INT_ENB,
1734 (usba_readl(udc, INT_ENB)
1735 | USBA_BF(EPT_INT, 1)
1736 | USBA_DET_SUSPEND
1737 | USBA_END_OF_RESUME));
1738
40517707
DB		 1739 /*
1740 * Unclear why we hit this irregularly, e.g. in usbtest,
1741 * but it's clearly harmless...
1742 */
914a3f3b 1743 if (!(usba_ep_readl(ep0, CFG) & USBA_EPT_MAPPED))
40517707
DB		 1744 dev_dbg(&udc->pdev->dev,
1745 "ODD: EP0 configuration is invalid!\n");
914a3f3b
HS		 1746 }
1747
1748 spin_unlock(&udc->lock);
1749
1750 return IRQ_HANDLED;
1751}
1752
1753static irqreturn_t usba_vbus_irq(int irq, void *devid)
1754{
1755 struct usba_udc *udc = devid;
1756 int vbus;
1757
1758 /* debounce */
1759 udelay(10);
1760
1761 spin_lock(&udc->lock);
1762
1763 /* May happen if Vbus pin toggles during probe() */
1764 if (!udc->driver)
1765 goto out;
1766
640e95ab 1767 vbus = vbus_is_present(udc);
914a3f3b
HS		 1768 if (vbus != udc->vbus_prev) {
1769 if (vbus) {
16a45bc8
SP		 1770 toggle_bias(1);
1771 usba_writel(udc, CTRL, USBA_ENABLE_MASK);
914a3f3b
HS		 1772 usba_writel(udc, INT_ENB, USBA_END_OF_RESET);
1773 } else {
1774 udc->gadget.speed = USB_SPEED_UNKNOWN;
1775 reset_all_endpoints(udc);
16a45bc8
SP		 1776 toggle_bias(0);
1777 usba_writel(udc, CTRL, USBA_DISABLE_MASK);
40517707
DB		 1778 if (udc->driver->disconnect) {
1779 spin_unlock(&udc->lock);
1780 udc->driver->disconnect(&udc->gadget);
1781 spin_lock(&udc->lock);
1782 }
914a3f3b
HS		 1783 }
1784 udc->vbus_prev = vbus;
1785 }
1786
1787out:
1788 spin_unlock(&udc->lock);
1789
1790 return IRQ_HANDLED;
1791}
1792
1793int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1794{
1795 struct usba_udc *udc = &the_udc;
1796 unsigned long flags;
1797 int ret;
1798
1799 if (!udc->pdev)
1800 return -ENODEV;
1801
1802 spin_lock_irqsave(&udc->lock, flags);
1803 if (udc->driver) {
1804 spin_unlock_irqrestore(&udc->lock, flags);
1805 return -EBUSY;
1806 }
1807
58ed7b94 1808 udc->devstatus = 1 << USB_DEVICE_SELF_POWERED;
914a3f3b
HS		 1809 udc->driver = driver;
1810 udc->gadget.dev.driver = &driver->driver;
1811 spin_unlock_irqrestore(&udc->lock, flags);
1812
1813 clk_enable(udc->pclk);
1814 clk_enable(udc->hclk);
1815
1816 ret = driver->bind(&udc->gadget);
1817 if (ret) {
1818 DBG(DBG_ERR, "Could not bind to driver %s: error %d\n",
1819 driver->driver.name, ret);
1820 goto err_driver_bind;
1821 }
1822
1823 DBG(DBG_GADGET, "registered driver `%s'\n", driver->driver.name);
1824
1825 udc->vbus_prev = 0;
472a6786 1826 if (gpio_is_valid(udc->vbus_pin))
914a3f3b
HS		 1827 enable_irq(gpio_to_irq(udc->vbus_pin));
1828
1829 /* If Vbus is present, enable the controller and wait for reset */
1830 spin_lock_irqsave(&udc->lock, flags);
1831 if (vbus_is_present(udc) && udc->vbus_prev == 0) {
16a45bc8
SP		 1832 toggle_bias(1);
1833 usba_writel(udc, CTRL, USBA_ENABLE_MASK);
914a3f3b
HS		 1834 usba_writel(udc, INT_ENB, USBA_END_OF_RESET);
1835 }
1836 spin_unlock_irqrestore(&udc->lock, flags);
1837
1838 return 0;
1839
1840err_driver_bind:
1841 udc->driver = NULL;
1842 udc->gadget.dev.driver = NULL;
1843 return ret;
1844}
1845EXPORT_SYMBOL(usb_gadget_register_driver);
1846
1847int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1848{
1849 struct usba_udc *udc = &the_udc;
1850 unsigned long flags;
1851
1852 if (!udc->pdev)
1853 return -ENODEV;
40517707 1854 if (driver != udc->driver || !driver->unbind)
914a3f3b
HS		 1855 return -EINVAL;
1856
472a6786 1857 if (gpio_is_valid(udc->vbus_pin))
914a3f3b
HS		 1858 disable_irq(gpio_to_irq(udc->vbus_pin));
1859
1860 spin_lock_irqsave(&udc->lock, flags);
1861 udc->gadget.speed = USB_SPEED_UNKNOWN;
1862 reset_all_endpoints(udc);
1863 spin_unlock_irqrestore(&udc->lock, flags);
1864
1865 /* This will also disable the DP pullup */
16a45bc8
SP		 1866 toggle_bias(0);
1867 usba_writel(udc, CTRL, USBA_DISABLE_MASK);
914a3f3b 1868
40517707
DB		 1869 if (udc->driver->disconnect)
1870 udc->driver->disconnect(&udc->gadget);
1871
914a3f3b
HS		 1872 driver->unbind(&udc->gadget);
1873 udc->gadget.dev.driver = NULL;
1874 udc->driver = NULL;
1875
1876 clk_disable(udc->hclk);
1877 clk_disable(udc->pclk);
1878
1879 DBG(DBG_GADGET, "unregistered driver `%s'\n", driver->driver.name);
1880
1881 return 0;
1882}
1883EXPORT_SYMBOL(usb_gadget_unregister_driver);
1884
1885static int __init usba_udc_probe(struct platform_device *pdev)
1886{
1887 struct usba_platform_data *pdata = pdev->dev.platform_data;
1888 struct resource *regs, *fifo;
1889 struct clk *pclk, *hclk;
1890 struct usba_udc *udc = &the_udc;
1891 int irq, ret, i;
1892
1893 regs = platform_get_resource(pdev, IORESOURCE_MEM, CTRL_IOMEM_ID);
1894 fifo = platform_get_resource(pdev, IORESOURCE_MEM, FIFO_IOMEM_ID);
8d855317 1895 if (!regs || !fifo || !pdata)
914a3f3b
HS		 1896 return -ENXIO;
1897
1898 irq = platform_get_irq(pdev, 0);
1899 if (irq < 0)
1900 return irq;
1901
1902 pclk = clk_get(&pdev->dev, "pclk");
1903 if (IS_ERR(pclk))
1904 return PTR_ERR(pclk);
1905 hclk = clk_get(&pdev->dev, "hclk");
1906 if (IS_ERR(hclk)) {
1907 ret = PTR_ERR(hclk);
1908 goto err_get_hclk;
1909 }
1910
40517707 1911 spin_lock_init(&udc->lock);
914a3f3b
HS		 1912 udc->pdev = pdev;
1913 udc->pclk = pclk;
1914 udc->hclk = hclk;
472a6786 1915 udc->vbus_pin = -ENODEV;
914a3f3b
HS		 1916
1917 ret = -ENOMEM;
3ba37bda 1918 udc->regs = ioremap(regs->start, resource_size(regs));
914a3f3b
HS		 1919 if (!udc->regs) {
1920 dev_err(&pdev->dev, "Unable to map I/O memory, aborting.\n");
1921 goto err_map_regs;
1922 }
1923 dev_info(&pdev->dev, "MMIO registers at 0x%08lx mapped at %p\n",
1924 (unsigned long)regs->start, udc->regs);
3ba37bda 1925 udc->fifo = ioremap(fifo->start, resource_size(fifo));
914a3f3b
HS		 1926 if (!udc->fifo) {
1927 dev_err(&pdev->dev, "Unable to map FIFO, aborting.\n");
1928 goto err_map_fifo;
1929 }
1930 dev_info(&pdev->dev, "FIFO at 0x%08lx mapped at %p\n",
1931 (unsigned long)fifo->start, udc->fifo);
1932
1933 device_initialize(&udc->gadget.dev);
1934 udc->gadget.dev.parent = &pdev->dev;
1935 udc->gadget.dev.dma_mask = pdev->dev.dma_mask;
1936
1937 platform_set_drvdata(pdev, udc);
1938
1939 /* Make sure we start from a clean slate */
1940 clk_enable(pclk);
16a45bc8
SP		 1941 toggle_bias(0);
1942 usba_writel(udc, CTRL, USBA_DISABLE_MASK);
914a3f3b
HS		 1943 clk_disable(pclk);
1944
fe92c9e4 1945 usba_ep = kzalloc(sizeof(struct usba_ep) * pdata->num_ep,
8d855317
SP		 1946 GFP_KERNEL);
1947 if (!usba_ep)
1948 goto err_alloc_ep;
1949
1950 the_udc.gadget.ep0 = &usba_ep[0].ep;
1951
914a3f3b
HS		 1952 INIT_LIST_HEAD(&usba_ep[0].ep.ep_list);
1953 usba_ep[0].ep_regs = udc->regs + USBA_EPT_BASE(0);
1954 usba_ep[0].dma_regs = udc->regs + USBA_DMA_BASE(0);
1955 usba_ep[0].fifo = udc->fifo + USBA_FIFO_BASE(0);
8d855317
SP		 1956 usba_ep[0].ep.ops = &usba_ep_ops;
1957 usba_ep[0].ep.name = pdata->ep[0].name;
1958 usba_ep[0].ep.maxpacket = pdata->ep[0].fifo_size;
1959 usba_ep[0].udc = &the_udc;
1960 INIT_LIST_HEAD(&usba_ep[0].queue);
1961 usba_ep[0].fifo_size = pdata->ep[0].fifo_size;
1962 usba_ep[0].nr_banks = pdata->ep[0].nr_banks;
1963 usba_ep[0].index = pdata->ep[0].index;
1964 usba_ep[0].can_dma = pdata->ep[0].can_dma;
1965 usba_ep[0].can_isoc = pdata->ep[0].can_isoc;
1966
1967 for (i = 1; i < pdata->num_ep; i++) {
914a3f3b
HS		 1968 struct usba_ep *ep = &usba_ep[i];
1969
1970 ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
1971 ep->dma_regs = udc->regs + USBA_DMA_BASE(i);
1972 ep->fifo = udc->fifo + USBA_FIFO_BASE(i);
8d855317
SP		 1973 ep->ep.ops = &usba_ep_ops;
1974 ep->ep.name = pdata->ep[i].name;
1975 ep->ep.maxpacket = pdata->ep[i].fifo_size;
1976 ep->udc = &the_udc;
1977 INIT_LIST_HEAD(&ep->queue);
1978 ep->fifo_size = pdata->ep[i].fifo_size;
1979 ep->nr_banks = pdata->ep[i].nr_banks;
1980 ep->index = pdata->ep[i].index;
1981 ep->can_dma = pdata->ep[i].can_dma;
1982 ep->can_isoc = pdata->ep[i].can_isoc;
914a3f3b
HS		 1983
1984 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
1985 }
1986
1987 ret = request_irq(irq, usba_udc_irq, 0, "atmel_usba_udc", udc);
1988 if (ret) {
1989 dev_err(&pdev->dev, "Cannot request irq %d (error %d)\n",
1990 irq, ret);
1991 goto err_request_irq;
1992 }
1993 udc->irq = irq;
1994
1995 ret = device_add(&udc->gadget.dev);
1996 if (ret) {
1997 dev_dbg(&pdev->dev, "Could not add gadget: %d\n", ret);
1998 goto err_device_add;
1999 }
2000
472a6786 2001 if (gpio_is_valid(pdata->vbus_pin)) {
914a3f3b
HS		 2002 if (!gpio_request(pdata->vbus_pin, "atmel_usba_udc")) {
2003 udc->vbus_pin = pdata->vbus_pin;
640e95ab 2004 udc->vbus_pin_inverted = pdata->vbus_pin_inverted;
914a3f3b
HS		 2005
2006 ret = request_irq(gpio_to_irq(udc->vbus_pin),
2007 usba_vbus_irq, 0,
2008 "atmel_usba_udc", udc);
2009 if (ret) {
2010 gpio_free(udc->vbus_pin);
472a6786 2011 udc->vbus_pin = -ENODEV;
914a3f3b
HS		 2012 dev_warn(&udc->pdev->dev,
2013 "failed to request vbus irq; "
2014 "assuming always on\n");
2015 } else {
2016 disable_irq(gpio_to_irq(udc->vbus_pin));
2017 }
2018 }
2019 }
2020
2021 usba_init_debugfs(udc);
8d855317 2022 for (i = 1; i < pdata->num_ep; i++)
914a3f3b
HS		 2023 usba_ep_init_debugfs(udc, &usba_ep[i]);
2024
2025 return 0;
2026
2027err_device_add:
2028 free_irq(irq, udc);
2029err_request_irq:
8d855317
SP		 2030 kfree(usba_ep);
2031err_alloc_ep:
914a3f3b
HS		 2032 iounmap(udc->fifo);
2033err_map_fifo:
2034 iounmap(udc->regs);
2035err_map_regs:
2036 clk_put(hclk);
2037err_get_hclk:
2038 clk_put(pclk);
2039
2040 platform_set_drvdata(pdev, NULL);
2041
2042 return ret;
2043}
2044
2045static int __exit usba_udc_remove(struct platform_device *pdev)
2046{
2047 struct usba_udc *udc;
2048 int i;
8d855317 2049 struct usba_platform_data *pdata = pdev->dev.platform_data;
914a3f3b
HS		 2050
2051 udc = platform_get_drvdata(pdev);
2052
8d855317 2053 for (i = 1; i < pdata->num_ep; i++)
914a3f3b
HS		 2054 usba_ep_cleanup_debugfs(&usba_ep[i]);
2055 usba_cleanup_debugfs(udc);
2056
472a6786 2057 if (gpio_is_valid(udc->vbus_pin))
914a3f3b
HS		 2058 gpio_free(udc->vbus_pin);
2059
2060 free_irq(udc->irq, udc);
5275653f 2061 kfree(usba_ep);
914a3f3b
HS		 2062 iounmap(udc->fifo);
2063 iounmap(udc->regs);
2064 clk_put(udc->hclk);
2065 clk_put(udc->pclk);
2066
2067 device_unregister(&udc->gadget.dev);
2068
2069 return 0;
2070}
2071
2072static struct platform_driver udc_driver = {
2073 .remove = __exit_p(usba_udc_remove),
2074 .driver = {
2075 .name = "atmel_usba_udc",
f34c32f1 2076 .owner = THIS_MODULE,
914a3f3b
HS		 2077 },
2078};
2079
2080static int __init udc_init(void)
2081{
2082 return platform_driver_probe(&udc_driver, usba_udc_probe);
2083}
2084module_init(udc_init);
2085
2086static void __exit udc_exit(void)
2087{
2088 platform_driver_unregister(&udc_driver);
2089}
2090module_exit(udc_exit);
2091
2092MODULE_DESCRIPTION("Atmel USBA UDC driver");
2093MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
2094MODULE_LICENSE("GPL");
f34c32f1 2095MODULE_ALIAS("platform:atmel_usba_udc");
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