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Staging: dt3155: fix 50Hz configuration
[net-next-2.6.git] / drivers / staging / rtl8192su / r8192U_core.c
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5f53d8ca
JC		 1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 * Linux device driver for RTL8192U
4 *
5 * Based on the r8187 driver, which is:
6 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
19 *
20 * The full GNU General Public License is included in this distribution in the
21 * file called LICENSE.
22 *
23 * Contact Information:
24 * Jerry chuang <wlanfae@realtek.com>
25 */
26
d1aed899 27#include <linux/vmalloc.h>
5a0e3ad6 28#include <linux/slab.h>
5f53d8ca
JC		 29
30#undef LOOP_TEST
31#undef DUMP_RX
32#undef DUMP_TX
33#undef DEBUG_TX_DESC2
34#undef RX_DONT_PASS_UL
35#undef DEBUG_EPROM
36#undef DEBUG_RX_VERBOSE
37#undef DUMMY_RX
38#undef DEBUG_ZERO_RX
39#undef DEBUG_RX_SKB
40#undef DEBUG_TX_FRAG
41#undef DEBUG_RX_FRAG
42#undef DEBUG_TX_FILLDESC
43#undef DEBUG_TX
44#undef DEBUG_IRQ
45#undef DEBUG_RX
46#undef DEBUG_RXALLOC
47#undef DEBUG_REGISTERS
48#undef DEBUG_RING
49#undef DEBUG_IRQ_TASKLET
50#undef DEBUG_TX_ALLOC
51#undef DEBUG_TX_DESC
52
53#define CONFIG_RTL8192_IO_MAP
54
5f53d8ca
JC		 55#include <asm/uaccess.h>
56#include "r8192U.h"
5f53d8ca
JC		 57#include "r8180_93cx6.h" /* Card EEPROM */
58#include "r8192U_wx.h"
59
60#include "r8192S_rtl8225.h"
61#include "r8192S_hw.h"
62#include "r8192S_phy.h"
63#include "r8192S_phyreg.h"
64#include "r8192S_Efuse.h"
65
66#include "r819xU_cmdpkt.h"
67#include "r8192U_dm.h"
68//#include "r8192xU_phyreg.h"
69#include <linux/usb.h>
5f53d8ca 70
5f53d8ca 71#include "r8192U_pm.h"
5f53d8ca 72
2a7d71ad 73#include "ieee80211/dot11d.h"
5f53d8ca 74
5f53d8ca
JC		 75
76
5f53d8ca
JC		 77u32 rt_global_debug_component = \
78// COMP_TRACE |
79// COMP_DBG |
80// COMP_INIT |
81// COMP_RECV |
82// COMP_SEND |
83// COMP_IO |
84 COMP_POWER |
85// COMP_EPROM |
86 COMP_SWBW |
87 COMP_POWER_TRACKING |
88 COMP_TURBO |
89 COMP_QOS |
90// COMP_RATE |
91// COMP_RM |
92 COMP_DIG |
93// COMP_EFUSE |
94// COMP_CH |
95// COMP_TXAGC |
96 COMP_HIPWR |
97// COMP_HALDM |
98 COMP_SEC |
99 COMP_LED |
100// COMP_RF |
101// COMP_RXDESC |
102 COMP_FIRMWARE |
103 COMP_HT |
104 COMP_AMSDU |
105 COMP_SCAN |
106// COMP_CMD |
107 COMP_DOWN |
108 COMP_RESET |
109 COMP_ERR; //always open err flags on
5f53d8ca
JC		 110
111#define TOTAL_CAM_ENTRY 32
112#define CAM_CONTENT_COUNT 8
113
a457732b 114static const struct usb_device_id rtl8192_usb_id_tbl[] = {
5f53d8ca 115 /* Realtek */
c0087580 116 {USB_DEVICE(0x0bda, 0x8171)},
5f53d8ca
JC		 117 {USB_DEVICE(0x0bda, 0x8192)},
118 {USB_DEVICE(0x0bda, 0x8709)},
119 /* Corega */
120 {USB_DEVICE(0x07aa, 0x0043)},
121 /* Belkin */
122 {USB_DEVICE(0x050d, 0x805E)},
123 /* Sitecom */
124 {USB_DEVICE(0x0df6, 0x0031)},
125 /* EnGenius */
126 {USB_DEVICE(0x1740, 0x9201)},
127 /* Dlink */
128 {USB_DEVICE(0x2001, 0x3301)},
129 /* Zinwell */
130 {USB_DEVICE(0x5a57, 0x0290)},
488d3749
SG		 131 /* Guillemot */
132 {USB_DEVICE(0x06f8, 0xe031)},
5f53d8ca
JC		 133 //92SU
134 {USB_DEVICE(0x0bda, 0x8172)},
135 {}
136};
137
138MODULE_LICENSE("GPL");
5f53d8ca 139MODULE_VERSION("V 1.1");
5f53d8ca
JC		 140MODULE_DEVICE_TABLE(usb, rtl8192_usb_id_tbl);
141MODULE_DESCRIPTION("Linux driver for Realtek RTL8192 USB WiFi cards");
142
143static char* ifname = "wlan%d";
5f53d8ca
JC		 144static int hwwep = 1; //default use hw. set 0 to use software security
145static int channels = 0x3fff;
146
147
148
5f53d8ca
JC		 149module_param(ifname, charp, S_IRUGO|S_IWUSR );
150//module_param(hwseqnum,int, S_IRUGO|S_IWUSR);
151module_param(hwwep,int, S_IRUGO|S_IWUSR);
152module_param(channels,int, S_IRUGO|S_IWUSR);
5f53d8ca
JC		 153
154MODULE_PARM_DESC(ifname," Net interface name, wlan%d=default");
155//MODULE_PARM_DESC(hwseqnum," Try to use hardware 802.11 header sequence numbers. Zero=default");
156MODULE_PARM_DESC(hwwep," Try to use hardware security support. ");
157MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
158
5f53d8ca
JC		 159static int __devinit rtl8192_usb_probe(struct usb_interface *intf,
160 const struct usb_device_id *id);
161static void __devexit rtl8192_usb_disconnect(struct usb_interface *intf);
5f53d8ca
JC		 162
163static struct usb_driver rtl8192_usb_driver = {
5f53d8ca
JC		 164 .name = RTL819xU_MODULE_NAME, /* Driver name */
165 .id_table = rtl8192_usb_id_tbl, /* PCI_ID table */
166 .probe = rtl8192_usb_probe, /* probe fn */
167 .disconnect = rtl8192_usb_disconnect, /* remove fn */
5f53d8ca
JC		 168 .suspend = rtl8192U_suspend, /* PM suspend fn */
169 .resume = rtl8192U_resume, /* PM resume fn */
5f53d8ca 170 .reset_resume = rtl8192U_resume, /* PM reset resume fn */
5f53d8ca
JC		 171};
172
173
5f53d8ca
JC		 174static void rtl8192SU_read_eeprom_info(struct net_device *dev);
175short rtl8192SU_tx(struct net_device *dev, struct sk_buff* skb);
176void rtl8192SU_rx_nomal(struct sk_buff* skb);
177void rtl8192SU_rx_cmd(struct sk_buff *skb);
178bool rtl8192SU_adapter_start(struct net_device *dev);
179short rtl8192SU_tx_cmd(struct net_device *dev, struct sk_buff *skb);
180void rtl8192SU_link_change(struct net_device *dev);
181void InitialGain8192S(struct net_device *dev,u8 Operation);
182void rtl8192SU_query_rxdesc_status(struct sk_buff *skb, struct ieee80211_rx_stats *stats, bool bIsRxAggrSubframe);
183
184struct rtl819x_ops rtl8192su_ops = {
185 .nic_type = NIC_8192SU,
186 .rtl819x_read_eeprom_info = rtl8192SU_read_eeprom_info,
187 .rtl819x_tx = rtl8192SU_tx,
188 .rtl819x_tx_cmd = rtl8192SU_tx_cmd,
189 .rtl819x_rx_nomal = rtl8192SU_rx_nomal,
190 .rtl819x_rx_cmd = rtl8192SU_rx_cmd,
191 .rtl819x_adapter_start = rtl8192SU_adapter_start,
192 .rtl819x_link_change = rtl8192SU_link_change,
193 .rtl819x_initial_gain = InitialGain8192S,
194 .rtl819x_query_rxdesc_status = rtl8192SU_query_rxdesc_status,
195};
5f53d8ca 196
5f53d8ca
JC		 197
198typedef struct _CHANNEL_LIST
199{
200 u8 Channel[32];
201 u8 Len;
202}CHANNEL_LIST, *PCHANNEL_LIST;
203
204static CHANNEL_LIST ChannelPlan[] = {
205 {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,149,153,157,161,165},24}, //FCC
206 {{1,2,3,4,5,6,7,8,9,10,11},11}, //IC
207 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //ETSI
208 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //Spain. Change to ETSI.
209 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //France. Change to ETSI.
210 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, //MKK //MKK
211 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22},//MKK1
212 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //Israel.
213 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, // For 11a , TELEC
214 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64}, 22}, //MIC
215 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14} //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626
216};
217
218static void rtl819x_set_channel_map(u8 channel_plan, struct r8192_priv* priv)
219{
220 int i, max_chan=-1, min_chan=-1;
221 struct ieee80211_device* ieee = priv->ieee80211;
222 switch (channel_plan)
223 {
224 case COUNTRY_CODE_FCC:
225 case COUNTRY_CODE_IC:
226 case COUNTRY_CODE_ETSI:
227 case COUNTRY_CODE_SPAIN:
228 case COUNTRY_CODE_FRANCE:
229 case COUNTRY_CODE_MKK:
230 case COUNTRY_CODE_MKK1:
231 case COUNTRY_CODE_ISRAEL:
232 case COUNTRY_CODE_TELEC:
233 case COUNTRY_CODE_MIC:
234 {
235 Dot11d_Init(ieee);
236 ieee->bGlobalDomain = false;
237 //acturally 8225 & 8256 rf chip only support B,G,24N mode
238 if ((priv->rf_chip == RF_8225) || (priv->rf_chip == RF_8256) || (priv->rf_chip == RF_6052))
239 {
240 min_chan = 1;
241 max_chan = 14;
242 }
243 else
244 {
245 RT_TRACE(COMP_ERR, "unknown rf chip, can't set channel map in function:%s()\n", __FUNCTION__);
246 }
247 if (ChannelPlan[channel_plan].Len != 0){
248 // Clear old channel map
249 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
250 // Set new channel map
251 for (i=0;i<ChannelPlan[channel_plan].Len;i++)
252 {
253 if (ChannelPlan[channel_plan].Channel[i] < min_chan || ChannelPlan[channel_plan].Channel[i] > max_chan)
254 break;
255 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
256 }
257 }
258 break;
259 }
260 case COUNTRY_CODE_GLOBAL_DOMAIN:
261 {
262 GET_DOT11D_INFO(ieee)->bEnabled = 0;//this flag enabled to follow 11d country IE setting, otherwise, it shall follow global domain settings.
263 Dot11d_Reset(ieee);
264 ieee->bGlobalDomain = true;
265 break;
266 }
267 default:
268 break;
269 }
270 return;
271}
5f53d8ca
JC		 272
273#define eqMacAddr(a,b) ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 )
274
5f53d8ca
JC		 275#define rx_hal_is_cck_rate(_pDesc)\
276 ((_pDesc->RxMCS == DESC92S_RATE1M ||\
277 _pDesc->RxMCS == DESC92S_RATE2M ||\
278 _pDesc->RxMCS == DESC92S_RATE5_5M ||\
279 _pDesc->RxMCS == DESC92S_RATE11M) &&\
280 !_pDesc->RxHT)
281
282#define tx_hal_is_cck_rate(_DataRate)\
283 ( _DataRate == MGN_1M ||\
284 _DataRate == MGN_2M ||\
285 _DataRate == MGN_5_5M ||\
286 _DataRate == MGN_11M )
287
5f53d8ca
JC		 288
289
290
291void CamResetAllEntry(struct net_device *dev)
292{
293#if 1
294 u32 ulcommand = 0;
295 //2004/02/11 In static WEP, OID_ADD_KEY or OID_ADD_WEP are set before STA associate to AP.
296 // However, ResetKey is called on OID_802_11_INFRASTRUCTURE_MODE and MlmeAssociateRequest
297 // In this condition, Cam can not be reset because upper layer will not set this static key again.
298 //if(Adapter->EncAlgorithm == WEP_Encryption)
299 // return;
300//debug
301 //DbgPrint("========================================\n");
302 //DbgPrint(" Call ResetAllEntry \n");
303 //DbgPrint("========================================\n\n");
304 ulcommand |= BIT31|BIT30;
305 write_nic_dword(dev, RWCAM, ulcommand);
306#else
307 for(ucIndex=0;ucIndex<TOTAL_CAM_ENTRY;ucIndex++)
308 CAM_mark_invalid(dev, ucIndex);
309 for(ucIndex=0;ucIndex<TOTAL_CAM_ENTRY;ucIndex++)
310 CAM_empty_entry(dev, ucIndex);
311#endif
312
313}
314
315
316void write_cam(struct net_device *dev, u8 addr, u32 data)
317{
318 write_nic_dword(dev, WCAMI, data);
319 write_nic_dword(dev, RWCAM, BIT31|BIT16|(addr&0xff) );
320}
321
322u32 read_cam(struct net_device *dev, u8 addr)
323{
324 write_nic_dword(dev, RWCAM, 0x80000000|(addr&0xff) );
325 return read_nic_dword(dev, 0xa8);
326}
327
328void write_nic_byte_E(struct net_device *dev, int indx, u8 data)
329{
330 int status;
331 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
332 struct usb_device *udev = priv->udev;
333
334 status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
335 RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
336 indx|0xfe00, 0, &data, 1, HZ / 2);
337
338 if (status < 0)
339 {
340 printk("write_nic_byte_E TimeOut! status:%d\n", status);
341 }
342}
343
344u8 read_nic_byte_E(struct net_device *dev, int indx)
345{
346 int status;
347 u8 data;
348 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
349 struct usb_device *udev = priv->udev;
350
351 status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
352 RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
353 indx|0xfe00, 0, &data, 1, HZ / 2);
354
355 if (status < 0)
356 {
357 printk("read_nic_byte_E TimeOut! status:%d\n", status);
358 }
359
360 return data;
361}
362//as 92U has extend page from 4 to 16, so modify functions below.
363void write_nic_byte(struct net_device *dev, int indx, u8 data)
364{
365 int status;
366
367 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
368 struct usb_device *udev = priv->udev;
369
370 status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
371 RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
5f53d8ca 372 indx, 0, &data, 1, HZ / 2);
5f53d8ca
JC		 373
374 if (status < 0)
375 {
376 printk("write_nic_byte TimeOut! status:%d\n", status);
377 }
378
379
380}
381
382
383void write_nic_word(struct net_device *dev, int indx, u16 data)
384{
385
386 int status;
387
388 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
389 struct usb_device *udev = priv->udev;
390
391 status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
392 RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
5f53d8ca 393 indx, 0, &data, 2, HZ / 2);
5f53d8ca
JC		 394
395 if (status < 0)
396 {
397 printk("write_nic_word TimeOut! status:%d\n", status);
398 }
399
400}
401
402
403void write_nic_dword(struct net_device *dev, int indx, u32 data)
404{
405
406 int status;
407
408 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
409 struct usb_device *udev = priv->udev;
410
411 status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
412 RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
5f53d8ca 413 indx, 0, &data, 4, HZ / 2);
5f53d8ca
JC		 414
415
416 if (status < 0)
417 {
418 printk("write_nic_dword TimeOut! status:%d\n", status);
419 }
420
421}
422
423
424
425u8 read_nic_byte(struct net_device *dev, int indx)
426{
427 u8 data;
428 int status;
429 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
430 struct usb_device *udev = priv->udev;
431
432 status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
433 RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
5f53d8ca 434 indx, 0, &data, 1, HZ / 2);
5f53d8ca
JC		 435
436 if (status < 0)
437 {
438 printk("read_nic_byte TimeOut! status:%d\n", status);
439 }
440
441 return data;
442}
443
444
445
446u16 read_nic_word(struct net_device *dev, int indx)
447{
448 u16 data;
449 int status;
450 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
451 struct usb_device *udev = priv->udev;
452
453 status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
454 RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
5f53d8ca 455 indx, 0, &data, 2, HZ / 2);
5f53d8ca
JC		 456
457 if (status < 0)
458 {
459 printk("read_nic_word TimeOut! status:%d\n", status);
460 }
461
462
463 return data;
464}
465
466u16 read_nic_word_E(struct net_device *dev, int indx)
467{
468 u16 data;
469 int status;
470 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
471 struct usb_device *udev = priv->udev;
472
473 status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
474 RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
475 indx|0xfe00, 0, &data, 2, HZ / 2);
476
477 if (status < 0)
478 {
479 printk("read_nic_word TimeOut! status:%d\n", status);
480 }
481
482
483 return data;
484}
485
486u32 read_nic_dword(struct net_device *dev, int indx)
487{
488 u32 data;
489 int status;
490// int result;
491
492 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
493 struct usb_device *udev = priv->udev;
494
495 status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
496 RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
5f53d8ca 497 indx, 0, &data, 4, HZ / 2);
5f53d8ca
JC		 498// if(0 != result) {
499// printk(KERN_WARNING "read size of data = %d\, date = %d\n", result, data);
500// }
501
502 if (status < 0)
503 {
504 printk("read_nic_dword TimeOut! status:%d\n", status);
505 if(status == -ENODEV) {
506 priv->usb_error = true;
507 }
508 }
509
510
511
512 return data;
513}
514
515
516//u8 read_phy_cck(struct net_device *dev, u8 adr);
517//u8 read_phy_ofdm(struct net_device *dev, u8 adr);
518/* this might still called in what was the PHY rtl8185/rtl8192 common code
519 * plans are to possibilty turn it again in one common code...
520 */
521inline void force_pci_posting(struct net_device *dev)
522{
523}
524
525
526static struct net_device_stats *rtl8192_stats(struct net_device *dev);
527void rtl8192_commit(struct net_device *dev);
528//void rtl8192_restart(struct net_device *dev);
5f53d8ca
JC		 529void rtl8192_restart(struct work_struct *work);
530//void rtl8192_rq_tx_ack(struct work_struct *work);
5f53d8ca
JC		 531
532void watch_dog_timer_callback(unsigned long data);
533
534/****************************************************************************
535 -----------------------------PROCFS STUFF-------------------------
536*****************************************************************************/
537
538static struct proc_dir_entry *rtl8192_proc = NULL;
539
540
541
542static int proc_get_stats_ap(char *page, char **start,
543 off_t offset, int count,
544 int *eof, void *data)
545{
546 struct net_device *dev = data;
547 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
548 struct ieee80211_device *ieee = priv->ieee80211;
549 struct ieee80211_network *target;
550
551 int len = 0;
552
553 list_for_each_entry(target, &ieee->network_list, list) {
554
555 len += snprintf(page + len, count - len,
556 "%s ", target->ssid);
557
558 if(target->wpa_ie_len>0 || target->rsn_ie_len>0){
559 len += snprintf(page + len, count - len,
560 "WPA\n");
561 }
562 else{
563 len += snprintf(page + len, count - len,
564 "non_WPA\n");
565 }
566
567 }
568
569 *eof = 1;
570 return len;
571}
572
5f53d8ca
JC		 573static int proc_get_registers(char *page, char **start,
574 off_t offset, int count,
575 int *eof, void *data)
576{
577 struct net_device *dev = data;
578// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
579
580 int len = 0;
581 int i,n,page0,page1,page2;
582
583 int max=0xff;
584 page0 = 0x000;
585 page1 = 0x100;
586 page2 = 0x800;
587
588 /* This dump the current register page */
589 if(!IS_BB_REG_OFFSET_92S(page0)){
590 len += snprintf(page + len, count - len,
591 "\n####################page %x##################\n ", (page0>>8));
592 for(n=0;n<=max;)
593 {
594 len += snprintf(page + len, count - len,
595 "\nD: %2x > ",n);
596 for(i=0;i<16 && n<=max;i++,n++)
597 len += snprintf(page + len, count - len,
598 "%2.2x ",read_nic_byte(dev,(page0|n)));
599 }
600 }else{
601 len += snprintf(page + len, count - len,
602 "\n####################page %x##################\n ", (page0>>8));
603 for(n=0;n<=max;)
604 {
605 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
606 for(i=0;i<4 && n<=max;n+=4,i++)
607 len += snprintf(page + len, count - len,
608 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
609 }
610 }
611 len += snprintf(page + len, count - len,"\n");
612 *eof = 1;
613 return len;
614
615}
616static int proc_get_registers_1(char *page, char **start,
617 off_t offset, int count,
618 int *eof, void *data)
619{
620 struct net_device *dev = data;
621// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
622
623 int len = 0;
624 int i,n,page0;
625
626 int max=0xff;
627 page0 = 0x100;
628
629 /* This dump the current register page */
630 len += snprintf(page + len, count - len,
631 "\n####################page %x##################\n ", (page0>>8));
632 for(n=0;n<=max;)
633 {
634 len += snprintf(page + len, count - len,
635 "\nD: %2x > ",n);
636 for(i=0;i<16 && n<=max;i++,n++)
637 len += snprintf(page + len, count - len,
638 "%2.2x ",read_nic_byte(dev,(page0|n)));
639 }
640 len += snprintf(page + len, count - len,"\n");
641 *eof = 1;
642 return len;
643
644}
645static int proc_get_registers_2(char *page, char **start,
646 off_t offset, int count,
647 int *eof, void *data)
648{
649 struct net_device *dev = data;
650// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
651
652 int len = 0;
653 int i,n,page0;
654
655 int max=0xff;
656 page0 = 0x200;
657
658 /* This dump the current register page */
659 len += snprintf(page + len, count - len,
660 "\n####################page %x##################\n ", (page0>>8));
661 for(n=0;n<=max;)
662 {
663 len += snprintf(page + len, count - len,
664 "\nD: %2x > ",n);
665 for(i=0;i<16 && n<=max;i++,n++)
666 len += snprintf(page + len, count - len,
667 "%2.2x ",read_nic_byte(dev,(page0|n)));
668 }
669 len += snprintf(page + len, count - len,"\n");
670 *eof = 1;
671 return len;
672
673}
674static int proc_get_registers_8(char *page, char **start,
675 off_t offset, int count,
676 int *eof, void *data)
677{
678 struct net_device *dev = data;
679
680 int len = 0;
681 int i,n,page0;
682
683 int max=0xff;
684 page0 = 0x800;
685
686 /* This dump the current register page */
687 len += snprintf(page + len, count - len,
688 "\n####################page %x##################\n ", (page0>>8));
689 for(n=0;n<=max;)
690 {
691 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
692 for(i=0;i<4 && n<=max;n+=4,i++)
693 len += snprintf(page + len, count - len,
694 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
695 }
696 len += snprintf(page + len, count - len,"\n");
697 *eof = 1;
698 return len;
699
700 }
701static int proc_get_registers_9(char *page, char **start,
702 off_t offset, int count,
703 int *eof, void *data)
704{
705 struct net_device *dev = data;
706// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
707
708 int len = 0;
709 int i,n,page0;
710
711 int max=0xff;
712 page0 = 0x900;
713
714 /* This dump the current register page */
715 len += snprintf(page + len, count - len,
716 "\n####################page %x##################\n ", (page0>>8));
717 for(n=0;n<=max;)
718 {
719 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
720 for(i=0;i<4 && n<=max;n+=4,i++)
721 len += snprintf(page + len, count - len,
722 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
723 }
724 len += snprintf(page + len, count - len,"\n");
725 *eof = 1;
726 return len;
727}
728static int proc_get_registers_a(char *page, char **start,
729 off_t offset, int count,
730 int *eof, void *data)
731{
732 struct net_device *dev = data;
733// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
734
735 int len = 0;
736 int i,n,page0;
737
738 int max=0xff;
739 page0 = 0xa00;
740
741 /* This dump the current register page */
742 len += snprintf(page + len, count - len,
743 "\n####################page %x##################\n ", (page0>>8));
744 for(n=0;n<=max;)
745 {
746 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
747 for(i=0;i<4 && n<=max;n+=4,i++)
748 len += snprintf(page + len, count - len,
749 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
750 }
751 len += snprintf(page + len, count - len,"\n");
752 *eof = 1;
753 return len;
754}
755static int proc_get_registers_b(char *page, char **start,
756 off_t offset, int count,
757 int *eof, void *data)
758{
759 struct net_device *dev = data;
760// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
761
762 int len = 0;
763 int i,n,page0;
764
765 int max=0xff;
766 page0 = 0xb00;
767
768 /* This dump the current register page */
769 len += snprintf(page + len, count - len,
770 "\n####################page %x##################\n ", (page0>>8));
771 for(n=0;n<=max;)
772 {
773 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
774 for(i=0;i<4 && n<=max;n+=4,i++)
775 len += snprintf(page + len, count - len,
776 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
777 }
778 len += snprintf(page + len, count - len,"\n");
779 *eof = 1;
780 return len;
781 }
782static int proc_get_registers_c(char *page, char **start,
783 off_t offset, int count,
784 int *eof, void *data)
785{
786 struct net_device *dev = data;
787// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
788
789 int len = 0;
790 int i,n,page0;
791
792 int max=0xff;
793 page0 = 0xc00;
794
795 /* This dump the current register page */
796 len += snprintf(page + len, count - len,
797 "\n####################page %x##################\n ", (page0>>8));
798 for(n=0;n<=max;)
799 {
800 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
801 for(i=0;i<4 && n<=max;n+=4,i++)
802 len += snprintf(page + len, count - len,
803 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
804 }
805 len += snprintf(page + len, count - len,"\n");
806 *eof = 1;
807 return len;
808}
809static int proc_get_registers_d(char *page, char **start,
810 off_t offset, int count,
811 int *eof, void *data)
812{
813 struct net_device *dev = data;
814// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
815
816 int len = 0;
817 int i,n,page0;
818
819 int max=0xff;
820 page0 = 0xd00;
821
822 /* This dump the current register page */
823 len += snprintf(page + len, count - len,
824 "\n####################page %x##################\n ", (page0>>8));
825 for(n=0;n<=max;)
826 {
827 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
828 for(i=0;i<4 && n<=max;n+=4,i++)
829 len += snprintf(page + len, count - len,
830 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
831 }
832 len += snprintf(page + len, count - len,"\n");
833 *eof = 1;
834 return len;
835}
836static int proc_get_registers_e(char *page, char **start,
837 off_t offset, int count,
838 int *eof, void *data)
839{
840 struct net_device *dev = data;
841// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
842
843 int len = 0;
844 int i,n,page0;
845
846 int max=0xff;
847 page0 = 0xe00;
848
849 /* This dump the current register page */
850 len += snprintf(page + len, count - len,
851 "\n####################page %x##################\n ", (page0>>8));
852 for(n=0;n<=max;)
853 {
854 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
855 for(i=0;i<4 && n<=max;n+=4,i++)
856 len += snprintf(page + len, count - len,
857 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
858 }
859 len += snprintf(page + len, count - len,"\n");
860 *eof = 1;
861 return len;
862}
5f53d8ca 863
5f53d8ca
JC		 864static int proc_get_stats_tx(char *page, char **start,
865 off_t offset, int count,
866 int *eof, void *data)
867{
868 struct net_device *dev = data;
869 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
870
871 int len = 0;
872
873 len += snprintf(page + len, count - len,
874 "TX VI priority ok int: %lu\n"
875 "TX VI priority error int: %lu\n"
876 "TX VO priority ok int: %lu\n"
877 "TX VO priority error int: %lu\n"
878 "TX BE priority ok int: %lu\n"
879 "TX BE priority error int: %lu\n"
880 "TX BK priority ok int: %lu\n"
881 "TX BK priority error int: %lu\n"
882 "TX MANAGE priority ok int: %lu\n"
883 "TX MANAGE priority error int: %lu\n"
884 "TX BEACON priority ok int: %lu\n"
885 "TX BEACON priority error int: %lu\n"
886// "TX high priority ok int: %lu\n"
887// "TX high priority failed error int: %lu\n"
888 "TX queue resume: %lu\n"
889 "TX queue stopped?: %d\n"
890 "TX fifo overflow: %lu\n"
891// "TX beacon: %lu\n"
892 "TX VI queue: %d\n"
893 "TX VO queue: %d\n"
894 "TX BE queue: %d\n"
895 "TX BK queue: %d\n"
896// "TX HW queue: %d\n"
897 "TX VI dropped: %lu\n"
898 "TX VO dropped: %lu\n"
899 "TX BE dropped: %lu\n"
900 "TX BK dropped: %lu\n"
901 "TX total data packets %lu\n",
902// "TX beacon aborted: %lu\n",
903 priv->stats.txviokint,
904 priv->stats.txvierr,
905 priv->stats.txvookint,
906 priv->stats.txvoerr,
907 priv->stats.txbeokint,
908 priv->stats.txbeerr,
909 priv->stats.txbkokint,
910 priv->stats.txbkerr,
911 priv->stats.txmanageokint,
912 priv->stats.txmanageerr,
913 priv->stats.txbeaconokint,
914 priv->stats.txbeaconerr,
915// priv->stats.txhpokint,
916// priv->stats.txhperr,
917 priv->stats.txresumed,
918 netif_queue_stopped(dev),
919 priv->stats.txoverflow,
920// priv->stats.txbeacon,
921 atomic_read(&(priv->tx_pending[VI_PRIORITY])),
922 atomic_read(&(priv->tx_pending[VO_PRIORITY])),
923 atomic_read(&(priv->tx_pending[BE_PRIORITY])),
924 atomic_read(&(priv->tx_pending[BK_PRIORITY])),
925// read_nic_byte(dev, TXFIFOCOUNT),
926 priv->stats.txvidrop,
927 priv->stats.txvodrop,
928 priv->stats.txbedrop,
929 priv->stats.txbkdrop,
930 priv->stats.txdatapkt
931// priv->stats.txbeaconerr
932 );
933
934 *eof = 1;
935 return len;
936}
937
938
939
940static int proc_get_stats_rx(char *page, char **start,
941 off_t offset, int count,
942 int *eof, void *data)
943{
944 struct net_device *dev = data;
945 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
946
947 int len = 0;
948
949 len += snprintf(page + len, count - len,
950 "RX packets: %lu\n"
951 "RX urb status error: %lu\n"
952 "RX invalid urb error: %lu\n",
953 priv->stats.rxoktotal,
954 priv->stats.rxstaterr,
955 priv->stats.rxurberr);
956
957 *eof = 1;
958 return len;
959}
5f53d8ca 960
5f53d8ca
JC		 961void rtl8192_proc_module_init(void)
962{
963 RT_TRACE(COMP_INIT, "Initializing proc filesystem");
5f53d8ca 964 rtl8192_proc=create_proc_entry(RTL819xU_MODULE_NAME, S_IFDIR, init_net.proc_net);
5f53d8ca
JC		 965}
966
967
968void rtl8192_proc_module_remove(void)
969{
5f53d8ca 970 remove_proc_entry(RTL819xU_MODULE_NAME, init_net.proc_net);
5f53d8ca
JC		 971}
972
973
974void rtl8192_proc_remove_one(struct net_device *dev)
975{
976 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
977
978
979 if (priv->dir_dev) {
980 // remove_proc_entry("stats-hw", priv->dir_dev);
981 remove_proc_entry("stats-tx", priv->dir_dev);
982 remove_proc_entry("stats-rx", priv->dir_dev);
983 // remove_proc_entry("stats-ieee", priv->dir_dev);
984 remove_proc_entry("stats-ap", priv->dir_dev);
985 remove_proc_entry("registers", priv->dir_dev);
986 remove_proc_entry("registers-1", priv->dir_dev);
987 remove_proc_entry("registers-2", priv->dir_dev);
988 remove_proc_entry("registers-8", priv->dir_dev);
989 remove_proc_entry("registers-9", priv->dir_dev);
990 remove_proc_entry("registers-a", priv->dir_dev);
991 remove_proc_entry("registers-b", priv->dir_dev);
992 remove_proc_entry("registers-c", priv->dir_dev);
993 remove_proc_entry("registers-d", priv->dir_dev);
994 remove_proc_entry("registers-e", priv->dir_dev);
995 // remove_proc_entry("cck-registers",priv->dir_dev);
996 // remove_proc_entry("ofdm-registers",priv->dir_dev);
997 //remove_proc_entry(dev->name, rtl8192_proc);
998 remove_proc_entry("wlan0", rtl8192_proc);
999 priv->dir_dev = NULL;
1000 }
1001}
1002
1003
1004void rtl8192_proc_init_one(struct net_device *dev)
1005{
1006 struct proc_dir_entry *e;
1007 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1008 priv->dir_dev = create_proc_entry(dev->name,
1009 S_IFDIR | S_IRUGO | S_IXUGO,
1010 rtl8192_proc);
1011 if (!priv->dir_dev) {
1012 RT_TRACE(COMP_ERR, "Unable to initialize /proc/net/rtl8192/%s\n",
1013 dev->name);
1014 return;
1015 }
5f53d8ca
JC		 1016 e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
1017 priv->dir_dev, proc_get_stats_rx, dev);
1018
1019 if (!e) {
1020 RT_TRACE(COMP_ERR,"Unable to initialize "
1021 "/proc/net/rtl8192/%s/stats-rx\n",
1022 dev->name);
1023 }
1024
1025
1026 e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO,
1027 priv->dir_dev, proc_get_stats_tx, dev);
1028
1029 if (!e) {
1030 RT_TRACE(COMP_ERR, "Unable to initialize "
1031 "/proc/net/rtl8192/%s/stats-tx\n",
1032 dev->name);
1033 }
5f53d8ca
JC		 1034
1035 e = create_proc_read_entry("stats-ap", S_IFREG | S_IRUGO,
1036 priv->dir_dev, proc_get_stats_ap, dev);
1037
1038 if (!e) {
1039 RT_TRACE(COMP_ERR, "Unable to initialize "
1040 "/proc/net/rtl8192/%s/stats-ap\n",
1041 dev->name);
1042 }
1043
1044 e = create_proc_read_entry("registers", S_IFREG | S_IRUGO,
1045 priv->dir_dev, proc_get_registers, dev);
1046 if (!e) {
1047 RT_TRACE(COMP_ERR, "Unable to initialize "
1048 "/proc/net/rtl8192/%s/registers\n",
1049 dev->name);
1050 }
5f53d8ca
JC		 1051 e = create_proc_read_entry("registers-1", S_IFREG | S_IRUGO,
1052 priv->dir_dev, proc_get_registers_1, dev);
1053 if (!e) {
1054 RT_TRACE(COMP_ERR, "Unable to initialize "
1055 "/proc/net/rtl8192/%s/registers-1\n",
1056 dev->name);
1057 }
1058 e = create_proc_read_entry("registers-2", S_IFREG | S_IRUGO,
1059 priv->dir_dev, proc_get_registers_2, dev);
1060 if (!e) {
1061 RT_TRACE(COMP_ERR, "Unable to initialize "
1062 "/proc/net/rtl8192/%s/registers-2\n",
1063 dev->name);
1064 }
1065 e = create_proc_read_entry("registers-8", S_IFREG | S_IRUGO,
1066 priv->dir_dev, proc_get_registers_8, dev);
1067 if (!e) {
1068 RT_TRACE(COMP_ERR, "Unable to initialize "
1069 "/proc/net/rtl8192/%s/registers-8\n",
1070 dev->name);
1071 }
1072 e = create_proc_read_entry("registers-9", S_IFREG | S_IRUGO,
1073 priv->dir_dev, proc_get_registers_9, dev);
1074 if (!e) {
1075 RT_TRACE(COMP_ERR, "Unable to initialize "
1076 "/proc/net/rtl8192/%s/registers-9\n",
1077 dev->name);
1078 }
1079 e = create_proc_read_entry("registers-a", S_IFREG | S_IRUGO,
1080 priv->dir_dev, proc_get_registers_a, dev);
1081 if (!e) {
1082 RT_TRACE(COMP_ERR, "Unable to initialize "
1083 "/proc/net/rtl8192/%s/registers-a\n",
1084 dev->name);
1085 }
1086 e = create_proc_read_entry("registers-b", S_IFREG | S_IRUGO,
1087 priv->dir_dev, proc_get_registers_b, dev);
1088 if (!e) {
1089 RT_TRACE(COMP_ERR, "Unable to initialize "
1090 "/proc/net/rtl8192/%s/registers-b\n",
1091 dev->name);
1092 }
1093 e = create_proc_read_entry("registers-c", S_IFREG | S_IRUGO,
1094 priv->dir_dev, proc_get_registers_c, dev);
1095 if (!e) {
1096 RT_TRACE(COMP_ERR, "Unable to initialize "
1097 "/proc/net/rtl8192/%s/registers-c\n",
1098 dev->name);
1099 }
1100 e = create_proc_read_entry("registers-d", S_IFREG | S_IRUGO,
1101 priv->dir_dev, proc_get_registers_d, dev);
1102 if (!e) {
1103 RT_TRACE(COMP_ERR, "Unable to initialize "
1104 "/proc/net/rtl8192/%s/registers-d\n",
1105 dev->name);
1106 }
1107 e = create_proc_read_entry("registers-e", S_IFREG | S_IRUGO,
1108 priv->dir_dev, proc_get_registers_e, dev);
1109 if (!e) {
1110 RT_TRACE(COMP_ERR, "Unable to initialize "
1111 "/proc/net/rtl8192/%s/registers-e\n",
1112 dev->name);
1113 }
5f53d8ca
JC		 1114}
1115/****************************************************************************
1116 -----------------------------MISC STUFF-------------------------
1117*****************************************************************************/
1118
1119/* this is only for debugging */
1120void print_buffer(u32 *buffer, int len)
1121{
1122 int i;
1123 u8 *buf =(u8*)buffer;
1124
1125 printk("ASCII BUFFER DUMP (len: %x):\n",len);
1126
1127 for(i=0;i<len;i++)
1128 printk("%c",buf[i]);
1129
1130 printk("\nBINARY BUFFER DUMP (len: %x):\n",len);
1131
1132 for(i=0;i<len;i++)
1133 printk("%x",buf[i]);
1134
1135 printk("\n");
1136}
1137
1138//short check_nic_enough_desc(struct net_device *dev, priority_t priority)
1139short check_nic_enough_desc(struct net_device *dev,int queue_index)
1140{
1141 struct r8192_priv *priv = ieee80211_priv(dev);
1142 int used = atomic_read(&priv->tx_pending[queue_index]);
1143
1144 return (used < MAX_TX_URB);
1145}
1146
1147void tx_timeout(struct net_device *dev)
1148{
1149 struct r8192_priv *priv = ieee80211_priv(dev);
1150 //rtl8192_commit(dev);
1151
5f53d8ca 1152 schedule_work(&priv->reset_wq);
5f53d8ca
JC		 1153 //DMESG("TXTIMEOUT");
1154}
1155
1156
1157/* this is only for debug */
1158void dump_eprom(struct net_device *dev)
1159{
1160 int i;
1161 for(i=0; i<63; i++)
1162 RT_TRACE(COMP_EPROM, "EEPROM addr %x : %x", i, eprom_read(dev,i));
1163}
1164
1165/* this is only for debug */
1166void rtl8192_dump_reg(struct net_device *dev)
1167{
1168 int i;
1169 int n;
1170 int max=0x1ff;
1171
1172 RT_TRACE(COMP_PHY, "Dumping NIC register map");
1173
1174 for(n=0;n<=max;)
1175 {
1176 printk( "\nD: %2x> ", n);
1177 for(i=0;i<16 && n<=max;i++,n++)
1178 printk("%2x ",read_nic_byte(dev,n));
1179 }
1180 printk("\n");
1181}
1182
1183/****************************************************************************
1184 ------------------------------HW STUFF---------------------------
1185*****************************************************************************/
1186
5f53d8ca
JC		 1187void rtl8192_set_mode(struct net_device *dev,int mode)
1188{
1189 u8 ecmd;
1190 ecmd=read_nic_byte(dev, EPROM_CMD);
1191 ecmd=ecmd &~ EPROM_CMD_OPERATING_MODE_MASK;
1192 ecmd=ecmd | (mode<<EPROM_CMD_OPERATING_MODE_SHIFT);
1193 ecmd=ecmd &~ (1<<EPROM_CS_SHIFT);
1194 ecmd=ecmd &~ (1<<EPROM_CK_SHIFT);
1195 write_nic_byte(dev, EPROM_CMD, ecmd);
1196}
1197
1198
1199void rtl8192_update_msr(struct net_device *dev)
1200{
1201 struct r8192_priv *priv = ieee80211_priv(dev);
1202 u8 msr;
1203
1204 msr = read_nic_byte(dev, MSR);
1205 msr &= ~ MSR_LINK_MASK;
1206
1207 /* do not change in link_state != WLAN_LINK_ASSOCIATED.
1208 * msr must be updated if the state is ASSOCIATING.
1209 * this is intentional and make sense for ad-hoc and
1210 * master (see the create BSS/IBSS func)
1211 */
1212 if (priv->ieee80211->state == IEEE80211_LINKED){
1213
1214 if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
1215 msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
1216 else if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
1217 msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
1218 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
1219 msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
1220
1221 }else
1222 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
1223
1224 write_nic_byte(dev, MSR, msr);
1225}
1226
1227void rtl8192_set_chan(struct net_device *dev,short ch)
1228{
1229 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1230// u32 tx;
1231 RT_TRACE(COMP_CH, "=====>%s()====ch:%d\n", __FUNCTION__, ch);
1232 //printk("=====>%s()====ch:%d\n", __FUNCTION__, ch);
1233 priv->chan=ch;
5f53d8ca
JC		 1234
1235 /* this hack should avoid frame TX during channel setting*/
1236
1237
1238// tx = read_nic_dword(dev,TX_CONF);
1239// tx &= ~TX_LOOPBACK_MASK;
1240
1241#ifndef LOOP_TEST
1242// write_nic_dword(dev,TX_CONF, tx |( TX_LOOPBACK_MAC<<TX_LOOPBACK_SHIFT));
1243
1244 //need to implement rf set channel here WB
1245
1246 if (priv->rf_set_chan)
1247 priv->rf_set_chan(dev,priv->chan);
1248 mdelay(10);
1249// write_nic_dword(dev,TX_CONF,tx | (TX_LOOPBACK_NONE<<TX_LOOPBACK_SHIFT));
1250#endif
1251}
1252
5f53d8ca 1253static void rtl8192_rx_isr(struct urb *urb);
5f53d8ca
JC		 1254
1255u32 get_rxpacket_shiftbytes_819xusb(struct ieee80211_rx_stats *pstats)
1256{
1257
5f53d8ca
JC		 1258 return (sizeof(rx_desc_819x_usb) + pstats->RxDrvInfoSize
1259 + pstats->RxBufShift);
1260
1261}
1262static int rtl8192_rx_initiate(struct net_device*dev)
1263{
1264 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1265 struct urb *entry;
1266 struct sk_buff *skb;
1267 struct rtl8192_rx_info *info;
1268
1269 /* nomal packet rx procedure */
1270 while (skb_queue_len(&priv->rx_queue) < MAX_RX_URB) {
1271 skb = __dev_alloc_skb(RX_URB_SIZE, GFP_KERNEL);
1272 if (!skb)
1273 break;
5f53d8ca 1274 entry = usb_alloc_urb(0, GFP_KERNEL);
5f53d8ca
JC		 1275 if (!entry) {
1276 kfree_skb(skb);
1277 break;
1278 }
1279// printk("nomal packet IN request!\n");
1280 usb_fill_bulk_urb(entry, priv->udev,
8109c2fd 1281 usb_rcvbulkpipe(priv->udev, 3), skb_tail_pointer(skb),
5f53d8ca
JC		 1282 RX_URB_SIZE, rtl8192_rx_isr, skb);
1283 info = (struct rtl8192_rx_info *) skb->cb;
1284 info->urb = entry;
1285 info->dev = dev;
1286 info->out_pipe = 3; //denote rx normal packet queue
1287 skb_queue_tail(&priv->rx_queue, skb);
5f53d8ca 1288 usb_submit_urb(entry, GFP_KERNEL);
5f53d8ca
JC		 1289 }
1290
1291 /* command packet rx procedure */
1292 while (skb_queue_len(&priv->rx_queue) < MAX_RX_URB + 3) {
1293// printk("command packet IN request!\n");
1294 skb = __dev_alloc_skb(RX_URB_SIZE ,GFP_KERNEL);
1295 if (!skb)
1296 break;
5f53d8ca 1297 entry = usb_alloc_urb(0, GFP_KERNEL);
5f53d8ca
JC		 1298 if (!entry) {
1299 kfree_skb(skb);
1300 break;
1301 }
1302 usb_fill_bulk_urb(entry, priv->udev,
8109c2fd 1303 usb_rcvbulkpipe(priv->udev, 9), skb_tail_pointer(skb),
5f53d8ca
JC		 1304 RX_URB_SIZE, rtl8192_rx_isr, skb);
1305 info = (struct rtl8192_rx_info *) skb->cb;
1306 info->urb = entry;
1307 info->dev = dev;
1308 info->out_pipe = 9; //denote rx cmd packet queue
1309 skb_queue_tail(&priv->rx_queue, skb);
5f53d8ca 1310 usb_submit_urb(entry, GFP_KERNEL);
5f53d8ca
JC		 1311 }
1312
1313 return 0;
1314}
1315
1316void rtl8192_set_rxconf(struct net_device *dev)
1317{
1318 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1319 u32 rxconf;
1320
1321 rxconf=read_nic_dword(dev,RCR);
1322 rxconf = rxconf &~ MAC_FILTER_MASK;
1323 rxconf = rxconf | RCR_AMF;
1324 rxconf = rxconf | RCR_ADF;
1325 rxconf = rxconf | RCR_AB;
1326 rxconf = rxconf | RCR_AM;
1327 //rxconf = rxconf | RCR_ACF;
1328
1329 if (dev->flags & IFF_PROMISC) {DMESG ("NIC in promisc mode");}
1330
1331 if(priv->ieee80211->iw_mode == IW_MODE_MONITOR || \
1332 dev->flags & IFF_PROMISC){
1333 rxconf = rxconf | RCR_AAP;
1334 } /*else if(priv->ieee80211->iw_mode == IW_MODE_MASTER){
1335 rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT);
1336 rxconf = rxconf | (1<<RX_CHECK_BSSID_SHIFT);
1337 }*/else{
1338 rxconf = rxconf | RCR_APM;
1339 rxconf = rxconf | RCR_CBSSID;
1340 }
1341
1342
1343 if(priv->ieee80211->iw_mode == IW_MODE_MONITOR){
1344 rxconf = rxconf | RCR_AICV;
1345 rxconf = rxconf | RCR_APWRMGT;
1346 }
1347
1348 if( priv->crcmon == 1 && priv->ieee80211->iw_mode == IW_MODE_MONITOR)
1349 rxconf = rxconf | RCR_ACRC32;
1350
1351
1352 rxconf = rxconf &~ RX_FIFO_THRESHOLD_MASK;
1353 rxconf = rxconf | (RX_FIFO_THRESHOLD_NONE<<RX_FIFO_THRESHOLD_SHIFT);
1354 rxconf = rxconf &~ MAX_RX_DMA_MASK;
1355 rxconf = rxconf | ((u32)7<<RCR_MXDMA_OFFSET);
1356
1357// rxconf = rxconf | (1<<RX_AUTORESETPHY_SHIFT);
1358 rxconf = rxconf | RCR_ONLYERLPKT;
1359
1360// rxconf = rxconf &~ RCR_CS_MASK;
1361// rxconf = rxconf | (1<<RCR_CS_SHIFT);
1362
1363 write_nic_dword(dev, RCR, rxconf);
1364
1365 #ifdef DEBUG_RX
1366 DMESG("rxconf: %x %x",rxconf ,read_nic_dword(dev,RCR));
1367 #endif
1368}
1369//wait to be removed
1370void rtl8192_rx_enable(struct net_device *dev)
1371{
1372 //u8 cmd;
1373
1374 //struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1375
1376 rtl8192_rx_initiate(dev);
1377
1378// rtl8192_set_rxconf(dev);
5f53d8ca
JC		 1379}
1380
1381
1382void rtl8192_tx_enable(struct net_device *dev)
1383{
5f53d8ca
JC		 1384}
1385
5f53d8ca
JC		 1386void rtl8192_rtx_disable(struct net_device *dev)
1387{
1388 u8 cmd;
1389 struct r8192_priv *priv = ieee80211_priv(dev);
1390 struct sk_buff *skb;
1391 struct rtl8192_rx_info *info;
1392
1393 cmd=read_nic_byte(dev,CMDR);
1394 write_nic_byte(dev, CMDR, cmd &~ \
1395 (CR_TE|CR_RE));
1396 force_pci_posting(dev);
1397 mdelay(10);
1398
1399 while ((skb = __skb_dequeue(&priv->rx_queue))) {
1400 info = (struct rtl8192_rx_info *) skb->cb;
1401 if (!info->urb)
1402 continue;
1403
1404 usb_kill_urb(info->urb);
1405 kfree_skb(skb);
1406 }
1407
1408 if (skb_queue_len(&priv->skb_queue)) {
1409 printk(KERN_WARNING "skb_queue not empty\n");
1410 }
1411
1412 skb_queue_purge(&priv->skb_queue);
1413 return;
1414}
1415
1416
1417int alloc_tx_beacon_desc_ring(struct net_device *dev, int count)
1418{
5f53d8ca
JC		 1419 return 0;
1420}
1421
5f53d8ca
JC		 1422inline u16 ieeerate2rtlrate(int rate)
1423{
1424 switch(rate){
1425 case 10:
1426 return 0;
1427 case 20:
1428 return 1;
1429 case 55:
1430 return 2;
1431 case 110:
1432 return 3;
1433 case 60:
1434 return 4;
1435 case 90:
1436 return 5;
1437 case 120:
1438 return 6;
1439 case 180:
1440 return 7;
1441 case 240:
1442 return 8;
1443 case 360:
1444 return 9;
1445 case 480:
1446 return 10;
1447 case 540:
1448 return 11;
1449 default:
1450 return 3;
1451
1452 }
1453}
1454static u16 rtl_rate[] = {10,20,55,110,60,90,120,180,240,360,480,540};
1455inline u16 rtl8192_rate2rate(short rate)
1456{
1457 if (rate >11) return 0;
1458 return rtl_rate[rate];
1459}
1460
5f53d8ca 1461static void rtl8192_rx_isr(struct urb *urb)
5f53d8ca
JC		 1462{
1463 struct sk_buff *skb = (struct sk_buff *) urb->context;
1464 struct rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
1465 struct net_device *dev = info->dev;
1466 struct r8192_priv *priv = ieee80211_priv(dev);
1467 int out_pipe = info->out_pipe;
1468 int err;
1469 if(!priv->up)
1470 return;
1471 if (unlikely(urb->status)) {
1472 info->urb = NULL;
1473 priv->stats.rxstaterr++;
1474 priv->ieee80211->stats.rx_errors++;
1475 usb_free_urb(urb);
1476 // printk("%s():rx status err\n",__FUNCTION__);
1477 return;
1478 }
1ec9e48d 1479
5f53d8ca 1480 skb_unlink(skb, &priv->rx_queue);
5f53d8ca
JC		 1481 skb_put(skb, urb->actual_length);
1482
1483 skb_queue_tail(&priv->skb_queue, skb);
1484 tasklet_schedule(&priv->irq_rx_tasklet);
1485
1486 skb = dev_alloc_skb(RX_URB_SIZE);
1487 if (unlikely(!skb)) {
1488 usb_free_urb(urb);
1489 printk("%s():can,t alloc skb\n",__FUNCTION__);
1490 /* TODO check rx queue length and refill *somewhere* */
1491 return;
1492 }
1493
1494 usb_fill_bulk_urb(urb, priv->udev,
8109c2fd
JM		 1495 usb_rcvbulkpipe(priv->udev, out_pipe),
1496 skb_tail_pointer(skb),
5f53d8ca
JC		 1497 RX_URB_SIZE, rtl8192_rx_isr, skb);
1498
1499 info = (struct rtl8192_rx_info *) skb->cb;
1500 info->urb = urb;
1501 info->dev = dev;
1502 info->out_pipe = out_pipe;
1503
8109c2fd 1504 urb->transfer_buffer = skb_tail_pointer(skb);
5f53d8ca
JC		 1505 urb->context = skb;
1506 skb_queue_tail(&priv->rx_queue, skb);
5f53d8ca 1507 err = usb_submit_urb(urb, GFP_ATOMIC);
aad445f8 1508 if(err && err != -EPERM)
5f53d8ca
JC		 1509 printk("can not submit rxurb, err is %x,URB status is %x\n",err,urb->status);
1510}
1511
1512u32
1513rtl819xusb_rx_command_packet(
1514 struct net_device *dev,
1515 struct ieee80211_rx_stats *pstats
1516 )
1517{
1518 u32 status;
1519
1520 //RT_TRACE(COMP_RECV, DBG_TRACE, ("---> RxCommandPacketHandle819xUsb()\n"));
1521
1522 status = cmpk_message_handle_rx(dev, pstats);
1523 if (status)
1524 {
1525 DMESG("rxcommandpackethandle819xusb: It is a command packet\n");
1526 }
1527 else
1528 {
1529 //RT_TRACE(COMP_RECV, DBG_TRACE, ("RxCommandPacketHandle819xUsb: It is not a command packet\n"));
1530 }
1531
1532 //RT_TRACE(COMP_RECV, DBG_TRACE, ("<--- RxCommandPacketHandle819xUsb()\n"));
1533 return status;
1534}
1535
5f53d8ca
JC		 1536void rtl8192_data_hard_stop(struct net_device *dev)
1537{
1538 //FIXME !!
5f53d8ca
JC		 1539}
1540
1541
1542void rtl8192_data_hard_resume(struct net_device *dev)
1543{
1544 // FIXME !!
5f53d8ca
JC		 1545}
1546
1547/* this function TX data frames when the ieee80211 stack requires this.
1548 * It checks also if we need to stop the ieee tx queue, eventually do it
1549 */
1550void rtl8192_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, int rate)
1551{
1552 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1553 int ret;
1554 unsigned long flags;
1555 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1556 u8 queue_index = tcb_desc->queue_index;
1557
1558 /* shall not be referred by command packet */
1559 assert(queue_index != TXCMD_QUEUE);
1560
1561 spin_lock_irqsave(&priv->tx_lock,flags);
1562
1563 memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev));
1564// tcb_desc->RATRIndex = 7;
1565// tcb_desc->bTxDisableRateFallBack = 1;
1566// tcb_desc->bTxUseDriverAssingedRate = 1;
1567 tcb_desc->bTxEnableFwCalcDur = 1;
1568 skb_push(skb, priv->ieee80211->tx_headroom);
1569 ret = priv->ops->rtl819x_tx(dev, skb);
1570
1571 //priv->ieee80211->stats.tx_bytes+=(skb->len - priv->ieee80211->tx_headroom);
1572 //priv->ieee80211->stats.tx_packets++;
1573
1574 spin_unlock_irqrestore(&priv->tx_lock,flags);
1575
1576// return ret;
1577 return;
1578}
1579
1580/* This is a rough attempt to TX a frame
1581 * This is called by the ieee 80211 stack to TX management frames.
1582 * If the ring is full packet are dropped (for data frame the queue
1583 * is stopped before this can happen).
1584 */
1585int rtl8192_hard_start_xmit(struct sk_buff *skb,struct net_device *dev)
1586{
1587 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1588 int ret;
1589 unsigned long flags;
1590 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1591 u8 queue_index = tcb_desc->queue_index;
1592
1593
1594 spin_lock_irqsave(&priv->tx_lock,flags);
1595
1596 memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev));
1597 if(queue_index == TXCMD_QUEUE) {
1598 skb_push(skb, USB_HWDESC_HEADER_LEN);
1599 priv->ops->rtl819x_tx_cmd(dev, skb);
1600 ret = 1;
1601 spin_unlock_irqrestore(&priv->tx_lock,flags);
1602 return ret;
1603 } else {
1604 skb_push(skb, priv->ieee80211->tx_headroom);
1605 ret = priv->ops->rtl819x_tx(dev, skb);
1606 }
1607
1608 spin_unlock_irqrestore(&priv->tx_lock,flags);
1609
1610 return ret;
1611}
1612
1613
1614void rtl8192_try_wake_queue(struct net_device *dev, int pri);
1615
5f53d8ca 1616
5f53d8ca 1617static void rtl8192_tx_isr(struct urb *tx_urb)
5f53d8ca
JC		 1618{
1619 struct sk_buff *skb = (struct sk_buff*)tx_urb->context;
1620 struct net_device *dev = NULL;
1621 struct r8192_priv *priv = NULL;
1622 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1623 u8 queue_index = tcb_desc->queue_index;
1624// bool bToSend0Byte;
1625// u16 BufLen = skb->len;
1626
1627 memcpy(&dev,(struct net_device*)(skb->cb),sizeof(struct net_device*));
1628 priv = ieee80211_priv(dev);
1629
1630 if(tcb_desc->queue_index != TXCMD_QUEUE) {
1631 if(tx_urb->status == 0) {
1632 // dev->trans_start = jiffies;
1633 // As act as station mode, destion shall be unicast address.
1634 //priv->ieee80211->stats.tx_bytes+=(skb->len - priv->ieee80211->tx_headroom);
1635 //priv->ieee80211->stats.tx_packets++;
1636 priv->stats.txoktotal++;
1637 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
1638 priv->stats.txbytesunicast += (skb->len - priv->ieee80211->tx_headroom);
1639 } else {
1640 priv->ieee80211->stats.tx_errors++;
1641 //priv->stats.txmanageerr++;
1642 /* TODO */
1643 }
1644 }
1645
1646 /* free skb and tx_urb */
1647 if(skb != NULL) {
1648 dev_kfree_skb_any(skb);
1649 usb_free_urb(tx_urb);
1650 atomic_dec(&priv->tx_pending[queue_index]);
1651 }
1652
5f53d8ca
JC		 1653 {
1654 //
1655 // Handle HW Beacon:
1656 // We had transfer our beacon frame to host controler at this moment.
1657 //
5f53d8ca
JC		 1658 //
1659 // Caution:
1660 // Handling the wait queue of command packets.
1661 // For Tx command packets, we must not do TCB fragment because it is not handled right now.
1662 // We must cut the packets to match the size of TX_CMD_PKT before we send it.
1663 //
1664 if (queue_index == MGNT_QUEUE){
1665 if (priv->ieee80211->ack_tx_to_ieee){
1666 if (rtl8192_is_tx_queue_empty(dev)){
1667 priv->ieee80211->ack_tx_to_ieee = 0;
1668 ieee80211_ps_tx_ack(priv->ieee80211, 1);
1669 }
1670 }
1671 }
1672 /* Handle MPDU in wait queue. */
1673 if(queue_index != BEACON_QUEUE) {
1674 /* Don't send data frame during scanning.*/
1675 if((skb_queue_len(&priv->ieee80211->skb_waitQ[queue_index]) != 0)&&\
1676 (!(priv->ieee80211->queue_stop))) {
1677 if(NULL != (skb = skb_dequeue(&(priv->ieee80211->skb_waitQ[queue_index]))))
1678 priv->ieee80211->softmac_hard_start_xmit(skb, dev);
1679
1680 return; //modified by david to avoid further processing AMSDU
1681 }
5f53d8ca
JC		 1682 }
1683 }
5f53d8ca
JC		 1684}
1685
1686void rtl8192_beacon_stop(struct net_device *dev)
1687{
1688 u8 msr, msrm, msr2;
1689 struct r8192_priv *priv = ieee80211_priv(dev);
1690
1691 msr = read_nic_byte(dev, MSR);
1692 msrm = msr & MSR_LINK_MASK;
1693 msr2 = msr & ~MSR_LINK_MASK;
1694
1695 if(NIC_8192U == priv->card_8192) {
1696 usb_kill_urb(priv->rx_urb[MAX_RX_URB]);
1697 }
1698 if ((msrm == (MSR_LINK_ADHOC<<MSR_LINK_SHIFT) ||
1699 (msrm == (MSR_LINK_MASTER<<MSR_LINK_SHIFT)))){
1700 write_nic_byte(dev, MSR, msr2 | MSR_LINK_NONE);
1701 write_nic_byte(dev, MSR, msr);
1702 }
1703}
1704
1705void rtl8192_config_rate(struct net_device* dev, u16* rate_config)
1706{
1707 struct r8192_priv *priv = ieee80211_priv(dev);
1708 struct ieee80211_network *net;
1709 u8 i=0, basic_rate = 0;
1710 net = & priv->ieee80211->current_network;
1711
1712 for (i=0; i<net->rates_len; i++)
1713 {
1714 basic_rate = net->rates[i]&0x7f;
1715 switch(basic_rate)
1716 {
1717 case MGN_1M: *rate_config |= RRSR_1M; break;
1718 case MGN_2M: *rate_config |= RRSR_2M; break;
1719 case MGN_5_5M: *rate_config |= RRSR_5_5M; break;
1720 case MGN_11M: *rate_config |= RRSR_11M; break;
1721 case MGN_6M: *rate_config |= RRSR_6M; break;
1722 case MGN_9M: *rate_config |= RRSR_9M; break;
1723 case MGN_12M: *rate_config |= RRSR_12M; break;
1724 case MGN_18M: *rate_config |= RRSR_18M; break;
1725 case MGN_24M: *rate_config |= RRSR_24M; break;
1726 case MGN_36M: *rate_config |= RRSR_36M; break;
1727 case MGN_48M: *rate_config |= RRSR_48M; break;
1728 case MGN_54M: *rate_config |= RRSR_54M; break;
1729 }
1730 }
1731 for (i=0; i<net->rates_ex_len; i++)
1732 {
1733 basic_rate = net->rates_ex[i]&0x7f;
1734 switch(basic_rate)
1735 {
1736 case MGN_1M: *rate_config |= RRSR_1M; break;
1737 case MGN_2M: *rate_config |= RRSR_2M; break;
1738 case MGN_5_5M: *rate_config |= RRSR_5_5M; break;
1739 case MGN_11M: *rate_config |= RRSR_11M; break;
1740 case MGN_6M: *rate_config |= RRSR_6M; break;
1741 case MGN_9M: *rate_config |= RRSR_9M; break;
1742 case MGN_12M: *rate_config |= RRSR_12M; break;
1743 case MGN_18M: *rate_config |= RRSR_18M; break;
1744 case MGN_24M: *rate_config |= RRSR_24M; break;
1745 case MGN_36M: *rate_config |= RRSR_36M; break;
1746 case MGN_48M: *rate_config |= RRSR_48M; break;
1747 case MGN_54M: *rate_config |= RRSR_54M; break;
1748 }
1749 }
1750}
1751
1752
1753#define SHORT_SLOT_TIME 9
1754#define NON_SHORT_SLOT_TIME 20
1755
1756void rtl8192_update_cap(struct net_device* dev, u16 cap)
1757{
1758 //u32 tmp = 0;
1759 struct r8192_priv *priv = ieee80211_priv(dev);
1760 struct ieee80211_network *net = &priv->ieee80211->current_network;
1761 priv->short_preamble = cap & WLAN_CAPABILITY_SHORT_PREAMBLE;
1762
1763 //LZM MOD 090303 HW_VAR_ACK_PREAMBLE
5f53d8ca
JC		 1764 if(0)
1765 {
1766 u8 tmp = 0;
1767 tmp = ((priv->nCur40MhzPrimeSC) << 5);
1768 if (priv->short_preamble)
1769 tmp |= 0x80;
1770 write_nic_byte(dev, RRSR+2, tmp);
1771 }
5f53d8ca
JC		 1772
1773 if (net->mode & (IEEE_G|IEEE_N_24G))
1774 {
1775 u8 slot_time = 0;
1776 if ((cap & WLAN_CAPABILITY_SHORT_SLOT)&&(!priv->ieee80211->pHTInfo->bCurrentRT2RTLongSlotTime))
1777 {//short slot time
1778 slot_time = SHORT_SLOT_TIME;
1779 }
1780 else //long slot time
1781 slot_time = NON_SHORT_SLOT_TIME;
1782 priv->slot_time = slot_time;
1783 write_nic_byte(dev, SLOT_TIME, slot_time);
1784 }
1785
1786}
1787void rtl8192_net_update(struct net_device *dev)
1788{
1789
1790 struct r8192_priv *priv = ieee80211_priv(dev);
1791 struct ieee80211_network *net;
1792 u16 BcnTimeCfg = 0, BcnCW = 6, BcnIFS = 0xf;
1793 u16 rate_config = 0;
1794 net = & priv->ieee80211->current_network;
1795
1796 rtl8192_config_rate(dev, &rate_config);
1797 priv->basic_rate = rate_config &= 0x15f;
1798
1799 write_nic_dword(dev,BSSIDR,((u32*)net->bssid)[0]);
1800 write_nic_word(dev,BSSIDR+4,((u16*)net->bssid)[2]);
1801 //for(i=0;i<ETH_ALEN;i++)
1802 // write_nic_byte(dev,BSSID+i,net->bssid[i]);
1803
1804 rtl8192_update_msr(dev);
1805// rtl8192_update_cap(dev, net->capability);
1806 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
1807 {
1808 write_nic_word(dev, ATIMWND, 2);
1809 write_nic_word(dev, BCN_DMATIME, 1023);
1810 write_nic_word(dev, BCN_INTERVAL, net->beacon_interval);
1811// write_nic_word(dev, BcnIntTime, 100);
1812 write_nic_word(dev, BCN_DRV_EARLY_INT, 1);
1813 write_nic_byte(dev, BCN_ERR_THRESH, 100);
1814 BcnTimeCfg |= (BcnCW<<BCN_TCFG_CW_SHIFT);
1815 // TODO: BcnIFS may required to be changed on ASIC
1816 BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
1817
1818 write_nic_word(dev, BCN_TCFG, BcnTimeCfg);
1819 }
1820
1821
1822
1823}
1824
1825//temporary hw beacon is not used any more.
1826//open it when necessary
1827#if 1
1828void rtl819xusb_beacon_tx(struct net_device *dev,u16 tx_rate)
1829{
5f53d8ca
JC		 1830}
1831#endif
1832inline u8 rtl8192_IsWirelessBMode(u16 rate)
1833{
1834 if( ((rate <= 110) && (rate != 60) && (rate != 90)) || (rate == 220) )
1835 return 1;
1836 else return 0;
1837}
1838
1839u16 N_DBPSOfRate(u16 DataRate);
1840
1841u16 ComputeTxTime(
1842 u16 FrameLength,
1843 u16 DataRate,
1844 u8 bManagementFrame,
1845 u8 bShortPreamble
1846)
1847{
1848 u16 FrameTime;
1849 u16 N_DBPS;
1850 u16 Ceiling;
1851
1852 if( rtl8192_IsWirelessBMode(DataRate) )
1853 {
1854 if( bManagementFrame || !bShortPreamble || DataRate == 10 )
1855 { // long preamble
1856 FrameTime = (u16)(144+48+(FrameLength*8/(DataRate/10)));
1857 }
1858 else
1859 { // Short preamble
1860 FrameTime = (u16)(72+24+(FrameLength*8/(DataRate/10)));
1861 }
1862 if( ( FrameLength*8 % (DataRate/10) ) != 0 ) //Get the Ceilling
1863 FrameTime ++;
1864 } else { //802.11g DSSS-OFDM PLCP length field calculation.
1865 N_DBPS = N_DBPSOfRate(DataRate);
1866 Ceiling = (16 + 8*FrameLength + 6) / N_DBPS
1867 + (((16 + 8*FrameLength + 6) % N_DBPS) ? 1 : 0);
1868 FrameTime = (u16)(16 + 4 + 4*Ceiling + 6);
1869 }
1870 return FrameTime;
1871}
1872
1873u16 N_DBPSOfRate(u16 DataRate)
1874{
1875 u16 N_DBPS = 24;
1876
1877 switch(DataRate)
1878 {
1879 case 60:
1880 N_DBPS = 24;
1881 break;
1882
1883 case 90:
1884 N_DBPS = 36;
1885 break;
1886
1887 case 120:
1888 N_DBPS = 48;
1889 break;
1890
1891 case 180:
1892 N_DBPS = 72;
1893 break;
1894
1895 case 240:
1896 N_DBPS = 96;
1897 break;
1898
1899 case 360:
1900 N_DBPS = 144;
1901 break;
1902
1903 case 480:
1904 N_DBPS = 192;
1905 break;
1906
1907 case 540:
1908 N_DBPS = 216;
1909 break;
1910
1911 default:
1912 break;
1913 }
1914
1915 return N_DBPS;
1916}
1917
1918void rtl819xU_cmd_isr(struct urb *tx_cmd_urb, struct pt_regs *regs)
1919{
5f53d8ca
JC		 1920 usb_free_urb(tx_cmd_urb);
1921}
1922
1923unsigned int txqueue2outpipe(struct r8192_priv* priv,unsigned int tx_queue) {
1924
1925 if(tx_queue >= 9)
1926 {
1927 RT_TRACE(COMP_ERR,"%s():Unknown queue ID!!!\n",__FUNCTION__);
1928 return 0x04;
1929 }
1930 return priv->txqueue_to_outpipemap[tx_queue];
1931}
1932
5f53d8ca
JC		 1933short rtl8192SU_tx_cmd(struct net_device *dev, struct sk_buff *skb)
1934{
1935 struct r8192_priv *priv = ieee80211_priv(dev);
1936 int status;
1937 struct urb *tx_urb;
1938 unsigned int idx_pipe;
1939 tx_desc_cmd_819x_usb *pdesc = (tx_desc_cmd_819x_usb *)skb->data;
1940 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1941 u8 queue_index = tcb_desc->queue_index;
1942 u32 PktSize = 0;
1943
1944 //printk("\n %s::::::::::::::::::::::queue_index = %d\n",__FUNCTION__, queue_index);
1945 atomic_inc(&priv->tx_pending[queue_index]);
1946
5f53d8ca 1947 tx_urb = usb_alloc_urb(0,GFP_ATOMIC);
5f53d8ca
JC		 1948 if(!tx_urb){
1949 dev_kfree_skb(skb);
1950 return -ENOMEM;
1951 }
1952
1953 memset(pdesc, 0, USB_HWDESC_HEADER_LEN);
1954
1955 /* Tx descriptor ought to be set according to the skb->cb */
1956 pdesc->LINIP = tcb_desc->bLastIniPkt;
1957 PktSize = (u16)(skb->len - USB_HWDESC_HEADER_LEN);
1958 pdesc->PktSize = PktSize;
1959 //printk("PKTSize = %d %x\n",pdesc->PktSize,pdesc->PktSize);
1960 //----------------------------------------------------------------------------
1961 // Fill up USB_OUT_CONTEXT.
1962 //----------------------------------------------------------------------------
1963 // Get index to out pipe from specified QueueID.
1964 idx_pipe = txqueue2outpipe(priv,queue_index);
1965 //printk("=============>%s queue_index:%d, outpipe:%d\n", __func__,queue_index,priv->RtOutPipes[idx_pipe]);
1966
5f53d8ca
JC		 1967 usb_fill_bulk_urb(tx_urb,
1968 priv->udev,
1969 usb_sndbulkpipe(priv->udev,priv->RtOutPipes[idx_pipe]),
1970 skb->data,
1971 skb->len,
1972 rtl8192_tx_isr,
1973 skb);
1974
5f53d8ca 1975 status = usb_submit_urb(tx_urb, GFP_ATOMIC);
5f53d8ca
JC		 1976 if (!status){
1977 return 0;
1978 }else{
1979 printk("Error TX CMD URB, error %d",
1980 status);
1981 return -1;
1982 }
1983}
5f53d8ca
JC		 1984
1985/*
1986 * Mapping Software/Hardware descriptor queue id to "Queue Select Field"
1987 * in TxFwInfo data structure
1988 * 2006.10.30 by Emily
1989 *
1990 * \param QUEUEID Software Queue
1991*/
1992u8 MapHwQueueToFirmwareQueue(u8 QueueID)
1993{
1994 u8 QueueSelect = 0x0; //defualt set to
1995
1996 switch(QueueID) {
1997 case BE_QUEUE:
1998 QueueSelect = QSLT_BE; //or QSelect = pTcb->priority;
1999 break;
2000
2001 case BK_QUEUE:
2002 QueueSelect = QSLT_BK; //or QSelect = pTcb->priority;
2003 break;
2004
2005 case VO_QUEUE:
2006 QueueSelect = QSLT_VO; //or QSelect = pTcb->priority;
2007 break;
2008
2009 case VI_QUEUE:
2010 QueueSelect = QSLT_VI; //or QSelect = pTcb->priority;
2011 break;
2012 case MGNT_QUEUE:
2013 QueueSelect = QSLT_MGNT;
2014 break;
2015
2016 case BEACON_QUEUE:
2017 QueueSelect = QSLT_BEACON;
2018 break;
2019
2020 // TODO: 2006.10.30 mark other queue selection until we verify it is OK
2021 // TODO: Remove Assertions
2022//#if (RTL819X_FPGA_VER & RTL819X_FPGA_GUANGAN_070502)
2023 case TXCMD_QUEUE:
2024 QueueSelect = QSLT_CMD;
2025 break;
2026//#endif
2027 case HIGH_QUEUE:
2028 QueueSelect = QSLT_HIGH;
2029 break;
2030
2031 default:
2032 RT_TRACE(COMP_ERR, "TransmitTCB(): Impossible Queue Selection: %d \n", QueueID);
2033 break;
2034 }
2035 return QueueSelect;
2036}
2037
5f53d8ca
JC		 2038u8 MRateToHwRate8190Pci(u8 rate)
2039{
2040 u8 ret = DESC92S_RATE1M;
2041
2042 switch(rate)
2043 {
2044 // CCK and OFDM non-HT rates
2045 case MGN_1M: ret = DESC92S_RATE1M; break;
2046 case MGN_2M: ret = DESC92S_RATE2M; break;
2047 case MGN_5_5M: ret = DESC92S_RATE5_5M; break;
2048 case MGN_11M: ret = DESC92S_RATE11M; break;
2049 case MGN_6M: ret = DESC92S_RATE6M; break;
2050 case MGN_9M: ret = DESC92S_RATE9M; break;
2051 case MGN_12M: ret = DESC92S_RATE12M; break;
2052 case MGN_18M: ret = DESC92S_RATE18M; break;
2053 case MGN_24M: ret = DESC92S_RATE24M; break;
2054 case MGN_36M: ret = DESC92S_RATE36M; break;
2055 case MGN_48M: ret = DESC92S_RATE48M; break;
2056 case MGN_54M: ret = DESC92S_RATE54M; break;
2057
2058 // HT rates since here
2059 case MGN_MCS0: ret = DESC92S_RATEMCS0; break;
2060 case MGN_MCS1: ret = DESC92S_RATEMCS1; break;
2061 case MGN_MCS2: ret = DESC92S_RATEMCS2; break;
2062 case MGN_MCS3: ret = DESC92S_RATEMCS3; break;
2063 case MGN_MCS4: ret = DESC92S_RATEMCS4; break;
2064 case MGN_MCS5: ret = DESC92S_RATEMCS5; break;
2065 case MGN_MCS6: ret = DESC92S_RATEMCS6; break;
2066 case MGN_MCS7: ret = DESC92S_RATEMCS7; break;
2067 case MGN_MCS8: ret = DESC92S_RATEMCS8; break;
2068 case MGN_MCS9: ret = DESC92S_RATEMCS9; break;
2069 case MGN_MCS10: ret = DESC92S_RATEMCS10; break;
2070 case MGN_MCS11: ret = DESC92S_RATEMCS11; break;
2071 case MGN_MCS12: ret = DESC92S_RATEMCS12; break;
2072 case MGN_MCS13: ret = DESC92S_RATEMCS13; break;
2073 case MGN_MCS14: ret = DESC92S_RATEMCS14; break;
2074 case MGN_MCS15: ret = DESC92S_RATEMCS15; break;
2075
2076 // Set the highest SG rate
2077 case MGN_MCS0_SG:
2078 case MGN_MCS1_SG:
2079 case MGN_MCS2_SG:
2080 case MGN_MCS3_SG:
2081 case MGN_MCS4_SG:
2082 case MGN_MCS5_SG:
2083 case MGN_MCS6_SG:
2084 case MGN_MCS7_SG:
2085 case MGN_MCS8_SG:
2086 case MGN_MCS9_SG:
2087 case MGN_MCS10_SG:
2088 case MGN_MCS11_SG:
2089 case MGN_MCS12_SG:
2090 case MGN_MCS13_SG:
2091 case MGN_MCS14_SG:
2092 case MGN_MCS15_SG:
2093 {
2094 ret = DESC92S_RATEMCS15_SG;
2095 break;
2096 }
2097
2098 default: break;
2099 }
2100 return ret;
2101}
5f53d8ca
JC		 2102
2103u8 QueryIsShort(u8 TxHT, u8 TxRate, cb_desc *tcb_desc)
2104{
2105 u8 tmp_Short;
2106
2107 tmp_Short = (TxHT==1)?((tcb_desc->bUseShortGI)?1:0):((tcb_desc->bUseShortPreamble)?1:0);
2108
2109 if(TxHT==1 && TxRate != DESC90_RATEMCS15)
2110 tmp_Short = 0;
2111
2112 return tmp_Short;
2113}
2114
5f53d8ca 2115static void tx_zero_isr(struct urb *tx_urb)
5f53d8ca
JC		 2116{
2117 return;
2118}
2119
2120
5f53d8ca
JC		 2121/*
2122 * The tx procedure is just as following, skb->cb will contain all the following
2123 *information: * priority, morefrag, rate, &dev.
2124 * */
2125 // <Note> Buffer format for 8192S Usb bulk out:
2126//
2127// --------------------------------------------------
2128// | 8192S Usb Tx Desc | 802_11_MAC_header | data |
2129// --------------------------------------------------
2130// | 32 bytes | 24 bytes |0-2318 bytes|
2131// --------------------------------------------------
2132// |<------------ BufferLen ------------------------->|
2133
2134short rtl8192SU_tx(struct net_device *dev, struct sk_buff* skb)
2135{
2136 struct r8192_priv *priv = ieee80211_priv(dev);
2137 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
2138 tx_desc_819x_usb *tx_desc = (tx_desc_819x_usb *)skb->data;
2139 //tx_fwinfo_819x_usb *tx_fwinfo = (tx_fwinfo_819x_usb *)(skb->data + USB_HWDESC_HEADER_LEN);//92su del
2140 struct usb_device *udev = priv->udev;
2141 int pend;
2142 int status;
2143 struct urb *tx_urb = NULL, *tx_urb_zero = NULL;
2144 //int urb_len;
2145 unsigned int idx_pipe;
2146 u16 MPDUOverhead = 0;
2147 //RT_DEBUG_DATA(COMP_SEND, tcb_desc, sizeof(cb_desc));
2148
5f53d8ca
JC		 2149 pend = atomic_read(&priv->tx_pending[tcb_desc->queue_index]);
2150 /* we are locked here so the two atomic_read and inc are executed
2151 * without interleaves * !!! For debug purpose */
2152 if( pend > MAX_TX_URB){
2153 switch (tcb_desc->queue_index) {
2154 case VO_PRIORITY:
2155 priv->stats.txvodrop++;
2156 break;
2157 case VI_PRIORITY:
2158 priv->stats.txvidrop++;
2159 break;
2160 case BE_PRIORITY:
2161 priv->stats.txbedrop++;
2162 break;
2163 default://BK_PRIORITY
2164 priv->stats.txbkdrop++;
2165 break;
2166 }
2167 printk("To discard skb packet!\n");
2168 dev_kfree_skb_any(skb);
2169 return -1;
2170 }
2171
5f53d8ca 2172 tx_urb = usb_alloc_urb(0,GFP_ATOMIC);
5f53d8ca
JC		 2173 if(!tx_urb){
2174 dev_kfree_skb_any(skb);
2175 return -ENOMEM;
2176 }
2177
2178 memset(tx_desc, 0, sizeof(tx_desc_819x_usb));
2179
2180
5f53d8ca 2181 tx_desc->NonQos = (IsQoSDataFrame(skb->data)==TRUE)? 0:1;
5f53d8ca
JC		 2182
2183 /* Fill Tx descriptor */
2184 //memset(tx_fwinfo,0,sizeof(tx_fwinfo_819x_usb));
2185
2186 // This part can just fill to the first descriptor of the frame.
2187 /* DWORD 0 */
2188 tx_desc->TxHT = (tcb_desc->data_rate&0x80)?1:0;
2189
5f53d8ca
JC		 2190
2191 tx_desc->TxRate = MRateToHwRate8190Pci(tcb_desc->data_rate);
2192 //tx_desc->EnableCPUDur = tcb_desc->bTxEnableFwCalcDur;
2193 tx_desc->TxShort = QueryIsShort(tx_desc->TxHT, tx_desc->TxRate, tcb_desc);
2194
2195
2196 // Aggregation related
2197 if(tcb_desc->bAMPDUEnable) {//AMPDU enabled
2198 tx_desc->AllowAggregation = 1;
2199 /* DWORD 1 */
2200 //tx_fwinfo->RxMF = tcb_desc->ampdu_factor;
2201 //tx_fwinfo->RxAMD = tcb_desc->ampdu_density&0x07;//ampdudensity
2202 } else {
2203 tx_desc->AllowAggregation = 0;
2204 /* DWORD 1 */
2205 //tx_fwinfo->RxMF = 0;
2206 //tx_fwinfo->RxAMD = 0;
2207 }
2208
2209 //
2210 // <Roger_Notes> For AMPDU case, we must insert SSN into TX_DESC,
2211 // FW according as this SSN to do necessary packet retry.
2212 // 2008.06.06.
2213 //
2214 {
2215 u8 *pSeq;
2216 u16 Temp;
2217 //pSeq = (u8 *)(VirtualAddress+USB_HWDESC_HEADER_LEN + FRAME_OFFSET_SEQUENCE);
2218 pSeq = (u8 *)(skb->data+USB_HWDESC_HEADER_LEN + 22);
2219 Temp = pSeq[0];
2220 Temp <<= 12;
2221 Temp |= (*(u16 *)pSeq)>>4;
2222 tx_desc->Seq = Temp;
2223 }
2224
2225 /* Protection mode related */
2226 tx_desc->RTSEn = (tcb_desc->bRTSEnable)?1:0;
2227 tx_desc->CTS2Self = (tcb_desc->bCTSEnable)?1:0;
2228 tx_desc->RTSSTBC = (tcb_desc->bRTSSTBC)?1:0;
2229 tx_desc->RTSHT = (tcb_desc->rts_rate&0x80)?1:0;
2230 tx_desc->RTSRate = MRateToHwRate8190Pci((u8)tcb_desc->rts_rate);
2231 tx_desc->RTSSubcarrier = (tx_desc->RTSHT==0)?(tcb_desc->RTSSC):0;
2232 tx_desc->RTSBW = (tx_desc->RTSHT==1)?((tcb_desc->bRTSBW)?1:0):0;
2233 tx_desc->RTSShort = (tx_desc->RTSHT==0)?(tcb_desc->bRTSUseShortPreamble?1:0):\
2234 (tcb_desc->bRTSUseShortGI?1:0);
2235 //LZM 090219
2236 tx_desc->DisRTSFB = 0;
2237 tx_desc->RTSRateFBLmt = 0xf;
2238
2239 // <Roger_EXP> 2008.09.22. We disable RTS rate fallback temporarily.
2240 //tx_desc->DisRTSFB = 0x01;
2241
2242 /* Set Bandwidth and sub-channel settings. */
2243 if(priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40)
2244 {
2245 if(tcb_desc->bPacketBW) {
2246 tx_desc->TxBandwidth = 1;
2247 tx_desc->TxSubCarrier = 0; //By SD3's Jerry suggestion, use duplicated mode
2248 } else {
2249 tx_desc->TxBandwidth = 0;
2250 tx_desc->TxSubCarrier = priv->nCur40MhzPrimeSC;
2251 }
2252 } else {
2253 tx_desc->TxBandwidth = 0;
2254 tx_desc->TxSubCarrier = 0;
2255 }
2256
5f53d8ca
JC		 2257
2258 //memset(tx_desc, 0, sizeof(tx_desc_819x_usb));
2259 /* DWORD 0 */
2260 tx_desc->LINIP = 0;
2261 //tx_desc->CmdInit = 1; //92su del
2262 tx_desc->Offset = USB_HWDESC_HEADER_LEN;
2263
5f53d8ca
JC		 2264 {
2265 tx_desc->PktSize = (skb->len - USB_HWDESC_HEADER_LEN) & 0xffff;
2266 }
2267
2268 /*DWORD 1*/
2269 //tx_desc->SecCAMID= 0;//92su del
2270 tx_desc->RaBRSRID= tcb_desc->RATRIndex;
2271//#ifdef RTL8192S_PREPARE_FOR_NORMAL_RELEASE
5f53d8ca 2272
5f53d8ca
JC		 2273 {
2274 MPDUOverhead = 0;
2275 //tx_desc->NoEnc = 1;//92su del
2276 }
35c1b462 2277
5f53d8ca 2278 tx_desc->SecType = 0x0;
35c1b462 2279
5f53d8ca
JC		 2280 if (tcb_desc->bHwSec)
2281 {
2282 switch (priv->ieee80211->pairwise_key_type)
2283 {
2284 case KEY_TYPE_WEP40:
2285 case KEY_TYPE_WEP104:
2286 tx_desc->SecType = 0x1;
2287 //tx_desc->NoEnc = 0;//92su del
2288 break;
2289 case KEY_TYPE_TKIP:
2290 tx_desc->SecType = 0x2;
2291 //tx_desc->NoEnc = 0;//92su del
2292 break;
2293 case KEY_TYPE_CCMP:
2294 tx_desc->SecType = 0x3;
2295 //tx_desc->NoEnc = 0;//92su del
2296 break;
2297 case KEY_TYPE_NA:
2298 tx_desc->SecType = 0x0;
2299 //tx_desc->NoEnc = 1;//92su del
2300 break;
2301 default:
2302 tx_desc->SecType = 0x0;
2303 //tx_desc->NoEnc = 1;//92su del
2304 break;
2305 }
2306 }
2307
2308 //tx_desc->TxFWInfoSize = sizeof(tx_fwinfo_819x_usb);//92su del
2309
2310
2311 tx_desc->USERATE = tcb_desc->bTxUseDriverAssingedRate;
2312 tx_desc->DISFB = tcb_desc->bTxDisableRateFallBack;
2313 tx_desc->DataRateFBLmt = 0x1F;// Alwasy enable all rate fallback range
2314
2315 tx_desc->QueueSelect = MapHwQueueToFirmwareQueue(tcb_desc->queue_index);
2316
2317
2318 /* Fill fields that are required to be initialized in all of the descriptors */
2319 //DWORD 0
5f53d8ca
JC		 2320 tx_desc->FirstSeg = 1;
2321 tx_desc->LastSeg = 1;
5f53d8ca
JC		 2322 tx_desc->OWN = 1;
2323
5f53d8ca
JC		 2324 {
2325 //DWORD 2
2326 //tx_desc->TxBufferSize = (u32)(skb->len - USB_HWDESC_HEADER_LEN);
2327 tx_desc->TxBufferSize = (u32)(skb->len);//92su mod FIXLZM
2328 }
2329
5f53d8ca
JC		 2330 /* Get index to out pipe from specified QueueID */
2331 idx_pipe = txqueue2outpipe(priv,tcb_desc->queue_index);
2332 //printk("=============>%s queue_index:%d, outpipe:%d\n", __func__,tcb_desc->queue_index,priv->RtOutPipes[idx_pipe]);
2333
2334 //RT_DEBUG_DATA(COMP_SEND,tx_fwinfo,sizeof(tx_fwinfo_819x_usb));
2335 //RT_DEBUG_DATA(COMP_SEND,tx_desc,sizeof(tx_desc_819x_usb));
2336
2337 /* To submit bulk urb */
2338 usb_fill_bulk_urb(tx_urb,
2339 udev,
2340 usb_sndbulkpipe(udev,priv->RtOutPipes[idx_pipe]),
2341 skb->data,
2342 skb->len, rtl8192_tx_isr, skb);
2343
5f53d8ca 2344 status = usb_submit_urb(tx_urb, GFP_ATOMIC);
29a1fbc8
FS		 2345 if (!status) {
2346 /*
2347 * we need to send 0 byte packet whenever 512N bytes/64N(HIGN SPEED/NORMAL SPEED) bytes packet has been transmitted.
2348 * Otherwise, it will be halt to wait for another packet. WB. 2008.08.27
2349 */
5f53d8ca
JC		 2350 bool bSend0Byte = false;
2351 u8 zero = 0;
29a1fbc8 2352 if(udev->speed == USB_SPEED_HIGH) {
5f53d8ca
JC		 2353 if (skb->len > 0 && skb->len % 512 == 0)
2354 bSend0Byte = true;
2355 }
29a1fbc8 2356 else {
5f53d8ca
JC		 2357 if (skb->len > 0 && skb->len % 64 == 0)
2358 bSend0Byte = true;
2359 }
29a1fbc8 2360 if (bSend0Byte) {
5f53d8ca 2361 tx_urb_zero = usb_alloc_urb(0,GFP_ATOMIC);
29a1fbc8 2362 if(!tx_urb_zero) {
5f53d8ca
JC		 2363 RT_TRACE(COMP_ERR, "can't alloc urb for zero byte\n");
2364 return -ENOMEM;
2365 }
2366 usb_fill_bulk_urb(tx_urb_zero,udev,
2367 usb_sndbulkpipe(udev,idx_pipe), &zero,
2368 0, tx_zero_isr, dev);
5f53d8ca 2369 status = usb_submit_urb(tx_urb_zero, GFP_ATOMIC);
29a1fbc8
FS		 2370 switch (status) {
2371 case 0:
2372 break;
2373 case -ECONNRESET:
2374 case -ENOENT:
2375 case -ESHUTDOWN:
2376 break;
2377 default:
2378 RT_TRACE(COMP_ERR, "Error TX URB for zero byte %d, error %d",
2379 atomic_read(&priv->tx_pending[tcb_desc->queue_index]), status);
2380 return -1;
5f53d8ca 2381 }
5f53d8ca
JC		 2382 }
2383 dev->trans_start = jiffies;
2384 atomic_inc(&priv->tx_pending[tcb_desc->queue_index]);
2385 return 0;
29a1fbc8 2386 } else {
5f53d8ca
JC		 2387 RT_TRACE(COMP_ERR, "Error TX URB %d, error %d", atomic_read(&priv->tx_pending[tcb_desc->queue_index]),
2388 status);
2389 return -1;
2390 }
2391}
5f53d8ca 2392
35c1b462 2393void rtl8192SU_net_update(struct net_device *dev)
5f53d8ca
JC		 2394{
2395
2396 struct r8192_priv *priv = ieee80211_priv(dev);
2397 struct ieee80211_device* ieee = priv->ieee80211;
2398 struct ieee80211_network *net = &priv->ieee80211->current_network;
2399 //u16 BcnTimeCfg = 0, BcnCW = 6, BcnIFS = 0xf;
2400 u16 rate_config = 0;
2401 u32 regTmp = 0;
2402 u8 rateIndex = 0;
2403 u8 retrylimit = 0x30;
2404 u16 cap = net->capability;
2405
2406 priv->short_preamble = cap & WLAN_CAPABILITY_SHORT_PREAMBLE;
2407
2408//HW_VAR_BASIC_RATE
2409 //update Basic rate: RR, BRSR
2410 rtl8192_config_rate(dev, &rate_config); //HalSetBrateCfg
2411
5f53d8ca 2412 priv->basic_rate = rate_config = rate_config & 0x15f;
5f53d8ca
JC		 2413
2414 // Set RRSR rate table.
2415 write_nic_byte(dev, RRSR, rate_config&0xff);
2416 write_nic_byte(dev, RRSR+1, (rate_config>>8)&0xff);
2417
2418 // Set RTS initial rate
2419 while(rate_config > 0x1)
2420 {
2421 rate_config = (rate_config>> 1);
2422 rateIndex++;
2423 }
2424 write_nic_byte(dev, INIRTSMCS_SEL, rateIndex);
2425//HW_VAR_BASIC_RATE
2426
2427 //set ack preample
2428 regTmp = (priv->nCur40MhzPrimeSC) << 5;
2429 if (priv->short_preamble)
2430 regTmp |= 0x80;
2431 write_nic_byte(dev, RRSR+2, regTmp);
2432
2433 write_nic_dword(dev,BSSIDR,((u32*)net->bssid)[0]);
2434 write_nic_word(dev,BSSIDR+4,((u16*)net->bssid)[2]);
2435
2436 write_nic_word(dev, BCN_INTERVAL, net->beacon_interval);
2437 //2008.10.24 added by tynli for beacon changed.
2438 PHY_SetBeaconHwReg( dev, net->beacon_interval);
2439
2440 rtl8192_update_cap(dev, cap);
2441
2442 if (ieee->iw_mode == IW_MODE_ADHOC){
2443 retrylimit = 7;
2444 //we should enable ibss interrupt here, but disable it temporarily
2445 if (0){
2446 priv->irq_mask |= (IMR_BcnInt | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
2447 //rtl8192_irq_disable(dev);
2448 //rtl8192_irq_enable(dev);
2449 }
2450 }
2451 else{
2452 if (0){
2453 priv->irq_mask &= ~(IMR_BcnInt | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
2454 //rtl8192_irq_disable(dev);
2455 //rtl8192_irq_enable(dev);
2456 }
2457 }
2458
2459 priv->ShortRetryLimit = priv->LongRetryLimit = retrylimit;
2460
2461 write_nic_word(dev, RETRY_LIMIT,
2462 retrylimit << RETRY_LIMIT_SHORT_SHIFT | \
2463 retrylimit << RETRY_LIMIT_LONG_SHIFT);
2464}
2465
2466void rtl8192SU_update_ratr_table(struct net_device* dev)
2467{
2468 struct r8192_priv* priv = ieee80211_priv(dev);
2469 struct ieee80211_device* ieee = priv->ieee80211;
2470 u8* pMcsRate = ieee->dot11HTOperationalRateSet;
2471 //struct ieee80211_network *net = &ieee->current_network;
2472 u32 ratr_value = 0;
2473
2474 u8 rate_index = 0;
2475 int WirelessMode = ieee->mode;
2476 u8 MimoPs = ieee->pHTInfo->PeerMimoPs;
2477
2478 u8 bNMode = 0;
2479
2480 rtl8192_config_rate(dev, (u16*)(&ratr_value));
2481 ratr_value |= (*(u16*)(pMcsRate)) << 12;
2482
2483 //switch (ieee->mode)
2484 switch (WirelessMode)
2485 {
2486 case IEEE_A:
2487 ratr_value &= 0x00000FF0;
2488 break;
2489 case IEEE_B:
2490 ratr_value &= 0x0000000D;
2491 break;
2492 case IEEE_G:
2493 ratr_value &= 0x00000FF5;
2494 break;
2495 case IEEE_N_24G:
2496 case IEEE_N_5G:
2497 {
2498 bNMode = 1;
2499
2500 if (MimoPs == 0) //MIMO_PS_STATIC
2501 {
2502 ratr_value &= 0x0007F005;
2503 }
2504 else
2505 { // MCS rate only => for 11N mode.
2506 u32 ratr_mask;
2507
2508 // 1T2R or 1T1R, Spatial Stream 2 should be disabled
2509 if ( priv->rf_type == RF_1T2R ||
2510 priv->rf_type == RF_1T1R ||
2511 (ieee->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_TX_2SS) )
2512 ratr_mask = 0x000ff005;
2513 else
2514 ratr_mask = 0x0f0ff005;
2515
2516 if((ieee->pHTInfo->bCurTxBW40MHz) &&
2517 !(ieee->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_TX_40_MHZ))
2518 ratr_mask |= 0x00000010; // Set 6MBps
2519
2520 // Select rates for rate adaptive mechanism.
2521 ratr_value &= ratr_mask;
2522 }
2523 }
2524 break;
2525 default:
2526 if(0)
2527 {
2528 if(priv->rf_type == RF_1T2R) // 1T2R, Spatial Stream 2 should be disabled
2529 {
2530 ratr_value &= 0x000ff0f5;
2531 }
2532 else
2533 {
2534 ratr_value &= 0x0f0ff0f5;
2535 }
2536 }
2537 //printk("====>%s(), mode is not correct:%x\n", __FUNCTION__, ieee->mode);
2538 break;
2539 }
2540
5f53d8ca 2541 ratr_value &= 0x0FFFFFFF;
5f53d8ca
JC		 2542
2543 // Get MAX MCS available.
2544 if ( (bNMode && ((ieee->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_SHORT_GI)==0)) &&
2545 ((ieee->pHTInfo->bCurBW40MHz && ieee->pHTInfo->bCurShortGI40MHz) ||
2546 (!ieee->pHTInfo->bCurBW40MHz && ieee->pHTInfo->bCurShortGI20MHz)))
2547 {
2548 u8 shortGI_rate = 0;
2549 u32 tmp_ratr_value = 0;
2550 ratr_value |= 0x10000000;//???
2551 tmp_ratr_value = (ratr_value>>12);
2552 for(shortGI_rate=15; shortGI_rate>0; shortGI_rate--)
2553 {
2554 if((1<<shortGI_rate) & tmp_ratr_value)
2555 break;
2556 }
2557 shortGI_rate = (shortGI_rate<<12)|(shortGI_rate<<8)|(shortGI_rate<<4)|(shortGI_rate);
2558 write_nic_byte(dev, SG_RATE, shortGI_rate);
2559 //printk("==>SG_RATE:%x\n", read_nic_byte(dev, SG_RATE));
2560 }
2561 write_nic_dword(dev, ARFR0+rate_index*4, ratr_value);
2562 printk("=============>ARFR0+rate_index*4:%#x\n", ratr_value);
2563
2564 //2 UFWP
2565 if (ratr_value & 0xfffff000){
2566 //printk("===>set to N mode\n");
2567 HalSetFwCmd8192S(dev, FW_CMD_RA_REFRESH_N);
2568 }
2569 else {
2570 //printk("===>set to B/G mode\n");
2571 HalSetFwCmd8192S(dev, FW_CMD_RA_REFRESH_BG);
2572 }
2573}
2574
2575void rtl8192SU_link_change(struct net_device *dev)
2576{
2577 struct r8192_priv *priv = ieee80211_priv(dev);
2578 struct ieee80211_device* ieee = priv->ieee80211;
2579 //unsigned long flags;
2580 u32 reg = 0;
2581
2582 printk("=====>%s 1\n", __func__);
2583 reg = read_nic_dword(dev, RCR);
2584
2585 if (ieee->state == IEEE80211_LINKED)
2586 {
2587
2588 rtl8192SU_net_update(dev);
2589 rtl8192SU_update_ratr_table(dev);
2590 ieee->SetFwCmdHandler(dev, FW_CMD_HIGH_PWR_ENABLE);
2591 priv->ReceiveConfig = reg |= RCR_CBSSID;
2592
2593 }else{
2594 priv->ReceiveConfig = reg &= ~RCR_CBSSID;
2595
2596 }
2597
2598 write_nic_dword(dev, RCR, reg);
2599 rtl8192_update_msr(dev);
2600
2601 printk("<=====%s 2\n", __func__);
2602}
5f53d8ca
JC		 2603
2604static struct ieee80211_qos_parameters def_qos_parameters = {
2605 {3,3,3,3},/* cw_min */
2606 {7,7,7,7},/* cw_max */
2607 {2,2,2,2},/* aifs */
2608 {0,0,0,0},/* flags */
2609 {0,0,0,0} /* tx_op_limit */
2610};
2611
2612
5f53d8ca
JC		 2613void rtl8192_update_beacon(struct work_struct * work)
2614{
2615 struct r8192_priv *priv = container_of(work, struct r8192_priv, update_beacon_wq.work);
2616 struct net_device *dev = priv->ieee80211->dev;
5f53d8ca
JC		 2617 struct ieee80211_device* ieee = priv->ieee80211;
2618 struct ieee80211_network* net = &ieee->current_network;
2619
2620 if (ieee->pHTInfo->bCurrentHTSupport)
2621 HTUpdateSelfAndPeerSetting(ieee, net);
2622 ieee->pHTInfo->bCurrentRT2RTLongSlotTime = net->bssht.bdRT2RTLongSlotTime;
2623 // Joseph test for turbo mode with AP
2624 ieee->pHTInfo->RT2RT_HT_Mode = net->bssht.RT2RT_HT_Mode;
2625 rtl8192_update_cap(dev, net->capability);
2626}
2627/*
2628* background support to run QoS activate functionality
2629*/
2630int WDCAPARA_ADD[] = {EDCAPARA_BE,EDCAPARA_BK,EDCAPARA_VI,EDCAPARA_VO};
1ec9e48d 2631
5f53d8ca
JC		 2632void rtl8192_qos_activate(struct work_struct * work)
2633{
2634 struct r8192_priv *priv = container_of(work, struct r8192_priv, qos_activate);
2635 struct net_device *dev = priv->ieee80211->dev;
5f53d8ca
JC		 2636 struct ieee80211_qos_parameters *qos_parameters = &priv->ieee80211->current_network.qos_data.parameters;
2637 u8 mode = priv->ieee80211->current_network.mode;
2638 //u32 size = sizeof(struct ieee80211_qos_parameters);
2639 u8 u1bAIFS;
2640 u32 u4bAcParam;
2641 int i;
2642
2643 if (priv == NULL)
2644 return;
2645
5f53d8ca 2646 mutex_lock(&priv->mutex);
1ec9e48d 2647
5f53d8ca
JC		 2648 if(priv->ieee80211->state != IEEE80211_LINKED)
2649 goto success;
2650 RT_TRACE(COMP_QOS,"qos active process with associate response received\n");
2651 /* It better set slot time at first */
2652 /* For we just support b/g mode at present, let the slot time at 9/20 selection */
2653 /* update the ac parameter to related registers */
2654 for(i = 0; i < QOS_QUEUE_NUM; i++) {
2655 //Mode G/A: slotTimeTimer = 9; Mode B: 20
2656 u1bAIFS = qos_parameters->aifs[i] * ((mode&(IEEE_G|IEEE_N_24G)) ?9:20) + aSifsTime;
2657 u4bAcParam = ((((u32)(qos_parameters->tx_op_limit[i]))<< AC_PARAM_TXOP_LIMIT_OFFSET)|
2658 (((u32)(qos_parameters->cw_max[i]))<< AC_PARAM_ECW_MAX_OFFSET)|
2659 (((u32)(qos_parameters->cw_min[i]))<< AC_PARAM_ECW_MIN_OFFSET)|
2660 ((u32)u1bAIFS << AC_PARAM_AIFS_OFFSET));
2661
2662 write_nic_dword(dev, WDCAPARA_ADD[i], u4bAcParam);
2663 //write_nic_dword(dev, WDCAPARA_ADD[i], 0x005e4322);
2664 }
2665
2666success:
5f53d8ca 2667 mutex_unlock(&priv->mutex);
5f53d8ca
JC		 2668}
2669
2670static int rtl8192_qos_handle_probe_response(struct r8192_priv *priv,
2671 int active_network,
2672 struct ieee80211_network *network)
2673{
2674 int ret = 0;
2675 u32 size = sizeof(struct ieee80211_qos_parameters);
2676
2677 if(priv->ieee80211->state !=IEEE80211_LINKED)
2678 return ret;
2679
2680 if ((priv->ieee80211->iw_mode != IW_MODE_INFRA))
2681 return ret;
2682
2683 if (network->flags & NETWORK_HAS_QOS_MASK) {
2684 if (active_network &&
2685 (network->flags & NETWORK_HAS_QOS_PARAMETERS))
2686 network->qos_data.active = network->qos_data.supported;
2687
2688 if ((network->qos_data.active == 1) && (active_network == 1) &&
2689 (network->flags & NETWORK_HAS_QOS_PARAMETERS) &&
2690 (network->qos_data.old_param_count !=
2691 network->qos_data.param_count)) {
2692 network->qos_data.old_param_count =
2693 network->qos_data.param_count;
5f53d8ca 2694 queue_work(priv->priv_wq, &priv->qos_activate);
5f53d8ca
JC		 2695 RT_TRACE (COMP_QOS, "QoS parameters change call "
2696 "qos_activate\n");
2697 }
2698 } else {
2699 memcpy(&priv->ieee80211->current_network.qos_data.parameters,\
2700 &def_qos_parameters, size);
2701
2702 if ((network->qos_data.active == 1) && (active_network == 1)) {
5f53d8ca 2703 queue_work(priv->priv_wq, &priv->qos_activate);
5f53d8ca
JC		 2704 RT_TRACE(COMP_QOS, "QoS was disabled call qos_activate \n");
2705 }
2706 network->qos_data.active = 0;
2707 network->qos_data.supported = 0;
2708 }
2709
2710 return 0;
2711}
2712
2713/* handle manage frame frame beacon and probe response */
2714static int rtl8192_handle_beacon(struct net_device * dev,
f59d0127
BZ		 2715 struct ieee80211_probe_response *beacon,
2716 struct ieee80211_network *network)
5f53d8ca
JC		 2717{
2718 struct r8192_priv *priv = ieee80211_priv(dev);
2719
2720 rtl8192_qos_handle_probe_response(priv,1,network);
5f53d8ca 2721 queue_delayed_work(priv->priv_wq, &priv->update_beacon_wq, 0);
5f53d8ca 2722
5f53d8ca
JC		 2723 return 0;
2724
2725}
2726
2727/*
2728* handling the beaconing responses. if we get different QoS setting
2729* off the network from the associated setting, adjust the QoS
2730* setting
2731*/
2732static int rtl8192_qos_association_resp(struct r8192_priv *priv,
2733 struct ieee80211_network *network)
2734{
2735 int ret = 0;
2736 unsigned long flags;
2737 u32 size = sizeof(struct ieee80211_qos_parameters);
2738 int set_qos_param = 0;
2739
2740 if ((priv == NULL) || (network == NULL))
2741 return ret;
2742
2743 if(priv->ieee80211->state !=IEEE80211_LINKED)
2744 return ret;
2745
2746 if ((priv->ieee80211->iw_mode != IW_MODE_INFRA))
2747 return ret;
2748
2749 spin_lock_irqsave(&priv->ieee80211->lock, flags);
2750 if(network->flags & NETWORK_HAS_QOS_PARAMETERS) {
2751 memcpy(&priv->ieee80211->current_network.qos_data.parameters,\
2752 &network->qos_data.parameters,\
2753 sizeof(struct ieee80211_qos_parameters));
2754 priv->ieee80211->current_network.qos_data.active = 1;
5f53d8ca
JC		 2755 {
2756 set_qos_param = 1;
2757 /* update qos parameter for current network */
2758 priv->ieee80211->current_network.qos_data.old_param_count = \
2759 priv->ieee80211->current_network.qos_data.param_count;
2760 priv->ieee80211->current_network.qos_data.param_count = \
2761 network->qos_data.param_count;
2762 }
2763 } else {
2764 memcpy(&priv->ieee80211->current_network.qos_data.parameters,\
2765 &def_qos_parameters, size);
2766 priv->ieee80211->current_network.qos_data.active = 0;
2767 priv->ieee80211->current_network.qos_data.supported = 0;
2768 set_qos_param = 1;
2769 }
2770
2771 spin_unlock_irqrestore(&priv->ieee80211->lock, flags);
2772
2773 RT_TRACE(COMP_QOS, "%s: network->flags = %d,%d\n",__FUNCTION__,network->flags ,priv->ieee80211->current_network.qos_data.active);
2774 if (set_qos_param == 1)
5f53d8ca 2775 queue_work(priv->priv_wq, &priv->qos_activate);
5f53d8ca
JC		 2776
2777 return ret;
2778}
2779
2780
2781static int rtl8192_handle_assoc_response(struct net_device *dev,
2782 struct ieee80211_assoc_response_frame *resp,
2783 struct ieee80211_network *network)
2784{
2785 struct r8192_priv *priv = ieee80211_priv(dev);
2786 rtl8192_qos_association_resp(priv, network);
2787 return 0;
2788}
2789
2790
2791void rtl8192_update_ratr_table(struct net_device* dev)
2792 // POCTET_STRING posLegacyRate,
2793 // u8* pMcsRate)
2794 // PRT_WLAN_STA pEntry)
2795{
2796 struct r8192_priv* priv = ieee80211_priv(dev);
2797 struct ieee80211_device* ieee = priv->ieee80211;
2798 u8* pMcsRate = ieee->dot11HTOperationalRateSet;
2799 //struct ieee80211_network *net = &ieee->current_network;
2800 u32 ratr_value = 0;
2801 u8 rate_index = 0;
2802 rtl8192_config_rate(dev, (u16*)(&ratr_value));
2803 ratr_value |= (*(u16*)(pMcsRate)) << 12;
2804// switch (net->mode)
2805 switch (ieee->mode)
2806 {
2807 case IEEE_A:
2808 ratr_value &= 0x00000FF0;
2809 break;
2810 case IEEE_B:
2811 ratr_value &= 0x0000000F;
2812 break;
2813 case IEEE_G:
2814 ratr_value &= 0x00000FF7;
2815 break;
2816 case IEEE_N_24G:
2817 case IEEE_N_5G:
2818 if (ieee->pHTInfo->PeerMimoPs == 0) //MIMO_PS_STATIC
2819 ratr_value &= 0x0007F007;
2820 else{
2821 if (priv->rf_type == RF_1T2R)
2822 ratr_value &= 0x000FF007;
2823 else
2824 ratr_value &= 0x0F81F007;
2825 }
2826 break;
2827 default:
2828 break;
2829 }
2830 ratr_value &= 0x0FFFFFFF;
2831 if(ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI40MHz){
2832 ratr_value |= 0x80000000;
2833 }else if(!ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI20MHz){
2834 ratr_value |= 0x80000000;
2835 }
2836 write_nic_dword(dev, RATR0+rate_index*4, ratr_value);
2837 write_nic_byte(dev, UFWP, 1);
2838}
2839
2840static u8 ccmp_ie[4] = {0x00,0x50,0xf2,0x04};
2841static u8 ccmp_rsn_ie[4] = {0x00, 0x0f, 0xac, 0x04};
2842bool GetNmodeSupportBySecCfg8192(struct net_device*dev)
2843{
2844#if 1
2845 struct r8192_priv* priv = ieee80211_priv(dev);
2846 struct ieee80211_device* ieee = priv->ieee80211;
2847 struct ieee80211_network * network = &ieee->current_network;
2848 int wpa_ie_len= ieee->wpa_ie_len;
2849 struct ieee80211_crypt_data* crypt;
2850 int encrypt;
5f53d8ca 2851 return TRUE;
5f53d8ca
JC		 2852
2853 crypt = ieee->crypt[ieee->tx_keyidx];
2854 //we use connecting AP's capability instead of only security config on our driver to distinguish whether it should use N mode or G mode
2855 encrypt = (network->capability & WLAN_CAPABILITY_PRIVACY) || (ieee->host_encrypt && crypt && crypt->ops && (0 == strcmp(crypt->ops->name,"WEP")));
2856
2857 /* simply judge */
2858 if(encrypt && (wpa_ie_len == 0)) {
2859 /* wep encryption, no N mode setting */
2860 return false;
2861// } else if((wpa_ie_len != 0)&&(memcmp(&(ieee->wpa_ie[14]),ccmp_ie,4))) {
2862 } else if((wpa_ie_len != 0)) {
2863 /* parse pairwise key type */
2864 //if((pairwisekey = WEP40)||(pairwisekey = WEP104)||(pairwisekey = TKIP))
2865 if (((ieee->wpa_ie[0] == 0xdd) && (!memcmp(&(ieee->wpa_ie[14]),ccmp_ie,4))) || ((ieee->wpa_ie[0] == 0x30) && (!memcmp(&ieee->wpa_ie[10],ccmp_rsn_ie, 4))))
2866 return true;
2867 else
2868 return false;
2869 } else {
2870 return true;
2871 }
2872
5f53d8ca
JC		 2873 return true;
2874#endif
2875}
2876
2877bool GetHalfNmodeSupportByAPs819xUsb(struct net_device* dev)
2878{
2879 bool Reval;
2880 struct r8192_priv* priv = ieee80211_priv(dev);
2881 struct ieee80211_device* ieee = priv->ieee80211;
2882
2883// Added by Roger, 2008.08.29.
5f53d8ca 2884 return false;
5f53d8ca
JC		 2885
2886 if(ieee->bHalfWirelessN24GMode == true)
2887 Reval = true;
2888 else
2889 Reval = false;
2890
2891 return Reval;
2892}
2893
2894void rtl8192_refresh_supportrate(struct r8192_priv* priv)
2895{
2896 struct ieee80211_device* ieee = priv->ieee80211;
2897 //we donot consider set support rate for ABG mode, only HT MCS rate is set here.
2898 if (ieee->mode == WIRELESS_MODE_N_24G || ieee->mode == WIRELESS_MODE_N_5G)
2899 {
2900 memcpy(ieee->Regdot11HTOperationalRateSet, ieee->RegHTSuppRateSet, 16);
2901 //RT_DEBUG_DATA(COMP_INIT, ieee->RegHTSuppRateSet, 16);
2902 //RT_DEBUG_DATA(COMP_INIT, ieee->Regdot11HTOperationalRateSet, 16);
2903 }
2904 else
2905 memset(ieee->Regdot11HTOperationalRateSet, 0, 16);
2906 return;
2907}
2908
2909u8 rtl8192_getSupportedWireleeMode(struct net_device*dev)
2910{
2911 struct r8192_priv *priv = ieee80211_priv(dev);
2912 u8 ret = 0;
2913 switch(priv->rf_chip)
2914 {
2915 case RF_8225:
2916 case RF_8256:
2917 case RF_PSEUDO_11N:
2918 case RF_6052:
2919 ret = (WIRELESS_MODE_N_24G|WIRELESS_MODE_G|WIRELESS_MODE_B);
2920 break;
2921 case RF_8258:
2922 ret = (WIRELESS_MODE_A|WIRELESS_MODE_N_5G);
2923 break;
2924 default:
2925 ret = WIRELESS_MODE_B;
2926 break;
2927 }
2928 return ret;
2929}
2930void rtl8192_SetWirelessMode(struct net_device* dev, u8 wireless_mode)
2931{
2932 struct r8192_priv *priv = ieee80211_priv(dev);
2933 u8 bSupportMode = rtl8192_getSupportedWireleeMode(dev);
2934
2935#if 1
2936 if ((wireless_mode == WIRELESS_MODE_AUTO) || ((wireless_mode&bSupportMode)==0))
2937 {
2938 if(bSupportMode & WIRELESS_MODE_N_24G)
2939 {
2940 wireless_mode = WIRELESS_MODE_N_24G;
2941 }
2942 else if(bSupportMode & WIRELESS_MODE_N_5G)
2943 {
2944 wireless_mode = WIRELESS_MODE_N_5G;
2945 }
2946 else if((bSupportMode & WIRELESS_MODE_A))
2947 {
2948 wireless_mode = WIRELESS_MODE_A;
2949 }
2950 else if((bSupportMode & WIRELESS_MODE_G))
2951 {
2952 wireless_mode = WIRELESS_MODE_G;
2953 }
2954 else if((bSupportMode & WIRELESS_MODE_B))
2955 {
2956 wireless_mode = WIRELESS_MODE_B;
2957 }
2958 else{
2959 RT_TRACE(COMP_ERR, "%s(), No valid wireless mode supported, SupportedWirelessMode(%x)!!!\n", __FUNCTION__,bSupportMode);
2960 wireless_mode = WIRELESS_MODE_B;
2961 }
2962 }
39cfb97b 2963#ifdef TO_DO_LIST //// TODO: this function doesn't work well at this time, we should wait for FPGA
5f53d8ca
JC		 2964 ActUpdateChannelAccessSetting( pAdapter, pHalData->CurrentWirelessMode, &pAdapter->MgntInfo.Info8185.ChannelAccessSetting );
2965#endif
5f53d8ca
JC		 2966 //LZM 090306 usb crash here, mark it temp
2967 //write_nic_word(dev, SIFS_OFDM, 0x0e0e);
5f53d8ca
JC		 2968 priv->ieee80211->mode = wireless_mode;
2969
2970 if ((wireless_mode == WIRELESS_MODE_N_24G) || (wireless_mode == WIRELESS_MODE_N_5G))
2971 priv->ieee80211->pHTInfo->bEnableHT = 1;
2972 else
2973 priv->ieee80211->pHTInfo->bEnableHT = 0;
2974 RT_TRACE(COMP_INIT, "Current Wireless Mode is %x\n", wireless_mode);
2975 rtl8192_refresh_supportrate(priv);
2976#endif
2977
2978}
2979
2980
2981short rtl8192_is_tx_queue_empty(struct net_device *dev)
2982{
2983 int i=0;
2984 struct r8192_priv *priv = ieee80211_priv(dev);
2985 //struct ieee80211_device* ieee = priv->ieee80211;
2986 for (i=0; i<=MGNT_QUEUE; i++)
2987 {
2988 if ((i== TXCMD_QUEUE) || (i == HCCA_QUEUE) )
2989 continue;
2990 if (atomic_read(&priv->tx_pending[i]))
2991 {
2992 printk("===>tx queue is not empty:%d, %d\n", i, atomic_read(&priv->tx_pending[i]));
2993 return 0;
2994 }
2995 }
2996 return 1;
2997}
35c1b462 2998
5f53d8ca
JC		 2999void rtl8192_hw_sleep_down(struct net_device *dev)
3000{
3001 RT_TRACE(COMP_POWER, "%s()============>come to sleep down\n", __FUNCTION__);
3002#ifdef TODO
3003// MgntActSet_RF_State(dev, eRfSleep, RF_CHANGE_BY_PS);
3004#endif
3005}
1ec9e48d 3006
5f53d8ca
JC		 3007void rtl8192_hw_sleep_wq (struct work_struct *work)
3008{
3009// struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
3010// struct ieee80211_device * ieee = (struct ieee80211_device*)
3011// container_of(work, struct ieee80211_device, watch_dog_wq);
3012 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
3013 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_sleep_wq);
3014 struct net_device *dev = ieee->dev;
1ec9e48d 3015
5f53d8ca
JC		 3016 //printk("=========>%s()\n", __FUNCTION__);
3017 rtl8192_hw_sleep_down(dev);
3018}
3019// printk("dev is %d\n",dev);
3020// printk("&*&(^*(&(&=========>%s()\n", __FUNCTION__);
3021void rtl8192_hw_wakeup(struct net_device* dev)
3022{
3023// u32 flags = 0;
3024
3025// spin_lock_irqsave(&priv->ps_lock,flags);
3026 RT_TRACE(COMP_POWER, "%s()============>come to wake up\n", __FUNCTION__);
3027#ifdef TODO
3028// MgntActSet_RF_State(dev, eRfSleep, RF_CHANGE_BY_PS);
3029#endif
3030 //FIXME: will we send package stored while nic is sleep?
3031// spin_unlock_irqrestore(&priv->ps_lock,flags);
3032}
1ec9e48d 3033
5f53d8ca
JC		 3034void rtl8192_hw_wakeup_wq (struct work_struct *work)
3035{
3036// struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
3037// struct ieee80211_device * ieee = (struct ieee80211_device*)
3038// container_of(work, struct ieee80211_device, watch_dog_wq);
3039 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
3040 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_wakeup_wq);
3041 struct net_device *dev = ieee->dev;
5f53d8ca 3042
1ec9e48d 3043 rtl8192_hw_wakeup(dev);
5f53d8ca
JC		 3044}
3045
3046#define MIN_SLEEP_TIME 50
3047#define MAX_SLEEP_TIME 10000
3048void rtl8192_hw_to_sleep(struct net_device *dev, u32 th, u32 tl)
3049{
3050
3051 struct r8192_priv *priv = ieee80211_priv(dev);
3052
3053 u32 rb = jiffies;
3054 unsigned long flags;
3055
3056 spin_lock_irqsave(&priv->ps_lock,flags);
3057
3058 /* Writing HW register with 0 equals to disable
3059 * the timer, that is not really what we want
3060 */
3061 tl -= MSECS(4+16+7);
3062
3063 //if(tl == 0) tl = 1;
3064
3065 /* FIXME HACK FIXME HACK */
3066// force_pci_posting(dev);
3067 //mdelay(1);
3068
3069// rb = read_nic_dword(dev, TSFTR);
3070
3071 /* If the interval in witch we are requested to sleep is too
3072 * short then give up and remain awake
3073 */
3074 if(((tl>=rb)&& (tl-rb) <= MSECS(MIN_SLEEP_TIME))
3075 ||((rb>tl)&& (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
3076 spin_unlock_irqrestore(&priv->ps_lock,flags);
3077 printk("too short to sleep\n");
3078 return;
3079 }
3080
3081// write_nic_dword(dev, TimerInt, tl);
3082// rb = read_nic_dword(dev, TSFTR);
3083 {
3084 u32 tmp = (tl>rb)?(tl-rb):(rb-tl);
3085 // if (tl<rb)
3086
5f53d8ca 3087 queue_delayed_work(priv->ieee80211->wq, &priv->ieee80211->hw_wakeup_wq, tmp); //as tl may be less than rb
5f53d8ca
JC		 3088 }
3089 /* if we suspect the TimerInt is gone beyond tl
3090 * while setting it, then give up
3091 */
3092#if 1
3093 if(((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME)))||
3094 ((tl < rb) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))) {
3095 printk("========>too long to sleep:%x, %x, %lx\n", tl, rb, MSECS(MAX_SLEEP_TIME));
3096 spin_unlock_irqrestore(&priv->ps_lock,flags);
3097 return;
3098 }
3099#endif
3100// if(priv->rf_sleep)
3101// priv->rf_sleep(dev);
3102
3103 //printk("<=========%s()\n", __FUNCTION__);
5f53d8ca 3104 queue_delayed_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_sleep_wq,0);
1ec9e48d 3105
5f53d8ca
JC		 3106 spin_unlock_irqrestore(&priv->ps_lock,flags);
3107}
3108//init priv variables here. only non_zero value should be initialized here.
3109static void rtl8192_init_priv_variable(struct net_device* dev)
3110{
3111 struct r8192_priv *priv = ieee80211_priv(dev);
3112 u8 i;
3113 priv->card_8192 = NIC_8192U;
3114 priv->chan = 1; //set to channel 1
3115 priv->ieee80211->mode = WIRELESS_MODE_AUTO; //SET AUTO
3116 priv->ieee80211->iw_mode = IW_MODE_INFRA;
3117 priv->ieee80211->ieee_up=0;
3118 priv->retry_rts = DEFAULT_RETRY_RTS;
3119 priv->retry_data = DEFAULT_RETRY_DATA;
3120 priv->ieee80211->rts = DEFAULT_RTS_THRESHOLD;
3121 priv->ieee80211->rate = 110; //11 mbps
3122 priv->ieee80211->short_slot = 1;
3123 priv->promisc = (dev->flags & IFF_PROMISC) ? 1:0;
3124 priv->CckPwEnl = 6;
3125 //for silent reset
3126 priv->IrpPendingCount = 1;
3127 priv->ResetProgress = RESET_TYPE_NORESET;
3128 priv->bForcedSilentReset = 0;
3129 priv->bDisableNormalResetCheck = false;
3130 priv->force_reset = false;
3131
3132 priv->ieee80211->FwRWRF = 0; //we don't use FW read/write RF until stable firmware is available.
3133 priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
3134 priv->ieee80211->iw_mode = IW_MODE_INFRA;
3135 priv->ieee80211->softmac_features = IEEE_SOFTMAC_SCAN |
3136 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
3137 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE |
3138 IEEE_SOFTMAC_BEACONS;//added by amy 080604 //| //IEEE_SOFTMAC_SINGLE_QUEUE;
3139
3140 priv->ieee80211->active_scan = 1;
3141 priv->ieee80211->modulation = IEEE80211_CCK_MODULATION | IEEE80211_OFDM_MODULATION;
3142 priv->ieee80211->host_encrypt = 1;
3143 priv->ieee80211->host_decrypt = 1;
3144 priv->ieee80211->start_send_beacons = NULL;//rtl819xusb_beacon_tx;//-by amy 080604
3145 priv->ieee80211->stop_send_beacons = NULL;//rtl8192_beacon_stop;//-by amy 080604
3146 priv->ieee80211->softmac_hard_start_xmit = rtl8192_hard_start_xmit;
3147 priv->ieee80211->set_chan = rtl8192_set_chan;
3148 priv->ieee80211->link_change = priv->ops->rtl819x_link_change;
3149 priv->ieee80211->softmac_data_hard_start_xmit = rtl8192_hard_data_xmit;
3150 priv->ieee80211->data_hard_stop = rtl8192_data_hard_stop;
3151 priv->ieee80211->data_hard_resume = rtl8192_data_hard_resume;
3152 priv->ieee80211->init_wmmparam_flag = 0;
3153 priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
3154 priv->ieee80211->check_nic_enough_desc = check_nic_enough_desc;
3155 priv->ieee80211->tx_headroom = TX_PACKET_SHIFT_BYTES;
3156 priv->ieee80211->qos_support = 1;
3157
3158 //added by WB
3159// priv->ieee80211->SwChnlByTimerHandler = rtl8192_phy_SwChnl;
3160 priv->ieee80211->SetBWModeHandler = rtl8192_SetBWMode;
3161 priv->ieee80211->handle_assoc_response = rtl8192_handle_assoc_response;
3162 priv->ieee80211->handle_beacon = rtl8192_handle_beacon;
3163 //for LPS
3164 priv->ieee80211->sta_wake_up = rtl8192_hw_wakeup;
3165// priv->ieee80211->ps_request_tx_ack = rtl8192_rq_tx_ack;
3166 priv->ieee80211->enter_sleep_state = rtl8192_hw_to_sleep;
3167 priv->ieee80211->ps_is_queue_empty = rtl8192_is_tx_queue_empty;
3168 //added by david
3169 priv->ieee80211->GetNmodeSupportBySecCfg = GetNmodeSupportBySecCfg8192;
3170 priv->ieee80211->GetHalfNmodeSupportByAPsHandler = GetHalfNmodeSupportByAPs819xUsb;
3171 priv->ieee80211->SetWirelessMode = rtl8192_SetWirelessMode;
3172 //added by amy
3173 priv->ieee80211->InitialGainHandler = priv->ops->rtl819x_initial_gain;
3174 priv->card_type = USB;
3175
5f53d8ca
JC		 3176//1 RTL8192SU/
3177 priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
3178 priv->ieee80211->SetFwCmdHandler = HalSetFwCmd8192S;
3179 priv->bRFSiOrPi = 0;//o=si,1=pi;
3180 //lzm add
3181 priv->bInHctTest = false;
3182
3183 priv->MidHighPwrTHR_L1 = 0x3B;
3184 priv->MidHighPwrTHR_L2 = 0x40;
3185
3186 if(priv->bInHctTest)
3187 {
3188 priv->ShortRetryLimit = HAL_RETRY_LIMIT_AP_ADHOC;
3189 priv->LongRetryLimit = HAL_RETRY_LIMIT_AP_ADHOC;
3190 }
3191 else
3192 {
3193 priv->ShortRetryLimit = HAL_RETRY_LIMIT_INFRA;
3194 priv->LongRetryLimit = HAL_RETRY_LIMIT_INFRA;
3195 }
3196
3197 priv->SetFwCmdInProgress = false; //is set FW CMD in Progress? 92S only
3198 priv->CurrentFwCmdIO = 0;
3199
3200 priv->MinSpaceCfg = 0;
3201
3202 priv->EarlyRxThreshold = 7;
3203 priv->enable_gpio0 = 0;
3204 priv->TransmitConfig =
3205 ((u32)TCR_MXDMA_2048<<TCR_MXDMA_OFFSET) | // Max DMA Burst Size per Tx DMA Burst, 7: reservied.
3206 (priv->ShortRetryLimit<<TCR_SRL_OFFSET) | // Short retry limit
3207 (priv->LongRetryLimit<<TCR_LRL_OFFSET) | // Long retry limit
3208 (false ? TCR_SAT : 0); // FALSE: HW provies PLCP length and LENGEXT, TURE: SW proiveds them
3209 if(priv->bInHctTest)
3210 priv->ReceiveConfig = //priv->CSMethod |
3211 RCR_AMF | RCR_ADF | //RCR_AAP | //accept management/data
3212 RCR_ACF |RCR_APPFCS| //accept control frame for SW AP needs PS-poll, 2005.07.07, by rcnjko.
3213 RCR_AB | RCR_AM | RCR_APM | //accept BC/MC/UC
3214 RCR_AICV | RCR_ACRC32 | //accept ICV/CRC error packet
3215 RCR_APP_PHYST_STAFF | RCR_APP_PHYST_RXFF | // Accept PHY status
3216 ((u32)7<<RCR_MXDMA_OFFSET) | // Max DMA Burst Size per Rx DMA Burst, 7: unlimited.
3217 (priv->EarlyRxThreshold<<RCR_FIFO_OFFSET) | // Rx FIFO Threshold, 7: No Rx threshold.
3218 (priv->EarlyRxThreshold == 7 ? RCR_OnlyErlPkt:0);
3219 else
3220 priv->ReceiveConfig = //priv->CSMethod |
3221 RCR_AMF | RCR_ADF | RCR_AB |
3222 RCR_AM | RCR_APM |RCR_AAP |RCR_ADD3|RCR_APP_ICV|
3223 RCR_APP_PHYST_STAFF | RCR_APP_PHYST_RXFF | // Accept PHY status
3224 RCR_APP_MIC | RCR_APPFCS;
3225
3226 // <Roger_EXP> 2008.06.16.
3227 priv->IntrMask = (u16)(IMR_ROK | IMR_VODOK | IMR_VIDOK | IMR_BEDOK | IMR_BKDOK | \
3228 IMR_HCCADOK | IMR_MGNTDOK | IMR_COMDOK | IMR_HIGHDOK | \
3229 IMR_BDOK | IMR_RXCMDOK | /*IMR_TIMEOUT0 |*/ IMR_RDU | IMR_RXFOVW | \
3230 IMR_TXFOVW | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
3231
3232//1 End
3233
5f53d8ca
JC		 3234
3235 priv->AcmControl = 0;
3236 priv->pFirmware = (rt_firmware*)vmalloc(sizeof(rt_firmware));
3237 if (priv->pFirmware)
3238 memset(priv->pFirmware, 0, sizeof(rt_firmware));
3239
3240 /* rx related queue */
3241 skb_queue_head_init(&priv->rx_queue);
3242 skb_queue_head_init(&priv->skb_queue);
3243
3244 /* Tx related queue */
3245 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
3246 skb_queue_head_init(&priv->ieee80211->skb_waitQ [i]);
3247 }
3248 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
3249 skb_queue_head_init(&priv->ieee80211->skb_aggQ [i]);
3250 }
3251 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
3252 skb_queue_head_init(&priv->ieee80211->skb_drv_aggQ [i]);
3253 }
3254 priv->rf_set_chan = rtl8192_phy_SwChnl;
3255}
3256
3257//init lock here
3258static void rtl8192_init_priv_lock(struct r8192_priv* priv)
3259{
3260 spin_lock_init(&priv->tx_lock);
3261 spin_lock_init(&priv->irq_lock);//added by thomas
3262 //spin_lock_init(&priv->rf_lock);//use rf_sem, or will crash in some OS.
3263 sema_init(&priv->wx_sem,1);
3264 sema_init(&priv->rf_sem,1);
3265 spin_lock_init(&priv->ps_lock);
5f53d8ca 3266 mutex_init(&priv->mutex);
5f53d8ca
JC		 3267}
3268
5f53d8ca 3269extern void rtl819x_watchdog_wqcallback(struct work_struct *work);
5f53d8ca
JC		 3270
3271void rtl8192_irq_rx_tasklet(struct r8192_priv *priv);
3272//init tasklet and wait_queue here. only 2.6 above kernel is considered
3273#define DRV_NAME "wlan0"
3274static void rtl8192_init_priv_task(struct net_device* dev)
3275{
3276 struct r8192_priv *priv = ieee80211_priv(dev);
3277
5f53d8ca
JC		 3278#ifdef PF_SYNCTHREAD
3279 priv->priv_wq = create_workqueue(DRV_NAME,0);
3280#else
3281 priv->priv_wq = create_workqueue(DRV_NAME);
3282#endif
5f53d8ca 3283
5f53d8ca
JC		 3284 INIT_WORK(&priv->reset_wq, rtl8192_restart);
3285
3286 //INIT_DELAYED_WORK(&priv->watch_dog_wq, hal_dm_watchdog);
3287 INIT_DELAYED_WORK(&priv->watch_dog_wq, rtl819x_watchdog_wqcallback);
3288 INIT_DELAYED_WORK(&priv->txpower_tracking_wq, dm_txpower_trackingcallback);
3289// INIT_DELAYED_WORK(&priv->gpio_change_rf_wq, dm_gpio_change_rf_callback);
3290 INIT_DELAYED_WORK(&priv->rfpath_check_wq, dm_rf_pathcheck_workitemcallback);
3291 INIT_DELAYED_WORK(&priv->update_beacon_wq, rtl8192_update_beacon);
3292 INIT_DELAYED_WORK(&priv->initialgain_operate_wq, InitialGainOperateWorkItemCallBack);
3293 //INIT_WORK(&priv->SwChnlWorkItem, rtl8192_SwChnl_WorkItem);
3294 //INIT_WORK(&priv->SetBWModeWorkItem, rtl8192_SetBWModeWorkItem);
3295 INIT_WORK(&priv->qos_activate, rtl8192_qos_activate);
3296 INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq,(void*) rtl8192_hw_wakeup_wq);
3297 INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq,(void*) rtl8192_hw_sleep_wq);
3298
5f53d8ca
JC		 3299 tasklet_init(&priv->irq_rx_tasklet,
3300 (void(*)(unsigned long))rtl8192_irq_rx_tasklet,
3301 (unsigned long)priv);
3302}
3303
3304static void rtl8192_get_eeprom_size(struct net_device* dev)
3305{
3306 u16 curCR = 0;
3307 struct r8192_priv *priv = ieee80211_priv(dev);
3308 RT_TRACE(COMP_EPROM, "===========>%s()\n", __FUNCTION__);
3309 curCR = read_nic_word_E(dev,EPROM_CMD);
3310 RT_TRACE(COMP_EPROM, "read from Reg EPROM_CMD(%x):%x\n", EPROM_CMD, curCR);
3311 //whether need I consider BIT5?
3312 priv->epromtype = (curCR & Cmd9346CR_9356SEL) ? EPROM_93c56 : EPROM_93c46;
3313 RT_TRACE(COMP_EPROM, "<===========%s(), epromtype:%d\n", __FUNCTION__, priv->epromtype);
3314}
3315
3316//used to swap endian. as ntohl & htonl are not neccessary to swap endian, so use this instead.
3317static inline u16 endian_swap(u16* data)
3318{
3319 u16 tmp = *data;
3320 *data = (tmp >> 8) | (tmp << 8);
3321 return *data;
3322}
3323
5f53d8ca
JC		 3324u8 rtl8192SU_UsbOptionToEndPointNumber(u8 UsbOption)
3325{
3326 u8 nEndPoint = 0;
3327 switch(UsbOption)
3328 {
3329 case 0:
3330 nEndPoint = 6;
3331 break;
3332 case 1:
3333 nEndPoint = 11;
3334 break;
3335 case 2:
3336 nEndPoint = 4;
3337 break;
3338 default:
3339 RT_TRACE(COMP_INIT, "UsbOptionToEndPointNumber(): Invalid UsbOption(%#x)\n", UsbOption);
3340 break;
3341 }
3342 return nEndPoint;
3343}
3344
3345u8 rtl8192SU_BoardTypeToRFtype(struct net_device* dev, u8 Boardtype)
3346{
3347 u8 RFtype = RF_1T2R;
3348
3349 switch(Boardtype)
3350 {
3351 case 0:
3352 RFtype = RF_1T1R;
3353 break;
3354 case 1:
3355 RFtype = RF_1T2R;
3356 break;
3357 case 2:
3358 RFtype = RF_2T2R;
3359 break;
3360 case 3:
3361 RFtype = RF_2T2R_GREEN;
3362 break;
3363 default:
3364 break;
3365 }
3366
3367 return RFtype;
3368}
3369
88e05d85
DC		 3370void update_hal_variables(struct r8192_priv *priv)
3371{
3372 int rf_path;
3373 int i;
3374 u8 index;
3375
3376 for (rf_path = 0; rf_path < 2; rf_path++) {
3377 for (i = 0; i < 3; i++) {
3378 RT_TRACE((COMP_INIT), "CCK RF-%d CHan_Area-%d = 0x%x\n", rf_path, i, priv->RfCckChnlAreaTxPwr[rf_path][i]);
3379 RT_TRACE((COMP_INIT), "OFDM-1T RF-%d CHan_Area-%d = 0x%x\n", rf_path, i, priv->RfOfdmChnlAreaTxPwr1T[rf_path][i]);
3380 RT_TRACE((COMP_INIT), "OFDM-2T RF-%d CHan_Area-%d = 0x%x\n", rf_path, i, priv->RfOfdmChnlAreaTxPwr2T[rf_path][i]);
3381 }
3382 /* Assign dedicated channel tx power */
3383 for(i = 0; i < 14; i++) {
3384 /* channel 1-3 use the same Tx Power Level. */
3385 if (i < 3) /* Channel 1-3 */
3386 index = 0;
3387 else if (i < 9) /* Channel 4-9 */
3388 index = 1;
3389 else /* Channel 10-14 */
3390 index = 2;
3391 /* Record A & B CCK /OFDM - 1T/2T Channel area tx power */
3392 priv->RfTxPwrLevelCck[rf_path][i] = priv->RfCckChnlAreaTxPwr[rf_path][index];
3393 priv->RfTxPwrLevelOfdm1T[rf_path][i] = priv->RfOfdmChnlAreaTxPwr1T[rf_path][index];
3394 priv->RfTxPwrLevelOfdm2T[rf_path][i] = priv->RfOfdmChnlAreaTxPwr2T[rf_path][index];
3395 if (rf_path == 0) {
3396 priv->TxPowerLevelOFDM24G[i] = priv->RfTxPwrLevelOfdm1T[rf_path][i] ;
3397 priv->TxPowerLevelCCK[i] = priv->RfTxPwrLevelCck[rf_path][i];
3398 }
3399 }
3400 for(i = 0; i < 14; i++) {
3401 RT_TRACE((COMP_INIT),
3402 "Rf-%d TxPwr CH-%d CCK OFDM_1T OFDM_2T= 0x%x/0x%x/0x%x\n",
3403 rf_path, i, priv->RfTxPwrLevelCck[rf_path][i],
3404 priv->RfTxPwrLevelOfdm1T[rf_path][i] ,
3405 priv->RfTxPwrLevelOfdm2T[rf_path][i] );
3406 }
3407 }
3408}
3409
5f53d8ca
JC		 3410//
3411// Description:
3412// Config HW adapter information into initial value.
3413//
3414// Assumption:
3415// 1. After Auto load fail(i.e, check CR9346 fail)
3416//
3417// Created by Roger, 2008.10.21.
3418//
3419void
3420rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(struct net_device* dev)
3421{
3422 struct r8192_priv *priv = ieee80211_priv(dev);
3423 //u16 i,usValue;
3424 //u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x92, 0x00};
88e05d85 3425 u8 rf_path; // For EEPROM/EFUSE After V0.6_1117
5f53d8ca
JC		 3426 int i;
3427
3428 RT_TRACE(COMP_INIT, "====> ConfigAdapterInfo8192SForAutoLoadFail\n");
3429
3430 write_nic_byte(dev, SYS_ISO_CTRL+1, 0xE8); // Isolation signals from Loader
3431 //PlatformStallExecution(10000);
3432 mdelay(10);
3433 write_nic_byte(dev, PMC_FSM, 0x02); // Enable Loader Data Keep
3434
3435 //RT_ASSERT(priv->AutoloadFailFlag==TRUE, ("ReadAdapterInfo8192SEEPROM(): AutoloadFailFlag !=TRUE\n"));
3436
3437 // Initialize IC Version && Channel Plan
3438 priv->eeprom_vid = 0;
3439 priv->eeprom_pid = 0;
3440 priv->card_8192_version = 0;
3441 priv->eeprom_ChannelPlan = 0;
3442 priv->eeprom_CustomerID = 0;
3443 priv->eeprom_SubCustomerID = 0;
3444 priv->bIgnoreDiffRateTxPowerOffset = false;
3445
3446 RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid);
3447 RT_TRACE(COMP_INIT, "EEPROM PID = 0x%4x\n", priv->eeprom_pid);
3448 RT_TRACE(COMP_INIT, "EEPROM Customer ID: 0x%2x\n", priv->eeprom_CustomerID);
3449 RT_TRACE(COMP_INIT, "EEPROM SubCustomer ID: 0x%2x\n", priv->eeprom_SubCustomerID);
3450 RT_TRACE(COMP_INIT, "EEPROM ChannelPlan = 0x%4x\n", priv->eeprom_ChannelPlan);
3451 RT_TRACE(COMP_INIT, "IgnoreDiffRateTxPowerOffset = %d\n", priv->bIgnoreDiffRateTxPowerOffset);
3452
3453
3454
3455 priv->EEPROMUsbOption = EEPROM_USB_Default_OPTIONAL_FUNC;
3456 RT_TRACE(COMP_INIT, "USB Option = %#x\n", priv->EEPROMUsbOption);
3457
35c1b462
BZ		 3458 for(i=0; i<5; i++)
3459 priv->EEPROMUsbPhyParam[i] = EEPROM_USB_Default_PHY_PARAM;
5f53d8ca 3460
35c1b462 3461 //RT_PRINT_DATA(COMP_INIT|COMP_EFUSE, DBG_LOUD, ("EFUSE USB PHY Param: \n"), priv->EEPROMUsbPhyParam, 5);
5f53d8ca 3462
35c1b462
BZ		 3463 {
3464 //<Roger_Notes> In this case, we random assigh MAC address here. 2008.10.15.
5f53d8ca
JC		 3465 static u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x92, 0x00};
3466 u8 i;
3467
35c1b462 3468 //sMacAddr[5] = (u8)GetRandomNumber(1, 254);
5f53d8ca
JC		 3469
3470 for(i = 0; i < 6; i++)
3471 dev->dev_addr[i] = sMacAddr[i];
3472 }
5f53d8ca
JC		 3473 //NicIFSetMacAddress(Adapter, Adapter->PermanentAddress);
3474 write_nic_dword(dev, IDR0, ((u32*)dev->dev_addr)[0]);
3475 write_nic_word(dev, IDR4, ((u16*)(dev->dev_addr + 4))[0]);
3476
6756993b
HS		 3477 RT_TRACE(COMP_INIT,
3478 "ReadAdapterInfo8192SEFuse(), Permanent Address = %pM\n",
3479 dev->dev_addr);
5f53d8ca 3480
35c1b462
BZ		 3481 priv->EEPROMBoardType = EEPROM_Default_BoardType;
3482 priv->rf_type = RF_1T2R; //RF_2T2R
3483 priv->EEPROMTxPowerDiff = EEPROM_Default_PwDiff;
3484 priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
3485 priv->EEPROMCrystalCap = EEPROM_Default_CrystalCap;
3486 priv->EEPROMTxPwrBase = EEPROM_Default_TxPowerBase;
3487 priv->EEPROMTSSI_A = EEPROM_Default_TSSI;
3488 priv->EEPROMTSSI_B = EEPROM_Default_TSSI;
3489 priv->EEPROMTxPwrTkMode = EEPROM_Default_TxPwrTkMode;
5f53d8ca 3490
5f53d8ca 3491
5f53d8ca 3492
35c1b462
BZ		 3493 for (rf_path = 0; rf_path < 2; rf_path++)
3494 {
3495 for (i = 0; i < 3; i++)
5f53d8ca 3496 {
35c1b462
BZ		 3497 // Read CCK RF A & B Tx power
3498 priv->RfCckChnlAreaTxPwr[rf_path][i] =
3499 priv->RfOfdmChnlAreaTxPwr1T[rf_path][i] =
3500 priv->RfOfdmChnlAreaTxPwr2T[rf_path][i] =
3501 (u8)(EEPROM_Default_TxPower & 0xff);
5f53d8ca 3502 }
35c1b462 3503 }
5f53d8ca 3504
88e05d85 3505 update_hal_variables(priv);
5f53d8ca 3506
35c1b462
BZ		 3507 //
3508 // Update remained HAL variables.
3509 //
3510 priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
3511 priv->LegacyHTTxPowerDiff = priv->EEPROMTxPowerDiff;//new
3512 priv->TxPowerDiff = priv->EEPROMTxPowerDiff;
3513 //priv->AntennaTxPwDiff[0] = (priv->EEPROMTxPowerDiff & 0xf);// Antenna B gain offset to antenna A, bit0~3
3514 //priv->AntennaTxPwDiff[1] = ((priv->EEPROMTxPowerDiff & 0xf0)>>4);// Antenna C gain offset to antenna A, bit4~7
3515 priv->CrystalCap = priv->EEPROMCrystalCap; // CrystalCap, bit12~15
3516 priv->ThermalMeter[0] = priv->EEPROMThermalMeter;// ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
5f53d8ca
JC		 3517 priv->LedStrategy = SW_LED_MODE0;
3518
3519 init_rate_adaptive(dev);
3520
35c1b462 3521 RT_TRACE(COMP_INIT, "<==== ConfigAdapterInfo8192SForAutoLoadFail\n");
5f53d8ca
JC		 3522
3523}
5f53d8ca
JC		 3524
3525//
3526// Description:
3527// Read HW adapter information by E-Fuse or EEPROM according CR9346 reported.
3528//
3529// Assumption:
3530// 1. CR9346 regiser has verified.
3531// 2. PASSIVE_LEVEL (USB interface)
3532//
3533// Created by Roger, 2008.10.21.
3534//
3535void
3536rtl8192SU_ReadAdapterInfo8192SUsb(struct net_device* dev)
3537{
3538 struct r8192_priv *priv = ieee80211_priv(dev);
3539 u16 i,usValue;
3540 u8 tmpU1b, tempval;
3541 u16 EEPROMId;
3542 u8 hwinfo[HWSET_MAX_SIZE_92S];
3543 u8 rf_path, index; // For EEPROM/EFUSE After V0.6_1117
3544
3545
3546 RT_TRACE(COMP_INIT, "====> ReadAdapterInfo8192SUsb\n");
3547
3548 //
3549 // <Roger_Note> The following operation are prevent Efuse leakage by turn on 2.5V.
3550 // 2008.11.25.
3551 //
3552 tmpU1b = read_nic_byte(dev, EFUSE_TEST+3);
3553 write_nic_byte(dev, EFUSE_TEST+3, tmpU1b|0x80);
3554 //PlatformStallExecution(1000);
3555 mdelay(10);
3556 write_nic_byte(dev, EFUSE_TEST+3, (tmpU1b&(~BIT7)));
3557
3558 // Retrieve Chip version.
3559 priv->card_8192_version = (VERSION_8192S)((read_nic_dword(dev, PMC_FSM)>>16)&0xF);
3560 RT_TRACE(COMP_INIT, "Chip Version ID: 0x%2x\n", priv->card_8192_version);
3561
3562 switch(priv->card_8192_version)
3563 {
3564 case 0:
3565 RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_ACUT.\n");
3566 break;
3567 case 1:
3568 RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_BCUT.\n");
3569 break;
3570 case 2:
3571 RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_CCUT.\n");
3572 break;
3573 default:
3574 RT_TRACE(COMP_INIT, "Unknown Chip Version!!\n");
3575 priv->card_8192_version = VERSION_8192S_BCUT;
3576 break;
3577 }
3578
3579 //if (IS_BOOT_FROM_EEPROM(Adapter))
3580 if(priv->EepromOrEfuse)
3581 { // Read frin EEPROM
3582 write_nic_byte(dev, SYS_ISO_CTRL+1, 0xE8); // Isolation signals from Loader
3583 //PlatformStallExecution(10000);
3584 mdelay(10);
3585 write_nic_byte(dev, PMC_FSM, 0x02); // Enable Loader Data Keep
3586 // Read all Content from EEPROM or EFUSE.
3587 for(i = 0; i < HWSET_MAX_SIZE_92S; i += 2)
3588 {
3589 usValue = eprom_read(dev, (u16) (i>>1));
3590 *((u16*)(&hwinfo[i])) = usValue;
3591 }
3592 }
3593 else if (!(priv->EepromOrEfuse))
3594 { // Read from EFUSE
3595
3596 //
3597 // <Roger_Notes> We set Isolation signals from Loader and reset EEPROM after system resuming
3598 // from suspend mode.
3599 // 2008.10.21.
3600 //
3601 //PlatformEFIOWrite1Byte(Adapter, SYS_ISO_CTRL+1, 0xE8); // Isolation signals from Loader
3602 //PlatformStallExecution(10000);
3603 //PlatformEFIOWrite1Byte(Adapter, SYS_FUNC_EN+1, 0x40);
3604 //PlatformEFIOWrite1Byte(Adapter, SYS_FUNC_EN+1, 0x50);
3605
3606 //tmpU1b = PlatformEFIORead1Byte(Adapter, EFUSE_TEST+3);
3607 //PlatformEFIOWrite1Byte(Adapter, EFUSE_TEST+3, (tmpU1b | 0x80));
3608 //PlatformEFIOWrite1Byte(Adapter, EFUSE_TEST+3, 0x72);
3609 //PlatformEFIOWrite1Byte(Adapter, EFUSE_CLK, 0x03);
3610
3611 // Read EFUSE real map to shadow.
3612 EFUSE_ShadowMapUpdate(dev);
3613 memcpy(hwinfo, &priv->EfuseMap[EFUSE_INIT_MAP][0], HWSET_MAX_SIZE_92S);
3614 }
3615 else
3616 {
3617 RT_TRACE(COMP_INIT, "ReadAdapterInfo8192SUsb(): Invalid boot type!!\n");
3618 }
3619
3620 //YJ,test,090106
3621 //dump_buf(hwinfo,HWSET_MAX_SIZE_92S);
3622 //
3623 // <Roger_Notes> The following are EFUSE/EEPROM independent operations!!
3624 //
3625 //RT_PRINT_DATA(COMP_EFUSE, DBG_LOUD, ("MAP: \n"), hwinfo, HWSET_MAX_SIZE_92S);
3626
3627 //
3628 // <Roger_Notes> Event though CR9346 regiser can verify whether Autoload is success or not, but we still
3629 // double check ID codes for 92S here(e.g., due to HW GPIO polling fail issue).
3630 // 2008.10.21.
3631 //
3632 EEPROMId = *((u16 *)&hwinfo[0]);
3633
3634 if( EEPROMId != RTL8190_EEPROM_ID )
3635 {
3636 RT_TRACE(COMP_INIT, "ID(%#x) is invalid!!\n", EEPROMId);
3637 priv->bTXPowerDataReadFromEEPORM = FALSE;
3638 priv->AutoloadFailFlag=TRUE;
3639 }
3640 else
3641 {
3642 priv->AutoloadFailFlag=FALSE;
5f53d8ca 3643 priv->bTXPowerDataReadFromEEPORM = TRUE;
5f53d8ca
JC		 3644 }
3645 // Read IC Version && Channel Plan
3646 if(!priv->AutoloadFailFlag)
3647 {
3648 // VID, PID
3649 priv->eeprom_vid = *(u16 *)&hwinfo[EEPROM_VID];
3650 priv->eeprom_pid = *(u16 *)&hwinfo[EEPROM_PID];
3651 priv->bIgnoreDiffRateTxPowerOffset = false; //cosa for test
3652
3653
3654 // EEPROM Version ID, Channel plan
3655 priv->EEPROMVersion = *(u8 *)&hwinfo[EEPROM_Version];
3656 priv->eeprom_ChannelPlan = *(u8 *)&hwinfo[EEPROM_ChannelPlan];
3657
3658 // Customer ID, 0x00 and 0xff are reserved for Realtek.
3659 priv->eeprom_CustomerID = *(u8 *)&hwinfo[EEPROM_CustomID];
3660 priv->eeprom_SubCustomerID = *(u8 *)&hwinfo[EEPROM_SubCustomID];
3661 }
3662 else
3663 {
3664 //priv->eeprom_vid = 0;
3665 //priv->eeprom_pid = 0;
3666 //priv->EEPROMVersion = 0;
3667 //priv->eeprom_ChannelPlan = 0;
3668 //priv->eeprom_CustomerID = 0;
3669 //priv->eeprom_SubCustomerID = 0;
3670
3671 rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(dev);
3672 return;
3673 }
3674
3675
3676 RT_TRACE(COMP_INIT, "EEPROM Id = 0x%4x\n", EEPROMId);
3677 RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid);
3678 RT_TRACE(COMP_INIT, "EEPROM PID = 0x%4x\n", priv->eeprom_pid);
3679 RT_TRACE(COMP_INIT, "EEPROM Version ID: 0x%2x\n", priv->EEPROMVersion);
3680 RT_TRACE(COMP_INIT, "EEPROM Customer ID: 0x%2x\n", priv->eeprom_CustomerID);
3681 RT_TRACE(COMP_INIT, "EEPROM SubCustomer ID: 0x%2x\n", priv->eeprom_SubCustomerID);
3682 RT_TRACE(COMP_INIT, "EEPROM ChannelPlan = 0x%4x\n", priv->eeprom_ChannelPlan);
3683 RT_TRACE(COMP_INIT, "bIgnoreDiffRateTxPowerOffset = %d\n", priv->bIgnoreDiffRateTxPowerOffset);
3684
3685
3686 // Read USB optional function.
3687 if(!priv->AutoloadFailFlag)
3688 {
3689 priv->EEPROMUsbOption = *(u8 *)&hwinfo[EEPROM_USB_OPTIONAL];
3690 }
3691 else
3692 {
3693 priv->EEPROMUsbOption = EEPROM_USB_Default_OPTIONAL_FUNC;
3694 }
3695
3696
3697 priv->EEPROMUsbEndPointNumber = rtl8192SU_UsbOptionToEndPointNumber((priv->EEPROMUsbOption&EEPROM_EP_NUMBER)>>3);
3698
3699 RT_TRACE(COMP_INIT, "USB Option = %#x\n", priv->EEPROMUsbOption);
3700 RT_TRACE(COMP_INIT, "EndPoint Number = %#x\n", priv->EEPROMUsbEndPointNumber);
3701
3702#ifdef TO_DO_LIST
3703 //
3704 // Decide CustomerID according to VID/DID or EEPROM
3705 //
3706 switch(pHalData->EEPROMCustomerID)
3707 {
3708 case EEPROM_CID_ALPHA:
3709 pMgntInfo->CustomerID = RT_CID_819x_ALPHA;
3710 break;
3711
3712 case EEPROM_CID_CAMEO:
3713 pMgntInfo->CustomerID = RT_CID_819x_CAMEO;
3714 break;
3715
3716 case EEPROM_CID_SITECOM:
3717 pMgntInfo->CustomerID = RT_CID_819x_Sitecom;
3718 RT_TRACE(COMP_INIT, DBG_LOUD, ("CustomerID = 0x%4x\n", pMgntInfo->CustomerID));
3719
3720 break;
3721
3722 case EEPROM_CID_WHQL:
3723 Adapter->bInHctTest = TRUE;
3724
3725 pMgntInfo->bSupportTurboMode = FALSE;
3726 pMgntInfo->bAutoTurboBy8186 = FALSE;
3727
3728 pMgntInfo->PowerSaveControl.bInactivePs = FALSE;
3729 pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE;
3730 pMgntInfo->PowerSaveControl.bLeisurePs = FALSE;
3731 pMgntInfo->keepAliveLevel = 0;
3732 break;
3733
3734 default:
3735 pMgntInfo->CustomerID = RT_CID_DEFAULT;
3736 break;
3737
3738 }
3739
3740 //
3741 // Led mode
3742 //
3743 switch(pMgntInfo->CustomerID)
3744 {
3745 case RT_CID_DEFAULT:
3746 case RT_CID_819x_ALPHA:
3747 pHalData->LedStrategy = SW_LED_MODE1;
3748 pHalData->bRegUseLed = TRUE;
3749 pHalData->SwLed1.bLedOn = TRUE;
3750 break;
3751 case RT_CID_819x_CAMEO:
3752 pHalData->LedStrategy = SW_LED_MODE1;
3753 pHalData->bRegUseLed = TRUE;
3754 break;
3755
3756 case RT_CID_819x_Sitecom:
3757 pHalData->LedStrategy = SW_LED_MODE2;
3758 pHalData->bRegUseLed = TRUE;
3759 break;
3760
3761 default:
3762 pHalData->LedStrategy = SW_LED_MODE0;
3763 break;
3764 }
3765#endif
3766
3767 // Read USB PHY parameters.
3768 for(i=0; i<5; i++)
3769 priv->EEPROMUsbPhyParam[i] = *(u8 *)&hwinfo[EEPROM_USB_PHY_PARA1+i];
3770
3771 //RT_PRINT_DATA(COMP_EFUSE, DBG_LOUD, ("USB PHY Param: \n"), pHalData->EEPROMUsbPhyParam, 5);
3772
3773
3774 //Read Permanent MAC address
3775 for(i=0; i<6; i++)
3776 dev->dev_addr[i] = *(u8 *)&hwinfo[EEPROM_NODE_ADDRESS_BYTE_0+i];
3777
3778 //NicIFSetMacAddress(Adapter, Adapter->PermanentAddress);
3779 write_nic_dword(dev, IDR0, ((u32*)dev->dev_addr)[0]);
3780 write_nic_word(dev, IDR4, ((u16*)(dev->dev_addr + 4))[0]);
3781
6756993b
HS		 3782 RT_TRACE(COMP_INIT,
3783 "ReadAdapterInfo8192SEFuse(), Permanent Address = %pM\n",
3784 dev->dev_addr);
5f53d8ca
JC		 3785
3786 //
3787 // Get CustomerID(Boad Type)
3788 // i.e., 0x0: RTL8188SU, 0x1: RTL8191SU, 0x2: RTL8192SU, 0x3: RTL8191GU.
3789 // Others: Reserved. Default is 0x2: RTL8192SU.
3790 //
3791 //if(!priv->AutoloadFailFlag)
3792 //{
3793 priv->EEPROMBoardType = *(u8 *)&hwinfo[EEPROM_BoardType];
3794 priv->rf_type = rtl8192SU_BoardTypeToRFtype(dev, priv->EEPROMBoardType);
3795 //}
3796 //else
3797 //{
3798 // priv->EEPROMBoardType = EEPROM_Default_BoardType;
3799 // priv->rf_type = RF_1T2R;
3800 //}
3801
5f53d8ca 3802 priv->rf_chip = RF_6052;
5f53d8ca
JC		 3803
3804 priv->rf_chip = RF_6052;//lzm test
3805 RT_TRACE(COMP_INIT, "BoardType = 0x%2x\n", priv->EEPROMBoardType);
3806 RT_TRACE(COMP_INIT, "RF_Type = 0x%2x\n", priv->rf_type);
3807
3808 //
3809 // Read antenna tx power offset of B/C/D to A from EEPROM
3810 // and read ThermalMeter from EEPROM
3811 //
3812 //if(!priv->AutoloadFailFlag)
3813 {
3814 priv->EEPROMTxPowerDiff = *(u8 *)&hwinfo[EEPROM_PwDiff];
3815 priv->EEPROMThermalMeter = *(u8 *)&hwinfo[EEPROM_ThermalMeter];
3816 }
3817 //else
3818 //{
3819 // priv->EEPROMTxPowerDiff = EEPROM_Default_PwDiff;
3820 // priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
3821 //}
3822
3823 RT_TRACE(COMP_INIT, "PwDiff = %#x\n", priv->EEPROMTxPowerDiff);
3824 RT_TRACE(COMP_INIT, "ThermalMeter = %#x\n", priv->EEPROMThermalMeter);
3825
3826 //
3827 // Read Tx Power gain offset of legacy OFDM to HT rate.
3828 // Read CrystalCap from EEPROM
3829 //
3830 //if(!priv->AutoloadFailFlag)
3831 {
3832 priv->EEPROMCrystalCap = *(u8 *)&hwinfo[EEPROM_CrystalCap];
3833 }
3834 //else
3835 //{
3836 // priv->EEPROMCrystalCap = EEPROM_Default_CrystalCap;
3837 //}
3838
3839 RT_TRACE(COMP_INIT, "CrystalCap = %#x\n", priv->EEPROMCrystalCap);
3840
3841 //
3842 // Get Tx Power Base.
3843 //
3844 //if(!priv->AutoloadFailFlag)
3845 {
3846 priv->EEPROMTxPwrBase = *(u8 *)&hwinfo[EEPROM_TxPowerBase];
3847 }
3848 //else
3849 //{
3850 // priv->EEPROMTxPwrBase = EEPROM_Default_TxPowerBase;
3851 //}
3852
3853 RT_TRACE(COMP_INIT, "TxPwrBase = %#x\n", priv->EEPROMTxPwrBase);
3854
3855
3856 //
3857 // Get TSSI value for each path.
3858 //
3859 //if(!priv->AutoloadFailFlag)
3860 {
3861 priv->EEPROMTSSI_A = *(u8 *)&hwinfo[EEPROM_TSSI_A];
3862 priv->EEPROMTSSI_B = *(u8 *)&hwinfo[EEPROM_TSSI_B];
3863 }
3864 //else
3865 //{ // Default setting for Empty EEPROM
3866 // priv->EEPROMTSSI_A = EEPROM_Default_TSSI;
3867 // priv->EEPROMTSSI_B = EEPROM_Default_TSSI;
3868 //}
3869
3870 RT_TRACE(COMP_INIT, "TSSI_A = %#x, TSSI_B = %#x\n", priv->EEPROMTSSI_A, priv->EEPROMTSSI_B);
3871
3872 //
3873 // Get Tx Power tracking mode.
3874 //
3875 //if(!priv->AutoloadFailFlag)
3876 {
3877 priv->EEPROMTxPwrTkMode = *(u8 *)&hwinfo[EEPROM_TxPwTkMode];
3878 }
3879
3880 RT_TRACE(COMP_INIT, "TxPwrTkMod = %#x\n", priv->EEPROMTxPwrTkMode);
3881
3882
5f53d8ca
JC		 3883 {
3884 //
3885 // Buffer TxPwIdx(i.e., from offset 0x55~0x66, total 18Bytes)
3886 // Update CCK, OFDM (1T/2T)Tx Power Index from above buffer.
3887 //
3888
3889 //
3890 // Get Tx Power Level by Channel
3891 //
3892 //if(!priv->AutoloadFailFlag)
3893 {
3894 // Read Tx power of Channel 1 ~ 14 from EFUSE.
3895 // 92S suupport RF A & B
3896 for (rf_path = 0; rf_path < 2; rf_path++)
3897 {
3898 for (i = 0; i < 3; i++)
3899 {
3900 // Read CCK RF A & B Tx power
3901 priv->RfCckChnlAreaTxPwr[rf_path][i] =
3902 hwinfo[EEPROM_TxPwIndex+rf_path*3+i];
3903
3904 // Read OFDM RF A & B Tx power for 1T
3905 priv->RfOfdmChnlAreaTxPwr1T[rf_path][i] =
3906 hwinfo[EEPROM_TxPwIndex+6+rf_path*3+i];
3907
3908 // Read OFDM RF A & B Tx power for 2T
3909 priv->RfOfdmChnlAreaTxPwr2T[rf_path][i] =
3910 hwinfo[EEPROM_TxPwIndex+12+rf_path*3+i];
3911 }
3912 }
3913
3914 }
88e05d85 3915 update_hal_variables(priv);
5f53d8ca
JC		 3916 }
3917
3918 //
3919 // 2009/02/09 Cosa add for new EEPROM format
3920 //
3921 for(i=0; i<14; i++) // channel 1~3 use the same Tx Power Level.
3922 {
3923 // Read tx power difference between HT OFDM 20/40 MHZ
3924 if (i < 3) // Cjanel 1-3
3925 index = 0;
3926 else if (i < 9) // Channel 4-9
3927 index = 1;
3928 else // Channel 10-14
3929 index = 2;
3930
3931 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_HT20_DIFF+index])&0xff;
3932 priv->TxPwrHt20Diff[RF90_PATH_A][i] = (tempval&0xF);
3933 priv->TxPwrHt20Diff[RF90_PATH_B][i] = ((tempval>>4)&0xF);
3934
3935 // Read OFDM<->HT tx power diff
3936 if (i < 3) // Cjanel 1-3
3937 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_OFDM_DIFF])&0xff;
3938 else if (i < 9) // Channel 4-9
3939 tempval = (*(u8 *)&hwinfo[EEPROM_PwDiff])&0xff;
3940 else // Channel 10-14
3941 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_OFDM_DIFF+1])&0xff;
3942
3943 //cosa tempval = (*(u1Byte *)&hwinfo[EEPROM_TX_PWR_OFDM_DIFF+index])&0xff;
3944 priv->TxPwrLegacyHtDiff[RF90_PATH_A][i] = (tempval&0xF);
3945 priv->TxPwrLegacyHtDiff[RF90_PATH_B][i] = ((tempval>>4)&0xF);
3946
3947 //
3948 // Read Band Edge tx power offset and check if user enable the ability
3949 //
3950 // HT 40 band edge channel
3951 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE])&0xff;
3952 priv->TxPwrbandEdgeHt40[RF90_PATH_A][0] = (tempval&0xF); // Band edge low channel
3953 priv->TxPwrbandEdgeHt40[RF90_PATH_A][1] = ((tempval>>4)&0xF); // Band edge high channel
3954 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+1])&0xff;
3955 priv->TxPwrbandEdgeHt40[RF90_PATH_B][0] = (tempval&0xF); // Band edge low channel
3956 priv->TxPwrbandEdgeHt40[RF90_PATH_B][1] = ((tempval>>4)&0xF); // Band edge high channel
3957 // HT 20 band edge channel
3958 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+2])&0xff;
3959 priv->TxPwrbandEdgeHt20[RF90_PATH_A][0] = (tempval&0xF); // Band edge low channel
3960 priv->TxPwrbandEdgeHt20[RF90_PATH_A][1] = ((tempval>>4)&0xF); // Band edge high channel
3961 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+3])&0xff;
3962 priv->TxPwrbandEdgeHt20[RF90_PATH_B][0] = (tempval&0xF); // Band edge low channel
3963 priv->TxPwrbandEdgeHt20[RF90_PATH_B][1] = ((tempval>>4)&0xF); // Band edge high channel
3964 // OFDM band edge channel
3965 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+4])&0xff;
3966 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][0] = (tempval&0xF); // Band edge low channel
3967 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][1] = ((tempval>>4)&0xF); // Band edge high channel
3968 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+5])&0xff;
3969 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_B][0] = (tempval&0xF); // Band edge low channel
3970 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_B][1] = ((tempval>>4)&0xF); // Band edge high channel
3971
3972 priv->TxPwrbandEdgeFlag = (*(u8 *)&hwinfo[TX_PWR_BAND_EDGE_CHK]);
3973 }
3974
3975 for(i=0; i<14; i++)
3976 RT_TRACE(COMP_INIT, "RF-A Ht20 to HT40 Diff[%d] = 0x%x\n", i, priv->TxPwrHt20Diff[RF90_PATH_A][i]);
3977 for(i=0; i<14; i++)
3978 RT_TRACE(COMP_INIT, "RF-A Legacy to Ht40 Diff[%d] = 0x%x\n", i, priv->TxPwrLegacyHtDiff[RF90_PATH_A][i]);
3979 for(i=0; i<14; i++)
3980 RT_TRACE(COMP_INIT, "RF-B Ht20 to HT40 Diff[%d] = 0x%x\n", i, priv->TxPwrHt20Diff[RF90_PATH_B][i]);
3981 for(i=0; i<14; i++)
3982 RT_TRACE(COMP_INIT, "RF-B Legacy to HT40 Diff[%d] = 0x%x\n", i, priv->TxPwrLegacyHtDiff[RF90_PATH_B][i]);
3983 RT_TRACE(COMP_INIT, "RF-A HT40 band-edge low/high power diff = 0x%x/0x%x\n",
3984 priv->TxPwrbandEdgeHt40[RF90_PATH_A][0],
3985 priv->TxPwrbandEdgeHt40[RF90_PATH_A][1]);
3986 RT_TRACE((COMP_INIT&COMP_DBG), "RF-B HT40 band-edge low/high power diff = 0x%x/0x%x\n",
3987 priv->TxPwrbandEdgeHt40[RF90_PATH_B][0],
3988 priv->TxPwrbandEdgeHt40[RF90_PATH_B][1]);
3989
3990 RT_TRACE((COMP_INIT&COMP_DBG), "RF-A HT20 band-edge low/high power diff = 0x%x/0x%x\n",
3991 priv->TxPwrbandEdgeHt20[RF90_PATH_A][0],
3992 priv->TxPwrbandEdgeHt20[RF90_PATH_A][1]);
3993 RT_TRACE((COMP_INIT&COMP_DBG), "RF-B HT20 band-edge low/high power diff = 0x%x/0x%x\n",
3994 priv->TxPwrbandEdgeHt20[RF90_PATH_B][0],
3995 priv->TxPwrbandEdgeHt20[RF90_PATH_B][1]);
3996
3997 RT_TRACE((COMP_INIT&COMP_DBG), "RF-A OFDM band-edge low/high power diff = 0x%x/0x%x\n",
3998 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][0],
3999 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][1]);
4000 RT_TRACE((COMP_INIT&COMP_DBG), "RF-B OFDM band-edge low/high power diff = 0x%x/0x%x\n",
4001 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_B][0],
4002 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_B][1]);
4003 RT_TRACE((COMP_INIT&COMP_DBG), "Band-edge enable flag = %d\n", priv->TxPwrbandEdgeFlag);
5f53d8ca
JC		 4004
4005 //
4006 // Update remained HAL variables.
4007 //
4008 priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
4009 priv->LegacyHTTxPowerDiff = priv->EEPROMTxPowerDiff;
4010 priv->TxPowerDiff = priv->EEPROMTxPowerDiff;
4011 //priv->AntennaTxPwDiff[0] = (priv->EEPROMTxPowerDiff & 0xf);// Antenna B gain offset to antenna A, bit[3:0]
4012 //priv->AntennaTxPwDiff[1] = ((priv->EEPROMTxPowerDiff & 0xf0)>>4);// Antenna C gain offset to antenna A, bit[7:4]
4013 priv->CrystalCap = priv->EEPROMCrystalCap; // CrystalCap, bit[15:12]
4014 priv->ThermalMeter[0] = (priv->EEPROMThermalMeter&0x1f);// ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
4015 priv->LedStrategy = SW_LED_MODE0;
4016
4017 init_rate_adaptive(dev);
4018
4019 RT_TRACE(COMP_INIT, "<==== ReadAdapterInfo8192SUsb\n");
4020
4021 //return RT_STATUS_SUCCESS;
4022}
4023
4024
4025//
4026// Description:
4027// Read HW adapter information by E-Fuse or EEPROM according CR9346 reported.
4028//
4029// Assumption:
4030// 1. CR9346 regiser has verified.
4031// 2. PASSIVE_LEVEL (USB interface)
4032//
4033// Created by Roger, 2008.10.21.
4034//
4035static void rtl8192SU_read_eeprom_info(struct net_device *dev)
4036{
4037 struct r8192_priv *priv = ieee80211_priv(dev);
4038 u8 tmpU1b;
4039
4040 RT_TRACE(COMP_INIT, "====> ReadAdapterInfo8192SUsb\n");
4041
4042 // Retrieve Chip version.
4043 priv->card_8192_version = (VERSION_8192S)((read_nic_dword(dev, PMC_FSM)>>16)&0xF);
4044 RT_TRACE(COMP_INIT, "Chip Version ID: 0x%2x\n", priv->card_8192_version);
4045
4046 tmpU1b = read_nic_byte(dev, EPROM_CMD);//CR9346
4047
4048 // To check system boot selection.
4049 if (tmpU1b & CmdEERPOMSEL)
4050 {
4051 RT_TRACE(COMP_INIT, "Boot from EEPROM\n");
4052 priv->EepromOrEfuse = TRUE;
4053 }
4054 else
4055 {
4056 RT_TRACE(COMP_INIT, "Boot from EFUSE\n");
4057 priv->EepromOrEfuse = FALSE;
4058 }
4059
4060 // To check autoload success or not.
4061 if (tmpU1b & CmdEEPROM_En)
4062 {
4063 RT_TRACE(COMP_INIT, "Autoload OK!!\n");
4064 priv->AutoloadFailFlag=FALSE;
4065 rtl8192SU_ReadAdapterInfo8192SUsb(dev);//eeprom or e-fuse
4066 }
4067 else
4068 { // Auto load fail.
4069 RT_TRACE(COMP_INIT, "AutoLoad Fail reported from CR9346!!\n");
4070 priv->AutoloadFailFlag=TRUE;
4071 rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(dev);
4072
4073 //if (IS_BOOT_FROM_EFUSE(Adapter))
4074 if(!priv->EepromOrEfuse)
4075 {
4076 RT_TRACE(COMP_INIT, "Update shadow map for EFuse future use!!\n");
4077 EFUSE_ShadowMapUpdate(dev);
4078 }
4079 }
4080#ifdef TO_DO_LIST
4081 if((priv->RegChannelPlan >= RT_CHANNEL_DOMAIN_MAX) || (pHalData->EEPROMChannelPlan & EEPROM_CHANNEL_PLAN_BY_HW_MASK))
4082 {
4083 pMgntInfo->ChannelPlan = HalMapChannelPlan8192S(Adapter, (pHalData->EEPROMChannelPlan & (~(EEPROM_CHANNEL_PLAN_BY_HW_MASK))));
4084 pMgntInfo->bChnlPlanFromHW = (pHalData->EEPROMChannelPlan & EEPROM_CHANNEL_PLAN_BY_HW_MASK) ? TRUE : FALSE; // User cannot change channel plan.
4085 }
4086 else
4087 {
4088 pMgntInfo->ChannelPlan = (RT_CHANNEL_DOMAIN)pMgntInfo->RegChannelPlan;
4089 }
4090
4091 switch(pMgntInfo->ChannelPlan)
4092 {
4093 case RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN:
4094 {
4095 PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(pMgntInfo);
4096
4097 pDot11dInfo->bEnabled = TRUE;
4098 }
4099 RT_TRACE(COMP_INIT, DBG_LOUD, ("ReadAdapterInfo8187(): Enable dot11d when RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN!\n"));
4100 break;
4101 }
4102
4103 RT_TRACE(COMP_INIT, DBG_LOUD, ("RegChannelPlan(%d) EEPROMChannelPlan(%d)", pMgntInfo->RegChannelPlan, pHalData->EEPROMChannelPlan));
4104 RT_TRACE(COMP_INIT, DBG_LOUD, ("ChannelPlan = %d\n" , pMgntInfo->ChannelPlan));
4105
4106 RT_TRACE(COMP_INIT, DBG_LOUD, ("<==== ReadAdapterInfo8192S\n"));
4107#endif
4108
4109 RT_TRACE(COMP_INIT, "<==== ReadAdapterInfo8192SUsb\n");
4110
4111 //return RT_STATUS_SUCCESS;
4112}
0f29f587
BZ		 4113
4114short rtl8192_get_channel_map(struct net_device * dev)
5f53d8ca 4115{
5f53d8ca 4116 struct r8192_priv *priv = ieee80211_priv(dev);
0f29f587
BZ		 4117 if(priv->ChannelPlan > COUNTRY_CODE_GLOBAL_DOMAIN){
4118 printk("rtl8180_init:Error channel plan! Set to default.\n");
4119 priv->ChannelPlan= 0;
5f53d8ca 4120 }
0f29f587 4121 RT_TRACE(COMP_INIT, "Channel plan is %d\n",priv->ChannelPlan);
5f53d8ca 4122
0f29f587
BZ		 4123 rtl819x_set_channel_map(priv->ChannelPlan, priv);
4124 return 0;
4125}
5f53d8ca
JC		 4126
4127short rtl8192_init(struct net_device *dev)
4128{
4129
4130 struct r8192_priv *priv = ieee80211_priv(dev);
4131
5f53d8ca
JC		 4132 rtl8192_init_priv_variable(dev);
4133 rtl8192_init_priv_lock(priv);
4134 rtl8192_init_priv_task(dev);
4135 rtl8192_get_eeprom_size(dev);
4136 priv->ops->rtl819x_read_eeprom_info(dev);
4137 rtl8192_get_channel_map(dev);
4138 init_hal_dm(dev);
4139 init_timer(&priv->watch_dog_timer);
4140 priv->watch_dog_timer.data = (unsigned long)dev;
4141 priv->watch_dog_timer.function = watch_dog_timer_callback;
4142
4143 //rtl8192_adapter_start(dev);
4144#ifdef DEBUG_EPROM
4145 dump_eprom(dev);
4146#endif
4147 return 0;
4148}
4149
4150/******************************************************************************
4151 *function: This function actually only set RRSR, RATR and BW_OPMODE registers
4152 * not to do all the hw config as its name says
4153 * input: net_device dev
4154 * output: none
4155 * return: none
4156 * notice: This part need to modified according to the rate set we filtered
4157 * ****************************************************************************/
4158void rtl8192_hwconfig(struct net_device* dev)
4159{
4160 u32 regRATR = 0, regRRSR = 0;
4161 u8 regBwOpMode = 0, regTmp = 0;
4162 struct r8192_priv *priv = ieee80211_priv(dev);
4163
4164// Set RRSR, RATR, and BW_OPMODE registers
4165 //
4166 switch(priv->ieee80211->mode)
4167 {
4168 case WIRELESS_MODE_B:
4169 regBwOpMode = BW_OPMODE_20MHZ;
4170 regRATR = RATE_ALL_CCK;
4171 regRRSR = RATE_ALL_CCK;
4172 break;
4173 case WIRELESS_MODE_A:
4174 regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ;
4175 regRATR = RATE_ALL_OFDM_AG;
4176 regRRSR = RATE_ALL_OFDM_AG;
4177 break;
4178 case WIRELESS_MODE_G:
4179 regBwOpMode = BW_OPMODE_20MHZ;
4180 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4181 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4182 break;
4183 case WIRELESS_MODE_AUTO:
4184#ifdef TO_DO_LIST
4185 if (Adapter->bInHctTest)
4186 {
4187 regBwOpMode = BW_OPMODE_20MHZ;
4188 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4189 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4190 }
4191 else
4192#endif
4193 {
4194 regBwOpMode = BW_OPMODE_20MHZ;
4195 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4196 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4197 }
4198 break;
4199 case WIRELESS_MODE_N_24G:
4200 // It support CCK rate by default.
4201 // CCK rate will be filtered out only when associated AP does not support it.
4202 regBwOpMode = BW_OPMODE_20MHZ;
4203 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4204 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4205 break;
4206 case WIRELESS_MODE_N_5G:
4207 regBwOpMode = BW_OPMODE_5G;
4208 regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4209 regRRSR = RATE_ALL_OFDM_AG;
4210 break;
4211 }
4212
4213 write_nic_byte(dev, BW_OPMODE, regBwOpMode);
4214 {
4215 u32 ratr_value = 0;
4216 ratr_value = regRATR;
4217 if (priv->rf_type == RF_1T2R)
4218 {
4219 ratr_value &= ~(RATE_ALL_OFDM_2SS);
4220 }
4221 write_nic_dword(dev, RATR0, ratr_value);
4222 write_nic_byte(dev, UFWP, 1);
4223 }
4224 regTmp = read_nic_byte(dev, 0x313);
4225 regRRSR = ((regTmp) << 24) | (regRRSR & 0x00ffffff);
4226 write_nic_dword(dev, RRSR, regRRSR);
4227
4228 //
4229 // Set Retry Limit here
4230 //
4231 write_nic_word(dev, RETRY_LIMIT,
4232 priv->ShortRetryLimit << RETRY_LIMIT_SHORT_SHIFT | \
4233 priv->LongRetryLimit << RETRY_LIMIT_LONG_SHIFT);
4234 // Set Contention Window here
4235
4236 // Set Tx AGC
4237
4238 // Set Tx Antenna including Feedback control
4239
4240 // Set Auto Rate fallback control
4241
4242
4243}
4244
5f53d8ca
JC		 4245
4246//
4247// Description:
4248// Initial HW relted registers.
4249//
4250// Assumption:
4251// Config RTL8192S USB MAC, we should config MAC before download FW.
4252//
4253// 2008.09.03, Added by Roger.
4254//
4255static void rtl8192SU_MacConfigBeforeFwDownloadASIC(struct net_device *dev)
4256{
4257 u8 tmpU1b;// i;
4258// u16 tmpU2b;
4259// u32 tmpU4b;
4260 u8 PollingCnt = 20;
4261
4262 RT_TRACE(COMP_INIT, "--->MacConfigBeforeFwDownloadASIC()\n");
4263
4264 //2MAC Initialization for power on sequence, Revised by Roger. 2008.09.03.
4265
4266 //
4267 //<Roger_Notes> Set control path switch to HW control and reset Digital Core, CPU Core and
4268 // MAC I/O to solve FW download fail when system from resume sate.
4269 // 2008.11.04.
4270 //
4271 tmpU1b = read_nic_byte(dev, SYS_CLKR+1);
4272 if(tmpU1b & 0x80)
4273 {
4274 tmpU1b &= 0x3f;
4275 write_nic_byte(dev, SYS_CLKR+1, tmpU1b);
4276 }
4277 // Clear FW RPWM for FW control LPS. by tynli. 2009.02.23
4278 write_nic_byte(dev, RPWM, 0x0);
4279
4280 tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
4281 tmpU1b &= 0x73;
4282 write_nic_byte(dev, SYS_FUNC_EN+1, tmpU1b);
4283 udelay(1000);
4284
4285 //Revised POS, suggested by SD1 Alex, 2008.09.27.
4286 write_nic_byte(dev, SPS0_CTRL+1, 0x53);
4287 write_nic_byte(dev, SPS0_CTRL, 0x57);
4288
4289 //Enable AFE Macro Block's Bandgap adn Enable AFE Macro Block's Mbias
4290 tmpU1b = read_nic_byte(dev, AFE_MISC);
4291 write_nic_byte(dev, AFE_MISC, (tmpU1b|AFE_BGEN|AFE_MBEN));
4292
4293 //Enable PLL Power (LDOA15V)
4294 tmpU1b = read_nic_byte(dev, LDOA15_CTRL);
4295 write_nic_byte(dev, LDOA15_CTRL, (tmpU1b|LDA15_EN));
4296
4297 //Enable LDOV12D block
4298 tmpU1b = read_nic_byte(dev, LDOV12D_CTRL);
4299 write_nic_byte(dev, LDOV12D_CTRL, (tmpU1b|LDV12_EN));
4300
4301 //mpU1b = read_nic_byte(Adapter, SPS1_CTRL);
4302 //write_nic_byte(dev, SPS1_CTRL, (tmpU1b|SPS1_LDEN));
4303
4304 //PlatformSleepUs(2000);
4305
4306 //Enable Switch Regulator Block
4307 //tmpU1b = read_nic_byte(Adapter, SPS1_CTRL);
4308 //write_nic_byte(dev, SPS1_CTRL, (tmpU1b|SPS1_SWEN));
4309
4310 //write_nic_dword(Adapter, SPS1_CTRL, 0x00a7b267);
4311
4312 tmpU1b = read_nic_byte(dev, SYS_ISO_CTRL+1);
4313 write_nic_byte(dev, SYS_ISO_CTRL+1, (tmpU1b|0x08));
4314
4315 //Engineer Packet CP test Enable
4316 tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
4317 write_nic_byte(dev, SYS_FUNC_EN+1, (tmpU1b|0x20));
4318
4319 //Support 64k IMEM, suggested by SD1 Alex.
4320 tmpU1b = read_nic_byte(dev, SYS_ISO_CTRL+1);
4321 write_nic_byte(dev, SYS_ISO_CTRL+1, (tmpU1b& 0x68));
4322
4323 //Enable AFE clock
4324 tmpU1b = read_nic_byte(dev, AFE_XTAL_CTRL+1);
4325 write_nic_byte(dev, AFE_XTAL_CTRL+1, (tmpU1b& 0xfb));
4326
4327 //Enable AFE PLL Macro Block
4328 tmpU1b = read_nic_byte(dev, AFE_PLL_CTRL);
4329 write_nic_byte(dev, AFE_PLL_CTRL, (tmpU1b|0x11));
4330
4331 //Attatch AFE PLL to MACTOP/BB/PCIe Digital
4332 tmpU1b = read_nic_byte(dev, SYS_ISO_CTRL);
4333 write_nic_byte(dev, SYS_ISO_CTRL, (tmpU1b&0xEE));
4334
4335 // Switch to 40M clock
4336 write_nic_byte(dev, SYS_CLKR, 0x00);
4337
4338 //SSC Disable
4339 tmpU1b = read_nic_byte(dev, SYS_CLKR);
4340 //write_nic_byte(dev, SYS_CLKR, (tmpU1b&0x5f));
4341 write_nic_byte(dev, SYS_CLKR, (tmpU1b|0xa0));
4342
4343 //Enable MAC clock
4344 tmpU1b = read_nic_byte(dev, SYS_CLKR+1);
4345 write_nic_byte(dev, SYS_CLKR+1, (tmpU1b|0x18));
4346
4347 //Revised POS, suggested by SD1 Alex, 2008.09.27.
4348 write_nic_byte(dev, PMC_FSM, 0x02);
4349
4350 //Enable Core digital and enable IOREG R/W
4351 tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
4352 write_nic_byte(dev, SYS_FUNC_EN+1, (tmpU1b|0x08));
4353
4354 //Enable REG_EN
4355 tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
4356 write_nic_byte(dev, SYS_FUNC_EN+1, (tmpU1b|0x80));
4357
4358 //Switch the control path to FW
4359 tmpU1b = read_nic_byte(dev, SYS_CLKR+1);
4360 write_nic_byte(dev, SYS_CLKR+1, (tmpU1b|0x80)& 0xBF);
4361
4362 write_nic_byte(dev, CMDR, 0xFC);
4363 write_nic_byte(dev, CMDR+1, 0x37);
4364
4365 //Fix the RX FIFO issue(usb error), 970410
4366 tmpU1b = read_nic_byte_E(dev, 0x5c);
4367 write_nic_byte_E(dev, 0x5c, (tmpU1b|BIT7));
4368
4369 //For power save, used this in the bit file after 970621
4370 tmpU1b = read_nic_byte(dev, SYS_CLKR);
4371 write_nic_byte(dev, SYS_CLKR, tmpU1b&(~SYS_CPU_CLKSEL));
4372
4373 // Revised for 8051 ROM code wrong operation. Added by Roger. 2008.10.16.
4374 write_nic_byte_E(dev, 0x1c, 0x80);
4375
4376 //
4377 // <Roger_EXP> To make sure that TxDMA can ready to download FW.
4378 // We should reset TxDMA if IMEM RPT was not ready.
4379 // Suggested by SD1 Alex. 2008.10.23.
4380 //
4381 do
4382 {
4383 tmpU1b = read_nic_byte(dev, TCR);
4384 if((tmpU1b & TXDMA_INIT_VALUE) == TXDMA_INIT_VALUE)
4385 break;
4386 //PlatformStallExecution(5);
4387 udelay(5);
4388 }while(PollingCnt--); // Delay 1ms
4389
4390 if(PollingCnt <= 0 )
4391 {
4392 RT_TRACE(COMP_INIT, "MacConfigBeforeFwDownloadASIC(): Polling TXDMA_INIT_VALUE timeout!! Current TCR(%#x)\n", tmpU1b);
4393 tmpU1b = read_nic_byte(dev, CMDR);
4394 write_nic_byte(dev, CMDR, tmpU1b&(~TXDMA_EN));
4395 udelay(2);
4396 write_nic_byte(dev, CMDR, tmpU1b|TXDMA_EN);// Reset TxDMA
4397 }
4398
4399
4400 RT_TRACE(COMP_INIT, "<---MacConfigBeforeFwDownloadASIC()\n");
4401}
5f53d8ca 4402
5f53d8ca
JC		 4403//
4404// Description:
4405// Initial HW relted registers.
4406//
4407// Assumption:
4408// 1. This function is only invoked at driver intialization once.
4409// 2. PASSIVE LEVEL.
4410//
4411// 2008.06.10, Added by Roger.
4412//
4413static void rtl8192SU_MacConfigAfterFwDownload(struct net_device *dev)
4414{
4415 struct r8192_priv *priv = ieee80211_priv((struct net_device *)dev);
4416 //PRT_HIGH_THROUGHPUT pHTInfo = priv->ieee80211->pHTInfo;
4417 //u8 tmpU1b, RxPageCfg, i;
4418 u16 tmpU2b;
4419 u8 tmpU1b;//, i;
4420
4421
4422 RT_TRACE(COMP_INIT, "--->MacConfigAfterFwDownload()\n");
4423
4424 // Enable Tx/Rx
4425 tmpU2b = (BBRSTn|BB_GLB_RSTn|SCHEDULE_EN|MACRXEN|MACTXEN|DDMA_EN|
4426 FW2HW_EN|RXDMA_EN|TXDMA_EN|HCI_RXDMA_EN|HCI_TXDMA_EN); //3
4427 //Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_COMMAND, &tmpU1b );
4428 write_nic_word(dev, CMDR, tmpU2b); //LZM REGISTER COM 090305
4429
4430 // Loopback mode or not
4431 priv->LoopbackMode = RTL8192SU_NO_LOOPBACK; // Set no loopback as default.
4432 if(priv->LoopbackMode == RTL8192SU_NO_LOOPBACK)
4433 tmpU1b = LBK_NORMAL;
4434 else if (priv->LoopbackMode == RTL8192SU_MAC_LOOPBACK )
4435 tmpU1b = LBK_MAC_DLB;
4436 else
4437 RT_TRACE(COMP_INIT, "Serious error: wrong loopback mode setting\n");
4438
4439 //Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_LBK_MODE, &tmpU1b);
4440 write_nic_byte(dev, LBKMD_SEL, tmpU1b);
4441
4442 // Set RCR
4443 write_nic_dword(dev, RCR, priv->ReceiveConfig);
4444 RT_TRACE(COMP_INIT, "MacConfigAfterFwDownload(): Current RCR settings(%#x)\n", priv->ReceiveConfig);
4445
4446
4447 // Set RQPN
4448 //
4449 // <Roger_Notes> 2008.08.18.
4450 // 6 endpoints:
4451 // (1) Page number on CMDQ is 0x03.
4452 // (2) Page number on BCNQ, HQ and MGTQ is 0.
4453 // (3) Page number on BKQ, BEQ, VIQ and VOQ are 0x07.
4454 // (4) Page number on PUBQ is 0xdd
4455 //
4456 // 11 endpoints:
4457 // (1) Page number on CMDQ is 0x00.
4458 // (2) Page number on BCNQ is 0x02, HQ and MGTQ are 0x03.
4459 // (3) Page number on BKQ, BEQ, VIQ and VOQ are 0x07.
4460 // (4) Page number on PUBQ is 0xd8
4461 //
4462 //write_nic_dword(Adapter, 0xa0, 0x07070707); //BKQ, BEQ, VIQ and VOQ
4463 //write_nic_byte(dev, 0xa4, 0x00); // HCCAQ
5f53d8ca
JC		 4464
4465 // Fix the RX FIFO issue(USB error), Rivesed by Roger, 2008-06-14
4466 tmpU1b = read_nic_byte_E(dev, 0x5C);
4467 write_nic_byte_E(dev, 0x5C, tmpU1b|BIT7);
4468
5f53d8ca
JC		 4469 // For EFUSE init configuration.
4470 //if (IS_BOOT_FROM_EFUSE(Adapter)) // We may R/W EFUSE in EFUSE mode
4471 if (priv->bBootFromEfuse)
4472 {
4473 u8 tempval;
4474
4475 tempval = read_nic_byte(dev, SYS_ISO_CTRL+1);
4476 tempval &= 0xFE;
4477 write_nic_byte(dev, SYS_ISO_CTRL+1, tempval);
4478
4479 // Enable LDO 2.5V for write action
4480 //tempval = read_nic_byte(Adapter, EFUSE_TEST+3);
4481 //write_nic_byte(Adapter, EFUSE_TEST+3, (tempval | 0x80));
4482
4483 // Change Efuse Clock for write action
4484 //write_nic_byte(Adapter, EFUSE_CLK, 0x03);
4485
4486 // Change Program timing
4487 write_nic_byte(dev, EFUSE_CTRL+3, 0x72);
4488 //printk("!!!!!!!!!!!!!!!!!!!!!%s: write 0x33 with 0x72\n",__FUNCTION__);
4489 RT_TRACE(COMP_INIT, "EFUSE CONFIG OK\n");
4490 }
4491
4492
4493 RT_TRACE(COMP_INIT, "<---MacConfigAfterFwDownload()\n");
4494}
4495
4496void rtl8192SU_HwConfigureRTL8192SUsb(struct net_device *dev)
4497{
4498
4499 struct r8192_priv *priv = ieee80211_priv(dev);
4500 u8 regBwOpMode = 0;
4501 u32 regRATR = 0, regRRSR = 0;
4502 u8 regTmp = 0;
4503 u32 i = 0;
4504
4505 //1 This part need to modified according to the rate set we filtered!!
4506 //
4507 // Set RRSR, RATR, and BW_OPMODE registers
4508 //
4509 switch(priv->ieee80211->mode)
4510 {
4511 case WIRELESS_MODE_B:
4512 regBwOpMode = BW_OPMODE_20MHZ;
4513 regRATR = RATE_ALL_CCK;
4514 regRRSR = RATE_ALL_CCK;
4515 break;
4516 case WIRELESS_MODE_A:
4517 regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ;
4518 regRATR = RATE_ALL_OFDM_AG;
4519 regRRSR = RATE_ALL_OFDM_AG;
4520 break;
4521 case WIRELESS_MODE_G:
4522 regBwOpMode = BW_OPMODE_20MHZ;
4523 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4524 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4525 break;
4526 case WIRELESS_MODE_AUTO:
4527 if (priv->bInHctTest)
4528 {
4529 regBwOpMode = BW_OPMODE_20MHZ;
4530 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4531 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4532 }
4533 else
4534 {
4535 regBwOpMode = BW_OPMODE_20MHZ;
4536 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4537 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4538 }
4539 break;
4540 case WIRELESS_MODE_N_24G:
4541 // It support CCK rate by default.
4542 // CCK rate will be filtered out only when associated AP does not support it.
4543 regBwOpMode = BW_OPMODE_20MHZ;
4544 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4545 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4546 break;
4547 case WIRELESS_MODE_N_5G:
4548 regBwOpMode = BW_OPMODE_5G;
4549 regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4550 regRRSR = RATE_ALL_OFDM_AG;
4551 break;
4552 }
4553
4554 //
4555 // <Roger_Notes> We disable CCK response rate until FIB CCK rate IC's back.
4556 // 2008.09.23.
4557 //
4558 regTmp = read_nic_byte(dev, INIRTSMCS_SEL);
5f53d8ca 4559 regRRSR = ((regRRSR & 0x000fffff)<<8) | regTmp;
5f53d8ca
JC		 4560
4561 //
4562 // Update SIFS timing.
4563 //
4564 //priv->SifsTime = 0x0e0e0a0a;
4565 //Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_SIFS, (pu1Byte)&pHalData->SifsTime);
4566 { u8 val[4] = {0x0e, 0x0e, 0x0a, 0x0a};
4567 // SIFS for CCK Data ACK
4568 write_nic_byte(dev, SIFS_CCK, val[0]);
4569 // SIFS for CCK consecutive tx like CTS data!
4570 write_nic_byte(dev, SIFS_CCK+1, val[1]);
4571
4572 // SIFS for OFDM Data ACK
4573 write_nic_byte(dev, SIFS_OFDM, val[2]);
4574 // SIFS for OFDM consecutive tx like CTS data!
4575 write_nic_byte(dev, SIFS_OFDM+1, val[3]);
4576 }
4577
4578 write_nic_dword(dev, INIRTSMCS_SEL, regRRSR);
4579 write_nic_byte(dev, BW_OPMODE, regBwOpMode);
4580
4581 //
4582 // Suggested by SD1 Alex, 2008-06-14.
4583 //
4584 //PlatformEFIOWrite1Byte(Adapter, TXOP_STALL_CTRL, 0x80);//NAV to protect all TXOP.
4585
4586 //
4587 // Set Data Auto Rate Fallback Retry Count register.
4588 //
4589 write_nic_dword(dev, DARFRC, 0x02010000);
4590 write_nic_dword(dev, DARFRC+4, 0x06050403);
4591 write_nic_dword(dev, RARFRC, 0x02010000);
4592 write_nic_dword(dev, RARFRC+4, 0x06050403);
4593
4594 // Set Data Auto Rate Fallback Reg. Added by Roger, 2008.09.22.
4595 for (i = 0; i < 8; i++)
5f53d8ca 4596 write_nic_dword(dev, ARFR0+i*4, 0x1f0ffff0);
5f53d8ca
JC		 4597
4598 //
4599 // Aggregation length limit. Revised by Roger. 2008.09.22.
4600 //
4601 write_nic_byte(dev, AGGLEN_LMT_H, 0x0f); // Set AMPDU length to 12Kbytes for ShortGI case.
4602 write_nic_dword(dev, AGGLEN_LMT_L, 0xddd77442); // Long GI
4603 write_nic_dword(dev, AGGLEN_LMT_L+4, 0xfffdd772);
4604
4605 // Set NAV protection length
4606 write_nic_word(dev, NAV_PROT_LEN, 0x0080);
4607
4608 // Set TXOP stall control for several queue/HI/BCN/MGT/
4609 write_nic_byte(dev, TXOP_STALL_CTRL, 0x00); // NAV Protect next packet.
4610
4611 // Set MSDU lifetime.
4612 write_nic_byte(dev, MLT, 0x8f);
4613
4614 // Set CCK/OFDM SIFS
4615 write_nic_word(dev, SIFS_CCK, 0x0a0a); // CCK SIFS shall always be 10us.
4616 write_nic_word(dev, SIFS_OFDM, 0x0e0e);
4617
4618 write_nic_byte(dev, ACK_TIMEOUT, 0x40);
4619
4620 // CF-END Threshold
4621 write_nic_byte(dev, CFEND_TH, 0xFF);
4622
4623 //
4624 // For Min Spacing configuration.
4625 //
4626 switch(priv->rf_type)
4627 {
4628 case RF_1T2R:
4629 case RF_1T1R:
4630 RT_TRACE(COMP_INIT, "Initializeadapter: RF_Type%s\n", (priv->rf_type==RF_1T1R? "(1T1R)":"(1T2R)"));
4631 priv->MinSpaceCfg = (MAX_MSS_DENSITY_1T<<3);
4632 break;
4633 case RF_2T2R:
4634 case RF_2T2R_GREEN:
4635 RT_TRACE(COMP_INIT, "Initializeadapter:RF_Type(2T2R)\n");
4636 priv->MinSpaceCfg = (MAX_MSS_DENSITY_2T<<3);
4637 break;
4638 }
4639 write_nic_byte(dev, AMPDU_MIN_SPACE, priv->MinSpaceCfg);
4640
4641 //LZM 090219
4642 //
4643 // For Min Spacing configuration.
4644 //
4645 //priv->MinSpaceCfg = 0x00;
4646 //rtl8192SU_SetHwRegAmpduMinSpace(dev, priv->MinSpaceCfg);
4647}
4648
5f53d8ca 4649
5f53d8ca
JC		 4650// Description: Initial HW relted registers.
4651//
4652// Assumption: This function is only invoked at driver intialization once.
4653//
4654// 2008.06.10, Added by Roger.
4655bool rtl8192SU_adapter_start(struct net_device *dev)
4656{
4657 struct r8192_priv *priv = ieee80211_priv(dev);
4658 //u32 dwRegRead = 0;
4659 //bool init_status = true;
4660 //u32 ulRegRead;
4661 bool rtStatus = true;
4662 //u8 PipeIndex;
4663 //u8 eRFPath, tmpU1b;
4664 u8 fw_download_times = 1;
4665
4666
4667 RT_TRACE(COMP_INIT, "--->InitializeAdapter8192SUsb()\n");
4668
4669 //pHalData->bGPIOChangeRF = FALSE;
4670
4671
4672 //
4673 // <Roger_Notes> 2008.06.15.
4674 //
4675 // Initialization Steps on RTL8192SU:
4676 // a. MAC initialization prior to sending down firmware code.
4677 // b. Download firmware code step by step(i.e., IMEM, EMEM, DMEM).
4678 // c. MAC configuration after firmware has been download successfully.
4679 // d. Initialize BB related configurations.
4680 // e. Initialize RF related configurations.
4681 // f. Start to BulkIn transfer.
4682 //
4683
4684 //
4685 //a. MAC initialization prior to send down firmware code.
4686 //
4687start:
4688 rtl8192SU_MacConfigBeforeFwDownloadASIC(dev);
4689
4690 //
4691 //b. Download firmware code step by step(i.e., IMEM, EMEM, DMEM).
4692 //
4693 rtStatus = FirmwareDownload92S(dev);
4694 if(rtStatus != true)
4695 {
4696 if(fw_download_times == 1){
4697 RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Download Firmware failed once, Download again!!\n");
4698 fw_download_times = fw_download_times + 1;
4699 goto start;
4700 }else{
4701 RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Download Firmware failed twice, end!!\n");
4702 goto end;
4703 }
4704 }
4705 //
4706 //c. MAC configuration after firmware has been download successfully.
4707 //
4708 rtl8192SU_MacConfigAfterFwDownload(dev);
4709
5f53d8ca
JC		 4710 //priv->bLbusEnable = TRUE;
4711 //if(priv->RegRfOff == TRUE)
4712 // priv->eRFPowerState = eRfOff;
4713
4714 // Save target channel
4715 // <Roger_Notes> Current Channel will be updated again later.
4716 //priv->CurrentChannel = Channel;
4717 rtStatus = PHY_MACConfig8192S(dev);//===>ok
4718 if(rtStatus != true)
4719 {
4720 RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Fail to configure MAC!!\n");
4721 goto end;
4722 }
4723 if (1){
4724 int i;
4725 for (i=0; i<4; i++)
4726 write_nic_dword(dev,WDCAPARA_ADD[i], 0x5e4322);
4727 write_nic_byte(dev,AcmHwCtrl, 0x01);
4728 }
4729
4730
4731 //
4732 //d. Initialize BB related configurations.
4733 //
4734
4735 rtStatus = PHY_BBConfig8192S(dev);//===>ok
4736 if(rtStatus != true)
4737 {
4738 RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Fail to configure BB!!\n");
4739 goto end;
4740 }
4741
4742 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter2, 0xff, 0x58);//===>ok
4743
4744 //
4745 // e. Initialize RF related configurations.
4746 //
4747 // 2007/11/02 MH Before initalizing RF. We can not use FW to do RF-R/W.
4748 priv->Rf_Mode = RF_OP_By_SW_3wire;
4749
4750 // For RF test only from Scott's suggestion
4751 //write_nic_byte(dev, 0x27, 0xDB);
4752 //write_nic_byte(dev, 0x1B, 0x07);
4753
4754
4755 write_nic_byte(dev, AFE_XTAL_CTRL+1, 0xDB);
4756
4757 // <Roger_Notes> The following IOs are configured for each RF modules.
4758 // Enable RF module and reset RF and SDM module. 2008.11.17.
4759 if(priv->card_8192_version == VERSION_8192S_ACUT)
4760 write_nic_byte(dev, SPS1_CTRL+3, (u8)(RF_EN|RF_RSTB|RF_SDMRSTB)); // Fix A-Cut bug.
4761 else
4762 write_nic_byte(dev, RF_CTRL, (u8)(RF_EN|RF_RSTB|RF_SDMRSTB));
4763
4764 rtStatus = PHY_RFConfig8192S(dev);//===>ok
4765 if(rtStatus != true)
4766 {
4767 RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Fail to configure RF!!\n");
4768 goto end;
4769 }
4770
4771
4772 // Set CCK and OFDM Block "ON"
4773 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1);
4774 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1);
4775
4776 //
4777 // Turn off Radio B while RF type is 1T1R by SD3 Wilsion's request.
4778 // Revised by Roger, 2008.12.18.
4779 //
4780 if(priv->rf_type == RF_1T1R)
4781 {
4782 // This is needed for PHY_REG after 20081219
4783 rtl8192_setBBreg(dev, rFPGA0_RFMOD, 0xff000000, 0x03);
4784 // This is needed for PHY_REG before 20081219
4785 //PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, bMaskByte0, 0x11);
4786 }
4787
5f53d8ca
JC		 4788
4789 //LZM 090219
4790 // Set CCK and OFDM Block "ON"
4791 //rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1);
4792 //rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1);
4793
4794
4795 //3//Get hardware version, do it in read eeprom?
4796 //GetHardwareVersion819xUsb(Adapter);
4797
4798 //3//
4799 //3 //Set Hardware
4800 //3//
4801 rtl8192SU_HwConfigureRTL8192SUsb(dev);//==>ok
4802
4803 //
4804 // <Roger_Notes> We set MAC address here if autoload was failed before,
4805 // otherwise IDR0 will NOT contain any value.
4806 //
4807 write_nic_dword(dev, IDR0, ((u32*)dev->dev_addr)[0]);
4808 write_nic_word(dev, IDR4, ((u16*)(dev->dev_addr + 4))[0]);
4809 if(!priv->bInHctTest)
4810 {
4811 if(priv->ResetProgress == RESET_TYPE_NORESET)
4812 {
4813 //RT_TRACE(COMP_MLME, DBG_LOUD, ("Initializeadapter8192SUsb():RegWirelessMode(%#x) \n", Adapter->RegWirelessMode));
4814 //Adapter->HalFunc.SetWirelessModeHandler(Adapter, Adapter->RegWirelessMode);
4815 rtl8192_SetWirelessMode(dev, priv->ieee80211->mode);//===>ok
4816 }
4817 }
4818 else
4819 {
4820 priv->ieee80211->mode = WIRELESS_MODE_G;
4821 rtl8192_SetWirelessMode(dev, WIRELESS_MODE_G);
4822 }
4823
4824 //Security related.
4825 //-----------------------------------------------------------------------------
4826 // Set up security related. 070106, by rcnjko:
4827 // 1. Clear all H/W keys.
4828 // 2. Enable H/W encryption/decryption.
4829 //-----------------------------------------------------------------------------
4830 //CamResetAllEntry(Adapter);
4831 //Adapter->HalFunc.EnableHWSecCfgHandler(Adapter);
4832
4833 //SecClearAllKeys(Adapter);
4834 CamResetAllEntry(dev);
4835 //SecInit(Adapter);
4836 {
4837 u8 SECR_value = 0x0;
4838 SECR_value |= SCR_TxEncEnable;
4839 SECR_value |= SCR_RxDecEnable;
4840 SECR_value |= SCR_NoSKMC;
4841 write_nic_byte(dev, SECR, SECR_value);
4842 }
4843
5f53d8ca
JC		 4844#ifdef TO_DO_LIST
4845
4846 //PHY_UpdateInitialGain(dev);
4847
4848 if(priv->RegRfOff == true)
4849 { // User disable RF via registry.
4850 u8 eRFPath = 0;
4851
4852 RT_TRACE((COMP_INIT|COMP_RF), "InitializeAdapter8192SUsb(): Turn off RF for RegRfOff ----------\n");
4853 MgntActSet_RF_State(dev, eRfOff, RF_CHANGE_BY_SW);
4854 // Those action will be discard in MgntActSet_RF_State because off the same state
4855 for(eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++)
4856 rtl8192_setBBreg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x0);
4857 }
4858 else if(priv->RfOffReason > RF_CHANGE_BY_PS)
4859 { // H/W or S/W RF OFF before sleep.
4860 RT_TRACE((COMP_INIT|COMP_RF), "InitializeAdapter8192SUsb(): Turn off RF for RfOffReason(%d) ----------\n", priv->RfOffReason);
4861 MgntActSet_RF_State(dev, eRfOff, priv->RfOffReason);
4862 }
4863 else
4864 {
4865 priv->eRFPowerState = eRfOn;
4866 priv->RfOffReason = 0;
4867 RT_TRACE((COMP_INIT|COMP_RF), "InitializeAdapter8192SUsb(): RF is on ----------\n");
4868 }
4869
4870#endif
4871
4872
4873//
4874// f. Start to BulkIn transfer.
4875//
4876#ifdef TO_DO_LIST
4877
4878#ifndef UNDER_VISTA
4879 {
4880 u8 i;
4881 PlatformAcquireSpinLock(Adapter, RT_RX_SPINLOCK);
4882
4883 for(PipeIndex=0; PipeIndex < MAX_RX_QUEUE; PipeIndex++)
4884 {
4885 if (PipeIndex == 0)
4886 {
4887 for(i=0; i<32; i++)
4888 HalUsbInMpdu(Adapter, PipeIndex);
4889 }
4890 else
4891 {
4892 //HalUsbInMpdu(Adapter, PipeIndex);
4893 //HalUsbInMpdu(Adapter, PipeIndex);
4894 //HalUsbInMpdu(Adapter, PipeIndex);
4895 }
4896 }
4897 PlatformReleaseSpinLock(Adapter, RT_RX_SPINLOCK);
4898 }
4899#else
4900 // Joseph add to 819X code base for Vista USB platform.
4901 // This part may need to be add to Hal819xU code base. too.
4902 PlatformUsbEnableInPipes(Adapter);
4903#endif
4904
4905 RT_TRACE(COMP_INIT, "HighestOperaRate = %x\n", Adapter->MgntInfo.HighestOperaRate);
4906
4907 PlatformStartWorkItem( &(pHalData->RtUsbCheckForHangWorkItem) );
4908
4909 //
4910 // <Roger_EXP> The following configurations are for ASIC verification temporally.
4911 // 2008.07.10.
4912 //
4913
4914#endif
4915
4916 //
4917 // Read EEPROM TX power index and PHY_REG_PG.txt to capture correct
4918 // TX power index for different rate set.
4919 //
4920 //if(priv->card_8192_version >= VERSION_8192S_ACUT)
4921 {
4922 // Get original hw reg values
4923 PHY_GetHWRegOriginalValue(dev);
4924
4925 // Write correct tx power index//FIXLZM
4926 PHY_SetTxPowerLevel8192S(dev, priv->chan);
4927 }
4928
4929 {
4930 u8 tmpU1b = 0;
4931 // EEPROM R/W workaround
4932 tmpU1b = read_nic_byte(dev, MAC_PINMUX_CFG);
4933 write_nic_byte(dev, MAC_PINMUX_CFG, tmpU1b&(~GPIOMUX_EN));
4934 }
4935
4936//
4937//<Roger_Notes> 2008.08.19.
4938// We return status here for temporal FPGA verification, 2008.08.19.
4939
4940#ifdef RTL8192SU_FW_IQK
4941 write_nic_dword(dev, WFM5, FW_IQK_ENABLE);
4942 ChkFwCmdIoDone(dev);
4943#endif
4944
4945 //
4946 // <Roger_Notes> We enable high power mechanism after NIC initialized.
4947 // 2008.11.27.
4948 //
4949 write_nic_dword(dev, WFM5, FW_RA_RESET);
4950 ChkFwCmdIoDone(dev);
4951 write_nic_dword(dev, WFM5, FW_RA_ACTIVE);
4952 ChkFwCmdIoDone(dev);
4953 write_nic_dword(dev, WFM5, FW_RA_REFRESH);
4954 ChkFwCmdIoDone(dev);
4955 write_nic_dword(dev, WFM5, FW_BB_RESET_ENABLE);
4956
4957// <Roger_Notes> We return status here for temporal FPGA verification. 2008.05.12.
4958//
5f53d8ca 4959
5f53d8ca
JC		 4960end:
4961return rtStatus;
4962}
4963
5f53d8ca
JC		 4964/***************************************************************************
4965 -------------------------------NET STUFF---------------------------
4966***************************************************************************/
4967
4968static struct net_device_stats *rtl8192_stats(struct net_device *dev)
4969{
4970 struct r8192_priv *priv = ieee80211_priv(dev);
4971
4972 return &priv->ieee80211->stats;
4973}
4974
4975bool
4976HalTxCheckStuck819xUsb(
4977 struct net_device *dev
4978 )
4979{
4980 struct r8192_priv *priv = ieee80211_priv(dev);
4981 u16 RegTxCounter = read_nic_word(dev, 0x128);
4982 bool bStuck = FALSE;
4983 RT_TRACE(COMP_RESET,"%s():RegTxCounter is %d,TxCounter is %d\n",__FUNCTION__,RegTxCounter,priv->TxCounter);
4984 if(priv->TxCounter==RegTxCounter)
4985 bStuck = TRUE;
4986
4987 priv->TxCounter = RegTxCounter;
4988
4989 return bStuck;
4990}
4991
4992/*
4993* <Assumption: RT_TX_SPINLOCK is acquired.>
4994* First added: 2006.11.19 by emily
4995*/
4996RESET_TYPE
4997TxCheckStuck(struct net_device *dev)
4998{
4999 struct r8192_priv *priv = ieee80211_priv(dev);
5000 u8 QueueID;
5001// PRT_TCB pTcb;
5002// u8 ResetThreshold;
5003 bool bCheckFwTxCnt = false;
5004 //unsigned long flags;
5005
5006 //
5007 // Decide Stuch threshold according to current power save mode
5008 //
5009
5010// RT_TRACE(COMP_RESET, " ==> TxCheckStuck()\n");
5011// PlatformAcquireSpinLock(Adapter, RT_TX_SPINLOCK);
5012// spin_lock_irqsave(&priv->ieee80211->lock,flags);
5013 for (QueueID = 0; QueueID<=BEACON_QUEUE;QueueID ++)
5014 {
5015 if(QueueID == TXCMD_QUEUE)
5016 continue;
5017#if 1
5f53d8ca 5018 if((skb_queue_len(&priv->ieee80211->skb_waitQ[QueueID]) == 0) && (skb_queue_len(&priv->ieee80211->skb_aggQ[QueueID]) == 0))
5f53d8ca
JC		 5019 continue;
5020#endif
5021
5022 bCheckFwTxCnt = true;
5023 }
5024// PlatformReleaseSpinLock(Adapter, RT_TX_SPINLOCK);
5025// spin_unlock_irqrestore(&priv->ieee80211->lock,flags);
5026// RT_TRACE(COMP_RESET,"bCheckFwTxCnt is %d\n",bCheckFwTxCnt);
5027#if 1
5028 if(bCheckFwTxCnt)
5029 {
5030 if(HalTxCheckStuck819xUsb(dev))
5031 {
5032 RT_TRACE(COMP_RESET, "TxCheckStuck(): Fw indicates no Tx condition! \n");
5033 return RESET_TYPE_SILENT;
5034 }
5035 }
5036#endif
5037 return RESET_TYPE_NORESET;
5038}
5039
5040bool
5041HalRxCheckStuck819xUsb(struct net_device *dev)
5042{
5043 u16 RegRxCounter = read_nic_word(dev, 0x130);
5044 struct r8192_priv *priv = ieee80211_priv(dev);
5045 bool bStuck = FALSE;
5046//#ifdef RTL8192SU
5047
5048//#else
5049 static u8 rx_chk_cnt = 0;
5050 RT_TRACE(COMP_RESET,"%s(): RegRxCounter is %d,RxCounter is %d\n",__FUNCTION__,RegRxCounter,priv->RxCounter);
5051 // If rssi is small, we should check rx for long time because of bad rx.
5052 // or maybe it will continuous silent reset every 2 seconds.
5053 rx_chk_cnt++;
5054 if(priv->undecorated_smoothed_pwdb >= (RateAdaptiveTH_High+5))
5055 {
5056 rx_chk_cnt = 0; //high rssi, check rx stuck right now.
5057 }
5058 else if(priv->undecorated_smoothed_pwdb < (RateAdaptiveTH_High+5) &&
5059 ((priv->CurrentChannelBW!=HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_40M) ||
5060 (priv->CurrentChannelBW==HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_20M)) )
5061 {
5062 if(rx_chk_cnt < 2)
5063 {
5064 return bStuck;
5065 }
5066 else
5067 {
5068 rx_chk_cnt = 0;
5069 }
5070 }
5071 else if(((priv->CurrentChannelBW!=HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb<RateAdaptiveTH_Low_40M) ||
5072 (priv->CurrentChannelBW==HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb<RateAdaptiveTH_Low_20M)) &&
5073 priv->undecorated_smoothed_pwdb >= VeryLowRSSI)
5074 {
5075 if(rx_chk_cnt < 4)
5076 {
5077 //DbgPrint("RSSI < %d && RSSI >= %d, no check this time \n", RateAdaptiveTH_Low, VeryLowRSSI);
5078 return bStuck;
5079 }
5080 else
5081 {
5082 rx_chk_cnt = 0;
5083 //DbgPrint("RSSI < %d && RSSI >= %d, check this time \n", RateAdaptiveTH_Low, VeryLowRSSI);
5084 }
5085 }
5086 else
5087 {
5088 if(rx_chk_cnt < 8)
5089 {
5090 //DbgPrint("RSSI <= %d, no check this time \n", VeryLowRSSI);
5091 return bStuck;
5092 }
5093 else
5094 {
5095 rx_chk_cnt = 0;
5096 //DbgPrint("RSSI <= %d, check this time \n", VeryLowRSSI);
5097 }
5098 }
5099//#endif
5100
5101 if(priv->RxCounter==RegRxCounter)
5102 bStuck = TRUE;
5103
5104 priv->RxCounter = RegRxCounter;
5105
5106 return bStuck;
5107}
5108
5109RESET_TYPE
5110RxCheckStuck(struct net_device *dev)
5111{
5112 struct r8192_priv *priv = ieee80211_priv(dev);
5113 //int i;
5114 bool bRxCheck = FALSE;
5115
5116// RT_TRACE(COMP_RESET," ==> RxCheckStuck()\n");
5117 //PlatformAcquireSpinLock(Adapter, RT_RX_SPINLOCK);
5118
5119 if(priv->IrpPendingCount > 1)
5120 bRxCheck = TRUE;
5121 //PlatformReleaseSpinLock(Adapter, RT_RX_SPINLOCK);
5122
5123// RT_TRACE(COMP_RESET,"bRxCheck is %d \n",bRxCheck);
5124 if(bRxCheck)
5125 {
5126 if(HalRxCheckStuck819xUsb(dev))
5127 {
5128 RT_TRACE(COMP_RESET, "RxStuck Condition\n");
5129 return RESET_TYPE_SILENT;
5130 }
5131 }
5132 return RESET_TYPE_NORESET;
5133}
5134
5135
5136/**
5137* This function is called by Checkforhang to check whether we should ask OS to reset driver
5138*
5139* \param pAdapter The adapter context for this miniport
5140*
5141* Note:NIC with USB interface sholud not call this function because we cannot scan descriptor
5142* to judge whether there is tx stuck.
5143* Note: This function may be required to be rewrite for Vista OS.
5144* <<<Assumption: Tx spinlock has been acquired >>>
5145*
5146* 8185 and 8185b does not implement this function. This is added by Emily at 2006.11.24
5147*/
5148RESET_TYPE
5149rtl819x_ifcheck_resetornot(struct net_device *dev)
5150{
5151 struct r8192_priv *priv = ieee80211_priv(dev);
5152 RESET_TYPE TxResetType = RESET_TYPE_NORESET;
5153 RESET_TYPE RxResetType = RESET_TYPE_NORESET;
5154 RT_RF_POWER_STATE rfState;
5155
5f53d8ca 5156 return RESET_TYPE_NORESET;
5f53d8ca
JC		 5157
5158 rfState = priv->ieee80211->eRFPowerState;
5159
5160 TxResetType = TxCheckStuck(dev);
5161#if 1
5162 if( rfState != eRfOff ||
5163 /*ADAPTER_TEST_STATUS_FLAG(Adapter, ADAPTER_STATUS_FW_DOWNLOAD_FAILURE)) &&*/
5164 (priv->ieee80211->iw_mode != IW_MODE_ADHOC))
5165 {
5166 // If driver is in the status of firmware download failure , driver skips RF initialization and RF is
5167 // in turned off state. Driver should check whether Rx stuck and do silent reset. And
5168 // if driver is in firmware download failure status, driver should initialize RF in the following
5169 // silent reset procedure Emily, 2008.01.21
5170
5171 // Driver should not check RX stuck in IBSS mode because it is required to
5172 // set Check BSSID in order to send beacon, however, if check BSSID is
5173 // set, STA cannot hear any packet a all. Emily, 2008.04.12
5174 RxResetType = RxCheckStuck(dev);
5175 }
5176#endif
5177 if(TxResetType==RESET_TYPE_NORMAL || RxResetType==RESET_TYPE_NORMAL)
5178 return RESET_TYPE_NORMAL;
5179 else if(TxResetType==RESET_TYPE_SILENT || RxResetType==RESET_TYPE_SILENT){
5180 RT_TRACE(COMP_RESET,"%s():silent reset\n",__FUNCTION__);
5181 return RESET_TYPE_SILENT;
5182 }
5183 else
5184 return RESET_TYPE_NORESET;
5185
5186}
5187
5188void rtl8192_cancel_deferred_work(struct r8192_priv* priv);
5189int _rtl8192_up(struct net_device *dev);
5190int rtl8192_close(struct net_device *dev);
5191
5192
5193
5194void
5195CamRestoreAllEntry( struct net_device *dev)
5196{
5197 u8 EntryId = 0;
5198 struct r8192_priv *priv = ieee80211_priv(dev);
5199 u8* MacAddr = priv->ieee80211->current_network.bssid;
5200
5201 static u8 CAM_CONST_ADDR[4][6] = {
5202 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
5203 {0x00, 0x00, 0x00, 0x00, 0x00, 0x01},
5204 {0x00, 0x00, 0x00, 0x00, 0x00, 0x02},
5205 {0x00, 0x00, 0x00, 0x00, 0x00, 0x03}};
5206 static u8 CAM_CONST_BROAD[] =
5207 {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
5208
5209 RT_TRACE(COMP_SEC, "CamRestoreAllEntry: \n");
5210
5211
5212 if ((priv->ieee80211->pairwise_key_type == KEY_TYPE_WEP40)||
5213 (priv->ieee80211->pairwise_key_type == KEY_TYPE_WEP104))
5214 {
5215
5216 for(EntryId=0; EntryId<4; EntryId++)
5217 {
5218 {
5219 MacAddr = CAM_CONST_ADDR[EntryId];
5220 setKey(dev,
5221 EntryId ,
5222 EntryId,
5223 priv->ieee80211->pairwise_key_type,
5224 MacAddr,
5225 0,
5226 NULL);
5227 }
5228 }
5229
5230 }
5231 else if(priv->ieee80211->pairwise_key_type == KEY_TYPE_TKIP)
5232 {
5233
5234 {
5235 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5236 setKey(dev,
5237 4,
5238 0,
5239 priv->ieee80211->pairwise_key_type,
5240 (u8*)dev->dev_addr,
5241 0,
5242 NULL);
5243 else
5244 setKey(dev,
5245 4,
5246 0,
5247 priv->ieee80211->pairwise_key_type,
5248 MacAddr,
5249 0,
5250 NULL);
5251 }
5252 }
5253 else if(priv->ieee80211->pairwise_key_type == KEY_TYPE_CCMP)
5254 {
5255
5256 {
5257 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5258 setKey(dev,
5259 4,
5260 0,
5261 priv->ieee80211->pairwise_key_type,
5262 (u8*)dev->dev_addr,
5263 0,
5264 NULL);
5265 else
5266 setKey(dev,
5267 4,
5268 0,
5269 priv->ieee80211->pairwise_key_type,
5270 MacAddr,
5271 0,
5272 NULL);
5273 }
5274 }
5275
5276
5277
5278 if(priv->ieee80211->group_key_type == KEY_TYPE_TKIP)
5279 {
5280 MacAddr = CAM_CONST_BROAD;
5281 for(EntryId=1 ; EntryId<4 ; EntryId++)
5282 {
5283 {
5284 setKey(dev,
5285 EntryId,
5286 EntryId,
5287 priv->ieee80211->group_key_type,
5288 MacAddr,
5289 0,
5290 NULL);
5291 }
5292 }
5293 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5294 setKey(dev,
5295 0,
5296 0,
5297 priv->ieee80211->group_key_type,
5298 CAM_CONST_ADDR[0],
5299 0,
5300 NULL);
5301 }
5302 else if(priv->ieee80211->group_key_type == KEY_TYPE_CCMP)
5303 {
5304 MacAddr = CAM_CONST_BROAD;
5305 for(EntryId=1; EntryId<4 ; EntryId++)
5306 {
5307 {
5308 setKey(dev,
5309 EntryId ,
5310 EntryId,
5311 priv->ieee80211->group_key_type,
5312 MacAddr,
5313 0,
5314 NULL);
5315 }
5316 }
5317
5318 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5319 setKey(dev,
5320 0 ,
5321 0,
5322 priv->ieee80211->group_key_type,
5323 CAM_CONST_ADDR[0],
5324 0,
5325 NULL);
5326 }
5327}
5328//////////////////////////////////////////////////////////////
5329// This function is used to fix Tx/Rx stop bug temporarily.
5330// This function will do "system reset" to NIC when Tx or Rx is stuck.
5331// The method checking Tx/Rx stuck of this function is supported by FW,
5332// which reports Tx and Rx counter to register 0x128 and 0x130.
5333//////////////////////////////////////////////////////////////
5334void
5335rtl819x_ifsilentreset(struct net_device *dev)
5336{
5337 //OCTET_STRING asocpdu;
5338 struct r8192_priv *priv = ieee80211_priv(dev);
5339 u8 reset_times = 0;
5340 int reset_status = 0;
5341 struct ieee80211_device *ieee = priv->ieee80211;
5342
5343
5344 // 2007.07.20. If we need to check CCK stop, please uncomment this line.
5345 //bStuck = Adapter->HalFunc.CheckHWStopHandler(Adapter);
5346
5347 if(priv->ResetProgress==RESET_TYPE_NORESET)
5348 {
5349RESET_START:
5350
5351 RT_TRACE(COMP_RESET,"=========>Reset progress!! \n");
5352
5353 // Set the variable for reset.
5354 priv->ResetProgress = RESET_TYPE_SILENT;
5355// rtl8192_close(dev);
5356#if 1
5357 down(&priv->wx_sem);
5358 if(priv->up == 0)
5359 {
5360 RT_TRACE(COMP_ERR,"%s():the driver is not up! return\n",__FUNCTION__);
5361 up(&priv->wx_sem);
5362 return ;
5363 }
5364 priv->up = 0;
5365 RT_TRACE(COMP_RESET,"%s():======>start to down the driver\n",__FUNCTION__);
5366// if(!netif_queue_stopped(dev))
5367// netif_stop_queue(dev);
5368
5369 rtl8192_rtx_disable(dev);
5370 rtl8192_cancel_deferred_work(priv);
5371 deinit_hal_dm(dev);
5372 del_timer_sync(&priv->watch_dog_timer);
5373
5374 ieee->sync_scan_hurryup = 1;
5375 if(ieee->state == IEEE80211_LINKED)
5376 {
5377 down(&ieee->wx_sem);
5378 printk("ieee->state is IEEE80211_LINKED\n");
5379 ieee80211_stop_send_beacons(priv->ieee80211);
5380 del_timer_sync(&ieee->associate_timer);
5f53d8ca 5381 cancel_delayed_work(&ieee->associate_retry_wq);
5f53d8ca
JC		 5382 ieee80211_stop_scan(ieee);
5383 netif_carrier_off(dev);
5384 up(&ieee->wx_sem);
5385 }
5386 else{
5387 printk("ieee->state is NOT LINKED\n");
5388 ieee80211_softmac_stop_protocol(priv->ieee80211); }
5389 up(&priv->wx_sem);
5390 RT_TRACE(COMP_RESET,"%s():<==========down process is finished\n",__FUNCTION__);
5391 //rtl8192_irq_disable(dev);
5392 RT_TRACE(COMP_RESET,"%s():===========>start to up the driver\n",__FUNCTION__);
5393 reset_status = _rtl8192_up(dev);
5394
5395 RT_TRACE(COMP_RESET,"%s():<===========up process is finished\n",__FUNCTION__);
5396 if(reset_status == -EAGAIN)
5397 {
5398 if(reset_times < 3)
5399 {
5400 reset_times++;
5401 goto RESET_START;
5402 }
5403 else
5404 {
5405 RT_TRACE(COMP_ERR," ERR!!! %s(): Reset Failed!!\n", __FUNCTION__);
5406 }
5407 }
5408#endif
5409 ieee->is_silent_reset = 1;
5410#if 1
5411 EnableHWSecurityConfig8192(dev);
5412#if 1
5413 if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_INFRA)
5414 {
5415 ieee->set_chan(ieee->dev, ieee->current_network.channel);
5416
5417#if 1
5f53d8ca 5418 queue_work(ieee->wq, &ieee->associate_complete_wq);
5f53d8ca
JC		 5419#endif
5420
5421 }
5422 else if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_ADHOC)
5423 {
5424 ieee->set_chan(ieee->dev, ieee->current_network.channel);
5425 ieee->link_change(ieee->dev);
5426
5427 // notify_wx_assoc_event(ieee);
5428
5429 ieee80211_start_send_beacons(ieee);
5430
5431 if (ieee->data_hard_resume)
5432 ieee->data_hard_resume(ieee->dev);
5433 netif_carrier_on(ieee->dev);
5434 }
5435#endif
5436
5437 CamRestoreAllEntry(dev);
5438
5439 priv->ResetProgress = RESET_TYPE_NORESET;
5440 priv->reset_count++;
5441
5442 priv->bForcedSilentReset =false;
5443 priv->bResetInProgress = false;
5444
5445 // For test --> force write UFWP.
5446 write_nic_byte(dev, UFWP, 1);
5447 RT_TRACE(COMP_RESET, "Reset finished!! ====>[%d]\n", priv->reset_count);
5448#endif
5449 }
5450}
5451
5452void CAM_read_entry(
5453 struct net_device *dev,
5454 u32 iIndex
5455)
5456{
5457 u32 target_command=0;
5458 u32 target_content=0;
5459 u8 entry_i=0;
5460 u32 ulStatus;
5461 s32 i=100;
5462// printk("=======>start read CAM\n");
5463 for(entry_i=0;entry_i<CAM_CONTENT_COUNT;entry_i++)
5464 {
5465 // polling bit, and No Write enable, and address
5466 target_command= entry_i+CAM_CONTENT_COUNT*iIndex;
5467 target_command= target_command | BIT31;
5468
5469 //Check polling bit is clear
5470// mdelay(1);
5471#if 1
5472 while((i--)>=0)
5473 {
5474 ulStatus = read_nic_dword(dev, RWCAM);
5475 if(ulStatus & BIT31){
5476 continue;
5477 }
5478 else{
5479 break;
5480 }
5481 }
5482#endif
5483 write_nic_dword(dev, RWCAM, target_command);
5484 RT_TRACE(COMP_SEC,"CAM_read_entry(): WRITE A0: %x \n",target_command);
5485 // printk("CAM_read_entry(): WRITE A0: %lx \n",target_command);
5486 target_content = read_nic_dword(dev, RCAMO);
5487 RT_TRACE(COMP_SEC, "CAM_read_entry(): WRITE A8: %x \n",target_content);
5488 // printk("CAM_read_entry(): WRITE A8: %lx \n",target_content);
5489 }
5490 printk("\n");
5491}
5492
5493void rtl819x_update_rxcounts(
5494 struct r8192_priv *priv,
5495 u32* TotalRxBcnNum,
5496 u32* TotalRxDataNum
5497)
5498{
5499 u16 SlotIndex;
5500 u8 i;
5501
5502 *TotalRxBcnNum = 0;
5503 *TotalRxDataNum = 0;
5504
5505 SlotIndex = (priv->ieee80211->LinkDetectInfo.SlotIndex++)%(priv->ieee80211->LinkDetectInfo.SlotNum);
5506 priv->ieee80211->LinkDetectInfo.RxBcnNum[SlotIndex] = priv->ieee80211->LinkDetectInfo.NumRecvBcnInPeriod;
5507 priv->ieee80211->LinkDetectInfo.RxDataNum[SlotIndex] = priv->ieee80211->LinkDetectInfo.NumRecvDataInPeriod;
5508 for( i=0; i<priv->ieee80211->LinkDetectInfo.SlotNum; i++ ){
5509 *TotalRxBcnNum += priv->ieee80211->LinkDetectInfo.RxBcnNum[i];
5510 *TotalRxDataNum += priv->ieee80211->LinkDetectInfo.RxDataNum[i];
5511 }
5512}
5513
5f53d8ca
JC		 5514extern void rtl819x_watchdog_wqcallback(struct work_struct *work)
5515{
5516 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
5517 struct r8192_priv *priv = container_of(dwork,struct r8192_priv,watch_dog_wq);
5518 struct net_device *dev = priv->ieee80211->dev;
5f53d8ca
JC		 5519 struct ieee80211_device* ieee = priv->ieee80211;
5520 RESET_TYPE ResetType = RESET_TYPE_NORESET;
5521 static u8 check_reset_cnt=0;
5522 bool bBusyTraffic = false;
5523
5524 if(!priv->up)
5525 return;
5526 hal_dm_watchdog(dev);
5527
5528 {//to get busy traffic condition
5529 if(ieee->state == IEEE80211_LINKED)
5530 {
5531 //windows mod 666 to 100.
5532 //if( ieee->LinkDetectInfo.NumRxOkInPeriod> 666 ||
5533 // ieee->LinkDetectInfo.NumTxOkInPeriod> 666 ) {
5534 if( ieee->LinkDetectInfo.NumRxOkInPeriod> 100 ||
5535 ieee->LinkDetectInfo.NumTxOkInPeriod> 100 ) {
5536 bBusyTraffic = true;
5537 }
5538 ieee->LinkDetectInfo.NumRxOkInPeriod = 0;
5539 ieee->LinkDetectInfo.NumTxOkInPeriod = 0;
5540 ieee->LinkDetectInfo.bBusyTraffic = bBusyTraffic;
5541 }
5542 }
5543 //added by amy for AP roaming
5544 {
5545 if(priv->ieee80211->state == IEEE80211_LINKED && priv->ieee80211->iw_mode == IW_MODE_INFRA)
5546 {
5547 u32 TotalRxBcnNum = 0;
5548 u32 TotalRxDataNum = 0;
5549
5550 rtl819x_update_rxcounts(priv, &TotalRxBcnNum, &TotalRxDataNum);
5551 if((TotalRxBcnNum+TotalRxDataNum) == 0)
5552 {
5553 #ifdef TODO
5554 if(rfState == eRfOff)
5555 RT_TRACE(COMP_ERR,"========>%s()\n",__FUNCTION__);
5556 #endif
5557 printk("===>%s(): AP is power off,connect another one\n",__FUNCTION__);
5558 // Dot11d_Reset(dev);
5559 priv->ieee80211->state = IEEE80211_ASSOCIATING;
5560 notify_wx_assoc_event(priv->ieee80211);
5561 RemovePeerTS(priv->ieee80211,priv->ieee80211->current_network.bssid);
5562 ieee->is_roaming = true;
5563 priv->ieee80211->link_change(dev);
5f53d8ca 5564 queue_work(priv->ieee80211->wq, &priv->ieee80211->associate_procedure_wq);
5f53d8ca
JC		 5565 }
5566 }
5567 priv->ieee80211->LinkDetectInfo.NumRecvBcnInPeriod=0;
5568 priv->ieee80211->LinkDetectInfo.NumRecvDataInPeriod=0;
5569 }
5570// CAM_read_entry(dev,4);
5571 //check if reset the driver
5572 if(check_reset_cnt++ >= 3 && !ieee->is_roaming)
5573 {
5574 ResetType = rtl819x_ifcheck_resetornot(dev);
5575 check_reset_cnt = 3;
5576 //DbgPrint("Start to check silent reset\n");
5577 }
5578 // RT_TRACE(COMP_RESET,"%s():priv->force_reset is %d,priv->ResetProgress is %d, priv->bForcedSilentReset is %d,priv->bDisableNormalResetCheck is %d,ResetType is %d\n",__FUNCTION__,priv->force_reset,priv->ResetProgress,priv->bForcedSilentReset,priv->bDisableNormalResetCheck,ResetType);
5579#if 1
5580 if( (priv->force_reset) || (priv->ResetProgress==RESET_TYPE_NORESET &&
5581 (priv->bForcedSilentReset ||
5582 (!priv->bDisableNormalResetCheck && ResetType==RESET_TYPE_SILENT)))) // This is control by OID set in Pomelo
5583 {
5584 RT_TRACE(COMP_RESET,"%s():priv->force_reset is %d,priv->ResetProgress is %d, priv->bForcedSilentReset is %d,priv->bDisableNormalResetCheck is %d,ResetType is %d\n",__FUNCTION__,priv->force_reset,priv->ResetProgress,priv->bForcedSilentReset,priv->bDisableNormalResetCheck,ResetType);
5585 rtl819x_ifsilentreset(dev);
5586 }
5587#endif
5588 priv->force_reset = false;
5589 priv->bForcedSilentReset = false;
5590 priv->bResetInProgress = false;
5591 RT_TRACE(COMP_TRACE, " <==RtUsbCheckForHangWorkItemCallback()\n");
5592
5593}
5594
5595void watch_dog_timer_callback(unsigned long data)
5596{
5597 struct r8192_priv *priv = ieee80211_priv((struct net_device *) data);
5598 //printk("===============>watch_dog timer\n");
5f53d8ca 5599 queue_delayed_work(priv->priv_wq,&priv->watch_dog_wq, 0);
5f53d8ca 5600 mod_timer(&priv->watch_dog_timer, jiffies + MSECS(IEEE80211_WATCH_DOG_TIME));
5f53d8ca
JC		 5601}
5602int _rtl8192_up(struct net_device *dev)
5603{
5604 struct r8192_priv *priv = ieee80211_priv(dev);
5605 //int i;
5606 int init_status = 0;
5607 priv->up=1;
5608 priv->ieee80211->ieee_up=1;
5609 RT_TRACE(COMP_INIT, "Bringing up iface");
5610 init_status = priv->ops->rtl819x_adapter_start(dev);
5611 if(!init_status)
5612 {
5613 RT_TRACE(COMP_ERR,"ERR!!! %s(): initialization is failed!\n", __FUNCTION__);
5614 priv->up=priv->ieee80211->ieee_up = 0;
5615 return -EAGAIN;
5616 }
5617 RT_TRACE(COMP_INIT, "start adapter finished\n");
5618 rtl8192_rx_enable(dev);
5619// rtl8192_tx_enable(dev);
5620 if(priv->ieee80211->state != IEEE80211_LINKED)
5621 ieee80211_softmac_start_protocol(priv->ieee80211);
5622 ieee80211_reset_queue(priv->ieee80211);
5623 watch_dog_timer_callback((unsigned long) dev);
5624 if(!netif_queue_stopped(dev))
5625 netif_start_queue(dev);
5626 else
5627 netif_wake_queue(dev);
5628
5629 /*
5630 * Make sure that drop_unencrypted is initialized as "0"
5631 * No packets will be sent in non-security mode if we had set drop_unencrypted.
5632 * ex, After kill wpa_supplicant process, make the driver up again.
5633 * drop_unencrypted remains as "1", which is set by wpa_supplicant. 2008/12/04.john
5634 */
5635 priv->ieee80211->drop_unencrypted = 0;
5636
5637 return 0;
5638}
5639
5640
5641int rtl8192_open(struct net_device *dev)
5642{
5643 struct r8192_priv *priv = ieee80211_priv(dev);
5644 int ret;
5645 down(&priv->wx_sem);
5646 ret = rtl8192_up(dev);
5647 up(&priv->wx_sem);
5648 return ret;
5649
5650}
5651
5652
5653int rtl8192_up(struct net_device *dev)
5654{
5655 struct r8192_priv *priv = ieee80211_priv(dev);
5656
5657 if (priv->up == 1) return -1;
5658
5659 return _rtl8192_up(dev);
5660}
5661
5662
5663int rtl8192_close(struct net_device *dev)
5664{
5665 struct r8192_priv *priv = ieee80211_priv(dev);
5666 int ret;
5667
5668 down(&priv->wx_sem);
5669
5670 ret = rtl8192_down(dev);
5671
5672 up(&priv->wx_sem);
5673
5674 return ret;
5675
5676}
5677
5678int rtl8192_down(struct net_device *dev)
5679{
5680 struct r8192_priv *priv = ieee80211_priv(dev);
5681 int i;
5682
5683 if (priv->up == 0) return -1;
5684
5685 priv->up=0;
5686 priv->ieee80211->ieee_up = 0;
5687 RT_TRACE(COMP_DOWN, "==========>%s()\n", __FUNCTION__);
5688/* FIXME */
5689 if (!netif_queue_stopped(dev))
5690 netif_stop_queue(dev);
5691
5692 rtl8192_rtx_disable(dev);
5693 //rtl8192_irq_disable(dev);
5694
5695 /* Tx related queue release */
5696 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
5697 skb_queue_purge(&priv->ieee80211->skb_waitQ [i]);
5698 }
5699 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
5700 skb_queue_purge(&priv->ieee80211->skb_aggQ [i]);
5701 }
5702
5703 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
5704 skb_queue_purge(&priv->ieee80211->skb_drv_aggQ [i]);
5705 }
5706
5707 //as cancel_delayed_work will del work->timer, so if work is not definedas struct delayed_work, it will corrupt
5708// flush_scheduled_work();
5709 rtl8192_cancel_deferred_work(priv);
5710 deinit_hal_dm(dev);
5711 del_timer_sync(&priv->watch_dog_timer);
5712
5713
5714 ieee80211_softmac_stop_protocol(priv->ieee80211);
5715 memset(&priv->ieee80211->current_network, 0 , offsetof(struct ieee80211_network, list));
5716 RT_TRACE(COMP_DOWN, "<==========%s()\n", __FUNCTION__);
5717
5718 return 0;
5719}
5720
5721
5722void rtl8192_commit(struct net_device *dev)
5723{
5724 struct r8192_priv *priv = ieee80211_priv(dev);
5725 int reset_status = 0;
5726 //u8 reset_times = 0;
5727 if (priv->up == 0) return ;
5728 priv->up = 0;
5729
5730 rtl8192_cancel_deferred_work(priv);
5731 del_timer_sync(&priv->watch_dog_timer);
5732 //cancel_delayed_work(&priv->SwChnlWorkItem);
5733
5734 ieee80211_softmac_stop_protocol(priv->ieee80211);
5735
5736 //rtl8192_irq_disable(dev);
5737 rtl8192_rtx_disable(dev);
5738 reset_status = _rtl8192_up(dev);
5739
5740}
5741
5742/*
5743void rtl8192_restart(struct net_device *dev)
5744{
5745 struct r8192_priv *priv = ieee80211_priv(dev);
5746*/
5f53d8ca
JC		 5747void rtl8192_restart(struct work_struct *work)
5748{
5749 struct r8192_priv *priv = container_of(work, struct r8192_priv, reset_wq);
5750 struct net_device *dev = priv->ieee80211->dev;
5f53d8ca
JC		 5751
5752 down(&priv->wx_sem);
5753
5754 rtl8192_commit(dev);
5755
5756 up(&priv->wx_sem);
5757}
5758
5759static void r8192_set_multicast(struct net_device *dev)
5760{
5761 struct r8192_priv *priv = ieee80211_priv(dev);
5762 short promisc;
5763
5764 //down(&priv->wx_sem);
5765
5766 /* FIXME FIXME */
5767
5768 promisc = (dev->flags & IFF_PROMISC) ? 1:0;
5769
5770 if (promisc != priv->promisc)
5771 // rtl8192_commit(dev);
5772
5773 priv->promisc = promisc;
5774
5775 //schedule_work(&priv->reset_wq);
5776 //up(&priv->wx_sem);
5777}
5778
5779
5780int r8192_set_mac_adr(struct net_device *dev, void *mac)
5781{
5782 struct r8192_priv *priv = ieee80211_priv(dev);
5783 struct sockaddr *addr = mac;
5784
5785 down(&priv->wx_sem);
5786
5787 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
5788
5f53d8ca 5789 schedule_work(&priv->reset_wq);
1ec9e48d 5790
5f53d8ca
JC		 5791 up(&priv->wx_sem);
5792
5793 return 0;
5794}
5795
5796/* based on ipw2200 driver */
5797int rtl8192_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
5798{
5799 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
5800 struct iwreq *wrq = (struct iwreq *)rq;
5801 int ret=-1;
5802 struct ieee80211_device *ieee = priv->ieee80211;
5803 u32 key[4];
5804 u8 broadcast_addr[6] = {0xff,0xff,0xff,0xff,0xff,0xff};
5805 u8 zero_addr[6] = {0};
5806 struct iw_point *p = &wrq->u.data;
5807 struct ieee_param *ipw = NULL;//(struct ieee_param *)wrq->u.data.pointer;
5808
5809 down(&priv->wx_sem);
5810
5811
5812 if (p->length < sizeof(struct ieee_param) || !p->pointer){
5813 ret = -EINVAL;
5814 goto out;
5815 }
5816
5817 ipw = (struct ieee_param *)kmalloc(p->length, GFP_KERNEL);
5818 if (ipw == NULL){
5819 ret = -ENOMEM;
5820 goto out;
5821 }
5822 if (copy_from_user(ipw, p->pointer, p->length)) {
5823 kfree(ipw);
5824 ret = -EFAULT;
5825 goto out;
5826 }
5827
5828 switch (cmd) {
5829 case RTL_IOCTL_WPA_SUPPLICANT:
5830 //parse here for HW security
5831 if (ipw->cmd == IEEE_CMD_SET_ENCRYPTION)
5832 {
5833 if (ipw->u.crypt.set_tx)
5834 {
5835 if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
5836 ieee->pairwise_key_type = KEY_TYPE_CCMP;
5837 else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
5838 ieee->pairwise_key_type = KEY_TYPE_TKIP;
5839 else if (strcmp(ipw->u.crypt.alg, "WEP") == 0)
5840 {
5841 if (ipw->u.crypt.key_len == 13)
5842 ieee->pairwise_key_type = KEY_TYPE_WEP104;
5843 else if (ipw->u.crypt.key_len == 5)
5844 ieee->pairwise_key_type = KEY_TYPE_WEP40;
5845 }
5846 else
5847 ieee->pairwise_key_type = KEY_TYPE_NA;
5848
5849 if (ieee->pairwise_key_type)
5850 {
5851 // FIXME:these two lines below just to fix ipw interface bug, that is, it will never set mode down to driver. So treat it as ADHOC mode, if no association procedure. WB. 2009.02.04
5852 if (memcmp(ieee->ap_mac_addr, zero_addr, 6) == 0)
5853 ieee->iw_mode = IW_MODE_ADHOC;
5854 memcpy((u8*)key, ipw->u.crypt.key, 16);
5855 EnableHWSecurityConfig8192(dev);
5856 //we fill both index entry and 4th entry for pairwise key as in IPW interface, adhoc will only get here, so we need index entry for its default key serching!
5857 //added by WB.
5858 setKey(dev, 4, ipw->u.crypt.idx, ieee->pairwise_key_type, (u8*)ieee->ap_mac_addr, 0, key);
5859 if (ieee->iw_mode == IW_MODE_ADHOC)
5860 setKey(dev, ipw->u.crypt.idx, ipw->u.crypt.idx, ieee->pairwise_key_type, (u8*)ieee->ap_mac_addr, 0, key);
5861 }
5862 }
5863 else //if (ipw->u.crypt.idx) //group key use idx > 0
5864 {
5865 memcpy((u8*)key, ipw->u.crypt.key, 16);
5866 if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
5867 ieee->group_key_type= KEY_TYPE_CCMP;
5868 else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
5869 ieee->group_key_type = KEY_TYPE_TKIP;
5870 else if (strcmp(ipw->u.crypt.alg, "WEP") == 0)
5871 {
5872 if (ipw->u.crypt.key_len == 13)
5873 ieee->group_key_type = KEY_TYPE_WEP104;
5874 else if (ipw->u.crypt.key_len == 5)
5875 ieee->group_key_type = KEY_TYPE_WEP40;
5876 }
5877 else
5878 ieee->group_key_type = KEY_TYPE_NA;
5879
5880 if (ieee->group_key_type)
5881 {
5882 setKey( dev,
5883 ipw->u.crypt.idx,
5884 ipw->u.crypt.idx, //KeyIndex
5885 ieee->group_key_type, //KeyType
5886 broadcast_addr, //MacAddr
5887 0, //DefaultKey
5888 key); //KeyContent
5889 }
5890 }
5891 }
5892#ifdef JOHN_HWSEC_DEBUG
5893 //john's test 0711
5894 printk("@@ wrq->u pointer = ");
5895 for(i=0;i<wrq->u.data.length;i++){
5896 if(i%10==0) printk("\n");
5897 printk( "%8x|", ((u32*)wrq->u.data.pointer)[i] );
5898 }
5899 printk("\n");
5900#endif /*JOHN_HWSEC_DEBUG*/
5901 ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data);
5902 break;
5903
5904 default:
5905 ret = -EOPNOTSUPP;
5906 break;
5907 }
5908 kfree(ipw);
5909 ipw = NULL;
5910out:
5911 up(&priv->wx_sem);
5912 return ret;
5913}
5914
5f53d8ca
JC		 5915u8 rtl8192SU_HwRateToMRate(bool bIsHT, u8 rate,bool bFirstAMPDU)
5916{
5917
5918 u8 ret_rate = 0x02;
5919
5920 if( bFirstAMPDU )
5921 {
5922 if(!bIsHT)
5923 {
5924 switch(rate)
5925 {
5926
5927 case DESC92S_RATE1M: ret_rate = MGN_1M; break;
5928 case DESC92S_RATE2M: ret_rate = MGN_2M; break;
5929 case DESC92S_RATE5_5M: ret_rate = MGN_5_5M; break;
5930 case DESC92S_RATE11M: ret_rate = MGN_11M; break;
5931 case DESC92S_RATE6M: ret_rate = MGN_6M; break;
5932 case DESC92S_RATE9M: ret_rate = MGN_9M; break;
5933 case DESC92S_RATE12M: ret_rate = MGN_12M; break;
5934 case DESC92S_RATE18M: ret_rate = MGN_18M; break;
5935 case DESC92S_RATE24M: ret_rate = MGN_24M; break;
5936 case DESC92S_RATE36M: ret_rate = MGN_36M; break;
5937 case DESC92S_RATE48M: ret_rate = MGN_48M; break;
5938 case DESC92S_RATE54M: ret_rate = MGN_54M; break;
5939
5940 default:
5941 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n", rate, bIsHT);
5942 break;
5943 }
5944 }
5945 else
5946 {
5947 switch(rate)
5948 {
5949
5950 case DESC92S_RATEMCS0: ret_rate = MGN_MCS0; break;
5951 case DESC92S_RATEMCS1: ret_rate = MGN_MCS1; break;
5952 case DESC92S_RATEMCS2: ret_rate = MGN_MCS2; break;
5953 case DESC92S_RATEMCS3: ret_rate = MGN_MCS3; break;
5954 case DESC92S_RATEMCS4: ret_rate = MGN_MCS4; break;
5955 case DESC92S_RATEMCS5: ret_rate = MGN_MCS5; break;
5956 case DESC92S_RATEMCS6: ret_rate = MGN_MCS6; break;
5957 case DESC92S_RATEMCS7: ret_rate = MGN_MCS7; break;
5958 case DESC92S_RATEMCS8: ret_rate = MGN_MCS8; break;
5959 case DESC92S_RATEMCS9: ret_rate = MGN_MCS9; break;
5960 case DESC92S_RATEMCS10: ret_rate = MGN_MCS10; break;
5961 case DESC92S_RATEMCS11: ret_rate = MGN_MCS11; break;
5962 case DESC92S_RATEMCS12: ret_rate = MGN_MCS12; break;
5963 case DESC92S_RATEMCS13: ret_rate = MGN_MCS13; break;
5964 case DESC92S_RATEMCS14: ret_rate = MGN_MCS14; break;
5965 case DESC92S_RATEMCS15: ret_rate = MGN_MCS15; break;
5966 case DESC92S_RATEMCS32: ret_rate = (0x80|0x20); break;
5967
5968 default:
5969 RT_TRACE(COMP_RECV, "HwRateToMRate92S(): Non supported Rate [%x], bIsHT = %d!!!\n",rate, bIsHT );
5970 break;
5971 }
5972
5973 }
5974 }
5975 else
5976 {
5977 switch(rate)
5978 {
5979
5980 case DESC92S_RATE1M: ret_rate = MGN_1M; break;
5981 case DESC92S_RATE2M: ret_rate = MGN_2M; break;
5982 case DESC92S_RATE5_5M: ret_rate = MGN_5_5M; break;
5983 case DESC92S_RATE11M: ret_rate = MGN_11M; break;
5984 case DESC92S_RATE6M: ret_rate = MGN_6M; break;
5985 case DESC92S_RATE9M: ret_rate = MGN_9M; break;
5986 case DESC92S_RATE12M: ret_rate = MGN_12M; break;
5987 case DESC92S_RATE18M: ret_rate = MGN_18M; break;
5988 case DESC92S_RATE24M: ret_rate = MGN_24M; break;
5989 case DESC92S_RATE36M: ret_rate = MGN_36M; break;
5990 case DESC92S_RATE48M: ret_rate = MGN_48M; break;
5991 case DESC92S_RATE54M: ret_rate = MGN_54M; break;
5992 case DESC92S_RATEMCS0: ret_rate = MGN_MCS0; break;
5993 case DESC92S_RATEMCS1: ret_rate = MGN_MCS1; break;
5994 case DESC92S_RATEMCS2: ret_rate = MGN_MCS2; break;
5995 case DESC92S_RATEMCS3: ret_rate = MGN_MCS3; break;
5996 case DESC92S_RATEMCS4: ret_rate = MGN_MCS4; break;
5997 case DESC92S_RATEMCS5: ret_rate = MGN_MCS5; break;
5998 case DESC92S_RATEMCS6: ret_rate = MGN_MCS6; break;
5999 case DESC92S_RATEMCS7: ret_rate = MGN_MCS7; break;
6000 case DESC92S_RATEMCS8: ret_rate = MGN_MCS8; break;
6001 case DESC92S_RATEMCS9: ret_rate = MGN_MCS9; break;
6002 case DESC92S_RATEMCS10: ret_rate = MGN_MCS10; break;
6003 case DESC92S_RATEMCS11: ret_rate = MGN_MCS11; break;
6004 case DESC92S_RATEMCS12: ret_rate = MGN_MCS12; break;
6005 case DESC92S_RATEMCS13: ret_rate = MGN_MCS13; break;
6006 case DESC92S_RATEMCS14: ret_rate = MGN_MCS14; break;
6007 case DESC92S_RATEMCS15: ret_rate = MGN_MCS15; break;
6008 case DESC92S_RATEMCS32: ret_rate = (0x80|0x20); break;
6009
6010 default:
6011 RT_TRACE(COMP_RECV, "HwRateToMRate92S(): Non supported Rate [%x], bIsHT = %d!!!\n",rate, bIsHT );
6012 break;
6013 }
6014 }
6015 return ret_rate;
6016}
5f53d8ca
JC		 6017
6018u8 HwRateToMRate90(bool bIsHT, u8 rate)
6019{
6020 u8 ret_rate = 0xff;
6021
6022 if(!bIsHT) {
6023 switch(rate) {
6024 case DESC90_RATE1M: ret_rate = MGN_1M; break;
6025 case DESC90_RATE2M: ret_rate = MGN_2M; break;
6026 case DESC90_RATE5_5M: ret_rate = MGN_5_5M; break;
6027 case DESC90_RATE11M: ret_rate = MGN_11M; break;
6028 case DESC90_RATE6M: ret_rate = MGN_6M; break;
6029 case DESC90_RATE9M: ret_rate = MGN_9M; break;
6030 case DESC90_RATE12M: ret_rate = MGN_12M; break;
6031 case DESC90_RATE18M: ret_rate = MGN_18M; break;
6032 case DESC90_RATE24M: ret_rate = MGN_24M; break;
6033 case DESC90_RATE36M: ret_rate = MGN_36M; break;
6034 case DESC90_RATE48M: ret_rate = MGN_48M; break;
6035 case DESC90_RATE54M: ret_rate = MGN_54M; break;
6036
6037 default:
6038 ret_rate = 0xff;
6039 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n", rate, bIsHT);
6040 break;
6041 }
6042
6043 } else {
6044 switch(rate) {
6045 case DESC90_RATEMCS0: ret_rate = MGN_MCS0; break;
6046 case DESC90_RATEMCS1: ret_rate = MGN_MCS1; break;
6047 case DESC90_RATEMCS2: ret_rate = MGN_MCS2; break;
6048 case DESC90_RATEMCS3: ret_rate = MGN_MCS3; break;
6049 case DESC90_RATEMCS4: ret_rate = MGN_MCS4; break;
6050 case DESC90_RATEMCS5: ret_rate = MGN_MCS5; break;
6051 case DESC90_RATEMCS6: ret_rate = MGN_MCS6; break;
6052 case DESC90_RATEMCS7: ret_rate = MGN_MCS7; break;
6053 case DESC90_RATEMCS8: ret_rate = MGN_MCS8; break;
6054 case DESC90_RATEMCS9: ret_rate = MGN_MCS9; break;
6055 case DESC90_RATEMCS10: ret_rate = MGN_MCS10; break;
6056 case DESC90_RATEMCS11: ret_rate = MGN_MCS11; break;
6057 case DESC90_RATEMCS12: ret_rate = MGN_MCS12; break;
6058 case DESC90_RATEMCS13: ret_rate = MGN_MCS13; break;
6059 case DESC90_RATEMCS14: ret_rate = MGN_MCS14; break;
6060 case DESC90_RATEMCS15: ret_rate = MGN_MCS15; break;
6061 case DESC90_RATEMCS32: ret_rate = (0x80|0x20); break;
6062
6063 default:
6064 ret_rate = 0xff;
6065 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n",rate, bIsHT);
6066 break;
6067 }
6068 }
6069
6070 return ret_rate;
6071}
6072
6073/**
6074 * Function: UpdateRxPktTimeStamp
6075 * Overview: Recored down the TSF time stamp when receiving a packet
6076 *
6077 * Input:
6078 * PADAPTER Adapter
6079 * PRT_RFD pRfd,
6080 *
6081 * Output:
6082 * PRT_RFD pRfd
6083 * (pRfd->Status.TimeStampHigh is updated)
6084 * (pRfd->Status.TimeStampLow is updated)
6085 * Return:
6086 * None
6087 */
6088void UpdateRxPktTimeStamp8190 (struct net_device *dev, struct ieee80211_rx_stats *stats)
6089{
6090 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6091
6092 if(stats->bIsAMPDU && !stats->bFirstMPDU) {
6093 stats->mac_time[0] = priv->LastRxDescTSFLow;
6094 stats->mac_time[1] = priv->LastRxDescTSFHigh;
6095 } else {
6096 priv->LastRxDescTSFLow = stats->mac_time[0];
6097 priv->LastRxDescTSFHigh = stats->mac_time[1];
6098 }
6099}
6100
6101//by amy 080606
6102
6103long rtl819x_translate_todbm(u8 signal_strength_index )// 0-100 index.
6104{
6105 long signal_power; // in dBm.
6106
6107 // Translate to dBm (x=0.5y-95).
6108 signal_power = (long)((signal_strength_index + 1) >> 1);
6109 signal_power -= 95;
6110
6111 return signal_power;
6112}
6113
6114
6115/* 2008/01/22 MH We can not delcare RSSI/EVM total value of sliding window to
6116 be a local static. Otherwise, it may increase when we return from S3/S4. The
6117 value will be kept in memory or disk. We must delcare the value in adapter
6118 and it will be reinitialized when return from S3/S4. */
6119void rtl8192_process_phyinfo(struct r8192_priv * priv,u8* buffer, struct ieee80211_rx_stats * pprevious_stats, struct ieee80211_rx_stats * pcurrent_stats)
6120{
6121 bool bcheck = false;
6122 u8 rfpath;
6123 u32 nspatial_stream, tmp_val;
6124 //u8 i;
6125 static u32 slide_rssi_index=0, slide_rssi_statistics=0;
6126 static u32 slide_evm_index=0, slide_evm_statistics=0;
6127 static u32 last_rssi=0, last_evm=0;
6128
6129 static u32 slide_beacon_adc_pwdb_index=0, slide_beacon_adc_pwdb_statistics=0;
6130 static u32 last_beacon_adc_pwdb=0;
6131
6132 struct ieee80211_hdr_3addr *hdr;
6133 u16 sc ;
6134 unsigned int frag,seq;
6135 hdr = (struct ieee80211_hdr_3addr *)buffer;
e2117cea 6136 sc = le16_to_cpu(hdr->seq_ctrl);
5f53d8ca
JC		 6137 frag = WLAN_GET_SEQ_FRAG(sc);
6138 seq = WLAN_GET_SEQ_SEQ(sc);
6139 //cosa add 04292008 to record the sequence number
6140 pcurrent_stats->Seq_Num = seq;
6141 //
6142 // Check whether we should take the previous packet into accounting
6143 //
6144 if(!pprevious_stats->bIsAMPDU)
6145 {
6146 // if previous packet is not aggregated packet
6147 bcheck = true;
6148 }else
6149 {
5f53d8ca
JC		 6150 }
6151
6152
6153 if(slide_rssi_statistics++ >= PHY_RSSI_SLID_WIN_MAX)
6154 {
6155 slide_rssi_statistics = PHY_RSSI_SLID_WIN_MAX;
6156 last_rssi = priv->stats.slide_signal_strength[slide_rssi_index];
6157 priv->stats.slide_rssi_total -= last_rssi;
6158 }
6159 priv->stats.slide_rssi_total += pprevious_stats->SignalStrength;
6160
6161 priv->stats.slide_signal_strength[slide_rssi_index++] = pprevious_stats->SignalStrength;
6162 if(slide_rssi_index >= PHY_RSSI_SLID_WIN_MAX)
6163 slide_rssi_index = 0;
6164
6165 // <1> Showed on UI for user, in dbm
6166 tmp_val = priv->stats.slide_rssi_total/slide_rssi_statistics;
6167 priv->stats.signal_strength = rtl819x_translate_todbm((u8)tmp_val);
6168 pcurrent_stats->rssi = priv->stats.signal_strength;
6169 //
6170 // If the previous packet does not match the criteria, neglect it
6171 //
6172 if(!pprevious_stats->bPacketMatchBSSID)
6173 {
6174 if(!pprevious_stats->bToSelfBA)
6175 return;
6176 }
6177
6178 if(!bcheck)
6179 return;
6180
6181
6182 //rtl8190_process_cck_rxpathsel(priv,pprevious_stats);//only rtl8190 supported
6183
6184 //
6185 // Check RSSI
6186 //
6187 priv->stats.num_process_phyinfo++;
6188
6189 /* record the general signal strength to the sliding window. */
6190
6191
6192 // <2> Showed on UI for engineering
6193 // hardware does not provide rssi information for each rf path in CCK
6194 if(!pprevious_stats->bIsCCK && (pprevious_stats->bPacketToSelf || pprevious_stats->bToSelfBA))
6195 {
6196 for (rfpath = RF90_PATH_A; rfpath < priv->NumTotalRFPath; rfpath++)
6197 {
6198 if (!rtl8192_phy_CheckIsLegalRFPath(priv->ieee80211->dev, rfpath))
6199 continue;
6200
6201 //Fixed by Jacken 2008-03-20
6202 if(priv->stats.rx_rssi_percentage[rfpath] == 0)
6203 {
6204 priv->stats.rx_rssi_percentage[rfpath] = pprevious_stats->RxMIMOSignalStrength[rfpath];
6205 //DbgPrint("MIMO RSSI initialize \n");
6206 }
6207 if(pprevious_stats->RxMIMOSignalStrength[rfpath] > priv->stats.rx_rssi_percentage[rfpath])
6208 {
6209 priv->stats.rx_rssi_percentage[rfpath] =
6210 ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
6211 (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
6212 priv->stats.rx_rssi_percentage[rfpath] = priv->stats.rx_rssi_percentage[rfpath] + 1;
6213 }
6214 else
6215 {
6216 priv->stats.rx_rssi_percentage[rfpath] =
6217 ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
6218 (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
6219 }
6220 RT_TRACE(COMP_DBG,"priv->stats.rx_rssi_percentage[rfPath] = %d \n" ,priv->stats.rx_rssi_percentage[rfpath] );
6221 }
6222 }
6223
6224
6225 //
6226 // Check PWDB.
6227 //
6228 RT_TRACE(COMP_RXDESC, "Smooth %s PWDB = %d\n",
6229 pprevious_stats->bIsCCK? "CCK": "OFDM",
6230 pprevious_stats->RxPWDBAll);
6231
6232 if(pprevious_stats->bPacketBeacon)
6233 {
6234/* record the beacon pwdb to the sliding window. */
6235 if(slide_beacon_adc_pwdb_statistics++ >= PHY_Beacon_RSSI_SLID_WIN_MAX)
6236 {
6237 slide_beacon_adc_pwdb_statistics = PHY_Beacon_RSSI_SLID_WIN_MAX;
6238 last_beacon_adc_pwdb = priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index];
6239 priv->stats.Slide_Beacon_Total -= last_beacon_adc_pwdb;
6240 //DbgPrint("slide_beacon_adc_pwdb_index = %d, last_beacon_adc_pwdb = %d, Adapter->RxStats.Slide_Beacon_Total = %d\n",
6241 // slide_beacon_adc_pwdb_index, last_beacon_adc_pwdb, Adapter->RxStats.Slide_Beacon_Total);
6242 }
6243 priv->stats.Slide_Beacon_Total += pprevious_stats->RxPWDBAll;
6244 priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index] = pprevious_stats->RxPWDBAll;
6245 //DbgPrint("slide_beacon_adc_pwdb_index = %d, pPreviousRfd->Status.RxPWDBAll = %d\n", slide_beacon_adc_pwdb_index, pPreviousRfd->Status.RxPWDBAll);
6246 slide_beacon_adc_pwdb_index++;
6247 if(slide_beacon_adc_pwdb_index >= PHY_Beacon_RSSI_SLID_WIN_MAX)
6248 slide_beacon_adc_pwdb_index = 0;
6249 pprevious_stats->RxPWDBAll = priv->stats.Slide_Beacon_Total/slide_beacon_adc_pwdb_statistics;
6250 if(pprevious_stats->RxPWDBAll >= 3)
6251 pprevious_stats->RxPWDBAll -= 3;
6252 }
6253
6254 RT_TRACE(COMP_RXDESC, "Smooth %s PWDB = %d\n",
6255 pprevious_stats->bIsCCK? "CCK": "OFDM",
6256 pprevious_stats->RxPWDBAll);
6257
6258
6259 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
6260 {
6261 if(priv->undecorated_smoothed_pwdb < 0) // initialize
6262 {
6263 priv->undecorated_smoothed_pwdb = pprevious_stats->RxPWDBAll;
6264 //DbgPrint("First pwdb initialize \n");
6265 }
6266#if 1
6267 if(pprevious_stats->RxPWDBAll > (u32)priv->undecorated_smoothed_pwdb)
6268 {
6269 priv->undecorated_smoothed_pwdb =
6270 ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
6271 (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
6272 priv->undecorated_smoothed_pwdb = priv->undecorated_smoothed_pwdb + 1;
6273 }
6274 else
6275 {
6276 priv->undecorated_smoothed_pwdb =
6277 ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
6278 (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
6279 }
6280#else
6281 //Fixed by Jacken 2008-03-20
6282 if(pPreviousRfd->Status.RxPWDBAll > (u32)pHalData->UndecoratedSmoothedPWDB)
6283 {
6284 pHalData->UndecoratedSmoothedPWDB =
6285 ( ((pHalData->UndecoratedSmoothedPWDB)* 5) + (pPreviousRfd->Status.RxPWDBAll)) / 6;
6286 pHalData->UndecoratedSmoothedPWDB = pHalData->UndecoratedSmoothedPWDB + 1;
6287 }
6288 else
6289 {
6290 pHalData->UndecoratedSmoothedPWDB =
6291 ( ((pHalData->UndecoratedSmoothedPWDB)* 5) + (pPreviousRfd->Status.RxPWDBAll)) / 6;
6292 }
6293#endif
6294
6295 }
6296
6297 //
6298 // Check EVM
6299 //
6300 /* record the general EVM to the sliding window. */
6301 if(pprevious_stats->SignalQuality == 0)
6302 {
6303 }
6304 else
6305 {
6306 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA){
6307 if(slide_evm_statistics++ >= PHY_RSSI_SLID_WIN_MAX){
6308 slide_evm_statistics = PHY_RSSI_SLID_WIN_MAX;
6309 last_evm = priv->stats.slide_evm[slide_evm_index];
6310 priv->stats.slide_evm_total -= last_evm;
6311 }
6312
6313 priv->stats.slide_evm_total += pprevious_stats->SignalQuality;
6314
6315 priv->stats.slide_evm[slide_evm_index++] = pprevious_stats->SignalQuality;
6316 if(slide_evm_index >= PHY_RSSI_SLID_WIN_MAX)
6317 slide_evm_index = 0;
6318
6319 // <1> Showed on UI for user, in percentage.
6320 tmp_val = priv->stats.slide_evm_total/slide_evm_statistics;
6321 priv->stats.signal_quality = tmp_val;
6322 //cosa add 10/11/2007, Showed on UI for user in Windows Vista, for Link quality.
6323 priv->stats.last_signal_strength_inpercent = tmp_val;
6324 }
6325
6326 // <2> Showed on UI for engineering
6327 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
6328 {
6329 for(nspatial_stream = 0; nspatial_stream<2 ; nspatial_stream++) // 2 spatial stream
6330 {
6331 if(pprevious_stats->RxMIMOSignalQuality[nspatial_stream] != -1)
6332 {
6333 if(priv->stats.rx_evm_percentage[nspatial_stream] == 0) // initialize
6334 {
6335 priv->stats.rx_evm_percentage[nspatial_stream] = pprevious_stats->RxMIMOSignalQuality[nspatial_stream];
6336 }
6337 priv->stats.rx_evm_percentage[nspatial_stream] =
6338 ( (priv->stats.rx_evm_percentage[nspatial_stream]* (Rx_Smooth_Factor-1)) +
6339 (pprevious_stats->RxMIMOSignalQuality[nspatial_stream]* 1)) / (Rx_Smooth_Factor);
6340 }
6341 }
6342 }
6343 }
6344
6345
6346}
6347
6348/*-----------------------------------------------------------------------------
6349 * Function: rtl819x_query_rxpwrpercentage()
6350 *
6351 * Overview:
6352 *
6353 * Input: char antpower
6354 *
6355 * Output: NONE
6356 *
6357 * Return: 0-100 percentage
6358 *
6359 * Revised History:
6360 * When Who Remark
6361 * 05/26/2008 amy Create Version 0 porting from windows code.
6362 *
6363 *---------------------------------------------------------------------------*/
6364static u8 rtl819x_query_rxpwrpercentage(
6365 char antpower
6366 )
6367{
6368 if ((antpower <= -100) || (antpower >= 20))
6369 {
6370 return 0;
6371 }
6372 else if (antpower >= 0)
6373 {
6374 return 100;
6375 }
6376 else
6377 {
6378 return (100+antpower);
6379 }
6380
6381} /* QueryRxPwrPercentage */
6382
6383static u8
6384rtl819x_evm_dbtopercentage(
6385 char value
6386 )
6387{
6388 char ret_val;
6389
6390 ret_val = value;
6391
6392 if(ret_val >= 0)
6393 ret_val = 0;
6394 if(ret_val <= -33)
6395 ret_val = -33;
6396 ret_val = 0 - ret_val;
6397 ret_val*=3;
6398 if(ret_val == 99)
6399 ret_val = 100;
6400 return(ret_val);
6401}
6402//
6403// Description:
6404// We want good-looking for signal strength/quality
6405// 2007/7/19 01:09, by cosa.
6406//
6407long
6408rtl819x_signal_scale_mapping(
6409 long currsig
6410 )
6411{
6412 long retsig;
6413
6414 // Step 1. Scale mapping.
6415 if(currsig >= 61 && currsig <= 100)
6416 {
6417 retsig = 90 + ((currsig - 60) / 4);
6418 }
6419 else if(currsig >= 41 && currsig <= 60)
6420 {
6421 retsig = 78 + ((currsig - 40) / 2);
6422 }
6423 else if(currsig >= 31 && currsig <= 40)
6424 {
6425 retsig = 66 + (currsig - 30);
6426 }
6427 else if(currsig >= 21 && currsig <= 30)
6428 {
6429 retsig = 54 + (currsig - 20);
6430 }
6431 else if(currsig >= 5 && currsig <= 20)
6432 {
6433 retsig = 42 + (((currsig - 5) * 2) / 3);
6434 }
6435 else if(currsig == 4)
6436 {
6437 retsig = 36;
6438 }
6439 else if(currsig == 3)
6440 {
6441 retsig = 27;
6442 }
6443 else if(currsig == 2)
6444 {
6445 retsig = 18;
6446 }
6447 else if(currsig == 1)
6448 {
6449 retsig = 9;
6450 }
6451 else
6452 {
6453 retsig = currsig;
6454 }
6455
6456 return retsig;
6457}
6458
5f53d8ca
JC		 6459/*-----------------------------------------------------------------------------
6460 * Function: QueryRxPhyStatus8192S()
6461 *
6462 * Overview:
6463 *
6464 * Input: NONE
6465 *
6466 * Output: NONE
6467 *
6468 * Return: NONE
6469 *
6470 * Revised History:
6471 * When Who Remark
6472 * 06/01/2007 MHC Create Version 0.
6473 * 06/05/2007 MHC Accordign to HW's new data sheet, we add CCK and OFDM
6474 * descriptor definition.
6475 * 07/04/2007 MHC According to Jerry and Bryant's document. We read
6476 * ir_isolation and ext_lna for RF's init value and use
6477 * to compensate RSSI after receiving packets.
6478 * 09/10/2008 MHC Modify name and PHY status field for 92SE.
6479 * 09/19/2008 MHC Add CCK/OFDM SS/SQ for 92S series.
6480 *
6481 *---------------------------------------------------------------------------*/
6482static void rtl8192SU_query_rxphystatus(
6483 struct r8192_priv * priv,
6484 struct ieee80211_rx_stats * pstats,
6485 rx_desc_819x_usb *pDesc,
6486 rx_drvinfo_819x_usb * pdrvinfo,
6487 struct ieee80211_rx_stats * precord_stats,
6488 bool bpacket_match_bssid,
6489 bool bpacket_toself,
6490 bool bPacketBeacon,
6491 bool bToSelfBA
6492 )
6493{
6494 //PRT_RFD_STATUS pRtRfdStatus = &(pRfd->Status);
6495 //PHY_STS_CCK_8192S_T *pCck_buf;
6496 phy_sts_cck_819xusb_t * pcck_buf;
6497 phy_ofdm_rx_status_rxsc_sgien_exintfflag* prxsc;
6498 //u8 *prxpkt;
6499 //u8 i, max_spatial_stream, tmp_rxsnr, tmp_rxevm, rxsc_sgien_exflg;
6500 u8 i, max_spatial_stream, rxsc_sgien_exflg;
6501 char rx_pwr[4], rx_pwr_all=0;
6502 //long rx_avg_pwr = 0;
6503 //char rx_snrX, rx_evmX;
6504 u8 evm, pwdb_all;
6505 u32 RSSI, total_rssi=0;//, total_evm=0;
6506// long signal_strength_index = 0;
6507 u8 is_cck_rate=0;
6508 u8 rf_rx_num = 0;
6509
6510
6511
6512 priv->stats.numqry_phystatus++;
6513
6514 is_cck_rate = rx_hal_is_cck_rate(pDesc);
6515
6516 // Record it for next packet processing
6517 memset(precord_stats, 0, sizeof(struct ieee80211_rx_stats));
6518 pstats->bPacketMatchBSSID = precord_stats->bPacketMatchBSSID = bpacket_match_bssid;
6519 pstats->bPacketToSelf = precord_stats->bPacketToSelf = bpacket_toself;
6520 pstats->bIsCCK = precord_stats->bIsCCK = is_cck_rate;//RX_HAL_IS_CCK_RATE(pDrvInfo);
6521 pstats->bPacketBeacon = precord_stats->bPacketBeacon = bPacketBeacon;
6522 pstats->bToSelfBA = precord_stats->bToSelfBA = bToSelfBA;
6523
5f53d8ca
JC		 6524
6525 pstats->RxMIMOSignalQuality[0] = -1;
6526 pstats->RxMIMOSignalQuality[1] = -1;
6527 precord_stats->RxMIMOSignalQuality[0] = -1;
6528 precord_stats->RxMIMOSignalQuality[1] = -1;
6529
6530 if(is_cck_rate)
6531 {
6532 u8 report;//, tmp_pwdb;
6533 //char cck_adc_pwdb[4];
6534
6535 // CCK Driver info Structure is not the same as OFDM packet.
6536 pcck_buf = (phy_sts_cck_819xusb_t *)pdrvinfo;
6537
6538 //
6539 // (1)Hardware does not provide RSSI for CCK
6540 //
6541
6542 //
6543 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
6544 //
6545
6546 priv->stats.numqry_phystatusCCK++;
6547
6548 if(!priv->bCckHighPower)
6549 {
6550 report = pcck_buf->cck_agc_rpt & 0xc0;
6551 report = report>>6;
6552 switch(report)
6553 {
6554 //Fixed by Jacken from Bryant 2008-03-20
6555 //Original value is -38 , -26 , -14 , -2
6556 //Fixed value is -35 , -23 , -11 , 6
6557 case 0x3:
6558 rx_pwr_all = -35 - (pcck_buf->cck_agc_rpt & 0x3e);
6559 break;
6560 case 0x2:
6561 rx_pwr_all = -23 - (pcck_buf->cck_agc_rpt & 0x3e);
6562 break;
6563 case 0x1:
6564 rx_pwr_all = -11 - (pcck_buf->cck_agc_rpt & 0x3e);
6565 break;
6566 case 0x0:
6567 rx_pwr_all = 8 - (pcck_buf->cck_agc_rpt & 0x3e);//6->8
6568 break;
6569 }
6570 }
6571 else
6572 {
6573 report = pdrvinfo->cfosho[0] & 0x60;
6574 report = report>>5;
6575 switch(report)
6576 {
6577 case 0x3:
6578 rx_pwr_all = -35 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
6579 break;
6580 case 0x2:
6581 rx_pwr_all = -23 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1);
6582 break;
6583 case 0x1:
6584 rx_pwr_all = -11 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
6585 break;
6586 case 0x0:
6587 rx_pwr_all = -8 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;//6->-8
6588 break;
6589 }
6590 }
6591
6592 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);//check it
6593 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
6594 //pstats->RecvSignalPower = pwdb_all;
6595 pstats->RecvSignalPower = rx_pwr_all;
6596
6597 //
6598 // (3) Get Signal Quality (EVM)
6599 //
6600 //if(bpacket_match_bssid)
6601 {
6602 u8 sq;
6603
6604 if(pstats->RxPWDBAll > 40)
6605 {
6606 sq = 100;
6607 }else
6608 {
6609 sq = pcck_buf->sq_rpt;
6610
6611 if(pcck_buf->sq_rpt > 64)
6612 sq = 0;
6613 else if (pcck_buf->sq_rpt < 20)
6614 sq = 100;
6615 else
6616 sq = ((64-sq) * 100) / 44;
6617 }
6618 pstats->SignalQuality = precord_stats->SignalQuality = sq;
6619 pstats->RxMIMOSignalQuality[0] = precord_stats->RxMIMOSignalQuality[0] = sq;
6620 pstats->RxMIMOSignalQuality[1] = precord_stats->RxMIMOSignalQuality[1] = -1;
6621 }
6622 }
6623 else
6624 {
6625 priv->stats.numqry_phystatusHT++;
6626
6627 // 2008/09/19 MH For 92S debug, RX RF path always enable!!
6628 priv->brfpath_rxenable[0] = priv->brfpath_rxenable[1] = TRUE;
6629
6630 //
6631 // (1)Get RSSI for HT rate
6632 //
6633 //for(i=RF90_PATH_A; i<priv->NumTotalRFPath; i++)
6634 for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
6635 {
6636 // 2008/01/30 MH we will judge RF RX path now.
6637 if (priv->brfpath_rxenable[i])
6638 rf_rx_num++;
6639 //else
6640 // continue;
6641
6642 //if (!rtl8192_phy_CheckIsLegalRFPath(priv->ieee80211->dev, i))
6643 // continue;
6644
6645 //Fixed by Jacken from Bryant 2008-03-20
6646 //Original value is 106
6647 //rx_pwr[i] = ((pofdm_buf->trsw_gain_X[i]&0x3F)*2) - 106;
6648 rx_pwr[i] = ((pdrvinfo->gain_trsw[i]&0x3F)*2) - 110;
6649
6650 /* Translate DBM to percentage. */
6651 RSSI = rtl819x_query_rxpwrpercentage(rx_pwr[i]); //check ok
6652 total_rssi += RSSI;
6653 RT_TRACE(COMP_RF, "RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], RSSI);
6654
6655 //Get Rx snr value in DB
6656 //tmp_rxsnr = pofdm_buf->rxsnr_X[i];
6657 //rx_snrX = (char)(tmp_rxsnr);
6658 //rx_snrX /= 2;
6659 //priv->stats.rxSNRdB[i] = (long)rx_snrX;
6660 priv->stats.rxSNRdB[i] = (long)(pdrvinfo->rxsnr[i]/2);
6661
6662 /* Translate DBM to percentage. */
6663 //RSSI = rtl819x_query_rxpwrpercentage(rx_pwr[i]);
6664 //total_rssi += RSSI;
6665
6666 /* Record Signal Strength for next packet */
6667 //if(bpacket_match_bssid)
6668 {
6669 pstats->RxMIMOSignalStrength[i] =(u8) RSSI;
6670 precord_stats->RxMIMOSignalStrength[i] =(u8) RSSI;
6671 }
6672 }
6673
6674
6675 //
6676 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
6677 //
6678 //Fixed by Jacken from Bryant 2008-03-20
6679 //Original value is 106
6680 //rx_pwr_all = (((pofdm_buf->pwdb_all ) >> 1 )& 0x7f) -106;
6681 rx_pwr_all = (((pdrvinfo->pwdb_all ) >> 1 )& 0x7f) -106;
6682 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
6683
6684 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
6685 pstats->RxPower = precord_stats->RxPower = rx_pwr_all;
6686 pstats->RecvSignalPower = rx_pwr_all;
6687
6688 //
6689 // (3)EVM of HT rate
6690 //
6691 //if(pdrvinfo->RxHT && pdrvinfo->RxRate>=DESC90_RATEMCS8 &&
6692 // pdrvinfo->RxRate<=DESC90_RATEMCS15)
6693 if(pDesc->RxHT && pDesc->RxMCS>=DESC92S_RATEMCS8 &&
6694 pDesc->RxMCS<=DESC92S_RATEMCS15)
6695 max_spatial_stream = 2; //both spatial stream make sense
6696 else
6697 max_spatial_stream = 1; //only spatial stream 1 makes sense
6698
6699 for(i=0; i<max_spatial_stream; i++)
6700 {
6701 //tmp_rxevm = pofdm_buf->rxevm_X[i];
6702 //rx_evmX = (char)(tmp_rxevm);
6703
6704 // Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment
6705 // fill most significant bit to "zero" when doing shifting operation which may change a negative
6706 // value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore.
6707 //rx_evmX /= 2; //dbm
6708
6709 //evm = rtl819x_evm_dbtopercentage(rx_evmX);
6710 evm = rtl819x_evm_dbtopercentage( (pdrvinfo->rxevm[i] /*/ 2*/)); //dbm
6711 RT_TRACE(COMP_RF, "RXRATE=%x RXEVM=%x EVM=%s%d\n", pDesc->RxMCS, pdrvinfo->rxevm[i], "%", evm);
5f53d8ca
JC		 6712
6713 //if(bpacket_match_bssid)
6714 {
6715 if(i==0) // Fill value in RFD, Get the first spatial stream only
6716 pstats->SignalQuality = precord_stats->SignalQuality = (u8)(evm & 0xff);
6717 pstats->RxMIMOSignalQuality[i] = precord_stats->RxMIMOSignalQuality[i] = (u8)(evm & 0xff);
6718 }
6719 }
6720
6721
6722 /* record rx statistics for debug */
6723 //rxsc_sgien_exflg = pofdm_buf->rxsc_sgien_exflg;
6724 prxsc = (phy_ofdm_rx_status_rxsc_sgien_exintfflag *)&rxsc_sgien_exflg;
6725 //if(pdrvinfo->BW) //40M channel
6726 if(pDesc->BW) //40M channel
6727 priv->stats.received_bwtype[1+pdrvinfo->rxsc]++;
6728 else //20M channel
6729 priv->stats.received_bwtype[0]++;
6730 }
6731
6732 //UI BSS List signal strength(in percentage), make it good looking, from 0~100.
6733 //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().
6734 if(is_cck_rate)
6735 {
6736 pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)pwdb_all));//PWDB_ALL;//check ok
6737
6738 }
6739 else
6740 {
6741 //pRfd->Status.SignalStrength = pRecordRfd->Status.SignalStrength = (u8)(SignalScaleMapping(total_rssi/=RF90_PATH_MAX));//(u8)(total_rssi/=RF90_PATH_MAX);
6742 // We can judge RX path number now.
6743 if (rf_rx_num != 0)
6744 pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)(total_rssi/=rf_rx_num)));
6745 }
6746}/* QueryRxPhyStatus8192S */
0f29f587
BZ		 6747
6748void
6749rtl8192_record_rxdesc_forlateruse(
6750 struct ieee80211_rx_stats * psrc_stats,
6751 struct ieee80211_rx_stats * ptarget_stats
6752)
6753{
6754 ptarget_stats->bIsAMPDU = psrc_stats->bIsAMPDU;
6755 ptarget_stats->bFirstMPDU = psrc_stats->bFirstMPDU;
6756 ptarget_stats->Seq_Num = psrc_stats->Seq_Num;
6757}
6758
6759static void rtl8192SU_query_rxphystatus(
5f53d8ca
JC		 6760 struct r8192_priv * priv,
6761 struct ieee80211_rx_stats * pstats,
0f29f587 6762 rx_desc_819x_usb *pDesc,
5f53d8ca
JC		 6763 rx_drvinfo_819x_usb * pdrvinfo,
6764 struct ieee80211_rx_stats * precord_stats,
6765 bool bpacket_match_bssid,
6766 bool bpacket_toself,
6767 bool bPacketBeacon,
6768 bool bToSelfBA
0f29f587
BZ		 6769 );
6770void rtl8192SU_TranslateRxSignalStuff(struct sk_buff *skb,
6771 struct ieee80211_rx_stats * pstats,
6772 rx_desc_819x_usb *pDesc,
6773 rx_drvinfo_819x_usb *pdrvinfo)
5f53d8ca 6774{
0f29f587
BZ		 6775 // TODO: We must only check packet for current MAC address. Not finish
6776 rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
6777 struct net_device *dev=info->dev;
6778 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6779 bool bpacket_match_bssid, bpacket_toself;
6780 bool bPacketBeacon=FALSE, bToSelfBA=FALSE;
6781 static struct ieee80211_rx_stats previous_stats;
6782 struct ieee80211_hdr_3addr *hdr;//by amy
6783 u16 fc,type;
5f53d8ca 6784
0f29f587 6785 // Get Signal Quality for only RX data queue (but not command queue)
5f53d8ca 6786
0f29f587
BZ		 6787 u8* tmp_buf;
6788 //u16 tmp_buf_len = 0;
6789 u8 *praddr;
5f53d8ca 6790
0f29f587
BZ		 6791 /* Get MAC frame start address. */
6792 tmp_buf = (u8*)skb->data;// + get_rxpacket_shiftbytes_819xusb(pstats);
5f53d8ca 6793
0f29f587 6794 hdr = (struct ieee80211_hdr_3addr *)tmp_buf;
e2117cea 6795 fc = le16_to_cpu(hdr->frame_control);
0f29f587
BZ		 6796 type = WLAN_FC_GET_TYPE(fc);
6797 praddr = hdr->addr1;
5f53d8ca 6798
0f29f587
BZ		 6799 /* Check if the received packet is acceptabe. */
6800 bpacket_match_bssid = ((IEEE80211_FTYPE_CTL != type) &&
6801 (eqMacAddr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS )? hdr->addr2 : hdr->addr3))
6802 && (!pstats->bHwError) && (!pstats->bCRC)&& (!pstats->bICV));
6803 bpacket_toself = bpacket_match_bssid & (eqMacAddr(praddr, priv->ieee80211->dev->dev_addr));
5f53d8ca
JC		 6804
6805#if 1//cosa
6806 if(WLAN_FC_GET_FRAMETYPE(fc)== IEEE80211_STYPE_BEACON)
6807 {
6808 bPacketBeacon = true;
6809 //DbgPrint("Beacon 2, MatchBSSID = %d, ToSelf = %d \n", bPacketMatchBSSID, bPacketToSelf);
6810 }
6811 if(WLAN_FC_GET_FRAMETYPE(fc) == IEEE80211_STYPE_BLOCKACK)
6812 {
6813 if((eqMacAddr(praddr,dev->dev_addr)))
6814 bToSelfBA = true;
6815 //DbgPrint("BlockAck, MatchBSSID = %d, ToSelf = %d \n", bPacketMatchBSSID, bPacketToSelf);
6816 }
6817
6818#endif
6819
6820
6821 if(bpacket_match_bssid)
6822 {
6823 priv->stats.numpacket_matchbssid++;
6824 }
6825 if(bpacket_toself){
6826 priv->stats.numpacket_toself++;
6827 }
6828 //
6829 // Process PHY information for previous packet (RSSI/PWDB/EVM)
6830 //
6831 // Because phy information is contained in the last packet of AMPDU only, so driver
6832 // should process phy information of previous packet
6833 rtl8192_process_phyinfo(priv, tmp_buf, &previous_stats, pstats);
6834 rtl8192SU_query_rxphystatus(priv, pstats, pDesc, pdrvinfo, &previous_stats, bpacket_match_bssid,bpacket_toself,bPacketBeacon,bToSelfBA);
6835 rtl8192_record_rxdesc_forlateruse(pstats, &previous_stats);
6836
6837}
5f53d8ca
JC		 6838
6839/**
6840* Function: UpdateReceivedRateHistogramStatistics
6841* Overview: Recored down the received data rate
6842*
6843* Input:
6844* struct net_device *dev
6845* struct ieee80211_rx_stats *stats
6846*
6847* Output:
6848*
6849* (priv->stats.ReceivedRateHistogram[] is updated)
6850* Return:
6851* None
6852*/
6853void
6854UpdateReceivedRateHistogramStatistics8190(
6855 struct net_device *dev,
6856 struct ieee80211_rx_stats *stats
6857 )
6858{
6859 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6860 u32 rcvType=1; //0: Total, 1:OK, 2:CRC, 3:ICV
6861 u32 rateIndex;
6862 u32 preamble_guardinterval; //1: short preamble/GI, 0: long preamble/GI
6863
6864
6865 if(stats->bCRC)
6866 rcvType = 2;
6867 else if(stats->bICV)
6868 rcvType = 3;
6869
6870 if(stats->bShortPreamble)
6871 preamble_guardinterval = 1;// short
6872 else
6873 preamble_guardinterval = 0;// long
6874
6875 switch(stats->rate)
6876 {
6877 //
6878 // CCK rate
6879 //
6880 case MGN_1M: rateIndex = 0; break;
6881 case MGN_2M: rateIndex = 1; break;
6882 case MGN_5_5M: rateIndex = 2; break;
6883 case MGN_11M: rateIndex = 3; break;
6884 //
6885 // Legacy OFDM rate
6886 //
6887 case MGN_6M: rateIndex = 4; break;
6888 case MGN_9M: rateIndex = 5; break;
6889 case MGN_12M: rateIndex = 6; break;
6890 case MGN_18M: rateIndex = 7; break;
6891 case MGN_24M: rateIndex = 8; break;
6892 case MGN_36M: rateIndex = 9; break;
6893 case MGN_48M: rateIndex = 10; break;
6894 case MGN_54M: rateIndex = 11; break;
6895 //
6896 // 11n High throughput rate
6897 //
6898 case MGN_MCS0: rateIndex = 12; break;
6899 case MGN_MCS1: rateIndex = 13; break;
6900 case MGN_MCS2: rateIndex = 14; break;
6901 case MGN_MCS3: rateIndex = 15; break;
6902 case MGN_MCS4: rateIndex = 16; break;
6903 case MGN_MCS5: rateIndex = 17; break;
6904 case MGN_MCS6: rateIndex = 18; break;
6905 case MGN_MCS7: rateIndex = 19; break;
6906 case MGN_MCS8: rateIndex = 20; break;
6907 case MGN_MCS9: rateIndex = 21; break;
6908 case MGN_MCS10: rateIndex = 22; break;
6909 case MGN_MCS11: rateIndex = 23; break;
6910 case MGN_MCS12: rateIndex = 24; break;
6911 case MGN_MCS13: rateIndex = 25; break;
6912 case MGN_MCS14: rateIndex = 26; break;
6913 case MGN_MCS15: rateIndex = 27; break;
6914 default: rateIndex = 28; break;
6915 }
6916 priv->stats.received_preamble_GI[preamble_guardinterval][rateIndex]++;
6917 priv->stats.received_rate_histogram[0][rateIndex]++; //total
6918 priv->stats.received_rate_histogram[rcvType][rateIndex]++;
6919}
6920
5f53d8ca
JC		 6921void rtl8192SU_query_rxdesc_status(struct sk_buff *skb, struct ieee80211_rx_stats *stats, bool bIsRxAggrSubframe)
6922{
6923 rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
6924 struct net_device *dev=info->dev;
6925 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6926 //rx_desc_819x_usb *desc = (rx_desc_819x_usb *)skb->data;
6927 rx_drvinfo_819x_usb *driver_info = NULL;
6928
6929 //PRT_RFD_STATUS pRtRfdStatus = &pRfd->Status;
6930 //PHAL_DATA_8192SUSB pHalData = GET_HAL_DATA(Adapter);
6931 //pu1Byte pDesc = (pu1Byte)pDescIn;
6932 //PRX_DRIVER_INFO_8192S pDrvInfo;
6933
5f53d8ca
JC		 6934 rx_desc_819x_usb *desc = (rx_desc_819x_usb *)skb->data;
6935
6936 if(0)
6937 {
6938 int m = 0;
6939 printk("========================");
6940 for(m=0; m<skb->len; m++){
6941 if((m%32) == 0)
6942 printk("\n");
6943 printk("%2x ",((u8*)skb->data)[m]);
6944 }
6945 printk("\n========================\n");
6946
6947 }
6948
6949
6950 //
6951 //Get Rx Descriptor Raw Information
6952 //
6953 stats->Length = desc->Length ;
6954 stats->RxDrvInfoSize = desc->RxDrvInfoSize*RX_DRV_INFO_SIZE_UNIT;
6955 stats->RxBufShift = (desc->Shift)&0x03;
6956 stats->bICV = desc->ICV;
6957 stats->bCRC = desc->CRC32;
6958 stats->bHwError = stats->bCRC|stats->bICV;
6959 stats->Decrypted = !desc->SWDec;//RTL8190 set this bit to indicate that Hw does not decrypt packet
6960 stats->bIsAMPDU = (desc->AMSDU==1);
6961 stats->bFirstMPDU = (desc->PAGGR==1) && (desc->FAGGR==1);
6962 stats->bShortPreamble = desc->SPLCP;
6963 stats->RxIs40MHzPacket = (desc->BW==1);
6964 stats->TimeStampLow = desc->TSFL;
6965
6966 if((desc->FAGGR==1) || (desc->PAGGR==1))
6967 {// Rx A-MPDU
6968 RT_TRACE(COMP_RXDESC, "FirstAGGR = %d, PartAggr = %d\n", desc->FAGGR, desc->PAGGR);
6969 }
6970//YJ,test,090310
6971if(stats->bHwError)
6972{
6973 if(stats->bICV)
6974 printk("%s: Receive ICV error!!!!!!!!!!!!!!!!!!!!!!\n", __FUNCTION__);
6975 if(stats->bCRC)
6976 printk("%s: Receive CRC error!!!!!!!!!!!!!!!!!!!!!!\n", __FUNCTION__);
6977}
6978
6979 if(IS_UNDER_11N_AES_MODE(priv->ieee80211))
6980 {
6981 // Always received ICV error packets in AES mode.
6982 // This fixed HW later MIC write bug.
6983 if(stats->bICV && !stats->bCRC)
6984 {
6985 stats->bICV = FALSE;
6986 stats->bHwError = FALSE;
6987 }
6988 }
6989
6990 // Transform HwRate to MRate
6991 if(!stats->bHwError)
6992 //stats->DataRate = HwRateToMRate(
6993 // (BOOLEAN)GET_RX_DESC_RXHT(pDesc),
6994 // (u1Byte)GET_RX_DESC_RXMCS(pDesc),
6995 // (BOOLEAN)GET_RX_DESC_PAGGR(pDesc));
6996 stats->rate = rtl8192SU_HwRateToMRate(desc->RxHT, desc->RxMCS, desc->PAGGR);
6997 else
6998 stats->rate = MGN_1M;
6999
7000 //
7001 // Collect Rx rate/AMPDU/TSFL
7002 //
7003 //UpdateRxdRateHistogramStatistics8192S(Adapter, pRfd);
7004 //UpdateRxAMPDUHistogramStatistics8192S(Adapter, pRfd);
7005 //UpdateRxPktTimeStamp8192S(Adapter, pRfd);
7006 UpdateReceivedRateHistogramStatistics8190(dev, stats);
7007 //UpdateRxAMPDUHistogramStatistics8192S(dev, stats); //FIXLZM
7008 UpdateRxPktTimeStamp8190(dev, stats);
7009
7010 //
7011 // Get PHY Status and RSVD parts.
7012 // <Roger_Notes> It only appears on last aggregated packet.
7013 //
7014 if (desc->PHYStatus)
7015 {
7016 //driver_info = (rx_drvinfo_819x_usb *)(skb->data + RX_DESC_SIZE + stats->RxBufShift);
7017 driver_info = (rx_drvinfo_819x_usb *)(skb->data + sizeof(rx_desc_819x_usb) + \
7018 stats->RxBufShift);
7019 if(0)
7020 {
7021 int m = 0;
7022 printk("========================\n");
7023 printk("RX_DESC_SIZE:%d, RxBufShift:%d, RxDrvInfoSize:%d\n",
7024 RX_DESC_SIZE, stats->RxBufShift, stats->RxDrvInfoSize);
7025 for(m=0; m<32; m++){
7026 printk("%2x ",((u8*)driver_info)[m]);
7027 }
7028 printk("\n========================\n");
7029
7030 }
7031
7032 }
7033
7034 //YJ,add,090107
7035 skb_pull(skb, sizeof(rx_desc_819x_usb));
7036 //YJ,add,090107,end
7037
7038 //
7039 // Get Total offset of MPDU Frame Body
7040 //
7041 if((stats->RxBufShift + stats->RxDrvInfoSize) > 0)
7042 {
7043 stats->bShift = 1;
7044 //YJ,add,090107
7045 skb_pull(skb, stats->RxBufShift + stats->RxDrvInfoSize);
7046 //YJ,add,090107,end
7047 }
7048
7049 //
7050 // Get PHY Status and RSVD parts.
7051 // <Roger_Notes> It only appears on last aggregated packet.
7052 //
7053 if (desc->PHYStatus)
7054 {
7055 rtl8192SU_TranslateRxSignalStuff(skb, stats, desc, driver_info);
7056 }
7057}
5f53d8ca 7058
5f53d8ca
JC		 7059//
7060// Description:
7061// The strarting address of wireless lan header will shift 1 or 2 or 3 or "more" bytes for the following reason :
7062// (1) QoS control : shift 2 bytes
7063// (2) Mesh Network : shift 1 or 3 bytes
7064// (3) RxDriverInfo occupies the front parts of Rx Packets buffer(shift units is in 8Bytes)
7065//
7066// It is because Lextra CPU used by 8186 or 865x series assert exception if the statrting address
7067// of IP header is not double word alignment.
7068// This features is supported in 818xb and 8190 only, but not 818x.
7069//
7070// parameter: PRT_RFD, Pointer of Reeceive frame descriptor which is initialized according to
7071// Rx Descriptor
7072// return value: unsigned int, number of total shifted bytes
7073//
7074// Notes: 2008/06/28, created by Roger
7075//
7076u32 GetRxPacketShiftBytes8192SU(struct ieee80211_rx_stats *Status, bool bIsRxAggrSubframe)
7077{
7078 //PRT_RFD_STATUS pRtRfdStatus = &pRfd->Status;
7079
7080 return (sizeof(rx_desc_819x_usb) + Status->RxDrvInfoSize + Status->RxBufShift);
7081}
7082
7083void rtl8192SU_rx_nomal(struct sk_buff* skb)
7084{
7085 rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
7086 struct net_device *dev=info->dev;
7087 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
7088 struct ieee80211_rx_stats stats = {
7089 .signal = 0,
7090 .noise = -98,
7091 .rate = 0,
7092 // .mac_time = jiffies,
7093 .freq = IEEE80211_24GHZ_BAND,
7094 };
7095 u32 rx_pkt_len = 0;
7096 struct ieee80211_hdr_1addr *ieee80211_hdr = NULL;
7097 bool unicast_packet = false;
7098
5f53d8ca
JC		 7099 //printk("**********skb->len = %d\n", skb->len);
7100 /* 20 is for ps-poll */
7101 if((skb->len >=(20 + sizeof(rx_desc_819x_usb))) && (skb->len < RX_URB_SIZE)) {
7102
7103 /* first packet should not contain Rx aggregation header */
7104 rtl8192SU_query_rxdesc_status(skb, &stats, false);
7105 /* TODO */
7106
7107 /* hardware related info */
5f53d8ca
JC		 7108 priv->stats.rxoktotal++; //YJ,test,090108
7109
7110 /* Process the MPDU recevied */
7111 skb_trim(skb, skb->len - 4/*sCrcLng*/);//FIXLZM
7112
7113 rx_pkt_len = skb->len;
7114 ieee80211_hdr = (struct ieee80211_hdr_1addr *)skb->data;
7115 unicast_packet = false;
7116 if(is_broadcast_ether_addr(ieee80211_hdr->addr1)) {
7117 //TODO
7118 }else if(is_multicast_ether_addr(ieee80211_hdr->addr1)){
7119 //TODO
7120 }else {
7121 /* unicast packet */
7122 unicast_packet = true;
7123 }
7124
55c7d5fc 7125 if(!ieee80211_rtl_rx(priv->ieee80211,skb, &stats)) {
5f53d8ca
JC		 7126 dev_kfree_skb_any(skb);
7127 } else {
7128 // priv->stats.rxoktotal++; //YJ,test,090108
7129 if(unicast_packet) {
7130 priv->stats.rxbytesunicast += rx_pkt_len;
7131 }
7132 }
7133
7134 //up is firs pkt, follow is next and next
5f53d8ca
JC		 7135 }
7136 else
7137 {
7138 priv->stats.rxurberr++;
7139 printk("actual_length:%d\n", skb->len);
7140 dev_kfree_skb_any(skb);
7141 }
7142
7143}
5f53d8ca
JC		 7144
7145void
7146rtl819xusb_process_received_packet(
7147 struct net_device *dev,
7148 struct ieee80211_rx_stats *pstats
7149 )
7150{
7151// bool bfreerfd=false, bqueued=false;
7152 u8* frame;
7153 u16 frame_len=0;
7154 struct r8192_priv *priv = ieee80211_priv(dev);
7155// u8 index = 0;
7156// u8 TID = 0;
7157 //u16 seqnum = 0;
7158 //PRX_TS_RECORD pts = NULL;
7159
7160 // Get shifted bytes of Starting address of 802.11 header. 2006.09.28, by Emily
7161 //porting by amy 080508
7162 pstats->virtual_address += get_rxpacket_shiftbytes_819xusb(pstats);
7163 frame = pstats->virtual_address;
7164 frame_len = pstats->packetlength;
7165#ifdef TODO // by amy about HCT
7166 if(!Adapter->bInHctTest)
7167 CountRxErrStatistics(Adapter, pRfd);
7168#endif
7169 {
7170 #ifdef ENABLE_PS //by amy for adding ps function in future
7171 RT_RF_POWER_STATE rtState;
7172 // When RF is off, we should not count the packet for hw/sw synchronize
7173 // reason, ie. there may be a duration while sw switch is changed and hw
7174 // switch is being changed. 2006.12.04, by shien chang.
7175 Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RF_STATE, (u8* )(&rtState));
7176 if (rtState == eRfOff)
7177 {
7178 return;
7179 }
7180 #endif
7181 priv->stats.rxframgment++;
7182
7183 }
7184#ifdef TODO
7185 RmMonitorSignalStrength(Adapter, pRfd);
7186#endif
7187 /* 2007/01/16 MH Add RX command packet handle here. */
7188 /* 2007/03/01 MH We have to release RFD and return if rx pkt is cmd pkt. */
7189 if (rtl819xusb_rx_command_packet(dev, pstats))
7190 {
7191 return;
7192 }
7193
7194#ifdef SW_CRC_CHECK
7195 SwCrcCheck();
7196#endif
7197
7198
7199}
7200
7201void query_rx_cmdpkt_desc_status(struct sk_buff *skb, struct ieee80211_rx_stats *stats)
7202{
7203// rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
7204// struct net_device *dev=info->dev;
7205// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
7206 rx_desc_819x_usb *desc = (rx_desc_819x_usb *)skb->data;
7207// rx_drvinfo_819x_usb *driver_info;
7208
7209 //
7210 //Get Rx Descriptor Information
7211 //
7212 stats->virtual_address = (u8*)skb->data;
7213 stats->Length = desc->Length;
7214 stats->RxDrvInfoSize = 0;
7215 stats->RxBufShift = 0;
7216 stats->packetlength = stats->Length-scrclng;
7217 stats->fraglength = stats->packetlength;
7218 stats->fragoffset = 0;
7219 stats->ntotalfrag = 1;
7220}
7221
5f53d8ca
JC		 7222void rtl8192SU_rx_cmd(struct sk_buff *skb)
7223{
7224 struct rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
7225 struct net_device *dev = info->dev;
7226
7227 /* TODO */
7228 struct ieee80211_rx_stats stats = {
7229 .signal = 0,
7230 .noise = -98,
7231 .rate = 0,
7232 // .mac_time = jiffies,
7233 .freq = IEEE80211_24GHZ_BAND,
7234 };
7235
7236 //
7237 // Check buffer length to determine if this is a valid MPDU.
7238 //
7239 if( (skb->len >= sizeof(rx_desc_819x_usb)) && (skb->len <= RX_URB_SIZE) )//&&
7240 //(pHalData->SwChnlInProgress == FALSE))
7241 {
7242 //
7243 // Collection information in Rx descriptor.
7244 //
5f53d8ca
JC		 7245 query_rx_cmdpkt_desc_status(skb,&stats);
7246 // this is to be done by amy 080508 prfd->queue_id = 1;
7247
7248 //
7249 // Process the MPDU recevied.
7250 //
7251 rtl819xusb_process_received_packet(dev,&stats);
7252
7253 dev_kfree_skb_any(skb);
7254 }
7255 else
7256 {
7257 //RTInsertTailListWithCnt(&pAdapter->RfdIdleQueue, &pRfd->List, &pAdapter->NumIdleRfd);
7258 //RT_ASSERT(pAdapter->NumIdleRfd <= pAdapter->NumRfd, ("HalUsbInCommandComplete8192SUsb(): Adapter->NumIdleRfd(%d)\n", pAdapter->NumIdleRfd));
7259 //RT_TRACE(COMP_RECV, DBG_LOUD, ("HalUsbInCommandComplete8192SUsb(): NOT enough Resources!! BufLenUsed(%d), NumIdleRfd(%d)\n",
7260 //pContext->BufLenUsed, pAdapter->NumIdleRfd));
7261 }
7262
7263 //
7264 // Reuse USB_IN_CONTEXT since we had finished processing the
7265 // buffer in USB_IN_CONTEXT.
7266 //
7267 //HalUsbReturnInContext(pAdapter, pContext);
7268
7269 //
7270 // Issue another bulk IN transfer.
7271 //
7272 //HalUsbInMpdu(pAdapter, PipeIndex);
7273
7274 RT_TRACE(COMP_RECV, "<--- HalUsbInCommandComplete8192SUsb()\n");
7275
7276}
5f53d8ca
JC		 7277
7278void rtl8192_irq_rx_tasklet(struct r8192_priv *priv)
7279{
7280 struct sk_buff *skb;
7281 struct rtl8192_rx_info *info;
7282
7283 while (NULL != (skb = skb_dequeue(&priv->skb_queue))) {
7284 info = (struct rtl8192_rx_info *)skb->cb;
7285 switch (info->out_pipe) {
7286 /* Nomal packet pipe */
7287 case 3:
7288 //RT_TRACE(COMP_RECV, "normal in-pipe index(%d)\n",info->out_pipe);
7289 priv->IrpPendingCount--;
7290 priv->ops->rtl819x_rx_nomal(skb);
7291 break;
7292
7293 /* Command packet pipe */
7294 case 9:
7295 RT_TRACE(COMP_RECV, "command in-pipe index(%d)\n",\
7296 info->out_pipe);
7297 priv->ops->rtl819x_rx_cmd(skb);
7298 break;
7299
7300 default: /* should never get here! */
7301 RT_TRACE(COMP_ERR, "Unknown in-pipe index(%d)\n",\
7302 info->out_pipe);
7303 dev_kfree_skb(skb);
7304 break;
7305
7306 }
7307 }
7308}
7309
7310
7311
7312/****************************************************************************
7313 ---------------------------- USB_STUFF---------------------------
7314*****************************************************************************/
5f53d8ca
JC		 7315//LZM Merge from windows HalUsbSetQueuePipeMapping8192SUsb 090319
7316static void HalUsbSetQueuePipeMapping8192SUsb(struct usb_interface *intf, struct net_device *dev)
7317{
7318 struct r8192_priv *priv = ieee80211_priv(dev);
7319 struct usb_host_interface *iface_desc;
7320 struct usb_endpoint_descriptor *endpoint;
7321 u8 i = 0;
7322
7323 priv->ep_in_num = 0;
7324 priv->ep_out_num = 0;
7325 memset(priv->RtOutPipes,0,16);
7326 memset(priv->RtInPipes,0,16);
7327
5f53d8ca
JC		 7328 iface_desc = intf->cur_altsetting;
7329 priv->ep_num = iface_desc->desc.bNumEndpoints;
7330
7331 for (i = 0; i < priv->ep_num; ++i) {
7332 endpoint = &iface_desc->endpoint[i].desc;
5f53d8ca
JC		 7333 if (usb_endpoint_is_bulk_in(endpoint)) {
7334 priv->RtInPipes[priv->ep_in_num] = usb_endpoint_num(endpoint);
7335 priv->ep_in_num ++;
7336 //printk("in_endpoint_idx = %d\n", usb_endpoint_num(endpoint));
7337 } else if (usb_endpoint_is_bulk_out(endpoint)) {
7338 priv->RtOutPipes[priv->ep_out_num] = usb_endpoint_num(endpoint);
7339 priv->ep_out_num ++;
7340 //printk("out_endpoint_idx = %d\n", usb_endpoint_num(endpoint));
7341 }
5f53d8ca
JC		 7342 }
7343 {
7344 memset(priv->txqueue_to_outpipemap,0,9);
7345 if (priv->ep_num == 6) {
7346 // BK, BE, VI, VO, HCCA, TXCMD, MGNT, HIGH, BEACON
7347 u8 queuetopipe[] = {3, 2, 1, 0, 4, 4, 4, 4, 4};
7348
7349 memcpy(priv->txqueue_to_outpipemap,queuetopipe,9);
7350 } else if (priv->ep_num == 4) {
7351 // BK, BE, VI, VO, HCCA, TXCMD, MGNT, HIGH, BEACON
7352 u8 queuetopipe[] = {1, 1, 0, 0, 2, 2, 2, 2, 2};
7353
7354 memcpy(priv->txqueue_to_outpipemap,queuetopipe,9);
7355 } else if (priv->ep_num > 9) {
7356 // BK, BE, VI, VO, HCCA, TXCMD, MGNT, HIGH, BEACON
7357 u8 queuetopipe[] = {3, 2, 1, 0, 4, 8, 7, 6, 5};
7358
7359 memcpy(priv->txqueue_to_outpipemap,queuetopipe,9);
7360 } else {//use sigle pipe
7361 // BK, BE, VI, VO, HCCA, TXCMD, MGNT, HIGH, BEACON
7362 u8 queuetopipe[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
7363 memcpy(priv->txqueue_to_outpipemap,queuetopipe,9);
7364 }
7365 }
7366 printk("==>ep_num:%d, in_ep_num:%d, out_ep_num:%d\n", priv->ep_num, priv->ep_in_num, priv->ep_out_num);
7367
7368 printk("==>RtInPipes:");
7369 for(i=0; i < priv->ep_in_num; i++)
7370 printk("%d ", priv->RtInPipes[i]);
7371 printk("\n");
7372
7373 printk("==>RtOutPipes:");
7374 for(i=0; i < priv->ep_out_num; i++)
7375 printk("%d ", priv->RtOutPipes[i]);
7376 printk("\n");
7377
7378 printk("==>txqueue_to_outpipemap for BK, BE, VI, VO, HCCA, TXCMD, MGNT, HIGH, BEACON:\n");
7379 for(i=0; i < 9; i++)
7380 printk("%d ", priv->txqueue_to_outpipemap[i]);
7381 printk("\n");
5f53d8ca
JC		 7382
7383 return;
7384}
5f53d8ca 7385
77b92881
BZ		 7386static const struct net_device_ops rtl8192_netdev_ops = {
7387 .ndo_open = rtl8192_open,
7388 .ndo_stop = rtl8192_close,
7389 .ndo_get_stats = rtl8192_stats,
7390 .ndo_tx_timeout = tx_timeout,
7391 .ndo_do_ioctl = rtl8192_ioctl,
7392 .ndo_set_multicast_list = r8192_set_multicast,
7393 .ndo_set_mac_address = r8192_set_mac_adr,
7394 .ndo_validate_addr = eth_validate_addr,
7395 .ndo_change_mtu = eth_change_mtu,
55c7d5fc 7396 .ndo_start_xmit = rtl8192_ieee80211_rtl_xmit,
77b92881
BZ		 7397};
7398
5f53d8ca
JC		 7399static int __devinit rtl8192_usb_probe(struct usb_interface *intf,
7400 const struct usb_device_id *id)
5f53d8ca
JC		 7401{
7402// unsigned long ioaddr = 0;
7403 struct net_device *dev = NULL;
7404 struct r8192_priv *priv= NULL;
5f53d8ca 7405 struct usb_device *udev = interface_to_usbdev(intf);
1ec9e48d 7406
5f53d8ca
JC		 7407 RT_TRACE(COMP_INIT, "Oops: i'm coming\n");
7408
7409 dev = alloc_ieee80211(sizeof(struct r8192_priv));
7410
5f53d8ca
JC		 7411 usb_set_intfdata(intf, dev);
7412 SET_NETDEV_DEV(dev, &intf->dev);
5f53d8ca 7413 priv = ieee80211_priv(dev);
5f53d8ca 7414 priv->ieee80211 = netdev_priv(dev);
5f53d8ca
JC		 7415 priv->udev=udev;
7416
5f53d8ca 7417 HalUsbSetQueuePipeMapping8192SUsb(intf, dev);
5f53d8ca 7418
5f53d8ca
JC		 7419 //printk("===============>NIC 8192SU\n");
7420 priv->ops = &rtl8192su_ops;
5f53d8ca 7421
77b92881 7422 dev->netdev_ops = &rtl8192_netdev_ops;
5f53d8ca
JC		 7423
7424 //DMESG("Oops: i'm coming\n");
5f53d8ca 7425 dev->wireless_handlers = (struct iw_handler_def *) &r8192_wx_handlers_def;
3bd709f2 7426
5f53d8ca
JC		 7427 dev->type=ARPHRD_ETHER;
7428
7429 dev->watchdog_timeo = HZ*3; //modified by john, 0805
7430
7431 if (dev_alloc_name(dev, ifname) < 0){
7432 RT_TRACE(COMP_INIT, "Oops: devname already taken! Trying wlan%%d...\n");
7433 ifname = "wlan%d";
7434 dev_alloc_name(dev, ifname);
7435 }
7436
7437 RT_TRACE(COMP_INIT, "Driver probe completed1\n");
7438#if 1
7439 if(rtl8192_init(dev)!=0){
7440 RT_TRACE(COMP_ERR, "Initialization failed");
7441 goto fail;
7442 }
7443#endif
7444 netif_carrier_off(dev);
7445 netif_stop_queue(dev);
7446
7447 register_netdev(dev);
7448 RT_TRACE(COMP_INIT, "dev name=======> %s\n",dev->name);
7449 rtl8192_proc_init_one(dev);
7450
7451
7452 RT_TRACE(COMP_INIT, "Driver probe completed\n");
5f53d8ca 7453 return 0;
5f53d8ca
JC		 7454fail:
7455 free_ieee80211(dev);
7456
7457 RT_TRACE(COMP_ERR, "wlan driver load failed\n");
5f53d8ca 7458 return -ENODEV;
5f53d8ca
JC		 7459}
7460
7461//detach all the work and timer structure declared or inititialize in r8192U_init function.
7462void rtl8192_cancel_deferred_work(struct r8192_priv* priv)
7463{
5f53d8ca
JC		 7464 cancel_work_sync(&priv->reset_wq);
7465 cancel_work_sync(&priv->qos_activate);
7466 cancel_delayed_work(&priv->watch_dog_wq);
7467 cancel_delayed_work(&priv->update_beacon_wq);
7468 cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
7469 cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
7470 //cancel_work_sync(&priv->SetBWModeWorkItem);
7471 //cancel_work_sync(&priv->SwChnlWorkItem);
5f53d8ca
JC		 7472}
7473
5f53d8ca 7474static void __devexit rtl8192_usb_disconnect(struct usb_interface *intf)
5f53d8ca 7475{
5f53d8ca 7476 struct net_device *dev = usb_get_intfdata(intf);
5f53d8ca
JC		 7477 struct r8192_priv *priv = ieee80211_priv(dev);
7478 if(dev){
7479
7480 unregister_netdev(dev);
7481
7482 RT_TRACE(COMP_DOWN, "=============>wlan driver to be removed\n");
7483 rtl8192_proc_remove_one(dev);
7484
7485 rtl8192_down(dev);
7486 if (priv->pFirmware)
7487 {
7488 vfree(priv->pFirmware);
7489 priv->pFirmware = NULL;
7490 }
7491 // priv->rf_close(dev);
7492// rtl8192_SetRFPowerState(dev, eRfOff);
5f53d8ca 7493 destroy_workqueue(priv->priv_wq);
5f53d8ca
JC		 7494 //rtl8192_irq_disable(dev);
7495 //rtl8192_reset(dev);
7496 mdelay(10);
7497
7498 }
7499 free_ieee80211(dev);
7500 RT_TRACE(COMP_DOWN, "wlan driver removed\n");
7501}
7502
5d9baea9
BZ		 7503/* fun with the built-in ieee80211 stack... */
7504extern int ieee80211_debug_init(void);
7505extern void ieee80211_debug_exit(void);
7506extern int ieee80211_crypto_init(void);
7507extern void ieee80211_crypto_deinit(void);
7508extern int ieee80211_crypto_tkip_init(void);
7509extern void ieee80211_crypto_tkip_exit(void);
7510extern int ieee80211_crypto_ccmp_init(void);
7511extern void ieee80211_crypto_ccmp_exit(void);
7512extern int ieee80211_crypto_wep_init(void);
7513extern void ieee80211_crypto_wep_exit(void);
7514
5f53d8ca
JC		 7515static int __init rtl8192_usb_module_init(void)
7516{
5d9baea9
BZ		 7517 int ret;
7518
7519#ifdef CONFIG_IEEE80211_DEBUG
7520 ret = ieee80211_debug_init();
7521 if (ret) {
7522 printk(KERN_ERR "ieee80211_debug_init() failed %d\n", ret);
7523 return ret;
7524 }
7525#endif
7526 ret = ieee80211_crypto_init();
7527 if (ret) {
7528 printk(KERN_ERR "ieee80211_crypto_init() failed %d\n", ret);
7529 return ret;
7530 }
7531
7532 ret = ieee80211_crypto_tkip_init();
7533 if (ret) {
7534 printk(KERN_ERR "ieee80211_crypto_tkip_init() failed %d\n",
7535 ret);
7536 return ret;
7537 }
7538
7539 ret = ieee80211_crypto_ccmp_init();
7540 if (ret) {
7541 printk(KERN_ERR "ieee80211_crypto_ccmp_init() failed %d\n",
7542 ret);
7543 return ret;
7544 }
7545
7546 ret = ieee80211_crypto_wep_init();
7547 if (ret) {
7548 printk(KERN_ERR "ieee80211_crypto_wep_init() failed %d\n", ret);
7549 return ret;
7550 }
7551
5f53d8ca
JC		 7552 printk(KERN_INFO "\nLinux kernel driver for RTL8192 based WLAN cards\n");
7553 printk(KERN_INFO "Copyright (c) 2007-2008, Realsil Wlan\n");
7554 RT_TRACE(COMP_INIT, "Initializing module");
7555 RT_TRACE(COMP_INIT, "Wireless extensions version %d", WIRELESS_EXT);
7556 rtl8192_proc_module_init();
7557 return usb_register(&rtl8192_usb_driver);
7558}
7559
7560
7561static void __exit rtl8192_usb_module_exit(void)
7562{
7563 usb_deregister(&rtl8192_usb_driver);
7564
7565 RT_TRACE(COMP_DOWN, "Exiting");
7566 rtl8192_proc_module_remove();
5d9baea9
BZ		 7567
7568 ieee80211_crypto_tkip_exit();
7569 ieee80211_crypto_ccmp_exit();
7570 ieee80211_crypto_wep_exit();
7571 ieee80211_crypto_deinit();
7572#ifdef CONFIG_IEEE80211_DEBUG
7573 ieee80211_debug_exit();
7574#endif
5f53d8ca
JC		 7575}
7576
7577
7578void rtl8192_try_wake_queue(struct net_device *dev, int pri)
7579{
7580 unsigned long flags;
7581 short enough_desc;
7582 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
7583
7584 spin_lock_irqsave(&priv->tx_lock,flags);
7585 enough_desc = check_nic_enough_desc(dev,pri);
7586 spin_unlock_irqrestore(&priv->tx_lock,flags);
7587
7588 if(enough_desc)
55c7d5fc 7589 ieee80211_rtl_wake_queue(priv->ieee80211);
5f53d8ca
JC		 7590}
7591
5f53d8ca
JC		 7592void EnableHWSecurityConfig8192(struct net_device *dev)
7593{
7594 u8 SECR_value = 0x0;
7595 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
7596 struct ieee80211_device* ieee = priv->ieee80211;
7597
7598 SECR_value = SCR_TxEncEnable | SCR_RxDecEnable;
7599#if 1
7600 if (((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type)) && (priv->ieee80211->auth_mode != 2))
7601 {
7602 SECR_value |= SCR_RxUseDK;
7603 SECR_value |= SCR_TxUseDK;
7604 }
7605 else if ((ieee->iw_mode == IW_MODE_ADHOC) && (ieee->pairwise_key_type & (KEY_TYPE_CCMP | KEY_TYPE_TKIP)))
7606 {
7607 SECR_value |= SCR_RxUseDK;
7608 SECR_value |= SCR_TxUseDK;
7609 }
7610#endif
7611 //add HWSec active enable here.
7612//default using hwsec. when peer AP is in N mode only and pairwise_key_type is none_aes(which HT_IOT_ACT_PURE_N_MODE indicates it), use software security. when peer AP is in b,g,n mode mixed and pairwise_key_type is none_aes, use g mode hw security. WB on 2008.7.4
7613
7614 ieee->hwsec_active = 1;
7615
7616 if ((ieee->pHTInfo->IOTAction&HT_IOT_ACT_PURE_N_MODE) || !hwwep)//!ieee->hwsec_support) //add hwsec_support flag to totol control hw_sec on/off
7617 {
7618 ieee->hwsec_active = 0;
7619 SECR_value &= ~SCR_RxDecEnable;
7620 }
7621
7622 RT_TRACE(COMP_SEC,"%s:, hwsec:%d, pairwise_key:%d, SECR_value:%x\n", __FUNCTION__, \
7623 ieee->hwsec_active, ieee->pairwise_key_type, SECR_value);
7624 {
7625 write_nic_byte(dev, SECR, SECR_value);//SECR_value | SCR_UseDK );
7626 }
7627}
7628
7629
7630void setKey( struct net_device *dev,
7631 u8 EntryNo,
7632 u8 KeyIndex,
7633 u16 KeyType,
7634 u8 *MacAddr,
7635 u8 DefaultKey,
7636 u32 *KeyContent )
7637{
7638 u32 TargetCommand = 0;
7639 u32 TargetContent = 0;
7640 u16 usConfig = 0;
7641 u8 i;
7642 if (EntryNo >= TOTAL_CAM_ENTRY)
7643 RT_TRACE(COMP_ERR, "cam entry exceeds in setKey()\n");
7644
0ee9f67c 7645 RT_TRACE(COMP_SEC, "====>to setKey(), dev:%p, EntryNo:%d, KeyIndex:%d, KeyType:%d, MacAddr%pM\n", dev,EntryNo, KeyIndex, KeyType, MacAddr);
5f53d8ca
JC		 7646
7647 if (DefaultKey)
7648 usConfig |= BIT15 | (KeyType<<2);
7649 else
7650 usConfig |= BIT15 | (KeyType<<2) | KeyIndex;
7651// usConfig |= BIT15 | (KeyType<<2) | (DefaultKey<<5) | KeyIndex;
7652
7653
7654 for(i=0 ; i<CAM_CONTENT_COUNT; i++){
7655 TargetCommand = i+CAM_CONTENT_COUNT*EntryNo;
7656 TargetCommand |= BIT31|BIT16;
7657
7658 if(i==0){//MAC|Config
7659 TargetContent = (u32)(*(MacAddr+0)) << 16|
7660 (u32)(*(MacAddr+1)) << 24|
7661 (u32)usConfig;
7662
7663 write_nic_dword(dev, WCAMI, TargetContent);
7664 write_nic_dword(dev, RWCAM, TargetCommand);
7665 // printk("setkey cam =%8x\n", read_cam(dev, i+6*EntryNo));
7666 }
7667 else if(i==1){//MAC
7668 TargetContent = (u32)(*(MacAddr+2)) |
7669 (u32)(*(MacAddr+3)) << 8|
7670 (u32)(*(MacAddr+4)) << 16|
7671 (u32)(*(MacAddr+5)) << 24;
7672 write_nic_dword(dev, WCAMI, TargetContent);
7673 write_nic_dword(dev, RWCAM, TargetCommand);
7674 }
7675 else {
7676 //Key Material
7677 if(KeyContent !=NULL){
7678 write_nic_dword(dev, WCAMI, (u32)(*(KeyContent+i-2)) );
7679 write_nic_dword(dev, RWCAM, TargetCommand);
7680 }
7681 }
7682 }
7683
7684}
7685
7686/***************************************************************************
7687 ------------------- module init / exit stubs ----------------
7688****************************************************************************/
7689module_init(rtl8192_usb_module_init);
7690module_exit(rtl8192_usb_module_exit);
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