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Staging: Drop memory allocation cast
[net-next-2.6.git] / drivers / staging / rtl8192su / r8192U_core.c
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5f53d8ca
JC		 1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 * Linux device driver for RTL8192U
4 *
5 * Based on the r8187 driver, which is:
6 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
19 *
20 * The full GNU General Public License is included in this distribution in the
21 * file called LICENSE.
22 *
23 * Contact Information:
24 * Jerry chuang <wlanfae@realtek.com>
25 */
26
d1aed899 27#include <linux/vmalloc.h>
5a0e3ad6 28#include <linux/slab.h>
e3133b28 29#include <linux/eeprom_93cx6.h>
5f53d8ca
JC		 30
31#undef LOOP_TEST
32#undef DUMP_RX
33#undef DUMP_TX
34#undef DEBUG_TX_DESC2
35#undef RX_DONT_PASS_UL
36#undef DEBUG_EPROM
37#undef DEBUG_RX_VERBOSE
38#undef DUMMY_RX
39#undef DEBUG_ZERO_RX
40#undef DEBUG_RX_SKB
41#undef DEBUG_TX_FRAG
42#undef DEBUG_RX_FRAG
43#undef DEBUG_TX_FILLDESC
44#undef DEBUG_TX
45#undef DEBUG_IRQ
46#undef DEBUG_RX
47#undef DEBUG_RXALLOC
48#undef DEBUG_REGISTERS
49#undef DEBUG_RING
50#undef DEBUG_IRQ_TASKLET
51#undef DEBUG_TX_ALLOC
52#undef DEBUG_TX_DESC
53
54#define CONFIG_RTL8192_IO_MAP
55
5f53d8ca
JC		 56#include <asm/uaccess.h>
57#include "r8192U.h"
5f53d8ca
JC		 58#include "r8192U_wx.h"
59
60#include "r8192S_rtl8225.h"
61#include "r8192S_hw.h"
62#include "r8192S_phy.h"
63#include "r8192S_phyreg.h"
64#include "r8192S_Efuse.h"
65
66#include "r819xU_cmdpkt.h"
67#include "r8192U_dm.h"
68//#include "r8192xU_phyreg.h"
69#include <linux/usb.h>
5f53d8ca 70
5f53d8ca 71#include "r8192U_pm.h"
5f53d8ca 72
2a7d71ad 73#include "ieee80211/dot11d.h"
5f53d8ca 74
5f53d8ca
JC		 75
76
5f53d8ca
JC		 77u32 rt_global_debug_component = \
78// COMP_TRACE |
79// COMP_DBG |
80// COMP_INIT |
81// COMP_RECV |
82// COMP_SEND |
83// COMP_IO |
84 COMP_POWER |
85// COMP_EPROM |
86 COMP_SWBW |
87 COMP_POWER_TRACKING |
88 COMP_TURBO |
89 COMP_QOS |
90// COMP_RATE |
91// COMP_RM |
92 COMP_DIG |
93// COMP_EFUSE |
94// COMP_CH |
95// COMP_TXAGC |
96 COMP_HIPWR |
97// COMP_HALDM |
98 COMP_SEC |
99 COMP_LED |
100// COMP_RF |
101// COMP_RXDESC |
102 COMP_FIRMWARE |
103 COMP_HT |
104 COMP_AMSDU |
105 COMP_SCAN |
106// COMP_CMD |
107 COMP_DOWN |
108 COMP_RESET |
109 COMP_ERR; //always open err flags on
5f53d8ca
JC		 110
111#define TOTAL_CAM_ENTRY 32
112#define CAM_CONTENT_COUNT 8
113
a457732b 114static const struct usb_device_id rtl8192_usb_id_tbl[] = {
5f53d8ca
JC		 115 /* Realtek */
116 {USB_DEVICE(0x0bda, 0x8192)},
117 {USB_DEVICE(0x0bda, 0x8709)},
118 /* Corega */
119 {USB_DEVICE(0x07aa, 0x0043)},
120 /* Belkin */
121 {USB_DEVICE(0x050d, 0x805E)},
122 /* Sitecom */
123 {USB_DEVICE(0x0df6, 0x0031)},
124 /* EnGenius */
125 {USB_DEVICE(0x1740, 0x9201)},
126 /* Dlink */
127 {USB_DEVICE(0x2001, 0x3301)},
128 /* Zinwell */
129 {USB_DEVICE(0x5a57, 0x0290)},
488d3749
SG		 130 /* Guillemot */
131 {USB_DEVICE(0x06f8, 0xe031)},
5f53d8ca
JC		 132 //92SU
133 {USB_DEVICE(0x0bda, 0x8172)},
134 {}
135};
136
137MODULE_LICENSE("GPL");
5f53d8ca 138MODULE_VERSION("V 1.1");
5f53d8ca
JC		 139MODULE_DEVICE_TABLE(usb, rtl8192_usb_id_tbl);
140MODULE_DESCRIPTION("Linux driver for Realtek RTL8192 USB WiFi cards");
141
142static char* ifname = "wlan%d";
5f53d8ca
JC		 143static int hwwep = 1; //default use hw. set 0 to use software security
144static int channels = 0x3fff;
145
146
147
5f53d8ca
JC		 148module_param(ifname, charp, S_IRUGO|S_IWUSR );
149//module_param(hwseqnum,int, S_IRUGO|S_IWUSR);
150module_param(hwwep,int, S_IRUGO|S_IWUSR);
151module_param(channels,int, S_IRUGO|S_IWUSR);
5f53d8ca
JC		 152
153MODULE_PARM_DESC(ifname," Net interface name, wlan%d=default");
154//MODULE_PARM_DESC(hwseqnum," Try to use hardware 802.11 header sequence numbers. Zero=default");
155MODULE_PARM_DESC(hwwep," Try to use hardware security support. ");
156MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
157
5f53d8ca
JC		 158static int __devinit rtl8192_usb_probe(struct usb_interface *intf,
159 const struct usb_device_id *id);
160static void __devexit rtl8192_usb_disconnect(struct usb_interface *intf);
5f53d8ca
JC		 161
162static struct usb_driver rtl8192_usb_driver = {
5f53d8ca
JC		 163 .name = RTL819xU_MODULE_NAME, /* Driver name */
164 .id_table = rtl8192_usb_id_tbl, /* PCI_ID table */
165 .probe = rtl8192_usb_probe, /* probe fn */
166 .disconnect = rtl8192_usb_disconnect, /* remove fn */
5f53d8ca
JC		 167 .suspend = rtl8192U_suspend, /* PM suspend fn */
168 .resume = rtl8192U_resume, /* PM resume fn */
5f53d8ca 169 .reset_resume = rtl8192U_resume, /* PM reset resume fn */
5f53d8ca
JC		 170};
171
172
5f53d8ca
JC		 173static void rtl8192SU_read_eeprom_info(struct net_device *dev);
174short rtl8192SU_tx(struct net_device *dev, struct sk_buff* skb);
175void rtl8192SU_rx_nomal(struct sk_buff* skb);
176void rtl8192SU_rx_cmd(struct sk_buff *skb);
177bool rtl8192SU_adapter_start(struct net_device *dev);
178short rtl8192SU_tx_cmd(struct net_device *dev, struct sk_buff *skb);
179void rtl8192SU_link_change(struct net_device *dev);
180void InitialGain8192S(struct net_device *dev,u8 Operation);
181void rtl8192SU_query_rxdesc_status(struct sk_buff *skb, struct ieee80211_rx_stats *stats, bool bIsRxAggrSubframe);
182
183struct rtl819x_ops rtl8192su_ops = {
184 .nic_type = NIC_8192SU,
185 .rtl819x_read_eeprom_info = rtl8192SU_read_eeprom_info,
186 .rtl819x_tx = rtl8192SU_tx,
187 .rtl819x_tx_cmd = rtl8192SU_tx_cmd,
188 .rtl819x_rx_nomal = rtl8192SU_rx_nomal,
189 .rtl819x_rx_cmd = rtl8192SU_rx_cmd,
190 .rtl819x_adapter_start = rtl8192SU_adapter_start,
191 .rtl819x_link_change = rtl8192SU_link_change,
192 .rtl819x_initial_gain = InitialGain8192S,
193 .rtl819x_query_rxdesc_status = rtl8192SU_query_rxdesc_status,
194};
5f53d8ca 195
5f53d8ca
JC		 196
197typedef struct _CHANNEL_LIST
198{
199 u8 Channel[32];
200 u8 Len;
201}CHANNEL_LIST, *PCHANNEL_LIST;
202
203static CHANNEL_LIST ChannelPlan[] = {
204 {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,149,153,157,161,165},24}, //FCC
205 {{1,2,3,4,5,6,7,8,9,10,11},11}, //IC
206 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //ETSI
207 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //Spain. Change to ETSI.
208 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //France. Change to ETSI.
209 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, //MKK //MKK
210 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22},//MKK1
211 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //Israel.
212 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, // For 11a , TELEC
213 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64}, 22}, //MIC
214 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14} //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626
215};
216
e3133b28
FS		 217static void rtl819x_eeprom_register_read(struct eeprom_93cx6 *eeprom)
218{
219 struct net_device *dev = eeprom->data;
220 u8 reg = read_nic_byte(dev, EPROM_CMD);
221
222 eeprom->reg_data_in = reg & RTL819X_EEPROM_CMD_WRITE;
223 eeprom->reg_data_out = reg & RTL819X_EEPROM_CMD_READ;
224 eeprom->reg_data_clock = reg & RTL819X_EEPROM_CMD_CK;
225 eeprom->reg_chip_select = reg & RTL819X_EEPROM_CMD_CS;
226}
227
228static void rtl819x_eeprom_register_write(struct eeprom_93cx6 *eeprom)
229{
230 struct net_device *dev = eeprom->data;
231 u8 reg = 2 << 6;
232
233 if (eeprom->reg_data_in)
234 reg |= RTL819X_EEPROM_CMD_WRITE;
235 if (eeprom->reg_data_out)
236 reg |= RTL819X_EEPROM_CMD_READ;
237 if (eeprom->reg_data_clock)
238 reg |= RTL819X_EEPROM_CMD_CK;
239 if (eeprom->reg_chip_select)
240 reg |= RTL819X_EEPROM_CMD_CS;
241
242 write_nic_byte(dev, EPROM_CMD, reg);
243 read_nic_byte(dev, EPROM_CMD);
244 udelay(10);
245}
246
5f53d8ca
JC		 247static void rtl819x_set_channel_map(u8 channel_plan, struct r8192_priv* priv)
248{
249 int i, max_chan=-1, min_chan=-1;
250 struct ieee80211_device* ieee = priv->ieee80211;
251 switch (channel_plan)
252 {
253 case COUNTRY_CODE_FCC:
254 case COUNTRY_CODE_IC:
255 case COUNTRY_CODE_ETSI:
256 case COUNTRY_CODE_SPAIN:
257 case COUNTRY_CODE_FRANCE:
258 case COUNTRY_CODE_MKK:
259 case COUNTRY_CODE_MKK1:
260 case COUNTRY_CODE_ISRAEL:
261 case COUNTRY_CODE_TELEC:
262 case COUNTRY_CODE_MIC:
263 {
264 Dot11d_Init(ieee);
265 ieee->bGlobalDomain = false;
266 //acturally 8225 & 8256 rf chip only support B,G,24N mode
267 if ((priv->rf_chip == RF_8225) || (priv->rf_chip == RF_8256) || (priv->rf_chip == RF_6052))
268 {
269 min_chan = 1;
270 max_chan = 14;
271 }
272 else
273 {
274 RT_TRACE(COMP_ERR, "unknown rf chip, can't set channel map in function:%s()\n", __FUNCTION__);
275 }
276 if (ChannelPlan[channel_plan].Len != 0){
277 // Clear old channel map
278 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
279 // Set new channel map
280 for (i=0;i<ChannelPlan[channel_plan].Len;i++)
281 {
282 if (ChannelPlan[channel_plan].Channel[i] < min_chan || ChannelPlan[channel_plan].Channel[i] > max_chan)
283 break;
284 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
285 }
286 }
287 break;
288 }
289 case COUNTRY_CODE_GLOBAL_DOMAIN:
290 {
291 GET_DOT11D_INFO(ieee)->bEnabled = 0;//this flag enabled to follow 11d country IE setting, otherwise, it shall follow global domain settings.
292 Dot11d_Reset(ieee);
293 ieee->bGlobalDomain = true;
294 break;
295 }
296 default:
297 break;
298 }
299 return;
300}
5f53d8ca
JC		 301
302#define eqMacAddr(a,b) ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 )
303
5f53d8ca
JC		 304#define rx_hal_is_cck_rate(_pDesc)\
305 ((_pDesc->RxMCS == DESC92S_RATE1M ||\
306 _pDesc->RxMCS == DESC92S_RATE2M ||\
307 _pDesc->RxMCS == DESC92S_RATE5_5M ||\
308 _pDesc->RxMCS == DESC92S_RATE11M) &&\
309 !_pDesc->RxHT)
310
311#define tx_hal_is_cck_rate(_DataRate)\
312 ( _DataRate == MGN_1M ||\
313 _DataRate == MGN_2M ||\
314 _DataRate == MGN_5_5M ||\
315 _DataRate == MGN_11M )
316
5f53d8ca
JC		 317
318
319
320void CamResetAllEntry(struct net_device *dev)
321{
322#if 1
323 u32 ulcommand = 0;
324 //2004/02/11 In static WEP, OID_ADD_KEY or OID_ADD_WEP are set before STA associate to AP.
325 // However, ResetKey is called on OID_802_11_INFRASTRUCTURE_MODE and MlmeAssociateRequest
326 // In this condition, Cam can not be reset because upper layer will not set this static key again.
327 //if(Adapter->EncAlgorithm == WEP_Encryption)
328 // return;
329//debug
330 //DbgPrint("========================================\n");
331 //DbgPrint(" Call ResetAllEntry \n");
332 //DbgPrint("========================================\n\n");
333 ulcommand |= BIT31|BIT30;
334 write_nic_dword(dev, RWCAM, ulcommand);
335#else
336 for(ucIndex=0;ucIndex<TOTAL_CAM_ENTRY;ucIndex++)
337 CAM_mark_invalid(dev, ucIndex);
338 for(ucIndex=0;ucIndex<TOTAL_CAM_ENTRY;ucIndex++)
339 CAM_empty_entry(dev, ucIndex);
340#endif
341
342}
343
344
345void write_cam(struct net_device *dev, u8 addr, u32 data)
346{
347 write_nic_dword(dev, WCAMI, data);
348 write_nic_dword(dev, RWCAM, BIT31|BIT16|(addr&0xff) );
349}
350
351u32 read_cam(struct net_device *dev, u8 addr)
352{
353 write_nic_dword(dev, RWCAM, 0x80000000|(addr&0xff) );
354 return read_nic_dword(dev, 0xa8);
355}
356
357void write_nic_byte_E(struct net_device *dev, int indx, u8 data)
358{
359 int status;
360 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
361 struct usb_device *udev = priv->udev;
362
363 status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
364 RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
365 indx|0xfe00, 0, &data, 1, HZ / 2);
366
367 if (status < 0)
368 {
369 printk("write_nic_byte_E TimeOut! status:%d\n", status);
370 }
371}
372
373u8 read_nic_byte_E(struct net_device *dev, int indx)
374{
375 int status;
376 u8 data;
377 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
378 struct usb_device *udev = priv->udev;
379
380 status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
381 RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
382 indx|0xfe00, 0, &data, 1, HZ / 2);
383
384 if (status < 0)
385 {
386 printk("read_nic_byte_E TimeOut! status:%d\n", status);
387 }
388
389 return data;
390}
391//as 92U has extend page from 4 to 16, so modify functions below.
392void write_nic_byte(struct net_device *dev, int indx, u8 data)
393{
394 int status;
395
396 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
397 struct usb_device *udev = priv->udev;
398
399 status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
400 RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
5f53d8ca 401 indx, 0, &data, 1, HZ / 2);
5f53d8ca
JC		 402
403 if (status < 0)
404 {
405 printk("write_nic_byte TimeOut! status:%d\n", status);
406 }
407
408
409}
410
411
412void write_nic_word(struct net_device *dev, int indx, u16 data)
413{
414
415 int status;
416
417 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
418 struct usb_device *udev = priv->udev;
419
420 status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
421 RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
5f53d8ca 422 indx, 0, &data, 2, HZ / 2);
5f53d8ca
JC		 423
424 if (status < 0)
425 {
426 printk("write_nic_word TimeOut! status:%d\n", status);
427 }
428
429}
430
431
432void write_nic_dword(struct net_device *dev, int indx, u32 data)
433{
434
435 int status;
436
437 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
438 struct usb_device *udev = priv->udev;
439
440 status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
441 RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
5f53d8ca 442 indx, 0, &data, 4, HZ / 2);
5f53d8ca
JC		 443
444
445 if (status < 0)
446 {
447 printk("write_nic_dword TimeOut! status:%d\n", status);
448 }
449
450}
451
452
453
454u8 read_nic_byte(struct net_device *dev, int indx)
455{
456 u8 data;
457 int status;
458 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
459 struct usb_device *udev = priv->udev;
460
461 status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
462 RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
5f53d8ca 463 indx, 0, &data, 1, HZ / 2);
5f53d8ca
JC		 464
465 if (status < 0)
466 {
467 printk("read_nic_byte TimeOut! status:%d\n", status);
468 }
469
470 return data;
471}
472
473
474
475u16 read_nic_word(struct net_device *dev, int indx)
476{
477 u16 data;
478 int status;
479 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
480 struct usb_device *udev = priv->udev;
481
482 status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
483 RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
5f53d8ca 484 indx, 0, &data, 2, HZ / 2);
5f53d8ca
JC		 485
486 if (status < 0)
487 {
488 printk("read_nic_word TimeOut! status:%d\n", status);
489 }
490
491
492 return data;
493}
494
495u16 read_nic_word_E(struct net_device *dev, int indx)
496{
497 u16 data;
498 int status;
499 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
500 struct usb_device *udev = priv->udev;
501
502 status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
503 RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
504 indx|0xfe00, 0, &data, 2, HZ / 2);
505
506 if (status < 0)
507 {
508 printk("read_nic_word TimeOut! status:%d\n", status);
509 }
510
511
512 return data;
513}
514
515u32 read_nic_dword(struct net_device *dev, int indx)
516{
517 u32 data;
518 int status;
519// int result;
520
521 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
522 struct usb_device *udev = priv->udev;
523
524 status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
525 RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
5f53d8ca 526 indx, 0, &data, 4, HZ / 2);
5f53d8ca
JC		 527// if(0 != result) {
528// printk(KERN_WARNING "read size of data = %d\, date = %d\n", result, data);
529// }
530
531 if (status < 0)
532 {
533 printk("read_nic_dword TimeOut! status:%d\n", status);
534 if(status == -ENODEV) {
535 priv->usb_error = true;
536 }
537 }
538
539
540
541 return data;
542}
543
544
545//u8 read_phy_cck(struct net_device *dev, u8 adr);
546//u8 read_phy_ofdm(struct net_device *dev, u8 adr);
547/* this might still called in what was the PHY rtl8185/rtl8192 common code
548 * plans are to possibilty turn it again in one common code...
549 */
550inline void force_pci_posting(struct net_device *dev)
551{
552}
553
554
555static struct net_device_stats *rtl8192_stats(struct net_device *dev);
556void rtl8192_commit(struct net_device *dev);
557//void rtl8192_restart(struct net_device *dev);
5f53d8ca
JC		 558void rtl8192_restart(struct work_struct *work);
559//void rtl8192_rq_tx_ack(struct work_struct *work);
5f53d8ca
JC		 560
561void watch_dog_timer_callback(unsigned long data);
562
563/****************************************************************************
564 -----------------------------PROCFS STUFF-------------------------
565*****************************************************************************/
566
567static struct proc_dir_entry *rtl8192_proc = NULL;
568
569
570
571static int proc_get_stats_ap(char *page, char **start,
572 off_t offset, int count,
573 int *eof, void *data)
574{
575 struct net_device *dev = data;
576 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
577 struct ieee80211_device *ieee = priv->ieee80211;
578 struct ieee80211_network *target;
579
580 int len = 0;
581
582 list_for_each_entry(target, &ieee->network_list, list) {
583
584 len += snprintf(page + len, count - len,
585 "%s ", target->ssid);
586
587 if(target->wpa_ie_len>0 || target->rsn_ie_len>0){
588 len += snprintf(page + len, count - len,
589 "WPA\n");
590 }
591 else{
592 len += snprintf(page + len, count - len,
593 "non_WPA\n");
594 }
595
596 }
597
598 *eof = 1;
599 return len;
600}
601
5f53d8ca
JC		 602static int proc_get_registers(char *page, char **start,
603 off_t offset, int count,
604 int *eof, void *data)
605{
606 struct net_device *dev = data;
607// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
608
609 int len = 0;
610 int i,n,page0,page1,page2;
611
612 int max=0xff;
613 page0 = 0x000;
614 page1 = 0x100;
615 page2 = 0x800;
616
617 /* This dump the current register page */
618 if(!IS_BB_REG_OFFSET_92S(page0)){
619 len += snprintf(page + len, count - len,
620 "\n####################page %x##################\n ", (page0>>8));
621 for(n=0;n<=max;)
622 {
623 len += snprintf(page + len, count - len,
624 "\nD: %2x > ",n);
625 for(i=0;i<16 && n<=max;i++,n++)
626 len += snprintf(page + len, count - len,
627 "%2.2x ",read_nic_byte(dev,(page0|n)));
628 }
629 }else{
630 len += snprintf(page + len, count - len,
631 "\n####################page %x##################\n ", (page0>>8));
632 for(n=0;n<=max;)
633 {
634 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
635 for(i=0;i<4 && n<=max;n+=4,i++)
636 len += snprintf(page + len, count - len,
637 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
638 }
639 }
640 len += snprintf(page + len, count - len,"\n");
641 *eof = 1;
642 return len;
643
644}
645static int proc_get_registers_1(char *page, char **start,
646 off_t offset, int count,
647 int *eof, void *data)
648{
649 struct net_device *dev = data;
650// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
651
652 int len = 0;
653 int i,n,page0;
654
655 int max=0xff;
656 page0 = 0x100;
657
658 /* This dump the current register page */
659 len += snprintf(page + len, count - len,
660 "\n####################page %x##################\n ", (page0>>8));
661 for(n=0;n<=max;)
662 {
663 len += snprintf(page + len, count - len,
664 "\nD: %2x > ",n);
665 for(i=0;i<16 && n<=max;i++,n++)
666 len += snprintf(page + len, count - len,
667 "%2.2x ",read_nic_byte(dev,(page0|n)));
668 }
669 len += snprintf(page + len, count - len,"\n");
670 *eof = 1;
671 return len;
672
673}
674static int proc_get_registers_2(char *page, char **start,
675 off_t offset, int count,
676 int *eof, void *data)
677{
678 struct net_device *dev = data;
679// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
680
681 int len = 0;
682 int i,n,page0;
683
684 int max=0xff;
685 page0 = 0x200;
686
687 /* This dump the current register page */
688 len += snprintf(page + len, count - len,
689 "\n####################page %x##################\n ", (page0>>8));
690 for(n=0;n<=max;)
691 {
692 len += snprintf(page + len, count - len,
693 "\nD: %2x > ",n);
694 for(i=0;i<16 && n<=max;i++,n++)
695 len += snprintf(page + len, count - len,
696 "%2.2x ",read_nic_byte(dev,(page0|n)));
697 }
698 len += snprintf(page + len, count - len,"\n");
699 *eof = 1;
700 return len;
701
702}
703static int proc_get_registers_8(char *page, char **start,
704 off_t offset, int count,
705 int *eof, void *data)
706{
707 struct net_device *dev = data;
708
709 int len = 0;
710 int i,n,page0;
711
712 int max=0xff;
713 page0 = 0x800;
714
715 /* This dump the current register page */
716 len += snprintf(page + len, count - len,
717 "\n####################page %x##################\n ", (page0>>8));
718 for(n=0;n<=max;)
719 {
720 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
721 for(i=0;i<4 && n<=max;n+=4,i++)
722 len += snprintf(page + len, count - len,
723 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
724 }
725 len += snprintf(page + len, count - len,"\n");
726 *eof = 1;
727 return len;
728
729 }
730static int proc_get_registers_9(char *page, char **start,
731 off_t offset, int count,
732 int *eof, void *data)
733{
734 struct net_device *dev = data;
735// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
736
737 int len = 0;
738 int i,n,page0;
739
740 int max=0xff;
741 page0 = 0x900;
742
743 /* This dump the current register page */
744 len += snprintf(page + len, count - len,
745 "\n####################page %x##################\n ", (page0>>8));
746 for(n=0;n<=max;)
747 {
748 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
749 for(i=0;i<4 && n<=max;n+=4,i++)
750 len += snprintf(page + len, count - len,
751 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
752 }
753 len += snprintf(page + len, count - len,"\n");
754 *eof = 1;
755 return len;
756}
757static int proc_get_registers_a(char *page, char **start,
758 off_t offset, int count,
759 int *eof, void *data)
760{
761 struct net_device *dev = data;
762// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
763
764 int len = 0;
765 int i,n,page0;
766
767 int max=0xff;
768 page0 = 0xa00;
769
770 /* This dump the current register page */
771 len += snprintf(page + len, count - len,
772 "\n####################page %x##################\n ", (page0>>8));
773 for(n=0;n<=max;)
774 {
775 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
776 for(i=0;i<4 && n<=max;n+=4,i++)
777 len += snprintf(page + len, count - len,
778 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
779 }
780 len += snprintf(page + len, count - len,"\n");
781 *eof = 1;
782 return len;
783}
784static int proc_get_registers_b(char *page, char **start,
785 off_t offset, int count,
786 int *eof, void *data)
787{
788 struct net_device *dev = data;
789// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
790
791 int len = 0;
792 int i,n,page0;
793
794 int max=0xff;
795 page0 = 0xb00;
796
797 /* This dump the current register page */
798 len += snprintf(page + len, count - len,
799 "\n####################page %x##################\n ", (page0>>8));
800 for(n=0;n<=max;)
801 {
802 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
803 for(i=0;i<4 && n<=max;n+=4,i++)
804 len += snprintf(page + len, count - len,
805 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
806 }
807 len += snprintf(page + len, count - len,"\n");
808 *eof = 1;
809 return len;
810 }
811static int proc_get_registers_c(char *page, char **start,
812 off_t offset, int count,
813 int *eof, void *data)
814{
815 struct net_device *dev = data;
816// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
817
818 int len = 0;
819 int i,n,page0;
820
821 int max=0xff;
822 page0 = 0xc00;
823
824 /* This dump the current register page */
825 len += snprintf(page + len, count - len,
826 "\n####################page %x##################\n ", (page0>>8));
827 for(n=0;n<=max;)
828 {
829 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
830 for(i=0;i<4 && n<=max;n+=4,i++)
831 len += snprintf(page + len, count - len,
832 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
833 }
834 len += snprintf(page + len, count - len,"\n");
835 *eof = 1;
836 return len;
837}
838static int proc_get_registers_d(char *page, char **start,
839 off_t offset, int count,
840 int *eof, void *data)
841{
842 struct net_device *dev = data;
843// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
844
845 int len = 0;
846 int i,n,page0;
847
848 int max=0xff;
849 page0 = 0xd00;
850
851 /* This dump the current register page */
852 len += snprintf(page + len, count - len,
853 "\n####################page %x##################\n ", (page0>>8));
854 for(n=0;n<=max;)
855 {
856 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
857 for(i=0;i<4 && n<=max;n+=4,i++)
858 len += snprintf(page + len, count - len,
859 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
860 }
861 len += snprintf(page + len, count - len,"\n");
862 *eof = 1;
863 return len;
864}
865static int proc_get_registers_e(char *page, char **start,
866 off_t offset, int count,
867 int *eof, void *data)
868{
869 struct net_device *dev = data;
870// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
871
872 int len = 0;
873 int i,n,page0;
874
875 int max=0xff;
876 page0 = 0xe00;
877
878 /* This dump the current register page */
879 len += snprintf(page + len, count - len,
880 "\n####################page %x##################\n ", (page0>>8));
881 for(n=0;n<=max;)
882 {
883 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
884 for(i=0;i<4 && n<=max;n+=4,i++)
885 len += snprintf(page + len, count - len,
886 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
887 }
888 len += snprintf(page + len, count - len,"\n");
889 *eof = 1;
890 return len;
891}
5f53d8ca 892
5f53d8ca
JC		 893static int proc_get_stats_tx(char *page, char **start,
894 off_t offset, int count,
895 int *eof, void *data)
896{
897 struct net_device *dev = data;
898 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
899
900 int len = 0;
901
902 len += snprintf(page + len, count - len,
903 "TX VI priority ok int: %lu\n"
904 "TX VI priority error int: %lu\n"
905 "TX VO priority ok int: %lu\n"
906 "TX VO priority error int: %lu\n"
907 "TX BE priority ok int: %lu\n"
908 "TX BE priority error int: %lu\n"
909 "TX BK priority ok int: %lu\n"
910 "TX BK priority error int: %lu\n"
911 "TX MANAGE priority ok int: %lu\n"
912 "TX MANAGE priority error int: %lu\n"
913 "TX BEACON priority ok int: %lu\n"
914 "TX BEACON priority error int: %lu\n"
915// "TX high priority ok int: %lu\n"
916// "TX high priority failed error int: %lu\n"
917 "TX queue resume: %lu\n"
918 "TX queue stopped?: %d\n"
919 "TX fifo overflow: %lu\n"
920// "TX beacon: %lu\n"
921 "TX VI queue: %d\n"
922 "TX VO queue: %d\n"
923 "TX BE queue: %d\n"
924 "TX BK queue: %d\n"
925// "TX HW queue: %d\n"
926 "TX VI dropped: %lu\n"
927 "TX VO dropped: %lu\n"
928 "TX BE dropped: %lu\n"
929 "TX BK dropped: %lu\n"
930 "TX total data packets %lu\n",
931// "TX beacon aborted: %lu\n",
932 priv->stats.txviokint,
933 priv->stats.txvierr,
934 priv->stats.txvookint,
935 priv->stats.txvoerr,
936 priv->stats.txbeokint,
937 priv->stats.txbeerr,
938 priv->stats.txbkokint,
939 priv->stats.txbkerr,
940 priv->stats.txmanageokint,
941 priv->stats.txmanageerr,
942 priv->stats.txbeaconokint,
943 priv->stats.txbeaconerr,
944// priv->stats.txhpokint,
945// priv->stats.txhperr,
946 priv->stats.txresumed,
947 netif_queue_stopped(dev),
948 priv->stats.txoverflow,
949// priv->stats.txbeacon,
950 atomic_read(&(priv->tx_pending[VI_PRIORITY])),
951 atomic_read(&(priv->tx_pending[VO_PRIORITY])),
952 atomic_read(&(priv->tx_pending[BE_PRIORITY])),
953 atomic_read(&(priv->tx_pending[BK_PRIORITY])),
954// read_nic_byte(dev, TXFIFOCOUNT),
955 priv->stats.txvidrop,
956 priv->stats.txvodrop,
957 priv->stats.txbedrop,
958 priv->stats.txbkdrop,
959 priv->stats.txdatapkt
960// priv->stats.txbeaconerr
961 );
962
963 *eof = 1;
964 return len;
965}
966
967
968
969static int proc_get_stats_rx(char *page, char **start,
970 off_t offset, int count,
971 int *eof, void *data)
972{
973 struct net_device *dev = data;
974 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
975
976 int len = 0;
977
978 len += snprintf(page + len, count - len,
979 "RX packets: %lu\n"
980 "RX urb status error: %lu\n"
981 "RX invalid urb error: %lu\n",
982 priv->stats.rxoktotal,
983 priv->stats.rxstaterr,
984 priv->stats.rxurberr);
985
986 *eof = 1;
987 return len;
988}
5f53d8ca 989
5f53d8ca
JC		 990void rtl8192_proc_module_init(void)
991{
992 RT_TRACE(COMP_INIT, "Initializing proc filesystem");
5f53d8ca 993 rtl8192_proc=create_proc_entry(RTL819xU_MODULE_NAME, S_IFDIR, init_net.proc_net);
5f53d8ca
JC		 994}
995
996
997void rtl8192_proc_module_remove(void)
998{
5f53d8ca 999 remove_proc_entry(RTL819xU_MODULE_NAME, init_net.proc_net);
5f53d8ca
JC		 1000}
1001
1002
1003void rtl8192_proc_remove_one(struct net_device *dev)
1004{
1005 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1006
1007
1008 if (priv->dir_dev) {
1009 // remove_proc_entry("stats-hw", priv->dir_dev);
1010 remove_proc_entry("stats-tx", priv->dir_dev);
1011 remove_proc_entry("stats-rx", priv->dir_dev);
1012 // remove_proc_entry("stats-ieee", priv->dir_dev);
1013 remove_proc_entry("stats-ap", priv->dir_dev);
1014 remove_proc_entry("registers", priv->dir_dev);
1015 remove_proc_entry("registers-1", priv->dir_dev);
1016 remove_proc_entry("registers-2", priv->dir_dev);
1017 remove_proc_entry("registers-8", priv->dir_dev);
1018 remove_proc_entry("registers-9", priv->dir_dev);
1019 remove_proc_entry("registers-a", priv->dir_dev);
1020 remove_proc_entry("registers-b", priv->dir_dev);
1021 remove_proc_entry("registers-c", priv->dir_dev);
1022 remove_proc_entry("registers-d", priv->dir_dev);
1023 remove_proc_entry("registers-e", priv->dir_dev);
1024 // remove_proc_entry("cck-registers",priv->dir_dev);
1025 // remove_proc_entry("ofdm-registers",priv->dir_dev);
1026 //remove_proc_entry(dev->name, rtl8192_proc);
1027 remove_proc_entry("wlan0", rtl8192_proc);
1028 priv->dir_dev = NULL;
1029 }
1030}
1031
1032
1033void rtl8192_proc_init_one(struct net_device *dev)
1034{
1035 struct proc_dir_entry *e;
1036 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1037 priv->dir_dev = create_proc_entry(dev->name,
1038 S_IFDIR | S_IRUGO | S_IXUGO,
1039 rtl8192_proc);
1040 if (!priv->dir_dev) {
1041 RT_TRACE(COMP_ERR, "Unable to initialize /proc/net/rtl8192/%s\n",
1042 dev->name);
1043 return;
1044 }
5f53d8ca
JC		 1045 e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
1046 priv->dir_dev, proc_get_stats_rx, dev);
1047
1048 if (!e) {
1049 RT_TRACE(COMP_ERR,"Unable to initialize "
1050 "/proc/net/rtl8192/%s/stats-rx\n",
1051 dev->name);
1052 }
1053
1054
1055 e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO,
1056 priv->dir_dev, proc_get_stats_tx, dev);
1057
1058 if (!e) {
1059 RT_TRACE(COMP_ERR, "Unable to initialize "
1060 "/proc/net/rtl8192/%s/stats-tx\n",
1061 dev->name);
1062 }
5f53d8ca
JC		 1063
1064 e = create_proc_read_entry("stats-ap", S_IFREG | S_IRUGO,
1065 priv->dir_dev, proc_get_stats_ap, dev);
1066
1067 if (!e) {
1068 RT_TRACE(COMP_ERR, "Unable to initialize "
1069 "/proc/net/rtl8192/%s/stats-ap\n",
1070 dev->name);
1071 }
1072
1073 e = create_proc_read_entry("registers", S_IFREG | S_IRUGO,
1074 priv->dir_dev, proc_get_registers, dev);
1075 if (!e) {
1076 RT_TRACE(COMP_ERR, "Unable to initialize "
1077 "/proc/net/rtl8192/%s/registers\n",
1078 dev->name);
1079 }
5f53d8ca
JC		 1080 e = create_proc_read_entry("registers-1", S_IFREG | S_IRUGO,
1081 priv->dir_dev, proc_get_registers_1, dev);
1082 if (!e) {
1083 RT_TRACE(COMP_ERR, "Unable to initialize "
1084 "/proc/net/rtl8192/%s/registers-1\n",
1085 dev->name);
1086 }
1087 e = create_proc_read_entry("registers-2", S_IFREG | S_IRUGO,
1088 priv->dir_dev, proc_get_registers_2, dev);
1089 if (!e) {
1090 RT_TRACE(COMP_ERR, "Unable to initialize "
1091 "/proc/net/rtl8192/%s/registers-2\n",
1092 dev->name);
1093 }
1094 e = create_proc_read_entry("registers-8", S_IFREG | S_IRUGO,
1095 priv->dir_dev, proc_get_registers_8, dev);
1096 if (!e) {
1097 RT_TRACE(COMP_ERR, "Unable to initialize "
1098 "/proc/net/rtl8192/%s/registers-8\n",
1099 dev->name);
1100 }
1101 e = create_proc_read_entry("registers-9", S_IFREG | S_IRUGO,
1102 priv->dir_dev, proc_get_registers_9, dev);
1103 if (!e) {
1104 RT_TRACE(COMP_ERR, "Unable to initialize "
1105 "/proc/net/rtl8192/%s/registers-9\n",
1106 dev->name);
1107 }
1108 e = create_proc_read_entry("registers-a", S_IFREG | S_IRUGO,
1109 priv->dir_dev, proc_get_registers_a, dev);
1110 if (!e) {
1111 RT_TRACE(COMP_ERR, "Unable to initialize "
1112 "/proc/net/rtl8192/%s/registers-a\n",
1113 dev->name);
1114 }
1115 e = create_proc_read_entry("registers-b", S_IFREG | S_IRUGO,
1116 priv->dir_dev, proc_get_registers_b, dev);
1117 if (!e) {
1118 RT_TRACE(COMP_ERR, "Unable to initialize "
1119 "/proc/net/rtl8192/%s/registers-b\n",
1120 dev->name);
1121 }
1122 e = create_proc_read_entry("registers-c", S_IFREG | S_IRUGO,
1123 priv->dir_dev, proc_get_registers_c, dev);
1124 if (!e) {
1125 RT_TRACE(COMP_ERR, "Unable to initialize "
1126 "/proc/net/rtl8192/%s/registers-c\n",
1127 dev->name);
1128 }
1129 e = create_proc_read_entry("registers-d", S_IFREG | S_IRUGO,
1130 priv->dir_dev, proc_get_registers_d, dev);
1131 if (!e) {
1132 RT_TRACE(COMP_ERR, "Unable to initialize "
1133 "/proc/net/rtl8192/%s/registers-d\n",
1134 dev->name);
1135 }
1136 e = create_proc_read_entry("registers-e", S_IFREG | S_IRUGO,
1137 priv->dir_dev, proc_get_registers_e, dev);
1138 if (!e) {
1139 RT_TRACE(COMP_ERR, "Unable to initialize "
1140 "/proc/net/rtl8192/%s/registers-e\n",
1141 dev->name);
1142 }
5f53d8ca
JC		 1143}
1144/****************************************************************************
1145 -----------------------------MISC STUFF-------------------------
1146*****************************************************************************/
1147
1148/* this is only for debugging */
1149void print_buffer(u32 *buffer, int len)
1150{
1151 int i;
1152 u8 *buf =(u8*)buffer;
1153
1154 printk("ASCII BUFFER DUMP (len: %x):\n",len);
1155
1156 for(i=0;i<len;i++)
1157 printk("%c",buf[i]);
1158
1159 printk("\nBINARY BUFFER DUMP (len: %x):\n",len);
1160
1161 for(i=0;i<len;i++)
1162 printk("%x",buf[i]);
1163
1164 printk("\n");
1165}
1166
1167//short check_nic_enough_desc(struct net_device *dev, priority_t priority)
1168short check_nic_enough_desc(struct net_device *dev,int queue_index)
1169{
1170 struct r8192_priv *priv = ieee80211_priv(dev);
1171 int used = atomic_read(&priv->tx_pending[queue_index]);
1172
1173 return (used < MAX_TX_URB);
1174}
1175
1176void tx_timeout(struct net_device *dev)
1177{
1178 struct r8192_priv *priv = ieee80211_priv(dev);
1179 //rtl8192_commit(dev);
1180
5f53d8ca 1181 schedule_work(&priv->reset_wq);
5f53d8ca
JC		 1182 //DMESG("TXTIMEOUT");
1183}
1184
5f53d8ca
JC		 1185/* this is only for debug */
1186void rtl8192_dump_reg(struct net_device *dev)
1187{
1188 int i;
1189 int n;
1190 int max=0x1ff;
1191
1192 RT_TRACE(COMP_PHY, "Dumping NIC register map");
1193
1194 for(n=0;n<=max;)
1195 {
1196 printk( "\nD: %2x> ", n);
1197 for(i=0;i<16 && n<=max;i++,n++)
1198 printk("%2x ",read_nic_byte(dev,n));
1199 }
1200 printk("\n");
1201}
1202
1203/****************************************************************************
1204 ------------------------------HW STUFF---------------------------
1205*****************************************************************************/
1206
5f53d8ca
JC		 1207void rtl8192_set_mode(struct net_device *dev,int mode)
1208{
1209 u8 ecmd;
1210 ecmd=read_nic_byte(dev, EPROM_CMD);
1211 ecmd=ecmd &~ EPROM_CMD_OPERATING_MODE_MASK;
1212 ecmd=ecmd | (mode<<EPROM_CMD_OPERATING_MODE_SHIFT);
1213 ecmd=ecmd &~ (1<<EPROM_CS_SHIFT);
1214 ecmd=ecmd &~ (1<<EPROM_CK_SHIFT);
1215 write_nic_byte(dev, EPROM_CMD, ecmd);
1216}
1217
1218
1219void rtl8192_update_msr(struct net_device *dev)
1220{
1221 struct r8192_priv *priv = ieee80211_priv(dev);
1222 u8 msr;
1223
1224 msr = read_nic_byte(dev, MSR);
1225 msr &= ~ MSR_LINK_MASK;
1226
1227 /* do not change in link_state != WLAN_LINK_ASSOCIATED.
1228 * msr must be updated if the state is ASSOCIATING.
1229 * this is intentional and make sense for ad-hoc and
1230 * master (see the create BSS/IBSS func)
1231 */
1232 if (priv->ieee80211->state == IEEE80211_LINKED){
1233
1234 if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
1235 msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
1236 else if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
1237 msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
1238 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
1239 msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
1240
1241 }else
1242 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
1243
1244 write_nic_byte(dev, MSR, msr);
1245}
1246
1247void rtl8192_set_chan(struct net_device *dev,short ch)
1248{
1249 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1250// u32 tx;
1251 RT_TRACE(COMP_CH, "=====>%s()====ch:%d\n", __FUNCTION__, ch);
1252 //printk("=====>%s()====ch:%d\n", __FUNCTION__, ch);
1253 priv->chan=ch;
5f53d8ca
JC		 1254
1255 /* this hack should avoid frame TX during channel setting*/
1256
1257
1258// tx = read_nic_dword(dev,TX_CONF);
1259// tx &= ~TX_LOOPBACK_MASK;
1260
1261#ifndef LOOP_TEST
1262// write_nic_dword(dev,TX_CONF, tx |( TX_LOOPBACK_MAC<<TX_LOOPBACK_SHIFT));
1263
1264 //need to implement rf set channel here WB
1265
1266 if (priv->rf_set_chan)
1267 priv->rf_set_chan(dev,priv->chan);
1268 mdelay(10);
1269// write_nic_dword(dev,TX_CONF,tx | (TX_LOOPBACK_NONE<<TX_LOOPBACK_SHIFT));
1270#endif
1271}
1272
5f53d8ca 1273static void rtl8192_rx_isr(struct urb *urb);
5f53d8ca
JC		 1274
1275u32 get_rxpacket_shiftbytes_819xusb(struct ieee80211_rx_stats *pstats)
1276{
1277
5f53d8ca
JC		 1278 return (sizeof(rx_desc_819x_usb) + pstats->RxDrvInfoSize
1279 + pstats->RxBufShift);
1280
1281}
1282static int rtl8192_rx_initiate(struct net_device*dev)
1283{
1284 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1285 struct urb *entry;
1286 struct sk_buff *skb;
1287 struct rtl8192_rx_info *info;
1288
1289 /* nomal packet rx procedure */
1290 while (skb_queue_len(&priv->rx_queue) < MAX_RX_URB) {
1291 skb = __dev_alloc_skb(RX_URB_SIZE, GFP_KERNEL);
1292 if (!skb)
1293 break;
5f53d8ca 1294 entry = usb_alloc_urb(0, GFP_KERNEL);
5f53d8ca
JC		 1295 if (!entry) {
1296 kfree_skb(skb);
1297 break;
1298 }
5f53d8ca 1299 usb_fill_bulk_urb(entry, priv->udev,
8109c2fd 1300 usb_rcvbulkpipe(priv->udev, 3), skb_tail_pointer(skb),
5f53d8ca
JC		 1301 RX_URB_SIZE, rtl8192_rx_isr, skb);
1302 info = (struct rtl8192_rx_info *) skb->cb;
1303 info->urb = entry;
1304 info->dev = dev;
1305 info->out_pipe = 3; //denote rx normal packet queue
1306 skb_queue_tail(&priv->rx_queue, skb);
5f53d8ca 1307 usb_submit_urb(entry, GFP_KERNEL);
5f53d8ca
JC		 1308 }
1309
1310 /* command packet rx procedure */
1311 while (skb_queue_len(&priv->rx_queue) < MAX_RX_URB + 3) {
5f53d8ca
JC		 1312 skb = __dev_alloc_skb(RX_URB_SIZE ,GFP_KERNEL);
1313 if (!skb)
1314 break;
5f53d8ca 1315 entry = usb_alloc_urb(0, GFP_KERNEL);
5f53d8ca
JC		 1316 if (!entry) {
1317 kfree_skb(skb);
1318 break;
1319 }
1320 usb_fill_bulk_urb(entry, priv->udev,
8109c2fd 1321 usb_rcvbulkpipe(priv->udev, 9), skb_tail_pointer(skb),
5f53d8ca
JC		 1322 RX_URB_SIZE, rtl8192_rx_isr, skb);
1323 info = (struct rtl8192_rx_info *) skb->cb;
1324 info->urb = entry;
1325 info->dev = dev;
1326 info->out_pipe = 9; //denote rx cmd packet queue
1327 skb_queue_tail(&priv->rx_queue, skb);
5f53d8ca 1328 usb_submit_urb(entry, GFP_KERNEL);
5f53d8ca
JC		 1329 }
1330
1331 return 0;
1332}
1333
1334void rtl8192_set_rxconf(struct net_device *dev)
1335{
1336 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1337 u32 rxconf;
1338
1339 rxconf=read_nic_dword(dev,RCR);
1340 rxconf = rxconf &~ MAC_FILTER_MASK;
1341 rxconf = rxconf | RCR_AMF;
1342 rxconf = rxconf | RCR_ADF;
1343 rxconf = rxconf | RCR_AB;
1344 rxconf = rxconf | RCR_AM;
1345 //rxconf = rxconf | RCR_ACF;
1346
1347 if (dev->flags & IFF_PROMISC) {DMESG ("NIC in promisc mode");}
1348
1349 if(priv->ieee80211->iw_mode == IW_MODE_MONITOR || \
1350 dev->flags & IFF_PROMISC){
1351 rxconf = rxconf | RCR_AAP;
1352 } /*else if(priv->ieee80211->iw_mode == IW_MODE_MASTER){
1353 rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT);
1354 rxconf = rxconf | (1<<RX_CHECK_BSSID_SHIFT);
1355 }*/else{
1356 rxconf = rxconf | RCR_APM;
1357 rxconf = rxconf | RCR_CBSSID;
1358 }
1359
1360
1361 if(priv->ieee80211->iw_mode == IW_MODE_MONITOR){
1362 rxconf = rxconf | RCR_AICV;
1363 rxconf = rxconf | RCR_APWRMGT;
1364 }
1365
1366 if( priv->crcmon == 1 && priv->ieee80211->iw_mode == IW_MODE_MONITOR)
1367 rxconf = rxconf | RCR_ACRC32;
1368
1369
1370 rxconf = rxconf &~ RX_FIFO_THRESHOLD_MASK;
1371 rxconf = rxconf | (RX_FIFO_THRESHOLD_NONE<<RX_FIFO_THRESHOLD_SHIFT);
1372 rxconf = rxconf &~ MAX_RX_DMA_MASK;
1373 rxconf = rxconf | ((u32)7<<RCR_MXDMA_OFFSET);
1374
1375// rxconf = rxconf | (1<<RX_AUTORESETPHY_SHIFT);
1376 rxconf = rxconf | RCR_ONLYERLPKT;
1377
1378// rxconf = rxconf &~ RCR_CS_MASK;
1379// rxconf = rxconf | (1<<RCR_CS_SHIFT);
1380
1381 write_nic_dword(dev, RCR, rxconf);
1382
1383 #ifdef DEBUG_RX
1384 DMESG("rxconf: %x %x",rxconf ,read_nic_dword(dev,RCR));
1385 #endif
1386}
1387//wait to be removed
1388void rtl8192_rx_enable(struct net_device *dev)
1389{
1390 //u8 cmd;
1391
1392 //struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1393
1394 rtl8192_rx_initiate(dev);
1395
1396// rtl8192_set_rxconf(dev);
5f53d8ca
JC		 1397}
1398
1399
1400void rtl8192_tx_enable(struct net_device *dev)
1401{
5f53d8ca
JC		 1402}
1403
5f53d8ca
JC		 1404void rtl8192_rtx_disable(struct net_device *dev)
1405{
1406 u8 cmd;
1407 struct r8192_priv *priv = ieee80211_priv(dev);
1408 struct sk_buff *skb;
1409 struct rtl8192_rx_info *info;
1410
1411 cmd=read_nic_byte(dev,CMDR);
1412 write_nic_byte(dev, CMDR, cmd &~ \
1413 (CR_TE|CR_RE));
1414 force_pci_posting(dev);
1415 mdelay(10);
1416
1417 while ((skb = __skb_dequeue(&priv->rx_queue))) {
1418 info = (struct rtl8192_rx_info *) skb->cb;
1419 if (!info->urb)
1420 continue;
1421
1422 usb_kill_urb(info->urb);
1423 kfree_skb(skb);
1424 }
1425
1426 if (skb_queue_len(&priv->skb_queue)) {
1427 printk(KERN_WARNING "skb_queue not empty\n");
1428 }
1429
1430 skb_queue_purge(&priv->skb_queue);
1431 return;
1432}
1433
1434
1435int alloc_tx_beacon_desc_ring(struct net_device *dev, int count)
1436{
5f53d8ca
JC		 1437 return 0;
1438}
1439
5f53d8ca
JC		 1440inline u16 ieeerate2rtlrate(int rate)
1441{
1442 switch(rate){
1443 case 10:
1444 return 0;
1445 case 20:
1446 return 1;
1447 case 55:
1448 return 2;
1449 case 110:
1450 return 3;
1451 case 60:
1452 return 4;
1453 case 90:
1454 return 5;
1455 case 120:
1456 return 6;
1457 case 180:
1458 return 7;
1459 case 240:
1460 return 8;
1461 case 360:
1462 return 9;
1463 case 480:
1464 return 10;
1465 case 540:
1466 return 11;
1467 default:
1468 return 3;
1469
1470 }
1471}
1472static u16 rtl_rate[] = {10,20,55,110,60,90,120,180,240,360,480,540};
1473inline u16 rtl8192_rate2rate(short rate)
1474{
1475 if (rate >11) return 0;
1476 return rtl_rate[rate];
1477}
1478
5f53d8ca 1479static void rtl8192_rx_isr(struct urb *urb)
5f53d8ca
JC		 1480{
1481 struct sk_buff *skb = (struct sk_buff *) urb->context;
1482 struct rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
1483 struct net_device *dev = info->dev;
1484 struct r8192_priv *priv = ieee80211_priv(dev);
1485 int out_pipe = info->out_pipe;
1486 int err;
1487 if(!priv->up)
1488 return;
1489 if (unlikely(urb->status)) {
1490 info->urb = NULL;
1491 priv->stats.rxstaterr++;
1492 priv->ieee80211->stats.rx_errors++;
1493 usb_free_urb(urb);
1494 // printk("%s():rx status err\n",__FUNCTION__);
1495 return;
1496 }
1ec9e48d 1497
5f53d8ca 1498 skb_unlink(skb, &priv->rx_queue);
5f53d8ca
JC		 1499 skb_put(skb, urb->actual_length);
1500
1501 skb_queue_tail(&priv->skb_queue, skb);
1502 tasklet_schedule(&priv->irq_rx_tasklet);
1503
1504 skb = dev_alloc_skb(RX_URB_SIZE);
1505 if (unlikely(!skb)) {
1506 usb_free_urb(urb);
1507 printk("%s():can,t alloc skb\n",__FUNCTION__);
1508 /* TODO check rx queue length and refill *somewhere* */
1509 return;
1510 }
1511
1512 usb_fill_bulk_urb(urb, priv->udev,
8109c2fd
JM		 1513 usb_rcvbulkpipe(priv->udev, out_pipe),
1514 skb_tail_pointer(skb),
5f53d8ca
JC		 1515 RX_URB_SIZE, rtl8192_rx_isr, skb);
1516
1517 info = (struct rtl8192_rx_info *) skb->cb;
1518 info->urb = urb;
1519 info->dev = dev;
1520 info->out_pipe = out_pipe;
1521
8109c2fd 1522 urb->transfer_buffer = skb_tail_pointer(skb);
5f53d8ca
JC		 1523 urb->context = skb;
1524 skb_queue_tail(&priv->rx_queue, skb);
5f53d8ca 1525 err = usb_submit_urb(urb, GFP_ATOMIC);
aad445f8 1526 if(err && err != -EPERM)
5f53d8ca
JC		 1527 printk("can not submit rxurb, err is %x,URB status is %x\n",err,urb->status);
1528}
1529
1530u32
1531rtl819xusb_rx_command_packet(
1532 struct net_device *dev,
1533 struct ieee80211_rx_stats *pstats
1534 )
1535{
1536 u32 status;
1537
1538 //RT_TRACE(COMP_RECV, DBG_TRACE, ("---> RxCommandPacketHandle819xUsb()\n"));
1539
1540 status = cmpk_message_handle_rx(dev, pstats);
1541 if (status)
1542 {
1543 DMESG("rxcommandpackethandle819xusb: It is a command packet\n");
1544 }
1545 else
1546 {
1547 //RT_TRACE(COMP_RECV, DBG_TRACE, ("RxCommandPacketHandle819xUsb: It is not a command packet\n"));
1548 }
1549
1550 //RT_TRACE(COMP_RECV, DBG_TRACE, ("<--- RxCommandPacketHandle819xUsb()\n"));
1551 return status;
1552}
1553
5f53d8ca
JC		 1554void rtl8192_data_hard_stop(struct net_device *dev)
1555{
1556 //FIXME !!
5f53d8ca
JC		 1557}
1558
1559
1560void rtl8192_data_hard_resume(struct net_device *dev)
1561{
1562 // FIXME !!
5f53d8ca
JC		 1563}
1564
1565/* this function TX data frames when the ieee80211 stack requires this.
1566 * It checks also if we need to stop the ieee tx queue, eventually do it
1567 */
1568void rtl8192_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, int rate)
1569{
1570 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1571 int ret;
1572 unsigned long flags;
1573 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1574 u8 queue_index = tcb_desc->queue_index;
1575
1576 /* shall not be referred by command packet */
1577 assert(queue_index != TXCMD_QUEUE);
1578
1579 spin_lock_irqsave(&priv->tx_lock,flags);
1580
1581 memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev));
1582// tcb_desc->RATRIndex = 7;
1583// tcb_desc->bTxDisableRateFallBack = 1;
1584// tcb_desc->bTxUseDriverAssingedRate = 1;
1585 tcb_desc->bTxEnableFwCalcDur = 1;
1586 skb_push(skb, priv->ieee80211->tx_headroom);
1587 ret = priv->ops->rtl819x_tx(dev, skb);
1588
1589 //priv->ieee80211->stats.tx_bytes+=(skb->len - priv->ieee80211->tx_headroom);
1590 //priv->ieee80211->stats.tx_packets++;
1591
1592 spin_unlock_irqrestore(&priv->tx_lock,flags);
1593
1594// return ret;
1595 return;
1596}
1597
1598/* This is a rough attempt to TX a frame
1599 * This is called by the ieee 80211 stack to TX management frames.
1600 * If the ring is full packet are dropped (for data frame the queue
1601 * is stopped before this can happen).
1602 */
1603int rtl8192_hard_start_xmit(struct sk_buff *skb,struct net_device *dev)
1604{
1605 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1606 int ret;
1607 unsigned long flags;
1608 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1609 u8 queue_index = tcb_desc->queue_index;
1610
1611
1612 spin_lock_irqsave(&priv->tx_lock,flags);
1613
1614 memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev));
1615 if(queue_index == TXCMD_QUEUE) {
1616 skb_push(skb, USB_HWDESC_HEADER_LEN);
1617 priv->ops->rtl819x_tx_cmd(dev, skb);
1618 ret = 1;
1619 spin_unlock_irqrestore(&priv->tx_lock,flags);
1620 return ret;
1621 } else {
1622 skb_push(skb, priv->ieee80211->tx_headroom);
1623 ret = priv->ops->rtl819x_tx(dev, skb);
1624 }
1625
1626 spin_unlock_irqrestore(&priv->tx_lock,flags);
1627
1628 return ret;
1629}
1630
1631
1632void rtl8192_try_wake_queue(struct net_device *dev, int pri);
1633
5f53d8ca 1634
5f53d8ca 1635static void rtl8192_tx_isr(struct urb *tx_urb)
5f53d8ca
JC		 1636{
1637 struct sk_buff *skb = (struct sk_buff*)tx_urb->context;
1638 struct net_device *dev = NULL;
1639 struct r8192_priv *priv = NULL;
1640 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1641 u8 queue_index = tcb_desc->queue_index;
1642// bool bToSend0Byte;
1643// u16 BufLen = skb->len;
1644
1645 memcpy(&dev,(struct net_device*)(skb->cb),sizeof(struct net_device*));
1646 priv = ieee80211_priv(dev);
1647
1648 if(tcb_desc->queue_index != TXCMD_QUEUE) {
1649 if(tx_urb->status == 0) {
1650 // dev->trans_start = jiffies;
1651 // As act as station mode, destion shall be unicast address.
1652 //priv->ieee80211->stats.tx_bytes+=(skb->len - priv->ieee80211->tx_headroom);
1653 //priv->ieee80211->stats.tx_packets++;
1654 priv->stats.txoktotal++;
1655 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
1656 priv->stats.txbytesunicast += (skb->len - priv->ieee80211->tx_headroom);
1657 } else {
1658 priv->ieee80211->stats.tx_errors++;
1659 //priv->stats.txmanageerr++;
1660 /* TODO */
1661 }
1662 }
1663
1664 /* free skb and tx_urb */
1665 if(skb != NULL) {
1666 dev_kfree_skb_any(skb);
1667 usb_free_urb(tx_urb);
1668 atomic_dec(&priv->tx_pending[queue_index]);
1669 }
1670
5f53d8ca
JC		 1671 {
1672 //
1673 // Handle HW Beacon:
1674 // We had transfer our beacon frame to host controler at this moment.
1675 //
5f53d8ca
JC		 1676 //
1677 // Caution:
1678 // Handling the wait queue of command packets.
1679 // For Tx command packets, we must not do TCB fragment because it is not handled right now.
1680 // We must cut the packets to match the size of TX_CMD_PKT before we send it.
1681 //
1682 if (queue_index == MGNT_QUEUE){
1683 if (priv->ieee80211->ack_tx_to_ieee){
1684 if (rtl8192_is_tx_queue_empty(dev)){
1685 priv->ieee80211->ack_tx_to_ieee = 0;
1686 ieee80211_ps_tx_ack(priv->ieee80211, 1);
1687 }
1688 }
1689 }
1690 /* Handle MPDU in wait queue. */
1691 if(queue_index != BEACON_QUEUE) {
1692 /* Don't send data frame during scanning.*/
1693 if((skb_queue_len(&priv->ieee80211->skb_waitQ[queue_index]) != 0)&&\
1694 (!(priv->ieee80211->queue_stop))) {
1695 if(NULL != (skb = skb_dequeue(&(priv->ieee80211->skb_waitQ[queue_index]))))
1696 priv->ieee80211->softmac_hard_start_xmit(skb, dev);
1697
1698 return; //modified by david to avoid further processing AMSDU
1699 }
5f53d8ca
JC		 1700 }
1701 }
5f53d8ca
JC		 1702}
1703
1704void rtl8192_beacon_stop(struct net_device *dev)
1705{
1706 u8 msr, msrm, msr2;
1707 struct r8192_priv *priv = ieee80211_priv(dev);
1708
1709 msr = read_nic_byte(dev, MSR);
1710 msrm = msr & MSR_LINK_MASK;
1711 msr2 = msr & ~MSR_LINK_MASK;
1712
1713 if(NIC_8192U == priv->card_8192) {
1714 usb_kill_urb(priv->rx_urb[MAX_RX_URB]);
1715 }
1716 if ((msrm == (MSR_LINK_ADHOC<<MSR_LINK_SHIFT) ||
1717 (msrm == (MSR_LINK_MASTER<<MSR_LINK_SHIFT)))){
1718 write_nic_byte(dev, MSR, msr2 | MSR_LINK_NONE);
1719 write_nic_byte(dev, MSR, msr);
1720 }
1721}
1722
1723void rtl8192_config_rate(struct net_device* dev, u16* rate_config)
1724{
1725 struct r8192_priv *priv = ieee80211_priv(dev);
1726 struct ieee80211_network *net;
1727 u8 i=0, basic_rate = 0;
1728 net = & priv->ieee80211->current_network;
1729
1730 for (i=0; i<net->rates_len; i++)
1731 {
1732 basic_rate = net->rates[i]&0x7f;
1733 switch(basic_rate)
1734 {
1735 case MGN_1M: *rate_config |= RRSR_1M; break;
1736 case MGN_2M: *rate_config |= RRSR_2M; break;
1737 case MGN_5_5M: *rate_config |= RRSR_5_5M; break;
1738 case MGN_11M: *rate_config |= RRSR_11M; break;
1739 case MGN_6M: *rate_config |= RRSR_6M; break;
1740 case MGN_9M: *rate_config |= RRSR_9M; break;
1741 case MGN_12M: *rate_config |= RRSR_12M; break;
1742 case MGN_18M: *rate_config |= RRSR_18M; break;
1743 case MGN_24M: *rate_config |= RRSR_24M; break;
1744 case MGN_36M: *rate_config |= RRSR_36M; break;
1745 case MGN_48M: *rate_config |= RRSR_48M; break;
1746 case MGN_54M: *rate_config |= RRSR_54M; break;
1747 }
1748 }
1749 for (i=0; i<net->rates_ex_len; i++)
1750 {
1751 basic_rate = net->rates_ex[i]&0x7f;
1752 switch(basic_rate)
1753 {
1754 case MGN_1M: *rate_config |= RRSR_1M; break;
1755 case MGN_2M: *rate_config |= RRSR_2M; break;
1756 case MGN_5_5M: *rate_config |= RRSR_5_5M; break;
1757 case MGN_11M: *rate_config |= RRSR_11M; break;
1758 case MGN_6M: *rate_config |= RRSR_6M; break;
1759 case MGN_9M: *rate_config |= RRSR_9M; break;
1760 case MGN_12M: *rate_config |= RRSR_12M; break;
1761 case MGN_18M: *rate_config |= RRSR_18M; break;
1762 case MGN_24M: *rate_config |= RRSR_24M; break;
1763 case MGN_36M: *rate_config |= RRSR_36M; break;
1764 case MGN_48M: *rate_config |= RRSR_48M; break;
1765 case MGN_54M: *rate_config |= RRSR_54M; break;
1766 }
1767 }
1768}
1769
1770
1771#define SHORT_SLOT_TIME 9
1772#define NON_SHORT_SLOT_TIME 20
1773
1774void rtl8192_update_cap(struct net_device* dev, u16 cap)
1775{
1776 //u32 tmp = 0;
1777 struct r8192_priv *priv = ieee80211_priv(dev);
1778 struct ieee80211_network *net = &priv->ieee80211->current_network;
1779 priv->short_preamble = cap & WLAN_CAPABILITY_SHORT_PREAMBLE;
1780
1781 //LZM MOD 090303 HW_VAR_ACK_PREAMBLE
5f53d8ca
JC		 1782 if(0)
1783 {
1784 u8 tmp = 0;
1785 tmp = ((priv->nCur40MhzPrimeSC) << 5);
1786 if (priv->short_preamble)
1787 tmp |= 0x80;
1788 write_nic_byte(dev, RRSR+2, tmp);
1789 }
5f53d8ca
JC		 1790
1791 if (net->mode & (IEEE_G|IEEE_N_24G))
1792 {
1793 u8 slot_time = 0;
1794 if ((cap & WLAN_CAPABILITY_SHORT_SLOT)&&(!priv->ieee80211->pHTInfo->bCurrentRT2RTLongSlotTime))
1795 {//short slot time
1796 slot_time = SHORT_SLOT_TIME;
1797 }
1798 else //long slot time
1799 slot_time = NON_SHORT_SLOT_TIME;
1800 priv->slot_time = slot_time;
1801 write_nic_byte(dev, SLOT_TIME, slot_time);
1802 }
1803
1804}
1805void rtl8192_net_update(struct net_device *dev)
1806{
1807
1808 struct r8192_priv *priv = ieee80211_priv(dev);
1809 struct ieee80211_network *net;
1810 u16 BcnTimeCfg = 0, BcnCW = 6, BcnIFS = 0xf;
1811 u16 rate_config = 0;
1812 net = & priv->ieee80211->current_network;
1813
1814 rtl8192_config_rate(dev, &rate_config);
1815 priv->basic_rate = rate_config &= 0x15f;
1816
1817 write_nic_dword(dev,BSSIDR,((u32*)net->bssid)[0]);
1818 write_nic_word(dev,BSSIDR+4,((u16*)net->bssid)[2]);
1819 //for(i=0;i<ETH_ALEN;i++)
1820 // write_nic_byte(dev,BSSID+i,net->bssid[i]);
1821
1822 rtl8192_update_msr(dev);
1823// rtl8192_update_cap(dev, net->capability);
1824 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
1825 {
1826 write_nic_word(dev, ATIMWND, 2);
1827 write_nic_word(dev, BCN_DMATIME, 1023);
1828 write_nic_word(dev, BCN_INTERVAL, net->beacon_interval);
1829// write_nic_word(dev, BcnIntTime, 100);
1830 write_nic_word(dev, BCN_DRV_EARLY_INT, 1);
1831 write_nic_byte(dev, BCN_ERR_THRESH, 100);
1832 BcnTimeCfg |= (BcnCW<<BCN_TCFG_CW_SHIFT);
1833 // TODO: BcnIFS may required to be changed on ASIC
1834 BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
1835
1836 write_nic_word(dev, BCN_TCFG, BcnTimeCfg);
1837 }
1838
1839
1840
1841}
1842
1843//temporary hw beacon is not used any more.
1844//open it when necessary
1845#if 1
1846void rtl819xusb_beacon_tx(struct net_device *dev,u16 tx_rate)
1847{
5f53d8ca
JC		 1848}
1849#endif
1850inline u8 rtl8192_IsWirelessBMode(u16 rate)
1851{
1852 if( ((rate <= 110) && (rate != 60) && (rate != 90)) || (rate == 220) )
1853 return 1;
1854 else return 0;
1855}
1856
1857u16 N_DBPSOfRate(u16 DataRate);
1858
1859u16 ComputeTxTime(
1860 u16 FrameLength,
1861 u16 DataRate,
1862 u8 bManagementFrame,
1863 u8 bShortPreamble
1864)
1865{
1866 u16 FrameTime;
1867 u16 N_DBPS;
1868 u16 Ceiling;
1869
1870 if( rtl8192_IsWirelessBMode(DataRate) )
1871 {
1872 if( bManagementFrame || !bShortPreamble || DataRate == 10 )
1873 { // long preamble
1874 FrameTime = (u16)(144+48+(FrameLength*8/(DataRate/10)));
1875 }
1876 else
1877 { // Short preamble
1878 FrameTime = (u16)(72+24+(FrameLength*8/(DataRate/10)));
1879 }
1880 if( ( FrameLength*8 % (DataRate/10) ) != 0 ) //Get the Ceilling
1881 FrameTime ++;
1882 } else { //802.11g DSSS-OFDM PLCP length field calculation.
1883 N_DBPS = N_DBPSOfRate(DataRate);
1884 Ceiling = (16 + 8*FrameLength + 6) / N_DBPS
1885 + (((16 + 8*FrameLength + 6) % N_DBPS) ? 1 : 0);
1886 FrameTime = (u16)(16 + 4 + 4*Ceiling + 6);
1887 }
1888 return FrameTime;
1889}
1890
1891u16 N_DBPSOfRate(u16 DataRate)
1892{
1893 u16 N_DBPS = 24;
1894
1895 switch(DataRate)
1896 {
1897 case 60:
1898 N_DBPS = 24;
1899 break;
1900
1901 case 90:
1902 N_DBPS = 36;
1903 break;
1904
1905 case 120:
1906 N_DBPS = 48;
1907 break;
1908
1909 case 180:
1910 N_DBPS = 72;
1911 break;
1912
1913 case 240:
1914 N_DBPS = 96;
1915 break;
1916
1917 case 360:
1918 N_DBPS = 144;
1919 break;
1920
1921 case 480:
1922 N_DBPS = 192;
1923 break;
1924
1925 case 540:
1926 N_DBPS = 216;
1927 break;
1928
1929 default:
1930 break;
1931 }
1932
1933 return N_DBPS;
1934}
1935
1936void rtl819xU_cmd_isr(struct urb *tx_cmd_urb, struct pt_regs *regs)
1937{
5f53d8ca
JC		 1938 usb_free_urb(tx_cmd_urb);
1939}
1940
1941unsigned int txqueue2outpipe(struct r8192_priv* priv,unsigned int tx_queue) {
1942
1943 if(tx_queue >= 9)
1944 {
1945 RT_TRACE(COMP_ERR,"%s():Unknown queue ID!!!\n",__FUNCTION__);
1946 return 0x04;
1947 }
1948 return priv->txqueue_to_outpipemap[tx_queue];
1949}
1950
5f53d8ca
JC		 1951short rtl8192SU_tx_cmd(struct net_device *dev, struct sk_buff *skb)
1952{
1953 struct r8192_priv *priv = ieee80211_priv(dev);
1954 int status;
1955 struct urb *tx_urb;
1956 unsigned int idx_pipe;
1957 tx_desc_cmd_819x_usb *pdesc = (tx_desc_cmd_819x_usb *)skb->data;
1958 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1959 u8 queue_index = tcb_desc->queue_index;
1960 u32 PktSize = 0;
1961
1962 //printk("\n %s::::::::::::::::::::::queue_index = %d\n",__FUNCTION__, queue_index);
1963 atomic_inc(&priv->tx_pending[queue_index]);
1964
5f53d8ca 1965 tx_urb = usb_alloc_urb(0,GFP_ATOMIC);
5f53d8ca
JC		 1966 if(!tx_urb){
1967 dev_kfree_skb(skb);
1968 return -ENOMEM;
1969 }
1970
1971 memset(pdesc, 0, USB_HWDESC_HEADER_LEN);
1972
1973 /* Tx descriptor ought to be set according to the skb->cb */
1974 pdesc->LINIP = tcb_desc->bLastIniPkt;
1975 PktSize = (u16)(skb->len - USB_HWDESC_HEADER_LEN);
1976 pdesc->PktSize = PktSize;
1977 //printk("PKTSize = %d %x\n",pdesc->PktSize,pdesc->PktSize);
1978 //----------------------------------------------------------------------------
1979 // Fill up USB_OUT_CONTEXT.
1980 //----------------------------------------------------------------------------
1981 // Get index to out pipe from specified QueueID.
1982 idx_pipe = txqueue2outpipe(priv,queue_index);
1983 //printk("=============>%s queue_index:%d, outpipe:%d\n", __func__,queue_index,priv->RtOutPipes[idx_pipe]);
1984
5f53d8ca
JC		 1985 usb_fill_bulk_urb(tx_urb,
1986 priv->udev,
1987 usb_sndbulkpipe(priv->udev,priv->RtOutPipes[idx_pipe]),
1988 skb->data,
1989 skb->len,
1990 rtl8192_tx_isr,
1991 skb);
1992
5f53d8ca 1993 status = usb_submit_urb(tx_urb, GFP_ATOMIC);
5f53d8ca
JC		 1994 if (!status){
1995 return 0;
1996 }else{
1997 printk("Error TX CMD URB, error %d",
1998 status);
1999 return -1;
2000 }
2001}
5f53d8ca
JC		 2002
2003/*
2004 * Mapping Software/Hardware descriptor queue id to "Queue Select Field"
2005 * in TxFwInfo data structure
2006 * 2006.10.30 by Emily
2007 *
2008 * \param QUEUEID Software Queue
2009*/
2010u8 MapHwQueueToFirmwareQueue(u8 QueueID)
2011{
2012 u8 QueueSelect = 0x0; //defualt set to
2013
2014 switch(QueueID) {
2015 case BE_QUEUE:
2016 QueueSelect = QSLT_BE; //or QSelect = pTcb->priority;
2017 break;
2018
2019 case BK_QUEUE:
2020 QueueSelect = QSLT_BK; //or QSelect = pTcb->priority;
2021 break;
2022
2023 case VO_QUEUE:
2024 QueueSelect = QSLT_VO; //or QSelect = pTcb->priority;
2025 break;
2026
2027 case VI_QUEUE:
2028 QueueSelect = QSLT_VI; //or QSelect = pTcb->priority;
2029 break;
2030 case MGNT_QUEUE:
2031 QueueSelect = QSLT_MGNT;
2032 break;
2033
2034 case BEACON_QUEUE:
2035 QueueSelect = QSLT_BEACON;
2036 break;
2037
2038 // TODO: 2006.10.30 mark other queue selection until we verify it is OK
2039 // TODO: Remove Assertions
2040//#if (RTL819X_FPGA_VER & RTL819X_FPGA_GUANGAN_070502)
2041 case TXCMD_QUEUE:
2042 QueueSelect = QSLT_CMD;
2043 break;
2044//#endif
2045 case HIGH_QUEUE:
2046 QueueSelect = QSLT_HIGH;
2047 break;
2048
2049 default:
2050 RT_TRACE(COMP_ERR, "TransmitTCB(): Impossible Queue Selection: %d \n", QueueID);
2051 break;
2052 }
2053 return QueueSelect;
2054}
2055
5f53d8ca
JC		 2056u8 MRateToHwRate8190Pci(u8 rate)
2057{
2058 u8 ret = DESC92S_RATE1M;
2059
2060 switch(rate)
2061 {
2062 // CCK and OFDM non-HT rates
2063 case MGN_1M: ret = DESC92S_RATE1M; break;
2064 case MGN_2M: ret = DESC92S_RATE2M; break;
2065 case MGN_5_5M: ret = DESC92S_RATE5_5M; break;
2066 case MGN_11M: ret = DESC92S_RATE11M; break;
2067 case MGN_6M: ret = DESC92S_RATE6M; break;
2068 case MGN_9M: ret = DESC92S_RATE9M; break;
2069 case MGN_12M: ret = DESC92S_RATE12M; break;
2070 case MGN_18M: ret = DESC92S_RATE18M; break;
2071 case MGN_24M: ret = DESC92S_RATE24M; break;
2072 case MGN_36M: ret = DESC92S_RATE36M; break;
2073 case MGN_48M: ret = DESC92S_RATE48M; break;
2074 case MGN_54M: ret = DESC92S_RATE54M; break;
2075
2076 // HT rates since here
2077 case MGN_MCS0: ret = DESC92S_RATEMCS0; break;
2078 case MGN_MCS1: ret = DESC92S_RATEMCS1; break;
2079 case MGN_MCS2: ret = DESC92S_RATEMCS2; break;
2080 case MGN_MCS3: ret = DESC92S_RATEMCS3; break;
2081 case MGN_MCS4: ret = DESC92S_RATEMCS4; break;
2082 case MGN_MCS5: ret = DESC92S_RATEMCS5; break;
2083 case MGN_MCS6: ret = DESC92S_RATEMCS6; break;
2084 case MGN_MCS7: ret = DESC92S_RATEMCS7; break;
2085 case MGN_MCS8: ret = DESC92S_RATEMCS8; break;
2086 case MGN_MCS9: ret = DESC92S_RATEMCS9; break;
2087 case MGN_MCS10: ret = DESC92S_RATEMCS10; break;
2088 case MGN_MCS11: ret = DESC92S_RATEMCS11; break;
2089 case MGN_MCS12: ret = DESC92S_RATEMCS12; break;
2090 case MGN_MCS13: ret = DESC92S_RATEMCS13; break;
2091 case MGN_MCS14: ret = DESC92S_RATEMCS14; break;
2092 case MGN_MCS15: ret = DESC92S_RATEMCS15; break;
2093
2094 // Set the highest SG rate
2095 case MGN_MCS0_SG:
2096 case MGN_MCS1_SG:
2097 case MGN_MCS2_SG:
2098 case MGN_MCS3_SG:
2099 case MGN_MCS4_SG:
2100 case MGN_MCS5_SG:
2101 case MGN_MCS6_SG:
2102 case MGN_MCS7_SG:
2103 case MGN_MCS8_SG:
2104 case MGN_MCS9_SG:
2105 case MGN_MCS10_SG:
2106 case MGN_MCS11_SG:
2107 case MGN_MCS12_SG:
2108 case MGN_MCS13_SG:
2109 case MGN_MCS14_SG:
2110 case MGN_MCS15_SG:
2111 {
2112 ret = DESC92S_RATEMCS15_SG;
2113 break;
2114 }
2115
2116 default: break;
2117 }
2118 return ret;
2119}
5f53d8ca
JC		 2120
2121u8 QueryIsShort(u8 TxHT, u8 TxRate, cb_desc *tcb_desc)
2122{
2123 u8 tmp_Short;
2124
2125 tmp_Short = (TxHT==1)?((tcb_desc->bUseShortGI)?1:0):((tcb_desc->bUseShortPreamble)?1:0);
2126
2127 if(TxHT==1 && TxRate != DESC90_RATEMCS15)
2128 tmp_Short = 0;
2129
2130 return tmp_Short;
2131}
2132
5f53d8ca 2133static void tx_zero_isr(struct urb *tx_urb)
5f53d8ca
JC		 2134{
2135 return;
2136}
2137
2138
5f53d8ca
JC		 2139/*
2140 * The tx procedure is just as following, skb->cb will contain all the following
2141 *information: * priority, morefrag, rate, &dev.
2142 * */
2143 // <Note> Buffer format for 8192S Usb bulk out:
2144//
2145// --------------------------------------------------
2146// | 8192S Usb Tx Desc | 802_11_MAC_header | data |
2147// --------------------------------------------------
2148// | 32 bytes | 24 bytes |0-2318 bytes|
2149// --------------------------------------------------
2150// |<------------ BufferLen ------------------------->|
2151
2152short rtl8192SU_tx(struct net_device *dev, struct sk_buff* skb)
2153{
2154 struct r8192_priv *priv = ieee80211_priv(dev);
2155 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
2156 tx_desc_819x_usb *tx_desc = (tx_desc_819x_usb *)skb->data;
2157 //tx_fwinfo_819x_usb *tx_fwinfo = (tx_fwinfo_819x_usb *)(skb->data + USB_HWDESC_HEADER_LEN);//92su del
2158 struct usb_device *udev = priv->udev;
2159 int pend;
2160 int status;
2161 struct urb *tx_urb = NULL, *tx_urb_zero = NULL;
2162 //int urb_len;
2163 unsigned int idx_pipe;
2164 u16 MPDUOverhead = 0;
2165 //RT_DEBUG_DATA(COMP_SEND, tcb_desc, sizeof(cb_desc));
2166
5f53d8ca
JC		 2167 pend = atomic_read(&priv->tx_pending[tcb_desc->queue_index]);
2168 /* we are locked here so the two atomic_read and inc are executed
2169 * without interleaves * !!! For debug purpose */
2170 if( pend > MAX_TX_URB){
2171 switch (tcb_desc->queue_index) {
2172 case VO_PRIORITY:
2173 priv->stats.txvodrop++;
2174 break;
2175 case VI_PRIORITY:
2176 priv->stats.txvidrop++;
2177 break;
2178 case BE_PRIORITY:
2179 priv->stats.txbedrop++;
2180 break;
2181 default://BK_PRIORITY
2182 priv->stats.txbkdrop++;
2183 break;
2184 }
2185 printk("To discard skb packet!\n");
2186 dev_kfree_skb_any(skb);
2187 return -1;
2188 }
2189
5f53d8ca 2190 tx_urb = usb_alloc_urb(0,GFP_ATOMIC);
5f53d8ca
JC		 2191 if(!tx_urb){
2192 dev_kfree_skb_any(skb);
2193 return -ENOMEM;
2194 }
2195
2196 memset(tx_desc, 0, sizeof(tx_desc_819x_usb));
2197
2198
5f53d8ca 2199 tx_desc->NonQos = (IsQoSDataFrame(skb->data)==TRUE)? 0:1;
5f53d8ca
JC		 2200
2201 /* Fill Tx descriptor */
2202 //memset(tx_fwinfo,0,sizeof(tx_fwinfo_819x_usb));
2203
2204 // This part can just fill to the first descriptor of the frame.
2205 /* DWORD 0 */
2206 tx_desc->TxHT = (tcb_desc->data_rate&0x80)?1:0;
2207
5f53d8ca
JC		 2208
2209 tx_desc->TxRate = MRateToHwRate8190Pci(tcb_desc->data_rate);
2210 //tx_desc->EnableCPUDur = tcb_desc->bTxEnableFwCalcDur;
2211 tx_desc->TxShort = QueryIsShort(tx_desc->TxHT, tx_desc->TxRate, tcb_desc);
2212
2213
2214 // Aggregation related
2215 if(tcb_desc->bAMPDUEnable) {//AMPDU enabled
2216 tx_desc->AllowAggregation = 1;
2217 /* DWORD 1 */
2218 //tx_fwinfo->RxMF = tcb_desc->ampdu_factor;
2219 //tx_fwinfo->RxAMD = tcb_desc->ampdu_density&0x07;//ampdudensity
2220 } else {
2221 tx_desc->AllowAggregation = 0;
2222 /* DWORD 1 */
2223 //tx_fwinfo->RxMF = 0;
2224 //tx_fwinfo->RxAMD = 0;
2225 }
2226
2227 //
2228 // <Roger_Notes> For AMPDU case, we must insert SSN into TX_DESC,
2229 // FW according as this SSN to do necessary packet retry.
2230 // 2008.06.06.
2231 //
2232 {
2233 u8 *pSeq;
2234 u16 Temp;
2235 //pSeq = (u8 *)(VirtualAddress+USB_HWDESC_HEADER_LEN + FRAME_OFFSET_SEQUENCE);
2236 pSeq = (u8 *)(skb->data+USB_HWDESC_HEADER_LEN + 22);
2237 Temp = pSeq[0];
2238 Temp <<= 12;
2239 Temp |= (*(u16 *)pSeq)>>4;
2240 tx_desc->Seq = Temp;
2241 }
2242
2243 /* Protection mode related */
2244 tx_desc->RTSEn = (tcb_desc->bRTSEnable)?1:0;
2245 tx_desc->CTS2Self = (tcb_desc->bCTSEnable)?1:0;
2246 tx_desc->RTSSTBC = (tcb_desc->bRTSSTBC)?1:0;
2247 tx_desc->RTSHT = (tcb_desc->rts_rate&0x80)?1:0;
2248 tx_desc->RTSRate = MRateToHwRate8190Pci((u8)tcb_desc->rts_rate);
2249 tx_desc->RTSSubcarrier = (tx_desc->RTSHT==0)?(tcb_desc->RTSSC):0;
2250 tx_desc->RTSBW = (tx_desc->RTSHT==1)?((tcb_desc->bRTSBW)?1:0):0;
2251 tx_desc->RTSShort = (tx_desc->RTSHT==0)?(tcb_desc->bRTSUseShortPreamble?1:0):\
2252 (tcb_desc->bRTSUseShortGI?1:0);
2253 //LZM 090219
2254 tx_desc->DisRTSFB = 0;
2255 tx_desc->RTSRateFBLmt = 0xf;
2256
2257 // <Roger_EXP> 2008.09.22. We disable RTS rate fallback temporarily.
2258 //tx_desc->DisRTSFB = 0x01;
2259
2260 /* Set Bandwidth and sub-channel settings. */
2261 if(priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40)
2262 {
2263 if(tcb_desc->bPacketBW) {
2264 tx_desc->TxBandwidth = 1;
2265 tx_desc->TxSubCarrier = 0; //By SD3's Jerry suggestion, use duplicated mode
2266 } else {
2267 tx_desc->TxBandwidth = 0;
2268 tx_desc->TxSubCarrier = priv->nCur40MhzPrimeSC;
2269 }
2270 } else {
2271 tx_desc->TxBandwidth = 0;
2272 tx_desc->TxSubCarrier = 0;
2273 }
2274
5f53d8ca
JC		 2275
2276 //memset(tx_desc, 0, sizeof(tx_desc_819x_usb));
2277 /* DWORD 0 */
2278 tx_desc->LINIP = 0;
2279 //tx_desc->CmdInit = 1; //92su del
2280 tx_desc->Offset = USB_HWDESC_HEADER_LEN;
2281
5f53d8ca
JC		 2282 {
2283 tx_desc->PktSize = (skb->len - USB_HWDESC_HEADER_LEN) & 0xffff;
2284 }
2285
2286 /*DWORD 1*/
2287 //tx_desc->SecCAMID= 0;//92su del
2288 tx_desc->RaBRSRID= tcb_desc->RATRIndex;
2289//#ifdef RTL8192S_PREPARE_FOR_NORMAL_RELEASE
5f53d8ca 2290
5f53d8ca
JC		 2291 {
2292 MPDUOverhead = 0;
2293 //tx_desc->NoEnc = 1;//92su del
2294 }
35c1b462 2295
5f53d8ca 2296 tx_desc->SecType = 0x0;
35c1b462 2297
5f53d8ca
JC		 2298 if (tcb_desc->bHwSec)
2299 {
2300 switch (priv->ieee80211->pairwise_key_type)
2301 {
2302 case KEY_TYPE_WEP40:
2303 case KEY_TYPE_WEP104:
2304 tx_desc->SecType = 0x1;
2305 //tx_desc->NoEnc = 0;//92su del
2306 break;
2307 case KEY_TYPE_TKIP:
2308 tx_desc->SecType = 0x2;
2309 //tx_desc->NoEnc = 0;//92su del
2310 break;
2311 case KEY_TYPE_CCMP:
2312 tx_desc->SecType = 0x3;
2313 //tx_desc->NoEnc = 0;//92su del
2314 break;
2315 case KEY_TYPE_NA:
2316 tx_desc->SecType = 0x0;
2317 //tx_desc->NoEnc = 1;//92su del
2318 break;
2319 default:
2320 tx_desc->SecType = 0x0;
2321 //tx_desc->NoEnc = 1;//92su del
2322 break;
2323 }
2324 }
2325
2326 //tx_desc->TxFWInfoSize = sizeof(tx_fwinfo_819x_usb);//92su del
2327
2328
2329 tx_desc->USERATE = tcb_desc->bTxUseDriverAssingedRate;
2330 tx_desc->DISFB = tcb_desc->bTxDisableRateFallBack;
2331 tx_desc->DataRateFBLmt = 0x1F;// Alwasy enable all rate fallback range
2332
2333 tx_desc->QueueSelect = MapHwQueueToFirmwareQueue(tcb_desc->queue_index);
2334
2335
2336 /* Fill fields that are required to be initialized in all of the descriptors */
2337 //DWORD 0
5f53d8ca
JC		 2338 tx_desc->FirstSeg = 1;
2339 tx_desc->LastSeg = 1;
5f53d8ca
JC		 2340 tx_desc->OWN = 1;
2341
5f53d8ca
JC		 2342 {
2343 //DWORD 2
2344 //tx_desc->TxBufferSize = (u32)(skb->len - USB_HWDESC_HEADER_LEN);
2345 tx_desc->TxBufferSize = (u32)(skb->len);//92su mod FIXLZM
2346 }
2347
5f53d8ca
JC		 2348 /* Get index to out pipe from specified QueueID */
2349 idx_pipe = txqueue2outpipe(priv,tcb_desc->queue_index);
2350 //printk("=============>%s queue_index:%d, outpipe:%d\n", __func__,tcb_desc->queue_index,priv->RtOutPipes[idx_pipe]);
2351
2352 //RT_DEBUG_DATA(COMP_SEND,tx_fwinfo,sizeof(tx_fwinfo_819x_usb));
2353 //RT_DEBUG_DATA(COMP_SEND,tx_desc,sizeof(tx_desc_819x_usb));
2354
2355 /* To submit bulk urb */
2356 usb_fill_bulk_urb(tx_urb,
2357 udev,
2358 usb_sndbulkpipe(udev,priv->RtOutPipes[idx_pipe]),
2359 skb->data,
2360 skb->len, rtl8192_tx_isr, skb);
2361
5f53d8ca 2362 status = usb_submit_urb(tx_urb, GFP_ATOMIC);
29a1fbc8
FS		 2363 if (!status) {
2364 /*
2365 * we need to send 0 byte packet whenever 512N bytes/64N(HIGN SPEED/NORMAL SPEED) bytes packet has been transmitted.
2366 * Otherwise, it will be halt to wait for another packet. WB. 2008.08.27
2367 */
5f53d8ca
JC		 2368 bool bSend0Byte = false;
2369 u8 zero = 0;
29a1fbc8 2370 if(udev->speed == USB_SPEED_HIGH) {
5f53d8ca
JC		 2371 if (skb->len > 0 && skb->len % 512 == 0)
2372 bSend0Byte = true;
2373 }
29a1fbc8 2374 else {
5f53d8ca
JC		 2375 if (skb->len > 0 && skb->len % 64 == 0)
2376 bSend0Byte = true;
2377 }
29a1fbc8 2378 if (bSend0Byte) {
5f53d8ca 2379 tx_urb_zero = usb_alloc_urb(0,GFP_ATOMIC);
29a1fbc8 2380 if(!tx_urb_zero) {
5f53d8ca
JC		 2381 RT_TRACE(COMP_ERR, "can't alloc urb for zero byte\n");
2382 return -ENOMEM;
2383 }
2384 usb_fill_bulk_urb(tx_urb_zero,udev,
2385 usb_sndbulkpipe(udev,idx_pipe), &zero,
2386 0, tx_zero_isr, dev);
5f53d8ca 2387 status = usb_submit_urb(tx_urb_zero, GFP_ATOMIC);
29a1fbc8
FS		 2388 switch (status) {
2389 case 0:
2390 break;
2391 case -ECONNRESET:
2392 case -ENOENT:
2393 case -ESHUTDOWN:
2394 break;
2395 default:
2396 RT_TRACE(COMP_ERR, "Error TX URB for zero byte %d, error %d",
2397 atomic_read(&priv->tx_pending[tcb_desc->queue_index]), status);
2398 return -1;
5f53d8ca 2399 }
5f53d8ca
JC		 2400 }
2401 dev->trans_start = jiffies;
2402 atomic_inc(&priv->tx_pending[tcb_desc->queue_index]);
2403 return 0;
29a1fbc8 2404 } else {
5f53d8ca
JC		 2405 RT_TRACE(COMP_ERR, "Error TX URB %d, error %d", atomic_read(&priv->tx_pending[tcb_desc->queue_index]),
2406 status);
2407 return -1;
2408 }
2409}
5f53d8ca 2410
35c1b462 2411void rtl8192SU_net_update(struct net_device *dev)
5f53d8ca
JC		 2412{
2413
2414 struct r8192_priv *priv = ieee80211_priv(dev);
2415 struct ieee80211_device* ieee = priv->ieee80211;
2416 struct ieee80211_network *net = &priv->ieee80211->current_network;
2417 //u16 BcnTimeCfg = 0, BcnCW = 6, BcnIFS = 0xf;
2418 u16 rate_config = 0;
2419 u32 regTmp = 0;
2420 u8 rateIndex = 0;
2421 u8 retrylimit = 0x30;
2422 u16 cap = net->capability;
2423
2424 priv->short_preamble = cap & WLAN_CAPABILITY_SHORT_PREAMBLE;
2425
2426//HW_VAR_BASIC_RATE
2427 //update Basic rate: RR, BRSR
2428 rtl8192_config_rate(dev, &rate_config); //HalSetBrateCfg
2429
5f53d8ca 2430 priv->basic_rate = rate_config = rate_config & 0x15f;
5f53d8ca
JC		 2431
2432 // Set RRSR rate table.
2433 write_nic_byte(dev, RRSR, rate_config&0xff);
2434 write_nic_byte(dev, RRSR+1, (rate_config>>8)&0xff);
2435
2436 // Set RTS initial rate
2437 while(rate_config > 0x1)
2438 {
2439 rate_config = (rate_config>> 1);
2440 rateIndex++;
2441 }
2442 write_nic_byte(dev, INIRTSMCS_SEL, rateIndex);
2443//HW_VAR_BASIC_RATE
2444
2445 //set ack preample
2446 regTmp = (priv->nCur40MhzPrimeSC) << 5;
2447 if (priv->short_preamble)
2448 regTmp |= 0x80;
2449 write_nic_byte(dev, RRSR+2, regTmp);
2450
2451 write_nic_dword(dev,BSSIDR,((u32*)net->bssid)[0]);
2452 write_nic_word(dev,BSSIDR+4,((u16*)net->bssid)[2]);
2453
2454 write_nic_word(dev, BCN_INTERVAL, net->beacon_interval);
2455 //2008.10.24 added by tynli for beacon changed.
2456 PHY_SetBeaconHwReg( dev, net->beacon_interval);
2457
2458 rtl8192_update_cap(dev, cap);
2459
2460 if (ieee->iw_mode == IW_MODE_ADHOC){
2461 retrylimit = 7;
2462 //we should enable ibss interrupt here, but disable it temporarily
2463 if (0){
2464 priv->irq_mask |= (IMR_BcnInt | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
2465 //rtl8192_irq_disable(dev);
2466 //rtl8192_irq_enable(dev);
2467 }
2468 }
2469 else{
2470 if (0){
2471 priv->irq_mask &= ~(IMR_BcnInt | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
2472 //rtl8192_irq_disable(dev);
2473 //rtl8192_irq_enable(dev);
2474 }
2475 }
2476
2477 priv->ShortRetryLimit = priv->LongRetryLimit = retrylimit;
2478
2479 write_nic_word(dev, RETRY_LIMIT,
2480 retrylimit << RETRY_LIMIT_SHORT_SHIFT | \
2481 retrylimit << RETRY_LIMIT_LONG_SHIFT);
2482}
2483
2484void rtl8192SU_update_ratr_table(struct net_device* dev)
2485{
2486 struct r8192_priv* priv = ieee80211_priv(dev);
2487 struct ieee80211_device* ieee = priv->ieee80211;
2488 u8* pMcsRate = ieee->dot11HTOperationalRateSet;
2489 //struct ieee80211_network *net = &ieee->current_network;
2490 u32 ratr_value = 0;
2491
2492 u8 rate_index = 0;
2493 int WirelessMode = ieee->mode;
2494 u8 MimoPs = ieee->pHTInfo->PeerMimoPs;
2495
2496 u8 bNMode = 0;
2497
2498 rtl8192_config_rate(dev, (u16*)(&ratr_value));
2499 ratr_value |= (*(u16*)(pMcsRate)) << 12;
2500
2501 //switch (ieee->mode)
2502 switch (WirelessMode)
2503 {
2504 case IEEE_A:
2505 ratr_value &= 0x00000FF0;
2506 break;
2507 case IEEE_B:
2508 ratr_value &= 0x0000000D;
2509 break;
2510 case IEEE_G:
2511 ratr_value &= 0x00000FF5;
2512 break;
2513 case IEEE_N_24G:
2514 case IEEE_N_5G:
2515 {
2516 bNMode = 1;
2517
2518 if (MimoPs == 0) //MIMO_PS_STATIC
2519 {
2520 ratr_value &= 0x0007F005;
2521 }
2522 else
2523 { // MCS rate only => for 11N mode.
2524 u32 ratr_mask;
2525
2526 // 1T2R or 1T1R, Spatial Stream 2 should be disabled
2527 if ( priv->rf_type == RF_1T2R ||
2528 priv->rf_type == RF_1T1R ||
2529 (ieee->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_TX_2SS) )
2530 ratr_mask = 0x000ff005;
2531 else
2532 ratr_mask = 0x0f0ff005;
2533
2534 if((ieee->pHTInfo->bCurTxBW40MHz) &&
2535 !(ieee->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_TX_40_MHZ))
2536 ratr_mask |= 0x00000010; // Set 6MBps
2537
2538 // Select rates for rate adaptive mechanism.
2539 ratr_value &= ratr_mask;
2540 }
2541 }
2542 break;
2543 default:
2544 if(0)
2545 {
2546 if(priv->rf_type == RF_1T2R) // 1T2R, Spatial Stream 2 should be disabled
2547 {
2548 ratr_value &= 0x000ff0f5;
2549 }
2550 else
2551 {
2552 ratr_value &= 0x0f0ff0f5;
2553 }
2554 }
2555 //printk("====>%s(), mode is not correct:%x\n", __FUNCTION__, ieee->mode);
2556 break;
2557 }
2558
5f53d8ca 2559 ratr_value &= 0x0FFFFFFF;
5f53d8ca
JC		 2560
2561 // Get MAX MCS available.
2562 if ( (bNMode && ((ieee->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_SHORT_GI)==0)) &&
2563 ((ieee->pHTInfo->bCurBW40MHz && ieee->pHTInfo->bCurShortGI40MHz) ||
2564 (!ieee->pHTInfo->bCurBW40MHz && ieee->pHTInfo->bCurShortGI20MHz)))
2565 {
2566 u8 shortGI_rate = 0;
2567 u32 tmp_ratr_value = 0;
2568 ratr_value |= 0x10000000;//???
2569 tmp_ratr_value = (ratr_value>>12);
2570 for(shortGI_rate=15; shortGI_rate>0; shortGI_rate--)
2571 {
2572 if((1<<shortGI_rate) & tmp_ratr_value)
2573 break;
2574 }
2575 shortGI_rate = (shortGI_rate<<12)|(shortGI_rate<<8)|(shortGI_rate<<4)|(shortGI_rate);
2576 write_nic_byte(dev, SG_RATE, shortGI_rate);
2577 //printk("==>SG_RATE:%x\n", read_nic_byte(dev, SG_RATE));
2578 }
2579 write_nic_dword(dev, ARFR0+rate_index*4, ratr_value);
2580 printk("=============>ARFR0+rate_index*4:%#x\n", ratr_value);
2581
2582 //2 UFWP
2583 if (ratr_value & 0xfffff000){
2584 //printk("===>set to N mode\n");
2585 HalSetFwCmd8192S(dev, FW_CMD_RA_REFRESH_N);
2586 }
2587 else {
2588 //printk("===>set to B/G mode\n");
2589 HalSetFwCmd8192S(dev, FW_CMD_RA_REFRESH_BG);
2590 }
2591}
2592
2593void rtl8192SU_link_change(struct net_device *dev)
2594{
2595 struct r8192_priv *priv = ieee80211_priv(dev);
8e399b03 2596 struct ieee80211_device *ieee = priv->ieee80211;
5f53d8ca
JC		 2597 u32 reg = 0;
2598
5f53d8ca 2599 reg = read_nic_dword(dev, RCR);
8e399b03 2600 if (ieee->state == IEEE80211_LINKED) {
5f53d8ca
JC		 2601 rtl8192SU_net_update(dev);
2602 rtl8192SU_update_ratr_table(dev);
2603 ieee->SetFwCmdHandler(dev, FW_CMD_HIGH_PWR_ENABLE);
2604 priv->ReceiveConfig = reg |= RCR_CBSSID;
2605
8e399b03 2606 } else
5f53d8ca 2607 priv->ReceiveConfig = reg &= ~RCR_CBSSID;
5f53d8ca
JC		 2608 write_nic_dword(dev, RCR, reg);
2609 rtl8192_update_msr(dev);
5f53d8ca 2610}
5f53d8ca
JC		 2611
2612static struct ieee80211_qos_parameters def_qos_parameters = {
2613 {3,3,3,3},/* cw_min */
2614 {7,7,7,7},/* cw_max */
2615 {2,2,2,2},/* aifs */
2616 {0,0,0,0},/* flags */
2617 {0,0,0,0} /* tx_op_limit */
2618};
2619
2620
5f53d8ca
JC		 2621void rtl8192_update_beacon(struct work_struct * work)
2622{
2623 struct r8192_priv *priv = container_of(work, struct r8192_priv, update_beacon_wq.work);
2624 struct net_device *dev = priv->ieee80211->dev;
5f53d8ca
JC		 2625 struct ieee80211_device* ieee = priv->ieee80211;
2626 struct ieee80211_network* net = &ieee->current_network;
2627
2628 if (ieee->pHTInfo->bCurrentHTSupport)
2629 HTUpdateSelfAndPeerSetting(ieee, net);
2630 ieee->pHTInfo->bCurrentRT2RTLongSlotTime = net->bssht.bdRT2RTLongSlotTime;
2631 // Joseph test for turbo mode with AP
2632 ieee->pHTInfo->RT2RT_HT_Mode = net->bssht.RT2RT_HT_Mode;
2633 rtl8192_update_cap(dev, net->capability);
2634}
2635/*
2636* background support to run QoS activate functionality
2637*/
2638int WDCAPARA_ADD[] = {EDCAPARA_BE,EDCAPARA_BK,EDCAPARA_VI,EDCAPARA_VO};
1ec9e48d 2639
5f53d8ca
JC		 2640void rtl8192_qos_activate(struct work_struct * work)
2641{
2642 struct r8192_priv *priv = container_of(work, struct r8192_priv, qos_activate);
2643 struct net_device *dev = priv->ieee80211->dev;
5f53d8ca
JC		 2644 struct ieee80211_qos_parameters *qos_parameters = &priv->ieee80211->current_network.qos_data.parameters;
2645 u8 mode = priv->ieee80211->current_network.mode;
2646 //u32 size = sizeof(struct ieee80211_qos_parameters);
2647 u8 u1bAIFS;
2648 u32 u4bAcParam;
2649 int i;
2650
2651 if (priv == NULL)
2652 return;
2653
5f53d8ca 2654 mutex_lock(&priv->mutex);
1ec9e48d 2655
5f53d8ca
JC		 2656 if(priv->ieee80211->state != IEEE80211_LINKED)
2657 goto success;
2658 RT_TRACE(COMP_QOS,"qos active process with associate response received\n");
2659 /* It better set slot time at first */
2660 /* For we just support b/g mode at present, let the slot time at 9/20 selection */
2661 /* update the ac parameter to related registers */
2662 for(i = 0; i < QOS_QUEUE_NUM; i++) {
2663 //Mode G/A: slotTimeTimer = 9; Mode B: 20
2664 u1bAIFS = qos_parameters->aifs[i] * ((mode&(IEEE_G|IEEE_N_24G)) ?9:20) + aSifsTime;
2665 u4bAcParam = ((((u32)(qos_parameters->tx_op_limit[i]))<< AC_PARAM_TXOP_LIMIT_OFFSET)|
2666 (((u32)(qos_parameters->cw_max[i]))<< AC_PARAM_ECW_MAX_OFFSET)|
2667 (((u32)(qos_parameters->cw_min[i]))<< AC_PARAM_ECW_MIN_OFFSET)|
2668 ((u32)u1bAIFS << AC_PARAM_AIFS_OFFSET));
2669
2670 write_nic_dword(dev, WDCAPARA_ADD[i], u4bAcParam);
2671 //write_nic_dword(dev, WDCAPARA_ADD[i], 0x005e4322);
2672 }
2673
2674success:
5f53d8ca 2675 mutex_unlock(&priv->mutex);
5f53d8ca
JC		 2676}
2677
2678static int rtl8192_qos_handle_probe_response(struct r8192_priv *priv,
2679 int active_network,
2680 struct ieee80211_network *network)
2681{
2682 int ret = 0;
2683 u32 size = sizeof(struct ieee80211_qos_parameters);
2684
2685 if(priv->ieee80211->state !=IEEE80211_LINKED)
2686 return ret;
2687
2688 if ((priv->ieee80211->iw_mode != IW_MODE_INFRA))
2689 return ret;
2690
2691 if (network->flags & NETWORK_HAS_QOS_MASK) {
2692 if (active_network &&
2693 (network->flags & NETWORK_HAS_QOS_PARAMETERS))
2694 network->qos_data.active = network->qos_data.supported;
2695
2696 if ((network->qos_data.active == 1) && (active_network == 1) &&
2697 (network->flags & NETWORK_HAS_QOS_PARAMETERS) &&
2698 (network->qos_data.old_param_count !=
2699 network->qos_data.param_count)) {
2700 network->qos_data.old_param_count =
2701 network->qos_data.param_count;
5f53d8ca 2702 queue_work(priv->priv_wq, &priv->qos_activate);
5f53d8ca
JC		 2703 RT_TRACE (COMP_QOS, "QoS parameters change call "
2704 "qos_activate\n");
2705 }
2706 } else {
2707 memcpy(&priv->ieee80211->current_network.qos_data.parameters,\
2708 &def_qos_parameters, size);
2709
2710 if ((network->qos_data.active == 1) && (active_network == 1)) {
5f53d8ca 2711 queue_work(priv->priv_wq, &priv->qos_activate);
5f53d8ca
JC		 2712 RT_TRACE(COMP_QOS, "QoS was disabled call qos_activate \n");
2713 }
2714 network->qos_data.active = 0;
2715 network->qos_data.supported = 0;
2716 }
2717
2718 return 0;
2719}
2720
2721/* handle manage frame frame beacon and probe response */
2722static int rtl8192_handle_beacon(struct net_device * dev,
f59d0127
BZ		 2723 struct ieee80211_probe_response *beacon,
2724 struct ieee80211_network *network)
5f53d8ca
JC		 2725{
2726 struct r8192_priv *priv = ieee80211_priv(dev);
2727
2728 rtl8192_qos_handle_probe_response(priv,1,network);
5f53d8ca 2729 queue_delayed_work(priv->priv_wq, &priv->update_beacon_wq, 0);
5f53d8ca 2730
5f53d8ca
JC		 2731 return 0;
2732
2733}
2734
2735/*
2736* handling the beaconing responses. if we get different QoS setting
2737* off the network from the associated setting, adjust the QoS
2738* setting
2739*/
2740static int rtl8192_qos_association_resp(struct r8192_priv *priv,
2741 struct ieee80211_network *network)
2742{
2743 int ret = 0;
2744 unsigned long flags;
2745 u32 size = sizeof(struct ieee80211_qos_parameters);
2746 int set_qos_param = 0;
2747
2748 if ((priv == NULL) || (network == NULL))
2749 return ret;
2750
2751 if(priv->ieee80211->state !=IEEE80211_LINKED)
2752 return ret;
2753
2754 if ((priv->ieee80211->iw_mode != IW_MODE_INFRA))
2755 return ret;
2756
2757 spin_lock_irqsave(&priv->ieee80211->lock, flags);
2758 if(network->flags & NETWORK_HAS_QOS_PARAMETERS) {
2759 memcpy(&priv->ieee80211->current_network.qos_data.parameters,\
2760 &network->qos_data.parameters,\
2761 sizeof(struct ieee80211_qos_parameters));
2762 priv->ieee80211->current_network.qos_data.active = 1;
5f53d8ca
JC		 2763 {
2764 set_qos_param = 1;
2765 /* update qos parameter for current network */
2766 priv->ieee80211->current_network.qos_data.old_param_count = \
2767 priv->ieee80211->current_network.qos_data.param_count;
2768 priv->ieee80211->current_network.qos_data.param_count = \
2769 network->qos_data.param_count;
2770 }
2771 } else {
2772 memcpy(&priv->ieee80211->current_network.qos_data.parameters,\
2773 &def_qos_parameters, size);
2774 priv->ieee80211->current_network.qos_data.active = 0;
2775 priv->ieee80211->current_network.qos_data.supported = 0;
2776 set_qos_param = 1;
2777 }
2778
2779 spin_unlock_irqrestore(&priv->ieee80211->lock, flags);
2780
2781 RT_TRACE(COMP_QOS, "%s: network->flags = %d,%d\n",__FUNCTION__,network->flags ,priv->ieee80211->current_network.qos_data.active);
2782 if (set_qos_param == 1)
5f53d8ca 2783 queue_work(priv->priv_wq, &priv->qos_activate);
5f53d8ca
JC		 2784
2785 return ret;
2786}
2787
2788
2789static int rtl8192_handle_assoc_response(struct net_device *dev,
2790 struct ieee80211_assoc_response_frame *resp,
2791 struct ieee80211_network *network)
2792{
2793 struct r8192_priv *priv = ieee80211_priv(dev);
2794 rtl8192_qos_association_resp(priv, network);
2795 return 0;
2796}
2797
2798
2799void rtl8192_update_ratr_table(struct net_device* dev)
2800 // POCTET_STRING posLegacyRate,
2801 // u8* pMcsRate)
2802 // PRT_WLAN_STA pEntry)
2803{
2804 struct r8192_priv* priv = ieee80211_priv(dev);
2805 struct ieee80211_device* ieee = priv->ieee80211;
2806 u8* pMcsRate = ieee->dot11HTOperationalRateSet;
2807 //struct ieee80211_network *net = &ieee->current_network;
2808 u32 ratr_value = 0;
2809 u8 rate_index = 0;
2810 rtl8192_config_rate(dev, (u16*)(&ratr_value));
2811 ratr_value |= (*(u16*)(pMcsRate)) << 12;
2812// switch (net->mode)
2813 switch (ieee->mode)
2814 {
2815 case IEEE_A:
2816 ratr_value &= 0x00000FF0;
2817 break;
2818 case IEEE_B:
2819 ratr_value &= 0x0000000F;
2820 break;
2821 case IEEE_G:
2822 ratr_value &= 0x00000FF7;
2823 break;
2824 case IEEE_N_24G:
2825 case IEEE_N_5G:
2826 if (ieee->pHTInfo->PeerMimoPs == 0) //MIMO_PS_STATIC
2827 ratr_value &= 0x0007F007;
2828 else{
2829 if (priv->rf_type == RF_1T2R)
2830 ratr_value &= 0x000FF007;
2831 else
2832 ratr_value &= 0x0F81F007;
2833 }
2834 break;
2835 default:
2836 break;
2837 }
2838 ratr_value &= 0x0FFFFFFF;
2839 if(ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI40MHz){
2840 ratr_value |= 0x80000000;
2841 }else if(!ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI20MHz){
2842 ratr_value |= 0x80000000;
2843 }
2844 write_nic_dword(dev, RATR0+rate_index*4, ratr_value);
2845 write_nic_byte(dev, UFWP, 1);
2846}
2847
2848static u8 ccmp_ie[4] = {0x00,0x50,0xf2,0x04};
2849static u8 ccmp_rsn_ie[4] = {0x00, 0x0f, 0xac, 0x04};
2850bool GetNmodeSupportBySecCfg8192(struct net_device*dev)
2851{
2852#if 1
2853 struct r8192_priv* priv = ieee80211_priv(dev);
2854 struct ieee80211_device* ieee = priv->ieee80211;
2855 struct ieee80211_network * network = &ieee->current_network;
2856 int wpa_ie_len= ieee->wpa_ie_len;
2857 struct ieee80211_crypt_data* crypt;
2858 int encrypt;
5f53d8ca 2859 return TRUE;
5f53d8ca
JC		 2860
2861 crypt = ieee->crypt[ieee->tx_keyidx];
2862 //we use connecting AP's capability instead of only security config on our driver to distinguish whether it should use N mode or G mode
2863 encrypt = (network->capability & WLAN_CAPABILITY_PRIVACY) || (ieee->host_encrypt && crypt && crypt->ops && (0 == strcmp(crypt->ops->name,"WEP")));
2864
2865 /* simply judge */
2866 if(encrypt && (wpa_ie_len == 0)) {
2867 /* wep encryption, no N mode setting */
2868 return false;
2869// } else if((wpa_ie_len != 0)&&(memcmp(&(ieee->wpa_ie[14]),ccmp_ie,4))) {
2870 } else if((wpa_ie_len != 0)) {
2871 /* parse pairwise key type */
2872 //if((pairwisekey = WEP40)||(pairwisekey = WEP104)||(pairwisekey = TKIP))
2873 if (((ieee->wpa_ie[0] == 0xdd) && (!memcmp(&(ieee->wpa_ie[14]),ccmp_ie,4))) || ((ieee->wpa_ie[0] == 0x30) && (!memcmp(&ieee->wpa_ie[10],ccmp_rsn_ie, 4))))
2874 return true;
2875 else
2876 return false;
2877 } else {
2878 return true;
2879 }
2880
5f53d8ca
JC		 2881 return true;
2882#endif
2883}
2884
2885bool GetHalfNmodeSupportByAPs819xUsb(struct net_device* dev)
2886{
2887 bool Reval;
2888 struct r8192_priv* priv = ieee80211_priv(dev);
2889 struct ieee80211_device* ieee = priv->ieee80211;
2890
2891// Added by Roger, 2008.08.29.
5f53d8ca 2892 return false;
5f53d8ca
JC		 2893
2894 if(ieee->bHalfWirelessN24GMode == true)
2895 Reval = true;
2896 else
2897 Reval = false;
2898
2899 return Reval;
2900}
2901
2902void rtl8192_refresh_supportrate(struct r8192_priv* priv)
2903{
2904 struct ieee80211_device* ieee = priv->ieee80211;
2905 //we donot consider set support rate for ABG mode, only HT MCS rate is set here.
2906 if (ieee->mode == WIRELESS_MODE_N_24G || ieee->mode == WIRELESS_MODE_N_5G)
2907 {
2908 memcpy(ieee->Regdot11HTOperationalRateSet, ieee->RegHTSuppRateSet, 16);
2909 //RT_DEBUG_DATA(COMP_INIT, ieee->RegHTSuppRateSet, 16);
2910 //RT_DEBUG_DATA(COMP_INIT, ieee->Regdot11HTOperationalRateSet, 16);
2911 }
2912 else
2913 memset(ieee->Regdot11HTOperationalRateSet, 0, 16);
2914 return;
2915}
2916
2917u8 rtl8192_getSupportedWireleeMode(struct net_device*dev)
2918{
2919 struct r8192_priv *priv = ieee80211_priv(dev);
2920 u8 ret = 0;
2921 switch(priv->rf_chip)
2922 {
2923 case RF_8225:
2924 case RF_8256:
2925 case RF_PSEUDO_11N:
2926 case RF_6052:
2927 ret = (WIRELESS_MODE_N_24G|WIRELESS_MODE_G|WIRELESS_MODE_B);
2928 break;
2929 case RF_8258:
2930 ret = (WIRELESS_MODE_A|WIRELESS_MODE_N_5G);
2931 break;
2932 default:
2933 ret = WIRELESS_MODE_B;
2934 break;
2935 }
2936 return ret;
2937}
2938void rtl8192_SetWirelessMode(struct net_device* dev, u8 wireless_mode)
2939{
2940 struct r8192_priv *priv = ieee80211_priv(dev);
2941 u8 bSupportMode = rtl8192_getSupportedWireleeMode(dev);
2942
2943#if 1
2944 if ((wireless_mode == WIRELESS_MODE_AUTO) || ((wireless_mode&bSupportMode)==0))
2945 {
2946 if(bSupportMode & WIRELESS_MODE_N_24G)
2947 {
2948 wireless_mode = WIRELESS_MODE_N_24G;
2949 }
2950 else if(bSupportMode & WIRELESS_MODE_N_5G)
2951 {
2952 wireless_mode = WIRELESS_MODE_N_5G;
2953 }
2954 else if((bSupportMode & WIRELESS_MODE_A))
2955 {
2956 wireless_mode = WIRELESS_MODE_A;
2957 }
2958 else if((bSupportMode & WIRELESS_MODE_G))
2959 {
2960 wireless_mode = WIRELESS_MODE_G;
2961 }
2962 else if((bSupportMode & WIRELESS_MODE_B))
2963 {
2964 wireless_mode = WIRELESS_MODE_B;
2965 }
2966 else{
2967 RT_TRACE(COMP_ERR, "%s(), No valid wireless mode supported, SupportedWirelessMode(%x)!!!\n", __FUNCTION__,bSupportMode);
2968 wireless_mode = WIRELESS_MODE_B;
2969 }
2970 }
39cfb97b 2971#ifdef TO_DO_LIST //// TODO: this function doesn't work well at this time, we should wait for FPGA
5f53d8ca
JC		 2972 ActUpdateChannelAccessSetting( pAdapter, pHalData->CurrentWirelessMode, &pAdapter->MgntInfo.Info8185.ChannelAccessSetting );
2973#endif
5f53d8ca
JC		 2974 //LZM 090306 usb crash here, mark it temp
2975 //write_nic_word(dev, SIFS_OFDM, 0x0e0e);
5f53d8ca
JC		 2976 priv->ieee80211->mode = wireless_mode;
2977
2978 if ((wireless_mode == WIRELESS_MODE_N_24G) || (wireless_mode == WIRELESS_MODE_N_5G))
2979 priv->ieee80211->pHTInfo->bEnableHT = 1;
2980 else
2981 priv->ieee80211->pHTInfo->bEnableHT = 0;
2982 RT_TRACE(COMP_INIT, "Current Wireless Mode is %x\n", wireless_mode);
2983 rtl8192_refresh_supportrate(priv);
2984#endif
2985
2986}
2987
2988
2989short rtl8192_is_tx_queue_empty(struct net_device *dev)
2990{
2991 int i=0;
2992 struct r8192_priv *priv = ieee80211_priv(dev);
2993 //struct ieee80211_device* ieee = priv->ieee80211;
2994 for (i=0; i<=MGNT_QUEUE; i++)
2995 {
2996 if ((i== TXCMD_QUEUE) || (i == HCCA_QUEUE) )
2997 continue;
2998 if (atomic_read(&priv->tx_pending[i]))
2999 {
3000 printk("===>tx queue is not empty:%d, %d\n", i, atomic_read(&priv->tx_pending[i]));
3001 return 0;
3002 }
3003 }
3004 return 1;
3005}
35c1b462 3006
5f53d8ca
JC		 3007void rtl8192_hw_sleep_down(struct net_device *dev)
3008{
3009 RT_TRACE(COMP_POWER, "%s()============>come to sleep down\n", __FUNCTION__);
3010#ifdef TODO
3011// MgntActSet_RF_State(dev, eRfSleep, RF_CHANGE_BY_PS);
3012#endif
3013}
1ec9e48d 3014
5f53d8ca
JC		 3015void rtl8192_hw_sleep_wq (struct work_struct *work)
3016{
3017// struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
3018// struct ieee80211_device * ieee = (struct ieee80211_device*)
3019// container_of(work, struct ieee80211_device, watch_dog_wq);
3020 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
3021 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_sleep_wq);
3022 struct net_device *dev = ieee->dev;
1ec9e48d 3023
5f53d8ca
JC		 3024 //printk("=========>%s()\n", __FUNCTION__);
3025 rtl8192_hw_sleep_down(dev);
3026}
3027// printk("dev is %d\n",dev);
3028// printk("&*&(^*(&(&=========>%s()\n", __FUNCTION__);
3029void rtl8192_hw_wakeup(struct net_device* dev)
3030{
3031// u32 flags = 0;
3032
3033// spin_lock_irqsave(&priv->ps_lock,flags);
3034 RT_TRACE(COMP_POWER, "%s()============>come to wake up\n", __FUNCTION__);
3035#ifdef TODO
3036// MgntActSet_RF_State(dev, eRfSleep, RF_CHANGE_BY_PS);
3037#endif
3038 //FIXME: will we send package stored while nic is sleep?
3039// spin_unlock_irqrestore(&priv->ps_lock,flags);
3040}
1ec9e48d 3041
5f53d8ca
JC		 3042void rtl8192_hw_wakeup_wq (struct work_struct *work)
3043{
3044// struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
3045// struct ieee80211_device * ieee = (struct ieee80211_device*)
3046// container_of(work, struct ieee80211_device, watch_dog_wq);
3047 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
3048 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_wakeup_wq);
3049 struct net_device *dev = ieee->dev;
5f53d8ca 3050
1ec9e48d 3051 rtl8192_hw_wakeup(dev);
5f53d8ca
JC		 3052}
3053
3054#define MIN_SLEEP_TIME 50
3055#define MAX_SLEEP_TIME 10000
3056void rtl8192_hw_to_sleep(struct net_device *dev, u32 th, u32 tl)
3057{
3058
3059 struct r8192_priv *priv = ieee80211_priv(dev);
3060
3061 u32 rb = jiffies;
3062 unsigned long flags;
3063
3064 spin_lock_irqsave(&priv->ps_lock,flags);
3065
3066 /* Writing HW register with 0 equals to disable
3067 * the timer, that is not really what we want
3068 */
3069 tl -= MSECS(4+16+7);
3070
3071 //if(tl == 0) tl = 1;
3072
3073 /* FIXME HACK FIXME HACK */
3074// force_pci_posting(dev);
3075 //mdelay(1);
3076
3077// rb = read_nic_dword(dev, TSFTR);
3078
3079 /* If the interval in witch we are requested to sleep is too
3080 * short then give up and remain awake
3081 */
3082 if(((tl>=rb)&& (tl-rb) <= MSECS(MIN_SLEEP_TIME))
3083 ||((rb>tl)&& (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
3084 spin_unlock_irqrestore(&priv->ps_lock,flags);
3085 printk("too short to sleep\n");
3086 return;
3087 }
3088
3089// write_nic_dword(dev, TimerInt, tl);
3090// rb = read_nic_dword(dev, TSFTR);
3091 {
3092 u32 tmp = (tl>rb)?(tl-rb):(rb-tl);
3093 // if (tl<rb)
3094
5f53d8ca 3095 queue_delayed_work(priv->ieee80211->wq, &priv->ieee80211->hw_wakeup_wq, tmp); //as tl may be less than rb
5f53d8ca
JC		 3096 }
3097 /* if we suspect the TimerInt is gone beyond tl
3098 * while setting it, then give up
3099 */
3100#if 1
3101 if(((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME)))||
3102 ((tl < rb) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))) {
3103 printk("========>too long to sleep:%x, %x, %lx\n", tl, rb, MSECS(MAX_SLEEP_TIME));
3104 spin_unlock_irqrestore(&priv->ps_lock,flags);
3105 return;
3106 }
3107#endif
3108// if(priv->rf_sleep)
3109// priv->rf_sleep(dev);
3110
3111 //printk("<=========%s()\n", __FUNCTION__);
5f53d8ca 3112 queue_delayed_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_sleep_wq,0);
1ec9e48d 3113
5f53d8ca
JC		 3114 spin_unlock_irqrestore(&priv->ps_lock,flags);
3115}
3116//init priv variables here. only non_zero value should be initialized here.
3117static void rtl8192_init_priv_variable(struct net_device* dev)
3118{
3119 struct r8192_priv *priv = ieee80211_priv(dev);
3120 u8 i;
3121 priv->card_8192 = NIC_8192U;
3122 priv->chan = 1; //set to channel 1
3123 priv->ieee80211->mode = WIRELESS_MODE_AUTO; //SET AUTO
3124 priv->ieee80211->iw_mode = IW_MODE_INFRA;
3125 priv->ieee80211->ieee_up=0;
3126 priv->retry_rts = DEFAULT_RETRY_RTS;
3127 priv->retry_data = DEFAULT_RETRY_DATA;
3128 priv->ieee80211->rts = DEFAULT_RTS_THRESHOLD;
3129 priv->ieee80211->rate = 110; //11 mbps
3130 priv->ieee80211->short_slot = 1;
3131 priv->promisc = (dev->flags & IFF_PROMISC) ? 1:0;
3132 priv->CckPwEnl = 6;
3133 //for silent reset
3134 priv->IrpPendingCount = 1;
3135 priv->ResetProgress = RESET_TYPE_NORESET;
3136 priv->bForcedSilentReset = 0;
3137 priv->bDisableNormalResetCheck = false;
3138 priv->force_reset = false;
3139
3140 priv->ieee80211->FwRWRF = 0; //we don't use FW read/write RF until stable firmware is available.
3141 priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
3142 priv->ieee80211->iw_mode = IW_MODE_INFRA;
3143 priv->ieee80211->softmac_features = IEEE_SOFTMAC_SCAN |
3144 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
3145 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE |
3146 IEEE_SOFTMAC_BEACONS;//added by amy 080604 //| //IEEE_SOFTMAC_SINGLE_QUEUE;
3147
3148 priv->ieee80211->active_scan = 1;
3149 priv->ieee80211->modulation = IEEE80211_CCK_MODULATION | IEEE80211_OFDM_MODULATION;
3150 priv->ieee80211->host_encrypt = 1;
3151 priv->ieee80211->host_decrypt = 1;
3152 priv->ieee80211->start_send_beacons = NULL;//rtl819xusb_beacon_tx;//-by amy 080604
3153 priv->ieee80211->stop_send_beacons = NULL;//rtl8192_beacon_stop;//-by amy 080604
3154 priv->ieee80211->softmac_hard_start_xmit = rtl8192_hard_start_xmit;
3155 priv->ieee80211->set_chan = rtl8192_set_chan;
3156 priv->ieee80211->link_change = priv->ops->rtl819x_link_change;
3157 priv->ieee80211->softmac_data_hard_start_xmit = rtl8192_hard_data_xmit;
3158 priv->ieee80211->data_hard_stop = rtl8192_data_hard_stop;
3159 priv->ieee80211->data_hard_resume = rtl8192_data_hard_resume;
3160 priv->ieee80211->init_wmmparam_flag = 0;
3161 priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
3162 priv->ieee80211->check_nic_enough_desc = check_nic_enough_desc;
3163 priv->ieee80211->tx_headroom = TX_PACKET_SHIFT_BYTES;
3164 priv->ieee80211->qos_support = 1;
3165
3166 //added by WB
3167// priv->ieee80211->SwChnlByTimerHandler = rtl8192_phy_SwChnl;
3168 priv->ieee80211->SetBWModeHandler = rtl8192_SetBWMode;
3169 priv->ieee80211->handle_assoc_response = rtl8192_handle_assoc_response;
3170 priv->ieee80211->handle_beacon = rtl8192_handle_beacon;
3171 //for LPS
3172 priv->ieee80211->sta_wake_up = rtl8192_hw_wakeup;
3173// priv->ieee80211->ps_request_tx_ack = rtl8192_rq_tx_ack;
3174 priv->ieee80211->enter_sleep_state = rtl8192_hw_to_sleep;
3175 priv->ieee80211->ps_is_queue_empty = rtl8192_is_tx_queue_empty;
3176 //added by david
3177 priv->ieee80211->GetNmodeSupportBySecCfg = GetNmodeSupportBySecCfg8192;
3178 priv->ieee80211->GetHalfNmodeSupportByAPsHandler = GetHalfNmodeSupportByAPs819xUsb;
3179 priv->ieee80211->SetWirelessMode = rtl8192_SetWirelessMode;
3180 //added by amy
3181 priv->ieee80211->InitialGainHandler = priv->ops->rtl819x_initial_gain;
3182 priv->card_type = USB;
3183
5f53d8ca
JC		 3184//1 RTL8192SU/
3185 priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
3186 priv->ieee80211->SetFwCmdHandler = HalSetFwCmd8192S;
3187 priv->bRFSiOrPi = 0;//o=si,1=pi;
3188 //lzm add
3189 priv->bInHctTest = false;
3190
3191 priv->MidHighPwrTHR_L1 = 0x3B;
3192 priv->MidHighPwrTHR_L2 = 0x40;
3193
3194 if(priv->bInHctTest)
3195 {
3196 priv->ShortRetryLimit = HAL_RETRY_LIMIT_AP_ADHOC;
3197 priv->LongRetryLimit = HAL_RETRY_LIMIT_AP_ADHOC;
3198 }
3199 else
3200 {
3201 priv->ShortRetryLimit = HAL_RETRY_LIMIT_INFRA;
3202 priv->LongRetryLimit = HAL_RETRY_LIMIT_INFRA;
3203 }
3204
3205 priv->SetFwCmdInProgress = false; //is set FW CMD in Progress? 92S only
3206 priv->CurrentFwCmdIO = 0;
3207
3208 priv->MinSpaceCfg = 0;
3209
3210 priv->EarlyRxThreshold = 7;
3211 priv->enable_gpio0 = 0;
3212 priv->TransmitConfig =
3213 ((u32)TCR_MXDMA_2048<<TCR_MXDMA_OFFSET) | // Max DMA Burst Size per Tx DMA Burst, 7: reservied.
3214 (priv->ShortRetryLimit<<TCR_SRL_OFFSET) | // Short retry limit
3215 (priv->LongRetryLimit<<TCR_LRL_OFFSET) | // Long retry limit
3216 (false ? TCR_SAT : 0); // FALSE: HW provies PLCP length and LENGEXT, TURE: SW proiveds them
3217 if(priv->bInHctTest)
3218 priv->ReceiveConfig = //priv->CSMethod |
3219 RCR_AMF | RCR_ADF | //RCR_AAP | //accept management/data
3220 RCR_ACF |RCR_APPFCS| //accept control frame for SW AP needs PS-poll, 2005.07.07, by rcnjko.
3221 RCR_AB | RCR_AM | RCR_APM | //accept BC/MC/UC
3222 RCR_AICV | RCR_ACRC32 | //accept ICV/CRC error packet
3223 RCR_APP_PHYST_STAFF | RCR_APP_PHYST_RXFF | // Accept PHY status
3224 ((u32)7<<RCR_MXDMA_OFFSET) | // Max DMA Burst Size per Rx DMA Burst, 7: unlimited.
3225 (priv->EarlyRxThreshold<<RCR_FIFO_OFFSET) | // Rx FIFO Threshold, 7: No Rx threshold.
3226 (priv->EarlyRxThreshold == 7 ? RCR_OnlyErlPkt:0);
3227 else
3228 priv->ReceiveConfig = //priv->CSMethod |
3229 RCR_AMF | RCR_ADF | RCR_AB |
3230 RCR_AM | RCR_APM |RCR_AAP |RCR_ADD3|RCR_APP_ICV|
3231 RCR_APP_PHYST_STAFF | RCR_APP_PHYST_RXFF | // Accept PHY status
3232 RCR_APP_MIC | RCR_APPFCS;
3233
3234 // <Roger_EXP> 2008.06.16.
3235 priv->IntrMask = (u16)(IMR_ROK | IMR_VODOK | IMR_VIDOK | IMR_BEDOK | IMR_BKDOK | \
3236 IMR_HCCADOK | IMR_MGNTDOK | IMR_COMDOK | IMR_HIGHDOK | \
3237 IMR_BDOK | IMR_RXCMDOK | /*IMR_TIMEOUT0 |*/ IMR_RDU | IMR_RXFOVW | \
3238 IMR_TXFOVW | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
3239
3240//1 End
3241
5f53d8ca
JC		 3242
3243 priv->AcmControl = 0;
3244 priv->pFirmware = (rt_firmware*)vmalloc(sizeof(rt_firmware));
3245 if (priv->pFirmware)
3246 memset(priv->pFirmware, 0, sizeof(rt_firmware));
3247
3248 /* rx related queue */
3249 skb_queue_head_init(&priv->rx_queue);
3250 skb_queue_head_init(&priv->skb_queue);
3251
3252 /* Tx related queue */
3253 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
3254 skb_queue_head_init(&priv->ieee80211->skb_waitQ [i]);
3255 }
3256 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
3257 skb_queue_head_init(&priv->ieee80211->skb_aggQ [i]);
3258 }
3259 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
3260 skb_queue_head_init(&priv->ieee80211->skb_drv_aggQ [i]);
3261 }
3262 priv->rf_set_chan = rtl8192_phy_SwChnl;
3263}
3264
3265//init lock here
3266static void rtl8192_init_priv_lock(struct r8192_priv* priv)
3267{
3268 spin_lock_init(&priv->tx_lock);
3269 spin_lock_init(&priv->irq_lock);//added by thomas
3270 //spin_lock_init(&priv->rf_lock);//use rf_sem, or will crash in some OS.
3271 sema_init(&priv->wx_sem,1);
3272 sema_init(&priv->rf_sem,1);
3273 spin_lock_init(&priv->ps_lock);
5f53d8ca 3274 mutex_init(&priv->mutex);
5f53d8ca
JC		 3275}
3276
5f53d8ca 3277extern void rtl819x_watchdog_wqcallback(struct work_struct *work);
5f53d8ca
JC		 3278
3279void rtl8192_irq_rx_tasklet(struct r8192_priv *priv);
3280//init tasklet and wait_queue here. only 2.6 above kernel is considered
3281#define DRV_NAME "wlan0"
3282static void rtl8192_init_priv_task(struct net_device* dev)
3283{
3284 struct r8192_priv *priv = ieee80211_priv(dev);
3285
5f53d8ca
JC		 3286#ifdef PF_SYNCTHREAD
3287 priv->priv_wq = create_workqueue(DRV_NAME,0);
3288#else
3289 priv->priv_wq = create_workqueue(DRV_NAME);
3290#endif
5f53d8ca 3291
5f53d8ca
JC		 3292 INIT_WORK(&priv->reset_wq, rtl8192_restart);
3293
3294 //INIT_DELAYED_WORK(&priv->watch_dog_wq, hal_dm_watchdog);
3295 INIT_DELAYED_WORK(&priv->watch_dog_wq, rtl819x_watchdog_wqcallback);
3296 INIT_DELAYED_WORK(&priv->txpower_tracking_wq, dm_txpower_trackingcallback);
3297// INIT_DELAYED_WORK(&priv->gpio_change_rf_wq, dm_gpio_change_rf_callback);
3298 INIT_DELAYED_WORK(&priv->rfpath_check_wq, dm_rf_pathcheck_workitemcallback);
3299 INIT_DELAYED_WORK(&priv->update_beacon_wq, rtl8192_update_beacon);
3300 INIT_DELAYED_WORK(&priv->initialgain_operate_wq, InitialGainOperateWorkItemCallBack);
3301 //INIT_WORK(&priv->SwChnlWorkItem, rtl8192_SwChnl_WorkItem);
3302 //INIT_WORK(&priv->SetBWModeWorkItem, rtl8192_SetBWModeWorkItem);
3303 INIT_WORK(&priv->qos_activate, rtl8192_qos_activate);
3304 INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq,(void*) rtl8192_hw_wakeup_wq);
3305 INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq,(void*) rtl8192_hw_sleep_wq);
3306
5f53d8ca
JC		 3307 tasklet_init(&priv->irq_rx_tasklet,
3308 (void(*)(unsigned long))rtl8192_irq_rx_tasklet,
3309 (unsigned long)priv);
3310}
3311
5f53d8ca
JC		 3312//used to swap endian. as ntohl & htonl are not neccessary to swap endian, so use this instead.
3313static inline u16 endian_swap(u16* data)
3314{
3315 u16 tmp = *data;
3316 *data = (tmp >> 8) | (tmp << 8);
3317 return *data;
3318}
3319
5f53d8ca
JC		 3320u8 rtl8192SU_UsbOptionToEndPointNumber(u8 UsbOption)
3321{
3322 u8 nEndPoint = 0;
3323 switch(UsbOption)
3324 {
3325 case 0:
3326 nEndPoint = 6;
3327 break;
3328 case 1:
3329 nEndPoint = 11;
3330 break;
3331 case 2:
3332 nEndPoint = 4;
3333 break;
3334 default:
3335 RT_TRACE(COMP_INIT, "UsbOptionToEndPointNumber(): Invalid UsbOption(%#x)\n", UsbOption);
3336 break;
3337 }
3338 return nEndPoint;
3339}
3340
3341u8 rtl8192SU_BoardTypeToRFtype(struct net_device* dev, u8 Boardtype)
3342{
3343 u8 RFtype = RF_1T2R;
3344
3345 switch(Boardtype)
3346 {
3347 case 0:
3348 RFtype = RF_1T1R;
3349 break;
3350 case 1:
3351 RFtype = RF_1T2R;
3352 break;
3353 case 2:
3354 RFtype = RF_2T2R;
3355 break;
3356 case 3:
3357 RFtype = RF_2T2R_GREEN;
3358 break;
3359 default:
3360 break;
3361 }
3362
3363 return RFtype;
3364}
3365
88e05d85
DC		 3366void update_hal_variables(struct r8192_priv *priv)
3367{
3368 int rf_path;
3369 int i;
3370 u8 index;
3371
3372 for (rf_path = 0; rf_path < 2; rf_path++) {
3373 for (i = 0; i < 3; i++) {
3374 RT_TRACE((COMP_INIT), "CCK RF-%d CHan_Area-%d = 0x%x\n", rf_path, i, priv->RfCckChnlAreaTxPwr[rf_path][i]);
3375 RT_TRACE((COMP_INIT), "OFDM-1T RF-%d CHan_Area-%d = 0x%x\n", rf_path, i, priv->RfOfdmChnlAreaTxPwr1T[rf_path][i]);
3376 RT_TRACE((COMP_INIT), "OFDM-2T RF-%d CHan_Area-%d = 0x%x\n", rf_path, i, priv->RfOfdmChnlAreaTxPwr2T[rf_path][i]);
3377 }
3378 /* Assign dedicated channel tx power */
3379 for(i = 0; i < 14; i++) {
3380 /* channel 1-3 use the same Tx Power Level. */
3381 if (i < 3) /* Channel 1-3 */
3382 index = 0;
3383 else if (i < 9) /* Channel 4-9 */
3384 index = 1;
3385 else /* Channel 10-14 */
3386 index = 2;
3387 /* Record A & B CCK /OFDM - 1T/2T Channel area tx power */
3388 priv->RfTxPwrLevelCck[rf_path][i] = priv->RfCckChnlAreaTxPwr[rf_path][index];
3389 priv->RfTxPwrLevelOfdm1T[rf_path][i] = priv->RfOfdmChnlAreaTxPwr1T[rf_path][index];
3390 priv->RfTxPwrLevelOfdm2T[rf_path][i] = priv->RfOfdmChnlAreaTxPwr2T[rf_path][index];
3391 if (rf_path == 0) {
3392 priv->TxPowerLevelOFDM24G[i] = priv->RfTxPwrLevelOfdm1T[rf_path][i] ;
3393 priv->TxPowerLevelCCK[i] = priv->RfTxPwrLevelCck[rf_path][i];
3394 }
3395 }
3396 for(i = 0; i < 14; i++) {
3397 RT_TRACE((COMP_INIT),
3398 "Rf-%d TxPwr CH-%d CCK OFDM_1T OFDM_2T= 0x%x/0x%x/0x%x\n",
3399 rf_path, i, priv->RfTxPwrLevelCck[rf_path][i],
3400 priv->RfTxPwrLevelOfdm1T[rf_path][i] ,
3401 priv->RfTxPwrLevelOfdm2T[rf_path][i] );
3402 }
3403 }
3404}
3405
4ab37240
FS		 3406/*
3407 * Description:
3408 * Config HW adapter information into initial value.
3409 *
3410 * Assumption:
3411 * 1. After Auto load fail(i.e, check CR9346 fail)
3412 *
3413 */
3414void rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(struct net_device *dev)
5f53d8ca 3415{
4ab37240
FS		 3416 struct r8192_priv *priv = ieee80211_priv(dev);
3417 u8 rf_path; /* For EEPROM/EFUSE After V0.6_1117 */
3418 int i;
5f53d8ca
JC		 3419
3420 RT_TRACE(COMP_INIT, "====> ConfigAdapterInfo8192SForAutoLoadFail\n");
3421
4ab37240
FS		 3422 /* Isolation signals from Loader */
3423 write_nic_byte(dev, SYS_ISO_CTRL+1, 0xE8);
5f53d8ca 3424 mdelay(10);
4ab37240 3425 write_nic_byte(dev, PMC_FSM, 0x02); /* Enable Loader Data Keep */
5f53d8ca 3426
4ab37240 3427 /* Initialize IC Version && Channel Plan */
5f53d8ca
JC		 3428 priv->eeprom_vid = 0;
3429 priv->eeprom_pid = 0;
3430 priv->card_8192_version = 0;
3431 priv->eeprom_ChannelPlan = 0;
3432 priv->eeprom_CustomerID = 0;
3433 priv->eeprom_SubCustomerID = 0;
3434 priv->bIgnoreDiffRateTxPowerOffset = false;
3435
3436 RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid);
3437 RT_TRACE(COMP_INIT, "EEPROM PID = 0x%4x\n", priv->eeprom_pid);
4ab37240
FS		 3438 RT_TRACE(COMP_INIT, "EEPROM Customer ID: 0x%2x\n",
3439 priv->eeprom_CustomerID);
3440 RT_TRACE(COMP_INIT, "EEPROM SubCustomer ID: 0x%2x\n",
3441 priv->eeprom_SubCustomerID);
3442 RT_TRACE(COMP_INIT, "EEPROM ChannelPlan = 0x%4x\n",
3443 priv->eeprom_ChannelPlan);
3444 RT_TRACE(COMP_INIT, "IgnoreDiffRateTxPowerOffset = %d\n",
3445 priv->bIgnoreDiffRateTxPowerOffset);
5f53d8ca
JC		 3446
3447 priv->EEPROMUsbOption = EEPROM_USB_Default_OPTIONAL_FUNC;
3448 RT_TRACE(COMP_INIT, "USB Option = %#x\n", priv->EEPROMUsbOption);
3449
35c1b462
BZ		 3450 for(i=0; i<5; i++)
3451 priv->EEPROMUsbPhyParam[i] = EEPROM_USB_Default_PHY_PARAM;
5f53d8ca 3452
35c1b462 3453 {
4ab37240
FS		 3454 /*
3455 * In this case, we randomly assign a MAC address here.
3456 */
5f53d8ca 3457 static u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x92, 0x00};
5f53d8ca
JC		 3458 for(i = 0; i < 6; i++)
3459 dev->dev_addr[i] = sMacAddr[i];
3460 }
4ab37240 3461 /* NicIFSetMacAddress(Adapter, Adapter->PermanentAddress); */
5f53d8ca
JC		 3462 write_nic_dword(dev, IDR0, ((u32*)dev->dev_addr)[0]);
3463 write_nic_word(dev, IDR4, ((u16*)(dev->dev_addr + 4))[0]);
3464
6756993b
HS		 3465 RT_TRACE(COMP_INIT,
3466 "ReadAdapterInfo8192SEFuse(), Permanent Address = %pM\n",
3467 dev->dev_addr);
5f53d8ca 3468
35c1b462 3469 priv->EEPROMBoardType = EEPROM_Default_BoardType;
4ab37240 3470 priv->rf_type = RF_1T2R; /* RF_2T2R */
35c1b462
BZ		 3471 priv->EEPROMTxPowerDiff = EEPROM_Default_PwDiff;
3472 priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
3473 priv->EEPROMCrystalCap = EEPROM_Default_CrystalCap;
3474 priv->EEPROMTxPwrBase = EEPROM_Default_TxPowerBase;
3475 priv->EEPROMTSSI_A = EEPROM_Default_TSSI;
3476 priv->EEPROMTSSI_B = EEPROM_Default_TSSI;
3477 priv->EEPROMTxPwrTkMode = EEPROM_Default_TxPwrTkMode;
5f53d8ca 3478
35c1b462
BZ		 3479 for (rf_path = 0; rf_path < 2; rf_path++)
3480 {
3481 for (i = 0; i < 3; i++)
5f53d8ca 3482 {
4ab37240 3483 /* Read CCK RF A & B Tx power */
35c1b462
BZ		 3484 priv->RfCckChnlAreaTxPwr[rf_path][i] =
3485 priv->RfOfdmChnlAreaTxPwr1T[rf_path][i] =
3486 priv->RfOfdmChnlAreaTxPwr2T[rf_path][i] =
3487 (u8)(EEPROM_Default_TxPower & 0xff);
5f53d8ca 3488 }
35c1b462 3489 }
5f53d8ca 3490
88e05d85 3491 update_hal_variables(priv);
5f53d8ca 3492
4ab37240
FS		 3493 /*
3494 * Update remaining HAL variables.
3495 */
35c1b462 3496 priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
4ab37240 3497 priv->LegacyHTTxPowerDiff = priv->EEPROMTxPowerDiff; /* new */
35c1b462 3498 priv->TxPowerDiff = priv->EEPROMTxPowerDiff;
4ab37240
FS		 3499 /* Antenna B gain offset to antenna A, bit0~3 */
3500 /* priv->AntennaTxPwDiff[0] = (priv->EEPROMTxPowerDiff & 0xf); */
3501 /* Antenna C gain offset to antenna A, bit4~7 */
3502 /* priv->AntennaTxPwDiff[1] = ((priv->EEPROMTxPowerDiff & 0xf0)>>4); */
3503 /* CrystalCap, bit12~15 */
3504 priv->CrystalCap = priv->EEPROMCrystalCap;
3505 /* ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2 */
3506 priv->ThermalMeter[0] = priv->EEPROMThermalMeter;
5f53d8ca
JC		 3507 priv->LedStrategy = SW_LED_MODE0;
3508
3509 init_rate_adaptive(dev);
3510
35c1b462 3511 RT_TRACE(COMP_INIT, "<==== ConfigAdapterInfo8192SForAutoLoadFail\n");
5f53d8ca 3512}
5f53d8ca 3513
495c57f5
FS		 3514/*
3515 * Description:
3516 * Read HW adapter information by E-Fuse
3517 * or EEPROM according CR9346 reported.
3518 *
3519 * Assumption:
3520 * 1. CR9346 regiser has verified.
3521 * 2. PASSIVE_LEVEL (USB interface)
3522 */
3523void rtl8192SU_ReadAdapterInfo8192SUsb(struct net_device *dev)
5f53d8ca 3524{
e3133b28
FS		 3525 struct r8192_priv *priv = ieee80211_priv(dev);
3526 u16 i;
3527 u8 tmpU1b, tempval;
3528 u16 EEPROMId;
3529 u8 hwinfo[HWSET_MAX_SIZE_92S];
495c57f5 3530 u8 rf_path, index; /* For EEPROM/EFUSE After V0.6_1117 */
e3133b28
FS		 3531 struct eeprom_93cx6 eeprom;
3532 u16 eeprom_val;
3533
3534 eeprom.data = dev;
3535 eeprom.register_read = rtl819x_eeprom_register_read;
3536 eeprom.register_write = rtl819x_eeprom_register_write;
495c57f5 3537 eeprom.width = PCI_EEPROM_WIDTH_93C46;
5f53d8ca 3538
e3133b28 3539 /*
495c57f5 3540 * The following operation are prevent Efuse leakage by turn on 2.5V.
e3133b28 3541 */
5f53d8ca
JC		 3542 tmpU1b = read_nic_byte(dev, EFUSE_TEST+3);
3543 write_nic_byte(dev, EFUSE_TEST+3, tmpU1b|0x80);
5f53d8ca
JC		 3544 mdelay(10);
3545 write_nic_byte(dev, EFUSE_TEST+3, (tmpU1b&(~BIT7)));
3546
495c57f5 3547 /* Retrieve Chip version. */
5f53d8ca
JC		 3548 priv->card_8192_version = (VERSION_8192S)((read_nic_dword(dev, PMC_FSM)>>16)&0xF);
3549 RT_TRACE(COMP_INIT, "Chip Version ID: 0x%2x\n", priv->card_8192_version);
3550
e3133b28
FS		 3551 switch (priv->card_8192_version) {
3552 case 0:
3553 RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_ACUT.\n");
3554 break;
3555 case 1:
3556 RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_BCUT.\n");
3557 break;
3558 case 2:
3559 RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_CCUT.\n");
3560 break;
3561 default:
3562 RT_TRACE(COMP_INIT, "Unknown Chip Version!!\n");
3563 priv->card_8192_version = VERSION_8192S_BCUT;
3564 break;
5f53d8ca
JC		 3565 }
3566
495c57f5
FS		 3567 if (priv->EepromOrEfuse) { /* Read from EEPROM */
3568 /* Isolation signals from Loader */
3569 write_nic_byte(dev, SYS_ISO_CTRL+1, 0xE8);
5f53d8ca 3570 mdelay(10);
495c57f5
FS		 3571 /* Enable Loader Data Keep */
3572 write_nic_byte(dev, PMC_FSM, 0x02);
3573 /* Read all Content from EEPROM or EFUSE. */
3574 for (i = 0; i < HWSET_MAX_SIZE_92S; i += 2) {
e3133b28
FS		 3575 eeprom_93cx6_read(&eeprom, (u16) (i>>1), &eeprom_val);
3576 *((u16 *)(&hwinfo[i])) = eeprom_val;
5f53d8ca 3577 }
495c57f5
FS		 3578 } else if (!(priv->EepromOrEfuse)) { /* Read from EFUSE */
3579 /* Read EFUSE real map to shadow. */
5f53d8ca
JC		 3580 EFUSE_ShadowMapUpdate(dev);
3581 memcpy(hwinfo, &priv->EfuseMap[EFUSE_INIT_MAP][0], HWSET_MAX_SIZE_92S);
495c57f5
FS		 3582 } else {
3583 RT_TRACE(COMP_INIT, "%s(): Invalid boot type", __func__);
5f53d8ca 3584 }
5f53d8ca 3585
495c57f5
FS		 3586 /*
3587 * Even though CR9346 regiser can verify whether Autoload
3588 * is success or not, but we still double check ID codes for 92S here
3589 * (e.g., due to HW GPIO polling fail issue)
3590 */
5f53d8ca 3591 EEPROMId = *((u16 *)&hwinfo[0]);
495c57f5 3592 if (EEPROMId != RTL8190_EEPROM_ID) {
5f53d8ca
JC		 3593 RT_TRACE(COMP_INIT, "ID(%#x) is invalid!!\n", EEPROMId);
3594 priv->bTXPowerDataReadFromEEPORM = FALSE;
3595 priv->AutoloadFailFlag=TRUE;
495c57f5 3596 } else {
5f53d8ca 3597 priv->AutoloadFailFlag=FALSE;
5f53d8ca 3598 priv->bTXPowerDataReadFromEEPORM = TRUE;
5f53d8ca 3599 }
495c57f5
FS		 3600 /* Read IC Version && Channel Plan */
3601 if (!priv->AutoloadFailFlag) {
3602 /* VID, PID */
5f53d8ca
JC		 3603 priv->eeprom_vid = *(u16 *)&hwinfo[EEPROM_VID];
3604 priv->eeprom_pid = *(u16 *)&hwinfo[EEPROM_PID];
3605 priv->bIgnoreDiffRateTxPowerOffset = false; //cosa for test
3606
3607
495c57f5 3608 /* EEPROM Version ID, Channel plan */
5f53d8ca
JC		 3609 priv->EEPROMVersion = *(u8 *)&hwinfo[EEPROM_Version];
3610 priv->eeprom_ChannelPlan = *(u8 *)&hwinfo[EEPROM_ChannelPlan];
3611
495c57f5 3612 /* Customer ID, 0x00 and 0xff are reserved for Realtek. */
5f53d8ca
JC		 3613 priv->eeprom_CustomerID = *(u8 *)&hwinfo[EEPROM_CustomID];
3614 priv->eeprom_SubCustomerID = *(u8 *)&hwinfo[EEPROM_SubCustomID];
495c57f5 3615 } else {
5f53d8ca
JC		 3616 rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(dev);
3617 return;
3618 }
3619
5f53d8ca
JC		 3620 RT_TRACE(COMP_INIT, "EEPROM Id = 0x%4x\n", EEPROMId);
3621 RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid);
3622 RT_TRACE(COMP_INIT, "EEPROM PID = 0x%4x\n", priv->eeprom_pid);
3623 RT_TRACE(COMP_INIT, "EEPROM Version ID: 0x%2x\n", priv->EEPROMVersion);
3624 RT_TRACE(COMP_INIT, "EEPROM Customer ID: 0x%2x\n", priv->eeprom_CustomerID);
3625 RT_TRACE(COMP_INIT, "EEPROM SubCustomer ID: 0x%2x\n", priv->eeprom_SubCustomerID);
3626 RT_TRACE(COMP_INIT, "EEPROM ChannelPlan = 0x%4x\n", priv->eeprom_ChannelPlan);
3627 RT_TRACE(COMP_INIT, "bIgnoreDiffRateTxPowerOffset = %d\n", priv->bIgnoreDiffRateTxPowerOffset);
3628
495c57f5
FS		 3629 /* Read USB optional function. */
3630 if (!priv->AutoloadFailFlag) {
5f53d8ca 3631 priv->EEPROMUsbOption = *(u8 *)&hwinfo[EEPROM_USB_OPTIONAL];
495c57f5 3632 } else {
5f53d8ca
JC		 3633 priv->EEPROMUsbOption = EEPROM_USB_Default_OPTIONAL_FUNC;
3634 }
3635
5f53d8ca
JC		 3636 priv->EEPROMUsbEndPointNumber = rtl8192SU_UsbOptionToEndPointNumber((priv->EEPROMUsbOption&EEPROM_EP_NUMBER)>>3);
3637
3638 RT_TRACE(COMP_INIT, "USB Option = %#x\n", priv->EEPROMUsbOption);
3639 RT_TRACE(COMP_INIT, "EndPoint Number = %#x\n", priv->EEPROMUsbEndPointNumber);
3640
3641#ifdef TO_DO_LIST
3642 //
3643 // Decide CustomerID according to VID/DID or EEPROM
3644 //
3645 switch(pHalData->EEPROMCustomerID)
3646 {
3647 case EEPROM_CID_ALPHA:
3648 pMgntInfo->CustomerID = RT_CID_819x_ALPHA;
3649 break;
3650
3651 case EEPROM_CID_CAMEO:
3652 pMgntInfo->CustomerID = RT_CID_819x_CAMEO;
3653 break;
3654
3655 case EEPROM_CID_SITECOM:
3656 pMgntInfo->CustomerID = RT_CID_819x_Sitecom;
3657 RT_TRACE(COMP_INIT, DBG_LOUD, ("CustomerID = 0x%4x\n", pMgntInfo->CustomerID));
3658
3659 break;
3660
3661 case EEPROM_CID_WHQL:
3662 Adapter->bInHctTest = TRUE;
3663
3664 pMgntInfo->bSupportTurboMode = FALSE;
3665 pMgntInfo->bAutoTurboBy8186 = FALSE;
3666
3667 pMgntInfo->PowerSaveControl.bInactivePs = FALSE;
3668 pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE;
3669 pMgntInfo->PowerSaveControl.bLeisurePs = FALSE;
3670 pMgntInfo->keepAliveLevel = 0;
3671 break;
3672
3673 default:
3674 pMgntInfo->CustomerID = RT_CID_DEFAULT;
3675 break;
3676
3677 }
3678
3679 //
3680 // Led mode
3681 //
3682 switch(pMgntInfo->CustomerID)
3683 {
3684 case RT_CID_DEFAULT:
3685 case RT_CID_819x_ALPHA:
3686 pHalData->LedStrategy = SW_LED_MODE1;
3687 pHalData->bRegUseLed = TRUE;
3688 pHalData->SwLed1.bLedOn = TRUE;
3689 break;
3690 case RT_CID_819x_CAMEO:
3691 pHalData->LedStrategy = SW_LED_MODE1;
3692 pHalData->bRegUseLed = TRUE;
3693 break;
3694
3695 case RT_CID_819x_Sitecom:
3696 pHalData->LedStrategy = SW_LED_MODE2;
3697 pHalData->bRegUseLed = TRUE;
3698 break;
3699
3700 default:
3701 pHalData->LedStrategy = SW_LED_MODE0;
3702 break;
3703 }
3704#endif
3705
3706 // Read USB PHY parameters.
3707 for(i=0; i<5; i++)
3708 priv->EEPROMUsbPhyParam[i] = *(u8 *)&hwinfo[EEPROM_USB_PHY_PARA1+i];
3709
3710 //RT_PRINT_DATA(COMP_EFUSE, DBG_LOUD, ("USB PHY Param: \n"), pHalData->EEPROMUsbPhyParam, 5);
3711
3712
3713 //Read Permanent MAC address
3714 for(i=0; i<6; i++)
3715 dev->dev_addr[i] = *(u8 *)&hwinfo[EEPROM_NODE_ADDRESS_BYTE_0+i];
3716
3717 //NicIFSetMacAddress(Adapter, Adapter->PermanentAddress);
3718 write_nic_dword(dev, IDR0, ((u32*)dev->dev_addr)[0]);
3719 write_nic_word(dev, IDR4, ((u16*)(dev->dev_addr + 4))[0]);
3720
6756993b
HS		 3721 RT_TRACE(COMP_INIT,
3722 "ReadAdapterInfo8192SEFuse(), Permanent Address = %pM\n",
3723 dev->dev_addr);
5f53d8ca
JC		 3724
3725 //
3726 // Get CustomerID(Boad Type)
3727 // i.e., 0x0: RTL8188SU, 0x1: RTL8191SU, 0x2: RTL8192SU, 0x3: RTL8191GU.
3728 // Others: Reserved. Default is 0x2: RTL8192SU.
3729 //
3730 //if(!priv->AutoloadFailFlag)
3731 //{
3732 priv->EEPROMBoardType = *(u8 *)&hwinfo[EEPROM_BoardType];
3733 priv->rf_type = rtl8192SU_BoardTypeToRFtype(dev, priv->EEPROMBoardType);
3734 //}
3735 //else
3736 //{
3737 // priv->EEPROMBoardType = EEPROM_Default_BoardType;
3738 // priv->rf_type = RF_1T2R;
3739 //}
3740
5f53d8ca 3741 priv->rf_chip = RF_6052;
5f53d8ca
JC		 3742
3743 priv->rf_chip = RF_6052;//lzm test
3744 RT_TRACE(COMP_INIT, "BoardType = 0x%2x\n", priv->EEPROMBoardType);
3745 RT_TRACE(COMP_INIT, "RF_Type = 0x%2x\n", priv->rf_type);
3746
3747 //
3748 // Read antenna tx power offset of B/C/D to A from EEPROM
3749 // and read ThermalMeter from EEPROM
3750 //
3751 //if(!priv->AutoloadFailFlag)
3752 {
3753 priv->EEPROMTxPowerDiff = *(u8 *)&hwinfo[EEPROM_PwDiff];
3754 priv->EEPROMThermalMeter = *(u8 *)&hwinfo[EEPROM_ThermalMeter];
3755 }
3756 //else
3757 //{
3758 // priv->EEPROMTxPowerDiff = EEPROM_Default_PwDiff;
3759 // priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
3760 //}
3761
3762 RT_TRACE(COMP_INIT, "PwDiff = %#x\n", priv->EEPROMTxPowerDiff);
3763 RT_TRACE(COMP_INIT, "ThermalMeter = %#x\n", priv->EEPROMThermalMeter);
3764
3765 //
3766 // Read Tx Power gain offset of legacy OFDM to HT rate.
3767 // Read CrystalCap from EEPROM
3768 //
3769 //if(!priv->AutoloadFailFlag)
3770 {
3771 priv->EEPROMCrystalCap = *(u8 *)&hwinfo[EEPROM_CrystalCap];
3772 }
3773 //else
3774 //{
3775 // priv->EEPROMCrystalCap = EEPROM_Default_CrystalCap;
3776 //}
3777
3778 RT_TRACE(COMP_INIT, "CrystalCap = %#x\n", priv->EEPROMCrystalCap);
3779
3780 //
3781 // Get Tx Power Base.
3782 //
3783 //if(!priv->AutoloadFailFlag)
3784 {
3785 priv->EEPROMTxPwrBase = *(u8 *)&hwinfo[EEPROM_TxPowerBase];
3786 }
3787 //else
3788 //{
3789 // priv->EEPROMTxPwrBase = EEPROM_Default_TxPowerBase;
3790 //}
3791
3792 RT_TRACE(COMP_INIT, "TxPwrBase = %#x\n", priv->EEPROMTxPwrBase);
3793
3794
3795 //
3796 // Get TSSI value for each path.
3797 //
3798 //if(!priv->AutoloadFailFlag)
3799 {
3800 priv->EEPROMTSSI_A = *(u8 *)&hwinfo[EEPROM_TSSI_A];
3801 priv->EEPROMTSSI_B = *(u8 *)&hwinfo[EEPROM_TSSI_B];
3802 }
3803 //else
3804 //{ // Default setting for Empty EEPROM
3805 // priv->EEPROMTSSI_A = EEPROM_Default_TSSI;
3806 // priv->EEPROMTSSI_B = EEPROM_Default_TSSI;
3807 //}
3808
3809 RT_TRACE(COMP_INIT, "TSSI_A = %#x, TSSI_B = %#x\n", priv->EEPROMTSSI_A, priv->EEPROMTSSI_B);
3810
3811 //
3812 // Get Tx Power tracking mode.
3813 //
3814 //if(!priv->AutoloadFailFlag)
3815 {
3816 priv->EEPROMTxPwrTkMode = *(u8 *)&hwinfo[EEPROM_TxPwTkMode];
3817 }
3818
3819 RT_TRACE(COMP_INIT, "TxPwrTkMod = %#x\n", priv->EEPROMTxPwrTkMode);
3820
3821
5f53d8ca
JC		 3822 {
3823 //
3824 // Buffer TxPwIdx(i.e., from offset 0x55~0x66, total 18Bytes)
3825 // Update CCK, OFDM (1T/2T)Tx Power Index from above buffer.
3826 //
3827
3828 //
3829 // Get Tx Power Level by Channel
3830 //
3831 //if(!priv->AutoloadFailFlag)
3832 {
3833 // Read Tx power of Channel 1 ~ 14 from EFUSE.
3834 // 92S suupport RF A & B
3835 for (rf_path = 0; rf_path < 2; rf_path++)
3836 {
3837 for (i = 0; i < 3; i++)
3838 {
3839 // Read CCK RF A & B Tx power
3840 priv->RfCckChnlAreaTxPwr[rf_path][i] =
3841 hwinfo[EEPROM_TxPwIndex+rf_path*3+i];
3842
3843 // Read OFDM RF A & B Tx power for 1T
3844 priv->RfOfdmChnlAreaTxPwr1T[rf_path][i] =
3845 hwinfo[EEPROM_TxPwIndex+6+rf_path*3+i];
3846
3847 // Read OFDM RF A & B Tx power for 2T
3848 priv->RfOfdmChnlAreaTxPwr2T[rf_path][i] =
3849 hwinfo[EEPROM_TxPwIndex+12+rf_path*3+i];
3850 }
3851 }
3852
3853 }
88e05d85 3854 update_hal_variables(priv);
5f53d8ca
JC		 3855 }
3856
3857 //
3858 // 2009/02/09 Cosa add for new EEPROM format
3859 //
3860 for(i=0; i<14; i++) // channel 1~3 use the same Tx Power Level.
3861 {
3862 // Read tx power difference between HT OFDM 20/40 MHZ
3863 if (i < 3) // Cjanel 1-3
3864 index = 0;
3865 else if (i < 9) // Channel 4-9
3866 index = 1;
3867 else // Channel 10-14
3868 index = 2;
3869
3870 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_HT20_DIFF+index])&0xff;
3871 priv->TxPwrHt20Diff[RF90_PATH_A][i] = (tempval&0xF);
3872 priv->TxPwrHt20Diff[RF90_PATH_B][i] = ((tempval>>4)&0xF);
3873
3874 // Read OFDM<->HT tx power diff
3875 if (i < 3) // Cjanel 1-3
3876 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_OFDM_DIFF])&0xff;
3877 else if (i < 9) // Channel 4-9
3878 tempval = (*(u8 *)&hwinfo[EEPROM_PwDiff])&0xff;
3879 else // Channel 10-14
3880 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_OFDM_DIFF+1])&0xff;
3881
3882 //cosa tempval = (*(u1Byte *)&hwinfo[EEPROM_TX_PWR_OFDM_DIFF+index])&0xff;
3883 priv->TxPwrLegacyHtDiff[RF90_PATH_A][i] = (tempval&0xF);
3884 priv->TxPwrLegacyHtDiff[RF90_PATH_B][i] = ((tempval>>4)&0xF);
3885
3886 //
3887 // Read Band Edge tx power offset and check if user enable the ability
3888 //
3889 // HT 40 band edge channel
3890 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE])&0xff;
3891 priv->TxPwrbandEdgeHt40[RF90_PATH_A][0] = (tempval&0xF); // Band edge low channel
3892 priv->TxPwrbandEdgeHt40[RF90_PATH_A][1] = ((tempval>>4)&0xF); // Band edge high channel
3893 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+1])&0xff;
3894 priv->TxPwrbandEdgeHt40[RF90_PATH_B][0] = (tempval&0xF); // Band edge low channel
3895 priv->TxPwrbandEdgeHt40[RF90_PATH_B][1] = ((tempval>>4)&0xF); // Band edge high channel
3896 // HT 20 band edge channel
3897 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+2])&0xff;
3898 priv->TxPwrbandEdgeHt20[RF90_PATH_A][0] = (tempval&0xF); // Band edge low channel
3899 priv->TxPwrbandEdgeHt20[RF90_PATH_A][1] = ((tempval>>4)&0xF); // Band edge high channel
3900 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+3])&0xff;
3901 priv->TxPwrbandEdgeHt20[RF90_PATH_B][0] = (tempval&0xF); // Band edge low channel
3902 priv->TxPwrbandEdgeHt20[RF90_PATH_B][1] = ((tempval>>4)&0xF); // Band edge high channel
3903 // OFDM band edge channel
3904 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+4])&0xff;
3905 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][0] = (tempval&0xF); // Band edge low channel
3906 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][1] = ((tempval>>4)&0xF); // Band edge high channel
3907 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+5])&0xff;
3908 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_B][0] = (tempval&0xF); // Band edge low channel
3909 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_B][1] = ((tempval>>4)&0xF); // Band edge high channel
3910
3911 priv->TxPwrbandEdgeFlag = (*(u8 *)&hwinfo[TX_PWR_BAND_EDGE_CHK]);
3912 }
3913
3914 for(i=0; i<14; i++)
3915 RT_TRACE(COMP_INIT, "RF-A Ht20 to HT40 Diff[%d] = 0x%x\n", i, priv->TxPwrHt20Diff[RF90_PATH_A][i]);
3916 for(i=0; i<14; i++)
3917 RT_TRACE(COMP_INIT, "RF-A Legacy to Ht40 Diff[%d] = 0x%x\n", i, priv->TxPwrLegacyHtDiff[RF90_PATH_A][i]);
3918 for(i=0; i<14; i++)
3919 RT_TRACE(COMP_INIT, "RF-B Ht20 to HT40 Diff[%d] = 0x%x\n", i, priv->TxPwrHt20Diff[RF90_PATH_B][i]);
3920 for(i=0; i<14; i++)
3921 RT_TRACE(COMP_INIT, "RF-B Legacy to HT40 Diff[%d] = 0x%x\n", i, priv->TxPwrLegacyHtDiff[RF90_PATH_B][i]);
3922 RT_TRACE(COMP_INIT, "RF-A HT40 band-edge low/high power diff = 0x%x/0x%x\n",
3923 priv->TxPwrbandEdgeHt40[RF90_PATH_A][0],
3924 priv->TxPwrbandEdgeHt40[RF90_PATH_A][1]);
3925 RT_TRACE((COMP_INIT&COMP_DBG), "RF-B HT40 band-edge low/high power diff = 0x%x/0x%x\n",
3926 priv->TxPwrbandEdgeHt40[RF90_PATH_B][0],
3927 priv->TxPwrbandEdgeHt40[RF90_PATH_B][1]);
3928
3929 RT_TRACE((COMP_INIT&COMP_DBG), "RF-A HT20 band-edge low/high power diff = 0x%x/0x%x\n",
3930 priv->TxPwrbandEdgeHt20[RF90_PATH_A][0],
3931 priv->TxPwrbandEdgeHt20[RF90_PATH_A][1]);
3932 RT_TRACE((COMP_INIT&COMP_DBG), "RF-B HT20 band-edge low/high power diff = 0x%x/0x%x\n",
3933 priv->TxPwrbandEdgeHt20[RF90_PATH_B][0],
3934 priv->TxPwrbandEdgeHt20[RF90_PATH_B][1]);
3935
3936 RT_TRACE((COMP_INIT&COMP_DBG), "RF-A OFDM band-edge low/high power diff = 0x%x/0x%x\n",
3937 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][0],
3938 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][1]);
3939 RT_TRACE((COMP_INIT&COMP_DBG), "RF-B OFDM band-edge low/high power diff = 0x%x/0x%x\n",
3940 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_B][0],
3941 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_B][1]);
3942 RT_TRACE((COMP_INIT&COMP_DBG), "Band-edge enable flag = %d\n", priv->TxPwrbandEdgeFlag);
5f53d8ca
JC		 3943
3944 //
3945 // Update remained HAL variables.
3946 //
3947 priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
3948 priv->LegacyHTTxPowerDiff = priv->EEPROMTxPowerDiff;
3949 priv->TxPowerDiff = priv->EEPROMTxPowerDiff;
3950 //priv->AntennaTxPwDiff[0] = (priv->EEPROMTxPowerDiff & 0xf);// Antenna B gain offset to antenna A, bit[3:0]
3951 //priv->AntennaTxPwDiff[1] = ((priv->EEPROMTxPowerDiff & 0xf0)>>4);// Antenna C gain offset to antenna A, bit[7:4]
3952 priv->CrystalCap = priv->EEPROMCrystalCap; // CrystalCap, bit[15:12]
3953 priv->ThermalMeter[0] = (priv->EEPROMThermalMeter&0x1f);// ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
3954 priv->LedStrategy = SW_LED_MODE0;
3955
3956 init_rate_adaptive(dev);
3957
3958 RT_TRACE(COMP_INIT, "<==== ReadAdapterInfo8192SUsb\n");
3959
3960 //return RT_STATUS_SUCCESS;
3961}
3962
3963
3964//
3965// Description:
3966// Read HW adapter information by E-Fuse or EEPROM according CR9346 reported.
3967//
3968// Assumption:
3969// 1. CR9346 regiser has verified.
3970// 2. PASSIVE_LEVEL (USB interface)
3971//
3972// Created by Roger, 2008.10.21.
3973//
3974static void rtl8192SU_read_eeprom_info(struct net_device *dev)
3975{
3976 struct r8192_priv *priv = ieee80211_priv(dev);
3977 u8 tmpU1b;
3978
3979 RT_TRACE(COMP_INIT, "====> ReadAdapterInfo8192SUsb\n");
3980
3981 // Retrieve Chip version.
3982 priv->card_8192_version = (VERSION_8192S)((read_nic_dword(dev, PMC_FSM)>>16)&0xF);
3983 RT_TRACE(COMP_INIT, "Chip Version ID: 0x%2x\n", priv->card_8192_version);
3984
3985 tmpU1b = read_nic_byte(dev, EPROM_CMD);//CR9346
3986
3987 // To check system boot selection.
3988 if (tmpU1b & CmdEERPOMSEL)
3989 {
3990 RT_TRACE(COMP_INIT, "Boot from EEPROM\n");
3991 priv->EepromOrEfuse = TRUE;
3992 }
3993 else
3994 {
3995 RT_TRACE(COMP_INIT, "Boot from EFUSE\n");
3996 priv->EepromOrEfuse = FALSE;
3997 }
3998
3999 // To check autoload success or not.
4000 if (tmpU1b & CmdEEPROM_En)
4001 {
4002 RT_TRACE(COMP_INIT, "Autoload OK!!\n");
4003 priv->AutoloadFailFlag=FALSE;
4004 rtl8192SU_ReadAdapterInfo8192SUsb(dev);//eeprom or e-fuse
4005 }
4006 else
4007 { // Auto load fail.
4008 RT_TRACE(COMP_INIT, "AutoLoad Fail reported from CR9346!!\n");
4009 priv->AutoloadFailFlag=TRUE;
4010 rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(dev);
4011
4012 //if (IS_BOOT_FROM_EFUSE(Adapter))
4013 if(!priv->EepromOrEfuse)
4014 {
4015 RT_TRACE(COMP_INIT, "Update shadow map for EFuse future use!!\n");
4016 EFUSE_ShadowMapUpdate(dev);
4017 }
4018 }
4019#ifdef TO_DO_LIST
4020 if((priv->RegChannelPlan >= RT_CHANNEL_DOMAIN_MAX) || (pHalData->EEPROMChannelPlan & EEPROM_CHANNEL_PLAN_BY_HW_MASK))
4021 {
4022 pMgntInfo->ChannelPlan = HalMapChannelPlan8192S(Adapter, (pHalData->EEPROMChannelPlan & (~(EEPROM_CHANNEL_PLAN_BY_HW_MASK))));
4023 pMgntInfo->bChnlPlanFromHW = (pHalData->EEPROMChannelPlan & EEPROM_CHANNEL_PLAN_BY_HW_MASK) ? TRUE : FALSE; // User cannot change channel plan.
4024 }
4025 else
4026 {
4027 pMgntInfo->ChannelPlan = (RT_CHANNEL_DOMAIN)pMgntInfo->RegChannelPlan;
4028 }
4029
4030 switch(pMgntInfo->ChannelPlan)
4031 {
4032 case RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN:
4033 {
4034 PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(pMgntInfo);
4035
4036 pDot11dInfo->bEnabled = TRUE;
4037 }
4038 RT_TRACE(COMP_INIT, DBG_LOUD, ("ReadAdapterInfo8187(): Enable dot11d when RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN!\n"));
4039 break;
4040 }
4041
4042 RT_TRACE(COMP_INIT, DBG_LOUD, ("RegChannelPlan(%d) EEPROMChannelPlan(%d)", pMgntInfo->RegChannelPlan, pHalData->EEPROMChannelPlan));
4043 RT_TRACE(COMP_INIT, DBG_LOUD, ("ChannelPlan = %d\n" , pMgntInfo->ChannelPlan));
4044
4045 RT_TRACE(COMP_INIT, DBG_LOUD, ("<==== ReadAdapterInfo8192S\n"));
4046#endif
4047
4048 RT_TRACE(COMP_INIT, "<==== ReadAdapterInfo8192SUsb\n");
4049
4050 //return RT_STATUS_SUCCESS;
4051}
0f29f587
BZ		 4052
4053short rtl8192_get_channel_map(struct net_device * dev)
5f53d8ca 4054{
5f53d8ca 4055 struct r8192_priv *priv = ieee80211_priv(dev);
0f29f587
BZ		 4056 if(priv->ChannelPlan > COUNTRY_CODE_GLOBAL_DOMAIN){
4057 printk("rtl8180_init:Error channel plan! Set to default.\n");
4058 priv->ChannelPlan= 0;
5f53d8ca 4059 }
0f29f587 4060 RT_TRACE(COMP_INIT, "Channel plan is %d\n",priv->ChannelPlan);
5f53d8ca 4061
0f29f587
BZ		 4062 rtl819x_set_channel_map(priv->ChannelPlan, priv);
4063 return 0;
4064}
5f53d8ca
JC		 4065
4066short rtl8192_init(struct net_device *dev)
4067{
4068
4069 struct r8192_priv *priv = ieee80211_priv(dev);
4070
5f53d8ca
JC		 4071 rtl8192_init_priv_variable(dev);
4072 rtl8192_init_priv_lock(priv);
4073 rtl8192_init_priv_task(dev);
5f53d8ca
JC		 4074 priv->ops->rtl819x_read_eeprom_info(dev);
4075 rtl8192_get_channel_map(dev);
4076 init_hal_dm(dev);
4077 init_timer(&priv->watch_dog_timer);
4078 priv->watch_dog_timer.data = (unsigned long)dev;
4079 priv->watch_dog_timer.function = watch_dog_timer_callback;
5f53d8ca
JC		 4080 return 0;
4081}
4082
4083/******************************************************************************
4084 *function: This function actually only set RRSR, RATR and BW_OPMODE registers
4085 * not to do all the hw config as its name says
4086 * input: net_device dev
4087 * output: none
4088 * return: none
4089 * notice: This part need to modified according to the rate set we filtered
4090 * ****************************************************************************/
4091void rtl8192_hwconfig(struct net_device* dev)
4092{
4093 u32 regRATR = 0, regRRSR = 0;
4094 u8 regBwOpMode = 0, regTmp = 0;
4095 struct r8192_priv *priv = ieee80211_priv(dev);
4096
4097// Set RRSR, RATR, and BW_OPMODE registers
4098 //
4099 switch(priv->ieee80211->mode)
4100 {
4101 case WIRELESS_MODE_B:
4102 regBwOpMode = BW_OPMODE_20MHZ;
4103 regRATR = RATE_ALL_CCK;
4104 regRRSR = RATE_ALL_CCK;
4105 break;
4106 case WIRELESS_MODE_A:
4107 regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ;
4108 regRATR = RATE_ALL_OFDM_AG;
4109 regRRSR = RATE_ALL_OFDM_AG;
4110 break;
4111 case WIRELESS_MODE_G:
4112 regBwOpMode = BW_OPMODE_20MHZ;
4113 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4114 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4115 break;
4116 case WIRELESS_MODE_AUTO:
4117#ifdef TO_DO_LIST
4118 if (Adapter->bInHctTest)
4119 {
4120 regBwOpMode = BW_OPMODE_20MHZ;
4121 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4122 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4123 }
4124 else
4125#endif
4126 {
4127 regBwOpMode = BW_OPMODE_20MHZ;
4128 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4129 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4130 }
4131 break;
4132 case WIRELESS_MODE_N_24G:
4133 // It support CCK rate by default.
4134 // CCK rate will be filtered out only when associated AP does not support it.
4135 regBwOpMode = BW_OPMODE_20MHZ;
4136 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4137 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4138 break;
4139 case WIRELESS_MODE_N_5G:
4140 regBwOpMode = BW_OPMODE_5G;
4141 regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4142 regRRSR = RATE_ALL_OFDM_AG;
4143 break;
4144 }
4145
4146 write_nic_byte(dev, BW_OPMODE, regBwOpMode);
4147 {
4148 u32 ratr_value = 0;
4149 ratr_value = regRATR;
4150 if (priv->rf_type == RF_1T2R)
4151 {
4152 ratr_value &= ~(RATE_ALL_OFDM_2SS);
4153 }
4154 write_nic_dword(dev, RATR0, ratr_value);
4155 write_nic_byte(dev, UFWP, 1);
4156 }
4157 regTmp = read_nic_byte(dev, 0x313);
4158 regRRSR = ((regTmp) << 24) | (regRRSR & 0x00ffffff);
4159 write_nic_dword(dev, RRSR, regRRSR);
4160
4161 //
4162 // Set Retry Limit here
4163 //
4164 write_nic_word(dev, RETRY_LIMIT,
4165 priv->ShortRetryLimit << RETRY_LIMIT_SHORT_SHIFT | \
4166 priv->LongRetryLimit << RETRY_LIMIT_LONG_SHIFT);
4167 // Set Contention Window here
4168
4169 // Set Tx AGC
4170
4171 // Set Tx Antenna including Feedback control
4172
4173 // Set Auto Rate fallback control
4174
4175
4176}
4177
5f53d8ca
JC		 4178
4179//
4180// Description:
4181// Initial HW relted registers.
4182//
4183// Assumption:
4184// Config RTL8192S USB MAC, we should config MAC before download FW.
4185//
4186// 2008.09.03, Added by Roger.
4187//
4188static void rtl8192SU_MacConfigBeforeFwDownloadASIC(struct net_device *dev)
4189{
4190 u8 tmpU1b;// i;
4191// u16 tmpU2b;
4192// u32 tmpU4b;
4193 u8 PollingCnt = 20;
4194
4195 RT_TRACE(COMP_INIT, "--->MacConfigBeforeFwDownloadASIC()\n");
4196
4197 //2MAC Initialization for power on sequence, Revised by Roger. 2008.09.03.
4198
4199 //
4200 //<Roger_Notes> Set control path switch to HW control and reset Digital Core, CPU Core and
4201 // MAC I/O to solve FW download fail when system from resume sate.
4202 // 2008.11.04.
4203 //
4204 tmpU1b = read_nic_byte(dev, SYS_CLKR+1);
4205 if(tmpU1b & 0x80)
4206 {
4207 tmpU1b &= 0x3f;
4208 write_nic_byte(dev, SYS_CLKR+1, tmpU1b);
4209 }
4210 // Clear FW RPWM for FW control LPS. by tynli. 2009.02.23
4211 write_nic_byte(dev, RPWM, 0x0);
4212
4213 tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
4214 tmpU1b &= 0x73;
4215 write_nic_byte(dev, SYS_FUNC_EN+1, tmpU1b);
4216 udelay(1000);
4217
4218 //Revised POS, suggested by SD1 Alex, 2008.09.27.
4219 write_nic_byte(dev, SPS0_CTRL+1, 0x53);
4220 write_nic_byte(dev, SPS0_CTRL, 0x57);
4221
4222 //Enable AFE Macro Block's Bandgap adn Enable AFE Macro Block's Mbias
4223 tmpU1b = read_nic_byte(dev, AFE_MISC);
4224 write_nic_byte(dev, AFE_MISC, (tmpU1b|AFE_BGEN|AFE_MBEN));
4225
4226 //Enable PLL Power (LDOA15V)
4227 tmpU1b = read_nic_byte(dev, LDOA15_CTRL);
4228 write_nic_byte(dev, LDOA15_CTRL, (tmpU1b|LDA15_EN));
4229
4230 //Enable LDOV12D block
4231 tmpU1b = read_nic_byte(dev, LDOV12D_CTRL);
4232 write_nic_byte(dev, LDOV12D_CTRL, (tmpU1b|LDV12_EN));
4233
4234 //mpU1b = read_nic_byte(Adapter, SPS1_CTRL);
4235 //write_nic_byte(dev, SPS1_CTRL, (tmpU1b|SPS1_LDEN));
4236
4237 //PlatformSleepUs(2000);
4238
4239 //Enable Switch Regulator Block
4240 //tmpU1b = read_nic_byte(Adapter, SPS1_CTRL);
4241 //write_nic_byte(dev, SPS1_CTRL, (tmpU1b|SPS1_SWEN));
4242
4243 //write_nic_dword(Adapter, SPS1_CTRL, 0x00a7b267);
4244
4245 tmpU1b = read_nic_byte(dev, SYS_ISO_CTRL+1);
4246 write_nic_byte(dev, SYS_ISO_CTRL+1, (tmpU1b|0x08));
4247
4248 //Engineer Packet CP test Enable
4249 tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
4250 write_nic_byte(dev, SYS_FUNC_EN+1, (tmpU1b|0x20));
4251
4252 //Support 64k IMEM, suggested by SD1 Alex.
4253 tmpU1b = read_nic_byte(dev, SYS_ISO_CTRL+1);
4254 write_nic_byte(dev, SYS_ISO_CTRL+1, (tmpU1b& 0x68));
4255
4256 //Enable AFE clock
4257 tmpU1b = read_nic_byte(dev, AFE_XTAL_CTRL+1);
4258 write_nic_byte(dev, AFE_XTAL_CTRL+1, (tmpU1b& 0xfb));
4259
4260 //Enable AFE PLL Macro Block
4261 tmpU1b = read_nic_byte(dev, AFE_PLL_CTRL);
4262 write_nic_byte(dev, AFE_PLL_CTRL, (tmpU1b|0x11));
4263
4264 //Attatch AFE PLL to MACTOP/BB/PCIe Digital
4265 tmpU1b = read_nic_byte(dev, SYS_ISO_CTRL);
4266 write_nic_byte(dev, SYS_ISO_CTRL, (tmpU1b&0xEE));
4267
4268 // Switch to 40M clock
4269 write_nic_byte(dev, SYS_CLKR, 0x00);
4270
4271 //SSC Disable
4272 tmpU1b = read_nic_byte(dev, SYS_CLKR);
4273 //write_nic_byte(dev, SYS_CLKR, (tmpU1b&0x5f));
4274 write_nic_byte(dev, SYS_CLKR, (tmpU1b|0xa0));
4275
4276 //Enable MAC clock
4277 tmpU1b = read_nic_byte(dev, SYS_CLKR+1);
4278 write_nic_byte(dev, SYS_CLKR+1, (tmpU1b|0x18));
4279
4280 //Revised POS, suggested by SD1 Alex, 2008.09.27.
4281 write_nic_byte(dev, PMC_FSM, 0x02);
4282
4283 //Enable Core digital and enable IOREG R/W
4284 tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
4285 write_nic_byte(dev, SYS_FUNC_EN+1, (tmpU1b|0x08));
4286
4287 //Enable REG_EN
4288 tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
4289 write_nic_byte(dev, SYS_FUNC_EN+1, (tmpU1b|0x80));
4290
4291 //Switch the control path to FW
4292 tmpU1b = read_nic_byte(dev, SYS_CLKR+1);
4293 write_nic_byte(dev, SYS_CLKR+1, (tmpU1b|0x80)& 0xBF);
4294
4295 write_nic_byte(dev, CMDR, 0xFC);
4296 write_nic_byte(dev, CMDR+1, 0x37);
4297
4298 //Fix the RX FIFO issue(usb error), 970410
4299 tmpU1b = read_nic_byte_E(dev, 0x5c);
4300 write_nic_byte_E(dev, 0x5c, (tmpU1b|BIT7));
4301
4302 //For power save, used this in the bit file after 970621
4303 tmpU1b = read_nic_byte(dev, SYS_CLKR);
4304 write_nic_byte(dev, SYS_CLKR, tmpU1b&(~SYS_CPU_CLKSEL));
4305
4306 // Revised for 8051 ROM code wrong operation. Added by Roger. 2008.10.16.
4307 write_nic_byte_E(dev, 0x1c, 0x80);
4308
4309 //
4310 // <Roger_EXP> To make sure that TxDMA can ready to download FW.
4311 // We should reset TxDMA if IMEM RPT was not ready.
4312 // Suggested by SD1 Alex. 2008.10.23.
4313 //
4314 do
4315 {
4316 tmpU1b = read_nic_byte(dev, TCR);
4317 if((tmpU1b & TXDMA_INIT_VALUE) == TXDMA_INIT_VALUE)
4318 break;
4319 //PlatformStallExecution(5);
4320 udelay(5);
4321 }while(PollingCnt--); // Delay 1ms
4322
4323 if(PollingCnt <= 0 )
4324 {
4325 RT_TRACE(COMP_INIT, "MacConfigBeforeFwDownloadASIC(): Polling TXDMA_INIT_VALUE timeout!! Current TCR(%#x)\n", tmpU1b);
4326 tmpU1b = read_nic_byte(dev, CMDR);
4327 write_nic_byte(dev, CMDR, tmpU1b&(~TXDMA_EN));
4328 udelay(2);
4329 write_nic_byte(dev, CMDR, tmpU1b|TXDMA_EN);// Reset TxDMA
4330 }
4331
4332
4333 RT_TRACE(COMP_INIT, "<---MacConfigBeforeFwDownloadASIC()\n");
4334}
5f53d8ca 4335
5f53d8ca
JC		 4336//
4337// Description:
4338// Initial HW relted registers.
4339//
4340// Assumption:
4341// 1. This function is only invoked at driver intialization once.
4342// 2. PASSIVE LEVEL.
4343//
4344// 2008.06.10, Added by Roger.
4345//
4346static void rtl8192SU_MacConfigAfterFwDownload(struct net_device *dev)
4347{
4348 struct r8192_priv *priv = ieee80211_priv((struct net_device *)dev);
4349 //PRT_HIGH_THROUGHPUT pHTInfo = priv->ieee80211->pHTInfo;
4350 //u8 tmpU1b, RxPageCfg, i;
4351 u16 tmpU2b;
4352 u8 tmpU1b;//, i;
4353
4354
4355 RT_TRACE(COMP_INIT, "--->MacConfigAfterFwDownload()\n");
4356
4357 // Enable Tx/Rx
4358 tmpU2b = (BBRSTn|BB_GLB_RSTn|SCHEDULE_EN|MACRXEN|MACTXEN|DDMA_EN|
4359 FW2HW_EN|RXDMA_EN|TXDMA_EN|HCI_RXDMA_EN|HCI_TXDMA_EN); //3
4360 //Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_COMMAND, &tmpU1b );
4361 write_nic_word(dev, CMDR, tmpU2b); //LZM REGISTER COM 090305
4362
4363 // Loopback mode or not
4364 priv->LoopbackMode = RTL8192SU_NO_LOOPBACK; // Set no loopback as default.
4365 if(priv->LoopbackMode == RTL8192SU_NO_LOOPBACK)
4366 tmpU1b = LBK_NORMAL;
4367 else if (priv->LoopbackMode == RTL8192SU_MAC_LOOPBACK )
4368 tmpU1b = LBK_MAC_DLB;
4369 else
4370 RT_TRACE(COMP_INIT, "Serious error: wrong loopback mode setting\n");
4371
4372 //Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_LBK_MODE, &tmpU1b);
4373 write_nic_byte(dev, LBKMD_SEL, tmpU1b);
4374
4375 // Set RCR
4376 write_nic_dword(dev, RCR, priv->ReceiveConfig);
4377 RT_TRACE(COMP_INIT, "MacConfigAfterFwDownload(): Current RCR settings(%#x)\n", priv->ReceiveConfig);
4378
4379
4380 // Set RQPN
4381 //
4382 // <Roger_Notes> 2008.08.18.
4383 // 6 endpoints:
4384 // (1) Page number on CMDQ is 0x03.
4385 // (2) Page number on BCNQ, HQ and MGTQ is 0.
4386 // (3) Page number on BKQ, BEQ, VIQ and VOQ are 0x07.
4387 // (4) Page number on PUBQ is 0xdd
4388 //
4389 // 11 endpoints:
4390 // (1) Page number on CMDQ is 0x00.
4391 // (2) Page number on BCNQ is 0x02, HQ and MGTQ are 0x03.
4392 // (3) Page number on BKQ, BEQ, VIQ and VOQ are 0x07.
4393 // (4) Page number on PUBQ is 0xd8
4394 //
4395 //write_nic_dword(Adapter, 0xa0, 0x07070707); //BKQ, BEQ, VIQ and VOQ
4396 //write_nic_byte(dev, 0xa4, 0x00); // HCCAQ
5f53d8ca
JC		 4397
4398 // Fix the RX FIFO issue(USB error), Rivesed by Roger, 2008-06-14
4399 tmpU1b = read_nic_byte_E(dev, 0x5C);
4400 write_nic_byte_E(dev, 0x5C, tmpU1b|BIT7);
4401
5f53d8ca
JC		 4402 // For EFUSE init configuration.
4403 //if (IS_BOOT_FROM_EFUSE(Adapter)) // We may R/W EFUSE in EFUSE mode
4404 if (priv->bBootFromEfuse)
4405 {
4406 u8 tempval;
4407
4408 tempval = read_nic_byte(dev, SYS_ISO_CTRL+1);
4409 tempval &= 0xFE;
4410 write_nic_byte(dev, SYS_ISO_CTRL+1, tempval);
4411
4412 // Enable LDO 2.5V for write action
4413 //tempval = read_nic_byte(Adapter, EFUSE_TEST+3);
4414 //write_nic_byte(Adapter, EFUSE_TEST+3, (tempval | 0x80));
4415
4416 // Change Efuse Clock for write action
4417 //write_nic_byte(Adapter, EFUSE_CLK, 0x03);
4418
4419 // Change Program timing
4420 write_nic_byte(dev, EFUSE_CTRL+3, 0x72);
4421 //printk("!!!!!!!!!!!!!!!!!!!!!%s: write 0x33 with 0x72\n",__FUNCTION__);
4422 RT_TRACE(COMP_INIT, "EFUSE CONFIG OK\n");
4423 }
4424
4425
4426 RT_TRACE(COMP_INIT, "<---MacConfigAfterFwDownload()\n");
4427}
4428
4429void rtl8192SU_HwConfigureRTL8192SUsb(struct net_device *dev)
4430{
4431
4432 struct r8192_priv *priv = ieee80211_priv(dev);
4433 u8 regBwOpMode = 0;
4434 u32 regRATR = 0, regRRSR = 0;
4435 u8 regTmp = 0;
4436 u32 i = 0;
4437
4438 //1 This part need to modified according to the rate set we filtered!!
4439 //
4440 // Set RRSR, RATR, and BW_OPMODE registers
4441 //
4442 switch(priv->ieee80211->mode)
4443 {
4444 case WIRELESS_MODE_B:
4445 regBwOpMode = BW_OPMODE_20MHZ;
4446 regRATR = RATE_ALL_CCK;
4447 regRRSR = RATE_ALL_CCK;
4448 break;
4449 case WIRELESS_MODE_A:
4450 regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ;
4451 regRATR = RATE_ALL_OFDM_AG;
4452 regRRSR = RATE_ALL_OFDM_AG;
4453 break;
4454 case WIRELESS_MODE_G:
4455 regBwOpMode = BW_OPMODE_20MHZ;
4456 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4457 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4458 break;
4459 case WIRELESS_MODE_AUTO:
4460 if (priv->bInHctTest)
4461 {
4462 regBwOpMode = BW_OPMODE_20MHZ;
4463 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4464 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4465 }
4466 else
4467 {
4468 regBwOpMode = BW_OPMODE_20MHZ;
4469 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4470 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4471 }
4472 break;
4473 case WIRELESS_MODE_N_24G:
4474 // It support CCK rate by default.
4475 // CCK rate will be filtered out only when associated AP does not support it.
4476 regBwOpMode = BW_OPMODE_20MHZ;
4477 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4478 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4479 break;
4480 case WIRELESS_MODE_N_5G:
4481 regBwOpMode = BW_OPMODE_5G;
4482 regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4483 regRRSR = RATE_ALL_OFDM_AG;
4484 break;
4485 }
4486
4487 //
4488 // <Roger_Notes> We disable CCK response rate until FIB CCK rate IC's back.
4489 // 2008.09.23.
4490 //
4491 regTmp = read_nic_byte(dev, INIRTSMCS_SEL);
5f53d8ca 4492 regRRSR = ((regRRSR & 0x000fffff)<<8) | regTmp;
5f53d8ca
JC		 4493
4494 //
4495 // Update SIFS timing.
4496 //
4497 //priv->SifsTime = 0x0e0e0a0a;
4498 //Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_SIFS, (pu1Byte)&pHalData->SifsTime);
4499 { u8 val[4] = {0x0e, 0x0e, 0x0a, 0x0a};
4500 // SIFS for CCK Data ACK
4501 write_nic_byte(dev, SIFS_CCK, val[0]);
4502 // SIFS for CCK consecutive tx like CTS data!
4503 write_nic_byte(dev, SIFS_CCK+1, val[1]);
4504
4505 // SIFS for OFDM Data ACK
4506 write_nic_byte(dev, SIFS_OFDM, val[2]);
4507 // SIFS for OFDM consecutive tx like CTS data!
4508 write_nic_byte(dev, SIFS_OFDM+1, val[3]);
4509 }
4510
4511 write_nic_dword(dev, INIRTSMCS_SEL, regRRSR);
4512 write_nic_byte(dev, BW_OPMODE, regBwOpMode);
4513
4514 //
4515 // Suggested by SD1 Alex, 2008-06-14.
4516 //
4517 //PlatformEFIOWrite1Byte(Adapter, TXOP_STALL_CTRL, 0x80);//NAV to protect all TXOP.
4518
4519 //
4520 // Set Data Auto Rate Fallback Retry Count register.
4521 //
4522 write_nic_dword(dev, DARFRC, 0x02010000);
4523 write_nic_dword(dev, DARFRC+4, 0x06050403);
4524 write_nic_dword(dev, RARFRC, 0x02010000);
4525 write_nic_dword(dev, RARFRC+4, 0x06050403);
4526
4527 // Set Data Auto Rate Fallback Reg. Added by Roger, 2008.09.22.
4528 for (i = 0; i < 8; i++)
5f53d8ca 4529 write_nic_dword(dev, ARFR0+i*4, 0x1f0ffff0);
5f53d8ca
JC		 4530
4531 //
4532 // Aggregation length limit. Revised by Roger. 2008.09.22.
4533 //
4534 write_nic_byte(dev, AGGLEN_LMT_H, 0x0f); // Set AMPDU length to 12Kbytes for ShortGI case.
4535 write_nic_dword(dev, AGGLEN_LMT_L, 0xddd77442); // Long GI
4536 write_nic_dword(dev, AGGLEN_LMT_L+4, 0xfffdd772);
4537
4538 // Set NAV protection length
4539 write_nic_word(dev, NAV_PROT_LEN, 0x0080);
4540
4541 // Set TXOP stall control for several queue/HI/BCN/MGT/
4542 write_nic_byte(dev, TXOP_STALL_CTRL, 0x00); // NAV Protect next packet.
4543
4544 // Set MSDU lifetime.
4545 write_nic_byte(dev, MLT, 0x8f);
4546
4547 // Set CCK/OFDM SIFS
4548 write_nic_word(dev, SIFS_CCK, 0x0a0a); // CCK SIFS shall always be 10us.
4549 write_nic_word(dev, SIFS_OFDM, 0x0e0e);
4550
4551 write_nic_byte(dev, ACK_TIMEOUT, 0x40);
4552
4553 // CF-END Threshold
4554 write_nic_byte(dev, CFEND_TH, 0xFF);
4555
4556 //
4557 // For Min Spacing configuration.
4558 //
4559 switch(priv->rf_type)
4560 {
4561 case RF_1T2R:
4562 case RF_1T1R:
4563 RT_TRACE(COMP_INIT, "Initializeadapter: RF_Type%s\n", (priv->rf_type==RF_1T1R? "(1T1R)":"(1T2R)"));
4564 priv->MinSpaceCfg = (MAX_MSS_DENSITY_1T<<3);
4565 break;
4566 case RF_2T2R:
4567 case RF_2T2R_GREEN:
4568 RT_TRACE(COMP_INIT, "Initializeadapter:RF_Type(2T2R)\n");
4569 priv->MinSpaceCfg = (MAX_MSS_DENSITY_2T<<3);
4570 break;
4571 }
4572 write_nic_byte(dev, AMPDU_MIN_SPACE, priv->MinSpaceCfg);
4573
4574 //LZM 090219
4575 //
4576 // For Min Spacing configuration.
4577 //
4578 //priv->MinSpaceCfg = 0x00;
4579 //rtl8192SU_SetHwRegAmpduMinSpace(dev, priv->MinSpaceCfg);
4580}
4581
5f53d8ca 4582
5f53d8ca
JC		 4583// Description: Initial HW relted registers.
4584//
4585// Assumption: This function is only invoked at driver intialization once.
4586//
4587// 2008.06.10, Added by Roger.
4588bool rtl8192SU_adapter_start(struct net_device *dev)
4589{
4590 struct r8192_priv *priv = ieee80211_priv(dev);
4591 //u32 dwRegRead = 0;
4592 //bool init_status = true;
4593 //u32 ulRegRead;
4594 bool rtStatus = true;
4595 //u8 PipeIndex;
4596 //u8 eRFPath, tmpU1b;
4597 u8 fw_download_times = 1;
4598
4599
4600 RT_TRACE(COMP_INIT, "--->InitializeAdapter8192SUsb()\n");
4601
4602 //pHalData->bGPIOChangeRF = FALSE;
4603
4604
4605 //
4606 // <Roger_Notes> 2008.06.15.
4607 //
4608 // Initialization Steps on RTL8192SU:
4609 // a. MAC initialization prior to sending down firmware code.
4610 // b. Download firmware code step by step(i.e., IMEM, EMEM, DMEM).
4611 // c. MAC configuration after firmware has been download successfully.
4612 // d. Initialize BB related configurations.
4613 // e. Initialize RF related configurations.
4614 // f. Start to BulkIn transfer.
4615 //
4616
4617 //
4618 //a. MAC initialization prior to send down firmware code.
4619 //
4620start:
4621 rtl8192SU_MacConfigBeforeFwDownloadASIC(dev);
4622
4623 //
4624 //b. Download firmware code step by step(i.e., IMEM, EMEM, DMEM).
4625 //
4626 rtStatus = FirmwareDownload92S(dev);
4627 if(rtStatus != true)
4628 {
4629 if(fw_download_times == 1){
4630 RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Download Firmware failed once, Download again!!\n");
4631 fw_download_times = fw_download_times + 1;
4632 goto start;
4633 }else{
4634 RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Download Firmware failed twice, end!!\n");
4635 goto end;
4636 }
4637 }
4638 //
4639 //c. MAC configuration after firmware has been download successfully.
4640 //
4641 rtl8192SU_MacConfigAfterFwDownload(dev);
4642
5f53d8ca
JC		 4643 //priv->bLbusEnable = TRUE;
4644 //if(priv->RegRfOff == TRUE)
4645 // priv->eRFPowerState = eRfOff;
4646
4647 // Save target channel
4648 // <Roger_Notes> Current Channel will be updated again later.
4649 //priv->CurrentChannel = Channel;
4650 rtStatus = PHY_MACConfig8192S(dev);//===>ok
4651 if(rtStatus != true)
4652 {
4653 RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Fail to configure MAC!!\n");
4654 goto end;
4655 }
4656 if (1){
4657 int i;
4658 for (i=0; i<4; i++)
4659 write_nic_dword(dev,WDCAPARA_ADD[i], 0x5e4322);
4660 write_nic_byte(dev,AcmHwCtrl, 0x01);
4661 }
4662
4663
4664 //
4665 //d. Initialize BB related configurations.
4666 //
4667
4668 rtStatus = PHY_BBConfig8192S(dev);//===>ok
4669 if(rtStatus != true)
4670 {
4671 RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Fail to configure BB!!\n");
4672 goto end;
4673 }
4674
4675 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter2, 0xff, 0x58);//===>ok
4676
4677 //
4678 // e. Initialize RF related configurations.
4679 //
4680 // 2007/11/02 MH Before initalizing RF. We can not use FW to do RF-R/W.
4681 priv->Rf_Mode = RF_OP_By_SW_3wire;
4682
4683 // For RF test only from Scott's suggestion
4684 //write_nic_byte(dev, 0x27, 0xDB);
4685 //write_nic_byte(dev, 0x1B, 0x07);
4686
4687
4688 write_nic_byte(dev, AFE_XTAL_CTRL+1, 0xDB);
4689
4690 // <Roger_Notes> The following IOs are configured for each RF modules.
4691 // Enable RF module and reset RF and SDM module. 2008.11.17.
4692 if(priv->card_8192_version == VERSION_8192S_ACUT)
4693 write_nic_byte(dev, SPS1_CTRL+3, (u8)(RF_EN|RF_RSTB|RF_SDMRSTB)); // Fix A-Cut bug.
4694 else
4695 write_nic_byte(dev, RF_CTRL, (u8)(RF_EN|RF_RSTB|RF_SDMRSTB));
4696
4697 rtStatus = PHY_RFConfig8192S(dev);//===>ok
4698 if(rtStatus != true)
4699 {
4700 RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Fail to configure RF!!\n");
4701 goto end;
4702 }
4703
4704
4705 // Set CCK and OFDM Block "ON"
4706 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1);
4707 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1);
4708
4709 //
4710 // Turn off Radio B while RF type is 1T1R by SD3 Wilsion's request.
4711 // Revised by Roger, 2008.12.18.
4712 //
4713 if(priv->rf_type == RF_1T1R)
4714 {
4715 // This is needed for PHY_REG after 20081219
4716 rtl8192_setBBreg(dev, rFPGA0_RFMOD, 0xff000000, 0x03);
4717 // This is needed for PHY_REG before 20081219
4718 //PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, bMaskByte0, 0x11);
4719 }
4720
5f53d8ca
JC		 4721
4722 //LZM 090219
4723 // Set CCK and OFDM Block "ON"
4724 //rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1);
4725 //rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1);
4726
4727
4728 //3//Get hardware version, do it in read eeprom?
4729 //GetHardwareVersion819xUsb(Adapter);
4730
4731 //3//
4732 //3 //Set Hardware
4733 //3//
4734 rtl8192SU_HwConfigureRTL8192SUsb(dev);//==>ok
4735
4736 //
4737 // <Roger_Notes> We set MAC address here if autoload was failed before,
4738 // otherwise IDR0 will NOT contain any value.
4739 //
4740 write_nic_dword(dev, IDR0, ((u32*)dev->dev_addr)[0]);
4741 write_nic_word(dev, IDR4, ((u16*)(dev->dev_addr + 4))[0]);
4742 if(!priv->bInHctTest)
4743 {
4744 if(priv->ResetProgress == RESET_TYPE_NORESET)
4745 {
4746 //RT_TRACE(COMP_MLME, DBG_LOUD, ("Initializeadapter8192SUsb():RegWirelessMode(%#x) \n", Adapter->RegWirelessMode));
4747 //Adapter->HalFunc.SetWirelessModeHandler(Adapter, Adapter->RegWirelessMode);
4748 rtl8192_SetWirelessMode(dev, priv->ieee80211->mode);//===>ok
4749 }
4750 }
4751 else
4752 {
4753 priv->ieee80211->mode = WIRELESS_MODE_G;
4754 rtl8192_SetWirelessMode(dev, WIRELESS_MODE_G);
4755 }
4756
4757 //Security related.
4758 //-----------------------------------------------------------------------------
4759 // Set up security related. 070106, by rcnjko:
4760 // 1. Clear all H/W keys.
4761 // 2. Enable H/W encryption/decryption.
4762 //-----------------------------------------------------------------------------
4763 //CamResetAllEntry(Adapter);
4764 //Adapter->HalFunc.EnableHWSecCfgHandler(Adapter);
4765
4766 //SecClearAllKeys(Adapter);
4767 CamResetAllEntry(dev);
4768 //SecInit(Adapter);
4769 {
4770 u8 SECR_value = 0x0;
4771 SECR_value |= SCR_TxEncEnable;
4772 SECR_value |= SCR_RxDecEnable;
4773 SECR_value |= SCR_NoSKMC;
4774 write_nic_byte(dev, SECR, SECR_value);
4775 }
4776
5f53d8ca
JC		 4777#ifdef TO_DO_LIST
4778
4779 //PHY_UpdateInitialGain(dev);
4780
4781 if(priv->RegRfOff == true)
4782 { // User disable RF via registry.
4783 u8 eRFPath = 0;
4784
4785 RT_TRACE((COMP_INIT|COMP_RF), "InitializeAdapter8192SUsb(): Turn off RF for RegRfOff ----------\n");
4786 MgntActSet_RF_State(dev, eRfOff, RF_CHANGE_BY_SW);
4787 // Those action will be discard in MgntActSet_RF_State because off the same state
4788 for(eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++)
4789 rtl8192_setBBreg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x0);
4790 }
4791 else if(priv->RfOffReason > RF_CHANGE_BY_PS)
4792 { // H/W or S/W RF OFF before sleep.
4793 RT_TRACE((COMP_INIT|COMP_RF), "InitializeAdapter8192SUsb(): Turn off RF for RfOffReason(%d) ----------\n", priv->RfOffReason);
4794 MgntActSet_RF_State(dev, eRfOff, priv->RfOffReason);
4795 }
4796 else
4797 {
4798 priv->eRFPowerState = eRfOn;
4799 priv->RfOffReason = 0;
4800 RT_TRACE((COMP_INIT|COMP_RF), "InitializeAdapter8192SUsb(): RF is on ----------\n");
4801 }
4802
4803#endif
4804
4805
4806//
4807// f. Start to BulkIn transfer.
4808//
4809#ifdef TO_DO_LIST
4810
4811#ifndef UNDER_VISTA
4812 {
4813 u8 i;
4814 PlatformAcquireSpinLock(Adapter, RT_RX_SPINLOCK);
4815
4816 for(PipeIndex=0; PipeIndex < MAX_RX_QUEUE; PipeIndex++)
4817 {
4818 if (PipeIndex == 0)
4819 {
4820 for(i=0; i<32; i++)
4821 HalUsbInMpdu(Adapter, PipeIndex);
4822 }
4823 else
4824 {
4825 //HalUsbInMpdu(Adapter, PipeIndex);
4826 //HalUsbInMpdu(Adapter, PipeIndex);
4827 //HalUsbInMpdu(Adapter, PipeIndex);
4828 }
4829 }
4830 PlatformReleaseSpinLock(Adapter, RT_RX_SPINLOCK);
4831 }
4832#else
4833 // Joseph add to 819X code base for Vista USB platform.
4834 // This part may need to be add to Hal819xU code base. too.
4835 PlatformUsbEnableInPipes(Adapter);
4836#endif
4837
4838 RT_TRACE(COMP_INIT, "HighestOperaRate = %x\n", Adapter->MgntInfo.HighestOperaRate);
4839
4840 PlatformStartWorkItem( &(pHalData->RtUsbCheckForHangWorkItem) );
4841
4842 //
4843 // <Roger_EXP> The following configurations are for ASIC verification temporally.
4844 // 2008.07.10.
4845 //
4846
4847#endif
4848
4849 //
4850 // Read EEPROM TX power index and PHY_REG_PG.txt to capture correct
4851 // TX power index for different rate set.
4852 //
4853 //if(priv->card_8192_version >= VERSION_8192S_ACUT)
4854 {
4855 // Get original hw reg values
4856 PHY_GetHWRegOriginalValue(dev);
4857
4858 // Write correct tx power index//FIXLZM
4859 PHY_SetTxPowerLevel8192S(dev, priv->chan);
4860 }
4861
4862 {
4863 u8 tmpU1b = 0;
4864 // EEPROM R/W workaround
4865 tmpU1b = read_nic_byte(dev, MAC_PINMUX_CFG);
4866 write_nic_byte(dev, MAC_PINMUX_CFG, tmpU1b&(~GPIOMUX_EN));
4867 }
4868
4869//
4870//<Roger_Notes> 2008.08.19.
4871// We return status here for temporal FPGA verification, 2008.08.19.
4872
4873#ifdef RTL8192SU_FW_IQK
4874 write_nic_dword(dev, WFM5, FW_IQK_ENABLE);
4875 ChkFwCmdIoDone(dev);
4876#endif
4877
4878 //
4879 // <Roger_Notes> We enable high power mechanism after NIC initialized.
4880 // 2008.11.27.
4881 //
4882 write_nic_dword(dev, WFM5, FW_RA_RESET);
4883 ChkFwCmdIoDone(dev);
4884 write_nic_dword(dev, WFM5, FW_RA_ACTIVE);
4885 ChkFwCmdIoDone(dev);
4886 write_nic_dword(dev, WFM5, FW_RA_REFRESH);
4887 ChkFwCmdIoDone(dev);
4888 write_nic_dword(dev, WFM5, FW_BB_RESET_ENABLE);
4889
4890// <Roger_Notes> We return status here for temporal FPGA verification. 2008.05.12.
4891//
5f53d8ca 4892
5f53d8ca
JC		 4893end:
4894return rtStatus;
4895}
4896
5f53d8ca
JC		 4897/***************************************************************************
4898 -------------------------------NET STUFF---------------------------
4899***************************************************************************/
4900
4901static struct net_device_stats *rtl8192_stats(struct net_device *dev)
4902{
4903 struct r8192_priv *priv = ieee80211_priv(dev);
4904
4905 return &priv->ieee80211->stats;
4906}
4907
4908bool
4909HalTxCheckStuck819xUsb(
4910 struct net_device *dev
4911 )
4912{
4913 struct r8192_priv *priv = ieee80211_priv(dev);
4914 u16 RegTxCounter = read_nic_word(dev, 0x128);
4915 bool bStuck = FALSE;
4916 RT_TRACE(COMP_RESET,"%s():RegTxCounter is %d,TxCounter is %d\n",__FUNCTION__,RegTxCounter,priv->TxCounter);
4917 if(priv->TxCounter==RegTxCounter)
4918 bStuck = TRUE;
4919
4920 priv->TxCounter = RegTxCounter;
4921
4922 return bStuck;
4923}
4924
4925/*
4926* <Assumption: RT_TX_SPINLOCK is acquired.>
4927* First added: 2006.11.19 by emily
4928*/
4929RESET_TYPE
4930TxCheckStuck(struct net_device *dev)
4931{
4932 struct r8192_priv *priv = ieee80211_priv(dev);
4933 u8 QueueID;
4934// PRT_TCB pTcb;
4935// u8 ResetThreshold;
4936 bool bCheckFwTxCnt = false;
4937 //unsigned long flags;
4938
4939 //
4940 // Decide Stuch threshold according to current power save mode
4941 //
4942
4943// RT_TRACE(COMP_RESET, " ==> TxCheckStuck()\n");
4944// PlatformAcquireSpinLock(Adapter, RT_TX_SPINLOCK);
4945// spin_lock_irqsave(&priv->ieee80211->lock,flags);
4946 for (QueueID = 0; QueueID<=BEACON_QUEUE;QueueID ++)
4947 {
4948 if(QueueID == TXCMD_QUEUE)
4949 continue;
4950#if 1
5f53d8ca 4951 if((skb_queue_len(&priv->ieee80211->skb_waitQ[QueueID]) == 0) && (skb_queue_len(&priv->ieee80211->skb_aggQ[QueueID]) == 0))
5f53d8ca
JC		 4952 continue;
4953#endif
4954
4955 bCheckFwTxCnt = true;
4956 }
4957// PlatformReleaseSpinLock(Adapter, RT_TX_SPINLOCK);
4958// spin_unlock_irqrestore(&priv->ieee80211->lock,flags);
4959// RT_TRACE(COMP_RESET,"bCheckFwTxCnt is %d\n",bCheckFwTxCnt);
4960#if 1
4961 if(bCheckFwTxCnt)
4962 {
4963 if(HalTxCheckStuck819xUsb(dev))
4964 {
4965 RT_TRACE(COMP_RESET, "TxCheckStuck(): Fw indicates no Tx condition! \n");
4966 return RESET_TYPE_SILENT;
4967 }
4968 }
4969#endif
4970 return RESET_TYPE_NORESET;
4971}
4972
4973bool
4974HalRxCheckStuck819xUsb(struct net_device *dev)
4975{
4976 u16 RegRxCounter = read_nic_word(dev, 0x130);
4977 struct r8192_priv *priv = ieee80211_priv(dev);
4978 bool bStuck = FALSE;
4979//#ifdef RTL8192SU
4980
4981//#else
4982 static u8 rx_chk_cnt = 0;
4983 RT_TRACE(COMP_RESET,"%s(): RegRxCounter is %d,RxCounter is %d\n",__FUNCTION__,RegRxCounter,priv->RxCounter);
4984 // If rssi is small, we should check rx for long time because of bad rx.
4985 // or maybe it will continuous silent reset every 2 seconds.
4986 rx_chk_cnt++;
4987 if(priv->undecorated_smoothed_pwdb >= (RateAdaptiveTH_High+5))
4988 {
4989 rx_chk_cnt = 0; //high rssi, check rx stuck right now.
4990 }
4991 else if(priv->undecorated_smoothed_pwdb < (RateAdaptiveTH_High+5) &&
4992 ((priv->CurrentChannelBW!=HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_40M) ||
4993 (priv->CurrentChannelBW==HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_20M)) )
4994 {
4995 if(rx_chk_cnt < 2)
4996 {
4997 return bStuck;
4998 }
4999 else
5000 {
5001 rx_chk_cnt = 0;
5002 }
5003 }
5004 else if(((priv->CurrentChannelBW!=HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb<RateAdaptiveTH_Low_40M) ||
5005 (priv->CurrentChannelBW==HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb<RateAdaptiveTH_Low_20M)) &&
5006 priv->undecorated_smoothed_pwdb >= VeryLowRSSI)
5007 {
5008 if(rx_chk_cnt < 4)
5009 {
5010 //DbgPrint("RSSI < %d && RSSI >= %d, no check this time \n", RateAdaptiveTH_Low, VeryLowRSSI);
5011 return bStuck;
5012 }
5013 else
5014 {
5015 rx_chk_cnt = 0;
5016 //DbgPrint("RSSI < %d && RSSI >= %d, check this time \n", RateAdaptiveTH_Low, VeryLowRSSI);
5017 }
5018 }
5019 else
5020 {
5021 if(rx_chk_cnt < 8)
5022 {
5023 //DbgPrint("RSSI <= %d, no check this time \n", VeryLowRSSI);
5024 return bStuck;
5025 }
5026 else
5027 {
5028 rx_chk_cnt = 0;
5029 //DbgPrint("RSSI <= %d, check this time \n", VeryLowRSSI);
5030 }
5031 }
5032//#endif
5033
5034 if(priv->RxCounter==RegRxCounter)
5035 bStuck = TRUE;
5036
5037 priv->RxCounter = RegRxCounter;
5038
5039 return bStuck;
5040}
5041
5042RESET_TYPE
5043RxCheckStuck(struct net_device *dev)
5044{
5045 struct r8192_priv *priv = ieee80211_priv(dev);
5046 //int i;
5047 bool bRxCheck = FALSE;
5048
5049// RT_TRACE(COMP_RESET," ==> RxCheckStuck()\n");
5050 //PlatformAcquireSpinLock(Adapter, RT_RX_SPINLOCK);
5051
5052 if(priv->IrpPendingCount > 1)
5053 bRxCheck = TRUE;
5054 //PlatformReleaseSpinLock(Adapter, RT_RX_SPINLOCK);
5055
5056// RT_TRACE(COMP_RESET,"bRxCheck is %d \n",bRxCheck);
5057 if(bRxCheck)
5058 {
5059 if(HalRxCheckStuck819xUsb(dev))
5060 {
5061 RT_TRACE(COMP_RESET, "RxStuck Condition\n");
5062 return RESET_TYPE_SILENT;
5063 }
5064 }
5065 return RESET_TYPE_NORESET;
5066}
5067
5068
5069/**
5070* This function is called by Checkforhang to check whether we should ask OS to reset driver
5071*
5072* \param pAdapter The adapter context for this miniport
5073*
5074* Note:NIC with USB interface sholud not call this function because we cannot scan descriptor
5075* to judge whether there is tx stuck.
5076* Note: This function may be required to be rewrite for Vista OS.
5077* <<<Assumption: Tx spinlock has been acquired >>>
5078*
5079* 8185 and 8185b does not implement this function. This is added by Emily at 2006.11.24
5080*/
5081RESET_TYPE
5082rtl819x_ifcheck_resetornot(struct net_device *dev)
5083{
5084 struct r8192_priv *priv = ieee80211_priv(dev);
5085 RESET_TYPE TxResetType = RESET_TYPE_NORESET;
5086 RESET_TYPE RxResetType = RESET_TYPE_NORESET;
5087 RT_RF_POWER_STATE rfState;
5088
5f53d8ca 5089 return RESET_TYPE_NORESET;
5f53d8ca
JC		 5090
5091 rfState = priv->ieee80211->eRFPowerState;
5092
5093 TxResetType = TxCheckStuck(dev);
5094#if 1
5095 if( rfState != eRfOff ||
5096 /*ADAPTER_TEST_STATUS_FLAG(Adapter, ADAPTER_STATUS_FW_DOWNLOAD_FAILURE)) &&*/
5097 (priv->ieee80211->iw_mode != IW_MODE_ADHOC))
5098 {
5099 // If driver is in the status of firmware download failure , driver skips RF initialization and RF is
5100 // in turned off state. Driver should check whether Rx stuck and do silent reset. And
5101 // if driver is in firmware download failure status, driver should initialize RF in the following
5102 // silent reset procedure Emily, 2008.01.21
5103
5104 // Driver should not check RX stuck in IBSS mode because it is required to
5105 // set Check BSSID in order to send beacon, however, if check BSSID is
5106 // set, STA cannot hear any packet a all. Emily, 2008.04.12
5107 RxResetType = RxCheckStuck(dev);
5108 }
5109#endif
5110 if(TxResetType==RESET_TYPE_NORMAL || RxResetType==RESET_TYPE_NORMAL)
5111 return RESET_TYPE_NORMAL;
5112 else if(TxResetType==RESET_TYPE_SILENT || RxResetType==RESET_TYPE_SILENT){
5113 RT_TRACE(COMP_RESET,"%s():silent reset\n",__FUNCTION__);
5114 return RESET_TYPE_SILENT;
5115 }
5116 else
5117 return RESET_TYPE_NORESET;
5118
5119}
5120
5121void rtl8192_cancel_deferred_work(struct r8192_priv* priv);
5122int _rtl8192_up(struct net_device *dev);
5123int rtl8192_close(struct net_device *dev);
5124
5125
5126
5127void
5128CamRestoreAllEntry( struct net_device *dev)
5129{
5130 u8 EntryId = 0;
5131 struct r8192_priv *priv = ieee80211_priv(dev);
5132 u8* MacAddr = priv->ieee80211->current_network.bssid;
5133
5134 static u8 CAM_CONST_ADDR[4][6] = {
5135 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
5136 {0x00, 0x00, 0x00, 0x00, 0x00, 0x01},
5137 {0x00, 0x00, 0x00, 0x00, 0x00, 0x02},
5138 {0x00, 0x00, 0x00, 0x00, 0x00, 0x03}};
5139 static u8 CAM_CONST_BROAD[] =
5140 {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
5141
5142 RT_TRACE(COMP_SEC, "CamRestoreAllEntry: \n");
5143
5144
5145 if ((priv->ieee80211->pairwise_key_type == KEY_TYPE_WEP40)||
5146 (priv->ieee80211->pairwise_key_type == KEY_TYPE_WEP104))
5147 {
5148
5149 for(EntryId=0; EntryId<4; EntryId++)
5150 {
5151 {
5152 MacAddr = CAM_CONST_ADDR[EntryId];
5153 setKey(dev,
5154 EntryId ,
5155 EntryId,
5156 priv->ieee80211->pairwise_key_type,
5157 MacAddr,
5158 0,
5159 NULL);
5160 }
5161 }
5162
5163 }
5164 else if(priv->ieee80211->pairwise_key_type == KEY_TYPE_TKIP)
5165 {
5166
5167 {
5168 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5169 setKey(dev,
5170 4,
5171 0,
5172 priv->ieee80211->pairwise_key_type,
5173 (u8*)dev->dev_addr,
5174 0,
5175 NULL);
5176 else
5177 setKey(dev,
5178 4,
5179 0,
5180 priv->ieee80211->pairwise_key_type,
5181 MacAddr,
5182 0,
5183 NULL);
5184 }
5185 }
5186 else if(priv->ieee80211->pairwise_key_type == KEY_TYPE_CCMP)
5187 {
5188
5189 {
5190 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5191 setKey(dev,
5192 4,
5193 0,
5194 priv->ieee80211->pairwise_key_type,
5195 (u8*)dev->dev_addr,
5196 0,
5197 NULL);
5198 else
5199 setKey(dev,
5200 4,
5201 0,
5202 priv->ieee80211->pairwise_key_type,
5203 MacAddr,
5204 0,
5205 NULL);
5206 }
5207 }
5208
5209
5210
5211 if(priv->ieee80211->group_key_type == KEY_TYPE_TKIP)
5212 {
5213 MacAddr = CAM_CONST_BROAD;
5214 for(EntryId=1 ; EntryId<4 ; EntryId++)
5215 {
5216 {
5217 setKey(dev,
5218 EntryId,
5219 EntryId,
5220 priv->ieee80211->group_key_type,
5221 MacAddr,
5222 0,
5223 NULL);
5224 }
5225 }
5226 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5227 setKey(dev,
5228 0,
5229 0,
5230 priv->ieee80211->group_key_type,
5231 CAM_CONST_ADDR[0],
5232 0,
5233 NULL);
5234 }
5235 else if(priv->ieee80211->group_key_type == KEY_TYPE_CCMP)
5236 {
5237 MacAddr = CAM_CONST_BROAD;
5238 for(EntryId=1; EntryId<4 ; EntryId++)
5239 {
5240 {
5241 setKey(dev,
5242 EntryId ,
5243 EntryId,
5244 priv->ieee80211->group_key_type,
5245 MacAddr,
5246 0,
5247 NULL);
5248 }
5249 }
5250
5251 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5252 setKey(dev,
5253 0 ,
5254 0,
5255 priv->ieee80211->group_key_type,
5256 CAM_CONST_ADDR[0],
5257 0,
5258 NULL);
5259 }
5260}
5261//////////////////////////////////////////////////////////////
5262// This function is used to fix Tx/Rx stop bug temporarily.
5263// This function will do "system reset" to NIC when Tx or Rx is stuck.
5264// The method checking Tx/Rx stuck of this function is supported by FW,
5265// which reports Tx and Rx counter to register 0x128 and 0x130.
5266//////////////////////////////////////////////////////////////
5267void
5268rtl819x_ifsilentreset(struct net_device *dev)
5269{
5270 //OCTET_STRING asocpdu;
5271 struct r8192_priv *priv = ieee80211_priv(dev);
5272 u8 reset_times = 0;
5273 int reset_status = 0;
5274 struct ieee80211_device *ieee = priv->ieee80211;
5275
5276
5277 // 2007.07.20. If we need to check CCK stop, please uncomment this line.
5278 //bStuck = Adapter->HalFunc.CheckHWStopHandler(Adapter);
5279
5280 if(priv->ResetProgress==RESET_TYPE_NORESET)
5281 {
5282RESET_START:
5283
5284 RT_TRACE(COMP_RESET,"=========>Reset progress!! \n");
5285
5286 // Set the variable for reset.
5287 priv->ResetProgress = RESET_TYPE_SILENT;
5288// rtl8192_close(dev);
5289#if 1
5290 down(&priv->wx_sem);
5291 if(priv->up == 0)
5292 {
5293 RT_TRACE(COMP_ERR,"%s():the driver is not up! return\n",__FUNCTION__);
5294 up(&priv->wx_sem);
5295 return ;
5296 }
5297 priv->up = 0;
5298 RT_TRACE(COMP_RESET,"%s():======>start to down the driver\n",__FUNCTION__);
5299// if(!netif_queue_stopped(dev))
5300// netif_stop_queue(dev);
5301
5302 rtl8192_rtx_disable(dev);
5303 rtl8192_cancel_deferred_work(priv);
5304 deinit_hal_dm(dev);
5305 del_timer_sync(&priv->watch_dog_timer);
5306
5307 ieee->sync_scan_hurryup = 1;
5308 if(ieee->state == IEEE80211_LINKED)
5309 {
5310 down(&ieee->wx_sem);
5311 printk("ieee->state is IEEE80211_LINKED\n");
5312 ieee80211_stop_send_beacons(priv->ieee80211);
5313 del_timer_sync(&ieee->associate_timer);
5f53d8ca 5314 cancel_delayed_work(&ieee->associate_retry_wq);
5f53d8ca
JC		 5315 ieee80211_stop_scan(ieee);
5316 netif_carrier_off(dev);
5317 up(&ieee->wx_sem);
5318 }
5319 else{
5320 printk("ieee->state is NOT LINKED\n");
5321 ieee80211_softmac_stop_protocol(priv->ieee80211); }
5322 up(&priv->wx_sem);
5323 RT_TRACE(COMP_RESET,"%s():<==========down process is finished\n",__FUNCTION__);
5324 //rtl8192_irq_disable(dev);
5325 RT_TRACE(COMP_RESET,"%s():===========>start to up the driver\n",__FUNCTION__);
5326 reset_status = _rtl8192_up(dev);
5327
5328 RT_TRACE(COMP_RESET,"%s():<===========up process is finished\n",__FUNCTION__);
5329 if(reset_status == -EAGAIN)
5330 {
5331 if(reset_times < 3)
5332 {
5333 reset_times++;
5334 goto RESET_START;
5335 }
5336 else
5337 {
5338 RT_TRACE(COMP_ERR," ERR!!! %s(): Reset Failed!!\n", __FUNCTION__);
5339 }
5340 }
5341#endif
5342 ieee->is_silent_reset = 1;
5343#if 1
5344 EnableHWSecurityConfig8192(dev);
5345#if 1
5346 if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_INFRA)
5347 {
5348 ieee->set_chan(ieee->dev, ieee->current_network.channel);
5349
5350#if 1
5f53d8ca 5351 queue_work(ieee->wq, &ieee->associate_complete_wq);
5f53d8ca
JC		 5352#endif
5353
5354 }
5355 else if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_ADHOC)
5356 {
5357 ieee->set_chan(ieee->dev, ieee->current_network.channel);
5358 ieee->link_change(ieee->dev);
5359
5360 // notify_wx_assoc_event(ieee);
5361
5362 ieee80211_start_send_beacons(ieee);
5363
5364 if (ieee->data_hard_resume)
5365 ieee->data_hard_resume(ieee->dev);
5366 netif_carrier_on(ieee->dev);
5367 }
5368#endif
5369
5370 CamRestoreAllEntry(dev);
5371
5372 priv->ResetProgress = RESET_TYPE_NORESET;
5373 priv->reset_count++;
5374
5375 priv->bForcedSilentReset =false;
5376 priv->bResetInProgress = false;
5377
5378 // For test --> force write UFWP.
5379 write_nic_byte(dev, UFWP, 1);
5380 RT_TRACE(COMP_RESET, "Reset finished!! ====>[%d]\n", priv->reset_count);
5381#endif
5382 }
5383}
5384
5385void CAM_read_entry(
5386 struct net_device *dev,
5387 u32 iIndex
5388)
5389{
5390 u32 target_command=0;
5391 u32 target_content=0;
5392 u8 entry_i=0;
5393 u32 ulStatus;
5394 s32 i=100;
5395// printk("=======>start read CAM\n");
5396 for(entry_i=0;entry_i<CAM_CONTENT_COUNT;entry_i++)
5397 {
5398 // polling bit, and No Write enable, and address
5399 target_command= entry_i+CAM_CONTENT_COUNT*iIndex;
5400 target_command= target_command | BIT31;
5401
5402 //Check polling bit is clear
5403// mdelay(1);
5404#if 1
5405 while((i--)>=0)
5406 {
5407 ulStatus = read_nic_dword(dev, RWCAM);
5408 if(ulStatus & BIT31){
5409 continue;
5410 }
5411 else{
5412 break;
5413 }
5414 }
5415#endif
5416 write_nic_dword(dev, RWCAM, target_command);
5417 RT_TRACE(COMP_SEC,"CAM_read_entry(): WRITE A0: %x \n",target_command);
5418 // printk("CAM_read_entry(): WRITE A0: %lx \n",target_command);
5419 target_content = read_nic_dword(dev, RCAMO);
5420 RT_TRACE(COMP_SEC, "CAM_read_entry(): WRITE A8: %x \n",target_content);
5421 // printk("CAM_read_entry(): WRITE A8: %lx \n",target_content);
5422 }
5423 printk("\n");
5424}
5425
5426void rtl819x_update_rxcounts(
5427 struct r8192_priv *priv,
5428 u32* TotalRxBcnNum,
5429 u32* TotalRxDataNum
5430)
5431{
5432 u16 SlotIndex;
5433 u8 i;
5434
5435 *TotalRxBcnNum = 0;
5436 *TotalRxDataNum = 0;
5437
5438 SlotIndex = (priv->ieee80211->LinkDetectInfo.SlotIndex++)%(priv->ieee80211->LinkDetectInfo.SlotNum);
5439 priv->ieee80211->LinkDetectInfo.RxBcnNum[SlotIndex] = priv->ieee80211->LinkDetectInfo.NumRecvBcnInPeriod;
5440 priv->ieee80211->LinkDetectInfo.RxDataNum[SlotIndex] = priv->ieee80211->LinkDetectInfo.NumRecvDataInPeriod;
5441 for( i=0; i<priv->ieee80211->LinkDetectInfo.SlotNum; i++ ){
5442 *TotalRxBcnNum += priv->ieee80211->LinkDetectInfo.RxBcnNum[i];
5443 *TotalRxDataNum += priv->ieee80211->LinkDetectInfo.RxDataNum[i];
5444 }
5445}
5446
458659e2 5447void rtl819x_watchdog_wqcallback(struct work_struct *work)
5f53d8ca 5448{
458659e2
FS		 5449 struct delayed_work *dwork = container_of(work,
5450 struct delayed_work,
5451 work);
5452 struct r8192_priv *priv = container_of(dwork,
5453 struct r8192_priv,
5454 watch_dog_wq);
5455 struct net_device *dev = priv->ieee80211->dev;
5f53d8ca 5456 struct ieee80211_device* ieee = priv->ieee80211;
458659e2 5457 RESET_TYPE ResetType = RESET_TYPE_NORESET;
ebbfda1e
FS		 5458 static u8 check_reset_cnt;
5459 u32 TotalRxBcnNum = 0;
5460 u32 TotalRxDataNum = 0;
5f53d8ca
JC		 5461 bool bBusyTraffic = false;
5462
5463 if(!priv->up)
5464 return;
5465 hal_dm_watchdog(dev);
458659e2
FS		 5466 /* to get busy traffic condition */
5467 if (ieee->state == IEEE80211_LINKED) {
5468 if (ieee->LinkDetectInfo.NumRxOkInPeriod > 666 ||
5469 ieee->LinkDetectInfo.NumTxOkInPeriod > 666)
5f53d8ca 5470 bBusyTraffic = true;
5f53d8ca 5471
458659e2
FS		 5472 ieee->LinkDetectInfo.NumRxOkInPeriod = 0;
5473 ieee->LinkDetectInfo.NumTxOkInPeriod = 0;
5474 ieee->LinkDetectInfo.bBusyTraffic = bBusyTraffic;
5475 }
5476
5477 if (priv->ieee80211->state == IEEE80211_LINKED &&
5478 priv->ieee80211->iw_mode == IW_MODE_INFRA) {
458659e2
FS		 5479 rtl819x_update_rxcounts(priv, &TotalRxBcnNum, &TotalRxDataNum);
5480 if ((TotalRxBcnNum + TotalRxDataNum) == 0) {
ebbfda1e 5481 RT_TRACE(COMP_ERR, "%s(): AP is powered off,"
458659e2
FS		 5482 "connect another one\n", __func__);
5483 /* Dot11d_Reset(dev); */
5484 priv->ieee80211->state = IEEE80211_ASSOCIATING;
5485 notify_wx_assoc_event(priv->ieee80211);
5486 RemovePeerTS(priv->ieee80211,
5487 priv->ieee80211->current_network.bssid);
458659e2
FS		 5488 ieee->is_roaming = true;
5489 priv->ieee80211->link_change(dev);
5490 queue_work(priv->ieee80211->wq,
5491 &priv->ieee80211->associate_procedure_wq);
5f53d8ca 5492 }
5f53d8ca 5493 }
458659e2
FS		 5494 priv->ieee80211->LinkDetectInfo.NumRecvBcnInPeriod = 0;
5495 priv->ieee80211->LinkDetectInfo.NumRecvDataInPeriod = 0;
5496
5497 /*
5498 * CAM_read_entry(dev,4);
5499 * check if reset the driver
5500 */
5501 if (check_reset_cnt++ >= 3 && !ieee->is_roaming) {
5502 ResetType = rtl819x_ifcheck_resetornot(dev);
5f53d8ca 5503 check_reset_cnt = 3;
5f53d8ca 5504 }
458659e2 5505 if ((priv->force_reset) || (priv->ResetProgress == RESET_TYPE_NORESET &&
5f53d8ca 5506 (priv->bForcedSilentReset ||
458659e2
FS		 5507 (!priv->bDisableNormalResetCheck &&
5508 /* This is control by OID set in Pomelo */
5509 ResetType == RESET_TYPE_SILENT)))) {
ebbfda1e 5510 RT_TRACE(COMP_RESET, "%s(): priv->force_reset is %d,"
458659e2
FS		 5511 "priv->ResetProgress is %d, "
5512 "priv->bForcedSilentReset is %d, "
5513 "priv->bDisableNormalResetCheck is %d, "
ebbfda1e 5514 "ResetType is %d",
458659e2
FS		 5515 __func__,
5516 priv->force_reset,
5517 priv->ResetProgress,
5518 priv->bForcedSilentReset,
5519 priv->bDisableNormalResetCheck,
5520 ResetType);
5f53d8ca
JC		 5521 rtl819x_ifsilentreset(dev);
5522 }
5f53d8ca
JC		 5523 priv->force_reset = false;
5524 priv->bForcedSilentReset = false;
5525 priv->bResetInProgress = false;
5f53d8ca
JC		 5526}
5527
5528void watch_dog_timer_callback(unsigned long data)
5529{
5530 struct r8192_priv *priv = ieee80211_priv((struct net_device *) data);
5531 //printk("===============>watch_dog timer\n");
5f53d8ca 5532 queue_delayed_work(priv->priv_wq,&priv->watch_dog_wq, 0);
5f53d8ca 5533 mod_timer(&priv->watch_dog_timer, jiffies + MSECS(IEEE80211_WATCH_DOG_TIME));
5f53d8ca
JC		 5534}
5535int _rtl8192_up(struct net_device *dev)
5536{
5537 struct r8192_priv *priv = ieee80211_priv(dev);
5538 //int i;
5539 int init_status = 0;
5540 priv->up=1;
5541 priv->ieee80211->ieee_up=1;
5542 RT_TRACE(COMP_INIT, "Bringing up iface");
5543 init_status = priv->ops->rtl819x_adapter_start(dev);
5544 if(!init_status)
5545 {
5546 RT_TRACE(COMP_ERR,"ERR!!! %s(): initialization is failed!\n", __FUNCTION__);
5547 priv->up=priv->ieee80211->ieee_up = 0;
5548 return -EAGAIN;
5549 }
5550 RT_TRACE(COMP_INIT, "start adapter finished\n");
5551 rtl8192_rx_enable(dev);
5552// rtl8192_tx_enable(dev);
5553 if(priv->ieee80211->state != IEEE80211_LINKED)
5554 ieee80211_softmac_start_protocol(priv->ieee80211);
5555 ieee80211_reset_queue(priv->ieee80211);
5556 watch_dog_timer_callback((unsigned long) dev);
5557 if(!netif_queue_stopped(dev))
5558 netif_start_queue(dev);
5559 else
5560 netif_wake_queue(dev);
5561
5562 /*
5563 * Make sure that drop_unencrypted is initialized as "0"
5564 * No packets will be sent in non-security mode if we had set drop_unencrypted.
5565 * ex, After kill wpa_supplicant process, make the driver up again.
5566 * drop_unencrypted remains as "1", which is set by wpa_supplicant. 2008/12/04.john
5567 */
5568 priv->ieee80211->drop_unencrypted = 0;
5569
5570 return 0;
5571}
5572
5573
5574int rtl8192_open(struct net_device *dev)
5575{
5576 struct r8192_priv *priv = ieee80211_priv(dev);
5577 int ret;
5578 down(&priv->wx_sem);
5579 ret = rtl8192_up(dev);
5580 up(&priv->wx_sem);
5581 return ret;
5582
5583}
5584
5585
5586int rtl8192_up(struct net_device *dev)
5587{
5588 struct r8192_priv *priv = ieee80211_priv(dev);
5589
5590 if (priv->up == 1) return -1;
5591
5592 return _rtl8192_up(dev);
5593}
5594
5595
5596int rtl8192_close(struct net_device *dev)
5597{
5598 struct r8192_priv *priv = ieee80211_priv(dev);
5599 int ret;
5600
5601 down(&priv->wx_sem);
5602
5603 ret = rtl8192_down(dev);
5604
5605 up(&priv->wx_sem);
5606
5607 return ret;
5608
5609}
5610
5611int rtl8192_down(struct net_device *dev)
5612{
5613 struct r8192_priv *priv = ieee80211_priv(dev);
5614 int i;
5615
5616 if (priv->up == 0) return -1;
5617
5618 priv->up=0;
5619 priv->ieee80211->ieee_up = 0;
5620 RT_TRACE(COMP_DOWN, "==========>%s()\n", __FUNCTION__);
5621/* FIXME */
5622 if (!netif_queue_stopped(dev))
5623 netif_stop_queue(dev);
5624
5625 rtl8192_rtx_disable(dev);
5626 //rtl8192_irq_disable(dev);
5627
5628 /* Tx related queue release */
5629 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
5630 skb_queue_purge(&priv->ieee80211->skb_waitQ [i]);
5631 }
5632 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
5633 skb_queue_purge(&priv->ieee80211->skb_aggQ [i]);
5634 }
5635
5636 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
5637 skb_queue_purge(&priv->ieee80211->skb_drv_aggQ [i]);
5638 }
5639
5640 //as cancel_delayed_work will del work->timer, so if work is not definedas struct delayed_work, it will corrupt
5641// flush_scheduled_work();
5642 rtl8192_cancel_deferred_work(priv);
5643 deinit_hal_dm(dev);
5644 del_timer_sync(&priv->watch_dog_timer);
5645
5646
5647 ieee80211_softmac_stop_protocol(priv->ieee80211);
5648 memset(&priv->ieee80211->current_network, 0 , offsetof(struct ieee80211_network, list));
5649 RT_TRACE(COMP_DOWN, "<==========%s()\n", __FUNCTION__);
5650
5651 return 0;
5652}
5653
5654
5655void rtl8192_commit(struct net_device *dev)
5656{
5657 struct r8192_priv *priv = ieee80211_priv(dev);
5658 int reset_status = 0;
5659 //u8 reset_times = 0;
5660 if (priv->up == 0) return ;
5661 priv->up = 0;
5662
5663 rtl8192_cancel_deferred_work(priv);
5664 del_timer_sync(&priv->watch_dog_timer);
5665 //cancel_delayed_work(&priv->SwChnlWorkItem);
5666
5667 ieee80211_softmac_stop_protocol(priv->ieee80211);
5668
5669 //rtl8192_irq_disable(dev);
5670 rtl8192_rtx_disable(dev);
5671 reset_status = _rtl8192_up(dev);
5672
5673}
5674
5675/*
5676void rtl8192_restart(struct net_device *dev)
5677{
5678 struct r8192_priv *priv = ieee80211_priv(dev);
5679*/
5f53d8ca
JC		 5680void rtl8192_restart(struct work_struct *work)
5681{
5682 struct r8192_priv *priv = container_of(work, struct r8192_priv, reset_wq);
5683 struct net_device *dev = priv->ieee80211->dev;
5f53d8ca
JC		 5684
5685 down(&priv->wx_sem);
5686
5687 rtl8192_commit(dev);
5688
5689 up(&priv->wx_sem);
5690}
5691
5692static void r8192_set_multicast(struct net_device *dev)
5693{
5694 struct r8192_priv *priv = ieee80211_priv(dev);
5695 short promisc;
5696
5697 //down(&priv->wx_sem);
5698
5699 /* FIXME FIXME */
5700
5701 promisc = (dev->flags & IFF_PROMISC) ? 1:0;
5702
5703 if (promisc != priv->promisc)
5704 // rtl8192_commit(dev);
5705
5706 priv->promisc = promisc;
5707
5708 //schedule_work(&priv->reset_wq);
5709 //up(&priv->wx_sem);
5710}
5711
5712
5713int r8192_set_mac_adr(struct net_device *dev, void *mac)
5714{
5715 struct r8192_priv *priv = ieee80211_priv(dev);
5716 struct sockaddr *addr = mac;
5717
5718 down(&priv->wx_sem);
5719
5720 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
5721
5f53d8ca 5722 schedule_work(&priv->reset_wq);
1ec9e48d 5723
5f53d8ca
JC		 5724 up(&priv->wx_sem);
5725
5726 return 0;
5727}
5728
5729/* based on ipw2200 driver */
5730int rtl8192_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
5731{
5732 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
5733 struct iwreq *wrq = (struct iwreq *)rq;
5734 int ret=-1;
5735 struct ieee80211_device *ieee = priv->ieee80211;
5736 u32 key[4];
5737 u8 broadcast_addr[6] = {0xff,0xff,0xff,0xff,0xff,0xff};
5738 u8 zero_addr[6] = {0};
5739 struct iw_point *p = &wrq->u.data;
5740 struct ieee_param *ipw = NULL;//(struct ieee_param *)wrq->u.data.pointer;
5741
5742 down(&priv->wx_sem);
5743
5744
5745 if (p->length < sizeof(struct ieee_param) || !p->pointer){
5746 ret = -EINVAL;
5747 goto out;
5748 }
5749
32414878 5750 ipw = kmalloc(p->length, GFP_KERNEL);
5f53d8ca
JC		 5751 if (ipw == NULL){
5752 ret = -ENOMEM;
5753 goto out;
5754 }
5755 if (copy_from_user(ipw, p->pointer, p->length)) {
5756 kfree(ipw);
5757 ret = -EFAULT;
5758 goto out;
5759 }
5760
5761 switch (cmd) {
5762 case RTL_IOCTL_WPA_SUPPLICANT:
5763 //parse here for HW security
5764 if (ipw->cmd == IEEE_CMD_SET_ENCRYPTION)
5765 {
5766 if (ipw->u.crypt.set_tx)
5767 {
5768 if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
5769 ieee->pairwise_key_type = KEY_TYPE_CCMP;
5770 else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
5771 ieee->pairwise_key_type = KEY_TYPE_TKIP;
5772 else if (strcmp(ipw->u.crypt.alg, "WEP") == 0)
5773 {
5774 if (ipw->u.crypt.key_len == 13)
5775 ieee->pairwise_key_type = KEY_TYPE_WEP104;
5776 else if (ipw->u.crypt.key_len == 5)
5777 ieee->pairwise_key_type = KEY_TYPE_WEP40;
5778 }
5779 else
5780 ieee->pairwise_key_type = KEY_TYPE_NA;
5781
5782 if (ieee->pairwise_key_type)
5783 {
5784 // FIXME:these two lines below just to fix ipw interface bug, that is, it will never set mode down to driver. So treat it as ADHOC mode, if no association procedure. WB. 2009.02.04
5785 if (memcmp(ieee->ap_mac_addr, zero_addr, 6) == 0)
5786 ieee->iw_mode = IW_MODE_ADHOC;
5787 memcpy((u8*)key, ipw->u.crypt.key, 16);
5788 EnableHWSecurityConfig8192(dev);
5789 //we fill both index entry and 4th entry for pairwise key as in IPW interface, adhoc will only get here, so we need index entry for its default key serching!
5790 //added by WB.
5791 setKey(dev, 4, ipw->u.crypt.idx, ieee->pairwise_key_type, (u8*)ieee->ap_mac_addr, 0, key);
5792 if (ieee->iw_mode == IW_MODE_ADHOC)
5793 setKey(dev, ipw->u.crypt.idx, ipw->u.crypt.idx, ieee->pairwise_key_type, (u8*)ieee->ap_mac_addr, 0, key);
5794 }
5795 }
5796 else //if (ipw->u.crypt.idx) //group key use idx > 0
5797 {
5798 memcpy((u8*)key, ipw->u.crypt.key, 16);
5799 if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
5800 ieee->group_key_type= KEY_TYPE_CCMP;
5801 else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
5802 ieee->group_key_type = KEY_TYPE_TKIP;
5803 else if (strcmp(ipw->u.crypt.alg, "WEP") == 0)
5804 {
5805 if (ipw->u.crypt.key_len == 13)
5806 ieee->group_key_type = KEY_TYPE_WEP104;
5807 else if (ipw->u.crypt.key_len == 5)
5808 ieee->group_key_type = KEY_TYPE_WEP40;
5809 }
5810 else
5811 ieee->group_key_type = KEY_TYPE_NA;
5812
5813 if (ieee->group_key_type)
5814 {
5815 setKey( dev,
5816 ipw->u.crypt.idx,
5817 ipw->u.crypt.idx, //KeyIndex
5818 ieee->group_key_type, //KeyType
5819 broadcast_addr, //MacAddr
5820 0, //DefaultKey
5821 key); //KeyContent
5822 }
5823 }
5824 }
5825#ifdef JOHN_HWSEC_DEBUG
5826 //john's test 0711
5827 printk("@@ wrq->u pointer = ");
5828 for(i=0;i<wrq->u.data.length;i++){
5829 if(i%10==0) printk("\n");
5830 printk( "%8x|", ((u32*)wrq->u.data.pointer)[i] );
5831 }
5832 printk("\n");
5833#endif /*JOHN_HWSEC_DEBUG*/
5834 ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data);
5835 break;
5836
5837 default:
5838 ret = -EOPNOTSUPP;
5839 break;
5840 }
5841 kfree(ipw);
5842 ipw = NULL;
5843out:
5844 up(&priv->wx_sem);
5845 return ret;
5846}
5847
5f53d8ca
JC		 5848u8 rtl8192SU_HwRateToMRate(bool bIsHT, u8 rate,bool bFirstAMPDU)
5849{
5850
5851 u8 ret_rate = 0x02;
5852
5853 if( bFirstAMPDU )
5854 {
5855 if(!bIsHT)
5856 {
5857 switch(rate)
5858 {
5859
5860 case DESC92S_RATE1M: ret_rate = MGN_1M; break;
5861 case DESC92S_RATE2M: ret_rate = MGN_2M; break;
5862 case DESC92S_RATE5_5M: ret_rate = MGN_5_5M; break;
5863 case DESC92S_RATE11M: ret_rate = MGN_11M; break;
5864 case DESC92S_RATE6M: ret_rate = MGN_6M; break;
5865 case DESC92S_RATE9M: ret_rate = MGN_9M; break;
5866 case DESC92S_RATE12M: ret_rate = MGN_12M; break;
5867 case DESC92S_RATE18M: ret_rate = MGN_18M; break;
5868 case DESC92S_RATE24M: ret_rate = MGN_24M; break;
5869 case DESC92S_RATE36M: ret_rate = MGN_36M; break;
5870 case DESC92S_RATE48M: ret_rate = MGN_48M; break;
5871 case DESC92S_RATE54M: ret_rate = MGN_54M; break;
5872
5873 default:
5874 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n", rate, bIsHT);
5875 break;
5876 }
5877 }
5878 else
5879 {
5880 switch(rate)
5881 {
5882
5883 case DESC92S_RATEMCS0: ret_rate = MGN_MCS0; break;
5884 case DESC92S_RATEMCS1: ret_rate = MGN_MCS1; break;
5885 case DESC92S_RATEMCS2: ret_rate = MGN_MCS2; break;
5886 case DESC92S_RATEMCS3: ret_rate = MGN_MCS3; break;
5887 case DESC92S_RATEMCS4: ret_rate = MGN_MCS4; break;
5888 case DESC92S_RATEMCS5: ret_rate = MGN_MCS5; break;
5889 case DESC92S_RATEMCS6: ret_rate = MGN_MCS6; break;
5890 case DESC92S_RATEMCS7: ret_rate = MGN_MCS7; break;
5891 case DESC92S_RATEMCS8: ret_rate = MGN_MCS8; break;
5892 case DESC92S_RATEMCS9: ret_rate = MGN_MCS9; break;
5893 case DESC92S_RATEMCS10: ret_rate = MGN_MCS10; break;
5894 case DESC92S_RATEMCS11: ret_rate = MGN_MCS11; break;
5895 case DESC92S_RATEMCS12: ret_rate = MGN_MCS12; break;
5896 case DESC92S_RATEMCS13: ret_rate = MGN_MCS13; break;
5897 case DESC92S_RATEMCS14: ret_rate = MGN_MCS14; break;
5898 case DESC92S_RATEMCS15: ret_rate = MGN_MCS15; break;
5899 case DESC92S_RATEMCS32: ret_rate = (0x80|0x20); break;
5900
5901 default:
5902 RT_TRACE(COMP_RECV, "HwRateToMRate92S(): Non supported Rate [%x], bIsHT = %d!!!\n",rate, bIsHT );
5903 break;
5904 }
5905
5906 }
5907 }
5908 else
5909 {
5910 switch(rate)
5911 {
5912
5913 case DESC92S_RATE1M: ret_rate = MGN_1M; break;
5914 case DESC92S_RATE2M: ret_rate = MGN_2M; break;
5915 case DESC92S_RATE5_5M: ret_rate = MGN_5_5M; break;
5916 case DESC92S_RATE11M: ret_rate = MGN_11M; break;
5917 case DESC92S_RATE6M: ret_rate = MGN_6M; break;
5918 case DESC92S_RATE9M: ret_rate = MGN_9M; break;
5919 case DESC92S_RATE12M: ret_rate = MGN_12M; break;
5920 case DESC92S_RATE18M: ret_rate = MGN_18M; break;
5921 case DESC92S_RATE24M: ret_rate = MGN_24M; break;
5922 case DESC92S_RATE36M: ret_rate = MGN_36M; break;
5923 case DESC92S_RATE48M: ret_rate = MGN_48M; break;
5924 case DESC92S_RATE54M: ret_rate = MGN_54M; break;
5925 case DESC92S_RATEMCS0: ret_rate = MGN_MCS0; break;
5926 case DESC92S_RATEMCS1: ret_rate = MGN_MCS1; break;
5927 case DESC92S_RATEMCS2: ret_rate = MGN_MCS2; break;
5928 case DESC92S_RATEMCS3: ret_rate = MGN_MCS3; break;
5929 case DESC92S_RATEMCS4: ret_rate = MGN_MCS4; break;
5930 case DESC92S_RATEMCS5: ret_rate = MGN_MCS5; break;
5931 case DESC92S_RATEMCS6: ret_rate = MGN_MCS6; break;
5932 case DESC92S_RATEMCS7: ret_rate = MGN_MCS7; break;
5933 case DESC92S_RATEMCS8: ret_rate = MGN_MCS8; break;
5934 case DESC92S_RATEMCS9: ret_rate = MGN_MCS9; break;
5935 case DESC92S_RATEMCS10: ret_rate = MGN_MCS10; break;
5936 case DESC92S_RATEMCS11: ret_rate = MGN_MCS11; break;
5937 case DESC92S_RATEMCS12: ret_rate = MGN_MCS12; break;
5938 case DESC92S_RATEMCS13: ret_rate = MGN_MCS13; break;
5939 case DESC92S_RATEMCS14: ret_rate = MGN_MCS14; break;
5940 case DESC92S_RATEMCS15: ret_rate = MGN_MCS15; break;
5941 case DESC92S_RATEMCS32: ret_rate = (0x80|0x20); break;
5942
5943 default:
5944 RT_TRACE(COMP_RECV, "HwRateToMRate92S(): Non supported Rate [%x], bIsHT = %d!!!\n",rate, bIsHT );
5945 break;
5946 }
5947 }
5948 return ret_rate;
5949}
5f53d8ca
JC		 5950
5951u8 HwRateToMRate90(bool bIsHT, u8 rate)
5952{
5953 u8 ret_rate = 0xff;
5954
5955 if(!bIsHT) {
5956 switch(rate) {
5957 case DESC90_RATE1M: ret_rate = MGN_1M; break;
5958 case DESC90_RATE2M: ret_rate = MGN_2M; break;
5959 case DESC90_RATE5_5M: ret_rate = MGN_5_5M; break;
5960 case DESC90_RATE11M: ret_rate = MGN_11M; break;
5961 case DESC90_RATE6M: ret_rate = MGN_6M; break;
5962 case DESC90_RATE9M: ret_rate = MGN_9M; break;
5963 case DESC90_RATE12M: ret_rate = MGN_12M; break;
5964 case DESC90_RATE18M: ret_rate = MGN_18M; break;
5965 case DESC90_RATE24M: ret_rate = MGN_24M; break;
5966 case DESC90_RATE36M: ret_rate = MGN_36M; break;
5967 case DESC90_RATE48M: ret_rate = MGN_48M; break;
5968 case DESC90_RATE54M: ret_rate = MGN_54M; break;
5969
5970 default:
5971 ret_rate = 0xff;
5972 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n", rate, bIsHT);
5973 break;
5974 }
5975
5976 } else {
5977 switch(rate) {
5978 case DESC90_RATEMCS0: ret_rate = MGN_MCS0; break;
5979 case DESC90_RATEMCS1: ret_rate = MGN_MCS1; break;
5980 case DESC90_RATEMCS2: ret_rate = MGN_MCS2; break;
5981 case DESC90_RATEMCS3: ret_rate = MGN_MCS3; break;
5982 case DESC90_RATEMCS4: ret_rate = MGN_MCS4; break;
5983 case DESC90_RATEMCS5: ret_rate = MGN_MCS5; break;
5984 case DESC90_RATEMCS6: ret_rate = MGN_MCS6; break;
5985 case DESC90_RATEMCS7: ret_rate = MGN_MCS7; break;
5986 case DESC90_RATEMCS8: ret_rate = MGN_MCS8; break;
5987 case DESC90_RATEMCS9: ret_rate = MGN_MCS9; break;
5988 case DESC90_RATEMCS10: ret_rate = MGN_MCS10; break;
5989 case DESC90_RATEMCS11: ret_rate = MGN_MCS11; break;
5990 case DESC90_RATEMCS12: ret_rate = MGN_MCS12; break;
5991 case DESC90_RATEMCS13: ret_rate = MGN_MCS13; break;
5992 case DESC90_RATEMCS14: ret_rate = MGN_MCS14; break;
5993 case DESC90_RATEMCS15: ret_rate = MGN_MCS15; break;
5994 case DESC90_RATEMCS32: ret_rate = (0x80|0x20); break;
5995
5996 default:
5997 ret_rate = 0xff;
5998 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n",rate, bIsHT);
5999 break;
6000 }
6001 }
6002
6003 return ret_rate;
6004}
6005
6006/**
6007 * Function: UpdateRxPktTimeStamp
6008 * Overview: Recored down the TSF time stamp when receiving a packet
6009 *
6010 * Input:
6011 * PADAPTER Adapter
6012 * PRT_RFD pRfd,
6013 *
6014 * Output:
6015 * PRT_RFD pRfd
6016 * (pRfd->Status.TimeStampHigh is updated)
6017 * (pRfd->Status.TimeStampLow is updated)
6018 * Return:
6019 * None
6020 */
6021void UpdateRxPktTimeStamp8190 (struct net_device *dev, struct ieee80211_rx_stats *stats)
6022{
6023 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6024
6025 if(stats->bIsAMPDU && !stats->bFirstMPDU) {
6026 stats->mac_time[0] = priv->LastRxDescTSFLow;
6027 stats->mac_time[1] = priv->LastRxDescTSFHigh;
6028 } else {
6029 priv->LastRxDescTSFLow = stats->mac_time[0];
6030 priv->LastRxDescTSFHigh = stats->mac_time[1];
6031 }
6032}
6033
6034//by amy 080606
6035
6036long rtl819x_translate_todbm(u8 signal_strength_index )// 0-100 index.
6037{
6038 long signal_power; // in dBm.
6039
6040 // Translate to dBm (x=0.5y-95).
6041 signal_power = (long)((signal_strength_index + 1) >> 1);
6042 signal_power -= 95;
6043
6044 return signal_power;
6045}
6046
6047
6048/* 2008/01/22 MH We can not delcare RSSI/EVM total value of sliding window to
6049 be a local static. Otherwise, it may increase when we return from S3/S4. The
6050 value will be kept in memory or disk. We must delcare the value in adapter
6051 and it will be reinitialized when return from S3/S4. */
6052void rtl8192_process_phyinfo(struct r8192_priv * priv,u8* buffer, struct ieee80211_rx_stats * pprevious_stats, struct ieee80211_rx_stats * pcurrent_stats)
6053{
6054 bool bcheck = false;
6055 u8 rfpath;
6056 u32 nspatial_stream, tmp_val;
6057 //u8 i;
6058 static u32 slide_rssi_index=0, slide_rssi_statistics=0;
6059 static u32 slide_evm_index=0, slide_evm_statistics=0;
6060 static u32 last_rssi=0, last_evm=0;
6061
6062 static u32 slide_beacon_adc_pwdb_index=0, slide_beacon_adc_pwdb_statistics=0;
6063 static u32 last_beacon_adc_pwdb=0;
6064
6065 struct ieee80211_hdr_3addr *hdr;
6066 u16 sc ;
6067 unsigned int frag,seq;
6068 hdr = (struct ieee80211_hdr_3addr *)buffer;
e2117cea 6069 sc = le16_to_cpu(hdr->seq_ctrl);
5f53d8ca
JC		 6070 frag = WLAN_GET_SEQ_FRAG(sc);
6071 seq = WLAN_GET_SEQ_SEQ(sc);
6072 //cosa add 04292008 to record the sequence number
6073 pcurrent_stats->Seq_Num = seq;
6074 //
6075 // Check whether we should take the previous packet into accounting
6076 //
6077 if(!pprevious_stats->bIsAMPDU)
6078 {
6079 // if previous packet is not aggregated packet
6080 bcheck = true;
6081 }else
6082 {
5f53d8ca
JC		 6083 }
6084
6085
6086 if(slide_rssi_statistics++ >= PHY_RSSI_SLID_WIN_MAX)
6087 {
6088 slide_rssi_statistics = PHY_RSSI_SLID_WIN_MAX;
6089 last_rssi = priv->stats.slide_signal_strength[slide_rssi_index];
6090 priv->stats.slide_rssi_total -= last_rssi;
6091 }
6092 priv->stats.slide_rssi_total += pprevious_stats->SignalStrength;
6093
6094 priv->stats.slide_signal_strength[slide_rssi_index++] = pprevious_stats->SignalStrength;
6095 if(slide_rssi_index >= PHY_RSSI_SLID_WIN_MAX)
6096 slide_rssi_index = 0;
6097
6098 // <1> Showed on UI for user, in dbm
6099 tmp_val = priv->stats.slide_rssi_total/slide_rssi_statistics;
6100 priv->stats.signal_strength = rtl819x_translate_todbm((u8)tmp_val);
6101 pcurrent_stats->rssi = priv->stats.signal_strength;
6102 //
6103 // If the previous packet does not match the criteria, neglect it
6104 //
6105 if(!pprevious_stats->bPacketMatchBSSID)
6106 {
6107 if(!pprevious_stats->bToSelfBA)
6108 return;
6109 }
6110
6111 if(!bcheck)
6112 return;
6113
6114
6115 //rtl8190_process_cck_rxpathsel(priv,pprevious_stats);//only rtl8190 supported
6116
6117 //
6118 // Check RSSI
6119 //
6120 priv->stats.num_process_phyinfo++;
6121
6122 /* record the general signal strength to the sliding window. */
6123
6124
6125 // <2> Showed on UI for engineering
6126 // hardware does not provide rssi information for each rf path in CCK
6127 if(!pprevious_stats->bIsCCK && (pprevious_stats->bPacketToSelf || pprevious_stats->bToSelfBA))
6128 {
6129 for (rfpath = RF90_PATH_A; rfpath < priv->NumTotalRFPath; rfpath++)
6130 {
6131 if (!rtl8192_phy_CheckIsLegalRFPath(priv->ieee80211->dev, rfpath))
6132 continue;
6133
6134 //Fixed by Jacken 2008-03-20
6135 if(priv->stats.rx_rssi_percentage[rfpath] == 0)
6136 {
6137 priv->stats.rx_rssi_percentage[rfpath] = pprevious_stats->RxMIMOSignalStrength[rfpath];
6138 //DbgPrint("MIMO RSSI initialize \n");
6139 }
6140 if(pprevious_stats->RxMIMOSignalStrength[rfpath] > priv->stats.rx_rssi_percentage[rfpath])
6141 {
6142 priv->stats.rx_rssi_percentage[rfpath] =
6143 ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
6144 (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
6145 priv->stats.rx_rssi_percentage[rfpath] = priv->stats.rx_rssi_percentage[rfpath] + 1;
6146 }
6147 else
6148 {
6149 priv->stats.rx_rssi_percentage[rfpath] =
6150 ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
6151 (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
6152 }
6153 RT_TRACE(COMP_DBG,"priv->stats.rx_rssi_percentage[rfPath] = %d \n" ,priv->stats.rx_rssi_percentage[rfpath] );
6154 }
6155 }
6156
6157
6158 //
6159 // Check PWDB.
6160 //
6161 RT_TRACE(COMP_RXDESC, "Smooth %s PWDB = %d\n",
6162 pprevious_stats->bIsCCK? "CCK": "OFDM",
6163 pprevious_stats->RxPWDBAll);
6164
6165 if(pprevious_stats->bPacketBeacon)
6166 {
6167/* record the beacon pwdb to the sliding window. */
6168 if(slide_beacon_adc_pwdb_statistics++ >= PHY_Beacon_RSSI_SLID_WIN_MAX)
6169 {
6170 slide_beacon_adc_pwdb_statistics = PHY_Beacon_RSSI_SLID_WIN_MAX;
6171 last_beacon_adc_pwdb = priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index];
6172 priv->stats.Slide_Beacon_Total -= last_beacon_adc_pwdb;
6173 //DbgPrint("slide_beacon_adc_pwdb_index = %d, last_beacon_adc_pwdb = %d, Adapter->RxStats.Slide_Beacon_Total = %d\n",
6174 // slide_beacon_adc_pwdb_index, last_beacon_adc_pwdb, Adapter->RxStats.Slide_Beacon_Total);
6175 }
6176 priv->stats.Slide_Beacon_Total += pprevious_stats->RxPWDBAll;
6177 priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index] = pprevious_stats->RxPWDBAll;
6178 //DbgPrint("slide_beacon_adc_pwdb_index = %d, pPreviousRfd->Status.RxPWDBAll = %d\n", slide_beacon_adc_pwdb_index, pPreviousRfd->Status.RxPWDBAll);
6179 slide_beacon_adc_pwdb_index++;
6180 if(slide_beacon_adc_pwdb_index >= PHY_Beacon_RSSI_SLID_WIN_MAX)
6181 slide_beacon_adc_pwdb_index = 0;
6182 pprevious_stats->RxPWDBAll = priv->stats.Slide_Beacon_Total/slide_beacon_adc_pwdb_statistics;
6183 if(pprevious_stats->RxPWDBAll >= 3)
6184 pprevious_stats->RxPWDBAll -= 3;
6185 }
6186
6187 RT_TRACE(COMP_RXDESC, "Smooth %s PWDB = %d\n",
6188 pprevious_stats->bIsCCK? "CCK": "OFDM",
6189 pprevious_stats->RxPWDBAll);
6190
6191
6192 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
6193 {
6194 if(priv->undecorated_smoothed_pwdb < 0) // initialize
6195 {
6196 priv->undecorated_smoothed_pwdb = pprevious_stats->RxPWDBAll;
6197 //DbgPrint("First pwdb initialize \n");
6198 }
6199#if 1
6200 if(pprevious_stats->RxPWDBAll > (u32)priv->undecorated_smoothed_pwdb)
6201 {
6202 priv->undecorated_smoothed_pwdb =
6203 ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
6204 (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
6205 priv->undecorated_smoothed_pwdb = priv->undecorated_smoothed_pwdb + 1;
6206 }
6207 else
6208 {
6209 priv->undecorated_smoothed_pwdb =
6210 ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
6211 (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
6212 }
6213#else
6214 //Fixed by Jacken 2008-03-20
6215 if(pPreviousRfd->Status.RxPWDBAll > (u32)pHalData->UndecoratedSmoothedPWDB)
6216 {
6217 pHalData->UndecoratedSmoothedPWDB =
6218 ( ((pHalData->UndecoratedSmoothedPWDB)* 5) + (pPreviousRfd->Status.RxPWDBAll)) / 6;
6219 pHalData->UndecoratedSmoothedPWDB = pHalData->UndecoratedSmoothedPWDB + 1;
6220 }
6221 else
6222 {
6223 pHalData->UndecoratedSmoothedPWDB =
6224 ( ((pHalData->UndecoratedSmoothedPWDB)* 5) + (pPreviousRfd->Status.RxPWDBAll)) / 6;
6225 }
6226#endif
6227
6228 }
6229
6230 //
6231 // Check EVM
6232 //
6233 /* record the general EVM to the sliding window. */
6234 if(pprevious_stats->SignalQuality == 0)
6235 {
6236 }
6237 else
6238 {
6239 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA){
6240 if(slide_evm_statistics++ >= PHY_RSSI_SLID_WIN_MAX){
6241 slide_evm_statistics = PHY_RSSI_SLID_WIN_MAX;
6242 last_evm = priv->stats.slide_evm[slide_evm_index];
6243 priv->stats.slide_evm_total -= last_evm;
6244 }
6245
6246 priv->stats.slide_evm_total += pprevious_stats->SignalQuality;
6247
6248 priv->stats.slide_evm[slide_evm_index++] = pprevious_stats->SignalQuality;
6249 if(slide_evm_index >= PHY_RSSI_SLID_WIN_MAX)
6250 slide_evm_index = 0;
6251
6252 // <1> Showed on UI for user, in percentage.
6253 tmp_val = priv->stats.slide_evm_total/slide_evm_statistics;
6254 priv->stats.signal_quality = tmp_val;
6255 //cosa add 10/11/2007, Showed on UI for user in Windows Vista, for Link quality.
6256 priv->stats.last_signal_strength_inpercent = tmp_val;
6257 }
6258
6259 // <2> Showed on UI for engineering
6260 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
6261 {
6262 for(nspatial_stream = 0; nspatial_stream<2 ; nspatial_stream++) // 2 spatial stream
6263 {
6264 if(pprevious_stats->RxMIMOSignalQuality[nspatial_stream] != -1)
6265 {
6266 if(priv->stats.rx_evm_percentage[nspatial_stream] == 0) // initialize
6267 {
6268 priv->stats.rx_evm_percentage[nspatial_stream] = pprevious_stats->RxMIMOSignalQuality[nspatial_stream];
6269 }
6270 priv->stats.rx_evm_percentage[nspatial_stream] =
6271 ( (priv->stats.rx_evm_percentage[nspatial_stream]* (Rx_Smooth_Factor-1)) +
6272 (pprevious_stats->RxMIMOSignalQuality[nspatial_stream]* 1)) / (Rx_Smooth_Factor);
6273 }
6274 }
6275 }
6276 }
6277
6278
6279}
6280
6281/*-----------------------------------------------------------------------------
6282 * Function: rtl819x_query_rxpwrpercentage()
6283 *
6284 * Overview:
6285 *
6286 * Input: char antpower
6287 *
6288 * Output: NONE
6289 *
6290 * Return: 0-100 percentage
6291 *
6292 * Revised History:
6293 * When Who Remark
6294 * 05/26/2008 amy Create Version 0 porting from windows code.
6295 *
6296 *---------------------------------------------------------------------------*/
6297static u8 rtl819x_query_rxpwrpercentage(
6298 char antpower
6299 )
6300{
6301 if ((antpower <= -100) || (antpower >= 20))
6302 {
6303 return 0;
6304 }
6305 else if (antpower >= 0)
6306 {
6307 return 100;
6308 }
6309 else
6310 {
6311 return (100+antpower);
6312 }
6313
6314} /* QueryRxPwrPercentage */
6315
6316static u8
6317rtl819x_evm_dbtopercentage(
6318 char value
6319 )
6320{
6321 char ret_val;
6322
6323 ret_val = value;
6324
6325 if(ret_val >= 0)
6326 ret_val = 0;
6327 if(ret_val <= -33)
6328 ret_val = -33;
6329 ret_val = 0 - ret_val;
6330 ret_val*=3;
6331 if(ret_val == 99)
6332 ret_val = 100;
6333 return(ret_val);
6334}
6335//
6336// Description:
6337// We want good-looking for signal strength/quality
6338// 2007/7/19 01:09, by cosa.
6339//
6340long
6341rtl819x_signal_scale_mapping(
6342 long currsig
6343 )
6344{
6345 long retsig;
6346
6347 // Step 1. Scale mapping.
6348 if(currsig >= 61 && currsig <= 100)
6349 {
6350 retsig = 90 + ((currsig - 60) / 4);
6351 }
6352 else if(currsig >= 41 && currsig <= 60)
6353 {
6354 retsig = 78 + ((currsig - 40) / 2);
6355 }
6356 else if(currsig >= 31 && currsig <= 40)
6357 {
6358 retsig = 66 + (currsig - 30);
6359 }
6360 else if(currsig >= 21 && currsig <= 30)
6361 {
6362 retsig = 54 + (currsig - 20);
6363 }
6364 else if(currsig >= 5 && currsig <= 20)
6365 {
6366 retsig = 42 + (((currsig - 5) * 2) / 3);
6367 }
6368 else if(currsig == 4)
6369 {
6370 retsig = 36;
6371 }
6372 else if(currsig == 3)
6373 {
6374 retsig = 27;
6375 }
6376 else if(currsig == 2)
6377 {
6378 retsig = 18;
6379 }
6380 else if(currsig == 1)
6381 {
6382 retsig = 9;
6383 }
6384 else
6385 {
6386 retsig = currsig;
6387 }
6388
6389 return retsig;
6390}
6391
5f53d8ca
JC		 6392/*-----------------------------------------------------------------------------
6393 * Function: QueryRxPhyStatus8192S()
6394 *
6395 * Overview:
6396 *
6397 * Input: NONE
6398 *
6399 * Output: NONE
6400 *
6401 * Return: NONE
6402 *
6403 * Revised History:
6404 * When Who Remark
6405 * 06/01/2007 MHC Create Version 0.
6406 * 06/05/2007 MHC Accordign to HW's new data sheet, we add CCK and OFDM
6407 * descriptor definition.
6408 * 07/04/2007 MHC According to Jerry and Bryant's document. We read
6409 * ir_isolation and ext_lna for RF's init value and use
6410 * to compensate RSSI after receiving packets.
6411 * 09/10/2008 MHC Modify name and PHY status field for 92SE.
6412 * 09/19/2008 MHC Add CCK/OFDM SS/SQ for 92S series.
6413 *
6414 *---------------------------------------------------------------------------*/
6415static void rtl8192SU_query_rxphystatus(
6416 struct r8192_priv * priv,
6417 struct ieee80211_rx_stats * pstats,
6418 rx_desc_819x_usb *pDesc,
6419 rx_drvinfo_819x_usb * pdrvinfo,
6420 struct ieee80211_rx_stats * precord_stats,
6421 bool bpacket_match_bssid,
6422 bool bpacket_toself,
6423 bool bPacketBeacon,
6424 bool bToSelfBA
6425 )
6426{
6427 //PRT_RFD_STATUS pRtRfdStatus = &(pRfd->Status);
6428 //PHY_STS_CCK_8192S_T *pCck_buf;
6429 phy_sts_cck_819xusb_t * pcck_buf;
6430 phy_ofdm_rx_status_rxsc_sgien_exintfflag* prxsc;
6431 //u8 *prxpkt;
6432 //u8 i, max_spatial_stream, tmp_rxsnr, tmp_rxevm, rxsc_sgien_exflg;
6433 u8 i, max_spatial_stream, rxsc_sgien_exflg;
6434 char rx_pwr[4], rx_pwr_all=0;
6435 //long rx_avg_pwr = 0;
6436 //char rx_snrX, rx_evmX;
6437 u8 evm, pwdb_all;
6438 u32 RSSI, total_rssi=0;//, total_evm=0;
6439// long signal_strength_index = 0;
6440 u8 is_cck_rate=0;
6441 u8 rf_rx_num = 0;
6442
6443
6444
6445 priv->stats.numqry_phystatus++;
6446
6447 is_cck_rate = rx_hal_is_cck_rate(pDesc);
6448
6449 // Record it for next packet processing
6450 memset(precord_stats, 0, sizeof(struct ieee80211_rx_stats));
6451 pstats->bPacketMatchBSSID = precord_stats->bPacketMatchBSSID = bpacket_match_bssid;
6452 pstats->bPacketToSelf = precord_stats->bPacketToSelf = bpacket_toself;
6453 pstats->bIsCCK = precord_stats->bIsCCK = is_cck_rate;//RX_HAL_IS_CCK_RATE(pDrvInfo);
6454 pstats->bPacketBeacon = precord_stats->bPacketBeacon = bPacketBeacon;
6455 pstats->bToSelfBA = precord_stats->bToSelfBA = bToSelfBA;
6456
5f53d8ca
JC		 6457
6458 pstats->RxMIMOSignalQuality[0] = -1;
6459 pstats->RxMIMOSignalQuality[1] = -1;
6460 precord_stats->RxMIMOSignalQuality[0] = -1;
6461 precord_stats->RxMIMOSignalQuality[1] = -1;
6462
6463 if(is_cck_rate)
6464 {
6465 u8 report;//, tmp_pwdb;
6466 //char cck_adc_pwdb[4];
6467
6468 // CCK Driver info Structure is not the same as OFDM packet.
6469 pcck_buf = (phy_sts_cck_819xusb_t *)pdrvinfo;
6470
6471 //
6472 // (1)Hardware does not provide RSSI for CCK
6473 //
6474
6475 //
6476 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
6477 //
6478
6479 priv->stats.numqry_phystatusCCK++;
6480
6481 if(!priv->bCckHighPower)
6482 {
6483 report = pcck_buf->cck_agc_rpt & 0xc0;
6484 report = report>>6;
6485 switch(report)
6486 {
6487 //Fixed by Jacken from Bryant 2008-03-20
6488 //Original value is -38 , -26 , -14 , -2
6489 //Fixed value is -35 , -23 , -11 , 6
6490 case 0x3:
6491 rx_pwr_all = -35 - (pcck_buf->cck_agc_rpt & 0x3e);
6492 break;
6493 case 0x2:
6494 rx_pwr_all = -23 - (pcck_buf->cck_agc_rpt & 0x3e);
6495 break;
6496 case 0x1:
6497 rx_pwr_all = -11 - (pcck_buf->cck_agc_rpt & 0x3e);
6498 break;
6499 case 0x0:
6500 rx_pwr_all = 8 - (pcck_buf->cck_agc_rpt & 0x3e);//6->8
6501 break;
6502 }
6503 }
6504 else
6505 {
6506 report = pdrvinfo->cfosho[0] & 0x60;
6507 report = report>>5;
6508 switch(report)
6509 {
6510 case 0x3:
6511 rx_pwr_all = -35 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
6512 break;
6513 case 0x2:
6514 rx_pwr_all = -23 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1);
6515 break;
6516 case 0x1:
6517 rx_pwr_all = -11 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
6518 break;
6519 case 0x0:
6520 rx_pwr_all = -8 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;//6->-8
6521 break;
6522 }
6523 }
6524
6525 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);//check it
6526 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
6527 //pstats->RecvSignalPower = pwdb_all;
6528 pstats->RecvSignalPower = rx_pwr_all;
6529
6530 //
6531 // (3) Get Signal Quality (EVM)
6532 //
6533 //if(bpacket_match_bssid)
6534 {
6535 u8 sq;
6536
6537 if(pstats->RxPWDBAll > 40)
6538 {
6539 sq = 100;
6540 }else
6541 {
6542 sq = pcck_buf->sq_rpt;
6543
6544 if(pcck_buf->sq_rpt > 64)
6545 sq = 0;
6546 else if (pcck_buf->sq_rpt < 20)
6547 sq = 100;
6548 else
6549 sq = ((64-sq) * 100) / 44;
6550 }
6551 pstats->SignalQuality = precord_stats->SignalQuality = sq;
6552 pstats->RxMIMOSignalQuality[0] = precord_stats->RxMIMOSignalQuality[0] = sq;
6553 pstats->RxMIMOSignalQuality[1] = precord_stats->RxMIMOSignalQuality[1] = -1;
6554 }
6555 }
6556 else
6557 {
6558 priv->stats.numqry_phystatusHT++;
6559
6560 // 2008/09/19 MH For 92S debug, RX RF path always enable!!
6561 priv->brfpath_rxenable[0] = priv->brfpath_rxenable[1] = TRUE;
6562
6563 //
6564 // (1)Get RSSI for HT rate
6565 //
6566 //for(i=RF90_PATH_A; i<priv->NumTotalRFPath; i++)
6567 for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
6568 {
6569 // 2008/01/30 MH we will judge RF RX path now.
6570 if (priv->brfpath_rxenable[i])
6571 rf_rx_num++;
6572 //else
6573 // continue;
6574
6575 //if (!rtl8192_phy_CheckIsLegalRFPath(priv->ieee80211->dev, i))
6576 // continue;
6577
6578 //Fixed by Jacken from Bryant 2008-03-20
6579 //Original value is 106
6580 //rx_pwr[i] = ((pofdm_buf->trsw_gain_X[i]&0x3F)*2) - 106;
6581 rx_pwr[i] = ((pdrvinfo->gain_trsw[i]&0x3F)*2) - 110;
6582
6583 /* Translate DBM to percentage. */
6584 RSSI = rtl819x_query_rxpwrpercentage(rx_pwr[i]); //check ok
6585 total_rssi += RSSI;
6586 RT_TRACE(COMP_RF, "RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], RSSI);
6587
6588 //Get Rx snr value in DB
6589 //tmp_rxsnr = pofdm_buf->rxsnr_X[i];
6590 //rx_snrX = (char)(tmp_rxsnr);
6591 //rx_snrX /= 2;
6592 //priv->stats.rxSNRdB[i] = (long)rx_snrX;
6593 priv->stats.rxSNRdB[i] = (long)(pdrvinfo->rxsnr[i]/2);
6594
6595 /* Translate DBM to percentage. */
6596 //RSSI = rtl819x_query_rxpwrpercentage(rx_pwr[i]);
6597 //total_rssi += RSSI;
6598
6599 /* Record Signal Strength for next packet */
6600 //if(bpacket_match_bssid)
6601 {
6602 pstats->RxMIMOSignalStrength[i] =(u8) RSSI;
6603 precord_stats->RxMIMOSignalStrength[i] =(u8) RSSI;
6604 }
6605 }
6606
6607
6608 //
6609 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
6610 //
6611 //Fixed by Jacken from Bryant 2008-03-20
6612 //Original value is 106
6613 //rx_pwr_all = (((pofdm_buf->pwdb_all ) >> 1 )& 0x7f) -106;
6614 rx_pwr_all = (((pdrvinfo->pwdb_all ) >> 1 )& 0x7f) -106;
6615 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
6616
6617 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
6618 pstats->RxPower = precord_stats->RxPower = rx_pwr_all;
6619 pstats->RecvSignalPower = rx_pwr_all;
6620
6621 //
6622 // (3)EVM of HT rate
6623 //
6624 //if(pdrvinfo->RxHT && pdrvinfo->RxRate>=DESC90_RATEMCS8 &&
6625 // pdrvinfo->RxRate<=DESC90_RATEMCS15)
6626 if(pDesc->RxHT && pDesc->RxMCS>=DESC92S_RATEMCS8 &&
6627 pDesc->RxMCS<=DESC92S_RATEMCS15)
6628 max_spatial_stream = 2; //both spatial stream make sense
6629 else
6630 max_spatial_stream = 1; //only spatial stream 1 makes sense
6631
6632 for(i=0; i<max_spatial_stream; i++)
6633 {
6634 //tmp_rxevm = pofdm_buf->rxevm_X[i];
6635 //rx_evmX = (char)(tmp_rxevm);
6636
6637 // Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment
6638 // fill most significant bit to "zero" when doing shifting operation which may change a negative
6639 // value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore.
6640 //rx_evmX /= 2; //dbm
6641
6642 //evm = rtl819x_evm_dbtopercentage(rx_evmX);
6643 evm = rtl819x_evm_dbtopercentage( (pdrvinfo->rxevm[i] /*/ 2*/)); //dbm
6644 RT_TRACE(COMP_RF, "RXRATE=%x RXEVM=%x EVM=%s%d\n", pDesc->RxMCS, pdrvinfo->rxevm[i], "%", evm);
5f53d8ca
JC		 6645
6646 //if(bpacket_match_bssid)
6647 {
6648 if(i==0) // Fill value in RFD, Get the first spatial stream only
6649 pstats->SignalQuality = precord_stats->SignalQuality = (u8)(evm & 0xff);
6650 pstats->RxMIMOSignalQuality[i] = precord_stats->RxMIMOSignalQuality[i] = (u8)(evm & 0xff);
6651 }
6652 }
6653
6654
6655 /* record rx statistics for debug */
6656 //rxsc_sgien_exflg = pofdm_buf->rxsc_sgien_exflg;
6657 prxsc = (phy_ofdm_rx_status_rxsc_sgien_exintfflag *)&rxsc_sgien_exflg;
6658 //if(pdrvinfo->BW) //40M channel
6659 if(pDesc->BW) //40M channel
6660 priv->stats.received_bwtype[1+pdrvinfo->rxsc]++;
6661 else //20M channel
6662 priv->stats.received_bwtype[0]++;
6663 }
6664
6665 //UI BSS List signal strength(in percentage), make it good looking, from 0~100.
6666 //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().
6667 if(is_cck_rate)
6668 {
6669 pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)pwdb_all));//PWDB_ALL;//check ok
6670
6671 }
6672 else
6673 {
6674 //pRfd->Status.SignalStrength = pRecordRfd->Status.SignalStrength = (u8)(SignalScaleMapping(total_rssi/=RF90_PATH_MAX));//(u8)(total_rssi/=RF90_PATH_MAX);
6675 // We can judge RX path number now.
6676 if (rf_rx_num != 0)
6677 pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)(total_rssi/=rf_rx_num)));
6678 }
6679}/* QueryRxPhyStatus8192S */
0f29f587
BZ		 6680
6681void
6682rtl8192_record_rxdesc_forlateruse(
6683 struct ieee80211_rx_stats * psrc_stats,
6684 struct ieee80211_rx_stats * ptarget_stats
6685)
6686{
6687 ptarget_stats->bIsAMPDU = psrc_stats->bIsAMPDU;
6688 ptarget_stats->bFirstMPDU = psrc_stats->bFirstMPDU;
6689 ptarget_stats->Seq_Num = psrc_stats->Seq_Num;
6690}
6691
6692static void rtl8192SU_query_rxphystatus(
5f53d8ca
JC		 6693 struct r8192_priv * priv,
6694 struct ieee80211_rx_stats * pstats,
0f29f587 6695 rx_desc_819x_usb *pDesc,
5f53d8ca
JC		 6696 rx_drvinfo_819x_usb * pdrvinfo,
6697 struct ieee80211_rx_stats * precord_stats,
6698 bool bpacket_match_bssid,
6699 bool bpacket_toself,
6700 bool bPacketBeacon,
6701 bool bToSelfBA
0f29f587
BZ		 6702 );
6703void rtl8192SU_TranslateRxSignalStuff(struct sk_buff *skb,
6704 struct ieee80211_rx_stats * pstats,
6705 rx_desc_819x_usb *pDesc,
6706 rx_drvinfo_819x_usb *pdrvinfo)
5f53d8ca 6707{
0f29f587
BZ		 6708 // TODO: We must only check packet for current MAC address. Not finish
6709 rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
6710 struct net_device *dev=info->dev;
6711 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6712 bool bpacket_match_bssid, bpacket_toself;
6713 bool bPacketBeacon=FALSE, bToSelfBA=FALSE;
6714 static struct ieee80211_rx_stats previous_stats;
6715 struct ieee80211_hdr_3addr *hdr;//by amy
6716 u16 fc,type;
5f53d8ca 6717
0f29f587 6718 // Get Signal Quality for only RX data queue (but not command queue)
5f53d8ca 6719
0f29f587
BZ		 6720 u8* tmp_buf;
6721 //u16 tmp_buf_len = 0;
6722 u8 *praddr;
5f53d8ca 6723
0f29f587
BZ		 6724 /* Get MAC frame start address. */
6725 tmp_buf = (u8*)skb->data;// + get_rxpacket_shiftbytes_819xusb(pstats);
5f53d8ca 6726
0f29f587 6727 hdr = (struct ieee80211_hdr_3addr *)tmp_buf;
e2117cea 6728 fc = le16_to_cpu(hdr->frame_control);
0f29f587
BZ		 6729 type = WLAN_FC_GET_TYPE(fc);
6730 praddr = hdr->addr1;
5f53d8ca 6731
0f29f587
BZ		 6732 /* Check if the received packet is acceptabe. */
6733 bpacket_match_bssid = ((IEEE80211_FTYPE_CTL != type) &&
6734 (eqMacAddr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS )? hdr->addr2 : hdr->addr3))
6735 && (!pstats->bHwError) && (!pstats->bCRC)&& (!pstats->bICV));
6736 bpacket_toself = bpacket_match_bssid & (eqMacAddr(praddr, priv->ieee80211->dev->dev_addr));
5f53d8ca
JC		 6737
6738#if 1//cosa
6739 if(WLAN_FC_GET_FRAMETYPE(fc)== IEEE80211_STYPE_BEACON)
6740 {
6741 bPacketBeacon = true;
6742 //DbgPrint("Beacon 2, MatchBSSID = %d, ToSelf = %d \n", bPacketMatchBSSID, bPacketToSelf);
6743 }
6744 if(WLAN_FC_GET_FRAMETYPE(fc) == IEEE80211_STYPE_BLOCKACK)
6745 {
6746 if((eqMacAddr(praddr,dev->dev_addr)))
6747 bToSelfBA = true;
6748 //DbgPrint("BlockAck, MatchBSSID = %d, ToSelf = %d \n", bPacketMatchBSSID, bPacketToSelf);
6749 }
6750
6751#endif
6752
6753
6754 if(bpacket_match_bssid)
6755 {
6756 priv->stats.numpacket_matchbssid++;
6757 }
6758 if(bpacket_toself){
6759 priv->stats.numpacket_toself++;
6760 }
6761 //
6762 // Process PHY information for previous packet (RSSI/PWDB/EVM)
6763 //
6764 // Because phy information is contained in the last packet of AMPDU only, so driver
6765 // should process phy information of previous packet
6766 rtl8192_process_phyinfo(priv, tmp_buf, &previous_stats, pstats);
6767 rtl8192SU_query_rxphystatus(priv, pstats, pDesc, pdrvinfo, &previous_stats, bpacket_match_bssid,bpacket_toself,bPacketBeacon,bToSelfBA);
6768 rtl8192_record_rxdesc_forlateruse(pstats, &previous_stats);
6769
6770}
5f53d8ca
JC		 6771
6772/**
6773* Function: UpdateReceivedRateHistogramStatistics
6774* Overview: Recored down the received data rate
6775*
6776* Input:
6777* struct net_device *dev
6778* struct ieee80211_rx_stats *stats
6779*
6780* Output:
6781*
6782* (priv->stats.ReceivedRateHistogram[] is updated)
6783* Return:
6784* None
6785*/
6786void
6787UpdateReceivedRateHistogramStatistics8190(
6788 struct net_device *dev,
6789 struct ieee80211_rx_stats *stats
6790 )
6791{
6792 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6793 u32 rcvType=1; //0: Total, 1:OK, 2:CRC, 3:ICV
6794 u32 rateIndex;
6795 u32 preamble_guardinterval; //1: short preamble/GI, 0: long preamble/GI
6796
6797
6798 if(stats->bCRC)
6799 rcvType = 2;
6800 else if(stats->bICV)
6801 rcvType = 3;
6802
6803 if(stats->bShortPreamble)
6804 preamble_guardinterval = 1;// short
6805 else
6806 preamble_guardinterval = 0;// long
6807
6808 switch(stats->rate)
6809 {
6810 //
6811 // CCK rate
6812 //
6813 case MGN_1M: rateIndex = 0; break;
6814 case MGN_2M: rateIndex = 1; break;
6815 case MGN_5_5M: rateIndex = 2; break;
6816 case MGN_11M: rateIndex = 3; break;
6817 //
6818 // Legacy OFDM rate
6819 //
6820 case MGN_6M: rateIndex = 4; break;
6821 case MGN_9M: rateIndex = 5; break;
6822 case MGN_12M: rateIndex = 6; break;
6823 case MGN_18M: rateIndex = 7; break;
6824 case MGN_24M: rateIndex = 8; break;
6825 case MGN_36M: rateIndex = 9; break;
6826 case MGN_48M: rateIndex = 10; break;
6827 case MGN_54M: rateIndex = 11; break;
6828 //
6829 // 11n High throughput rate
6830 //
6831 case MGN_MCS0: rateIndex = 12; break;
6832 case MGN_MCS1: rateIndex = 13; break;
6833 case MGN_MCS2: rateIndex = 14; break;
6834 case MGN_MCS3: rateIndex = 15; break;
6835 case MGN_MCS4: rateIndex = 16; break;
6836 case MGN_MCS5: rateIndex = 17; break;
6837 case MGN_MCS6: rateIndex = 18; break;
6838 case MGN_MCS7: rateIndex = 19; break;
6839 case MGN_MCS8: rateIndex = 20; break;
6840 case MGN_MCS9: rateIndex = 21; break;
6841 case MGN_MCS10: rateIndex = 22; break;
6842 case MGN_MCS11: rateIndex = 23; break;
6843 case MGN_MCS12: rateIndex = 24; break;
6844 case MGN_MCS13: rateIndex = 25; break;
6845 case MGN_MCS14: rateIndex = 26; break;
6846 case MGN_MCS15: rateIndex = 27; break;
6847 default: rateIndex = 28; break;
6848 }
6849 priv->stats.received_preamble_GI[preamble_guardinterval][rateIndex]++;
6850 priv->stats.received_rate_histogram[0][rateIndex]++; //total
6851 priv->stats.received_rate_histogram[rcvType][rateIndex]++;
6852}
6853
5f53d8ca
JC		 6854void rtl8192SU_query_rxdesc_status(struct sk_buff *skb, struct ieee80211_rx_stats *stats, bool bIsRxAggrSubframe)
6855{
6856 rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
6857 struct net_device *dev=info->dev;
6858 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6859 //rx_desc_819x_usb *desc = (rx_desc_819x_usb *)skb->data;
6860 rx_drvinfo_819x_usb *driver_info = NULL;
6861
6862 //PRT_RFD_STATUS pRtRfdStatus = &pRfd->Status;
6863 //PHAL_DATA_8192SUSB pHalData = GET_HAL_DATA(Adapter);
6864 //pu1Byte pDesc = (pu1Byte)pDescIn;
6865 //PRX_DRIVER_INFO_8192S pDrvInfo;
6866
5f53d8ca
JC		 6867 rx_desc_819x_usb *desc = (rx_desc_819x_usb *)skb->data;
6868
6869 if(0)
6870 {
6871 int m = 0;
6872 printk("========================");
6873 for(m=0; m<skb->len; m++){
6874 if((m%32) == 0)
6875 printk("\n");
6876 printk("%2x ",((u8*)skb->data)[m]);
6877 }
6878 printk("\n========================\n");
6879
6880 }
6881
6882
6883 //
6884 //Get Rx Descriptor Raw Information
6885 //
6886 stats->Length = desc->Length ;
6887 stats->RxDrvInfoSize = desc->RxDrvInfoSize*RX_DRV_INFO_SIZE_UNIT;
6888 stats->RxBufShift = (desc->Shift)&0x03;
6889 stats->bICV = desc->ICV;
6890 stats->bCRC = desc->CRC32;
6891 stats->bHwError = stats->bCRC|stats->bICV;
6892 stats->Decrypted = !desc->SWDec;//RTL8190 set this bit to indicate that Hw does not decrypt packet
6893 stats->bIsAMPDU = (desc->AMSDU==1);
6894 stats->bFirstMPDU = (desc->PAGGR==1) && (desc->FAGGR==1);
6895 stats->bShortPreamble = desc->SPLCP;
6896 stats->RxIs40MHzPacket = (desc->BW==1);
6897 stats->TimeStampLow = desc->TSFL;
6898
6899 if((desc->FAGGR==1) || (desc->PAGGR==1))
6900 {// Rx A-MPDU
6901 RT_TRACE(COMP_RXDESC, "FirstAGGR = %d, PartAggr = %d\n", desc->FAGGR, desc->PAGGR);
6902 }
6903//YJ,test,090310
6904if(stats->bHwError)
6905{
6906 if(stats->bICV)
6907 printk("%s: Receive ICV error!!!!!!!!!!!!!!!!!!!!!!\n", __FUNCTION__);
6908 if(stats->bCRC)
6909 printk("%s: Receive CRC error!!!!!!!!!!!!!!!!!!!!!!\n", __FUNCTION__);
6910}
6911
6912 if(IS_UNDER_11N_AES_MODE(priv->ieee80211))
6913 {
6914 // Always received ICV error packets in AES mode.
6915 // This fixed HW later MIC write bug.
6916 if(stats->bICV && !stats->bCRC)
6917 {
6918 stats->bICV = FALSE;
6919 stats->bHwError = FALSE;
6920 }
6921 }
6922
6923 // Transform HwRate to MRate
6924 if(!stats->bHwError)
6925 //stats->DataRate = HwRateToMRate(
6926 // (BOOLEAN)GET_RX_DESC_RXHT(pDesc),
6927 // (u1Byte)GET_RX_DESC_RXMCS(pDesc),
6928 // (BOOLEAN)GET_RX_DESC_PAGGR(pDesc));
6929 stats->rate = rtl8192SU_HwRateToMRate(desc->RxHT, desc->RxMCS, desc->PAGGR);
6930 else
6931 stats->rate = MGN_1M;
6932
6933 //
6934 // Collect Rx rate/AMPDU/TSFL
6935 //
6936 //UpdateRxdRateHistogramStatistics8192S(Adapter, pRfd);
6937 //UpdateRxAMPDUHistogramStatistics8192S(Adapter, pRfd);
6938 //UpdateRxPktTimeStamp8192S(Adapter, pRfd);
6939 UpdateReceivedRateHistogramStatistics8190(dev, stats);
6940 //UpdateRxAMPDUHistogramStatistics8192S(dev, stats); //FIXLZM
6941 UpdateRxPktTimeStamp8190(dev, stats);
6942
6943 //
6944 // Get PHY Status and RSVD parts.
6945 // <Roger_Notes> It only appears on last aggregated packet.
6946 //
6947 if (desc->PHYStatus)
6948 {
6949 //driver_info = (rx_drvinfo_819x_usb *)(skb->data + RX_DESC_SIZE + stats->RxBufShift);
6950 driver_info = (rx_drvinfo_819x_usb *)(skb->data + sizeof(rx_desc_819x_usb) + \
6951 stats->RxBufShift);
6952 if(0)
6953 {
6954 int m = 0;
6955 printk("========================\n");
6956 printk("RX_DESC_SIZE:%d, RxBufShift:%d, RxDrvInfoSize:%d\n",
6957 RX_DESC_SIZE, stats->RxBufShift, stats->RxDrvInfoSize);
6958 for(m=0; m<32; m++){
6959 printk("%2x ",((u8*)driver_info)[m]);
6960 }
6961 printk("\n========================\n");
6962
6963 }
6964
6965 }
6966
6967 //YJ,add,090107
6968 skb_pull(skb, sizeof(rx_desc_819x_usb));
6969 //YJ,add,090107,end
6970
6971 //
6972 // Get Total offset of MPDU Frame Body
6973 //
6974 if((stats->RxBufShift + stats->RxDrvInfoSize) > 0)
6975 {
6976 stats->bShift = 1;
6977 //YJ,add,090107
6978 skb_pull(skb, stats->RxBufShift + stats->RxDrvInfoSize);
6979 //YJ,add,090107,end
6980 }
6981
6982 //
6983 // Get PHY Status and RSVD parts.
6984 // <Roger_Notes> It only appears on last aggregated packet.
6985 //
6986 if (desc->PHYStatus)
6987 {
6988 rtl8192SU_TranslateRxSignalStuff(skb, stats, desc, driver_info);
6989 }
6990}
5f53d8ca 6991
5f53d8ca
JC		 6992//
6993// Description:
6994// The strarting address of wireless lan header will shift 1 or 2 or 3 or "more" bytes for the following reason :
6995// (1) QoS control : shift 2 bytes
6996// (2) Mesh Network : shift 1 or 3 bytes
6997// (3) RxDriverInfo occupies the front parts of Rx Packets buffer(shift units is in 8Bytes)
6998//
6999// It is because Lextra CPU used by 8186 or 865x series assert exception if the statrting address
7000// of IP header is not double word alignment.
7001// This features is supported in 818xb and 8190 only, but not 818x.
7002//
7003// parameter: PRT_RFD, Pointer of Reeceive frame descriptor which is initialized according to
7004// Rx Descriptor
7005// return value: unsigned int, number of total shifted bytes
7006//
7007// Notes: 2008/06/28, created by Roger
7008//
7009u32 GetRxPacketShiftBytes8192SU(struct ieee80211_rx_stats *Status, bool bIsRxAggrSubframe)
7010{
7011 //PRT_RFD_STATUS pRtRfdStatus = &pRfd->Status;
7012
7013 return (sizeof(rx_desc_819x_usb) + Status->RxDrvInfoSize + Status->RxBufShift);
7014}
7015
7016void rtl8192SU_rx_nomal(struct sk_buff* skb)
7017{
7018 rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
7019 struct net_device *dev=info->dev;
7020 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
7021 struct ieee80211_rx_stats stats = {
7022 .signal = 0,
7023 .noise = -98,
7024 .rate = 0,
7025 // .mac_time = jiffies,
7026 .freq = IEEE80211_24GHZ_BAND,
7027 };
7028 u32 rx_pkt_len = 0;
7029 struct ieee80211_hdr_1addr *ieee80211_hdr = NULL;
7030 bool unicast_packet = false;
7031
5f53d8ca
JC		 7032 //printk("**********skb->len = %d\n", skb->len);
7033 /* 20 is for ps-poll */
7034 if((skb->len >=(20 + sizeof(rx_desc_819x_usb))) && (skb->len < RX_URB_SIZE)) {
7035
7036 /* first packet should not contain Rx aggregation header */
7037 rtl8192SU_query_rxdesc_status(skb, &stats, false);
7038 /* TODO */
7039
7040 /* hardware related info */
5f53d8ca
JC		 7041 priv->stats.rxoktotal++; //YJ,test,090108
7042
7043 /* Process the MPDU recevied */
7044 skb_trim(skb, skb->len - 4/*sCrcLng*/);//FIXLZM
7045
7046 rx_pkt_len = skb->len;
7047 ieee80211_hdr = (struct ieee80211_hdr_1addr *)skb->data;
7048 unicast_packet = false;
7049 if(is_broadcast_ether_addr(ieee80211_hdr->addr1)) {
7050 //TODO
7051 }else if(is_multicast_ether_addr(ieee80211_hdr->addr1)){
7052 //TODO
7053 }else {
7054 /* unicast packet */
7055 unicast_packet = true;
7056 }
7057
55c7d5fc 7058 if(!ieee80211_rtl_rx(priv->ieee80211,skb, &stats)) {
5f53d8ca
JC		 7059 dev_kfree_skb_any(skb);
7060 } else {
7061 // priv->stats.rxoktotal++; //YJ,test,090108
7062 if(unicast_packet) {
7063 priv->stats.rxbytesunicast += rx_pkt_len;
7064 }
7065 }
7066
7067 //up is firs pkt, follow is next and next
5f53d8ca
JC		 7068 }
7069 else
7070 {
7071 priv->stats.rxurberr++;
7072 printk("actual_length:%d\n", skb->len);
7073 dev_kfree_skb_any(skb);
7074 }
7075
7076}
5f53d8ca
JC		 7077
7078void
7079rtl819xusb_process_received_packet(
7080 struct net_device *dev,
7081 struct ieee80211_rx_stats *pstats
7082 )
7083{
7084// bool bfreerfd=false, bqueued=false;
7085 u8* frame;
7086 u16 frame_len=0;
7087 struct r8192_priv *priv = ieee80211_priv(dev);
7088// u8 index = 0;
7089// u8 TID = 0;
7090 //u16 seqnum = 0;
7091 //PRX_TS_RECORD pts = NULL;
7092
7093 // Get shifted bytes of Starting address of 802.11 header. 2006.09.28, by Emily
7094 //porting by amy 080508
7095 pstats->virtual_address += get_rxpacket_shiftbytes_819xusb(pstats);
7096 frame = pstats->virtual_address;
7097 frame_len = pstats->packetlength;
7098#ifdef TODO // by amy about HCT
7099 if(!Adapter->bInHctTest)
7100 CountRxErrStatistics(Adapter, pRfd);
7101#endif
7102 {
7103 #ifdef ENABLE_PS //by amy for adding ps function in future
7104 RT_RF_POWER_STATE rtState;
7105 // When RF is off, we should not count the packet for hw/sw synchronize
7106 // reason, ie. there may be a duration while sw switch is changed and hw
7107 // switch is being changed. 2006.12.04, by shien chang.
7108 Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RF_STATE, (u8* )(&rtState));
7109 if (rtState == eRfOff)
7110 {
7111 return;
7112 }
7113 #endif
7114 priv->stats.rxframgment++;
7115
7116 }
7117#ifdef TODO
7118 RmMonitorSignalStrength(Adapter, pRfd);
7119#endif
7120 /* 2007/01/16 MH Add RX command packet handle here. */
7121 /* 2007/03/01 MH We have to release RFD and return if rx pkt is cmd pkt. */
7122 if (rtl819xusb_rx_command_packet(dev, pstats))
7123 {
7124 return;
7125 }
7126
7127#ifdef SW_CRC_CHECK
7128 SwCrcCheck();
7129#endif
7130
7131
7132}
7133
7134void query_rx_cmdpkt_desc_status(struct sk_buff *skb, struct ieee80211_rx_stats *stats)
7135{
7136// rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
7137// struct net_device *dev=info->dev;
7138// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
7139 rx_desc_819x_usb *desc = (rx_desc_819x_usb *)skb->data;
7140// rx_drvinfo_819x_usb *driver_info;
7141
7142 //
7143 //Get Rx Descriptor Information
7144 //
7145 stats->virtual_address = (u8*)skb->data;
7146 stats->Length = desc->Length;
7147 stats->RxDrvInfoSize = 0;
7148 stats->RxBufShift = 0;
7149 stats->packetlength = stats->Length-scrclng;
7150 stats->fraglength = stats->packetlength;
7151 stats->fragoffset = 0;
7152 stats->ntotalfrag = 1;
7153}
7154
5f53d8ca
JC		 7155void rtl8192SU_rx_cmd(struct sk_buff *skb)
7156{
7157 struct rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
7158 struct net_device *dev = info->dev;
7159
7160 /* TODO */
7161 struct ieee80211_rx_stats stats = {
7162 .signal = 0,
7163 .noise = -98,
7164 .rate = 0,
7165 // .mac_time = jiffies,
7166 .freq = IEEE80211_24GHZ_BAND,
7167 };
7168
7169 //
7170 // Check buffer length to determine if this is a valid MPDU.
7171 //
7172 if( (skb->len >= sizeof(rx_desc_819x_usb)) && (skb->len <= RX_URB_SIZE) )//&&
7173 //(pHalData->SwChnlInProgress == FALSE))
7174 {
7175 //
7176 // Collection information in Rx descriptor.
7177 //
5f53d8ca
JC		 7178 query_rx_cmdpkt_desc_status(skb,&stats);
7179 // this is to be done by amy 080508 prfd->queue_id = 1;
7180
7181 //
7182 // Process the MPDU recevied.
7183 //
7184 rtl819xusb_process_received_packet(dev,&stats);
7185
7186 dev_kfree_skb_any(skb);
7187 }
7188 else
7189 {
7190 //RTInsertTailListWithCnt(&pAdapter->RfdIdleQueue, &pRfd->List, &pAdapter->NumIdleRfd);
7191 //RT_ASSERT(pAdapter->NumIdleRfd <= pAdapter->NumRfd, ("HalUsbInCommandComplete8192SUsb(): Adapter->NumIdleRfd(%d)\n", pAdapter->NumIdleRfd));
7192 //RT_TRACE(COMP_RECV, DBG_LOUD, ("HalUsbInCommandComplete8192SUsb(): NOT enough Resources!! BufLenUsed(%d), NumIdleRfd(%d)\n",
7193 //pContext->BufLenUsed, pAdapter->NumIdleRfd));
7194 }
7195
7196 //
7197 // Reuse USB_IN_CONTEXT since we had finished processing the
7198 // buffer in USB_IN_CONTEXT.
7199 //
7200 //HalUsbReturnInContext(pAdapter, pContext);
7201
7202 //
7203 // Issue another bulk IN transfer.
7204 //
7205 //HalUsbInMpdu(pAdapter, PipeIndex);
7206
7207 RT_TRACE(COMP_RECV, "<--- HalUsbInCommandComplete8192SUsb()\n");
7208
7209}
5f53d8ca
JC		 7210
7211void rtl8192_irq_rx_tasklet(struct r8192_priv *priv)
7212{
7213 struct sk_buff *skb;
7214 struct rtl8192_rx_info *info;
7215
7216 while (NULL != (skb = skb_dequeue(&priv->skb_queue))) {
7217 info = (struct rtl8192_rx_info *)skb->cb;
7218 switch (info->out_pipe) {
7219 /* Nomal packet pipe */
7220 case 3:
7221 //RT_TRACE(COMP_RECV, "normal in-pipe index(%d)\n",info->out_pipe);
7222 priv->IrpPendingCount--;
7223 priv->ops->rtl819x_rx_nomal(skb);
7224 break;
7225
7226 /* Command packet pipe */
7227 case 9:
7228 RT_TRACE(COMP_RECV, "command in-pipe index(%d)\n",\
7229 info->out_pipe);
7230 priv->ops->rtl819x_rx_cmd(skb);
7231 break;
7232
7233 default: /* should never get here! */
7234 RT_TRACE(COMP_ERR, "Unknown in-pipe index(%d)\n",\
7235 info->out_pipe);
7236 dev_kfree_skb(skb);
7237 break;
7238
7239 }
7240 }
7241}
7242
7243
7244
7245/****************************************************************************
7246 ---------------------------- USB_STUFF---------------------------
7247*****************************************************************************/
5f53d8ca
JC		 7248//LZM Merge from windows HalUsbSetQueuePipeMapping8192SUsb 090319
7249static void HalUsbSetQueuePipeMapping8192SUsb(struct usb_interface *intf, struct net_device *dev)
7250{
7251 struct r8192_priv *priv = ieee80211_priv(dev);
7252 struct usb_host_interface *iface_desc;
7253 struct usb_endpoint_descriptor *endpoint;
7254 u8 i = 0;
7255
7256 priv->ep_in_num = 0;
7257 priv->ep_out_num = 0;
7258 memset(priv->RtOutPipes,0,16);
7259 memset(priv->RtInPipes,0,16);
7260
5f53d8ca
JC		 7261 iface_desc = intf->cur_altsetting;
7262 priv->ep_num = iface_desc->desc.bNumEndpoints;
7263
7264 for (i = 0; i < priv->ep_num; ++i) {
7265 endpoint = &iface_desc->endpoint[i].desc;
5f53d8ca
JC		 7266 if (usb_endpoint_is_bulk_in(endpoint)) {
7267 priv->RtInPipes[priv->ep_in_num] = usb_endpoint_num(endpoint);
7268 priv->ep_in_num ++;
7269 //printk("in_endpoint_idx = %d\n", usb_endpoint_num(endpoint));
7270 } else if (usb_endpoint_is_bulk_out(endpoint)) {
7271 priv->RtOutPipes[priv->ep_out_num] = usb_endpoint_num(endpoint);
7272 priv->ep_out_num ++;
7273 //printk("out_endpoint_idx = %d\n", usb_endpoint_num(endpoint));
7274 }
5f53d8ca
JC		 7275 }
7276 {
7277 memset(priv->txqueue_to_outpipemap,0,9);
7278 if (priv->ep_num == 6) {
7279 // BK, BE, VI, VO, HCCA, TXCMD, MGNT, HIGH, BEACON
7280 u8 queuetopipe[] = {3, 2, 1, 0, 4, 4, 4, 4, 4};
7281
7282 memcpy(priv->txqueue_to_outpipemap,queuetopipe,9);
7283 } else if (priv->ep_num == 4) {
7284 // BK, BE, VI, VO, HCCA, TXCMD, MGNT, HIGH, BEACON
7285 u8 queuetopipe[] = {1, 1, 0, 0, 2, 2, 2, 2, 2};
7286
7287 memcpy(priv->txqueue_to_outpipemap,queuetopipe,9);
7288 } else if (priv->ep_num > 9) {
7289 // BK, BE, VI, VO, HCCA, TXCMD, MGNT, HIGH, BEACON
7290 u8 queuetopipe[] = {3, 2, 1, 0, 4, 8, 7, 6, 5};
7291
7292 memcpy(priv->txqueue_to_outpipemap,queuetopipe,9);
7293 } else {//use sigle pipe
7294 // BK, BE, VI, VO, HCCA, TXCMD, MGNT, HIGH, BEACON
7295 u8 queuetopipe[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
7296 memcpy(priv->txqueue_to_outpipemap,queuetopipe,9);
7297 }
7298 }
7299 printk("==>ep_num:%d, in_ep_num:%d, out_ep_num:%d\n", priv->ep_num, priv->ep_in_num, priv->ep_out_num);
7300
7301 printk("==>RtInPipes:");
7302 for(i=0; i < priv->ep_in_num; i++)
7303 printk("%d ", priv->RtInPipes[i]);
7304 printk("\n");
7305
7306 printk("==>RtOutPipes:");
7307 for(i=0; i < priv->ep_out_num; i++)
7308 printk("%d ", priv->RtOutPipes[i]);
7309 printk("\n");
7310
7311 printk("==>txqueue_to_outpipemap for BK, BE, VI, VO, HCCA, TXCMD, MGNT, HIGH, BEACON:\n");
7312 for(i=0; i < 9; i++)
7313 printk("%d ", priv->txqueue_to_outpipemap[i]);
7314 printk("\n");
5f53d8ca
JC		 7315
7316 return;
7317}
5f53d8ca 7318
77b92881
BZ		 7319static const struct net_device_ops rtl8192_netdev_ops = {
7320 .ndo_open = rtl8192_open,
7321 .ndo_stop = rtl8192_close,
7322 .ndo_get_stats = rtl8192_stats,
7323 .ndo_tx_timeout = tx_timeout,
7324 .ndo_do_ioctl = rtl8192_ioctl,
7325 .ndo_set_multicast_list = r8192_set_multicast,
7326 .ndo_set_mac_address = r8192_set_mac_adr,
7327 .ndo_validate_addr = eth_validate_addr,
7328 .ndo_change_mtu = eth_change_mtu,
55c7d5fc 7329 .ndo_start_xmit = rtl8192_ieee80211_rtl_xmit,
77b92881
BZ		 7330};
7331
5f53d8ca
JC		 7332static int __devinit rtl8192_usb_probe(struct usb_interface *intf,
7333 const struct usb_device_id *id)
5f53d8ca
JC		 7334{
7335// unsigned long ioaddr = 0;
7336 struct net_device *dev = NULL;
7337 struct r8192_priv *priv= NULL;
5f53d8ca 7338 struct usb_device *udev = interface_to_usbdev(intf);
1ec9e48d 7339
5f53d8ca
JC		 7340 RT_TRACE(COMP_INIT, "Oops: i'm coming\n");
7341
7342 dev = alloc_ieee80211(sizeof(struct r8192_priv));
7343
5f53d8ca
JC		 7344 usb_set_intfdata(intf, dev);
7345 SET_NETDEV_DEV(dev, &intf->dev);
5f53d8ca 7346 priv = ieee80211_priv(dev);
5f53d8ca 7347 priv->ieee80211 = netdev_priv(dev);
5f53d8ca
JC		 7348 priv->udev=udev;
7349
5f53d8ca 7350 HalUsbSetQueuePipeMapping8192SUsb(intf, dev);
5f53d8ca 7351
5f53d8ca
JC		 7352 //printk("===============>NIC 8192SU\n");
7353 priv->ops = &rtl8192su_ops;
5f53d8ca 7354
77b92881 7355 dev->netdev_ops = &rtl8192_netdev_ops;
5f53d8ca
JC		 7356
7357 //DMESG("Oops: i'm coming\n");
5f53d8ca 7358 dev->wireless_handlers = (struct iw_handler_def *) &r8192_wx_handlers_def;
3bd709f2 7359
5f53d8ca
JC		 7360 dev->type=ARPHRD_ETHER;
7361
7362 dev->watchdog_timeo = HZ*3; //modified by john, 0805
7363
7364 if (dev_alloc_name(dev, ifname) < 0){
7365 RT_TRACE(COMP_INIT, "Oops: devname already taken! Trying wlan%%d...\n");
7366 ifname = "wlan%d";
7367 dev_alloc_name(dev, ifname);
7368 }
7369
7370 RT_TRACE(COMP_INIT, "Driver probe completed1\n");
7371#if 1
7372 if(rtl8192_init(dev)!=0){
7373 RT_TRACE(COMP_ERR, "Initialization failed");
7374 goto fail;
7375 }
7376#endif
7377 netif_carrier_off(dev);
7378 netif_stop_queue(dev);
7379
7380 register_netdev(dev);
7381 RT_TRACE(COMP_INIT, "dev name=======> %s\n",dev->name);
7382 rtl8192_proc_init_one(dev);
7383
7384
7385 RT_TRACE(COMP_INIT, "Driver probe completed\n");
5f53d8ca 7386 return 0;
5f53d8ca
JC		 7387fail:
7388 free_ieee80211(dev);
7389
7390 RT_TRACE(COMP_ERR, "wlan driver load failed\n");
5f53d8ca 7391 return -ENODEV;
5f53d8ca
JC		 7392}
7393
7394//detach all the work and timer structure declared or inititialize in r8192U_init function.
7395void rtl8192_cancel_deferred_work(struct r8192_priv* priv)
7396{
5f53d8ca
JC		 7397 cancel_work_sync(&priv->reset_wq);
7398 cancel_work_sync(&priv->qos_activate);
7399 cancel_delayed_work(&priv->watch_dog_wq);
7400 cancel_delayed_work(&priv->update_beacon_wq);
7401 cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
7402 cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
7403 //cancel_work_sync(&priv->SetBWModeWorkItem);
7404 //cancel_work_sync(&priv->SwChnlWorkItem);
5f53d8ca
JC		 7405}
7406
5f53d8ca 7407static void __devexit rtl8192_usb_disconnect(struct usb_interface *intf)
5f53d8ca 7408{
5f53d8ca 7409 struct net_device *dev = usb_get_intfdata(intf);
5f53d8ca
JC		 7410 struct r8192_priv *priv = ieee80211_priv(dev);
7411 if(dev){
7412
7413 unregister_netdev(dev);
7414
7415 RT_TRACE(COMP_DOWN, "=============>wlan driver to be removed\n");
7416 rtl8192_proc_remove_one(dev);
7417
7418 rtl8192_down(dev);
7419 if (priv->pFirmware)
7420 {
7421 vfree(priv->pFirmware);
7422 priv->pFirmware = NULL;
7423 }
7424 // priv->rf_close(dev);
7425// rtl8192_SetRFPowerState(dev, eRfOff);
5f53d8ca 7426 destroy_workqueue(priv->priv_wq);
5f53d8ca
JC		 7427 //rtl8192_irq_disable(dev);
7428 //rtl8192_reset(dev);
7429 mdelay(10);
7430
7431 }
7432 free_ieee80211(dev);
7433 RT_TRACE(COMP_DOWN, "wlan driver removed\n");
7434}
7435
5d9baea9
BZ		 7436/* fun with the built-in ieee80211 stack... */
7437extern int ieee80211_debug_init(void);
7438extern void ieee80211_debug_exit(void);
7439extern int ieee80211_crypto_init(void);
7440extern void ieee80211_crypto_deinit(void);
7441extern int ieee80211_crypto_tkip_init(void);
7442extern void ieee80211_crypto_tkip_exit(void);
7443extern int ieee80211_crypto_ccmp_init(void);
7444extern void ieee80211_crypto_ccmp_exit(void);
7445extern int ieee80211_crypto_wep_init(void);
7446extern void ieee80211_crypto_wep_exit(void);
7447
5f53d8ca
JC		 7448static int __init rtl8192_usb_module_init(void)
7449{
5d9baea9
BZ		 7450 int ret;
7451
7452#ifdef CONFIG_IEEE80211_DEBUG
7453 ret = ieee80211_debug_init();
7454 if (ret) {
7455 printk(KERN_ERR "ieee80211_debug_init() failed %d\n", ret);
7456 return ret;
7457 }
7458#endif
7459 ret = ieee80211_crypto_init();
7460 if (ret) {
7461 printk(KERN_ERR "ieee80211_crypto_init() failed %d\n", ret);
7462 return ret;
7463 }
7464
7465 ret = ieee80211_crypto_tkip_init();
7466 if (ret) {
7467 printk(KERN_ERR "ieee80211_crypto_tkip_init() failed %d\n",
7468 ret);
7469 return ret;
7470 }
7471
7472 ret = ieee80211_crypto_ccmp_init();
7473 if (ret) {
7474 printk(KERN_ERR "ieee80211_crypto_ccmp_init() failed %d\n",
7475 ret);
7476 return ret;
7477 }
7478
7479 ret = ieee80211_crypto_wep_init();
7480 if (ret) {
7481 printk(KERN_ERR "ieee80211_crypto_wep_init() failed %d\n", ret);
7482 return ret;
7483 }
7484
5f53d8ca
JC		 7485 printk(KERN_INFO "\nLinux kernel driver for RTL8192 based WLAN cards\n");
7486 printk(KERN_INFO "Copyright (c) 2007-2008, Realsil Wlan\n");
7487 RT_TRACE(COMP_INIT, "Initializing module");
7488 RT_TRACE(COMP_INIT, "Wireless extensions version %d", WIRELESS_EXT);
7489 rtl8192_proc_module_init();
7490 return usb_register(&rtl8192_usb_driver);
7491}
7492
7493
7494static void __exit rtl8192_usb_module_exit(void)
7495{
7496 usb_deregister(&rtl8192_usb_driver);
7497
7498 RT_TRACE(COMP_DOWN, "Exiting");
7499 rtl8192_proc_module_remove();
5d9baea9
BZ		 7500
7501 ieee80211_crypto_tkip_exit();
7502 ieee80211_crypto_ccmp_exit();
7503 ieee80211_crypto_wep_exit();
7504 ieee80211_crypto_deinit();
7505#ifdef CONFIG_IEEE80211_DEBUG
7506 ieee80211_debug_exit();
7507#endif
5f53d8ca
JC		 7508}
7509
7510
7511void rtl8192_try_wake_queue(struct net_device *dev, int pri)
7512{
7513 unsigned long flags;
7514 short enough_desc;
7515 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
7516
7517 spin_lock_irqsave(&priv->tx_lock,flags);
7518 enough_desc = check_nic_enough_desc(dev,pri);
7519 spin_unlock_irqrestore(&priv->tx_lock,flags);
7520
7521 if(enough_desc)
55c7d5fc 7522 ieee80211_rtl_wake_queue(priv->ieee80211);
5f53d8ca
JC		 7523}
7524
5f53d8ca
JC		 7525void EnableHWSecurityConfig8192(struct net_device *dev)
7526{
8dbe821e 7527 u8 SECR_value = 0x0;
5f53d8ca 7528 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
8dbe821e 7529 struct ieee80211_device *ieee = priv->ieee80211;
5f53d8ca
JC		 7530
7531 SECR_value = SCR_TxEncEnable | SCR_RxDecEnable;
8dbe821e
FS		 7532 switch (ieee->pairwise_key_type) {
7533 case KEY_TYPE_WEP40:
7534 case KEY_TYPE_WEP104:
7535 if (priv->ieee80211->auth_mode != 2) {
7536 SECR_value |= SCR_RxUseDK;
7537 SECR_value |= SCR_TxUseDK;
7538 }
7539 break;
7540 case KEY_TYPE_TKIP:
7541 case KEY_TYPE_CCMP:
7542 if (ieee->iw_mode == IW_MODE_ADHOC) {
7543 SECR_value |= SCR_RxUseDK;
7544 SECR_value |= SCR_TxUseDK;
7545 }
7546 break;
7547 default:
7548 break;
5f53d8ca 7549 }
5f53d8ca 7550
8dbe821e
FS		 7551 /*
7552 * add HWSec active enable here.
7553 * default using hwsec.
7554 * when peer AP is in N mode only and pairwise_key_type is none_aes
7555 * (which HT_IOT_ACT_PURE_N_MODE indicates it),
7556 * use software security.
7557 * when peer AP is in b,g,n mode mixed and pairwise_key_type is none_aes
7558 * use g mode hw security.
7559 */
5f53d8ca
JC		 7560 ieee->hwsec_active = 1;
7561
8dbe821e
FS		 7562 /* add hwsec_support flag to totol control hw_sec on/off */
7563 if ((ieee->pHTInfo->IOTAction&HT_IOT_ACT_PURE_N_MODE) || !hwwep) {
5f53d8ca
JC		 7564 ieee->hwsec_active = 0;
7565 SECR_value &= ~SCR_RxDecEnable;
7566 }
7567
8dbe821e
FS		 7568 RT_TRACE(COMP_SEC, "%s(): hwsec: %d, pairwise_key: %d, "
7569 "SECR_value: %x",
7570 __func__, ieee->hwsec_active,
7571 ieee->pairwise_key_type, SECR_value);
7572
7573 write_nic_byte(dev, SECR, SECR_value); /* SECR_value | SCR_UseDK ); */
5f53d8ca
JC		 7574}
7575
7576
8dbe821e 7577void setKey(struct net_device *dev,
5f53d8ca
JC		 7578 u8 EntryNo,
7579 u8 KeyIndex,
7580 u16 KeyType,
7581 u8 *MacAddr,
7582 u8 DefaultKey,
8dbe821e 7583 u32 *KeyContent)
5f53d8ca
JC		 7584{
7585 u32 TargetCommand = 0;
7586 u32 TargetContent = 0;
7587 u16 usConfig = 0;
7588 u8 i;
8dbe821e 7589
5f53d8ca 7590 if (EntryNo >= TOTAL_CAM_ENTRY)
8dbe821e
FS		 7591 RT_TRACE(COMP_ERR, "%s(): cam entry exceeds TOTAL_CAM_ENTRY",
7592 __func__);
5f53d8ca 7593
8dbe821e
FS		 7594 RT_TRACE(COMP_SEC, "%s(): dev: %p, EntryNo: %d, "
7595 "KeyIndex: %d, KeyType: %d, MacAddr: %pM",
7596 __func__, dev, EntryNo,
7597 KeyIndex, KeyType, MacAddr);
5f53d8ca
JC		 7598
7599 if (DefaultKey)
8dbe821e 7600 usConfig |= BIT15 | (KeyType << 2);
5f53d8ca 7601 else
8dbe821e 7602 usConfig |= BIT15 | (KeyType << 2) | KeyIndex;
5f53d8ca 7603
8dbe821e
FS		 7604 for (i = 0 ; i < CAM_CONTENT_COUNT; i++) {
7605 TargetCommand = i + CAM_CONTENT_COUNT * EntryNo;
5f53d8ca 7606 TargetCommand |= BIT31|BIT16;
8dbe821e
FS		 7607 switch (i) {
7608 case 0: /* MAC|Config */
7609 TargetContent = (u32)(*(MacAddr + 0)) << 16|
7610 (u32)(*(MacAddr + 1)) << 24|
5f53d8ca
JC		 7611 (u32)usConfig;
7612
7613 write_nic_dword(dev, WCAMI, TargetContent);
7614 write_nic_dword(dev, RWCAM, TargetCommand);
8dbe821e
FS		 7615 continue;
7616 case 1: /* MAC */
7617 TargetContent = (u32)(*(MacAddr + 2))|
7618 (u32)(*(MacAddr + 3)) << 8|
7619 (u32)(*(MacAddr + 4)) << 16|
7620 (u32)(*(MacAddr + 5)) << 24;
5f53d8ca
JC		 7621 write_nic_dword(dev, WCAMI, TargetContent);
7622 write_nic_dword(dev, RWCAM, TargetCommand);
8dbe821e
FS		 7623 continue;
7624 default: /* Key Material */
7625 if (KeyContent != NULL) {
7626 write_nic_dword(dev, WCAMI,
7627 (u32)(*(KeyContent+i-2)));
7628 write_nic_dword(dev, RWCAM,
7629 TargetCommand);
7630 }
7631 continue;
5f53d8ca 7632 }
5f53d8ca 7633 }
5f53d8ca
JC		 7634}
7635
7636/***************************************************************************
7637 ------------------- module init / exit stubs ----------------
7638****************************************************************************/
7639module_init(rtl8192_usb_module_init);
7640module_exit(rtl8192_usb_module_exit);
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