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Staging: rtl8192su: remove unused ieee80211_crypt.h
[net-next-2.6.git] / drivers / staging / rtl8187se / r8180_core.c
CommitLineData
c8d86be3
GKH		 1/*
2 This is part of rtl818x pci OpenSource driver - v 0.1
3 Copyright (C) Andrea Merello 2004-2005 <andreamrl@tiscali.it>
4 Released under the terms of GPL (General Public License)
5
6 Parts of this driver are based on the GPL part of the official
7 Realtek driver.
8
9 Parts of this driver are based on the rtl8180 driver skeleton
10 from Patric Schenke & Andres Salomon.
11
12 Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
13
14 Parts of BB/RF code are derived from David Young rtl8180 netbsd driver.
15
16 RSSI calc function from 'The Deuce'
17
18 Some ideas borrowed from the 8139too.c driver included in linux kernel.
19
20 We (I?) want to thanks the Authors of those projecs and also the
21 Ndiswrapper's project Authors.
22
23 A big big thanks goes also to Realtek corp. for their help in my attempt to
24 add RTL8185 and RTL8225 support, and to David Young also.
25*/
26
27#if 0
28double __floatsidf (int i) { return i; }
29unsigned int __fixunsdfsi (double d) { return d; }
30double __adddf3(double a, double b) { return a+b; }
31double __addsf3(float a, float b) { return a+b; }
32double __subdf3(double a, double b) { return a-b; }
33double __extendsfdf2(float a) {return a;}
34#endif
35
36
37#undef DEBUG_TX_DESC2
38#undef RX_DONT_PASS_UL
39#undef DEBUG_EPROM
40#undef DEBUG_RX_VERBOSE
41#undef DUMMY_RX
42#undef DEBUG_ZERO_RX
43#undef DEBUG_RX_SKB
44#undef DEBUG_TX_FRAG
45#undef DEBUG_RX_FRAG
46#undef DEBUG_TX_FILLDESC
47#undef DEBUG_TX
48#undef DEBUG_IRQ
49#undef DEBUG_RX
50#undef DEBUG_RXALLOC
51#undef DEBUG_REGISTERS
52#undef DEBUG_RING
53#undef DEBUG_IRQ_TASKLET
54#undef DEBUG_TX_ALLOC
55#undef DEBUG_TX_DESC
56
57//#define DEBUG_TX
58//#define DEBUG_TX_DESC2
59//#define DEBUG_RX
60//#define DEBUG_RX_SKB
61
62//#define CONFIG_RTL8180_IO_MAP
63#include <linux/syscalls.h>
64//#include <linux/fcntl.h>
65//#include <asm/uaccess.h>
66#include "r8180_hw.h"
67#include "r8180.h"
68#include "r8180_sa2400.h" /* PHILIPS Radio frontend */
69#include "r8180_max2820.h" /* MAXIM Radio frontend */
70#include "r8180_gct.h" /* GCT Radio frontend */
71#include "r8180_rtl8225.h" /* RTL8225 Radio frontend */
72#include "r8180_rtl8255.h" /* RTL8255 Radio frontend */
73#include "r8180_93cx6.h" /* Card EEPROM */
74#include "r8180_wx.h"
75#include "r8180_dm.h"
76
77#ifdef CONFIG_RTL8180_PM
78#include "r8180_pm.h"
79#endif
80
81#ifdef ENABLE_DOT11D
fd9b8d6e 82#include "ieee80211/dot11d.h"
c8d86be3
GKH		 83#endif
84
85#ifdef CONFIG_RTL8185B
86//#define CONFIG_RTL8180_IO_MAP
87#endif
88
89#ifndef PCI_VENDOR_ID_BELKIN
90 #define PCI_VENDOR_ID_BELKIN 0x1799
91#endif
92#ifndef PCI_VENDOR_ID_DLINK
93 #define PCI_VENDOR_ID_DLINK 0x1186
94#endif
95
96static struct pci_device_id rtl8180_pci_id_tbl[] __devinitdata = {
97 {
98 .vendor = PCI_VENDOR_ID_REALTEK,
99// .device = 0x8180,
100 .device = 0x8199,
101 .subvendor = PCI_ANY_ID,
102 .subdevice = PCI_ANY_ID,
103 .driver_data = 0,
104 },
1fa511ad 105#if 0
c8d86be3
GKH		 106 {
107 .vendor = PCI_VENDOR_ID_BELKIN,
108 .device = 0x6001,
109 .subvendor = PCI_ANY_ID,
110 .subdevice = PCI_ANY_ID,
111 .driver_data = 1,
112 },
113 { /* Belkin F5D6020 v3 */
114 .vendor = PCI_VENDOR_ID_BELKIN,
115 .device = 0x6020,
116 .subvendor = PCI_ANY_ID,
117 .subdevice = PCI_ANY_ID,
118 .driver_data = 2,
119 },
120 { /* D-Link DWL-610 */
121 .vendor = PCI_VENDOR_ID_DLINK,
122 .device = 0x3300,
123 .subvendor = PCI_ANY_ID,
124 .subdevice = PCI_ANY_ID,
125 .driver_data = 3,
126 },
127 {
128 .vendor = PCI_VENDOR_ID_REALTEK,
129 .device = 0x8185,
130 .subvendor = PCI_ANY_ID,
131 .subdevice = PCI_ANY_ID,
132 .driver_data = 4,
133 },
1fa511ad 134#endif
c8d86be3
GKH		 135 {
136 .vendor = 0,
137 .device = 0,
138 .subvendor = 0,
139 .subdevice = 0,
140 .driver_data = 0,
141 }
142};
143
144
145static char* ifname = "wlan%d";
146static int hwseqnum = 0;
147//static char* ifname = "ath%d";
148static int hwwep = 0;
149static int channels = 0x3fff;
150
151#define eqMacAddr(a,b) ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 )
152#define cpMacAddr(des,src) ((des)[0]=(src)[0],(des)[1]=(src)[1],(des)[2]=(src)[2],(des)[3]=(src)[3],(des)[4]=(src)[4],(des)[5]=(src)[5])
153MODULE_LICENSE("GPL");
154MODULE_DEVICE_TABLE(pci, rtl8180_pci_id_tbl);
155MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
156MODULE_DESCRIPTION("Linux driver for Realtek RTL8180 / RTL8185 WiFi cards");
157
158
159
160/*
161MODULE_PARM(ifname, "s");
162MODULE_PARM_DESC(devname," Net interface name, wlan%d=default");
163
164MODULE_PARM(hwseqnum,"i");
165MODULE_PARM_DESC(hwseqnum," Try to use hardware 802.11 header sequence numbers. Zero=default");
166
167MODULE_PARM(hwwep,"i");
168MODULE_PARM_DESC(hwwep," Try to use hardware WEP support. Still broken and not available on all cards");
169
170MODULE_PARM(channels,"i");
171MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
172*/
173
174#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 9)
175module_param(ifname, charp, S_IRUGO|S_IWUSR );
176module_param(hwseqnum,int, S_IRUGO|S_IWUSR);
177module_param(hwwep,int, S_IRUGO|S_IWUSR);
178module_param(channels,int, S_IRUGO|S_IWUSR);
179#else
180MODULE_PARM(ifname, "s");
181MODULE_PARM(hwseqnum,"i");
182MODULE_PARM(hwwep,"i");
183MODULE_PARM(channels,"i");
184#endif
185
186MODULE_PARM_DESC(devname," Net interface name, wlan%d=default");
187//MODULE_PARM_DESC(devname," Net interface name, ath%d=default");
188MODULE_PARM_DESC(hwseqnum," Try to use hardware 802.11 header sequence numbers. Zero=default");
189MODULE_PARM_DESC(hwwep," Try to use hardware WEP support. Still broken and not available on all cards");
190MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
191
192
193static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
194 const struct pci_device_id *id);
195
196static void __devexit rtl8180_pci_remove(struct pci_dev *pdev);
197
198static void rtl8180_shutdown (struct pci_dev *pdev)
199{
200 struct net_device *dev = pci_get_drvdata(pdev);
727ae303
AB		 201 if (dev->netdev_ops->ndo_stop)
202 dev->netdev_ops->ndo_stop(dev);
c8d86be3
GKH		 203 pci_disable_device(pdev);
204}
205
206static struct pci_driver rtl8180_pci_driver = {
207 .name = RTL8180_MODULE_NAME, /* Driver name */
208 .id_table = rtl8180_pci_id_tbl, /* PCI_ID table */
209 .probe = rtl8180_pci_probe, /* probe fn */
210 .remove = __devexit_p(rtl8180_pci_remove),/* remove fn */
211#ifdef CONFIG_RTL8180_PM
212 .suspend = rtl8180_suspend, /* PM suspend fn */
213 .resume = rtl8180_resume, /* PM resume fn */
214#else
215 .suspend = NULL, /* PM suspend fn */
216 .resume = NULL, /* PM resume fn */
217#endif
218 .shutdown = rtl8180_shutdown,
219};
220
221
222
223#ifdef CONFIG_RTL8180_IO_MAP
224
225u8 read_nic_byte(struct net_device *dev, int x)
226{
227 return 0xff&inb(dev->base_addr +x);
228}
229
230u32 read_nic_dword(struct net_device *dev, int x)
231{
232 return inl(dev->base_addr +x);
233}
234
235u16 read_nic_word(struct net_device *dev, int x)
236{
237 return inw(dev->base_addr +x);
238}
239
240void write_nic_byte(struct net_device *dev, int x,u8 y)
241{
242 outb(y&0xff,dev->base_addr +x);
243}
244
245void write_nic_word(struct net_device *dev, int x,u16 y)
246{
247 outw(y,dev->base_addr +x);
248}
249
250void write_nic_dword(struct net_device *dev, int x,u32 y)
251{
252 outl(y,dev->base_addr +x);
253}
254
255#else /* RTL_IO_MAP */
256
257u8 read_nic_byte(struct net_device *dev, int x)
258{
259 return 0xff&readb((u8*)dev->mem_start +x);
260}
261
262u32 read_nic_dword(struct net_device *dev, int x)
263{
264 return readl((u8*)dev->mem_start +x);
265}
266
267u16 read_nic_word(struct net_device *dev, int x)
268{
269 return readw((u8*)dev->mem_start +x);
270}
271
272void write_nic_byte(struct net_device *dev, int x,u8 y)
273{
274 writeb(y,(u8*)dev->mem_start +x);
275 udelay(20);
276}
277
278void write_nic_dword(struct net_device *dev, int x,u32 y)
279{
280 writel(y,(u8*)dev->mem_start +x);
281 udelay(20);
282}
283
284void write_nic_word(struct net_device *dev, int x,u16 y)
285{
286 writew(y,(u8*)dev->mem_start +x);
287 udelay(20);
288}
289
290#endif /* RTL_IO_MAP */
291
292
293
294
295
296inline void force_pci_posting(struct net_device *dev)
297{
298 read_nic_byte(dev,EPROM_CMD);
299#ifndef CONFIG_RTL8180_IO_MAP
300 mb();
301#endif
302}
303
304
305irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs);
306void set_nic_rxring(struct net_device *dev);
307void set_nic_txring(struct net_device *dev);
308static struct net_device_stats *rtl8180_stats(struct net_device *dev);
309void rtl8180_commit(struct net_device *dev);
310void rtl8180_start_tx_beacon(struct net_device *dev);
311
312/****************************************************************************
313 -----------------------------PROCFS STUFF-------------------------
314*****************************************************************************/
315
316static struct proc_dir_entry *rtl8180_proc = NULL;
317
318static int proc_get_registers(char *page, char **start,
319 off_t offset, int count,
320 int *eof, void *data)
321{
322 struct net_device *dev = data;
323// struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
324
325 int len = 0;
326 int i,n;
327
328 int max=0xff;
329
330 /* This dump the current register page */
331 for(n=0;n<=max;)
332 {
333 //printk( "\nD: %2x> ", n);
334 len += snprintf(page + len, count - len,
335 "\nD: %2x > ",n);
336
337 for(i=0;i<16 && n<=max;i++,n++)
338 len += snprintf(page + len, count - len,
339 "%2x ",read_nic_byte(dev,n));
340
341 // printk("%2x ",read_nic_byte(dev,n));
342 }
343 len += snprintf(page + len, count - len,"\n");
344
345
346
347 *eof = 1;
348 return len;
349
350}
351
352int get_curr_tx_free_desc(struct net_device *dev, int priority);
353
354static int proc_get_stats_hw(char *page, char **start,
355 off_t offset, int count,
356 int *eof, void *data)
357{
358 //struct net_device *dev = data;
359 //struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
360
361 int len = 0;
362#ifdef CONFIG_RTL8185B
363
364#else
365 len += snprintf(page + len, count - len,
366 "NIC int: %lu\n"
367 "Total int: %lu\n"
368 "--------------------\n"
369 "LP avail desc %d\n"
370 "NP avail desc %d\n"
371 "--------------------\n"
372 "LP phys dma addr %x\n"
373 "LP NIC ptr %x\n"
374 "LP virt 32base %x\n"
375 "LP virt 32tail %x\n"
376 "--------------------\n"
377 "NP phys dma addr %x\n"
378 "NP NIC ptr %x\n"
379 "NP virt 32base %x\n"
380 "NP virt 32tail %x\n"
381 "--------------------\n"
382 "BP phys dma addr %x\n"
383 "BP NIC ptr %x\n"
384 "BP virt 32base %x\n"
385 "BP virt 32tail %x\n",
386 priv->stats.ints,
387 priv->stats.shints,
388 get_curr_tx_free_desc(dev,LOW_PRIORITY),
389 get_curr_tx_free_desc(dev,NORM_PRIORITY),
390 (u32)priv->txvipringdma,
391 read_nic_dword(dev,TLPDA),
392 (u32)priv->txvipring,
393 (u32)priv->txvipringtail,
394 (u32)priv->txvopringdma,
395 read_nic_dword(dev,TNPDA),
396 (u32)priv->txvopring,
397 (u32)priv->txvopringtail,
398 (u32)priv->txbeaconringdma,
399 read_nic_dword(dev,TBDA),
400 (u32)priv->txbeaconring,
401 (u32)priv->txbeaconringtail);
402#endif
403 *eof = 1;
404 return len;
405}
406
407
408static int proc_get_stats_rx(char *page, char **start,
409 off_t offset, int count,
410 int *eof, void *data)
411{
412 struct net_device *dev = data;
413 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
414
415 int len = 0;
416
417 len += snprintf(page + len, count - len,
418 /* "RX descriptor not available: %lu\n"
419 "RX incomplete (missing last descriptor): %lu\n"
420 "RX not data: %lu\n"
421 //"RX descriptor pointer reset: %lu\n"
422 "RX descriptor pointer lost: %lu\n"
423 //"RX pointer workaround: %lu\n"
424 "RX error int: %lu\n"
425 "RX fifo overflow: %lu\n"
426 "RX int: %lu\n"
427 "RX packet: %lu\n"
428 "RX bytes: %lu\n"
429 "RX DMA fail: %lu\n",
430 priv->stats.rxrdu,
431 priv->stats.rxnolast,
432 priv->stats.rxnodata,
433 //priv->stats.rxreset,
434 priv->stats.rxnopointer,
435 //priv->stats.rxwrkaround,
436 priv->stats.rxerr,
437 priv->stats.rxoverflow,
438 priv->stats.rxint,
439 priv->ieee80211->stats.rx_packets,
440 priv->ieee80211->stats.rx_bytes,
441 priv->stats.rxdmafail */
442 "RX OK: %lu\n"
443 "RX Retry: %lu\n"
444 "RX CRC Error(0-500): %lu\n"
445 "RX CRC Error(500-1000): %lu\n"
446 "RX CRC Error(>1000): %lu\n"
447 "RX ICV Error: %lu\n",
448 priv->stats.rxint,
449 priv->stats.rxerr,
450 priv->stats.rxcrcerrmin,
451 priv->stats.rxcrcerrmid,
452 priv->stats.rxcrcerrmax,
453 priv->stats.rxicverr
454 );
455
456 *eof = 1;
457 return len;
458}
459
460#if 0
461static int proc_get_stats_ieee(char *page, char **start,
462 off_t offset, int count,
463 int *eof, void *data)
464{
465 struct net_device *dev = data;
466 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
467
468 int len = 0;
469
470 len += snprintf(page + len, count - len,
471 "TXed association requests: %u\n"
472 "TXed authentication requests: %u\n"
473 "RXed successful association response: %u\n"
474 "RXed failed association response: %u\n"
475 "RXed successful authentication response: %u\n"
476 "RXed failed authentication response: %u\n"
477 "Association requests without response: %u\n"
478 "Authentication requests without response: %u\n"
479 "TX probe response: %u\n"
480 "RX probe request: %u\n"
481 "TX probe request: %lu\n"
482 "RX authentication requests: %lu\n"
483 "RX association requests: %lu\n"
484 "Reassociations: %lu\n",
485 priv->ieee80211->ieee_stats.tx_ass,
486 priv->ieee80211->ieee_stats.tx_aut,
487 priv->ieee80211->ieee_stats.rx_ass_ok,
488 priv->ieee80211->ieee_stats.rx_ass_err,
489 priv->ieee80211->ieee_stats.rx_aut_ok,
490 priv->ieee80211->ieee_stats.rx_aut_err,
491 priv->ieee80211->ieee_stats.ass_noresp,
492 priv->ieee80211->ieee_stats.aut_noresp,
493 priv->ieee80211->ieee_stats.tx_probe,
494 priv->ieee80211->ieee_stats.rx_probe,
495 priv->ieee80211->ieee_stats.tx_probe_rq,
496 priv->ieee80211->ieee_stats.rx_auth_rq,
497 priv->ieee80211->ieee_stats.rx_assoc_rq,
498 priv->ieee80211->ieee_stats.reassoc);
499
500 *eof = 1;
501 return len;
502}
503#endif
504#if 0
505static int proc_get_stats_ap(char *page, char **start,
506 off_t offset, int count,
507 int *eof, void *data)
508{
509 struct net_device *dev = data;
510 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
511 struct mac_htable_t *list;
512 int i;
513 int len = 0;
514
515 if(priv->ieee80211->iw_mode != IW_MODE_MASTER){
516 len += snprintf(page + len, count - len,
517 "Card is not acting as AP...\n"
518 );
519 }else{
520 len += snprintf(page + len, count - len,
521 "List of associated STA:\n"
522 );
523
524 for(i=0;i<MAC_HTABLE_ENTRY;i++)
525 for (list = priv->ieee80211->assoc_htable[i]; list!=NULL; list = list->next){
526 len += snprintf(page + len, count - len,
527 MACSTR"\n",MAC2STR(list->adr));
528 }
529
530 }
531 *eof = 1;
532 return len;
533}
534#endif
535
536static int proc_get_stats_tx(char *page, char **start,
537 off_t offset, int count,
538 int *eof, void *data)
539{
540 struct net_device *dev = data;
541 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
542
543 int len = 0;
544 unsigned long totalOK;
545
546 totalOK=priv->stats.txnpokint+priv->stats.txhpokint+priv->stats.txlpokint;
547 len += snprintf(page + len, count - len,
548 /* "TX normal priority ok int: %lu\n"
549 "TX normal priority error int: %lu\n"
550 "TX high priority ok int: %lu\n"
551 "TX high priority failed error int: %lu\n"
552 "TX low priority ok int: %lu\n"
553 "TX low priority failed error int: %lu\n"
554 "TX bytes: %lu\n"
555 "TX packets: %lu\n"
556 "TX queue resume: %lu\n"
557 "TX queue stopped?: %d\n"
558 "TX fifo overflow: %lu\n"
559 //"SW TX stop: %lu\n"
560 //"SW TX wake: %lu\n"
561 "TX beacon: %lu\n"
562 "TX beacon aborted: %lu\n",
563 priv->stats.txnpokint,
564 priv->stats.txnperr,
565 priv->stats.txhpokint,
566 priv->stats.txhperr,
567 priv->stats.txlpokint,
568 priv->stats.txlperr,
569 priv->ieee80211->stats.tx_bytes,
570 priv->ieee80211->stats.tx_packets,
571 priv->stats.txresumed,
572 netif_queue_stopped(dev),
573 priv->stats.txoverflow,
574 //priv->ieee80211->ieee_stats.swtxstop,
575 //priv->ieee80211->ieee_stats.swtxawake,
576 priv->stats.txbeacon,
577 priv->stats.txbeaconerr */
578 "TX OK: %lu\n"
579 "TX Error: %lu\n"
580 "TX Retry: %lu\n"
581 "TX beacon OK: %lu\n"
582 "TX beacon error: %lu\n",
583 totalOK,
584 priv->stats.txnperr+priv->stats.txhperr+priv->stats.txlperr,
585 priv->stats.txretry,
586 priv->stats.txbeacon,
587 priv->stats.txbeaconerr
588 );
589
590 *eof = 1;
591 return len;
592}
593
594
595#if WIRELESS_EXT < 17
596static struct iw_statistics *r8180_get_wireless_stats(struct net_device *dev)
597{
598 struct r8180_priv *priv = ieee80211_priv(dev);
599
600 return &priv->wstats;
601}
602#endif
603void rtl8180_proc_module_init(void)
604{
605 DMESG("Initializing proc filesystem");
606#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
607 rtl8180_proc=create_proc_entry(RTL8180_MODULE_NAME, S_IFDIR, proc_net);
608#else
609 rtl8180_proc=create_proc_entry(RTL8180_MODULE_NAME, S_IFDIR, init_net.proc_net);
610#endif
611}
612
613
614void rtl8180_proc_module_remove(void)
615{
616#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
617 remove_proc_entry(RTL8180_MODULE_NAME, proc_net);
618#else
619 remove_proc_entry(RTL8180_MODULE_NAME, init_net.proc_net);
620#endif
621}
622
623
624void rtl8180_proc_remove_one(struct net_device *dev)
625{
626 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
627 if (priv->dir_dev) {
628 remove_proc_entry("stats-hw", priv->dir_dev);
629 remove_proc_entry("stats-tx", priv->dir_dev);
630 remove_proc_entry("stats-rx", priv->dir_dev);
631// remove_proc_entry("stats-ieee", priv->dir_dev);
632// remove_proc_entry("stats-ap", priv->dir_dev);
633 remove_proc_entry("registers", priv->dir_dev);
634 remove_proc_entry(dev->name, rtl8180_proc);
635 priv->dir_dev = NULL;
636 }
637}
638
639
640void rtl8180_proc_init_one(struct net_device *dev)
641{
642 struct proc_dir_entry *e;
643 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
be286fd2 644 priv->dir_dev = rtl8180_proc;
c8d86be3 645 if (!priv->dir_dev) {
be286fd2 646 DMESGE("Unable to initialize /proc/net/r8180/%s\n",
c8d86be3
GKH		 647 dev->name);
648 return;
649 }
650
651 e = create_proc_read_entry("stats-hw", S_IFREG | S_IRUGO,
652 priv->dir_dev, proc_get_stats_hw, dev);
653
654 if (!e) {
655 DMESGE("Unable to initialize "
be286fd2 656 "/proc/net/r8180/%s/stats-hw\n",
c8d86be3
GKH		 657 dev->name);
658 }
659
660 e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
661 priv->dir_dev, proc_get_stats_rx, dev);
662
663 if (!e) {
664 DMESGE("Unable to initialize "
be286fd2 665 "/proc/net/r8180/%s/stats-rx\n",
c8d86be3
GKH		 666 dev->name);
667 }
668
669
670 e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO,
671 priv->dir_dev, proc_get_stats_tx, dev);
672
673 if (!e) {
674 DMESGE("Unable to initialize "
be286fd2 675 "/proc/net/r8180/%s/stats-tx\n",
c8d86be3
GKH		 676 dev->name);
677 }
678 #if 0
679 e = create_proc_read_entry("stats-ieee", S_IFREG | S_IRUGO,
680 priv->dir_dev, proc_get_stats_ieee, dev);
681
682 if (!e) {
683 DMESGE("Unable to initialize "
684 "/proc/net/rtl8180/%s/stats-ieee\n",
685 dev->name);
686 }
687 #endif
688 #if 0
689 e = create_proc_read_entry("stats-ap", S_IFREG | S_IRUGO,
690 priv->dir_dev, proc_get_stats_ap, dev);
691
692 if (!e) {
693 DMESGE("Unable to initialize "
694 "/proc/net/rtl8180/%s/stats-ap\n",
695 dev->name);
696 }
697 #endif
698
699 e = create_proc_read_entry("registers", S_IFREG | S_IRUGO,
700 priv->dir_dev, proc_get_registers, dev);
701
702 if (!e) {
703 DMESGE("Unable to initialize "
be286fd2 704 "/proc/net/r8180/%s/registers\n",
c8d86be3
GKH		 705 dev->name);
706 }
707}
708/****************************************************************************
709 -----------------------------MISC STUFF-------------------------
710*****************************************************************************/
711/*
712 FIXME: check if we can use some standard already-existent
713 data type+functions in kernel
714*/
715
716short buffer_add(struct buffer **buffer, u32 *buf, dma_addr_t dma,
717 struct buffer **bufferhead)
718{
719#ifdef DEBUG_RING
720 DMESG("adding buffer to TX/RX struct");
721#endif
722
723 struct buffer *tmp;
724
725 if(! *buffer){
726
727 *buffer = kmalloc(sizeof(struct buffer),GFP_KERNEL);
728
729 if (*buffer == NULL) {
730 DMESGE("Failed to kmalloc head of TX/RX struct");
731 return -1;
732 }
733 (*buffer)->next=*buffer;
734 (*buffer)->buf=buf;
735 (*buffer)->dma=dma;
736 if(bufferhead !=NULL)
737 (*bufferhead) = (*buffer);
738 return 0;
739 }
740 tmp=*buffer;
741
742 while(tmp->next!=(*buffer)) tmp=tmp->next;
743 if ((tmp->next= kmalloc(sizeof(struct buffer),GFP_KERNEL)) == NULL){
744 DMESGE("Failed to kmalloc TX/RX struct");
745 return -1;
746 }
747 tmp->next->buf=buf;
748 tmp->next->dma=dma;
749 tmp->next->next=*buffer;
750
751 return 0;
752}
753
754
755void buffer_free(struct net_device *dev,struct buffer **buffer,int len,short
756consistent)
757{
758
759 struct buffer *tmp,*next;
760 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
761 struct pci_dev *pdev=priv->pdev;
762 //int i;
763
764 if(! *buffer) return;
765
766 /*for(tmp=*buffer; tmp->next != *buffer; tmp=tmp->next)
767
768 */
769 tmp=*buffer;
770 do{
771 next=tmp->next;
772 if(consistent){
773 pci_free_consistent(pdev,len,
774 tmp->buf,tmp->dma);
775 }else{
776 pci_unmap_single(pdev, tmp->dma,
777 len,PCI_DMA_FROMDEVICE);
778 kfree(tmp->buf);
779 }
780 kfree(tmp);
781 tmp = next;
782 }
783 while(next != *buffer);
784
785 *buffer=NULL;
786}
787
788
789void print_buffer(u32 *buffer, int len)
790{
791 int i;
792 u8 *buf =(u8*)buffer;
793
794 printk("ASCII BUFFER DUMP (len: %x):\n",len);
795
796 for(i=0;i<len;i++)
797 printk("%c",buf[i]);
798
799 printk("\nBINARY BUFFER DUMP (len: %x):\n",len);
800
801 for(i=0;i<len;i++)
802 printk("%02x",buf[i]);
803
804 printk("\n");
805}
806
807
808int get_curr_tx_free_desc(struct net_device *dev, int priority)
809{
810 struct r8180_priv *priv = ieee80211_priv(dev);
811 u32* tail;
812 u32* head;
813 int ret;
814
815 switch (priority){
816 case MANAGE_PRIORITY:
817 head = priv->txmapringhead;
818 tail = priv->txmapringtail;
819 break;
820 case BK_PRIORITY:
821 head = priv->txbkpringhead;
822 tail = priv->txbkpringtail;
823 break;
824 case BE_PRIORITY:
825 head = priv->txbepringhead;
826 tail = priv->txbepringtail;
827 break;
828 case VI_PRIORITY:
829 head = priv->txvipringhead;
830 tail = priv->txvipringtail;
831 break;
832 case VO_PRIORITY:
833 head = priv->txvopringhead;
834 tail = priv->txvopringtail;
835 break;
836 case HI_PRIORITY:
837 head = priv->txhpringhead;
838 tail = priv->txhpringtail;
839 break;
840 default:
841 return -1;
842 }
843
844 //DMESG("%x %x", head, tail);
845
846 /* FIXME FIXME FIXME FIXME */
847
848#if 0
849 if( head <= tail ) return priv->txringcount-1 - (tail - head)/8;
850 return (head - tail)/8/4;
851#else
852 if( head <= tail )
853 ret = priv->txringcount - (tail - head)/8;
854 else
855 ret = (head - tail)/8;
856
857 if(ret > priv->txringcount ) DMESG("BUG");
858 return ret;
859#endif
860}
861
862
863short check_nic_enought_desc(struct net_device *dev, int priority)
864{
865 struct r8180_priv *priv = ieee80211_priv(dev);
866 struct ieee80211_device *ieee = netdev_priv(dev);
867
868 int requiredbyte, required;
869 requiredbyte = priv->ieee80211->fts + sizeof(struct ieee80211_header_data);
870
871 if(ieee->current_network.QoS_Enable) {
872 requiredbyte += 2;
873 };
874
875 required = requiredbyte / (priv->txbuffsize-4);
876 if (requiredbyte % priv->txbuffsize) required++;
877 /* for now we keep two free descriptor as a safety boundary
878 * between the tail and the head
879 */
880
881 return (required+2 < get_curr_tx_free_desc(dev,priority));
882}
883
884
885/* This function is only for debuging purpose */
886void check_tx_ring(struct net_device *dev, int pri)
887{
888 static int maxlog =3;
889 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
890 u32* tmp;
891 struct buffer *buf;
892 int i;
893 int nic;
894 u32* tail;
895 u32* head;
896 u32* begin;
897 u32 nicbegin;
898 struct buffer* buffer;
899
900 maxlog --;
901 if (maxlog <0 ) return;
902
903 switch(pri) {
904 case MANAGE_PRIORITY:
905 tail = priv->txmapringtail;
906 begin = priv->txmapring;
907 head = priv->txmapringhead;
908 nic = read_nic_dword(dev,TX_MANAGEPRIORITY_RING_ADDR);
909 buffer = priv->txmapbufs;
910 nicbegin = priv->txmapringdma;
911 break;
912
913
914 case BK_PRIORITY:
915 tail = priv->txbkpringtail;
916 begin = priv->txbkpring;
917 head = priv->txbkpringhead;
918 nic = read_nic_dword(dev,TX_BKPRIORITY_RING_ADDR);
919 buffer = priv->txbkpbufs;
920 nicbegin = priv->txbkpringdma;
921 break;
922
923 case BE_PRIORITY:
924 tail = priv->txbepringtail;
925 begin = priv->txbepring;
926 head = priv->txbepringhead;
927 nic = read_nic_dword(dev,TX_BEPRIORITY_RING_ADDR);
928 buffer = priv->txbepbufs;
929 nicbegin = priv->txbepringdma;
930 break;
931
932 case VI_PRIORITY:
933 tail = priv->txvipringtail;
934 begin = priv->txvipring;
935 head = priv->txvipringhead;
936 nic = read_nic_dword(dev,TX_VIPRIORITY_RING_ADDR);
937 buffer = priv->txvipbufs;
938 nicbegin = priv->txvipringdma;
939 break;
940
941
942 case VO_PRIORITY:
943 tail = priv->txvopringtail;
944 begin = priv->txvopring;
945 head = priv->txvopringhead;
946 nic = read_nic_dword(dev,TX_VOPRIORITY_RING_ADDR);
947 buffer = priv->txvopbufs;
948 nicbegin = priv->txvopringdma;
949 break;
950
951 case HI_PRIORITY:
952 tail = priv->txhpringtail;
953 begin = priv->txhpring;
954 head = priv->txhpringhead;
955 nic = read_nic_dword(dev,TX_HIGHPRIORITY_RING_ADDR);
956 buffer = priv->txhpbufs;
957 nicbegin = priv->txhpringdma;
958 break;
959
960 default:
961 return ;
962 break;
963 }
964
965 if(!priv->txvopbufs)
966 DMESGE ("NIC TX ack, but TX queue corrupted!");
967 else{
968
969 for(i=0,buf=buffer, tmp=begin;
970 tmp<begin+(priv->txringcount)*8;
971 tmp+=8,buf=buf->next,i++)
972
973 DMESG("BUF%d %s %x %s. Next : %x",i,
974 *tmp & (1<<31) ? "filled" : "empty",
975 *(buf->buf),
976 *tmp & (1<<15)? "ok": "err", *(tmp+4));
977 }
978
c8d86be3
GKH		 979 return;
980}
981
982
983
984/* this function is only for debugging purpose */
985void check_rxbuf(struct net_device *dev)
986{
987 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
988 u32* tmp;
989 struct buffer *buf;
990 u8 rx_desc_size;
991
992#ifdef CONFIG_RTL8185B
993 rx_desc_size = 8;
994#else
995 rx_desc_size = 4;
996#endif
997
998 if(!priv->rxbuffer)
999 DMESGE ("NIC RX ack, but RX queue corrupted!");
1000
1001 else{
1002
1003 for(buf=priv->rxbuffer, tmp=priv->rxring;
1004 tmp < priv->rxring+(priv->rxringcount)*rx_desc_size;
1005 tmp+=rx_desc_size, buf=buf->next)
1006
1007 DMESG("BUF %s %x",
1008 *tmp & (1<<31) ? "empty" : "filled",
1009 *(buf->buf));
1010 }
1011
1012 return;
1013}
1014
1015
1016void dump_eprom(struct net_device *dev)
1017{
1018 int i;
1019 for(i=0; i<63; i++)
1020 DMESG("EEPROM addr %x : %x", i, eprom_read(dev,i));
1021}
1022
1023
1024void rtl8180_dump_reg(struct net_device *dev)
1025{
1026 int i;
1027 int n;
1028 int max=0xff;
1029
1030 DMESG("Dumping NIC register map");
1031
1032 for(n=0;n<=max;)
1033 {
1034 printk( "\nD: %2x> ", n);
1035 for(i=0;i<16 && n<=max;i++,n++)
1036 printk("%2x ",read_nic_byte(dev,n));
1037 }
1038 printk("\n");
1039}
1040
1041
1042void fix_tx_fifo(struct net_device *dev)
1043{
1044 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1045 u32 *tmp;
1046 int i;
1047#ifdef DEBUG_TX_ALLOC
1048 DMESG("FIXING TX FIFOs");
1049#endif
1050 for (tmp=priv->txmapring, i=0;
1051 i < priv->txringcount;
1052 tmp+=8, i++){
1053 *tmp = *tmp &~ (1<<31);
1054 }
1055
1056 for (tmp=priv->txbkpring, i=0;
1057 i < priv->txringcount;
1058 tmp+=8, i++) {
1059 *tmp = *tmp &~ (1<<31);
1060 }
1061
1062 for (tmp=priv->txbepring, i=0;
1063 i < priv->txringcount;
1064 tmp+=8, i++){
1065 *tmp = *tmp &~ (1<<31);
1066 }
1067 for (tmp=priv->txvipring, i=0;
1068 i < priv->txringcount;
1069 tmp+=8, i++) {
1070 *tmp = *tmp &~ (1<<31);
1071 }
1072
1073 for (tmp=priv->txvopring, i=0;
1074 i < priv->txringcount;
1075 tmp+=8, i++){
1076 *tmp = *tmp &~ (1<<31);
1077 }
1078
1079 for (tmp=priv->txhpring, i=0;
1080 i < priv->txringcount;
1081 tmp+=8,i++){
1082 *tmp = *tmp &~ (1<<31);
1083 }
1084
1085 for (tmp=priv->txbeaconring, i=0;
1086 i < priv->txbeaconcount;
1087 tmp+=8, i++){
1088 *tmp = *tmp &~ (1<<31);
1089 }
1090#ifdef DEBUG_TX_ALLOC
1091 DMESG("TX FIFOs FIXED");
1092#endif
1093 priv->txmapringtail = priv->txmapring;
1094 priv->txmapringhead = priv->txmapring;
1095 priv->txmapbufstail = priv->txmapbufs;
1096
1097 priv->txbkpringtail = priv->txbkpring;
1098 priv->txbkpringhead = priv->txbkpring;
1099 priv->txbkpbufstail = priv->txbkpbufs;
1100
1101 priv->txbepringtail = priv->txbepring;
1102 priv->txbepringhead = priv->txbepring;
1103 priv->txbepbufstail = priv->txbepbufs;
1104
1105 priv->txvipringtail = priv->txvipring;
1106 priv->txvipringhead = priv->txvipring;
1107 priv->txvipbufstail = priv->txvipbufs;
1108
1109 priv->txvopringtail = priv->txvopring;
1110 priv->txvopringhead = priv->txvopring;
1111 priv->txvopbufstail = priv->txvopbufs;
1112
1113 priv->txhpringtail = priv->txhpring;
1114 priv->txhpringhead = priv->txhpring;
1115 priv->txhpbufstail = priv->txhpbufs;
1116
1117 priv->txbeaconringtail = priv->txbeaconring;
1118 priv->txbeaconbufstail = priv->txbeaconbufs;
1119 set_nic_txring(dev);
1120
1121 ieee80211_reset_queue(priv->ieee80211);
1122 priv->ack_tx_to_ieee = 0;
1123}
1124
1125
1126void fix_rx_fifo(struct net_device *dev)
1127{
1128 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1129 u32 *tmp;
1130 struct buffer *rxbuf;
1131 u8 rx_desc_size;
1132
1133#ifdef CONFIG_RTL8185B
1134 rx_desc_size = 8; // 4*8 = 32 bytes
1135#else
1136 rx_desc_size = 4;
1137#endif
1138
1139#ifdef DEBUG_RXALLOC
1140 DMESG("FIXING RX FIFO");
1141 check_rxbuf(dev);
1142#endif
1143
1144 for (tmp=priv->rxring, rxbuf=priv->rxbufferhead;
1145 (tmp < (priv->rxring)+(priv->rxringcount)*rx_desc_size);
1146 tmp+=rx_desc_size,rxbuf=rxbuf->next){
1147 *(tmp+2) = rxbuf->dma;
1148 *tmp=*tmp &~ 0xfff;
1149 *tmp=*tmp | priv->rxbuffersize;
1150 *tmp |= (1<<31);
1151 }
1152
1153#ifdef DEBUG_RXALLOC
1154 DMESG("RX FIFO FIXED");
1155 check_rxbuf(dev);
1156#endif
1157
1158 priv->rxringtail=priv->rxring;
1159 priv->rxbuffer=priv->rxbufferhead;
1160 priv->rx_skb_complete=1;
1161 set_nic_rxring(dev);
1162}
1163
1164
1165/****************************************************************************
1166 ------------------------------HW STUFF---------------------------
1167*****************************************************************************/
1168
1169unsigned char QUALITY_MAP[] = {
1170 0x64, 0x64, 0x64, 0x63, 0x63, 0x62, 0x62, 0x61,
1171 0x61, 0x60, 0x60, 0x5f, 0x5f, 0x5e, 0x5d, 0x5c,
1172 0x5b, 0x5a, 0x59, 0x57, 0x56, 0x54, 0x52, 0x4f,
1173 0x4c, 0x49, 0x45, 0x41, 0x3c, 0x37, 0x31, 0x29,
1174 0x24, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22,
1175 0x22, 0x22, 0x21, 0x21, 0x21, 0x21, 0x21, 0x20,
1176 0x20, 0x20, 0x20, 0x1f, 0x1f, 0x1e, 0x1e, 0x1e,
1177 0x1d, 0x1d, 0x1c, 0x1c, 0x1b, 0x1a, 0x19, 0x19,
1178 0x18, 0x17, 0x16, 0x15, 0x14, 0x12, 0x11, 0x0f,
1179 0x0e, 0x0c, 0x0a, 0x08, 0x06, 0x04, 0x01, 0x00
1180};
1181
1182unsigned char STRENGTH_MAP[] = {
1183 0x64, 0x64, 0x63, 0x62, 0x61, 0x60, 0x5f, 0x5e,
1184 0x5d, 0x5c, 0x5b, 0x5a, 0x57, 0x54, 0x52, 0x50,
1185 0x4e, 0x4c, 0x4a, 0x48, 0x46, 0x44, 0x41, 0x3f,
1186 0x3c, 0x3a, 0x37, 0x36, 0x36, 0x1c, 0x1c, 0x1b,
1187 0x1b, 0x1a, 0x1a, 0x19, 0x19, 0x18, 0x18, 0x17,
1188 0x17, 0x16, 0x16, 0x15, 0x15, 0x14, 0x14, 0x13,
1189 0x13, 0x12, 0x12, 0x11, 0x11, 0x10, 0x10, 0x0f,
1190 0x0f, 0x0e, 0x0e, 0x0d, 0x0d, 0x0c, 0x0c, 0x0b,
1191 0x0b, 0x0a, 0x0a, 0x09, 0x09, 0x08, 0x08, 0x07,
1192 0x07, 0x06, 0x06, 0x05, 0x04, 0x03, 0x02, 0x00
1193};
1194
1195void rtl8180_RSSI_calc(struct net_device *dev, u8 *rssi, u8 *qual){
1196 //void Mlme_UpdateRssiSQ(struct net_device *dev, u8 *rssi, u8 *qual){
1197 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1198 u32 temp;
1199 u32 temp2;
1200 u32 temp3;
1201 u32 lsb;
1202 u32 q;
1203 u32 orig_qual;
1204 u8 _rssi;
1205
1206 q = *qual;
1207 orig_qual = *qual;
1208 _rssi = 0; // avoid gcc complains..
1209
1210 if (q <= 0x4e) {
1211 temp = QUALITY_MAP[q];
1212 } else {
1213 if( q & 0x80 ) {
1214 temp = 0x32;
1215 } else {
1216 temp = 1;
1217 }
1218 }
1219
1220 *qual = temp;
1221 temp2 = *rssi;
1222
1223 switch(priv->rf_chip){
1224 case RFCHIPID_RFMD:
1225 lsb = temp2 & 1;
1226 temp2 &= 0x7e;
1227 if ( !lsb || !(temp2 <= 0x3c) ) {
1228 temp2 = 0x64;
1229 } else {
1230 temp2 = 100 * temp2 / 0x3c;
1231 }
1232 *rssi = temp2 & 0xff;
1233 _rssi = temp2 & 0xff;
1234 break;
1235 case RFCHIPID_INTERSIL:
1236 lsb = temp2;
1237 temp2 &= 0xfffffffe;
1238 temp2 *= 251;
1239 temp3 = temp2;
1240 temp2 <<= 6;
1241 temp3 += temp2;
1242 temp3 <<= 1;
1243 temp2 = 0x4950df;
1244 temp2 -= temp3;
1245 lsb &= 1;
1246 if ( temp2 <= 0x3e0000 ) {
1247 if ( temp2 < 0xffef0000 )
1248 temp2 = 0xffef0000;
1249 } else {
1250 temp2 = 0x3e0000;
1251 }
1252 if ( !lsb ) {
1253 temp2 -= 0xf0000;
1254 } else {
1255 temp2 += 0xf0000;
1256 }
1257
1258 temp3 = 0x4d0000;
1259 temp3 -= temp2;
1260 temp3 *= 100;
1261 temp3 = temp3 / 0x6d;
1262 temp3 >>= 0x10;
1263 _rssi = temp3 & 0xff;
1264 *rssi = temp3 & 0xff;
1265 break;
1266 case RFCHIPID_GCT:
1267 lsb = temp2 & 1;
1268 temp2 &= 0x7e;
1269 if ( ! lsb || !(temp2 <= 0x3c) ){
1270 temp2 = 0x64;
1271 } else {
1272 temp2 = (100 * temp2) / 0x3c;
1273 }
1274 *rssi = temp2 & 0xff;
1275 _rssi = temp2 & 0xff;
1276 break;
1277 case RFCHIPID_PHILIPS:
1278 if( orig_qual <= 0x4e ){
1279 _rssi = STRENGTH_MAP[orig_qual];
1280 *rssi = _rssi;
1281 } else {
1282 orig_qual -= 0x80;
1283 if ( !orig_qual ){
1284 _rssi = 1;
1285 *rssi = 1;
1286 } else {
1287 _rssi = 0x32;
1288 *rssi = 0x32;
1289 }
1290 }
1291 break;
1292
1293 /* case 4 */
1294 case RFCHIPID_MAXIM:
1295 lsb = temp2 & 1;
1296 temp2 &= 0x7e;
1297 temp2 >>= 1;
1298 temp2 += 0x42;
1299 if( lsb != 0 ){
1300 temp2 += 0xa;
1301 }
1302 *rssi = temp2 & 0xff;
1303 _rssi = temp2 & 0xff;
1304 break;
1305 }
1306
1307 if ( _rssi < 0x64 ){
1308 if ( _rssi == 0 ) {
1309 *rssi = 1;
1310 }
1311 } else {
1312 *rssi = 0x64;
1313 }
1314
1315 return;
1316}
1317
1318
1319void rtl8180_irq_enable(struct net_device *dev)
1320{
1321 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1322 priv->irq_enabled = 1;
1323/*
1324 write_nic_word(dev,INTA_MASK,INTA_RXOK | INTA_RXDESCERR | INTA_RXOVERFLOW |\
1325 INTA_TXOVERFLOW | INTA_HIPRIORITYDESCERR | INTA_HIPRIORITYDESCOK |\
1326 INTA_NORMPRIORITYDESCERR | INTA_NORMPRIORITYDESCOK |\
1327 INTA_LOWPRIORITYDESCERR | INTA_LOWPRIORITYDESCOK | INTA_TIMEOUT);
1328*/
1329 write_nic_word(dev,INTA_MASK, priv->irq_mask);
1330}
1331
1332
1333void rtl8180_irq_disable(struct net_device *dev)
1334{
1335 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1336
1337#ifdef CONFIG_RTL8185B
1338 write_nic_dword(dev,IMR,0);
1339#else
1340 write_nic_word(dev,INTA_MASK,0);
1341#endif
1342 force_pci_posting(dev);
1343 priv->irq_enabled = 0;
1344}
1345
1346
1347void rtl8180_set_mode(struct net_device *dev,int mode)
1348{
1349 u8 ecmd;
1350 ecmd=read_nic_byte(dev, EPROM_CMD);
1351 ecmd=ecmd &~ EPROM_CMD_OPERATING_MODE_MASK;
1352 ecmd=ecmd | (mode<<EPROM_CMD_OPERATING_MODE_SHIFT);
1353 ecmd=ecmd &~ (1<<EPROM_CS_SHIFT);
1354 ecmd=ecmd &~ (1<<EPROM_CK_SHIFT);
1355 write_nic_byte(dev, EPROM_CMD, ecmd);
1356}
1357
1358void rtl8180_adapter_start(struct net_device *dev);
1359void rtl8180_beacon_tx_enable(struct net_device *dev);
1360
1361void rtl8180_update_msr(struct net_device *dev)
1362{
1363 struct r8180_priv *priv = ieee80211_priv(dev);
1364 u8 msr;
1365 u32 rxconf;
1366
1367 msr = read_nic_byte(dev, MSR);
1368 msr &= ~ MSR_LINK_MASK;
1369
1370 rxconf=read_nic_dword(dev,RX_CONF);
1371
1372 if(priv->ieee80211->state == IEEE80211_LINKED)
1373 {
1374 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
1375 msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
1376 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
1377 msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
1378 else if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
1379 msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
1380 else
1381 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
1382 rxconf |= (1<<RX_CHECK_BSSID_SHIFT);
1383
1384 }else {
1385 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
1386 rxconf &= ~(1<<RX_CHECK_BSSID_SHIFT);
1387 }
1388
1389 write_nic_byte(dev, MSR, msr);
1390 write_nic_dword(dev, RX_CONF, rxconf);
1391
1392}
1393
1394
1395
1396void rtl8180_set_chan(struct net_device *dev,short ch)
1397{
1398 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1399
1400 if((ch > 14) || (ch < 1))
1401 {
d599edca 1402 printk("In %s: Invalid chnanel %d\n", __func__, ch);
c8d86be3
GKH		 1403 return;
1404 }
1405
1406 priv->chan=ch;
d599edca 1407 //printk("in %s:channel is %d\n",__func__,ch);
c8d86be3
GKH		 1408 priv->rf_set_chan(dev,priv->chan);
1409
1410}
1411
1412
1413void rtl8180_rx_enable(struct net_device *dev)
1414{
1415 u8 cmd;
1416 u32 rxconf;
1417 /* for now we accept data, management & ctl frame*/
1418 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1419
1420 rxconf=read_nic_dword(dev,RX_CONF);
1421 rxconf = rxconf &~ MAC_FILTER_MASK;
1422 rxconf = rxconf | (1<<ACCEPT_MNG_FRAME_SHIFT);
1423 rxconf = rxconf | (1<<ACCEPT_DATA_FRAME_SHIFT);
1424 rxconf = rxconf | (1<<ACCEPT_BCAST_FRAME_SHIFT);
1425 rxconf = rxconf | (1<<ACCEPT_MCAST_FRAME_SHIFT);
1426// rxconf = rxconf | (1<<ACCEPT_CRCERR_FRAME_SHIFT);
1427 if (dev->flags & IFF_PROMISC) DMESG ("NIC in promisc mode");
1428
1429 if(priv->ieee80211->iw_mode == IW_MODE_MONITOR || \
1430 dev->flags & IFF_PROMISC){
1431 rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT);
1432 }else{
1433 rxconf = rxconf | (1<<ACCEPT_NICMAC_FRAME_SHIFT);
1434 if(priv->card_8185 == 0)
1435 rxconf = rxconf | (1<<RX_CHECK_BSSID_SHIFT);
1436 }
1437
1438 /*if(priv->ieee80211->iw_mode == IW_MODE_MASTER){
1439 rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT);
1440 rxconf = rxconf | (1<<RX_CHECK_BSSID_SHIFT);
1441 }*/
1442
1443 if(priv->ieee80211->iw_mode == IW_MODE_MONITOR){
1444 rxconf = rxconf | (1<<ACCEPT_CTL_FRAME_SHIFT);
1445 rxconf = rxconf | (1<<ACCEPT_ICVERR_FRAME_SHIFT);
1446 rxconf = rxconf | (1<<ACCEPT_PWR_FRAME_SHIFT);
1447 }
1448
1449 if( priv->crcmon == 1 && priv->ieee80211->iw_mode == IW_MODE_MONITOR)
1450 rxconf = rxconf | (1<<ACCEPT_CRCERR_FRAME_SHIFT);
1451
1452 //if(!priv->card_8185){
1453 rxconf = rxconf &~ RX_FIFO_THRESHOLD_MASK;
1454 rxconf = rxconf | (RX_FIFO_THRESHOLD_NONE<<RX_FIFO_THRESHOLD_SHIFT);
1455 //}
1456
1457 rxconf = rxconf | (1<<RX_AUTORESETPHY_SHIFT);
1458 rxconf = rxconf &~ MAX_RX_DMA_MASK;
1459 rxconf = rxconf | (MAX_RX_DMA_2048<<MAX_RX_DMA_SHIFT);
1460
1461 //if(!priv->card_8185)
1462 rxconf = rxconf | RCR_ONLYERLPKT;
1463
1464 rxconf = rxconf &~ RCR_CS_MASK;
1465 if(!priv->card_8185)
1466 rxconf |= (priv->rcr_csense<<RCR_CS_SHIFT);
1467// rxconf &=~ 0xfff00000;
1468// rxconf |= 0x90100000;//9014f76f;
1469 write_nic_dword(dev, RX_CONF, rxconf);
1470
1471 fix_rx_fifo(dev);
1472
1473#ifdef DEBUG_RX
1474 DMESG("rxconf: %x %x",rxconf ,read_nic_dword(dev,RX_CONF));
1475#endif
1476 cmd=read_nic_byte(dev,CMD);
1477 write_nic_byte(dev,CMD,cmd | (1<<CMD_RX_ENABLE_SHIFT));
1478
1479 /* In rtl8139 driver seems that DMA threshold has to be written
1480 * after enabling RX, so we rewrite RX_CONFIG register
1481 */
1482 //mdelay(100);
1483// write_nic_dword(dev, RX_CONF, rxconf);
1484
1485}
1486
1487
1488void set_nic_txring(struct net_device *dev)
1489{
1490 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1491// DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1492
1493 write_nic_dword(dev, TX_MANAGEPRIORITY_RING_ADDR, priv->txmapringdma);
1494// DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1495 write_nic_dword(dev, TX_BKPRIORITY_RING_ADDR, priv->txbkpringdma);
1496// DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1497 write_nic_dword(dev, TX_BEPRIORITY_RING_ADDR, priv->txbepringdma);
1498// DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1499 write_nic_dword(dev, TX_VIPRIORITY_RING_ADDR, priv->txvipringdma);
1500// DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1501 write_nic_dword(dev, TX_VOPRIORITY_RING_ADDR, priv->txvopringdma);
1502// DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1503 write_nic_dword(dev, TX_HIGHPRIORITY_RING_ADDR, priv->txhpringdma);
1504// DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1505
1506 write_nic_dword(dev, TX_BEACON_RING_ADDR, priv->txbeaconringdma);
1507}
1508
1509
1510void rtl8180_conttx_enable(struct net_device *dev)
1511{
1512 u32 txconf;
1513 txconf = read_nic_dword(dev,TX_CONF);
1514 txconf = txconf &~ TX_LOOPBACK_MASK;
1515 txconf = txconf | (TX_LOOPBACK_CONTINUE <<TX_LOOPBACK_SHIFT);
1516 write_nic_dword(dev,TX_CONF,txconf);
1517}
1518
1519
1520void rtl8180_conttx_disable(struct net_device *dev)
1521{
1522 u32 txconf;
1523 txconf = read_nic_dword(dev,TX_CONF);
1524 txconf = txconf &~ TX_LOOPBACK_MASK;
1525 txconf = txconf | (TX_LOOPBACK_NONE <<TX_LOOPBACK_SHIFT);
1526 write_nic_dword(dev,TX_CONF,txconf);
1527}
1528
1529
1530void rtl8180_tx_enable(struct net_device *dev)
1531{
1532 u8 cmd;
1533 u8 tx_agc_ctl;
1534 u8 byte;
1535 u32 txconf;
1536 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1537 txconf= read_nic_dword(dev,TX_CONF);
1538
1539
1540 if(priv->card_8185){
1541
1542
1543 byte = read_nic_byte(dev,CW_CONF);
1544 byte &= ~(1<<CW_CONF_PERPACKET_CW_SHIFT);
1545 byte &= ~(1<<CW_CONF_PERPACKET_RETRY_SHIFT);
1546 write_nic_byte(dev, CW_CONF, byte);
1547
1548 tx_agc_ctl = read_nic_byte(dev, TX_AGC_CTL);
1549 tx_agc_ctl &= ~(1<<TX_AGC_CTL_PERPACKET_GAIN_SHIFT);
1550 tx_agc_ctl &= ~(1<<TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT);
1551 tx_agc_ctl |=(1<<TX_AGC_CTL_FEEDBACK_ANT);
1552 write_nic_byte(dev, TX_AGC_CTL, tx_agc_ctl);
1553 /*
1554 write_nic_word(dev, 0x5e, 0x01);
1555 force_pci_posting(dev);
1556 mdelay(1);
1557 write_nic_word(dev, 0xfe, 0x10);
1558 force_pci_posting(dev);
1559 mdelay(1);
1560 write_nic_word(dev, 0x5e, 0x00);
1561 force_pci_posting(dev);
1562 mdelay(1);
1563 */
1564 write_nic_byte(dev, 0xec, 0x3f); /* Disable early TX */
1565 }
1566
1567 if(priv->card_8185){
1568
1569 txconf = txconf &~ (1<<TCR_PROBE_NOTIMESTAMP_SHIFT);
1570
1571 }else{
1572
1573 if(hwseqnum)
1574 txconf= txconf &~ (1<<TX_CONF_HEADER_AUTOICREMENT_SHIFT);
1575 else
1576 txconf= txconf | (1<<TX_CONF_HEADER_AUTOICREMENT_SHIFT);
1577 }
1578
1579 txconf = txconf &~ TX_LOOPBACK_MASK;
1580 txconf = txconf | (TX_LOOPBACK_NONE <<TX_LOOPBACK_SHIFT);
1581 txconf = txconf &~ TCR_DPRETRY_MASK;
1582 txconf = txconf &~ TCR_RTSRETRY_MASK;
1583 txconf = txconf | (priv->retry_data<<TX_DPRETRY_SHIFT);
1584 txconf = txconf | (priv->retry_rts<<TX_RTSRETRY_SHIFT);
1585 txconf = txconf &~ (1<<TX_NOCRC_SHIFT);
1586
1587 if(priv->card_8185){
1588 if(priv->hw_plcp_len)
1589 txconf = txconf &~ TCR_PLCP_LEN;
1590 else
1591 txconf = txconf | TCR_PLCP_LEN;
1592 }else{
1593 txconf = txconf &~ TCR_SAT;
1594 }
1595 txconf = txconf &~ TCR_MXDMA_MASK;
1596 txconf = txconf | (TCR_MXDMA_2048<<TCR_MXDMA_SHIFT);
1597 txconf = txconf | TCR_CWMIN;
1598 txconf = txconf | TCR_DISCW;
1599
1600// if(priv->ieee80211->hw_wep)
1601// txconf=txconf &~ (1<<TX_NOICV_SHIFT);
1602// else
1603 txconf=txconf | (1<<TX_NOICV_SHIFT);
1604
1605 write_nic_dword(dev,TX_CONF,txconf);
1606
1607
1608 fix_tx_fifo(dev);
1609
1610#ifdef DEBUG_TX
1611 DMESG("txconf: %x %x",txconf,read_nic_dword(dev,TX_CONF));
1612#endif
1613
1614 cmd=read_nic_byte(dev,CMD);
1615 write_nic_byte(dev,CMD,cmd | (1<<CMD_TX_ENABLE_SHIFT));
1616
1617// mdelay(100);
1618 write_nic_dword(dev,TX_CONF,txconf);
1619// #endif
1620/*
1621 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
1622 write_nic_byte(dev, TX_DMA_POLLING, priv->dma_poll_mask);
1623 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
1624 */
1625}
1626
1627
1628void rtl8180_beacon_tx_enable(struct net_device *dev)
1629{
1630 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1631
1632 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
1633#ifdef CONFIG_RTL8185B
1634 priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_BQ);
1635 write_nic_byte(dev,TPPollStop, priv->dma_poll_mask);
1636#else
1637 priv->dma_poll_mask &=~(1<<TX_DMA_STOP_BEACON_SHIFT);
1638 write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
1639#endif
1640 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
1641}
1642
1643
1644void rtl8180_beacon_tx_disable(struct net_device *dev)
1645{
1646 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1647
1648 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
1649#ifdef CONFIG_RTL8185B
1650 priv->dma_poll_stop_mask |= TPPOLLSTOP_BQ;
1651 write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask);
1652#else
1653 priv->dma_poll_mask |= (1<<TX_DMA_STOP_BEACON_SHIFT);
1654 write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
1655#endif
1656 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
1657
1658}
1659
1660
1661void rtl8180_rtx_disable(struct net_device *dev)
1662{
1663 u8 cmd;
1664 struct r8180_priv *priv = ieee80211_priv(dev);
1665
1666 cmd=read_nic_byte(dev,CMD);
1667 write_nic_byte(dev, CMD, cmd &~ \
1668 ((1<<CMD_RX_ENABLE_SHIFT)|(1<<CMD_TX_ENABLE_SHIFT)));
1669 force_pci_posting(dev);
1670 mdelay(10);
1671 /*while (read_nic_byte(dev,CMD) & (1<<CMD_RX_ENABLE_SHIFT))
1672 udelay(10);
1673 */
1674
1675 if(!priv->rx_skb_complete)
1676 dev_kfree_skb_any(priv->rx_skb);
1677}
1678
1679#if 0
1680int alloc_tx_beacon_desc_ring(struct net_device *dev, int count)
1681{
1682 int i;
1683 u32 *tmp;
1684 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1685
1686 priv->txbeaconring = (u32*)pci_alloc_consistent(priv->pdev,
1687 sizeof(u32)*8*count,
1688 &priv->txbeaconringdma);
1689 if (!priv->txbeaconring) return -1;
1690 for (tmp=priv->txbeaconring,i=0;i<count;i++){
1691 *tmp = *tmp &~ (1<<31); // descriptor empty, owned by the drv
1692 /*
1693 *(tmp+2) = (u32)dma_tmp;
1694 *(tmp+3) = bufsize;
1695 */
1696 if(i+1<count)
1697 *(tmp+4) = (u32)priv->txbeaconringdma+((i+1)*8*4);
1698 else
1699 *(tmp+4) = (u32)priv->txbeaconringdma;
1700
1701 tmp=tmp+8;
1702 }
1703 return 0;
1704}
1705#endif
1706
1707short alloc_tx_desc_ring(struct net_device *dev, int bufsize, int count,
1708 int addr)
1709{
1710 int i;
1711 u32 *desc;
1712 u32 *tmp;
1713 dma_addr_t dma_desc, dma_tmp;
1714 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1715 struct pci_dev *pdev = priv->pdev;
1716 void *buf;
1717
1718 if((bufsize & 0xfff) != bufsize) {
1719 DMESGE ("TX buffer allocation too large");
1720 return 0;
1721 }
1722 desc = (u32*)pci_alloc_consistent(pdev,
1723 sizeof(u32)*8*count+256, &dma_desc);
1724 if(desc==NULL) return -1;
1725 if(dma_desc & 0xff){
1726
1727 /*
1728 * descriptor's buffer must be 256 byte aligned
1729 * we shouldn't be here, since we set DMA mask !
1730 */
be286fd2 1731 WARN(1, "DMA buffer is not aligned\n");
c8d86be3
GKH		 1732 }
1733 tmp=desc;
1734 for (i=0;i<count;i++)
1735 {
1736 buf = (void*)pci_alloc_consistent(pdev,bufsize,&dma_tmp);
1737 if (buf == NULL) return -ENOMEM;
1738
1739 switch(addr) {
1740#if 0
1741 case TX_NORMPRIORITY_RING_ADDR:
1742 if(-1 == buffer_add(&(priv->txnpbufs),buf,dma_tmp,NULL)){
1743 DMESGE("Unable to allocate mem for buffer NP");
1744 return -ENOMEM;
1745 }
1746 break;
1747
1748 case TX_LOWPRIORITY_RING_ADDR:
1749 if(-1 == buffer_add(&(priv->txlpbufs),buf,dma_tmp,NULL)){
1750 DMESGE("Unable to allocate mem for buffer LP");
1751 return -ENOMEM;
1752 }
1753 break;
1754
1755 case TX_HIGHPRIORITY_RING_ADDR:
1756 if(-1 == buffer_add(&(priv->txhpbufs),buf,dma_tmp,NULL)){
1757 DMESGE("Unable to allocate mem for buffer HP");
1758 return -ENOMEM;
1759 }
1760 break;
1761#else
1762 case TX_MANAGEPRIORITY_RING_ADDR:
1763 if(-1 == buffer_add(&(priv->txmapbufs),buf,dma_tmp,NULL)){
1764 DMESGE("Unable to allocate mem for buffer NP");
1765 return -ENOMEM;
1766 }
1767 break;
1768
1769 case TX_BKPRIORITY_RING_ADDR:
1770 if(-1 == buffer_add(&(priv->txbkpbufs),buf,dma_tmp,NULL)){
1771 DMESGE("Unable to allocate mem for buffer LP");
1772 return -ENOMEM;
1773 }
1774 break;
1775 case TX_BEPRIORITY_RING_ADDR:
1776 if(-1 == buffer_add(&(priv->txbepbufs),buf,dma_tmp,NULL)){
1777 DMESGE("Unable to allocate mem for buffer NP");
1778 return -ENOMEM;
1779 }
1780 break;
1781
1782 case TX_VIPRIORITY_RING_ADDR:
1783 if(-1 == buffer_add(&(priv->txvipbufs),buf,dma_tmp,NULL)){
1784 DMESGE("Unable to allocate mem for buffer LP");
1785 return -ENOMEM;
1786 }
1787 break;
1788 case TX_VOPRIORITY_RING_ADDR:
1789 if(-1 == buffer_add(&(priv->txvopbufs),buf,dma_tmp,NULL)){
1790 DMESGE("Unable to allocate mem for buffer NP");
1791 return -ENOMEM;
1792 }
1793 break;
1794#endif
1795 case TX_HIGHPRIORITY_RING_ADDR:
1796 if(-1 == buffer_add(&(priv->txhpbufs),buf,dma_tmp,NULL)){
1797 DMESGE("Unable to allocate mem for buffer HP");
1798 return -ENOMEM;
1799 }
1800 break;
1801 case TX_BEACON_RING_ADDR:
1802 if(-1 == buffer_add(&(priv->txbeaconbufs),buf,dma_tmp,NULL)){
1803 DMESGE("Unable to allocate mem for buffer BP");
1804 return -ENOMEM;
1805 }
1806 break;
1807 }
1808 *tmp = *tmp &~ (1<<31); // descriptor empty, owned by the drv
1809 *(tmp+2) = (u32)dma_tmp;
1810 *(tmp+3) = bufsize;
1811
1812 if(i+1<count)
1813 *(tmp+4) = (u32)dma_desc+((i+1)*8*4);
1814 else
1815 *(tmp+4) = (u32)dma_desc;
1816
1817 tmp=tmp+8;
1818 }
1819
1820 switch(addr) {
1821 case TX_MANAGEPRIORITY_RING_ADDR:
1822 priv->txmapringdma=dma_desc;
1823 priv->txmapring=desc;
1824 break;
1825
1826 case TX_BKPRIORITY_RING_ADDR:
1827 priv->txbkpringdma=dma_desc;
1828 priv->txbkpring=desc;
1829 break;
1830
1831 case TX_BEPRIORITY_RING_ADDR:
1832 priv->txbepringdma=dma_desc;
1833 priv->txbepring=desc;
1834 break;
1835
1836 case TX_VIPRIORITY_RING_ADDR:
1837 priv->txvipringdma=dma_desc;
1838 priv->txvipring=desc;
1839 break;
1840
1841 case TX_VOPRIORITY_RING_ADDR:
1842 priv->txvopringdma=dma_desc;
1843 priv->txvopring=desc;
1844 break;
1845
1846 case TX_HIGHPRIORITY_RING_ADDR:
1847 priv->txhpringdma=dma_desc;
1848 priv->txhpring=desc;
1849 break;
1850
1851 case TX_BEACON_RING_ADDR:
1852 priv->txbeaconringdma=dma_desc;
1853 priv->txbeaconring=desc;
1854 break;
1855
1856 }
1857
1858#ifdef DEBUG_TX
1859 DMESG("Tx dma physical address: %x",dma_desc);
1860#endif
1861
1862 return 0;
1863}
1864
1865
1866void free_tx_desc_rings(struct net_device *dev)
1867{
1868
1869 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1870 struct pci_dev *pdev=priv->pdev;
1871 int count = priv->txringcount;
1872
1873 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1874 priv->txmapring, priv->txmapringdma);
1875 buffer_free(dev,&(priv->txmapbufs),priv->txbuffsize,1);
1876
1877 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1878 priv->txbkpring, priv->txbkpringdma);
1879 buffer_free(dev,&(priv->txbkpbufs),priv->txbuffsize,1);
1880
1881 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1882 priv->txbepring, priv->txbepringdma);
1883 buffer_free(dev,&(priv->txbepbufs),priv->txbuffsize,1);
1884
1885 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1886 priv->txvipring, priv->txvipringdma);
1887 buffer_free(dev,&(priv->txvipbufs),priv->txbuffsize,1);
1888
1889 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1890 priv->txvopring, priv->txvopringdma);
1891 buffer_free(dev,&(priv->txvopbufs),priv->txbuffsize,1);
1892
1893 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1894 priv->txhpring, priv->txhpringdma);
1895 buffer_free(dev,&(priv->txhpbufs),priv->txbuffsize,1);
1896
1897 count = priv->txbeaconcount;
1898 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1899 priv->txbeaconring, priv->txbeaconringdma);
1900 buffer_free(dev,&(priv->txbeaconbufs),priv->txbuffsize,1);
1901}
1902
1903#if 0
1904void free_beacon_desc_ring(struct net_device *dev,int count)
1905{
1906
1907 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1908 struct pci_dev *pdev=priv->pdev;
1909
1910 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1911 priv->txbeaconring, priv->txbeaconringdma);
1912
1913 if (priv->beacon_buf)
1914 pci_free_consistent(priv->pdev,
1915 priv->master_beaconsize,priv->beacon_buf,priv->beacondmabuf);
1916
1917}
1918#endif
1919void free_rx_desc_ring(struct net_device *dev)
1920{
1921 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1922 struct pci_dev *pdev = priv->pdev;
1923
1924 int count = priv->rxringcount;
1925
1926#ifdef CONFIG_RTL8185B
1927 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1928 priv->rxring, priv->rxringdma);
1929#else
1930 pci_free_consistent(pdev, sizeof(u32)*4*count+256,
1931 priv->rxring, priv->rxringdma);
1932#endif
1933
1934 buffer_free(dev,&(priv->rxbuffer),priv->rxbuffersize,0);
1935}
1936
1937
1938short alloc_rx_desc_ring(struct net_device *dev, u16 bufsize, int count)
1939{
1940 int i;
1941 u32 *desc;
1942 u32 *tmp;
1943 dma_addr_t dma_desc,dma_tmp;
1944 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1945 struct pci_dev *pdev=priv->pdev;
1946 void *buf;
1947 u8 rx_desc_size;
1948
1949#ifdef CONFIG_RTL8185B
1950 rx_desc_size = 8; // 4*8 = 32 bytes
1951#else
1952 rx_desc_size = 4;
1953#endif
1954
1955 if((bufsize & 0xfff) != bufsize){
1956 DMESGE ("RX buffer allocation too large");
1957 return -1;
1958 }
1959
1960 desc = (u32*)pci_alloc_consistent(pdev,sizeof(u32)*rx_desc_size*count+256,
1961 &dma_desc);
1962
1963 if(dma_desc & 0xff){
1964
1965 /*
1966 * descriptor's buffer must be 256 byte aligned
1967 * should never happen since we specify the DMA mask
1968 */
be286fd2 1969 WARN(1, "DMA buffer is not aligned\n");
c8d86be3
GKH		 1970 }
1971
1972 priv->rxring=desc;
1973 priv->rxringdma=dma_desc;
1974 tmp=desc;
1975
1976 for (i=0;i<count;i++){
1977
1978 if ((buf= kmalloc(bufsize * sizeof(u8),GFP_ATOMIC)) == NULL){
1979 DMESGE("Failed to kmalloc RX buffer");
1980 return -1;
1981 }
1982
1983 dma_tmp = pci_map_single(pdev,buf,bufsize * sizeof(u8),
1984 PCI_DMA_FROMDEVICE);
1985
1986#ifdef DEBUG_ZERO_RX
1987 int j;
1988 for(j=0;j<bufsize;j++) ((u8*)buf)[i] = 0;
1989#endif
1990
1991 //buf = (void*)pci_alloc_consistent(pdev,bufsize,&dma_tmp);
1992 if(-1 == buffer_add(&(priv->rxbuffer), buf,dma_tmp,
1993 &(priv->rxbufferhead))){
1994 DMESGE("Unable to allocate mem RX buf");
1995 return -1;
1996 }
1997 *tmp = 0; //zero pads the header of the descriptor
1998 *tmp = *tmp |( bufsize&0xfff);
1999 *(tmp+2) = (u32)dma_tmp;
2000 *tmp = *tmp |(1<<31); // descriptor void, owned by the NIC
2001
2002#ifdef DEBUG_RXALLOC
2003 DMESG("Alloc %x size buffer, DMA mem @ %x, virtual mem @ %x",
2004 (u32)(bufsize&0xfff), (u32)dma_tmp, (u32)buf);
2005#endif
2006
2007 tmp=tmp+rx_desc_size;
2008 }
2009
2010 *(tmp-rx_desc_size) = *(tmp-rx_desc_size) | (1<<30); // this is the last descriptor
2011
2012
2013#ifdef DEBUG_RXALLOC
2014 DMESG("RX DMA physical address: %x",dma_desc);
2015#endif
2016
2017 return 0;
2018}
2019
2020
2021void set_nic_rxring(struct net_device *dev)
2022{
2023 u8 pgreg;
2024 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2025
2026 //rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
2027
2028 pgreg=read_nic_byte(dev, PGSELECT);
2029 write_nic_byte(dev, PGSELECT, pgreg &~ (1<<PGSELECT_PG_SHIFT));
2030
2031 //rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
2032
2033 write_nic_dword(dev, RXRING_ADDR,priv->rxringdma);
2034}
2035
2036
2037void rtl8180_reset(struct net_device *dev)
2038{
2039 //u32 txconf = 0x80e00707; //FIXME: Make me understandable
2040 u8 cr;
2041
2042 //write_nic_dword(dev,TX_CONF,txconf);
2043
2044 rtl8180_irq_disable(dev);
2045
2046 cr=read_nic_byte(dev,CMD);
2047 cr = cr & 2;
2048 cr = cr | (1<<CMD_RST_SHIFT);
2049 write_nic_byte(dev,CMD,cr);
2050
2051 force_pci_posting(dev);
2052
2053 mdelay(200);
2054
2055 if(read_nic_byte(dev,CMD) & (1<<CMD_RST_SHIFT))
2056 DMESGW("Card reset timeout!");
2057 else
2058 DMESG("Card successfully reset");
2059
2060//#ifndef CONFIG_RTL8185B
2061 rtl8180_set_mode(dev,EPROM_CMD_LOAD);
2062 force_pci_posting(dev);
2063 mdelay(200);
2064//#endif
2065}
2066
2067inline u16 ieeerate2rtlrate(int rate)
2068{
2069 switch(rate){
2070 case 10:
2071 return 0;
2072 case 20:
2073 return 1;
2074 case 55:
2075 return 2;
2076 case 110:
2077 return 3;
2078 case 60:
2079 return 4;
2080 case 90:
2081 return 5;
2082 case 120:
2083 return 6;
2084 case 180:
2085 return 7;
2086 case 240:
2087 return 8;
2088 case 360:
2089 return 9;
2090 case 480:
2091 return 10;
2092 case 540:
2093 return 11;
2094 default:
2095 return 3;
2096
2097 }
2098}
2099
2100static u16 rtl_rate[] = {10,20,55,110,60,90,120,180,240,360,480,540,720};
2101inline u16 rtl8180_rate2rate(short rate)
2102{
2103 if (rate >12) return 10;
2104 return rtl_rate[rate];
2105}
2106inline u8 rtl8180_IsWirelessBMode(u16 rate)
2107{
2108 if( ((rate <= 110) && (rate != 60) && (rate != 90)) || (rate == 220) )
2109 return 1;
2110 else return 0;
2111}
2112u16 N_DBPSOfRate(u16 DataRate);
2113u16 ComputeTxTime(
2114 u16 FrameLength,
2115 u16 DataRate,
2116 u8 bManagementFrame,
2117 u8 bShortPreamble
2118)
2119{
2120 u16 FrameTime;
2121 u16 N_DBPS;
2122 u16 Ceiling;
2123
2124 if( rtl8180_IsWirelessBMode(DataRate) )
2125 {
2126 if( bManagementFrame || !bShortPreamble || DataRate == 10 )
2127 { // long preamble
2128 FrameTime = (u16)(144+48+(FrameLength*8/(DataRate/10)));
2129 }
2130 else
2131 { // Short preamble
2132 FrameTime = (u16)(72+24+(FrameLength*8/(DataRate/10)));
2133 }
2134 if( ( FrameLength*8 % (DataRate/10) ) != 0 ) //Get the Ceilling
2135 FrameTime ++;
2136 } else { //802.11g DSSS-OFDM PLCP length field calculation.
2137 N_DBPS = N_DBPSOfRate(DataRate);
2138 Ceiling = (16 + 8*FrameLength + 6) / N_DBPS
2139 + (((16 + 8*FrameLength + 6) % N_DBPS) ? 1 : 0);
2140 FrameTime = (u16)(16 + 4 + 4*Ceiling + 6);
2141 }
2142 return FrameTime;
2143}
2144u16 N_DBPSOfRate(u16 DataRate)
2145{
2146 u16 N_DBPS = 24;
2147
2148 switch(DataRate)
2149 {
2150 case 60:
2151 N_DBPS = 24;
2152 break;
2153
2154 case 90:
2155 N_DBPS = 36;
2156 break;
2157
2158 case 120:
2159 N_DBPS = 48;
2160 break;
2161
2162 case 180:
2163 N_DBPS = 72;
2164 break;
2165
2166 case 240:
2167 N_DBPS = 96;
2168 break;
2169
2170 case 360:
2171 N_DBPS = 144;
2172 break;
2173
2174 case 480:
2175 N_DBPS = 192;
2176 break;
2177
2178 case 540:
2179 N_DBPS = 216;
2180 break;
2181
2182 default:
2183 break;
2184 }
2185
2186 return N_DBPS;
2187}
2188
2189//{by amy 080312
2190//
2191// Description:
2192// For Netgear case, they want good-looking singal strength.
2193// 2004.12.05, by rcnjko.
2194//
2195long
2196NetgearSignalStrengthTranslate(
2197 long LastSS,
2198 long CurrSS
2199 )
2200{
2201 long RetSS;
2202
2203 // Step 1. Scale mapping.
2204 if(CurrSS >= 71 && CurrSS <= 100)
2205 {
2206 RetSS = 90 + ((CurrSS - 70) / 3);
2207 }
2208 else if(CurrSS >= 41 && CurrSS <= 70)
2209 {
2210 RetSS = 78 + ((CurrSS - 40) / 3);
2211 }
2212 else if(CurrSS >= 31 && CurrSS <= 40)
2213 {
2214 RetSS = 66 + (CurrSS - 30);
2215 }
2216 else if(CurrSS >= 21 && CurrSS <= 30)
2217 {
2218 RetSS = 54 + (CurrSS - 20);
2219 }
2220 else if(CurrSS >= 5 && CurrSS <= 20)
2221 {
2222 RetSS = 42 + (((CurrSS - 5) * 2) / 3);
2223 }
2224 else if(CurrSS == 4)
2225 {
2226 RetSS = 36;
2227 }
2228 else if(CurrSS == 3)
2229 {
2230 RetSS = 27;
2231 }
2232 else if(CurrSS == 2)
2233 {
2234 RetSS = 18;
2235 }
2236 else if(CurrSS == 1)
2237 {
2238 RetSS = 9;
2239 }
2240 else
2241 {
2242 RetSS = CurrSS;
2243 }
2244 //RT_TRACE(COMP_DBG, DBG_LOUD, ("##### After Mapping: LastSS: %d, CurrSS: %d, RetSS: %d\n", LastSS, CurrSS, RetSS));
2245
2246 // Step 2. Smoothing.
2247 if(LastSS > 0)
2248 {
2249 RetSS = ((LastSS * 5) + (RetSS)+ 5) / 6;
2250 }
2251 //RT_TRACE(COMP_DBG, DBG_LOUD, ("$$$$$ After Smoothing: LastSS: %d, CurrSS: %d, RetSS: %d\n", LastSS, CurrSS, RetSS));
2252
2253 return RetSS;
2254}
2255//
2256// Description:
2257// Translate 0-100 signal strength index into dBm.
2258//
2259long
2260TranslateToDbm8185(
2261 u8 SignalStrengthIndex // 0-100 index.
2262 )
2263{
2264 long SignalPower; // in dBm.
2265
2266 // Translate to dBm (x=0.5y-95).
2267 SignalPower = (long)((SignalStrengthIndex + 1) >> 1);
2268 SignalPower -= 95;
2269
2270 return SignalPower;
2271}
2272//
2273// Description:
2274// Perform signal smoothing for dynamic mechanism.
2275// This is different with PerformSignalSmoothing8185 in smoothing fomula.
2276// No dramatic adjustion is apply because dynamic mechanism need some degree
2277// of correctness. Ported from 8187B.
2278// 2007-02-26, by Bruce.
2279//
2280void
2281PerformUndecoratedSignalSmoothing8185(
2282 struct r8180_priv *priv,
2283 bool bCckRate
2284 )
2285{
2286
2287
2288 // Determin the current packet is CCK rate.
2289 priv->bCurCCKPkt = bCckRate;
2290
2291 if(priv->UndecoratedSmoothedSS >= 0)
2292 {
2293 priv->UndecoratedSmoothedSS = ( (priv->UndecoratedSmoothedSS * 5) + (priv->SignalStrength * 10) ) / 6;
2294 }
2295 else
2296 {
2297 priv->UndecoratedSmoothedSS = priv->SignalStrength * 10;
2298 }
2299
2300 priv->UndercorateSmoothedRxPower = ( (priv->UndercorateSmoothedRxPower * 50) + (priv->RxPower* 11)) / 60;
2301
2302// printk("Sommthing SignalSterngth (%d) => UndecoratedSmoothedSS (%d)\n", priv->SignalStrength, priv->UndecoratedSmoothedSS);
2303// printk("Sommthing RxPower (%d) => UndecoratedRxPower (%d)\n", priv->RxPower, priv->UndercorateSmoothedRxPower);
2304
2305 //if(priv->CurCCKRSSI >= 0 && bCckRate)
2306 if(bCckRate)
2307 {
2308 priv->CurCCKRSSI = priv->RSSI;
2309 }
2310 else
2311 {
2312 priv->CurCCKRSSI = 0;
2313 }
2314
2315 // Boundary checking.
2316 // TODO: The overflow condition does happen, if we want to fix,
2317 // we shall recalculate thresholds first.
2318 if(priv->UndecoratedSmoothedSS > 100)
2319 {
2320// printk("UndecoratedSmoothedSS(%d) overflow, SignalStrength(%d)\n", priv->UndecoratedSmoothedSS, priv->SignalStrength);
2321 }
2322 if(priv->UndecoratedSmoothedSS < 0)
2323 {
2324// printk("UndecoratedSmoothedSS(%d) underflow, SignalStrength(%d)\n", priv->UndecoratedSmoothedSS, priv->SignalStrength);
2325 }
2326
2327}
2328
2329//by amy 080312}
2330
2331/* This is rough RX isr handling routine*/
2332void rtl8180_rx(struct net_device *dev)
2333{
2334 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2335 struct sk_buff *tmp_skb;
2336
2337 //struct sk_buff *skb;
2338 short first,last;
2339 u32 len;
2340 int lastlen;
2341 unsigned char quality, signal;
2342 u8 rate;
2343 //u32 *prism_hdr;
2344 u32 *tmp,*tmp2;
2345 u8 rx_desc_size;
2346 u8 padding;
2347 //u32 count=0;
2348 char rxpower = 0;
2349 u32 RXAGC = 0;
2350 long RxAGC_dBm = 0;
2351 u8 LNA=0, BB=0;
2352 u8 LNA_gain[4]={02, 17, 29, 39};
2353 u8 Antenna = 0;
2354 struct ieee80211_hdr *hdr;//by amy
2355 u16 fc,type;
2356 u8 bHwError = 0,bCRC = 0,bICV = 0;
2357 //bHwError = 0;
2358 //bCRC = 0;
2359 //bICV = 0;
2360 bool bCckRate = false;
2361 u8 RSSI = 0;
2362 long SignalStrengthIndex = 0;//+by amy 080312
2363// u8 SignalStrength = 0;
2364 struct ieee80211_rx_stats stats = {
2365 .signal = 0,
2366 .noise = -98,
2367 .rate = 0,
2368 // .mac_time = jiffies,
2369 .freq = IEEE80211_24GHZ_BAND,
2370 };
2371
2372#ifdef CONFIG_RTL8185B
2373 stats.nic_type = NIC_8185B;
2374 rx_desc_size = 8;
2375
2376#else
2377 stats.nic_type = NIC_8185;
2378 rx_desc_size = 4;
2379#endif
2380 //printk("receive frame!%d\n",count++);
2381 //if (!priv->rxbuffer) DMESG ("EE: NIC RX ack, but RX queue corrupted!");
2382 //else {
2383
2384 if ((*(priv->rxringtail)) & (1<<31)) {
2385
2386 /* we have got an RX int, but the descriptor
2387 * we are pointing is empty*/
2388
2389 priv->stats.rxnodata++;
2390 priv->ieee80211->stats.rx_errors++;
2391
2392 /* if (! *(priv->rxring) & (1<<31)) {
2393
2394 priv->stats.rxreset++;
2395 priv->rxringtail=priv->rxring;
2396 priv->rxbuffer=priv->rxbufferhead;
2397
2398 }else{*/
2399
2400 #if 0
2401 /* Maybe it is possible that the NIC has skipped some descriptors or
2402 * it has reset its internal pointer to the beginning of the ring
2403 * we search for the first filled descriptor in the ring, or we break
2404 * putting again the pointer in the old location if we do not found any.
2405 * This is quite dangerous, what does happen if the nic writes
2406 * two descriptor (say A and B) when we have just checked the descriptor
2407 * A and we are going to check the descriptor B..This might happen if the
2408 * interrupt was dummy, there was not really filled descriptors and
2409 * the NIC didn't lose pointer
2410 */
2411
2412 //priv->stats.rxwrkaround++;
2413
2414 tmp = priv->rxringtail;
2415 while (*(priv->rxringtail) & (1<<31)){
2416
2417 priv->rxringtail+=4;
2418
2419 if(priv->rxringtail >=
2420 (priv->rxring)+(priv->rxringcount )*4)
2421 priv->rxringtail=priv->rxring;
2422
2423 priv->rxbuffer=(priv->rxbuffer->next);
2424
2425 if(priv->rxringtail == tmp ){
2426 //DMESG("EE: Could not find RX pointer");
2427 priv->stats.rxnopointer++;
2428 break;
2429 }
2430 }
2431 #else
2432
2433 tmp2 = NULL;
2434 tmp = priv->rxringtail;
2435 do{
2436 if(tmp == priv->rxring)
2437 //tmp = priv->rxring + (priv->rxringcount )*rx_desc_size; xiong-2006-11-15
2438 tmp = priv->rxring + (priv->rxringcount - 1)*rx_desc_size;
2439 else
2440 tmp -= rx_desc_size;
2441
2442 if(! (*tmp & (1<<31)))
2443 tmp2 = tmp;
2444 }while(tmp != priv->rxring);
2445
2446 if(tmp2) priv->rxringtail = tmp2;
2447 #endif
2448 //}
2449 }
2450
2451 /* while there are filled descriptors */
2452 while(!(*(priv->rxringtail) & (1<<31))){
2453 if(*(priv->rxringtail) & (1<<26))
2454 DMESGW("RX buffer overflow");
2455 if(*(priv->rxringtail) & (1<<12))
2456 priv->stats.rxicverr++;
2457
2458 if(*(priv->rxringtail) & (1<<27)){
2459 priv->stats.rxdmafail++;
2460 //DMESG("EE: RX DMA FAILED at buffer pointed by descriptor %x",(u32)priv->rxringtail);
2461 goto drop;
2462 }
2463
2464 pci_dma_sync_single_for_cpu(priv->pdev,
2465 priv->rxbuffer->dma,
2466 priv->rxbuffersize * \
2467 sizeof(u8),
2468 PCI_DMA_FROMDEVICE);
2469
2470 first = *(priv->rxringtail) & (1<<29) ? 1:0;
2471 if(first) priv->rx_prevlen=0;
2472
2473 last = *(priv->rxringtail) & (1<<28) ? 1:0;
2474 if(last){
2475 lastlen=((*priv->rxringtail) &0xfff);
2476
2477 /* if the last descriptor (that should
2478 * tell us the total packet len) tell
2479 * us something less than the descriptors
2480 * len we had until now, then there is some
2481 * problem..
2482 * workaround to prevent kernel panic
2483 */
2484 if(lastlen < priv->rx_prevlen)
2485 len=0;
2486 else
2487 len=lastlen-priv->rx_prevlen;
2488
2489 if(*(priv->rxringtail) & (1<<13)) {
2490//lastlen=((*priv->rxringtail) &0xfff);
2491 if ((*(priv->rxringtail) & 0xfff) <500)
2492 priv->stats.rxcrcerrmin++;
2493 else if ((*(priv->rxringtail) & 0x0fff) >1000)
2494 priv->stats.rxcrcerrmax++;
2495 else
2496 priv->stats.rxcrcerrmid++;
2497
2498 }
2499
2500 }else{
2501 len = priv->rxbuffersize;
2502 }
2503
2504#ifdef CONFIG_RTL8185B
2505 if(first && last) {
2506 padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
2507 }else if(first) {
2508 padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
2509 if(padding) {
2510 len -= 2;
2511 }
2512 }else {
2513 padding = 0;
2514 }
2515#ifdef CONFIG_RTL818X_S
2516 padding = 0;
2517#endif
2518#endif
2519 priv->rx_prevlen+=len;
2520
2521 if(priv->rx_prevlen > MAX_FRAG_THRESHOLD + 100){
2522 /* HW is probably passing several buggy frames
2523 * without FD or LD flag set.
2524 * Throw this garbage away to prevent skb
2525 * memory exausting
2526 */
2527 if(!priv->rx_skb_complete)
2528 dev_kfree_skb_any(priv->rx_skb);
2529 priv->rx_skb_complete = 1;
2530 }
2531
2532#ifdef DEBUG_RX_FRAG
2533 DMESG("Iteration.. len %x",len);
2534 if(first) DMESG ("First descriptor");
2535 if(last) DMESG("Last descriptor");
2536
2537#endif
2538#ifdef DEBUG_RX_VERBOSE
2539 print_buffer( priv->rxbuffer->buf, len);
2540#endif
2541
2542#ifdef CONFIG_RTL8185B
2543 signal=(unsigned char)(((*(priv->rxringtail+3))& (0x00ff0000))>>16);
2544 signal=(signal&0xfe)>>1; // Modify by hikaru 6.6
2545
2546 quality=(unsigned char)((*(priv->rxringtail+3)) & (0xff));
2547
2548 stats.mac_time[0] = *(priv->rxringtail+1);
2549 stats.mac_time[1] = *(priv->rxringtail+2);
2550 rxpower =((char)(((*(priv->rxringtail+4))& (0x00ff0000))>>16))/2 - 42;
2551 RSSI = ((u8)(((*(priv->rxringtail+3)) & (0x0000ff00))>> 8)) & (0x7f);
2552
2553#else
2554 signal=((*(priv->rxringtail+1))& (0xff0000))>>16;
2555 signal=(signal&0xfe)>>1; // Modify by hikaru 6.6
2556
2557 quality=((*(priv->rxringtail+1)) & (0xff));
2558
2559 stats.mac_time[0] = *(priv->rxringtail+2);
2560 stats.mac_time[1] = *(priv->rxringtail+3);
2561#endif
2562 rate=((*(priv->rxringtail)) &
2563 ((1<<23)|(1<<22)|(1<<21)|(1<<20)))>>20;
2564
2565 stats.rate = rtl8180_rate2rate(rate);
2566 //DMESG("%d",rate);
2567 Antenna = (((*(priv->rxringtail +3))& (0x00008000)) == 0 )? 0:1 ;
2568// printk("in rtl8180_rx():Antenna is %d\n",Antenna);
2569//by amy for antenna
2570 if(!rtl8180_IsWirelessBMode(stats.rate))
2571 { // OFDM rate.
2572
2573 RxAGC_dBm = rxpower+1; //bias
2574 }
2575 else
2576 { // CCK rate.
2577 RxAGC_dBm = signal;//bit 0 discard
2578
2579 LNA = (u8) (RxAGC_dBm & 0x60 ) >> 5 ; //bit 6~ bit 5
2580 BB = (u8) (RxAGC_dBm & 0x1F); // bit 4 ~ bit 0
2581
2582 RxAGC_dBm = -( LNA_gain[LNA] + (BB *2) ); //Pin_11b=-(LNA_gain+BB_gain) (dBm)
2583
2584 RxAGC_dBm +=4; //bias
2585 }
2586
2587 if(RxAGC_dBm & 0x80) //absolute value
2588 RXAGC= ~(RxAGC_dBm)+1;
2589 bCckRate = rtl8180_IsWirelessBMode(stats.rate);
2590 // Translate RXAGC into 1-100.
2591 if(!rtl8180_IsWirelessBMode(stats.rate))
2592 { // OFDM rate.
2593 if(RXAGC>90)
2594 RXAGC=90;
2595 else if(RXAGC<25)
2596 RXAGC=25;
2597 RXAGC=(90-RXAGC)*100/65;
2598 }
2599 else
2600 { // CCK rate.
2601 if(RXAGC>95)
2602 RXAGC=95;
2603 else if(RXAGC<30)
2604 RXAGC=30;
2605 RXAGC=(95-RXAGC)*100/65;
2606 }
2607 priv->SignalStrength = (u8)RXAGC;
2608 priv->RecvSignalPower = RxAGC_dBm ; // It can use directly by SD3 CMLin
2609 priv->RxPower = rxpower;
2610 priv->RSSI = RSSI;
2611//{by amy 080312
2612 // SQ translation formular is provided by SD3 DZ. 2006.06.27, by rcnjko.
2613 if(quality >= 127)
2614 quality = 1;//0; //0 will cause epc to show signal zero , walk aroud now;
2615 else if(quality < 27)
2616 quality = 100;
2617 else
2618 quality = 127 - quality;
2619 priv->SignalQuality = quality;
2620 if(!priv->card_8185)
2621 printk("check your card type\n");
2622
2623 stats.signal = (u8)quality;//priv->wstats.qual.level = priv->SignalStrength;
2624 stats.signalstrength = RXAGC;
2625 if(stats.signalstrength > 100)
2626 stats.signalstrength = 100;
2627 stats.signalstrength = (stats.signalstrength * 70)/100 + 30;
2628 // printk("==========================>rx : RXAGC is %d,signalstrength is %d\n",RXAGC,stats.signalstrength);
2629 stats.rssi = priv->wstats.qual.qual = priv->SignalQuality;
2630 stats.noise = priv->wstats.qual.noise = 100 - priv ->wstats.qual.qual;
2631//by amy 080312}
2632 bHwError = (((*(priv->rxringtail))& (0x00000fff)) == 4080)| (((*(priv->rxringtail))& (0x04000000)) != 0 )
2633 | (((*(priv->rxringtail))& (0x08000000)) != 0 )| (((~(*(priv->rxringtail)))& (0x10000000)) != 0 )| (((~(*(priv->rxringtail)))& (0x20000000)) != 0 );
2634 bCRC = ((*(priv->rxringtail)) & (0x00002000)) >> 13;
2635 bICV = ((*(priv->rxringtail)) & (0x00001000)) >> 12;
2636 hdr = (struct ieee80211_hdr *)priv->rxbuffer->buf;
2637 fc = le16_to_cpu(hdr->frame_ctl);
2638 type = WLAN_FC_GET_TYPE(fc);
2639
2640 if((IEEE80211_FTYPE_CTL != type) &&
2641 (eqMacAddr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS )? hdr->addr2 : hdr->addr3))
2642 && (!bHwError) && (!bCRC)&& (!bICV))
2643 {
2644//by amy 080312
2645 // Perform signal smoothing for dynamic mechanism on demand.
2646 // This is different with PerformSignalSmoothing8185 in smoothing fomula.
2647 // No dramatic adjustion is apply because dynamic mechanism need some degree
2648 // of correctness. 2007.01.23, by shien chang.
2649 PerformUndecoratedSignalSmoothing8185(priv,bCckRate);
2650 //
2651 // For good-looking singal strength.
2652 //
2653 SignalStrengthIndex = NetgearSignalStrengthTranslate(
2654 priv->LastSignalStrengthInPercent,
2655 priv->SignalStrength);
2656
2657 priv->LastSignalStrengthInPercent = SignalStrengthIndex;
2658 priv->Stats_SignalStrength = TranslateToDbm8185((u8)SignalStrengthIndex);
2659 //
2660 // We need more correct power of received packets and the "SignalStrength" of RxStats is beautified,
2661 // so we record the correct power here.
2662 //
2663 priv->Stats_SignalQuality =(long) (priv->Stats_SignalQuality * 5 + (long)priv->SignalQuality + 5) / 6;
2664 priv->Stats_RecvSignalPower = (long)(priv->Stats_RecvSignalPower * 5 + priv->RecvSignalPower -1) / 6;
2665
2666 // Figure out which antenna that received the lasted packet.
2667 priv->LastRxPktAntenna = Antenna ? 1 : 0; // 0: aux, 1: main.
2668//by amy 080312
2669 SwAntennaDiversityRxOk8185(dev, priv->SignalStrength);
2670 }
2671
2672//by amy for antenna
2673
2674
2675
2676
2677
2678
2679#ifndef DUMMY_RX
2680 if(first){
2681 if(!priv->rx_skb_complete){
2682 /* seems that HW sometimes fails to reiceve and
2683 doesn't provide the last descriptor */
2684#ifdef DEBUG_RX_SKB
2685 DMESG("going to free incomplete skb");
2686#endif
2687 dev_kfree_skb_any(priv->rx_skb);
2688 priv->stats.rxnolast++;
2689#ifdef DEBUG_RX_SKB
2690 DMESG("free incomplete skb OK");
2691#endif
2692 }
2693 /* support for prism header has been originally added by Christian */
2694 if(priv->prism_hdr && priv->ieee80211->iw_mode == IW_MODE_MONITOR){
2695
2696#if 0
2697 priv->rx_skb = dev_alloc_skb(len+2+PRISM_HDR_SIZE);
2698 if(! priv->rx_skb) goto drop;
2699
2700 prism_hdr = (u32*) skb_put(priv->rx_skb,PRISM_HDR_SIZE);
2701 prism_hdr[0]=htonl(0x80211001); //version
2702 prism_hdr[1]=htonl(0x40); //length
2703 prism_hdr[2]=htonl(stats.mac_time[1]); //mactime (HIGH)
2704 prism_hdr[3]=htonl(stats.mac_time[0]); //mactime (LOW)
2705 rdtsc(prism_hdr[5], prism_hdr[4]); //hostime (LOW+HIGH)
2706 prism_hdr[4]=htonl(prism_hdr[4]); //Byte-Order aendern
2707 prism_hdr[5]=htonl(prism_hdr[5]); //Byte-Order aendern
2708 prism_hdr[6]=0x00; //phytype
2709 prism_hdr[7]=htonl(priv->chan); //channel
2710 prism_hdr[8]=htonl(stats.rate); //datarate
2711 prism_hdr[9]=0x00; //antenna
2712 prism_hdr[10]=0x00; //priority
2713 prism_hdr[11]=0x00; //ssi_type
2714 prism_hdr[12]=htonl(stats.signal); //ssi_signal
2715 prism_hdr[13]=htonl(stats.noise); //ssi_noise
2716 prism_hdr[14]=0x00; //preamble
2717 prism_hdr[15]=0x00; //encoding
2718
2719#endif
2720 }else{
2721 priv->rx_skb = dev_alloc_skb(len+2);
2722 if( !priv->rx_skb) goto drop;
2723#ifdef DEBUG_RX_SKB
2724 DMESG("Alloc initial skb %x",len+2);
2725#endif
2726 }
2727
2728 priv->rx_skb_complete=0;
2729 priv->rx_skb->dev=dev;
2730 }else{
2731 /* if we are here we should have already RXed
2732 * the first frame.
2733 * If we get here and the skb is not allocated then
2734 * we have just throw out garbage (skb not allocated)
2735 * and we are still rxing garbage....
2736 */
2737 if(!priv->rx_skb_complete){
2738
2739 tmp_skb= dev_alloc_skb(priv->rx_skb->len +len+2);
2740
2741 if(!tmp_skb) goto drop;
2742
2743 tmp_skb->dev=dev;
2744#ifdef DEBUG_RX_SKB
2745 DMESG("Realloc skb %x",len+2);
2746#endif
2747
2748#ifdef DEBUG_RX_SKB
2749 DMESG("going copy prev frag %x",priv->rx_skb->len);
2750#endif
2751 memcpy(skb_put(tmp_skb,priv->rx_skb->len),
2752 priv->rx_skb->data,
2753 priv->rx_skb->len);
2754#ifdef DEBUG_RX_SKB
2755 DMESG("skb copy prev frag complete");
2756#endif
2757
2758 dev_kfree_skb_any(priv->rx_skb);
2759#ifdef DEBUG_RX_SKB
2760 DMESG("prev skb free ok");
2761#endif
2762
2763 priv->rx_skb=tmp_skb;
2764 }
2765 }
2766#ifdef DEBUG_RX_SKB
2767 DMESG("going to copy current payload %x",len);
2768#endif
2769 if(!priv->rx_skb_complete) {
2770#ifdef CONFIG_RTL8185B
2771 if(padding) {
2772 memcpy(skb_put(priv->rx_skb,len),
2773 (((unsigned char *)priv->rxbuffer->buf) + 2),len);
2774 } else {
2775#endif
2776 memcpy(skb_put(priv->rx_skb,len),
2777 priv->rxbuffer->buf,len);
2778#ifdef CONFIG_RTL8185B
2779 }
2780#endif
2781 }
2782#ifdef DEBUG_RX_SKB
2783 DMESG("current fragment skb copy complete");
2784#endif
2785
2786 if(last && !priv->rx_skb_complete){
2787
2788#ifdef DEBUG_RX_SKB
2789 DMESG("Got last fragment");
2790#endif
2791
2792 if(priv->rx_skb->len > 4)
2793 skb_trim(priv->rx_skb,priv->rx_skb->len-4);
2794#ifdef DEBUG_RX_SKB
2795 DMESG("yanked out crc, passing to the upper layer");
2796#endif
2797
2798#ifndef RX_DONT_PASS_UL
2799 if(!ieee80211_rx(priv->ieee80211,
2800 priv->rx_skb, &stats)){
2801#ifdef DEBUG_RX
2802 DMESGW("Packet not consumed");
2803#endif
2804#endif // RX_DONT_PASS_UL
2805
2806 dev_kfree_skb_any(priv->rx_skb);
2807#ifndef RX_DONT_PASS_UL
2808 }
2809#endif
2810#ifdef DEBUG_RX
2811 else{
2812 DMESG("Rcv frag");
2813 }
2814#endif
2815 priv->rx_skb_complete=1;
2816 }
2817
2818#endif //DUMMY_RX
2819
2820 pci_dma_sync_single_for_device(priv->pdev,
2821 priv->rxbuffer->dma,
2822 priv->rxbuffersize * \
2823 sizeof(u8),
2824 PCI_DMA_FROMDEVICE);
2825
2826
2827drop: // this is used when we have not enought mem
2828
2829 /* restore the descriptor */
2830 *(priv->rxringtail+2)=priv->rxbuffer->dma;
2831 *(priv->rxringtail)=*(priv->rxringtail) &~ 0xfff;
2832 *(priv->rxringtail)=
2833 *(priv->rxringtail) | priv->rxbuffersize;
2834
2835 *(priv->rxringtail)=
2836 *(priv->rxringtail) | (1<<31);
2837 //^empty descriptor
2838
2839 //wmb();
2840
2841#ifdef DEBUG_RX
2842 DMESG("Current descriptor: %x",(u32)priv->rxringtail);
2843#endif
2844 //unsigned long flags;
2845 //spin_lock_irqsave(&priv->irq_lock,flags);
2846
2847 priv->rxringtail+=rx_desc_size;
2848 if(priv->rxringtail >=
2849 (priv->rxring)+(priv->rxringcount )*rx_desc_size)
2850 priv->rxringtail=priv->rxring;
2851
2852 //spin_unlock_irqrestore(&priv->irq_lock,flags);
2853
2854
2855 priv->rxbuffer=(priv->rxbuffer->next);
2856
2857 }
2858
2859
2860
2861// if(get_curr_tx_free_desc(dev,priority))
2862// ieee80211_sta_ps_sleep(priv->ieee80211, &tmp, &tmp2);
2863
2864
2865
2866}
2867
2868
2869void rtl8180_dma_kick(struct net_device *dev, int priority)
2870{
2871 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2872
2873 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
2874/*
2875
2876 switch(priority){
2877
2878 case LOW_PRIORITY:
2879
2880 write_nic_byte(dev,TX_DMA_POLLING,
2881 (1<< TX_DMA_POLLING_LOWPRIORITY_SHIFT) |
2882 priv->dma_poll_mask);
2883 break;
2884
2885 case NORM_PRIORITY:
2886
2887 write_nic_byte(dev,TX_DMA_POLLING,
2888 (1<< TX_DMA_POLLING_NORMPRIORITY_SHIFT) |
2889 priv->dma_poll_mask);
2890 break;
2891
2892 case HI_PRIORITY:
2893
2894 write_nic_byte(dev,TX_DMA_POLLING,
2895 (1<< TX_DMA_POLLING_HIPRIORITY_SHIFT) |
2896 priv->dma_poll_mask);
2897 break;
2898
2899 }
2900*/
2901 write_nic_byte(dev, TX_DMA_POLLING,
2902 (1 << (priority + 1)) | priv->dma_poll_mask);
2903 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
2904
2905 force_pci_posting(dev);
2906}
2907
2908#if 0
2909void rtl8180_tx_queues_stop(struct net_device *dev)
2910{
2911 //struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2912 u8 dma_poll_mask = (1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
2913 dma_poll_mask |= (1<<TX_DMA_STOP_HIPRIORITY_SHIFT);
2914 dma_poll_mask |= (1<<TX_DMA_STOP_NORMPRIORITY_SHIFT);
2915 dma_poll_mask |= (1<<TX_DMA_STOP_BEACON_SHIFT);
2916
2917 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
2918 write_nic_byte(dev,TX_DMA_POLLING,dma_poll_mask);
2919 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
2920}
2921#endif
2922
2923void rtl8180_data_hard_stop(struct net_device *dev)
2924{
2925 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2926
2927 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
2928#ifdef CONFIG_RTL8185B
2929 priv->dma_poll_stop_mask |= TPPOLLSTOP_AC_VIQ;
2930 write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask);
2931#else
2932 priv->dma_poll_mask |= (1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
2933 write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
2934#endif
2935 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
2936}
2937
2938
2939void rtl8180_data_hard_resume(struct net_device *dev)
2940{
2941 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2942
2943 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
2944#ifdef CONFIG_RTL8185B
2945 priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_AC_VIQ);
2946 write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask);
2947#else
2948 priv->dma_poll_mask &= ~(1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
2949 write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
2950#endif
2951 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
2952}
2953
2954
2955/* this function TX data frames when the ieee80211 stack requires this.
2956 * It checks also if we need to stop the ieee tx queue, eventually do it
2957 */
2958void rtl8180_hard_data_xmit(struct sk_buff *skb,struct net_device *dev, int
2959rate)
2960{
2961 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2962 int mode;
2963 struct ieee80211_hdr_3addr *h = (struct ieee80211_hdr_3addr *) skb->data;
2964 short morefrag = (h->frame_ctl) & IEEE80211_FCTL_MOREFRAGS;
2965 unsigned long flags;
2966 int priority;
2967 //static int count = 0;
2968
2969 mode = priv->ieee80211->iw_mode;
2970
2971 rate = ieeerate2rtlrate(rate);
2972 /*
2973 * This function doesn't require lock because we make
2974 * sure it's called with the tx_lock already acquired.
2975 * this come from the kernel's hard_xmit callback (trought
2976 * the ieee stack, or from the try_wake_queue (again trought
2977 * the ieee stack.
2978 */
2979#ifdef CONFIG_RTL8185B
2980 priority = AC2Q(skb->priority);
2981#else
2982 priority = LOW_PRIORITY;
2983#endif
2984 spin_lock_irqsave(&priv->tx_lock,flags);
2985
2986 if(priv->ieee80211->bHwRadioOff)
2987 {
2988 spin_unlock_irqrestore(&priv->tx_lock,flags);
2989
2990 return;
2991 }
2992
2993 //printk(KERN_WARNING "priority = %d@%d\n", priority, count++);
2994 if (!check_nic_enought_desc(dev, priority)){
2995 //DMESG("Error: no descriptor left by previous TX (avail %d) ",
2996 // get_curr_tx_free_desc(dev, priority));
2997 DMESGW("Error: no descriptor left by previous TX (avail %d) ",
2998 get_curr_tx_free_desc(dev, priority));
2999 //printk(KERN_WARNING "==============================================================> \n");
3000 ieee80211_stop_queue(priv->ieee80211);
3001 }
3002 rtl8180_tx(dev, skb->data, skb->len, priority, morefrag,0,rate);
3003 if (!check_nic_enought_desc(dev, priority))
3004 ieee80211_stop_queue(priv->ieee80211);
3005
3006 //dev_kfree_skb_any(skb);
3007 spin_unlock_irqrestore(&priv->tx_lock,flags);
3008
3009}
3010
3011/* This is a rough attempt to TX a frame
3012 * This is called by the ieee 80211 stack to TX management frames.
3013 * If the ring is full packet are dropped (for data frame the queue
3014 * is stopped before this can happen). For this reason it is better
3015 * if the descriptors are larger than the largest management frame
3016 * we intend to TX: i'm unsure what the HW does if it will not found
3017 * the last fragment of a frame because it has been dropped...
3018 * Since queues for Management and Data frames are different we
3019 * might use a different lock than tx_lock (for example mgmt_tx_lock)
3020 */
3021/* these function may loops if invoked with 0 descriptors or 0 len buffer*/
3022int rtl8180_hard_start_xmit(struct sk_buff *skb,struct net_device *dev)
3023{
3024 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3025
3026 unsigned long flags;
3027
3028 int priority;
3029
3030#ifdef CONFIG_RTL8185B
3031 priority = MANAGE_PRIORITY;
3032#else
3033 priority = NORM_PRIORITY;
3034#endif
3035
3036 spin_lock_irqsave(&priv->tx_lock,flags);
3037
3038 if(priv->ieee80211->bHwRadioOff)
3039 {
3040 spin_unlock_irqrestore(&priv->tx_lock,flags);
3041
3042 dev_kfree_skb_any(skb);
ec634fe3 3043 return NETDEV_TX_OK;
c8d86be3
GKH		 3044 }
3045
3046 rtl8180_tx(dev, skb->data, skb->len, priority,
3047 0, 0,ieeerate2rtlrate(priv->ieee80211->basic_rate));
3048
3049 priv->ieee80211->stats.tx_bytes+=skb->len;
3050 priv->ieee80211->stats.tx_packets++;
3051 spin_unlock_irqrestore(&priv->tx_lock,flags);
3052
3053 dev_kfree_skb_any(skb);
ec634fe3 3054 return NETDEV_TX_OK;
c8d86be3
GKH		 3055}
3056
3057// longpre 144+48 shortpre 72+24
3058u16 rtl8180_len2duration(u32 len, short rate,short* ext)
3059{
3060 u16 duration;
3061 u16 drift;
3062 *ext=0;
3063
3064 switch(rate){
3065 case 0://1mbps
3066 *ext=0;
3067 duration = ((len+4)<<4) /0x2;
3068 drift = ((len+4)<<4) % 0x2;
3069 if(drift ==0 ) break;
3070 duration++;
3071 break;
3072
3073 case 1://2mbps
3074 *ext=0;
3075 duration = ((len+4)<<4) /0x4;
3076 drift = ((len+4)<<4) % 0x4;
3077 if(drift ==0 ) break;
3078 duration++;
3079 break;
3080
3081 case 2: //5.5mbps
3082 *ext=0;
3083 duration = ((len+4)<<4) /0xb;
3084 drift = ((len+4)<<4) % 0xb;
3085 if(drift ==0 )
3086 break;
3087 duration++;
3088 break;
3089
3090 default:
3091 case 3://11mbps
3092 *ext=0;
3093 duration = ((len+4)<<4) /0x16;
3094 drift = ((len+4)<<4) % 0x16;
3095 if(drift ==0 )
3096 break;
3097 duration++;
3098 if(drift > 6)
3099 break;
3100 *ext=1;
3101 break;
3102 }
3103
3104 return duration;
3105}
3106
3107
3108void rtl8180_prepare_beacon(struct net_device *dev)
3109{
3110
3111 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3112
3113 struct sk_buff *skb;
3114
3115 u16 word = read_nic_word(dev, BcnItv);
3116 word &= ~BcnItv_BcnItv; // clear Bcn_Itv
3117 word |= cpu_to_le16(priv->ieee80211->current_network.beacon_interval);//0x64;
3118 write_nic_word(dev, BcnItv, word);
3119
3120
3121 skb = ieee80211_get_beacon(priv->ieee80211);
3122 if(skb){
3123 rtl8180_tx(dev,skb->data,skb->len,BEACON_PRIORITY,
3124 0,0,ieeerate2rtlrate(priv->ieee80211->basic_rate));
3125 dev_kfree_skb_any(skb);
3126 }
3127 #if 0
3128 //DMESG("size %x",len);
3129 if(*tail & (1<<31)){
3130
3131 //DMESG("No more beacon TX desc");
3132 return ;
3133
3134 }
9c515551 3135 //while(! (*tail & (1<<31))){
c8d86be3
GKH		 3136 *tail= 0; // zeroes header
3137
3138 *tail = *tail| (1<<29) ; //fist segment of the packet
3139 *tail = (*tail) | (1<<28); // last segment
3140 // *tail = *tail | (1<<18); // this is a beacon frame
3141 *(tail+3)=*(tail+3) &~ 0xfff;
3142 *(tail+3)=*(tail+3) | len; // buffer lenght
3143 *tail = *tail |len;
3144 // zeroes the second 32-bits dword of the descriptor
3145 *(tail+1)= 0;
3146 *tail = *tail | (rate << 24);
3147
3148 duration = rtl8180_len2duration(len,rate,&ext);
3149
3150 *(tail+1) = *(tail+1) | ((duration & 0x7fff)<<16);
3151
3152 *tail = *tail | (1<<31);
3153 //^ descriptor ready to be txed
3154 if((tail - begin)/8 == priv->txbeaconcount-1)
3155 tail=begin;
3156 else
3157 tail=tail+8;
3158 //}
3159#endif
3160}
3161
3162/* This function do the real dirty work: it enqueues a TX command
3163 * descriptor in the ring buffer, copyes the frame in a TX buffer
3164 * and kicks the NIC to ensure it does the DMA transfer.
3165 */
3166short rtl8180_tx(struct net_device *dev, u8* txbuf, int len, int priority,
3167 short morefrag, short descfrag, int rate)
3168{
3169 struct r8180_priv *priv = ieee80211_priv(dev);
3170 u32 *tail,*temp_tail;
3171 u32 *begin;
3172 u32 *buf;
3173 int i;
3174 int remain;
3175 int buflen;
3176 int count;
3177 //u16 AckCtsTime;
3178 //u16 FrameTime;
3179 u16 duration;
3180 short ext;
3181 struct buffer* buflist;
3182 //unsigned long flags;
3183#ifdef CONFIG_RTL8185B
3184 struct ieee80211_hdr_3addr *frag_hdr = (struct ieee80211_hdr_3addr *)txbuf;
3185 u8 dest[ETH_ALEN];
3186 u8 bUseShortPreamble = 0;
3187 u8 bCTSEnable = 0;
3188 u8 bRTSEnable = 0;
3189 //u16 RTSRate = 22;
3190 //u8 RetryLimit = 0;
3191 u16 Duration = 0;
3192 u16 RtsDur = 0;
3193 u16 ThisFrameTime = 0;
3194 u16 TxDescDuration = 0;
3195 u8 ownbit_flag = false; //added by david woo for sync Tx, 2007.12.14
3196#endif
3197
3198 switch(priority) {
3199 case MANAGE_PRIORITY:
3200 tail=priv->txmapringtail;
3201 begin=priv->txmapring;
3202 buflist = priv->txmapbufstail;
3203 count = priv->txringcount;
3204 break;
3205
3206 case BK_PRIORITY:
3207 tail=priv->txbkpringtail;
3208 begin=priv->txbkpring;
3209 buflist = priv->txbkpbufstail;
3210 count = priv->txringcount;
3211 break;
3212
3213 case BE_PRIORITY:
3214 tail=priv->txbepringtail;
3215 begin=priv->txbepring;
3216 buflist = priv->txbepbufstail;
3217 count = priv->txringcount;
3218 break;
3219
3220 case VI_PRIORITY:
3221 tail=priv->txvipringtail;
3222 begin=priv->txvipring;
3223 buflist = priv->txvipbufstail;
3224 count = priv->txringcount;
3225 break;
3226
3227 case VO_PRIORITY:
3228 tail=priv->txvopringtail;
3229 begin=priv->txvopring;
3230 buflist = priv->txvopbufstail;
3231 count = priv->txringcount;
3232 break;
3233
3234 case HI_PRIORITY:
3235 tail=priv->txhpringtail;
3236 begin=priv->txhpring;
3237 buflist = priv->txhpbufstail;
3238 count = priv->txringcount;
3239 break;
3240
3241 case BEACON_PRIORITY:
3242 tail=priv->txbeaconringtail;
3243 begin=priv->txbeaconring;
3244 buflist = priv->txbeaconbufstail;
3245 count = priv->txbeaconcount;
3246 break;
3247
3248 default:
3249 return -1;
3250 break;
3251 }
3252
3253 //printk("in rtl8180_tx(): rate is %d\n",priv->ieee80211->rate);
3254#if 1
3255 memcpy(&dest, frag_hdr->addr1, ETH_ALEN);
3256 if (is_multicast_ether_addr(dest) ||
3257 is_broadcast_ether_addr(dest))
3258 {
3259 Duration = 0;
3260 RtsDur = 0;
3261 bRTSEnable = 0;
3262 bCTSEnable = 0;
3263
3264 ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate), 0, bUseShortPreamble);
3265 TxDescDuration = ThisFrameTime;
3266 } else {// Unicast packet
3267 //u8 AckRate;
3268 u16 AckTime;
3269
3270 //YJ,add,080828,for Keep alive
3271 priv->NumTxUnicast++;
3272
3273 // Figure out ACK rate according to BSS basic rate and Tx rate, 2006.03.08 by rcnjko.
3274 //AckRate = ComputeAckRate( pMgntInfo->mBrates, (u1Byte)(pTcb->DataRate) );
3275 // Figure out ACK time according to the AckRate and assume long preamble is used on receiver, 2006.03.08, by rcnjko.
3276 //AckTime = ComputeTxTime( sAckCtsLng/8, AckRate, FALSE, FALSE);
3277 //For simplicity, just use the 1M basic rate
3278 //AckTime = ComputeTxTime(14, 540,0, 0); // AckCTSLng = 14 use 1M bps send
3279 AckTime = ComputeTxTime(14, 10,0, 0); // AckCTSLng = 14 use 1M bps send
3280 //AckTime = ComputeTxTime(14, 2,false, false); // AckCTSLng = 14 use 1M bps send
3281
3282 if ( ((len + sCrcLng) > priv->rts) && priv->rts )
3283 { // RTS/CTS.
3284 u16 RtsTime, CtsTime;
3285 //u16 CtsRate;
3286 bRTSEnable = 1;
3287 bCTSEnable = 0;
3288
3289 // Rate and time required for RTS.
3290 RtsTime = ComputeTxTime( sAckCtsLng/8,priv->ieee80211->basic_rate, 0, 0);
3291 // Rate and time required for CTS.
3292 CtsTime = ComputeTxTime(14, 10,0, 0); // AckCTSLng = 14 use 1M bps send
3293
3294 // Figure out time required to transmit this frame.
3295 ThisFrameTime = ComputeTxTime(len + sCrcLng,
3296 rtl8180_rate2rate(rate),
3297 0,
3298 bUseShortPreamble);
3299
3300 // RTS-CTS-ThisFrame-ACK.
3301 RtsDur = CtsTime + ThisFrameTime + AckTime + 3*aSifsTime;
3302
3303 TxDescDuration = RtsTime + RtsDur;
3304 }
3305 else {// Normal case.
3306 bCTSEnable = 0;
3307 bRTSEnable = 0;
3308 RtsDur = 0;
3309
3310 ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate), 0, bUseShortPreamble);
3311 TxDescDuration = ThisFrameTime + aSifsTime + AckTime;
3312 }
3313
3314 if(!(frag_hdr->frame_ctl & IEEE80211_FCTL_MOREFRAGS)) { //no more fragment
3315 // ThisFrame-ACK.
3316 Duration = aSifsTime + AckTime;
3317 } else { // One or more fragments remained.
3318 u16 NextFragTime;
3319 NextFragTime = ComputeTxTime( len + sCrcLng, //pretend following packet length equal current packet
3320 rtl8180_rate2rate(rate),
3321 0,
3322 bUseShortPreamble );
3323
3324 //ThisFrag-ACk-NextFrag-ACK.
3325 Duration = NextFragTime + 3*aSifsTime + 2*AckTime;
3326 }
3327
3328 } // End of Unicast packet
3329
3330 frag_hdr->duration_id = Duration;
3331#endif
3332
3333 buflen=priv->txbuffsize;
3334 remain=len;
3335 temp_tail = tail;
3336//printk("================================>buflen = %d, remain = %d!\n", buflen,remain);
3337 while(remain!=0){
3338#ifdef DEBUG_TX_FRAG
3339 DMESG("TX iteration");
3340#endif
3341#ifdef DEBUG_TX
3342 DMESG("TX: filling descriptor %x",(u32)tail);
3343#endif
3344 mb();
3345 if(!buflist){
3346 DMESGE("TX buffer error, cannot TX frames. pri %d.", priority);
3347 //spin_unlock_irqrestore(&priv->tx_lock,flags);
3348 return -1;
3349 }
3350 buf=buflist->buf;
3351
3352 if( (*tail & (1<<31)) && (priority != BEACON_PRIORITY)){
3353
3354 DMESGW("No more TX desc, returning %x of %x",
3355 remain,len);
3356 priv->stats.txrdu++;
3357#ifdef DEBUG_TX_DESC
3358 check_tx_ring(dev,priority);
3359 // netif_stop_queue(dev);
3360 // netif_carrier_off(dev);
3361#endif
3362 // spin_unlock_irqrestore(&priv->tx_lock,flags);
3363
3364 return remain;
3365
3366 }
3367
3368 *tail= 0; // zeroes header
3369 *(tail+1) = 0;
3370 *(tail+3) = 0;
3371 *(tail+5) = 0;
3372 *(tail+6) = 0;
3373 *(tail+7) = 0;
3374
3375 if(priv->card_8185){
3376 //FIXME: this should be triggered by HW encryption parameters.
3377 *tail |= (1<<15); //no encrypt
3378// *tail |= (1<<30); //raise int when completed
3379 }
3380 // *tail = *tail | (1<<16);
3381 if(remain==len && !descfrag) {
3382 ownbit_flag = false; //added by david woo,2007.12.14
3383#ifdef DEBUG_TX_FRAG
3384 DMESG("First descriptor");
3385#endif
3386 *tail = *tail| (1<<29) ; //fist segment of the packet
3387 *tail = *tail |(len);
3388 } else {
3389 ownbit_flag = true;
3390 }
3391
3392 for(i=0;i<buflen&& remain >0;i++,remain--){
3393 ((u8*)buf)[i]=txbuf[i]; //copy data into descriptor pointed DMAble buffer
3394 if(remain == 4 && i+4 >= buflen) break;
3395 /* ensure the last desc has at least 4 bytes payload */
3396
3397 }
3398 txbuf = txbuf + i;
3399 *(tail+3)=*(tail+3) &~ 0xfff;
3400 *(tail+3)=*(tail+3) | i; // buffer lenght
3401 // Use short preamble or not
3402 if (priv->ieee80211->current_network.capability&WLAN_CAPABILITY_SHORT_PREAMBLE)
3403 if (priv->plcp_preamble_mode==1 && rate!=0) // short mode now, not long!
3404 // *tail |= (1<<16); // enable short preamble mode.
3405
3406#ifdef CONFIG_RTL8185B
3407 if(bCTSEnable) {
3408 *tail |= (1<<18);
3409 }
3410
3411 if(bRTSEnable) //rts enable
3412 {
3413 *tail |= ((ieeerate2rtlrate(priv->ieee80211->basic_rate))<<19);//RTS RATE
3414 *tail |= (1<<23);//rts enable
3415 *(tail+1) |=(RtsDur&0xffff);//RTS Duration
3416 }
3417 *(tail+3) |= ((TxDescDuration&0xffff)<<16); //DURATION
3418// *(tail+3) |= (0xe6<<16);
3419 *(tail+5) |= (11<<8);//(priv->retry_data<<8); //retry lim ;
3420#else
3421 //Use RTS or not
3422#ifdef CONFIG_RTL8187B
3423 if ( (len>priv->rts) && priv->rts && priority!=MANAGE_PRIORITY){
3424#else
3425 if ( (len>priv->rts) && priv->rts && priority==LOW_PRIORITY){
3426#endif
3427 *tail |= (1<<23); //enalbe RTS function
3428 *tail |= (0<<19); //use 1M bps send RTS packet
3429 AckCtsTime = ComputeTxTime(14, 10,0, 0); // AckCTSLng = 14 use 1M bps send
3430 FrameTime = ComputeTxTime(len + 4, rtl8180_rate2rate(rate), 0, *tail&(1<<16));
3431 // RTS/CTS time is calculate as follow
3432 duration = FrameTime + 3*10 + 2*AckCtsTime; //10us is the SifsTime;
3433 *(tail+1) |= duration; //Need to edit here! ----hikaru
3434 }else{
3435 *(tail+1)= 0; // zeroes the second 32-bits dword of the descriptor
3436 }
3437#endif
3438
3439 *tail = *tail | ((rate&0xf) << 24);
3440 //DMESG("rate %d",rate);
3441
3442 if(priv->card_8185){
3443
3444 #if 0
3445 *(tail+5)&= ~(1<<24); /* tx ant 0 */
3446
3447 *(tail+5) &= ~(1<<23); /* random tx agc 23-16 */
3448 *(tail+5) |= (1<<22)|(1<<21)|(1<<20)|(1<<19)|(1<<18)|(1<<17)|(1<<16);
3449
3450 *(tail+5) &=
3451~((1<<15)|(1<<14)|(1<<13)|(1<<12)|(1<<11)|(1<<10)|(1<<9)|(1<<8));
3452 *(tail+5) |= (7<<8); // Max retry limit
3453
3454 *(tail+5) &= ~((1<<7)|(1<<6)|(1<<5)|(1<<4)|(1<<3)|(1<<2)|(1<<1)|(1<<0));
3455 *(tail+5) |= (8<<4); // Max contention window
3456 *(tail+6) |= 4; // Min contention window
3457 #endif
3458 // *(tail+5) = 0;
3459 }
3460
3461 /* hw_plcp_len is not used for rtl8180 chip */
3462 /* FIXME */
3463 if(priv->card_8185 == 0 || !priv->hw_plcp_len){
3464
3465 duration = rtl8180_len2duration(len,
3466 rate,&ext);
3467
3468
3469#ifdef DEBUG_TX
3470 DMESG("PLCP duration %d",duration );
3471 //DMESG("drift %d",drift);
3472 DMESG("extension %s", (ext==1) ? "on":"off");
3473#endif
3474 *(tail+1) = *(tail+1) | ((duration & 0x7fff)<<16);
3475 if(ext) *(tail+1) = *(tail+1) |(1<<31); //plcp length extension
3476 }
3477
3478 if(morefrag) *tail = (*tail) | (1<<17); // more fragment
3479 if(!remain) *tail = (*tail) | (1<<28); // last segment of frame
3480
3481#ifdef DEBUG_TX_FRAG
3482 if(!remain)DMESG("Last descriptor");
3483 if(morefrag)DMESG("More frag");
3484#endif
3485 *(tail+5) = *(tail+5)|(2<<27);
3486 *(tail+7) = *(tail+7)|(1<<4);
3487
3488 wmb();
3489 if(ownbit_flag)
3490 {
3491 *tail = *tail | (1<<31); // descriptor ready to be txed
3492 }
3493
3494#ifdef DEBUG_TX_DESC2
3495 printk("tx desc is:\n");
3496 DMESG("%8x %8x %8x %8x %8x %8x %8x %8x", tail[0], tail[1], tail[2], tail[3],
3497 tail[4], tail[5], tail[6], tail[7]);
3498#endif
3499
3500 if((tail - begin)/8 == count-1)
3501 tail=begin;
3502
3503 else
3504 tail=tail+8;
3505
3506 buflist=buflist->next;
3507
3508 mb();
3509
3510 switch(priority) {
3511 case MANAGE_PRIORITY:
3512 priv->txmapringtail=tail;
3513 priv->txmapbufstail=buflist;
3514 break;
3515
3516 case BK_PRIORITY:
3517 priv->txbkpringtail=tail;
3518 priv->txbkpbufstail=buflist;
3519 break;
3520
3521 case BE_PRIORITY:
3522 priv->txbepringtail=tail;
3523 priv->txbepbufstail=buflist;
3524 break;
3525
3526 case VI_PRIORITY:
3527 priv->txvipringtail=tail;
3528 priv->txvipbufstail=buflist;
3529 break;
3530
3531 case VO_PRIORITY:
3532 priv->txvopringtail=tail;
3533 priv->txvopbufstail=buflist;
3534 break;
3535
3536 case HI_PRIORITY:
3537 priv->txhpringtail=tail;
3538 priv->txhpbufstail = buflist;
3539 break;
3540
3541 case BEACON_PRIORITY:
3542 /* the HW seems to be happy with the 1st
3543 * descriptor filled and the 2nd empty...
3544 * So always update descriptor 1 and never
3545 * touch 2nd
3546 */
3547 // priv->txbeaconringtail=tail;
3548 // priv->txbeaconbufstail=buflist;
3549
3550 break;
3551
3552 }
3553
3554 //rtl8180_dma_kick(dev,priority);
3555 }
3556 *temp_tail = *temp_tail | (1<<31); // descriptor ready to be txed
3557 rtl8180_dma_kick(dev,priority);
3558 //spin_unlock_irqrestore(&priv->tx_lock,flags);
3559
3560 return 0;
3561
3562}
3563
3564
3565void rtl8180_irq_rx_tasklet(struct r8180_priv * priv);
3566
3567
3568void rtl8180_link_change(struct net_device *dev)
3569{
3570 struct r8180_priv *priv = ieee80211_priv(dev);
3571 u16 beacon_interval;
3572
3573 struct ieee80211_network *net = &priv->ieee80211->current_network;
3574// rtl8180_adapter_start(dev);
3575 rtl8180_update_msr(dev);
3576
3577
3578 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
3579
3580 write_nic_dword(dev,BSSID,((u32*)net->bssid)[0]);
3581 write_nic_word(dev,BSSID+4,((u16*)net->bssid)[2]);
3582
3583
3584 beacon_interval = read_nic_dword(dev,BEACON_INTERVAL);
3585 beacon_interval &= ~ BEACON_INTERVAL_MASK;
3586 beacon_interval |= net->beacon_interval;
3587 write_nic_dword(dev, BEACON_INTERVAL, beacon_interval);
3588
3589 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3590
3591
3592 /*
3593 u16 atim = read_nic_dword(dev,ATIM);
3594 u16 = u16 &~ ATIM_MASK;
3595 u16 = u16 | beacon->atim;
3596 */
3597#if 0
3598 if (net->capability & WLAN_CAPABILITY_PRIVACY) {
3599 if (priv->hw_wep) {
3600 DMESG("Enabling hardware WEP support");
3601 rtl8180_set_hw_wep(dev);
3602 priv->ieee80211->host_encrypt=0;
3603 priv->ieee80211->host_decrypt=0;
3604 }
3605#ifndef CONFIG_IEEE80211_NOWEP
3606 else {
3607 priv->ieee80211->host_encrypt=1;
3608 priv->ieee80211->host_decrypt=1;
3609 }
3610#endif
3611 }
3612#ifndef CONFIG_IEEE80211_NOWEP
3613 else{
3614 priv->ieee80211->host_encrypt=0;
3615 priv->ieee80211->host_decrypt=0;
3616 }
3617#endif
3618#endif
3619
3620
3621 if(priv->card_8185)
3622 rtl8180_set_chan(dev, priv->chan);
3623
3624
3625}
3626
3627void rtl8180_rq_tx_ack(struct net_device *dev){
3628
3629 struct r8180_priv *priv = ieee80211_priv(dev);
d599edca 3630// printk("====================>%s\n",__func__);
c8d86be3
GKH		 3631 write_nic_byte(dev,CONFIG4,read_nic_byte(dev,CONFIG4)|CONFIG4_PWRMGT);
3632 priv->ack_tx_to_ieee = 1;
3633}
3634
3635short rtl8180_is_tx_queue_empty(struct net_device *dev){
3636
3637 struct r8180_priv *priv = ieee80211_priv(dev);
3638 u32* d;
3639
3640 for (d = priv->txmapring;
3641 d < priv->txmapring + priv->txringcount;d+=8)
3642 if(*d & (1<<31)) return 0;
3643
3644 for (d = priv->txbkpring;
3645 d < priv->txbkpring + priv->txringcount;d+=8)
3646 if(*d & (1<<31)) return 0;
3647
3648 for (d = priv->txbepring;
3649 d < priv->txbepring + priv->txringcount;d+=8)
3650 if(*d & (1<<31)) return 0;
3651
3652 for (d = priv->txvipring;
3653 d < priv->txvipring + priv->txringcount;d+=8)
3654 if(*d & (1<<31)) return 0;
3655
3656 for (d = priv->txvopring;
3657 d < priv->txvopring + priv->txringcount;d+=8)
3658 if(*d & (1<<31)) return 0;
3659
3660 for (d = priv->txhpring;
3661 d < priv->txhpring + priv->txringcount;d+=8)
3662 if(*d & (1<<31)) return 0;
3663 return 1;
3664}
3665/* FIXME FIXME 5msecs is random */
3666#define HW_WAKE_DELAY 5
3667
3668void rtl8180_hw_wakeup(struct net_device *dev)
3669{
3670 unsigned long flags;
3671
3672 struct r8180_priv *priv = ieee80211_priv(dev);
3673
3674 spin_lock_irqsave(&priv->ps_lock,flags);
3675 //DMESG("Waken up!");
3676 write_nic_byte(dev,CONFIG4,read_nic_byte(dev,CONFIG4)&~CONFIG4_PWRMGT);
3677
3678 if(priv->rf_wakeup)
3679 priv->rf_wakeup(dev);
3680// mdelay(HW_WAKE_DELAY);
3681 spin_unlock_irqrestore(&priv->ps_lock,flags);
3682}
3683
3684void rtl8180_hw_sleep_down(struct net_device *dev)
3685{
3686 unsigned long flags;
3687
3688 struct r8180_priv *priv = ieee80211_priv(dev);
3689
3690 spin_lock_irqsave(&priv->ps_lock,flags);
3691 //DMESG("Sleep!");
3692
3693 if(priv->rf_sleep)
3694 priv->rf_sleep(dev);
3695 spin_unlock_irqrestore(&priv->ps_lock,flags);
3696}
3697
3698
3699void rtl8180_hw_sleep(struct net_device *dev, u32 th, u32 tl)
3700{
3701
3702 struct r8180_priv *priv = ieee80211_priv(dev);
3703
3704 u32 rb = jiffies;
3705 unsigned long flags;
3706
3707 spin_lock_irqsave(&priv->ps_lock,flags);
3708
3709 /* Writing HW register with 0 equals to disable
3710 * the timer, that is not really what we want
3711 */
3712 tl -= MSECS(4+16+7);
3713
3714 //if(tl == 0) tl = 1;
3715
3716 /* FIXME HACK FIXME HACK */
3717// force_pci_posting(dev);
3718 //mdelay(1);
3719
3720// rb = read_nic_dword(dev, TSFTR);
3721
3722 /* If the interval in witch we are requested to sleep is too
3723 * short then give up and remain awake
3724 */
3725 if(((tl>=rb)&& (tl-rb) <= MSECS(MIN_SLEEP_TIME))
3726 ||((rb>tl)&& (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
3727 spin_unlock_irqrestore(&priv->ps_lock,flags);
3728 printk("too short to sleep\n");
3729 return;
3730 }
3731
3732// write_nic_dword(dev, TimerInt, tl);
3733// rb = read_nic_dword(dev, TSFTR);
3734 {
3735 u32 tmp = (tl>rb)?(tl-rb):(rb-tl);
3736 // if (tl<rb)
3737
3738 //lzm,add,080828
3739 priv->DozePeriodInPast2Sec += jiffies_to_msecs(tmp);
3740
3741 queue_delayed_work(priv->ieee80211->wq, &priv->ieee80211->hw_wakeup_wq, tmp); //as tl may be less than rb
3742 }
3743 /* if we suspect the TimerInt is gone beyond tl
3744 * while setting it, then give up
3745 */
3746#if 1
3747 if(((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME)))||
3748 ((tl < rb) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))) {
3749 spin_unlock_irqrestore(&priv->ps_lock,flags);
3750 return;
3751 }
3752#endif
3753// if(priv->rf_sleep)
3754// priv->rf_sleep(dev);
3755
3756 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_sleep_wq);
3757 spin_unlock_irqrestore(&priv->ps_lock,flags);
3758}
3759
3760
3761//void rtl8180_wmm_param_update(struct net_device *dev,u8 *ac_param)
3762#if LINUX_VERSION_CODE >=KERNEL_VERSION(2,6,20)
3763void rtl8180_wmm_param_update(struct work_struct * work)
3764{
3765 struct ieee80211_device * ieee = container_of(work, struct ieee80211_device,wmm_param_update_wq);
3766 //struct r8180_priv *priv = (struct r8180_priv*)(ieee->priv);
3767 struct net_device *dev = ieee->dev;
3768#else
3769void rtl8180_wmm_param_update(struct ieee80211_device *ieee)
3770{
3771 struct net_device *dev = ieee->dev;
3772 struct r8180_priv *priv = ieee80211_priv(dev);
3773#endif
3774 u8 *ac_param = (u8 *)(ieee->current_network.wmm_param);
3775 u8 mode = ieee->current_network.mode;
3776 AC_CODING eACI;
3777 AC_PARAM AcParam;
3778 PAC_PARAM pAcParam;
3779 u8 i;
3780
3781#ifndef CONFIG_RTL8185B
3782 //for legacy 8185 keep the PARAM unchange.
3783 return;
3784#else
3785 if(!ieee->current_network.QoS_Enable){
3786 //legacy ac_xx_param update
3787 AcParam.longData = 0;
3788 AcParam.f.AciAifsn.f.AIFSN = 2; // Follow 802.11 DIFS.
3789 AcParam.f.AciAifsn.f.ACM = 0;
3790 AcParam.f.Ecw.f.ECWmin = 3; // Follow 802.11 CWmin.
3791 AcParam.f.Ecw.f.ECWmax = 7; // Follow 802.11 CWmax.
3792 AcParam.f.TXOPLimit = 0;
3793 for(eACI = 0; eACI < AC_MAX; eACI++){
3794 AcParam.f.AciAifsn.f.ACI = (u8)eACI;
3795 {
3796 u8 u1bAIFS;
3797 u32 u4bAcParam;
3798 pAcParam = (PAC_PARAM)(&AcParam);
3799 // Retrive paramters to udpate.
3800 u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN *(((mode&IEEE_G) == IEEE_G)?9:20) + aSifsTime;
3801 u4bAcParam = ((((u32)(pAcParam->f.TXOPLimit))<<AC_PARAM_TXOP_LIMIT_OFFSET)|
3802 (((u32)(pAcParam->f.Ecw.f.ECWmax))<<AC_PARAM_ECW_MAX_OFFSET)|
3803 (((u32)(pAcParam->f.Ecw.f.ECWmin))<<AC_PARAM_ECW_MIN_OFFSET)|
3804 (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
3805 switch(eACI){
3806 case AC1_BK:
3807 write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
3808 break;
3809
3810 case AC0_BE:
3811 write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
3812 break;
3813
3814 case AC2_VI:
3815 write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
3816 break;
3817
3818 case AC3_VO:
3819 write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
3820 break;
3821
3822 default:
3823 printk(KERN_WARNING "SetHwReg8185():invalid ACI: %d!\n", eACI);
3824 break;
3825 }
3826 }
3827 }
3828 return;
3829 }
3830
3831 for(i = 0; i < AC_MAX; i++){
3832 //AcParam.longData = 0;
3833 pAcParam = (AC_PARAM * )ac_param;
3834 {
3835 AC_CODING eACI;
3836 u8 u1bAIFS;
3837 u32 u4bAcParam;
3838
3839 // Retrive paramters to udpate.
3840 eACI = pAcParam->f.AciAifsn.f.ACI;
3841 //Mode G/A: slotTimeTimer = 9; Mode B: 20
3842 u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN * (((mode&IEEE_G) == IEEE_G)?9:20) + aSifsTime;
3843 u4bAcParam = ( (((u32)(pAcParam->f.TXOPLimit)) << AC_PARAM_TXOP_LIMIT_OFFSET) |
3844 (((u32)(pAcParam->f.Ecw.f.ECWmax)) << AC_PARAM_ECW_MAX_OFFSET) |
3845 (((u32)(pAcParam->f.Ecw.f.ECWmin)) << AC_PARAM_ECW_MIN_OFFSET) |
3846 (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
3847
3848 switch(eACI){
3849 case AC1_BK:
3850 write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
3851 break;
3852
3853 case AC0_BE:
3854 write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
3855 break;
3856
3857 case AC2_VI:
3858 write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
3859 break;
3860
3861 case AC3_VO:
3862 write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
3863 break;
3864
3865 default:
3866 printk(KERN_WARNING "SetHwReg8185(): invalid ACI: %d !\n", eACI);
3867 break;
3868 }
3869 }
3870 ac_param += (sizeof(AC_PARAM));
3871 }
3872#endif
3873}
3874
3875#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
3876void rtl8180_tx_irq_wq(struct work_struct *work);
3877#else
3878void rtl8180_tx_irq_wq(struct net_device *dev);
3879#endif
3880
3881
3882
3883
3884#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
3885void rtl8180_restart_wq(struct work_struct *work);
3886//void rtl8180_rq_tx_ack(struct work_struct *work);
3887#else
3888 void rtl8180_restart_wq(struct net_device *dev);
3889//void rtl8180_rq_tx_ack(struct net_device *dev);
3890#endif
3891#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
3892void rtl8180_watch_dog_wq(struct work_struct *work);
3893#else
3894void rtl8180_watch_dog_wq(struct net_device *dev);
3895#endif
3896#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
3897void rtl8180_hw_wakeup_wq(struct work_struct *work);
3898#else
3899void rtl8180_hw_wakeup_wq(struct net_device *dev);
3900#endif
3901
3902#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
3903void rtl8180_hw_sleep_wq(struct work_struct *work);
3904#else
3905void rtl8180_hw_sleep_wq(struct net_device *dev);
3906#endif
3907
3908
3909
3910#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
3911void rtl8180_sw_antenna_wq(struct work_struct *work);
3912#else
3913void rtl8180_sw_antenna_wq(struct net_device *dev);
3914#endif
3915 void rtl8180_watch_dog(struct net_device *dev);
3916void watch_dog_adaptive(unsigned long data)
3917{
3918 struct r8180_priv* priv = ieee80211_priv((struct net_device *)data);
3919// DMESG("---->watch_dog_adaptive()\n");
3920 if(!priv->up)
3921 {
3922 DMESG("<----watch_dog_adaptive():driver is not up!\n");
3923 return;
3924 }
3925
3926 // queue_work(priv->ieee80211->wq,&priv->ieee80211->watch_dog_wq);
3927//{by amy 080312
3928#if 1
3929 // Tx High Power Mechanism.
3930#ifdef HIGH_POWER
3931 if(CheckHighPower((struct net_device *)data))
3932 {
3933 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->tx_pw_wq);
3934 }
3935#endif
3936
3937#ifdef CONFIG_RTL818X_S
3938 // Tx Power Tracking on 87SE.
3939#ifdef TX_TRACK
3940 //if( priv->bTxPowerTrack ) //lzm mod 080826
3941 if( CheckTxPwrTracking((struct net_device *)data));
3942 TxPwrTracking87SE((struct net_device *)data);
3943#endif
3944#endif
3945
3946 // Perform DIG immediately.
3947#ifdef SW_DIG
3948 if(CheckDig((struct net_device *)data) == true)
3949 {
3950 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_dig_wq);
3951 }
3952#endif
3953#endif
3954//by amy 080312}
3955 rtl8180_watch_dog((struct net_device *)data);
3956
3957
3958 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->GPIOChangeRFWorkItem);
3959
3960 priv->watch_dog_timer.expires = jiffies + MSECS(IEEE80211_WATCH_DOG_TIME);
3961 add_timer(&priv->watch_dog_timer);
3962// DMESG("<----watch_dog_adaptive()\n");
3963}
3964
3965#ifdef ENABLE_DOT11D
3966
3967static CHANNEL_LIST ChannelPlan[] = {
3968 {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64},19}, //FCC
3969 {{1,2,3,4,5,6,7,8,9,10,11},11}, //IC
3970 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //ETSI
3971 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //Spain. Change to ETSI.
3972 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //France. Change to ETSI.
3973 {{14,36,40,44,48,52,56,60,64},9}, //MKK
3974 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14, 36,40,44,48,52,56,60,64},22},//MKK1
3975 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //Israel.
3976 {{1,2,3,4,5,6,7,8,9,10,11,12,13,34,38,42,46},17}, // For 11a , TELEC
3977 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14}, //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626
3978 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13} //world wide 13: ch1~ch11 active scan, ch12~13 passive //lzm add 080826
3979};
3980
3981static void rtl8180_set_channel_map(u8 channel_plan, struct ieee80211_device *ieee)
3982{
3983 int i;
3984
3985 //lzm add 080826
3986 ieee->MinPassiveChnlNum=MAX_CHANNEL_NUMBER+1;
3987 ieee->IbssStartChnl=0;
3988
3989 switch (channel_plan)
3990 {
3991 case COUNTRY_CODE_FCC:
3992 case COUNTRY_CODE_IC:
3993 case COUNTRY_CODE_ETSI:
3994 case COUNTRY_CODE_SPAIN:
3995 case COUNTRY_CODE_FRANCE:
3996 case COUNTRY_CODE_MKK:
3997 case COUNTRY_CODE_MKK1:
3998 case COUNTRY_CODE_ISRAEL:
3999 case COUNTRY_CODE_TELEC:
4000 {
4001 Dot11d_Init(ieee);
4002 ieee->bGlobalDomain = false;
4003 if (ChannelPlan[channel_plan].Len != 0){
4004 // Clear old channel map
4005 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
4006 // Set new channel map
4007 for (i=0;i<ChannelPlan[channel_plan].Len;i++)
4008 {
4009 if(ChannelPlan[channel_plan].Channel[i] <= 14)
4010 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
4011 }
4012 }
4013 break;
4014 }
4015 case COUNTRY_CODE_GLOBAL_DOMAIN:
4016 {
4017 GET_DOT11D_INFO(ieee)->bEnabled = 0;
4018 Dot11d_Reset(ieee);
4019 ieee->bGlobalDomain = true;
4020 break;
4021 }
4022 case COUNTRY_CODE_WORLD_WIDE_13_INDEX://lzm add 080826
4023 {
4024 ieee->MinPassiveChnlNum=12;
4025 ieee->IbssStartChnl= 10;
4026 break;
4027 }
4028 default:
4029 {
4030 Dot11d_Init(ieee);
4031 ieee->bGlobalDomain = false;
4032 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
4033 for (i=1;i<=14;i++)
4034 {
4035 GET_DOT11D_INFO(ieee)->channel_map[i] = 1;
4036 }
4037 break;
4038 }
4039 }
4040}
4041#endif
4042
4043//Add for RF power on power off by lizhaoming 080512
4044#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
4045void GPIOChangeRFWorkItemCallBack(struct work_struct *work);
4046#else
4047void GPIOChangeRFWorkItemCallBack(struct ieee80211_device *ieee);
4048#endif
4049
4050//YJ,add,080828
4051static void rtl8180_statistics_init(struct Stats *pstats)
4052{
4053 memset(pstats, 0, sizeof(struct Stats));
4054}
4055static void rtl8180_link_detect_init(plink_detect_t plink_detect)
4056{
4057 memset(plink_detect, 0, sizeof(link_detect_t));
4058 plink_detect->SlotNum = DEFAULT_SLOT_NUM;
4059}
4060//YJ,add,080828,end
4061
4062short rtl8180_init(struct net_device *dev)
4063{
4064 struct r8180_priv *priv = ieee80211_priv(dev);
4065 u16 word;
4066 u16 version;
4067 u8 hw_version;
4068 //u8 config3;
4069 u32 usValue;
4070 u16 tmpu16;
4071 int i, j;
4072
4073#ifdef ENABLE_DOT11D
4074#if 0
4075 for(i=0;i<0xFF;i++) {
4076 if(i%16 == 0)
4077 printk("\n[%x]: ", i/16);
4078 printk("\t%4.4x", eprom_read(dev,i));
4079 }
4080#endif
4081 priv->channel_plan = eprom_read(dev, EEPROM_COUNTRY_CODE>>1) & 0xFF;
4082 if(priv->channel_plan > COUNTRY_CODE_GLOBAL_DOMAIN){
4083 printk("rtl8180_init:Error channel plan! Set to default.\n");
4084 priv->channel_plan = 0;
4085 }
4086 //priv->channel_plan = 9; //Global Domain
4087
4088 DMESG("Channel plan is %d\n",priv->channel_plan);
4089 rtl8180_set_channel_map(priv->channel_plan, priv->ieee80211);
4090#else
4091 int ch;
4092 //Set Default Channel Plan
4093 if(!channels){
4094 DMESG("No channels, aborting");
4095 return -1;
4096 }
4097 ch=channels;
4098 priv->channel_plan = 0;//hikaru
4099 // set channels 1..14 allowed in given locale
4100 for (i=1; i<=14; i++) {
4101 (priv->ieee80211->channel_map)[i] = (u8)(ch & 0x01);
4102 ch >>= 1;
4103 }
4104#endif
4105
4106 //memcpy(priv->stats,0,sizeof(struct Stats));
4107
4108 //FIXME: these constants are placed in a bad pleace.
4109 priv->txbuffsize = 2048;//1024;
4110 priv->txringcount = 32;//32;
4111 priv->rxbuffersize = 2048;//1024;
4112 priv->rxringcount = 64;//32;
4113 priv->txbeaconcount = 2;
4114 priv->rx_skb_complete = 1;
4115 //priv->txnp_pending.ispending=0;
4116 /* ^^ the SKB does not containt a partial RXed
4117 * packet (is empty)
4118 */
4119
4120#ifdef CONFIG_RTL8185B
4121#ifdef CONFIG_RTL818X_S
4122 priv->RegThreeWireMode = HW_THREE_WIRE_SI;
4123#else
4124 priv->RegThreeWireMode = SW_THREE_WIRE;
4125#endif
4126#endif
4127
4128//Add for RF power on power off by lizhaoming 080512
4129 priv->RFChangeInProgress = false;
4130 priv->SetRFPowerStateInProgress = false;
4131 priv->RFProgType = 0;
4132 priv->bInHctTest = false;
4133
4134 priv->irq_enabled=0;
4135
4136//YJ,modified,080828
4137#if 0
4138 priv->stats.rxdmafail=0;
4139 priv->stats.txrdu=0;
4140 priv->stats.rxrdu=0;
4141 priv->stats.rxnolast=0;
4142 priv->stats.rxnodata=0;
4143 //priv->stats.rxreset=0;
4144 //priv->stats.rxwrkaround=0;
4145 priv->stats.rxnopointer=0;
4146 priv->stats.txnperr=0;
4147 priv->stats.txresumed=0;
4148 priv->stats.rxerr=0;
4149 priv->stats.rxoverflow=0;
4150 priv->stats.rxint=0;
4151 priv->stats.txnpokint=0;
4152 priv->stats.txhpokint=0;
4153 priv->stats.txhperr=0;
4154 priv->stats.ints=0;
4155 priv->stats.shints=0;
4156 priv->stats.txoverflow=0;
4157 priv->stats.txbeacon=0;
4158 priv->stats.txbeaconerr=0;
4159 priv->stats.txlperr=0;
4160 priv->stats.txlpokint=0;
4161 priv->stats.txretry=0;//tony 20060601
4162 priv->stats.rxcrcerrmin=0;
4163 priv->stats.rxcrcerrmid=0;
4164 priv->stats.rxcrcerrmax=0;
4165 priv->stats.rxicverr=0;
4166#else
4167 rtl8180_statistics_init(&priv->stats);
4168 rtl8180_link_detect_init(&priv->link_detect);
4169#endif
4170//YJ,modified,080828,end
4171
4172
4173 priv->ack_tx_to_ieee = 0;
4174 priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
4175 priv->ieee80211->iw_mode = IW_MODE_INFRA;
4176 priv->ieee80211->softmac_features = IEEE_SOFTMAC_SCAN |
4177 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
4178 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE;
4179 priv->ieee80211->active_scan = 1;
4180 priv->ieee80211->rate = 110; //11 mbps
4181 priv->ieee80211->modulation = IEEE80211_CCK_MODULATION;
4182 priv->ieee80211->host_encrypt = 1;
4183 priv->ieee80211->host_decrypt = 1;
4184 priv->ieee80211->sta_wake_up = rtl8180_hw_wakeup;
4185 priv->ieee80211->ps_request_tx_ack = rtl8180_rq_tx_ack;
4186 priv->ieee80211->enter_sleep_state = rtl8180_hw_sleep;
4187 priv->ieee80211->ps_is_queue_empty = rtl8180_is_tx_queue_empty;
4188
4189 priv->hw_wep = hwwep;
4190 priv->prism_hdr=0;
4191 priv->dev=dev;
4192 priv->retry_rts = DEFAULT_RETRY_RTS;
4193 priv->retry_data = DEFAULT_RETRY_DATA;
4194 priv->RFChangeInProgress = false;
4195 priv->SetRFPowerStateInProgress = false;
4196 priv->RFProgType = 0;
4197 priv->bInHctTest = false;
4198 priv->bInactivePs = true;//false;
4199 priv->ieee80211->bInactivePs = priv->bInactivePs;
4200 priv->bSwRfProcessing = false;
4201 priv->eRFPowerState = eRfOff;
4202 priv->RfOffReason = 0;
4203 priv->LedStrategy = SW_LED_MODE0;
4204 //priv->NumRxOkInPeriod = 0; //YJ,del,080828
4205 //priv->NumTxOkInPeriod = 0; //YJ,del,080828
4206 priv->TxPollingTimes = 0;//lzm add 080826
4207 priv->bLeisurePs = true;
4208 priv->dot11PowerSaveMode = eActive;
4209//by amy for antenna
4210 priv->AdMinCheckPeriod = 5;
4211 priv->AdMaxCheckPeriod = 10;
4212// Lower signal strength threshold to fit the HW participation in antenna diversity. +by amy 080312
4213 priv->AdMaxRxSsThreshold = 30;//60->30
4214 priv->AdRxSsThreshold = 20;//50->20
4215 priv->AdCheckPeriod = priv->AdMinCheckPeriod;
4216 priv->AdTickCount = 0;
4217 priv->AdRxSignalStrength = -1;
4218 priv->RegSwAntennaDiversityMechanism = 0;
4219 priv->RegDefaultAntenna = 0;
4220 priv->SignalStrength = 0;
4221 priv->AdRxOkCnt = 0;
4222 priv->CurrAntennaIndex = 0;
4223 priv->AdRxSsBeforeSwitched = 0;
4224 init_timer(&priv->SwAntennaDiversityTimer);
4225 priv->SwAntennaDiversityTimer.data = (unsigned long)dev;
4226 priv->SwAntennaDiversityTimer.function = (void *)SwAntennaDiversityTimerCallback;
4227//by amy for antenna
4228//{by amy 080312
4229 priv->bDigMechanism = 1;
4230 priv->InitialGain = 6;
4231 priv->bXtalCalibration = false;
4232 priv->XtalCal_Xin = 0;
4233 priv->XtalCal_Xout = 0;
4234 priv->bTxPowerTrack = false;
4235 priv->ThermalMeter = 0;
4236 priv->FalseAlarmRegValue = 0;
4237 priv->RegDigOfdmFaUpTh = 0xc; // Upper threhold of OFDM false alarm, which is used in DIG.
4238 priv->DIG_NumberFallbackVote = 0;
4239 priv->DIG_NumberUpgradeVote = 0;
4240 priv->LastSignalStrengthInPercent = 0;
4241 priv->Stats_SignalStrength = 0;
4242 priv->LastRxPktAntenna = 0;
4243 priv->SignalQuality = 0; // in 0-100 index.
4244 priv->Stats_SignalQuality = 0;
4245 priv->RecvSignalPower = 0; // in dBm.
4246 priv->Stats_RecvSignalPower = 0;
4247 priv->AdMainAntennaRxOkCnt = 0;
4248 priv->AdAuxAntennaRxOkCnt = 0;
4249 priv->bHWAdSwitched = false;
4250 priv->bRegHighPowerMechanism = true;
4251 priv->RegHiPwrUpperTh = 77;
4252 priv->RegHiPwrLowerTh = 75;
4253 priv->RegRSSIHiPwrUpperTh = 70;
4254 priv->RegRSSIHiPwrLowerTh = 20;
4255 priv->bCurCCKPkt = false;
4256 priv->UndecoratedSmoothedSS = -1;
4257 priv->bToUpdateTxPwr = false;
4258 priv->CurCCKRSSI = 0;
4259 priv->RxPower = 0;
4260 priv->RSSI = 0;
4261 //YJ,add,080828
4262 priv->NumTxOkTotal = 0;
4263 priv->NumTxUnicast = 0;
4264 priv->keepAliveLevel = DEFAULT_KEEP_ALIVE_LEVEL;
4265 priv->PowerProfile = POWER_PROFILE_AC;
4266 //YJ,add,080828,end
4267//by amy for rate adaptive
4268 priv->CurrRetryCnt=0;
4269 priv->LastRetryCnt=0;
4270 priv->LastTxokCnt=0;
4271 priv->LastRxokCnt=0;
4272 priv->LastRetryRate=0;
4273 priv->bTryuping=0;
4274 priv->CurrTxRate=0;
4275 priv->CurrRetryRate=0;
4276 priv->TryupingCount=0;
4277 priv->TryupingCountNoData=0;
4278 priv->TryDownCountLowData=0;
4279 priv->LastTxOKBytes=0;
4280 priv->LastFailTxRate=0;
4281 priv->LastFailTxRateSS=0;
4282 priv->FailTxRateCount=0;
4283 priv->LastTxThroughput=0;
4284 priv->NumTxOkBytesTotal=0;
4285 priv->ForcedDataRate = 0;
4286 priv->RegBModeGainStage = 1;
4287
4288//by amy for rate adaptive
4289//by amy 080312}
4290 priv->promisc = (dev->flags & IFF_PROMISC) ? 1:0;
4291 spin_lock_init(&priv->irq_lock);
4292 spin_lock_init(&priv->irq_th_lock);
4293 spin_lock_init(&priv->tx_lock);
4294 spin_lock_init(&priv->ps_lock);
4295 spin_lock_init(&priv->rf_ps_lock);
4296 sema_init(&priv->wx_sem,1);
4297 sema_init(&priv->rf_state,1);
4298#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
4299 INIT_WORK(&priv->reset_wq,(void*) rtl8180_restart_wq);
4300 INIT_WORK(&priv->tx_irq_wq,(void*) rtl8180_tx_irq_wq);
4301 INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq,(void*) rtl8180_hw_wakeup_wq);
4302 INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq,(void*) rtl8180_hw_sleep_wq);
4303 //INIT_DELAYED_WORK(&priv->ieee80211->watch_dog_wq,(void*) rtl8180_watch_dog_wq);
4304 //INIT_DELAYED_WORK(&priv->ieee80211->sw_antenna_wq,(void*) rtl8180_sw_antenna_wq);
4305 INIT_WORK(&priv->ieee80211->wmm_param_update_wq,(void*) rtl8180_wmm_param_update);
4306 INIT_DELAYED_WORK(&priv->ieee80211->rate_adapter_wq,(void*)rtl8180_rate_adapter);//+by amy 080312
4307 INIT_DELAYED_WORK(&priv->ieee80211->hw_dig_wq,(void*)rtl8180_hw_dig_wq);//+by amy 080312
4308 INIT_DELAYED_WORK(&priv->ieee80211->tx_pw_wq,(void*)rtl8180_tx_pw_wq);//+by amy 080312
4309
4310 //add for RF power on power off by lizhaoming 080512
4311 INIT_DELAYED_WORK(&priv->ieee80211->GPIOChangeRFWorkItem,(void*) GPIOChangeRFWorkItemCallBack);
4312#else
4313 INIT_WORK(&priv->reset_wq,(void*) rtl8180_restart_wq,dev);
4314 INIT_WORK(&priv->tx_irq_wq,(void*) rtl8180_tx_irq_wq,dev);
4315 //INIT_WORK(&priv->ieee80211->watch_dog_wq,(void*) rtl8180_watch_dog_wq,dev);
4316 INIT_WORK(&priv->ieee80211->hw_wakeup_wq,(void*) rtl8180_hw_wakeup_wq,dev);
4317 INIT_WORK(&priv->ieee80211->hw_sleep_wq,(void*) rtl8180_hw_sleep_wq,dev);
4318 //INIT_WORK(&priv->ieee80211->sw_antenna_wq,(void*) rtl8180_sw_antenna_wq,dev);
4319 INIT_WORK(&priv->ieee80211->wmm_param_update_wq,(void*) rtl8180_wmm_param_update,priv->ieee80211);
4320 INIT_WORK(&priv->ieee80211->rate_adapter_wq,(void*)rtl8180_rate_adapter,dev);//+by amy 080312
4321 INIT_WORK(&priv->ieee80211->hw_dig_wq,(void*)rtl8180_hw_dig_wq,dev);//+by amy 080312
4322 INIT_WORK(&priv->ieee80211->tx_pw_wq,(void*)rtl8180_tx_pw_wq,dev);//+by amy 080312
4323
4324 //add for RF power on power off by lizhaoming 080512
4325 INIT_WORK(&priv->ieee80211->GPIOChangeRFWorkItem,(void*) GPIOChangeRFWorkItemCallBack, priv->ieee80211);
4326#endif
4327 //INIT_WORK(&priv->reset_wq,(void*) rtl8180_restart_wq,dev);
4328
4329 tasklet_init(&priv->irq_rx_tasklet,
4330 (void(*)(unsigned long)) rtl8180_irq_rx_tasklet,
4331 (unsigned long)priv);
4332//by amy
4333 init_timer(&priv->watch_dog_timer);
4334 priv->watch_dog_timer.data = (unsigned long)dev;
4335 priv->watch_dog_timer.function = watch_dog_adaptive;
4336//by amy
4337
4338//{by amy 080312
4339//by amy for rate adaptive
4340 init_timer(&priv->rateadapter_timer);
4341 priv->rateadapter_timer.data = (unsigned long)dev;
4342 priv->rateadapter_timer.function = timer_rate_adaptive;
4343 priv->RateAdaptivePeriod= RATE_ADAPTIVE_TIMER_PERIOD;
4344 priv->bEnhanceTxPwr=false;
4345//by amy for rate adaptive
4346//by amy 080312}
4347 //priv->ieee80211->func =
4348 // kmalloc(sizeof(struct ieee80211_helper_functions),GFP_KERNEL);
4349 //memset(priv->ieee80211->func, 0,
4350 // sizeof(struct ieee80211_helper_functions));
4351
4352 priv->ieee80211->softmac_hard_start_xmit = rtl8180_hard_start_xmit;
4353 priv->ieee80211->set_chan = rtl8180_set_chan;
4354 priv->ieee80211->link_change = rtl8180_link_change;
4355 priv->ieee80211->softmac_data_hard_start_xmit = rtl8180_hard_data_xmit;
4356 priv->ieee80211->data_hard_stop = rtl8180_data_hard_stop;
4357 priv->ieee80211->data_hard_resume = rtl8180_data_hard_resume;
4358
4359 priv->ieee80211->init_wmmparam_flag = 0;
4360
4361 priv->ieee80211->start_send_beacons = rtl8180_start_tx_beacon;
4362 priv->ieee80211->stop_send_beacons = rtl8180_beacon_tx_disable;
4363 priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
4364
4365#ifdef CONFIG_RTL8185B
4366 priv->MWIEnable = 0;
4367
4368 priv->ShortRetryLimit = 7;
4369 priv->LongRetryLimit = 7;
4370 priv->EarlyRxThreshold = 7;
4371
4372 priv->CSMethod = (0x01 << 29);
4373
4374 priv->TransmitConfig =
4375 1<<TCR_DurProcMode_OFFSET | //for RTL8185B, duration setting by HW
4376 (7<<TCR_MXDMA_OFFSET) | // Max DMA Burst Size per Tx DMA Burst, 7: reservied.
4377 (priv->ShortRetryLimit<<TCR_SRL_OFFSET) | // Short retry limit
4378 (priv->LongRetryLimit<<TCR_LRL_OFFSET) | // Long retry limit
4379 (0 ? TCR_SAT : 0); // FALSE: HW provies PLCP length and LENGEXT, TURE: SW proiveds them
4380
4381 priv->ReceiveConfig =
4382#ifdef CONFIG_RTL818X_S
4383#else
4384 priv->CSMethod |
4385#endif
4386// RCR_ENMARP |
4387 RCR_AMF | RCR_ADF | //accept management/data
4388 RCR_ACF | //accept control frame for SW AP needs PS-poll, 2005.07.07, by rcnjko.
4389 RCR_AB | RCR_AM | RCR_APM | //accept BC/MC/UC
4390 //RCR_AICV | RCR_ACRC32 | //accept ICV/CRC error packet
4391 (7<<RCR_MXDMA_OFFSET) | // Max DMA Burst Size per Rx DMA Burst, 7: unlimited.
4392 (priv->EarlyRxThreshold<<RCR_FIFO_OFFSET) | // Rx FIFO Threshold, 7: No Rx threshold.
4393 (priv->EarlyRxThreshold == 7 ? RCR_ONLYERLPKT:0);
4394
4395 priv->IntrMask = IMR_TMGDOK | IMR_TBDER | IMR_THPDER |
4396 IMR_THPDER | IMR_THPDOK |
4397 IMR_TVODER | IMR_TVODOK |
4398 IMR_TVIDER | IMR_TVIDOK |
4399 IMR_TBEDER | IMR_TBEDOK |
4400 IMR_TBKDER | IMR_TBKDOK |
4401 IMR_RDU | // To handle the defragmentation not enough Rx descriptors case. Annie, 2006-03-27.
4402 IMR_RER | IMR_ROK |
4403 IMR_RQoSOK; // <NOTE> ROK and RQoSOK are mutually exclusive, so, we must handle RQoSOK interrupt to receive QoS frames, 2005.12.09, by rcnjko.
4404
4405 priv->InitialGain = 6;
4406#endif
4407
4408 hw_version =( read_nic_dword(dev, TCR) & TCR_HWVERID_MASK)>>TCR_HWVERID_SHIFT;
4409
4410 switch (hw_version){
4411#ifdef CONFIG_RTL8185B
4412 case HW_VERID_R8185B_B:
4413#ifdef CONFIG_RTL818X_S
4414 priv->card_8185 = VERSION_8187S_C;
4415 DMESG("MAC controller is a RTL8187SE b/g");
4416 priv->phy_ver = 2;
4417 break;
4418#else
4419 DMESG("MAC controller is a RTL8185B b/g");
4420 priv->card_8185 = 3;
4421 priv->phy_ver = 2;
4422 break;
4423#endif
4424#endif
4425 case HW_VERID_R8185_ABC:
4426 DMESG("MAC controller is a RTL8185 b/g");
4427 priv->card_8185 = 1;
4428 /* you should not find a card with 8225 PHY ver < C*/
4429 priv->phy_ver = 2;
4430 break;
4431
4432 case HW_VERID_R8185_D:
4433 DMESG("MAC controller is a RTL8185 b/g (V. D)");
4434 priv->card_8185 = 2;
4435 /* you should not find a card with 8225 PHY ver < C*/
4436 priv->phy_ver = 2;
4437 break;
4438
4439 case HW_VERID_R8180_ABCD:
4440 DMESG("MAC controller is a RTL8180");
4441 priv->card_8185 = 0;
4442 break;
4443
4444 case HW_VERID_R8180_F:
4445 DMESG("MAC controller is a RTL8180 (v. F)");
4446 priv->card_8185 = 0;
4447 break;
4448
4449 default:
4450 DMESGW("MAC chip not recognized: version %x. Assuming RTL8180",hw_version);
4451 priv->card_8185 = 0;
4452 break;
4453 }
4454
4455 if(priv->card_8185){
4456 priv->ieee80211->modulation |= IEEE80211_OFDM_MODULATION;
4457 priv->ieee80211->short_slot = 1;
4458 }
4459 /* you should not found any 8185 Ver B Card */
4460 priv->card_8185_Bversion = 0;
4461
4462#ifdef CONFIG_RTL8185B
4463#ifdef CONFIG_RTL818X_S
4464 // just for sync 85
4465 priv->card_type = PCI;
4466 DMESG("This is a PCI NIC");
4467#else
4468 config3 = read_nic_byte(dev, CONFIG3);
4469 if(config3 & 0x8){
4470 priv->card_type = CARDBUS;
4471 DMESG("This is a CARDBUS NIC");
4472 }
4473 else if( config3 & 0x4){
4474 priv->card_type = MINIPCI;
4475 DMESG("This is a MINI-PCI NIC");
4476 }else{
4477 priv->card_type = PCI;
4478 DMESG("This is a PCI NIC");
4479 }
4480#endif
4481#endif
4482 priv->enable_gpio0 = 0;
4483
4484//by amy for antenna
4485#ifdef CONFIG_RTL8185B
4486 usValue = eprom_read(dev, EEPROM_SW_REVD_OFFSET);
4487 DMESG("usValue is 0x%x\n",usValue);
4488#ifdef CONFIG_RTL818X_S
4489 //3Read AntennaDiversity
4490 // SW Antenna Diversity.
4491 if( (usValue & EEPROM_SW_AD_MASK) != EEPROM_SW_AD_ENABLE )
4492 {
4493 priv->EEPROMSwAntennaDiversity = false;
4494 //printk("EEPROM Disable SW Antenna Diversity\n");
4495 }
4496 else
4497 {
4498 priv->EEPROMSwAntennaDiversity = true;
4499 //printk("EEPROM Enable SW Antenna Diversity\n");
4500 }
4501 // Default Antenna to use.
4502 if( (usValue & EEPROM_DEF_ANT_MASK) != EEPROM_DEF_ANT_1 )
4503 {
4504 priv->EEPROMDefaultAntenna1 = false;
4505 //printk("EEPROM Default Antenna 0\n");
4506 }
4507 else
4508 {
4509 priv->EEPROMDefaultAntenna1 = true;
4510 //printk("EEPROM Default Antenna 1\n");
4511 }
4512
4513 //
4514 // Antenna diversity mechanism. Added by Roger, 2007.11.05.
4515 //
4516 if( priv->RegSwAntennaDiversityMechanism == 0 ) // Auto
4517 {// 0: default from EEPROM.
4518 priv->bSwAntennaDiverity = priv->EEPROMSwAntennaDiversity;
4519 }
4520 else
4521 {// 1:disable antenna diversity, 2: enable antenna diversity.
4522 priv->bSwAntennaDiverity = ((priv->RegSwAntennaDiversityMechanism == 1)? false : true);
4523 }
4524 //printk("bSwAntennaDiverity = %d\n", priv->bSwAntennaDiverity);
4525
4526
4527 //
4528 // Default antenna settings. Added by Roger, 2007.11.05.
4529 //
4530 if( priv->RegDefaultAntenna == 0)
4531 {// 0: default from EEPROM.
4532 priv->bDefaultAntenna1 = priv->EEPROMDefaultAntenna1;
4533 }
4534 else
4535 {// 1: main, 2: aux.
4536 priv->bDefaultAntenna1 = ((priv->RegDefaultAntenna== 2) ? true : false);
4537 }
4538 //printk("bDefaultAntenna1 = %d\n", priv->bDefaultAntenna1);
4539#endif
4540#endif
4541//by amy for antenna
4542 /* rtl8185 can calc plcp len in HW.*/
4543 priv->hw_plcp_len = 1;
4544
4545 priv->plcp_preamble_mode = 2;
4546 /*the eeprom type is stored in RCR register bit #6 */
4547 if (RCR_9356SEL & read_nic_dword(dev, RCR)){
4548 priv->epromtype=EPROM_93c56;
4549 //DMESG("Reported EEPROM chip is a 93c56 (2Kbit)");
4550 }else{
4551 priv->epromtype=EPROM_93c46;
4552 //DMESG("Reported EEPROM chip is a 93c46 (1Kbit)");
4553 }
4554
c8d86be3
GKH		 4555 dev->dev_addr[0]=eprom_read(dev,MAC_ADR) & 0xff;
4556 dev->dev_addr[1]=(eprom_read(dev,MAC_ADR) & 0xff00)>>8;
4557 dev->dev_addr[2]=eprom_read(dev,MAC_ADR+1) & 0xff;
4558 dev->dev_addr[3]=(eprom_read(dev,MAC_ADR+1) & 0xff00)>>8;
4559 dev->dev_addr[4]=eprom_read(dev,MAC_ADR+2) & 0xff;
4560 dev->dev_addr[5]=(eprom_read(dev,MAC_ADR+2) & 0xff00)>>8;
4561 //DMESG("Card MAC address is "MAC_FMT, MAC_ARG(dev->dev_addr));
4562
4563
4564 for(i=1,j=0; i<14; i+=2,j++){
4565
4566 word = eprom_read(dev,EPROM_TXPW_CH1_2 + j);
4567 priv->chtxpwr[i]=word & 0xff;
4568 priv->chtxpwr[i+1]=(word & 0xff00)>>8;
4569#ifdef DEBUG_EPROM
4570 DMESG("tx word %x:%x",j,word);
4571 DMESG("ch %d pwr %x",i,priv->chtxpwr[i]);
4572 DMESG("ch %d pwr %x",i+1,priv->chtxpwr[i+1]);
4573#endif
4574 }
4575 if(priv->card_8185){
4576 for(i=1,j=0; i<14; i+=2,j++){
4577
4578 word = eprom_read(dev,EPROM_TXPW_OFDM_CH1_2 + j);
4579 priv->chtxpwr_ofdm[i]=word & 0xff;
4580 priv->chtxpwr_ofdm[i+1]=(word & 0xff00)>>8;
4581#ifdef DEBUG_EPROM
4582 DMESG("ofdm tx word %x:%x",j,word);
4583 DMESG("ofdm ch %d pwr %x",i,priv->chtxpwr_ofdm[i]);
4584 DMESG("ofdm ch %d pwr %x",i+1,priv->chtxpwr_ofdm[i+1]);
4585#endif
4586 }
4587 }
4588//{by amy 080312
4589 //3Read crystal calibtration and thermal meter indication on 87SE.
4590
4591 // By SD3 SY's request. Added by Roger, 2007.12.11.
4592
4593 tmpu16 = eprom_read(dev, EEPROM_RSV>>1);
4594
4595 //printk("ReadAdapterInfo8185(): EEPROM_RSV(%04x)\n", tmpu16);
4596
4597 // Crystal calibration for Xin and Xout resp.
4598 priv->XtalCal_Xout = tmpu16 & EEPROM_XTAL_CAL_XOUT_MASK; // 0~7.5pF
4599 priv->XtalCal_Xin = (tmpu16 & EEPROM_XTAL_CAL_XIN_MASK)>>4; // 0~7.5pF
4600 if((tmpu16 & EEPROM_XTAL_CAL_ENABLE)>>12)
4601 priv->bXtalCalibration = true;
4602
4603 // Thermal meter reference indication.
4604 priv->ThermalMeter = (u8)((tmpu16 & EEPROM_THERMAL_METER_MASK)>>8);
4605 if((tmpu16 & EEPROM_THERMAL_METER_ENABLE)>>13)
4606 priv->bTxPowerTrack = true;
4607
4608//by amy 080312}
4609#ifdef CONFIG_RTL8185B
4610 word = eprom_read(dev,EPROM_TXPW_BASE);
4611 priv->cck_txpwr_base = word & 0xf;
4612 priv->ofdm_txpwr_base = (word>>4) & 0xf;
4613#endif
4614
4615 version = eprom_read(dev,EPROM_VERSION);
4616 DMESG("EEPROM version %x",version);
4617 if( (!priv->card_8185) && version < 0x0101){
4618 DMESG ("EEPROM version too old, assuming defaults");
4619 DMESG ("If you see this message *plase* send your \
4620DMESG output to andreamrl@tiscali.it THANKS");
4621 priv->digphy=1;
4622 priv->antb=0;
4623 priv->diversity=1;
4624 priv->cs_treshold=0xc;
4625 priv->rcr_csense=1;
4626 priv->rf_chip=RFCHIPID_PHILIPS;
4627 }else{
4628 if(!priv->card_8185){
4629 u8 rfparam = eprom_read(dev,RF_PARAM);
4630 DMESG("RfParam: %x",rfparam);
4631
4632 priv->digphy = rfparam & (1<<RF_PARAM_DIGPHY_SHIFT) ? 0:1;
4633 priv->antb = rfparam & (1<<RF_PARAM_ANTBDEFAULT_SHIFT) ? 1:0;
4634
4635 priv->rcr_csense = (rfparam & RF_PARAM_CARRIERSENSE_MASK) >>
4636 RF_PARAM_CARRIERSENSE_SHIFT;
4637
4638 priv->diversity =
4639 (read_nic_byte(dev,CONFIG2)&(1<<CONFIG2_ANTENNA_SHIFT)) ? 1:0;
4640 }else{
4641 priv->rcr_csense = 3;
4642 }
4643
4644 priv->cs_treshold = (eprom_read(dev,ENERGY_TRESHOLD)&0xff00) >>8;
4645
4646 priv->rf_chip = 0xff & eprom_read(dev,RFCHIPID);
4647 }
4648
4649#ifdef CONFIG_RTL8185B
4650#ifdef CONFIG_RTL818X_S
4651 priv->rf_chip = RF_ZEBRA4;
4652 priv->rf_sleep = rtl8225z4_rf_sleep;
4653 priv->rf_wakeup = rtl8225z4_rf_wakeup;
4654#else
4655 priv->rf_chip = RF_ZEBRA2;
4656#endif
4657 //DMESG("Card reports RF frontend Realtek 8225z2");
4658 //DMESGW("This driver has EXPERIMENTAL support for this chipset.");
4659 //DMESGW("use it with care and at your own risk and");
4660 DMESGW("**PLEASE** REPORT SUCCESSFUL/UNSUCCESSFUL TO Realtek!");
4661
4662 priv->rf_close = rtl8225z2_rf_close;
4663 priv->rf_init = rtl8225z2_rf_init;
4664 priv->rf_set_chan = rtl8225z2_rf_set_chan;
4665 priv->rf_set_sens = NULL;
4666 //priv->rf_sleep = rtl8225_rf_sleep;
4667 //priv->rf_wakeup = rtl8225_rf_wakeup;
4668
4669#else
4670 /* check RF frontend chipset */
4671 switch (priv->rf_chip) {
4672
4673 case RFCHIPID_RTL8225:
4674
4675 if(priv->card_8185){
4676 DMESG("Card reports RF frontend Realtek 8225");
4677 DMESGW("This driver has EXPERIMENTAL support for this chipset.");
4678 DMESGW("use it with care and at your own risk and");
4679 DMESGW("**PLEASE** REPORT SUCCESS/INSUCCESS TO andreamrl@tiscali.it");
4680
4681 priv->rf_close = rtl8225_rf_close;
4682 priv->rf_init = rtl8225_rf_init;
4683 priv->rf_set_chan = rtl8225_rf_set_chan;
4684 priv->rf_set_sens = NULL;
4685 priv->rf_sleep = rtl8225_rf_sleep;
4686 priv->rf_wakeup = rtl8225_rf_wakeup;
4687
4688 }else{
4689 DMESGW("Detected RTL8225 radio on a card recognized as RTL8180");
4690 DMESGW("This could not be... something went wrong....");
4691 return -ENODEV;
4692 }
4693 break;
4694
4695 case RFCHIPID_RTL8255:
4696 if(priv->card_8185){
4697 DMESG("Card reports RF frontend Realtek 8255");
4698 DMESGW("This driver has EXPERIMENTAL support for this chipset.");
4699 DMESGW("use it with care and at your own risk and");
4700 DMESGW("**PLEASE** REPORT SUCCESS/INSUCCESS TO andreamrl@tiscali.it");
4701
4702 priv->rf_close = rtl8255_rf_close;
4703 priv->rf_init = rtl8255_rf_init;
4704 priv->rf_set_chan = rtl8255_rf_set_chan;
4705 priv->rf_set_sens = NULL;
4706 priv->rf_sleep = NULL;
4707 priv->rf_wakeup = NULL;
4708
4709 }else{
4710 DMESGW("Detected RTL8255 radio on a card recognized as RTL8180");
4711 DMESGW("This could not be... something went wrong....");
4712 return -ENODEV;
4713 }
4714 break;
4715
4716
4717 case RFCHIPID_INTERSIL:
4718 DMESGW("Card reports RF frontend by Intersil.");
4719 DMESGW("This driver has NO support for this chipset.");
4720 return -ENODEV;
4721 break;
4722
4723 case RFCHIPID_RFMD:
4724 DMESGW("Card reports RF frontend by RFMD.");
4725 DMESGW("This driver has NO support for this chipset.");
4726 return -ENODEV;
4727 break;
4728
4729 case RFCHIPID_GCT:
4730 DMESGW("Card reports RF frontend by GCT.");
4731 DMESGW("This driver has EXPERIMENTAL support for this chipset.");
4732 DMESGW("use it with care and at your own risk and");
4733 DMESGW("**PLEASE** REPORT SUCCESS/INSUCCESS TO andreamrl@tiscali.it");
4734 priv->rf_close = gct_rf_close;
4735 priv->rf_init = gct_rf_init;
4736 priv->rf_set_chan = gct_rf_set_chan;
4737 priv->rf_set_sens = NULL;
4738 priv->rf_sleep = NULL;
4739 priv->rf_wakeup = NULL;
4740 break;
4741
4742 case RFCHIPID_MAXIM:
4743 DMESGW("Card reports RF frontend by MAXIM.");
4744 DMESGW("This driver has EXPERIMENTAL support for this chipset.");
4745 DMESGW("use it with care and at your own risk and");
4746 DMESGW("**PLEASE** REPORT SUCCESS/INSUCCESS TO andreamrl@tiscali.it");
4747 priv->rf_close = maxim_rf_close;
4748 priv->rf_init = maxim_rf_init;
4749 priv->rf_set_chan = maxim_rf_set_chan;
4750 priv->rf_set_sens = NULL;
4751 priv->rf_sleep = NULL;
4752 priv->rf_wakeup = NULL;
4753 break;
4754
4755 case RFCHIPID_PHILIPS:
4756 DMESG("Card reports RF frontend by Philips.");
4757 DMESG("OK! Philips SA2400 radio chipset is supported.");
4758 priv->rf_close = sa2400_rf_close;
4759 priv->rf_init = sa2400_rf_init;
4760 priv->rf_set_chan = sa2400_rf_set_chan;
4761 priv->rf_set_sens = sa2400_rf_set_sens;
4762 priv->sens = SA2400_RF_DEF_SENS; /* default sensitivity */
4763 priv->max_sens = SA2400_RF_MAX_SENS; /* maximum sensitivity */
4764 priv->rf_sleep = NULL;
4765 priv->rf_wakeup = NULL;
4766
4767 if(priv->digphy){
4768 DMESGW("Digital PHY found");
4769 DMESGW("Philips DIGITAL PHY is untested! *Please*\
4770 report success/failure to <andreamrl@tiscali.it>");
4771 }else{
4772 DMESG ("Analog PHY found");
4773 }
4774
4775 break;
4776
4777 default:
4778 DMESGW("Unknown RF module %x",priv->rf_chip);
4779 DMESGW("Exiting...");
4780 return -1;
4781
4782 }
4783#endif
4784
4785
4786 if(!priv->card_8185){
4787 if(priv->antb)
4788 DMESG ("Antenna B is default antenna");
4789 else
4790 DMESG ("Antenna A is default antenna");
4791
4792 if(priv->diversity)
4793 DMESG ("Antenna diversity is enabled");
4794 else
4795 DMESG("Antenna diversity is disabled");
4796
4797 DMESG("Carrier sense %d",priv->rcr_csense);
4798 }
4799
4800 if (0!=alloc_rx_desc_ring(dev, priv->rxbuffersize, priv->rxringcount))
4801 return -ENOMEM;
4802
4803 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4804 TX_MANAGEPRIORITY_RING_ADDR))
4805 return -ENOMEM;
4806
4807 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4808 TX_BKPRIORITY_RING_ADDR))
4809 return -ENOMEM;
4810
4811 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4812 TX_BEPRIORITY_RING_ADDR))
4813 return -ENOMEM;
4814
4815 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4816 TX_VIPRIORITY_RING_ADDR))
4817 return -ENOMEM;
4818
4819 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4820 TX_VOPRIORITY_RING_ADDR))
4821 return -ENOMEM;
4822
4823 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4824 TX_HIGHPRIORITY_RING_ADDR))
4825 return -ENOMEM;
4826
4827 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txbeaconcount,
4828 TX_BEACON_RING_ADDR))
4829 return -ENOMEM;
4830
4831
4832 //priv->beacon_buf=NULL;
4833
4834 if(!priv->card_8185){
4835
4836 if(read_nic_byte(dev, CONFIG0) & (1<<CONFIG0_WEP40_SHIFT))
4837 DMESG ("40-bit WEP is supported in hardware");
4838 else
4839 DMESG ("40-bit WEP is NOT supported in hardware");
4840
4841 if(read_nic_byte(dev,CONFIG0) & (1<<CONFIG0_WEP104_SHIFT))
4842 DMESG ("104-bit WEP is supported in hardware");
4843 else
4844 DMESG ("104-bit WEP is NOT supported in hardware");
4845 }
4846#if !defined(SA_SHIRQ)
4847 if(request_irq(dev->irq, (void *)rtl8180_interrupt, IRQF_SHARED, dev->name, dev)){
4848#else
4849 if(request_irq(dev->irq, (void *)rtl8180_interrupt, SA_SHIRQ, dev->name, dev)){
4850#endif
4851 DMESGE("Error allocating IRQ %d",dev->irq);
4852 return -1;
4853 }else{
4854 priv->irq=dev->irq;
4855 DMESG("IRQ %d",dev->irq);
4856 }
4857
4858#ifdef DEBUG_EPROM
4859 dump_eprom(dev);
4860#endif
4861
4862 return 0;
4863
4864}
4865
4866
4867void rtl8180_no_hw_wep(struct net_device *dev)
4868{
4869 struct r8180_priv *priv = ieee80211_priv(dev);
4870
4871 if(!priv->card_8185)
4872 {
4873 u8 security;
4874
4875 security = read_nic_byte(dev, SECURITY);
4876 security &=~(1<<SECURITY_WEP_TX_ENABLE_SHIFT);
4877 security &=~(1<<SECURITY_WEP_RX_ENABLE_SHIFT);
4878
4879 write_nic_byte(dev, SECURITY, security);
4880
4881 }else{
4882
4883 //FIXME!!!
4884 }
4885 /*
4886 write_nic_dword(dev,TX_CONF,read_nic_dword(dev,TX_CONF) |
4887 (1<<TX_NOICV_SHIFT) );
4888 */
4889// priv->ieee80211->hw_wep=0;
4890}
4891
4892
4893void rtl8180_set_hw_wep(struct net_device *dev)
4894{
4895 struct r8180_priv *priv = ieee80211_priv(dev);
4896 u8 pgreg;
4897 u8 security;
4898 u32 key0_word4;
4899
4900 pgreg=read_nic_byte(dev, PGSELECT);
4901 write_nic_byte(dev, PGSELECT, pgreg &~ (1<<PGSELECT_PG_SHIFT));
4902
4903 key0_word4 = read_nic_dword(dev, KEY0+4+4+4);
4904 key0_word4 &= ~ 0xff;
4905 key0_word4 |= priv->key0[3]& 0xff;
4906 write_nic_dword(dev,KEY0,(priv->key0[0]));
4907 write_nic_dword(dev,KEY0+4,(priv->key0[1]));
4908 write_nic_dword(dev,KEY0+4+4,(priv->key0[2]));
4909 write_nic_dword(dev,KEY0+4+4+4,(key0_word4));
4910
4911 /*
4912 TX_CONF,read_nic_dword(dev,TX_CONF) &~(1<<TX_NOICV_SHIFT));
4913 */
4914
4915 security = read_nic_byte(dev,SECURITY);
4916 security |= (1<<SECURITY_WEP_TX_ENABLE_SHIFT);
4917 security |= (1<<SECURITY_WEP_RX_ENABLE_SHIFT);
4918 security &= ~ SECURITY_ENCRYP_MASK;
4919 security |= (SECURITY_ENCRYP_104<<SECURITY_ENCRYP_SHIFT);
4920
4921 write_nic_byte(dev, SECURITY, security);
4922
4923 DMESG("key %x %x %x %x",read_nic_dword(dev,KEY0+4+4+4),
4924 read_nic_dword(dev,KEY0+4+4),read_nic_dword(dev,KEY0+4),
4925 read_nic_dword(dev,KEY0));
4926
4927 //priv->ieee80211->hw_wep=1;
4928}
4929
4930
4931void rtl8185_rf_pins_enable(struct net_device *dev)
4932{
4933// u16 tmp;
4934// tmp = read_nic_word(dev, RFPinsEnable);
4935 write_nic_word(dev, RFPinsEnable, 0x1fff);// | tmp);
4936// write_nic_word(dev, RFPinsEnable,7 | tmp);
4937}
4938
4939
4940void rtl8185_set_anaparam2(struct net_device *dev, u32 a)
4941{
4942 u8 conf3;
4943
4944 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
4945
4946 conf3 = read_nic_byte(dev, CONFIG3);
4947 write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
4948 write_nic_dword(dev, ANAPARAM2, a);
4949
4950 conf3 = read_nic_byte(dev, CONFIG3);
4951 write_nic_byte(dev, CONFIG3, conf3 &~(1<<CONFIG3_ANAPARAM_W_SHIFT));
4952 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
4953
4954}
4955
4956
4957void rtl8180_set_anaparam(struct net_device *dev, u32 a)
4958{
4959 u8 conf3;
4960
4961 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
4962
4963 conf3 = read_nic_byte(dev, CONFIG3);
4964 write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
4965 write_nic_dword(dev, ANAPARAM, a);
4966
4967 conf3 = read_nic_byte(dev, CONFIG3);
4968 write_nic_byte(dev, CONFIG3, conf3 &~(1<<CONFIG3_ANAPARAM_W_SHIFT));
4969 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
4970}
4971
4972
4973void rtl8185_tx_antenna(struct net_device *dev, u8 ant)
4974{
4975 write_nic_byte(dev, TX_ANTENNA, ant);
4976 force_pci_posting(dev);
4977 mdelay(1);
4978}
4979
4980
4981void rtl8185_write_phy(struct net_device *dev, u8 adr, u32 data)
4982{
4983 //u8 phyr;
4984 u32 phyw;
4985 //int i;
4986
4987 adr |= 0x80;
4988
4989 phyw= ((data<<8) | adr);
4990#if 0
4991
4992 write_nic_dword(dev, PHY_ADR, phyw);
4993
4994 //read_nic_dword(dev, PHY_ADR);
4995 for(i=0;i<10;i++){
4996 write_nic_dword(dev, PHY_ADR, 0xffffff7f & phyw);
4997 phyr = read_nic_byte(dev, PHY_READ);
4998 if(phyr == (data&0xff)) break;
4999
5000 }
5001#else
5002 // Note that, we must write 0xff7c after 0x7d-0x7f to write BB register.
5003 write_nic_byte(dev, 0x7f, ((phyw & 0xff000000) >> 24));
5004 write_nic_byte(dev, 0x7e, ((phyw & 0x00ff0000) >> 16));
5005 write_nic_byte(dev, 0x7d, ((phyw & 0x0000ff00) >> 8));
5006 write_nic_byte(dev, 0x7c, ((phyw & 0x000000ff) ));
5007#endif
5008 /* this is ok to fail when we write AGC table. check for AGC table might be
5009 * done by masking with 0x7f instead of 0xff
5010 */
5011 //if(phyr != (data&0xff)) DMESGW("Phy write timeout %x %x %x", phyr, data,adr);
5012}
5013
5014
5015inline void write_phy_ofdm (struct net_device *dev, u8 adr, u32 data)
5016{
5017 data = data & 0xff;
5018 rtl8185_write_phy(dev, adr, data);
5019}
5020
5021
5022void write_phy_cck (struct net_device *dev, u8 adr, u32 data)
5023{
5024 data = data & 0xff;
5025 rtl8185_write_phy(dev, adr, data | 0x10000);
5026}
5027
5028
5029/* 70*3 = 210 ms
5030 * I hope this is enougth
5031 */
5032#define MAX_PHY 70
5033void write_phy(struct net_device *dev, u8 adr, u8 data)
5034{
5035 u32 phy;
5036 int i;
5037
5038 phy = 0xff0000;
5039 phy |= adr;
5040 phy |= 0x80; /* this should enable writing */
5041 phy |= (data<<8);
5042
5043 //PHY_ADR, PHY_R and PHY_W are contig and treated as one dword
5044 write_nic_dword(dev,PHY_ADR, phy);
5045
5046 phy= 0xffff00;
5047 phy |= adr;
5048
5049 write_nic_dword(dev,PHY_ADR, phy);
5050 for(i=0;i<MAX_PHY;i++){
5051 phy=read_nic_dword(dev,PHY_ADR);
5052 phy= phy & 0xff0000;
5053 phy= phy >> 16;
5054 if(phy == data){ //SUCCESS!
5055 force_pci_posting(dev);
5056 mdelay(3); //random value
5057#ifdef DEBUG_BB
5058 DMESG("Phy wr %x,%x",adr,data);
5059#endif
5060 return;
5061 }else{
5062 force_pci_posting(dev);
5063 mdelay(3); //random value
5064 }
5065 }
5066 DMESGW ("Phy writing %x %x failed!", adr,data);
5067}
5068
5069void rtl8185_set_rate(struct net_device *dev)
5070{
5071 int i;
5072 u16 word;
5073 int basic_rate,min_rr_rate,max_rr_rate;
5074
5075// struct r8180_priv *priv = ieee80211_priv(dev);
5076
5077 //if (ieee80211_is_54g(priv->ieee80211->current_network) &&
5078// priv->ieee80211->state == IEEE80211_LINKED){
5079 basic_rate = ieeerate2rtlrate(240);
5080 min_rr_rate = ieeerate2rtlrate(60);
5081 max_rr_rate = ieeerate2rtlrate(240);
5082
5083//
5084// }else{
5085// basic_rate = ieeerate2rtlrate(20);
5086// min_rr_rate = ieeerate2rtlrate(10);
5087// max_rr_rate = ieeerate2rtlrate(110);
5088// }
5089
5090 write_nic_byte(dev, RESP_RATE,
5091 max_rr_rate<<MAX_RESP_RATE_SHIFT| min_rr_rate<<MIN_RESP_RATE_SHIFT);
5092
5093 word = read_nic_word(dev, BRSR);
5094 word &= ~BRSR_MBR_8185;
5095
5096
5097 for(i=0;i<=basic_rate;i++)
5098 word |= (1<<i);
5099
5100 write_nic_word(dev, BRSR, word);
5101 //DMESG("RR:%x BRSR: %x", read_nic_byte(dev,RESP_RATE),read_nic_word(dev,BRSR));
5102}
5103
5104
5105
5106void rtl8180_adapter_start(struct net_device *dev)
5107{
5108 struct r8180_priv *priv = ieee80211_priv(dev);
5109 u32 anaparam;
5110 u16 word;
5111 u8 config3;
5112// int i;
5113
5114 rtl8180_rtx_disable(dev);
5115 rtl8180_reset(dev);
5116
5117 /* seems that 0xffff or 0xafff will cause
5118 * HW interrupt line crash
5119 */
5120
5121 //priv->irq_mask = 0xafff;
5122// priv->irq_mask = 0x4fcf;
5123
5124 /* enable beacon timeout, beacon TX ok and err
5125 * LP tx ok and err, HP TX ok and err, NP TX ok and err,
5126 * RX ok and ERR, and GP timer */
5127 priv->irq_mask = 0x6fcf;
5128
5129 priv->dma_poll_mask = 0;
5130
5131 rtl8180_beacon_tx_disable(dev);
5132
5133 if(priv->card_type == CARDBUS ){
5134 config3=read_nic_byte(dev, CONFIG3);
5135 write_nic_byte(dev,CONFIG3,config3 | CONFIG3_FuncRegEn);
5136 write_nic_word(dev,FEMR, FEMR_INTR | FEMR_WKUP | FEMR_GWAKE |
5137 read_nic_word(dev, FEMR));
5138 }
5139 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
5140 write_nic_dword(dev, MAC0, ((u32*)dev->dev_addr)[0]);
5141 write_nic_word(dev, MAC4, ((u32*)dev->dev_addr)[1] & 0xffff );
5142 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
5143
5144 rtl8180_update_msr(dev);
5145
5146 if(!priv->card_8185){
5147 anaparam = eprom_read(dev,EPROM_ANAPARAM_ADDRLWORD);
5148 anaparam |= eprom_read(dev,EPROM_ANAPARAM_ADDRHWORD)<<16;
5149
5150 rtl8180_set_anaparam(dev,anaparam);
5151 }
5152 /* These might be unnecessary since we do in rx_enable / tx_enable */
5153 fix_rx_fifo(dev);
5154 fix_tx_fifo(dev);
5155 /*set_nic_rxring(dev);
5156 set_nic_txring(dev);*/
5157
5158 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
5159
5160 /*
5161 The following is very strange. seems to be that 1 means test mode,
5162 but we need to acknolwledges the nic when a packet is ready
5163 altought we set it to 0
5164 */
5165
5166 write_nic_byte(dev,
5167 CONFIG2, read_nic_byte(dev,CONFIG2) &~\
5168 (1<<CONFIG2_DMA_POLLING_MODE_SHIFT));
5169 //^the nic isn't in test mode
5170 if(priv->card_8185)
5171 write_nic_byte(dev,
5172 CONFIG2, read_nic_byte(dev,CONFIG2)|(1<<4));
5173
5174 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
5175
5176 write_nic_dword(dev,INT_TIMEOUT,0);
5177#ifdef DEBUG_REGISTERS
5178 rtl8180_dump_reg(dev);
5179#endif
5180
5181 if(!priv->card_8185)
5182 {
5183 /*
5184 experimental - this might be needed to calibrate AGC,
5185 anyway it shouldn't hurt
5186 */
5187 write_nic_byte(dev, CONFIG5,
5188 read_nic_byte(dev, CONFIG5) | (1<<AGCRESET_SHIFT));
5189 read_nic_byte(dev, CONFIG5);
5190 udelay(15);
5191 write_nic_byte(dev, CONFIG5,
5192 read_nic_byte(dev, CONFIG5) &~ (1<<AGCRESET_SHIFT));
5193 }else{
5194
5195 write_nic_byte(dev, WPA_CONFIG, 0);
5196 //write_nic_byte(dev, TESTR, 0xd);
5197 }
5198
5199 rtl8180_no_hw_wep(dev);
5200
5201 if(priv->card_8185){
5202 rtl8185_set_rate(dev);
5203 write_nic_byte(dev, RATE_FALLBACK, 0x81);
5204 // write_nic_byte(dev, 0xdf, 0x15);
5205 }else{
5206 word = read_nic_word(dev, BRSR);
5207 word &= ~BRSR_MBR;
5208 word &= ~BRSR_BPLCP;
5209 word |= ieeerate2rtlrate(priv->ieee80211->basic_rate);
5210//by amy
5211 word |= 0x0f;
5212//by amy
5213 write_nic_word(dev, BRSR, word);
5214 }
5215
5216
5217 if(priv->card_8185){
5218 write_nic_byte(dev, GP_ENABLE,read_nic_byte(dev, GP_ENABLE) & ~(1<<6));
5219
5220 //FIXME cfg 3 ClkRun enable - isn't it ReadOnly ?
5221 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
5222 write_nic_byte(dev,CONFIG3, read_nic_byte(dev, CONFIG3)
5223|(1<<CONFIG3_CLKRUN_SHIFT));
5224 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
5225
5226 }
5227
5228 priv->rf_init(dev);
5229
5230 if(priv->rf_set_sens != NULL)
5231 priv->rf_set_sens(dev,priv->sens);
5232 rtl8180_irq_enable(dev);
5233
5234 netif_start_queue(dev);
5235 /*DMESG ("lfree %d",get_curr_tx_free_desc(dev,LOW_PRIORITY));
5236
5237 DMESG ("nfree %d",get_curr_tx_free_desc(dev,NORM_PRIORITY));
5238
5239 DMESG ("hfree %d",get_curr_tx_free_desc(dev,HI_PRIORITY));
5240 if(check_nic_enought_desc(dev,NORM_PRIORITY)) DMESG("NORM OK");
5241 if(check_nic_enought_desc(dev,HI_PRIORITY)) DMESG("HI OK");
5242 if(check_nic_enought_desc(dev,LOW_PRIORITY)) DMESG("LOW OK");*/
5243}
5244
5245
5246
5247/* this configures registers for beacon tx and enables it via
5248 * rtl8180_beacon_tx_enable(). rtl8180_beacon_tx_disable() might
5249 * be used to stop beacon transmission
5250 */
5251void rtl8180_start_tx_beacon(struct net_device *dev)
5252{
5253// struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
5254 u16 word;
5255// DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
5256
5257 DMESG("Enabling beacon TX");
5258 //write_nic_byte(dev, 0x42,0xe6);// TCR
5259// set_nic_txring(dev);
5260// fix_tx_fifo(dev);
5261 rtl8180_prepare_beacon(dev);
5262 rtl8180_irq_disable(dev);
5263 rtl8180_beacon_tx_enable(dev);
5264#if 0
5265 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
5266 //write_nic_byte(dev,0x9d,0x20); //DMA Poll
5267 //write_nic_word(dev,0x7a,0);
5268 //write_nic_word(dev,0x7a,0x8000);
5269
5270#if 0
5271 word = read_nic_word(dev, BcnItv);
5272 word &= ~BcnItv_BcnItv; // clear Bcn_Itv
5273 word |= priv->ieee80211->current_network.beacon_interval;//0x64;
5274 write_nic_word(dev, BcnItv, word);
5275#endif
5276#endif
5277 word = read_nic_word(dev, AtimWnd) &~ AtimWnd_AtimWnd;
5278 write_nic_word(dev, AtimWnd,word);// word |=
5279//priv->ieee80211->current_network.atim_window);
5280
5281 word = read_nic_word(dev, BintrItv);
5282 word &= ~BintrItv_BintrItv;
5283 word |= 1000;/*priv->ieee80211->current_network.beacon_interval *
5284 ((priv->txbeaconcount > 1)?(priv->txbeaconcount-1):1);
5285 // FIXME: check if correct ^^ worked with 0x3e8;
5286 */
5287 write_nic_word(dev, BintrItv, word);
5288
5289
5290 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
5291
5292// rtl8180_beacon_tx_enable(dev);
5293#ifdef CONFIG_RTL8185B
5294 rtl8185b_irq_enable(dev);
5295#else
5296 rtl8180_irq_enable(dev);
5297#endif
5298 /* VV !!!!!!!!!! VV*/
5299 /*
5300 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
5301 write_nic_byte(dev,0x9d,0x00);
5302 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
5303*/
5304// DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
5305
5306}
5307
5308
5309
5310/***************************************************************************
5311 -------------------------------NET STUFF---------------------------
5312***************************************************************************/
5313static struct net_device_stats *rtl8180_stats(struct net_device *dev)
5314{
5315 struct r8180_priv *priv = ieee80211_priv(dev);
5316
5317 return &priv->ieee80211->stats;
5318}
5319//
5320// Change current and default preamble mode.
5321// 2005.01.06, by rcnjko.
5322//
5323bool
5324MgntActSet_802_11_PowerSaveMode(
5325 struct r8180_priv *priv,
5326 RT_PS_MODE rtPsMode
5327)
5328{
5329
5330 // Currently, we do not change power save mode on IBSS mode.
5331 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5332 {
5333 return false;
5334 }
5335
5336 //
5337 // <RJ_NOTE> If we make HW to fill up the PwrMgt bit for us,
5338 // some AP will not response to our mgnt frames with PwrMgt bit set,
5339 // e.g. cannot associate the AP.
5340 // So I commented out it. 2005.02.16, by rcnjko.
5341 //
5342// // Change device's power save mode.
5343// Adapter->HalFunc.SetPSModeHandler( Adapter, rtPsMode );
5344
5345 // Update power save mode configured.
5346// priv->dot11PowerSaveMode = rtPsMode;
5347 priv->ieee80211->ps = rtPsMode;
5348 // Determine ListenInterval.
5349#if 0
5350 if(priv->dot11PowerSaveMode == eMaxPs)
5351 {
5352 priv->ieee80211->ListenInterval = 10;
5353 }
5354 else
5355 {
5356 priv->ieee80211->ListenInterval = 2;
5357 }
5358#endif
5359 return true;
5360}
5361
5362//================================================================================
5363// Leisure Power Save in linked state.
5364//================================================================================
5365
5366//
5367// Description:
5368// Enter the leisure power save mode.
5369//
5370void
5371LeisurePSEnter(
5372 struct r8180_priv *priv
5373 )
5374{
5375 if (priv->bLeisurePs)
5376 {
5377 if (priv->ieee80211->ps == IEEE80211_PS_DISABLED)
5378 {
5379 //printk("----Enter PS\n");
5380 MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_MBCAST|IEEE80211_PS_UNICAST);//IEEE80211_PS_ENABLE
5381 }
5382 }
5383}
5384
5385
5386//
5387// Description:
5388// Leave the leisure power save mode.
5389//
5390void
5391LeisurePSLeave(
5392 struct r8180_priv *priv
5393 )
5394{
5395 if (priv->bLeisurePs)
5396 {
5397 if (priv->ieee80211->ps != IEEE80211_PS_DISABLED)
5398 {
5399 //printk("----Leave PS\n");
5400 MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_DISABLED);
5401 }
5402 }
5403}
5404#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
5405void rtl8180_hw_wakeup_wq (struct work_struct *work)
5406{
5407// struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
5408// struct ieee80211_device * ieee = (struct ieee80211_device*)
5409// container_of(work, struct ieee80211_device, watch_dog_wq);
bf6aede7 5410 struct delayed_work *dwork = to_delayed_work(work);
c8d86be3
GKH		 5411 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_wakeup_wq);
5412 struct net_device *dev = ieee->dev;
5413#else
5414void rtl8180_hw_wakeup_wq(struct net_device *dev)
5415{
5416 struct r8180_priv *priv = ieee80211_priv(dev);
5417#endif
5418
5419// printk("dev is %d\n",dev);
d599edca 5420// printk("&*&(^*(&(&=========>%s()\n", __func__);
c8d86be3
GKH		 5421 rtl8180_hw_wakeup(dev);
5422
5423}
5424
5425#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
5426void rtl8180_hw_sleep_wq (struct work_struct *work)
5427{
5428// struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
5429// struct ieee80211_device * ieee = (struct ieee80211_device*)
5430// container_of(work, struct ieee80211_device, watch_dog_wq);
bf6aede7 5431 struct delayed_work *dwork = to_delayed_work(work);
c8d86be3
GKH		 5432 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_sleep_wq);
5433 struct net_device *dev = ieee->dev;
5434#else
5435void rtl8180_hw_sleep_wq(struct net_device *dev)
5436{
5437 struct r8180_priv *priv = ieee80211_priv(dev);
5438#endif
5439
5440 rtl8180_hw_sleep_down(dev);
5441}
5442
5443//YJ,add,080828,for KeepAlive
5444static void MgntLinkKeepAlive(struct r8180_priv *priv )
5445{
5446 if (priv->keepAliveLevel == 0)
5447 return;
5448
5449 if(priv->ieee80211->state == IEEE80211_LINKED)
5450 {
5451 //
5452 // Keep-Alive.
5453 //
5454 //printk("LastTx:%d Tx:%d LastRx:%d Rx:%ld Idle:%d\n",priv->link_detect.LastNumTxUnicast,priv->NumTxUnicast, priv->link_detect.LastNumRxUnicast, priv->ieee80211->NumRxUnicast, priv->link_detect.IdleCount);
5455
5456 if ( (priv->keepAliveLevel== 2) ||
5457 (priv->link_detect.LastNumTxUnicast == priv->NumTxUnicast &&
5458 priv->link_detect.LastNumRxUnicast == priv->ieee80211->NumRxUnicast )
5459 )
5460 {
5461 priv->link_detect.IdleCount++;
5462
5463 //
5464 // Send a Keep-Alive packet packet to AP if we had been idle for a while.
5465 //
5466 if(priv->link_detect.IdleCount >= ((KEEP_ALIVE_INTERVAL / CHECK_FOR_HANG_PERIOD)-1) )
5467 {
5468 priv->link_detect.IdleCount = 0;
5469 ieee80211_sta_ps_send_null_frame(priv->ieee80211, false);
5470 }
5471 }
5472 else
5473 {
5474 priv->link_detect.IdleCount = 0;
5475 }
5476 priv->link_detect.LastNumTxUnicast = priv->NumTxUnicast;
5477 priv->link_detect.LastNumRxUnicast = priv->ieee80211->NumRxUnicast;
5478 }
5479}
5480//YJ,add,080828,for KeepAlive,end
5481
5482static u8 read_acadapter_file(char *filename);
5483void rtl8180_watch_dog(struct net_device *dev)
5484{
5485 struct r8180_priv *priv = ieee80211_priv(dev);
5486 bool bEnterPS = false;
5487 bool bBusyTraffic = false;
5488 u32 TotalRxNum = 0;
5489 u16 SlotIndex = 0;
5490 u16 i = 0;
5491#ifdef ENABLE_IPS
5492 if(priv->ieee80211->actscanning == false){
5493 if((priv->ieee80211->iw_mode != IW_MODE_ADHOC) && (priv->ieee80211->state == IEEE80211_NOLINK) && (priv->ieee80211->beinretry == false) && (priv->eRFPowerState == eRfOn)){
5494 IPSEnter(dev);
5495 }
5496 }
5497#endif
5498 //YJ,add,080828,for link state check
5499 if((priv->ieee80211->state == IEEE80211_LINKED) && (priv->ieee80211->iw_mode == IW_MODE_INFRA)){
5500 SlotIndex = (priv->link_detect.SlotIndex++) % priv->link_detect.SlotNum;
5501 priv->link_detect.RxFrameNum[SlotIndex] = priv->ieee80211->NumRxDataInPeriod + priv->ieee80211->NumRxBcnInPeriod;
5502 for( i=0; i<priv->link_detect.SlotNum; i++ )
5503 TotalRxNum+= priv->link_detect.RxFrameNum[i];
5504 //printk("&&&&&=== TotalRxNum = %d\n", TotalRxNum);
5505 if(TotalRxNum == 0){
5506 priv->ieee80211->state = IEEE80211_ASSOCIATING;
5507 queue_work(priv->ieee80211->wq, &priv->ieee80211->associate_procedure_wq);
5508 }
5509 }
5510
5511 //YJ,add,080828,for KeepAlive
5512 MgntLinkKeepAlive(priv);
5513
5514 //YJ,add,080828,for LPS
5515#ifdef ENABLE_LPS
5516 if(priv->PowerProfile == POWER_PROFILE_BATTERY )
5517 {
5518 //Turn on LeisurePS on battery power
5519 //printk("!!!!!On battery power\n");
5520 priv->bLeisurePs = true;
5521 }
5522 else if(priv->PowerProfile == POWER_PROFILE_AC )
5523 {
5524 // Turn off LeisurePS on AC power
5525 //printk("----On AC power\n");
5526 LeisurePSLeave(priv);
5527 priv->bLeisurePs= false;
5528 }
5529#endif
5530
5531#if 0
5532#ifndef ENABLE_LPS
5533 if(priv->ieee80211->state == IEEE80211_LINKED){
5534 if( priv->NumRxOkInPeriod> 666 ||
5535 priv->NumTxOkInPeriod > 666 ) {
5536 bBusyTraffic = true;
5537 }
5538 if((priv->ieee80211->NumRxData + priv->NumTxOkInPeriod)<8) {
5539 bEnterPS= true;
5540 }
5541 if(bEnterPS) {
5542 LeisurePSEnter(priv);
5543 }
5544 else {
5545 LeisurePSLeave(priv);
5546 }
5547 }
5548 else {
5549 LeisurePSLeave(priv);
5550 }
5551#endif
5552 priv->NumRxOkInPeriod = 0;
5553 priv->NumTxOkInPeriod = 0;
5554 priv->ieee80211->NumRxData = 0;
5555#else
5556#ifdef ENABLE_LPS
5557 if(priv->ieee80211->state == IEEE80211_LINKED){
5558 priv->link_detect.NumRxOkInPeriod = priv->ieee80211->NumRxDataInPeriod;
5559 //printk("TxOk=%d RxOk=%d\n", priv->link_detect.NumTxOkInPeriod, priv->link_detect.NumRxOkInPeriod);
5560 if( priv->link_detect.NumRxOkInPeriod> 666 ||
5561 priv->link_detect.NumTxOkInPeriod> 666 ) {
5562 bBusyTraffic = true;
5563 }
5564 if(((priv->link_detect.NumRxOkInPeriod + priv->link_detect.NumTxOkInPeriod) > 8)
5565 || (priv->link_detect.NumRxOkInPeriod > 2)) {
5566 bEnterPS= false;
5567 }
5568 else {
5569 bEnterPS= true;
5570 }
5571
5572 if(bEnterPS) {
5573 LeisurePSEnter(priv);
5574 }
5575 else {
5576 LeisurePSLeave(priv);
5577 }
5578 }
5579 else{
5580 LeisurePSLeave(priv);
5581 }
5582#endif
5583 priv->link_detect.bBusyTraffic = bBusyTraffic;
5584 priv->link_detect.NumRxOkInPeriod = 0;
5585 priv->link_detect.NumTxOkInPeriod = 0;
5586 priv->ieee80211->NumRxDataInPeriod = 0;
5587 priv->ieee80211->NumRxBcnInPeriod = 0;
5588#endif
5589}
5590int _rtl8180_up(struct net_device *dev)
5591{
5592 struct r8180_priv *priv = ieee80211_priv(dev);
5593 //int i;
5594
5595 priv->up=1;
5596
5597 DMESG("Bringing up iface");
5598#ifdef CONFIG_RTL8185B
5599 rtl8185b_adapter_start(dev);
5600 rtl8185b_rx_enable(dev);
5601 rtl8185b_tx_enable(dev);
5602#else
5603 rtl8180_adapter_start(dev);
5604 rtl8180_rx_enable(dev);
5605 rtl8180_tx_enable(dev);
5606#endif
5607#ifdef ENABLE_IPS
5608 if(priv->bInactivePs){
5609 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5610 IPSLeave(dev);
5611 }
5612#endif
5613//by amy 080312
5614#ifdef RATE_ADAPT
5615 timer_rate_adaptive((unsigned long)dev);
5616#endif
5617//by amy 080312
5618 watch_dog_adaptive((unsigned long)dev);
5619#ifdef SW_ANTE
5620 if(priv->bSwAntennaDiverity)
5621 SwAntennaDiversityTimerCallback(dev);
5622#endif
5623// IPSEnter(dev);
5624 ieee80211_softmac_start_protocol(priv->ieee80211);
5625
5626//Add for RF power on power off by lizhaoming 080512
5627// priv->eRFPowerState = eRfOn;
5628// printk("\n--------Start queue_work:GPIOChangeRFWorkItem");
5629// queue_delayed_work(priv->ieee80211->wq,&priv->ieee80211->GPIOChangeRFWorkItem,1000);
5630
5631 return 0;
5632}
5633
5634
5635int rtl8180_open(struct net_device *dev)
5636{
5637 struct r8180_priv *priv = ieee80211_priv(dev);
5638 int ret;
5639
5640 down(&priv->wx_sem);
5641 ret = rtl8180_up(dev);
5642 up(&priv->wx_sem);
5643 return ret;
5644
5645}
5646
5647
5648int rtl8180_up(struct net_device *dev)
5649{
5650 struct r8180_priv *priv = ieee80211_priv(dev);
5651
5652 if (priv->up == 1) return -1;
5653
5654 return _rtl8180_up(dev);
5655}
5656
5657
5658int rtl8180_close(struct net_device *dev)
5659{
5660 struct r8180_priv *priv = ieee80211_priv(dev);
5661 int ret;
5662
5663 down(&priv->wx_sem);
5664 ret = rtl8180_down(dev);
5665 up(&priv->wx_sem);
5666
5667 return ret;
5668
5669}
5670
5671int rtl8180_down(struct net_device *dev)
5672{
5673 struct r8180_priv *priv = ieee80211_priv(dev);
5674
5675 if (priv->up == 0) return -1;
5676
5677 priv->up=0;
5678
5679 ieee80211_softmac_stop_protocol(priv->ieee80211);
5680 /* FIXME */
5681 if (!netif_queue_stopped(dev))
5682 netif_stop_queue(dev);
5683 rtl8180_rtx_disable(dev);
5684 rtl8180_irq_disable(dev);
5685 del_timer_sync(&priv->watch_dog_timer);
5686 //cancel_delayed_work(&priv->ieee80211->watch_dog_wq);
5687//{by amy 080312
5688 del_timer_sync(&priv->rateadapter_timer);
5689 cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
5690//by amy 080312}
5691 cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
5692 cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
5693 cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
5694 cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
5695 del_timer_sync(&priv->SwAntennaDiversityTimer);
5696 SetZebraRFPowerState8185(dev,eRfOff);
5697 //ieee80211_softmac_stop_protocol(priv->ieee80211);
5698 memset(&(priv->ieee80211->current_network),0,sizeof(struct ieee80211_network));
5699 priv->ieee80211->state = IEEE80211_NOLINK;
5700 return 0;
5701}
5702
5703#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
5704void rtl8180_restart_wq(struct work_struct *work)
5705{
5706 struct r8180_priv *priv = container_of(work, struct r8180_priv, reset_wq);
5707 struct net_device *dev = priv->dev;
5708#else
5709void rtl8180_restart_wq(struct net_device *dev)
5710{
5711 struct r8180_priv *priv = ieee80211_priv(dev);
5712#endif
5713 down(&priv->wx_sem);
5714
5715 rtl8180_commit(dev);
5716
5717 up(&priv->wx_sem);
5718}
5719
5720void rtl8180_restart(struct net_device *dev)
5721{
5722 struct r8180_priv *priv = ieee80211_priv(dev);
5723 //rtl8180_commit(dev);
5724 schedule_work(&priv->reset_wq);
5725 //DMESG("TXTIMEOUT");
5726}
5727
5728
5729void rtl8180_commit(struct net_device *dev)
5730{
5731 struct r8180_priv *priv = ieee80211_priv(dev);
5732
5733 if (priv->up == 0) return ;
5734//+by amy 080312
5735 del_timer_sync(&priv->watch_dog_timer);
5736 //cancel_delayed_work(&priv->ieee80211->watch_dog_wq);
5737//{by amy 080312
5738//by amy for rate adaptive
5739 del_timer_sync(&priv->rateadapter_timer);
5740 cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
5741//by amy for rate adaptive
5742//by amy 080312}
5743 cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
5744 cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
5745 cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
5746 cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
5747 del_timer_sync(&priv->SwAntennaDiversityTimer);
5748 ieee80211_softmac_stop_protocol(priv->ieee80211);
5749 rtl8180_irq_disable(dev);
5750 rtl8180_rtx_disable(dev);
5751 _rtl8180_up(dev);
5752}
5753
5754
5755static void r8180_set_multicast(struct net_device *dev)
5756{
5757 struct r8180_priv *priv = ieee80211_priv(dev);
5758 short promisc;
5759
5760 //down(&priv->wx_sem);
5761
5762 promisc = (dev->flags & IFF_PROMISC) ? 1:0;
5763
5764 if (promisc != priv->promisc)
5765 rtl8180_restart(dev);
5766
5767 priv->promisc = promisc;
5768
5769 //up(&priv->wx_sem);
5770}
5771
5772#if 0
5773/* this is called by the kernel when it needs to TX a 802.3 encapsulated frame*/
5774int rtl8180_8023_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
5775{
5776 struct r8180_priv *priv = ieee80211_priv(dev);
5777 int ret;
5778 unsigned long flags;
5779
5780 spin_lock_irqsave(&priv->tx_lock,flags);
5781 ret = ieee80211_r8180_8023_hardstartxmit(skb,priv->ieee80211);
5782 spin_unlock_irqrestore(&priv->tx_lock,flags);
5783 return ret;
5784}
5785#endif
5786
5787int r8180_set_mac_adr(struct net_device *dev, void *mac)
5788{
5789 struct r8180_priv *priv = ieee80211_priv(dev);
5790 struct sockaddr *addr = mac;
5791
5792 down(&priv->wx_sem);
5793
5794 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
5795
5796 if(priv->ieee80211->iw_mode == IW_MODE_MASTER)
5797 memcpy(priv->ieee80211->current_network.bssid, dev->dev_addr, ETH_ALEN);
5798
5799 if (priv->up) {
5800 rtl8180_down(dev);
5801 rtl8180_up(dev);
5802 }
5803
5804 up(&priv->wx_sem);
5805
5806 return 0;
5807}
5808
5809/* based on ipw2200 driver */
5810int rtl8180_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
5811{
5812 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
5813
5814 struct iwreq *wrq = (struct iwreq *) rq;
5815 int ret=-1;
5816 switch (cmd) {
5817 case RTL_IOCTL_WPA_SUPPLICANT:
5818 ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data);
5819 return ret;
5820
5821 default:
5822 return -EOPNOTSUPP;
5823 }
5824
5825 return -EOPNOTSUPP;
5826}
5827
5828
5829
5830/****************************************************************************
5831 -----------------------------PCI STUFF---------------------------
5832*****************************************************************************/
5833
727ae303
AB		 5834static const struct net_device_ops rtl8180_netdev_ops = {
5835 .ndo_open = rtl8180_open,
5836 .ndo_stop = rtl8180_close,
5837 .ndo_get_stats = rtl8180_stats,
5838 .ndo_tx_timeout = rtl8180_restart,
5839 .ndo_do_ioctl = rtl8180_ioctl,
5840 .ndo_set_multicast_list = r8180_set_multicast,
5841 .ndo_set_mac_address = r8180_set_mac_adr,
5842 .ndo_validate_addr = eth_validate_addr,
5843 .ndo_change_mtu = eth_change_mtu,
5844 .ndo_start_xmit = ieee80211_xmit,
5845};
c8d86be3
GKH		 5846
5847static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
5848 const struct pci_device_id *id)
5849{
5850 unsigned long ioaddr = 0;
5851 struct net_device *dev = NULL;
5852 struct r8180_priv *priv= NULL;
5853 //u8 *ptr;
5854 u8 unit = 0;
5855
5856#ifdef CONFIG_RTL8180_IO_MAP
5857 unsigned long pio_start, pio_len, pio_flags;
5858#else
5859 unsigned long pmem_start, pmem_len, pmem_flags;
5860#endif //end #ifdef RTL_IO_MAP
5861
5862 DMESG("Configuring chip resources");
5863
5864 if( pci_enable_device (pdev) ){
5865 DMESG("Failed to enable PCI device");
5866 return -EIO;
5867 }
5868
5869 pci_set_master(pdev);
5870 //pci_set_wmi(pdev);
5871 pci_set_dma_mask(pdev, 0xffffff00ULL);
5872 pci_set_consistent_dma_mask(pdev,0xffffff00ULL);
5873 dev = alloc_ieee80211(sizeof(struct r8180_priv));
5874 if (!dev)
5875 return -ENOMEM;
5876 priv = ieee80211_priv(dev);
5877 priv->ieee80211 = netdev_priv(dev);
5878
5879#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
5880 SET_MODULE_OWNER(dev);
5881#endif
5882 pci_set_drvdata(pdev, dev);
5883 SET_NETDEV_DEV(dev, &pdev->dev);
5884
5885 priv = ieee80211_priv(dev);
5886// memset(priv,0,sizeof(struct r8180_priv));
5887 priv->pdev=pdev;
5888
5889
5890#ifdef CONFIG_RTL8180_IO_MAP
5891
5892 pio_start = (unsigned long)pci_resource_start (pdev, 0);
5893 pio_len = (unsigned long)pci_resource_len (pdev, 0);
5894 pio_flags = (unsigned long)pci_resource_flags (pdev, 0);
5895
5896 if (!(pio_flags & IORESOURCE_IO)) {
5897 DMESG("region #0 not a PIO resource, aborting");
5898 goto fail;
5899 }
5900
5901 //DMESG("IO space @ 0x%08lx", pio_start );
5902 if( ! request_region( pio_start, pio_len, RTL8180_MODULE_NAME ) ){
5903 DMESG("request_region failed!");
5904 goto fail;
5905 }
5906
5907 ioaddr = pio_start;
5908 dev->base_addr = ioaddr; // device I/O address
5909
5910#else
5911
5912 pmem_start = pci_resource_start(pdev, 1);
5913 pmem_len = pci_resource_len(pdev, 1);
5914 pmem_flags = pci_resource_flags (pdev, 1);
5915
5916 if (!(pmem_flags & IORESOURCE_MEM)) {
5917 DMESG("region #1 not a MMIO resource, aborting");
5918 goto fail;
5919 }
5920
5921 //DMESG("Memory mapped space @ 0x%08lx ", pmem_start);
5922 if( ! request_mem_region(pmem_start, pmem_len, RTL8180_MODULE_NAME)) {
5923 DMESG("request_mem_region failed!");
5924 goto fail;
5925 }
5926
5927
5928 ioaddr = (unsigned long)ioremap_nocache( pmem_start, pmem_len);
5929 if( ioaddr == (unsigned long)NULL ){
5930 DMESG("ioremap failed!");
5931 // release_mem_region( pmem_start, pmem_len );
5932 goto fail1;
5933 }
5934
5935 dev->mem_start = ioaddr; // shared mem start
5936 dev->mem_end = ioaddr + pci_resource_len(pdev, 0); // shared mem end
5937
5938#endif //end #ifdef RTL_IO_MAP
5939
5940#ifdef CONFIG_RTL8185B
5941 //pci_read_config_byte(pdev, 0x05, ptr);
5942 //pci_write_config_byte(pdev, 0x05, (*ptr) & (~0x04));
5943 pci_read_config_byte(pdev, 0x05, &unit);
5944 pci_write_config_byte(pdev, 0x05, unit & (~0x04));
5945#endif
5946
5947 dev->irq = pdev->irq;
5948 priv->irq = 0;
5949
727ae303 5950 dev->netdev_ops = &rtl8180_netdev_ops;
c8d86be3 5951 dev->wireless_handlers = &r8180_wx_handlers_def;
c8d86be3
GKH		 5952
5953#if WIRELESS_EXT >= 12
5954#if WIRELESS_EXT < 17
5955 dev->get_wireless_stats = r8180_get_wireless_stats;
5956#endif
5957 dev->wireless_handlers = (struct iw_handler_def *) &r8180_wx_handlers_def;
5958#endif
5959
5960 dev->type=ARPHRD_ETHER;
5961 dev->watchdog_timeo = HZ*3; //added by david woo, 2007.12.13
5962
5963 if (dev_alloc_name(dev, ifname) < 0){
5964 DMESG("Oops: devname already taken! Trying wlan%%d...\n");
5965 ifname = "wlan%d";
5966 // ifname = "ath%d";
5967 dev_alloc_name(dev, ifname);
5968 }
5969
5970
5971 if(rtl8180_init(dev)!=0){
5972 DMESG("Initialization failed");
5973 goto fail1;
5974 }
5975
5976 netif_carrier_off(dev);
5977
5978 register_netdev(dev);
5979
5980 rtl8180_proc_init_one(dev);
5981
5982 DMESG("Driver probe completed\n");
5983 return 0;
5984
5985fail1:
5986
5987#ifdef CONFIG_RTL8180_IO_MAP
5988
5989 if( dev->base_addr != 0 ){
5990
5991 release_region(dev->base_addr,
5992 pci_resource_len(pdev, 0) );
5993 }
5994#else
5995 if( dev->mem_start != (unsigned long)NULL ){
5996 iounmap( (void *)dev->mem_start );
5997 release_mem_region( pci_resource_start(pdev, 1),
5998 pci_resource_len(pdev, 1) );
5999 }
6000#endif //end #ifdef RTL_IO_MAP
6001
6002
6003fail:
6004 if(dev){
6005
6006 if (priv->irq) {
6007 free_irq(dev->irq, dev);
6008 dev->irq=0;
6009 }
6010 free_ieee80211(dev);
6011 }
6012
6013 pci_disable_device(pdev);
6014
6015 DMESG("wlan driver load failed\n");
6016 pci_set_drvdata(pdev, NULL);
6017 return -ENODEV;
6018
6019}
6020
6021
6022static void __devexit rtl8180_pci_remove(struct pci_dev *pdev)
6023{
6024 struct r8180_priv *priv;
6025 struct net_device *dev = pci_get_drvdata(pdev);
6026 if(dev){
6027
6028 unregister_netdev(dev);
6029
6030 priv=ieee80211_priv(dev);
6031
6032 rtl8180_proc_remove_one(dev);
6033 rtl8180_down(dev);
6034 priv->rf_close(dev);
6035 rtl8180_reset(dev);
6036 //rtl8180_rtx_disable(dev);
6037 //rtl8180_irq_disable(dev);
6038 mdelay(10);
6039 //write_nic_word(dev,INTA,read_nic_word(dev,INTA));
6040 //force_pci_posting(dev);
6041 //mdelay(10);
6042
6043 if(priv->irq){
6044
6045 DMESG("Freeing irq %d",dev->irq);
6046 free_irq(dev->irq, dev);
6047 priv->irq=0;
6048
6049 }
6050
6051 free_rx_desc_ring(dev);
6052 free_tx_desc_rings(dev);
6053 // free_beacon_desc_ring(dev,priv->txbeaconcount);
6054
6055#ifdef CONFIG_RTL8180_IO_MAP
6056
6057 if( dev->base_addr != 0 ){
6058
6059 release_region(dev->base_addr,
6060 pci_resource_len(pdev, 0) );
6061 }
6062#else
6063 if( dev->mem_start != (unsigned long)NULL ){
6064 iounmap( (void *)dev->mem_start );
6065 release_mem_region( pci_resource_start(pdev, 1),
6066 pci_resource_len(pdev, 1) );
6067 }
6068#endif /*end #ifdef RTL_IO_MAP*/
6069
6070 free_ieee80211(dev);
6071 }
6072 pci_disable_device(pdev);
6073
6074 DMESG("wlan driver removed\n");
6075}
6076
6077
6078/* fun with the built-in ieee80211 stack... */
6079extern int ieee80211_crypto_init(void);
6080extern void ieee80211_crypto_deinit(void);
6081extern int ieee80211_crypto_tkip_init(void);
6082extern void ieee80211_crypto_tkip_exit(void);
6083extern int ieee80211_crypto_ccmp_init(void);
6084extern void ieee80211_crypto_ccmp_exit(void);
6085extern int ieee80211_crypto_wep_init(void);
6086extern void ieee80211_crypto_wep_exit(void);
6087
6088static int __init rtl8180_pci_module_init(void)
6089{
6090 int ret;
6091
6092 ret = ieee80211_crypto_init();
6093 if (ret) {
6094 printk(KERN_ERR "ieee80211_crypto_init() failed %d\n", ret);
6095 return ret;
6096 }
6097 ret = ieee80211_crypto_tkip_init();
6098 if (ret) {
6099 printk(KERN_ERR "ieee80211_crypto_tkip_init() failed %d\n", ret);
6100 return ret;
6101 }
6102 ret = ieee80211_crypto_ccmp_init();
6103 if (ret) {
6104 printk(KERN_ERR "ieee80211_crypto_ccmp_init() failed %d\n", ret);
6105 return ret;
6106 }
6107 ret = ieee80211_crypto_wep_init();
6108 if (ret) {
6109 printk(KERN_ERR "ieee80211_crypto_wep_init() failed %d\n", ret);
6110 return ret;
6111 }
6112
6113 printk(KERN_INFO "\nLinux kernel driver for RTL8180 \
6114/ RTL8185 based WLAN cards\n");
6115 printk(KERN_INFO "Copyright (c) 2004-2005, Andrea Merello\n");
6116 DMESG("Initializing module");
6117 DMESG("Wireless extensions version %d", WIRELESS_EXT);
6118 rtl8180_proc_module_init();
6119
6120#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22))
6121 if(0!=pci_module_init(&rtl8180_pci_driver))
6122#else
6123 if(0!=pci_register_driver(&rtl8180_pci_driver))
6124#endif
6125 //if(0!=pci_module_init(&rtl8180_pci_driver))
6126 {
6127 DMESG("No device found");
6128 /*pci_unregister_driver (&rtl8180_pci_driver);*/
6129 return -ENODEV;
6130 }
6131 return 0;
6132}
6133
6134
6135static void __exit rtl8180_pci_module_exit(void)
6136{
6137 pci_unregister_driver (&rtl8180_pci_driver);
6138 rtl8180_proc_module_remove();
c8d86be3
GKH		 6139 ieee80211_crypto_tkip_exit();
6140 ieee80211_crypto_ccmp_exit();
6141 ieee80211_crypto_wep_exit();
096c55d1 6142 ieee80211_crypto_deinit();
c8d86be3
GKH		 6143 DMESG("Exiting");
6144}
6145
6146
6147void rtl8180_try_wake_queue(struct net_device *dev, int pri)
6148{
6149 unsigned long flags;
6150 short enough_desc;
6151 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
6152
6153 spin_lock_irqsave(&priv->tx_lock,flags);
6154 enough_desc = check_nic_enought_desc(dev,pri);
6155 spin_unlock_irqrestore(&priv->tx_lock,flags);
6156
6157 if(enough_desc)
6158 ieee80211_wake_queue(priv->ieee80211);
6159}
6160
6161/*****************************************************************************
6162 -----------------------------IRQ STUFF---------------------------
6163******************************************************************************/
6164
6165void rtl8180_tx_isr(struct net_device *dev, int pri,short error)
6166{
6167 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
6168
6169 u32 *tail; //tail virtual addr
6170 u32 *head; //head virtual addr
6171 u32 *begin;//start of ring virtual addr
6172 u32 *nicv; //nic pointer virtual addr
6173// u32 *txdv; //packet just TXed
6174 u32 nic; //nic pointer physical addr
6175 u32 nicbegin;// start of ring physical addr
6176// short txed;
6177 unsigned long flag;
6178 /* physical addr are ok on 32 bits since we set DMA mask*/
6179
6180 int offs;
6181 int j,i;
6182 int hd;
6183 if (error) priv->stats.txretry++; //tony 20060601
6184 spin_lock_irqsave(&priv->tx_lock,flag);
6185 switch(pri) {
6186 case MANAGE_PRIORITY:
6187 tail = priv->txmapringtail;
6188 begin = priv->txmapring;
6189 head = priv->txmapringhead;
6190 nic = read_nic_dword(dev,TX_MANAGEPRIORITY_RING_ADDR);
6191 nicbegin = priv->txmapringdma;
6192 break;
6193
6194 case BK_PRIORITY:
6195 tail = priv->txbkpringtail;
6196 begin = priv->txbkpring;
6197 head = priv->txbkpringhead;
6198 nic = read_nic_dword(dev,TX_BKPRIORITY_RING_ADDR);
6199 nicbegin = priv->txbkpringdma;
6200 break;
6201
6202 case BE_PRIORITY:
6203 tail = priv->txbepringtail;
6204 begin = priv->txbepring;
6205 head = priv->txbepringhead;
6206 nic = read_nic_dword(dev,TX_BEPRIORITY_RING_ADDR);
6207 nicbegin = priv->txbepringdma;
6208 break;
6209
6210 case VI_PRIORITY:
6211 tail = priv->txvipringtail;
6212 begin = priv->txvipring;
6213 head = priv->txvipringhead;
6214 nic = read_nic_dword(dev,TX_VIPRIORITY_RING_ADDR);
6215 nicbegin = priv->txvipringdma;
6216 break;
6217
6218 case VO_PRIORITY:
6219 tail = priv->txvopringtail;
6220 begin = priv->txvopring;
6221 head = priv->txvopringhead;
6222 nic = read_nic_dword(dev,TX_VOPRIORITY_RING_ADDR);
6223 nicbegin = priv->txvopringdma;
6224 break;
6225
6226 case HI_PRIORITY:
6227 tail = priv->txhpringtail;
6228 begin = priv->txhpring;
6229 head = priv->txhpringhead;
6230 nic = read_nic_dword(dev,TX_HIGHPRIORITY_RING_ADDR);
6231 nicbegin = priv->txhpringdma;
6232 break;
6233
6234 default:
6235 spin_unlock_irqrestore(&priv->tx_lock,flag);
6236 return ;
6237 }
6238/* DMESG("%x %s %x %x",((int)nic & 0xfff)/8/4,
6239 *(priv->txnpring + ((int)nic&0xfff)/4/8) & (1<<31) ? "filled" : "empty",
6240 (priv->txnpringtail - priv->txnpring)/8,(priv->txnpringhead -
6241priv->txnpring)/8);
6242*/
6243 //nicv = (u32*) ((nic - nicbegin) + (int)begin);
6244 nicv = (u32*) ((nic - nicbegin) + (u8*)begin);
6245 if((head <= tail && (nicv > tail || nicv < head)) ||
6246 (head > tail && (nicv > tail && nicv < head))){
6247
6248 DMESGW("nic has lost pointer");
6249#ifdef DEBUG_TX_DESC
6250 //check_tx_ring(dev,NORM_PRIORITY);
6251 check_tx_ring(dev,pri);
6252#endif
6253 spin_unlock_irqrestore(&priv->tx_lock,flag);
6254 rtl8180_restart(dev);
6255 return;
6256 }
6257
6258 /* we check all the descriptors between the head and the nic,
6259 * but not the currenly pointed by the nic (the next to be txed)
6260 * and the previous of the pointed (might be in process ??)
6261 */
6262 //if (head == nic) return;
6263 //DMESG("%x %x",head,nic);
6264 offs = (nic - nicbegin);
6265 //DMESG("%x %x %x",nic ,(u32)nicbegin, (int)nic -nicbegin);
6266
6267 offs = offs / 8 /4;
6268
6269 hd = (head - begin) /8;
6270
6271 if(offs >= hd)
6272 j = offs - hd;
6273 else
6274 j = offs + (priv->txringcount -1 -hd);
6275 // j= priv->txringcount -1- (hd - offs);
6276
6277 j-=2;
6278 if(j<0) j=0;
6279
6280
6281 for(i=0;i<j;i++)
6282 {
6283// printk("+++++++++++++check status desc\n");
6284 if((*head) & (1<<31))
6285 break;
6286 if(((*head)&(0x10000000)) != 0){
6287// printk("++++++++++++++last desc,retry count is %d\n",((*head) & (0x000000ff)));
6288 priv->CurrRetryCnt += (u16)((*head) & (0x000000ff));
6289#if 1
6290 if(!error)
6291 {
6292 priv->NumTxOkTotal++;
6293// printk("NumTxOkTotal is %d\n",priv->NumTxOkTotal++);
6294 }
6295#endif
d599edca 6296 // printk("in function %s:curr_retry_count is %d\n",__func__,((*head) & (0x000000ff)));
c8d86be3
GKH		 6297 }
6298 if(!error){
6299 priv->NumTxOkBytesTotal += (*(head+3)) & (0x00000fff);
6300 }
d599edca 6301// printk("in function %s:curr_txokbyte_count is %d\n",__func__,(*(head+3)) & (0x00000fff));
c8d86be3
GKH		 6302 *head = *head &~ (1<<31);
6303
6304 if((head - begin)/8 == priv->txringcount-1)
6305 head=begin;
6306
6307 else
6308 head+=8;
6309 }
6310#if 0
6311 if(nicv == begin)
6312 txdv = begin + (priv->txringcount -1)*8;
6313 else
6314 txdv = nicv - 8;
6315
6316 txed = !(txdv[0] &(1<<31));
6317
6318 if(txed){
6319 if(!(txdv[0] & (1<<15))) error = 1;
6320 //if(!(txdv[0] & (1<<30))) error = 1;
6321 if(error)DMESG("%x",txdv[0]);
6322 }
6323#endif
6324 //DMESG("%x",txdv[0]);
6325 /* the head has been moved to the last certainly TXed
6326 * (or at least processed by the nic) packet.
6327 * The driver take forcefully owning of all these packets
6328 * If the packet previous of the nic pointer has been
6329 * processed this doesn't matter: it will be checked
6330 * here at the next round. Anyway if no more packet are
6331 * TXed no memory leak occour at all.
6332 */
6333
6334 switch(pri) {
6335 case MANAGE_PRIORITY:
6336 priv->txmapringhead = head;
6337 //printk("1==========================================> priority check!\n");
6338 if(priv->ack_tx_to_ieee){
6339 // try to implement power-save mode 2008.1.22
6340 // printk("2==========================================> priority check!\n");
6341#if 1
6342 if(rtl8180_is_tx_queue_empty(dev)){
6343 // printk("tx queue empty, after send null sleep packet, try to sleep !\n");
6344 priv->ack_tx_to_ieee = 0;
6345 ieee80211_ps_tx_ack(priv->ieee80211,!error);
6346 }
6347#endif
6348 }
6349 break;
6350
6351 case BK_PRIORITY:
6352 priv->txbkpringhead = head;
6353 break;
6354
6355 case BE_PRIORITY:
6356 priv->txbepringhead = head;
6357 break;
6358
6359 case VI_PRIORITY:
6360 priv->txvipringhead = head;
6361 break;
6362
6363 case VO_PRIORITY:
6364 priv->txvopringhead = head;
6365 break;
6366
6367 case HI_PRIORITY:
6368 priv->txhpringhead = head;
6369 break;
6370 }
6371
6372 /*DMESG("%x %x %x", (priv->txnpringhead - priv->txnpring) /8 ,
6373 (priv->txnpringtail - priv->txnpring) /8,
6374 offs );
6375 */
6376
6377 spin_unlock_irqrestore(&priv->tx_lock,flag);
6378
6379}
6380
6381#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
6382void rtl8180_tx_irq_wq(struct work_struct *work)
6383{
6384 //struct r8180_priv *priv = container_of(work, struct r8180_priv, reset_wq);
bf6aede7 6385 struct delayed_work *dwork = to_delayed_work(work);
c8d86be3
GKH		 6386 struct ieee80211_device * ieee = (struct ieee80211_device*)
6387 container_of(dwork, struct ieee80211_device, watch_dog_wq);
6388 struct net_device *dev = ieee->dev;
6389#else
6390void rtl8180_tx_irq_wq(struct net_device *dev)
6391{
6392 //struct r8180_priv *priv = ieee80211_priv(dev);
6393#endif
6394 rtl8180_tx_isr(dev,MANAGE_PRIORITY,0);
6395}
6396irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs)
6397{
6398 struct net_device *dev = (struct net_device *) netdev;
6399 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
6400 unsigned long flags;
6401 u32 inta;
6402
6403 /* We should return IRQ_NONE, but for now let me keep this */
6404 if(priv->irq_enabled == 0) return IRQ_HANDLED;
6405
6406 spin_lock_irqsave(&priv->irq_th_lock,flags);
6407
6408#ifdef CONFIG_RTL8185B
6409 //ISR: 4bytes
6410 inta = read_nic_dword(dev, ISR);// & priv->IntrMask;
6411 write_nic_dword(dev,ISR,inta); // reset int situation
6412#else
6413 inta = read_nic_word(dev,INTA) & priv->irq_mask;
6414 write_nic_word(dev,INTA,inta); // reset int situation
6415#endif
6416
6417 priv->stats.shints++;
6418
6419 //DMESG("Enter interrupt, ISR value = 0x%08x", inta);
6420
6421 if(!inta){
6422 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
6423 return IRQ_HANDLED;
6424 /*
6425 most probably we can safely return IRQ_NONE,
6426 but for now is better to avoid problems
6427 */
6428 }
6429
6430 if(inta == 0xffff){
6431 /* HW disappared */
6432 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
6433 return IRQ_HANDLED;
6434 }
6435
6436 priv->stats.ints++;
6437#ifdef DEBUG_IRQ
6438 DMESG("NIC irq %x",inta);
6439#endif
6440 //priv->irqpending = inta;
6441
6442
6443 if(!netif_running(dev)) {
6444 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
6445 return IRQ_HANDLED;
6446 }
6447
6448 if(inta & ISR_TimeOut){
6449 write_nic_dword(dev, TimerInt, 0);
6450 //DMESG("=================>waking up");
6451// rtl8180_hw_wakeup(dev);
6452 }
6453
6454 if(inta & ISR_TBDOK){
6455 priv->stats.txbeacon++;
6456 }
6457
6458 if(inta & ISR_TBDER){
6459 priv->stats.txbeaconerr++;
6460 }
6461
6462 if(inta & IMR_TMGDOK ) {
6463// priv->NumTxOkTotal++;
6464 rtl8180_tx_isr(dev,MANAGE_PRIORITY,0);
6465// schedule_work(&priv->tx_irq_wq);
6466
6467 }
6468
6469 if(inta & ISR_THPDER){
6470#ifdef DEBUG_TX
6471 DMESG ("TX high priority ERR");
6472#endif
6473 priv->stats.txhperr++;
6474 rtl8180_tx_isr(dev,HI_PRIORITY,1);
6475 priv->ieee80211->stats.tx_errors++;
6476 }
6477
6478 if(inta & ISR_THPDOK){ //High priority tx ok
6479#ifdef DEBUG_TX
6480 DMESG ("TX high priority OK");
6481#endif
6482// priv->NumTxOkTotal++;
6483 //priv->NumTxOkInPeriod++; //YJ,del,080828
6484 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
6485 priv->stats.txhpokint++;
6486 rtl8180_tx_isr(dev,HI_PRIORITY,0);
6487 }
6488
6489 if(inta & ISR_RER) {
6490 priv->stats.rxerr++;
6491#ifdef DEBUG_RX
6492 DMESGW("RX error int");
6493#endif
6494 }
6495#ifdef CONFIG_RTL8185B
6496 if(inta & ISR_TBKDER){ //corresponding to BK_PRIORITY
6497 priv->stats.txbkperr++;
6498 priv->ieee80211->stats.tx_errors++;
6499#ifdef DEBUG_TX
6500 DMESGW("TX bkp error int");
6501#endif
6502 //tasklet_schedule(&priv->irq_tx_tasklet);
6503 rtl8180_tx_isr(dev,BK_PRIORITY,1);
6504 rtl8180_try_wake_queue(dev, BE_PRIORITY);
6505 }
6506
6507 if(inta & ISR_TBEDER){ //corresponding to BE_PRIORITY
6508 priv->stats.txbeperr++;
6509 priv->ieee80211->stats.tx_errors++;
6510#ifdef DEBUG_TX
6511 DMESGW("TX bep error int");
6512#endif
6513 rtl8180_tx_isr(dev,BE_PRIORITY,1);
6514 //tasklet_schedule(&priv->irq_tx_tasklet);
6515 rtl8180_try_wake_queue(dev, BE_PRIORITY);
6516 }
6517#endif
6518 if(inta & ISR_TNPDER){ //corresponding to VO_PRIORITY
6519 priv->stats.txnperr++;
6520 priv->ieee80211->stats.tx_errors++;
6521#ifdef DEBUG_TX
6522 DMESGW("TX np error int");
6523#endif
6524 //tasklet_schedule(&priv->irq_tx_tasklet);
6525 rtl8180_tx_isr(dev,NORM_PRIORITY,1);
6526#ifdef CONFIG_RTL8185B
6527 rtl8180_try_wake_queue(dev, NORM_PRIORITY);
6528#endif
6529 }
6530
6531 if(inta & ISR_TLPDER){ //corresponding to VI_PRIORITY
6532 priv->stats.txlperr++;
6533 priv->ieee80211->stats.tx_errors++;
6534#ifdef DEBUG_TX
6535 DMESGW("TX lp error int");
6536#endif
6537 rtl8180_tx_isr(dev,LOW_PRIORITY,1);
6538 //tasklet_schedule(&priv->irq_tx_tasklet);
6539 rtl8180_try_wake_queue(dev, LOW_PRIORITY);
6540 }
6541
6542 if(inta & ISR_ROK){
6543#ifdef DEBUG_RX
6544 DMESG("Frame arrived !");
6545#endif
6546 //priv->NumRxOkInPeriod++; //YJ,del,080828
6547 priv->stats.rxint++;
6548 tasklet_schedule(&priv->irq_rx_tasklet);
6549 }
6550
6551 if(inta & ISR_RQoSOK ){
6552#ifdef DEBUG_RX
6553 DMESG("QoS Frame arrived !");
6554#endif
6555 //priv->NumRxOkInPeriod++; //YJ,del,080828
6556 priv->stats.rxint++;
6557 tasklet_schedule(&priv->irq_rx_tasklet);
6558 }
6559 if(inta & ISR_BcnInt) {
6560 //DMESG("Preparing Beacons");
6561 rtl8180_prepare_beacon(dev);
6562 }
6563
6564 if(inta & ISR_RDU){
6565//#ifdef DEBUG_RX
6566 DMESGW("No RX descriptor available");
6567 priv->stats.rxrdu++;
6568//#endif
6569 tasklet_schedule(&priv->irq_rx_tasklet);
6570 /*queue_work(priv->workqueue ,&priv->restart_work);*/
6571
6572 }
6573 if(inta & ISR_RXFOVW){
6574#ifdef DEBUG_RX
6575 DMESGW("RX fifo overflow");
6576#endif
6577 priv->stats.rxoverflow++;
6578 tasklet_schedule(&priv->irq_rx_tasklet);
6579 //queue_work(priv->workqueue ,&priv->restart_work);
6580 }
6581
6582 if(inta & ISR_TXFOVW) priv->stats.txoverflow++;
6583
6584 if(inta & ISR_TNPDOK){ //Normal priority tx ok
6585#ifdef DEBUG_TX
6586 DMESG ("TX normal priority OK");
6587#endif
6588// priv->NumTxOkTotal++;
6589 //priv->NumTxOkInPeriod++; //YJ,del,080828
6590 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
6591 // priv->ieee80211->stats.tx_packets++;
6592 priv->stats.txnpokint++;
6593 rtl8180_tx_isr(dev,NORM_PRIORITY,0);
6594 }
6595
6596 if(inta & ISR_TLPDOK){ //Low priority tx ok
6597#ifdef DEBUG_TX
6598 DMESG ("TX low priority OK");
6599#endif
6600// priv->NumTxOkTotal++;
6601 //priv->NumTxOkInPeriod++; //YJ,del,080828
6602 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
6603 // priv->ieee80211->stats.tx_packets++;
6604 priv->stats.txlpokint++;
6605 rtl8180_tx_isr(dev,LOW_PRIORITY,0);
6606 rtl8180_try_wake_queue(dev, LOW_PRIORITY);
6607 }
6608
6609#ifdef CONFIG_RTL8185B
6610 if(inta & ISR_TBKDOK){ //corresponding to BK_PRIORITY
6611 priv->stats.txbkpokint++;
6612#ifdef DEBUG_TX
6613 DMESGW("TX bk priority ok");
6614#endif
6615// priv->NumTxOkTotal++;
6616 //priv->NumTxOkInPeriod++; //YJ,del,080828
6617 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
6618 rtl8180_tx_isr(dev,BK_PRIORITY,0);
6619 rtl8180_try_wake_queue(dev, BE_PRIORITY);
6620 }
6621
6622 if(inta & ISR_TBEDOK){ //corresponding to BE_PRIORITY
6623 priv->stats.txbeperr++;
6624#ifdef DEBUG_TX
6625 DMESGW("TX be priority ok");
6626#endif
6627// priv->NumTxOkTotal++;
6628 //priv->NumTxOkInPeriod++; //YJ,del,080828
6629 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
6630 rtl8180_tx_isr(dev,BE_PRIORITY,0);
6631 rtl8180_try_wake_queue(dev, BE_PRIORITY);
6632 }
6633#endif
6634 force_pci_posting(dev);
6635 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
6636
6637 return IRQ_HANDLED;
6638}
6639
6640
6641void rtl8180_irq_rx_tasklet(struct r8180_priv* priv)
6642{
6643// unsigned long flags;
6644
6645/* spin_lock_irqsave(&priv->irq_lock, flags);
6646 priv->irq_mask &=~IMR_ROK;
6647 priv->irq_mask &=~IMR_RDU;
6648
6649 rtl8180_irq_enable(priv->dev);
6650 spin_unlock_irqrestore(&priv->irq_lock, flags);
6651*/
6652 rtl8180_rx(priv->dev);
6653
6654/* spin_lock_irqsave(&priv->irq_lock, flags);
6655 priv->irq_mask |= IMR_ROK;
6656 priv->irq_mask |= IMR_RDU;
6657 rtl8180_irq_enable(priv->dev);
6658 spin_unlock_irqrestore(&priv->irq_lock, flags);
6659*/
6660}
6661
6662/****************************************************************************
6663lizhaoming--------------------------- RF power on/power off -----------------
6664*****************************************************************************/
6665
6666#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
6667void GPIOChangeRFWorkItemCallBack(struct work_struct *work)
6668{
bf6aede7 6669 //struct delayed_work *dwork = to_delayed_work(work);
c8d86be3
GKH		 6670 struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, GPIOChangeRFWorkItem.work);
6671 struct net_device *dev = ieee->dev;
6672 struct r8180_priv *priv = ieee80211_priv(dev);
6673#else
6674void GPIOChangeRFWorkItemCallBack(struct ieee80211_device *ieee)
6675{
6676 struct net_device *dev = ieee->dev;
6677 struct r8180_priv *priv = ieee80211_priv(dev);
6678#endif
6679
6680 //u16 tmp2byte;
6681 u8 btPSR;
6682 u8 btConfig0;
6683 RT_RF_POWER_STATE eRfPowerStateToSet;
6684 bool bActuallySet=false;
6685
6686 char *argv[3];
6687 static char *RadioPowerPath = "/etc/acpi/events/RadioPower.sh";
6688 static char *envp[] = {"HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL};
6689 static int readf_count = 0;
6690 //printk("============>%s in \n", __func__);
6691
6692#ifdef ENABLE_LPS
6693 if(readf_count % 10 == 0)
6694 priv->PowerProfile = read_acadapter_file("/proc/acpi/ac_adapter/AC0/state");
6695
6696 readf_count = (readf_count+1)%0xffff;
6697#endif
6698#if 0
6699 if(priv->up == 0)//driver stopped
6700 {
6701 printk("\nDo nothing...");
6702 goto out;
6703 }
6704 else
6705#endif
6706 {
6707 // We should turn off LED before polling FF51[4].
6708
6709 //Turn off LED.
6710 btPSR = read_nic_byte(dev, PSR);
6711 write_nic_byte(dev, PSR, (btPSR & ~BIT3));
6712
6713 //It need to delay 4us suggested by Jong, 2008-01-16
6714 udelay(4);
6715
6716 //HW radio On/Off according to the value of FF51[4](config0)
6717 btConfig0 = btPSR = read_nic_byte(dev, CONFIG0);
6718
6719 //Turn on LED.
6720 write_nic_byte(dev, PSR, btPSR| BIT3);
6721
6722 eRfPowerStateToSet = (btConfig0 & BIT4) ? eRfOn : eRfOff;
6723
6724 if((priv->ieee80211->bHwRadioOff == true) && (eRfPowerStateToSet == eRfOn))
6725 {
6726 priv->ieee80211->bHwRadioOff = false;
6727 bActuallySet = true;
6728 }
6729 else if((priv->ieee80211->bHwRadioOff == false) && (eRfPowerStateToSet == eRfOff))
6730 {
6731 priv->ieee80211->bHwRadioOff = true;
6732 bActuallySet = true;
6733 }
6734
6735 if(bActuallySet)
6736 {
6737 MgntActSet_RF_State(dev, eRfPowerStateToSet, RF_CHANGE_BY_HW);
6738
6739 /* To update the UI status for Power status changed */
6740 if(priv->ieee80211->bHwRadioOff == true)
6741 argv[1] = "RFOFF";
6742 else{
6743 //if(!priv->RfOffReason)
6744 argv[1] = "RFON";
6745 //else
6746 // argv[1] = "RFOFF";
6747 }
6748 argv[0] = RadioPowerPath;
6749 argv[2] = NULL;
6750
6751 call_usermodehelper(RadioPowerPath,argv,envp,1);
6752 }
6753
6754 }
6755
6756}
6757
6758static u8 read_acadapter_file(char *filename)
6759{
6760//#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21))
6761#if 0
6762 int fd;
6763 char buf[1];
6764 char ret[50];
6765 int i = 0;
6766 int n = 0;
6767 mm_segment_t old_fs = get_fs();
6768 set_fs(KERNEL_DS);
6769
6770 fd = sys_open(filename, O_RDONLY, 0);
6771 if (fd >= 0) {
6772 while (sys_read(fd, buf, 1) == 1)
6773 {
6774 i++;
6775 if(i>10)
6776 {
6777 if(buf[0]!=' ')
6778 {
6779 ret[n]=buf[0];
6780 n++;
6781 }
6782 }
6783 }
6784 sys_close(fd);
6785 }
6786 ret[n]='\0';
6787// printk("%s \n", ret);
6788 set_fs(old_fs);
6789
6790 if(strncmp(ret, "off-line",8) == 0)
6791 {
6792 return 1;
6793 }
6794#endif
6795 return 0;
6796}
6797
6798/***************************************************************************
6799 ------------------- module init / exit stubs ----------------
6800****************************************************************************/
6801module_init(rtl8180_pci_module_init);
6802module_exit(rtl8180_pci_module_exit);
6803
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