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Staging: rt2860: add RT3090 chipset support
[net-next-2.6.git] / drivers / staging / rt3090 / rtmp_dot11.h
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1/*
2 *************************************************************************
3 * Ralink Tech Inc.
4 * 5F., No.36, Taiyuan St., Jhubei City,
5 * Hsinchu County 302,
6 * Taiwan, R.O.C.
7 *
8 * (c) Copyright 2002-2007, Ralink Technology, Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify *
11 * it under the terms of the GNU General Public License as published by *
12 * the Free Software Foundation; either version 2 of the License, or *
13 * (at your option) any later version. *
14 * *
15 * This program is distributed in the hope that it will be useful, *
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
18 * GNU General Public License for more details. *
19 * *
20 * You should have received a copy of the GNU General Public License *
21 * along with this program; if not, write to the *
22 * Free Software Foundation, Inc., *
23 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
24 * *
25 *************************************************************************
26*/
27
28#ifndef __DOT11_BASE_H__
29#define __DOT11_BASE_H__
30
31#include "rtmp_type.h"
32
33
34// 4-byte HTC field. maybe included in any frame except non-QOS data frame. The Order bit must set 1.
35typedef struct PACKED {
36#ifdef RT_BIG_ENDIAN
37 UINT32 RDG:1; //RDG / More PPDU
38 UINT32 ACConstraint:1; //feedback request
39 UINT32 rsv:5; //calibration sequence
40 UINT32 ZLFAnnouce:1; // ZLF announcement
41 UINT32 CSISTEERING:2; //CSI/ STEERING
42 UINT32 FBKReq:2; //feedback request
43 UINT32 CalSeq:2; //calibration sequence
44 UINT32 CalPos:2; // calibration position
45 UINT32 MFBorASC:7; //Link adaptation feedback containing recommended MCS. 0x7f for no feedback or not available
46 UINT32 MFS:3; //SET to the received value of MRS. 0x111 for unsolicited MFB.
47 UINT32 MRSorASI:3; // MRQ Sequence identifier. unchanged during entire procedure. 0x000-0x110.
48 UINT32 MRQ:1; //MCS feedback. Request for a MCS feedback
49 UINT32 TRQ:1; //sounding request
50 UINT32 MA:1; //management action payload exist in (QoS Null+HTC)
51#else
52 UINT32 MA:1; //management action payload exist in (QoS Null+HTC)
53 UINT32 TRQ:1; //sounding request
54 UINT32 MRQ:1; //MCS feedback. Request for a MCS feedback
55 UINT32 MRSorASI:3; // MRQ Sequence identifier. unchanged during entire procedure. 0x000-0x110.
56 UINT32 MFS:3; //SET to the received value of MRS. 0x111 for unsolicited MFB.
57 UINT32 MFBorASC:7; //Link adaptation feedback containing recommended MCS. 0x7f for no feedback or not available
58 UINT32 CalPos:2; // calibration position
59 UINT32 CalSeq:2; //calibration sequence
60 UINT32 FBKReq:2; //feedback request
61 UINT32 CSISTEERING:2; //CSI/ STEERING
62 UINT32 ZLFAnnouce:1; // ZLF announcement
63 UINT32 rsv:5; //calibration sequence
64 UINT32 ACConstraint:1; //feedback request
65 UINT32 RDG:1; //RDG / More PPDU
66#endif /* !RT_BIG_ENDIAN */
67} HT_CONTROL, *PHT_CONTROL;
68
69// 2-byte QOS CONTROL field
70typedef struct PACKED {
71#ifdef RT_BIG_ENDIAN
72 USHORT Txop_QueueSize:8;
73 USHORT AMsduPresent:1;
74 USHORT AckPolicy:2; //0: normal ACK 1:No ACK 2:scheduled under MTBA/PSMP 3: BA
75 USHORT EOSP:1;
76 USHORT TID:4;
77#else
78 USHORT TID:4;
79 USHORT EOSP:1;
80 USHORT AckPolicy:2; //0: normal ACK 1:No ACK 2:scheduled under MTBA/PSMP 3: BA
81 USHORT AMsduPresent:1;
82 USHORT Txop_QueueSize:8;
83#endif /* !RT_BIG_ENDIAN */
84} QOS_CONTROL, *PQOS_CONTROL;
85
86
87// 2-byte Frame control field
88typedef struct PACKED {
89#ifdef RT_BIG_ENDIAN
90 USHORT Order:1; // Strict order expected
91 USHORT Wep:1; // Wep data
92 USHORT MoreData:1; // More data bit
93 USHORT PwrMgmt:1; // Power management bit
94 USHORT Retry:1; // Retry status bit
95 USHORT MoreFrag:1; // More fragment bit
96 USHORT FrDs:1; // From DS indication
97 USHORT ToDs:1; // To DS indication
98 USHORT SubType:4; // MSDU subtype
99 USHORT Type:2; // MSDU type
100 USHORT Ver:2; // Protocol version
101#else
102 USHORT Ver:2; // Protocol version
103 USHORT Type:2; // MSDU type
104 USHORT SubType:4; // MSDU subtype
105 USHORT ToDs:1; // To DS indication
106 USHORT FrDs:1; // From DS indication
107 USHORT MoreFrag:1; // More fragment bit
108 USHORT Retry:1; // Retry status bit
109 USHORT PwrMgmt:1; // Power management bit
110 USHORT MoreData:1; // More data bit
111 USHORT Wep:1; // Wep data
112 USHORT Order:1; // Strict order expected
113#endif /* !RT_BIG_ENDIAN */
114} FRAME_CONTROL, *PFRAME_CONTROL;
115
116typedef struct PACKED _HEADER_802_11 {
117 FRAME_CONTROL FC;
118 USHORT Duration;
119 UCHAR Addr1[MAC_ADDR_LEN];
120 UCHAR Addr2[MAC_ADDR_LEN];
121 UCHAR Addr3[MAC_ADDR_LEN];
122#ifdef RT_BIG_ENDIAN
123 USHORT Sequence:12;
124 USHORT Frag:4;
125#else
126 USHORT Frag:4;
127 USHORT Sequence:12;
128#endif /* !RT_BIG_ENDIAN */
129 UCHAR Octet[0];
130} HEADER_802_11, *PHEADER_802_11;
131
132typedef struct PACKED _PSPOLL_FRAME {
133 FRAME_CONTROL FC;
134 USHORT Aid;
135 UCHAR Bssid[MAC_ADDR_LEN];
136 UCHAR Ta[MAC_ADDR_LEN];
137} PSPOLL_FRAME, *PPSPOLL_FRAME;
138
139typedef struct PACKED _RTS_FRAME {
140 FRAME_CONTROL FC;
141 USHORT Duration;
142 UCHAR Addr1[MAC_ADDR_LEN];
143 UCHAR Addr2[MAC_ADDR_LEN];
144}RTS_FRAME, *PRTS_FRAME;
145
146#endif // __DOT11_BASE_H__ //