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Merge git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging-2.6
[net-next-2.6.git] / drivers / staging / lirc / lirc_it87.c
CommitLineData
c147f907
JW		 1/*
2 * LIRC driver for ITE IT8712/IT8705 CIR port
3 *
4 * Copyright (C) 2001 Hans-Gunter Lutke Uphues <hg_lu@web.de>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of the
9 * License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
19 * USA
20 *
21 * ITE IT8705 and IT8712(not tested) and IT8720 CIR-port support for lirc based
22 * via cut and paste from lirc_sir.c (C) 2000 Milan Pikula
23 *
24 * Attention: Sendmode only tested with debugging logs
25 *
26 * 2001/02/27 Christoph Bartelmus <lirc@bartelmus.de> :
27 * reimplemented read function
28 * 2005/06/05 Andrew Calkin implemented support for Asus Digimatrix,
29 * based on work of the following member of the Outertrack Digimatrix
30 * Forum: Art103 <r_tay@hotmail.com>
31 * 2009/12/24 James Edwards <jimbo-lirc@edwardsclan.net> implemeted support
32 * for ITE8704/ITE8718, on my machine, the DSDT reports 8704, but the
33 * chip identifies as 18.
34 */
35
36#include <linux/module.h>
37#include <linux/sched.h>
38#include <linux/errno.h>
39#include <linux/signal.h>
40#include <linux/fs.h>
41#include <linux/interrupt.h>
42#include <linux/ioport.h>
43#include <linux/kernel.h>
44#include <linux/time.h>
45#include <linux/string.h>
46#include <linux/types.h>
47#include <linux/wait.h>
48#include <linux/mm.h>
49#include <linux/delay.h>
50#include <linux/poll.h>
51#include <asm/system.h>
52#include <linux/io.h>
53#include <linux/irq.h>
54#include <linux/fcntl.h>
55
56#include <linux/timer.h>
57#include <linux/pnp.h>
58
59#include <media/lirc.h>
60#include <media/lirc_dev.h>
61
62#include "lirc_it87.h"
63
64#ifdef LIRC_IT87_DIGIMATRIX
65static int digimatrix = 1;
66static int it87_freq = 36; /* kHz */
67static int irq = 9;
68#else
69static int digimatrix;
70static int it87_freq = 38; /* kHz */
71static int irq = IT87_CIR_DEFAULT_IRQ;
72#endif
73
74static unsigned long it87_bits_in_byte_out;
75static unsigned long it87_send_counter;
76static unsigned char it87_RXEN_mask = IT87_CIR_RCR_RXEN;
77
78#define RBUF_LEN 1024
79
80#define LIRC_DRIVER_NAME "lirc_it87"
81
82/* timeout for sequences in jiffies (=5/100s) */
83/* must be longer than TIME_CONST */
84#define IT87_TIMEOUT (HZ*5/100)
85
86/* module parameters */
87static int debug;
88#define dprintk(fmt, args...) \
89 do { \
90 if (debug) \
91 printk(KERN_DEBUG LIRC_DRIVER_NAME ": " \
92 fmt, ## args); \
93 } while (0)
94
95static int io = IT87_CIR_DEFAULT_IOBASE;
96/* receiver demodulator default: off */
97static int it87_enable_demodulator;
98
99static int timer_enabled;
100static DEFINE_SPINLOCK(timer_lock);
101static struct timer_list timerlist;
102/* time of last signal change detected */
103static struct timeval last_tv = {0, 0};
104/* time of last UART data ready interrupt */
105static struct timeval last_intr_tv = {0, 0};
106static int last_value;
107
108static DECLARE_WAIT_QUEUE_HEAD(lirc_read_queue);
109
110static DEFINE_SPINLOCK(hardware_lock);
111static DEFINE_SPINLOCK(dev_lock);
82ce67bf 112static bool device_open;
c147f907
JW		 113
114static int rx_buf[RBUF_LEN];
115unsigned int rx_tail, rx_head;
116
117static struct pnp_driver it87_pnp_driver;
118
119/* SECTION: Prototypes */
120
121/* Communication with user-space */
122static int lirc_open(struct inode *inode, struct file *file);
123static int lirc_close(struct inode *inode, struct file *file);
124static unsigned int lirc_poll(struct file *file, poll_table *wait);
125static ssize_t lirc_read(struct file *file, char *buf,
126 size_t count, loff_t *ppos);
127static ssize_t lirc_write(struct file *file, const char *buf,
128 size_t n, loff_t *pos);
129static long lirc_ioctl(struct file *filep, unsigned int cmd, unsigned long arg);
130static void add_read_queue(int flag, unsigned long val);
131static int init_chrdev(void);
132static void drop_chrdev(void);
133/* Hardware */
134static irqreturn_t it87_interrupt(int irq, void *dev_id);
135static void send_space(unsigned long len);
136static void send_pulse(unsigned long len);
137static void init_send(void);
138static void terminate_send(unsigned long len);
139static int init_hardware(void);
140static void drop_hardware(void);
141/* Initialisation */
142static int init_port(void);
143static void drop_port(void);
144
145
146/* SECTION: Communication with user-space */
147
148static int lirc_open(struct inode *inode, struct file *file)
149{
150 spin_lock(&dev_lock);
82ce67bf 151 if (device_open) {
c147f907
JW		 152 spin_unlock(&dev_lock);
153 return -EBUSY;
154 }
82ce67bf 155 device_open = true;
c147f907
JW		 156 spin_unlock(&dev_lock);
157 return 0;
158}
159
160
161static int lirc_close(struct inode *inode, struct file *file)
162{
82ce67bf
JW		 163 spin_lock(&dev_lock);
164 device_open = false;
165 spin_unlock(&dev_lock);
c147f907
JW		 166 return 0;
167}
168
169
170static unsigned int lirc_poll(struct file *file, poll_table *wait)
171{
172 poll_wait(file, &lirc_read_queue, wait);
173 if (rx_head != rx_tail)
174 return POLLIN | POLLRDNORM;
175 return 0;
176}
177
178
179static ssize_t lirc_read(struct file *file, char *buf,
180 size_t count, loff_t *ppos)
181{
182 int n = 0;
183 int retval = 0;
184
185 while (n < count) {
186 if (file->f_flags & O_NONBLOCK && rx_head == rx_tail) {
187 retval = -EAGAIN;
188 break;
189 }
190 retval = wait_event_interruptible(lirc_read_queue,
191 rx_head != rx_tail);
192 if (retval)
193 break;
194
195 if (copy_to_user((void *) buf + n, (void *) (rx_buf + rx_head),
196 sizeof(int))) {
197 retval = -EFAULT;
198 break;
199 }
200 rx_head = (rx_head + 1) & (RBUF_LEN - 1);
201 n += sizeof(int);
202 }
203 if (n)
204 return n;
205 return retval;
206}
207
208
209static ssize_t lirc_write(struct file *file, const char *buf,
210 size_t n, loff_t *pos)
211{
212 int i = 0;
213 int *tx_buf;
214
215 if (n % sizeof(int))
216 return -EINVAL;
217 tx_buf = memdup_user(buf, n);
218 if (IS_ERR(tx_buf))
219 return PTR_ERR(tx_buf);
220 n /= sizeof(int);
221 init_send();
222 while (1) {
223 if (i >= n)
224 break;
225 if (tx_buf[i])
226 send_pulse(tx_buf[i]);
227 i++;
228 if (i >= n)
229 break;
230 if (tx_buf[i])
231 send_space(tx_buf[i]);
232 i++;
233 }
234 terminate_send(tx_buf[i - 1]);
235 return n;
236}
237
238
239static long lirc_ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
240{
241 int retval = 0;
a1266818 242 __u32 value = 0;
c147f907
JW		 243 unsigned long hw_flags;
244
245 if (cmd == LIRC_GET_FEATURES)
246 value = LIRC_CAN_SEND_PULSE |
247 LIRC_CAN_SET_SEND_CARRIER |
248 LIRC_CAN_REC_MODE2;
249 else if (cmd == LIRC_GET_SEND_MODE)
250 value = LIRC_MODE_PULSE;
251 else if (cmd == LIRC_GET_REC_MODE)
252 value = LIRC_MODE_MODE2;
253
254 switch (cmd) {
255 case LIRC_GET_FEATURES:
256 case LIRC_GET_SEND_MODE:
257 case LIRC_GET_REC_MODE:
a1266818 258 retval = put_user(value, (__u32 *) arg);
c147f907
JW		 259 break;
260
261 case LIRC_SET_SEND_MODE:
262 case LIRC_SET_REC_MODE:
a1266818 263 retval = get_user(value, (__u32 *) arg);
c147f907
JW		 264 break;
265
266 case LIRC_SET_SEND_CARRIER:
a1266818 267 retval = get_user(value, (__u32 *) arg);
c147f907
JW		 268 if (retval)
269 return retval;
a1266818
JW		 270 value /= 1000;
271 if (value > IT87_CIR_FREQ_MAX ||
272 value < IT87_CIR_FREQ_MIN)
c147f907
JW		 273 return -EINVAL;
274
a1266818 275 it87_freq = value;
c147f907
JW		 276
277 spin_lock_irqsave(&hardware_lock, hw_flags);
278 outb(((inb(io + IT87_CIR_TCR2) & IT87_CIR_TCR2_TXMPW) |
279 (it87_freq - IT87_CIR_FREQ_MIN) << 3),
280 io + IT87_CIR_TCR2);
281 spin_unlock_irqrestore(&hardware_lock, hw_flags);
282 dprintk("demodulation frequency: %d kHz\n", it87_freq);
283
284 break;
285
286 default:
287 retval = -EINVAL;
288 }
289
290 if (retval)
291 return retval;
292
293 if (cmd == LIRC_SET_REC_MODE) {
294 if (value != LIRC_MODE_MODE2)
295 retval = -ENOSYS;
296 } else if (cmd == LIRC_SET_SEND_MODE) {
297 if (value != LIRC_MODE_PULSE)
298 retval = -ENOSYS;
299 }
300 return retval;
301}
302
303static void add_read_queue(int flag, unsigned long val)
304{
305 unsigned int new_rx_tail;
306 int newval;
307
308 dprintk("add flag %d with val %lu\n", flag, val);
309
310 newval = val & PULSE_MASK;
311
312 /*
313 * statistically, pulses are ~TIME_CONST/2 too long. we could
314 * maybe make this more exact, but this is good enough
315 */
316 if (flag) {
317 /* pulse */
318 if (newval > TIME_CONST / 2)
319 newval -= TIME_CONST / 2;
320 else /* should not ever happen */
321 newval = 1;
322 newval |= PULSE_BIT;
323 } else
324 newval += TIME_CONST / 2;
325 new_rx_tail = (rx_tail + 1) & (RBUF_LEN - 1);
326 if (new_rx_tail == rx_head) {
327 dprintk("Buffer overrun.\n");
328 return;
329 }
330 rx_buf[rx_tail] = newval;
331 rx_tail = new_rx_tail;
332 wake_up_interruptible(&lirc_read_queue);
333}
334
335
0f9313ad 336static const struct file_operations lirc_fops = {
c147f907
JW		 337 .owner = THIS_MODULE,
338 .read = lirc_read,
339 .write = lirc_write,
340 .poll = lirc_poll,
341 .unlocked_ioctl = lirc_ioctl,
8be292cc
JW		 342#ifdef CONFIG_COMPAT
343 .compat_ioctl = lirc_ioctl,
344#endif
c147f907
JW		 345 .open = lirc_open,
346 .release = lirc_close,
6038f373 347 .llseek = noop_llseek,
c147f907
JW		 348};
349
350static int set_use_inc(void *data)
351{
352 return 0;
353}
354
355static void set_use_dec(void *data)
356{
357}
358
359static struct lirc_driver driver = {
360 .name = LIRC_DRIVER_NAME,
361 .minor = -1,
362 .code_length = 1,
363 .sample_rate = 0,
364 .data = NULL,
365 .add_to_buf = NULL,
366 .set_use_inc = set_use_inc,
367 .set_use_dec = set_use_dec,
368 .fops = &lirc_fops,
369 .dev = NULL,
370 .owner = THIS_MODULE,
371};
372
373
c147f907
JW		 374static int init_chrdev(void)
375{
376 driver.minor = lirc_register_driver(&driver);
377
378 if (driver.minor < 0) {
379 printk(KERN_ERR LIRC_DRIVER_NAME ": init_chrdev() failed.\n");
380 return -EIO;
381 }
382 return 0;
383}
384
385
386static void drop_chrdev(void)
387{
388 lirc_unregister_driver(driver.minor);
389}
c147f907
JW		 390
391
392/* SECTION: Hardware */
393static long delta(struct timeval *tv1, struct timeval *tv2)
394{
395 unsigned long deltv;
396
397 deltv = tv2->tv_sec - tv1->tv_sec;
398 if (deltv > 15)
399 deltv = 0xFFFFFF;
400 else
401 deltv = deltv*1000000 + tv2->tv_usec - tv1->tv_usec;
402 return deltv;
403}
404
405static void it87_timeout(unsigned long data)
406{
407 unsigned long flags;
408
409 /* avoid interference with interrupt */
410 spin_lock_irqsave(&timer_lock, flags);
411
412 if (digimatrix) {
413 /* We have timed out. Disable the RX mechanism. */
414
415 outb((inb(io + IT87_CIR_RCR) & ~IT87_CIR_RCR_RXEN) |
416 IT87_CIR_RCR_RXACT, io + IT87_CIR_RCR);
417 if (it87_RXEN_mask)
418 outb(inb(io + IT87_CIR_RCR) | IT87_CIR_RCR_RXEN,
419 io + IT87_CIR_RCR);
420 dprintk(" TIMEOUT\n");
421 timer_enabled = 0;
422
423 /* fifo clear */
424 outb(inb(io + IT87_CIR_TCR1) | IT87_CIR_TCR1_FIFOCLR,
425 io+IT87_CIR_TCR1);
426
427 } else {
428 /*
429 * if last received signal was a pulse, but receiving stopped
430 * within the 9 bit frame, we need to finish this pulse and
431 * simulate a signal change to from pulse to space. Otherwise
432 * upper layers will receive two sequences next time.
433 */
434
435 if (last_value) {
436 unsigned long pulse_end;
437
438 /* determine 'virtual' pulse end: */
439 pulse_end = delta(&last_tv, &last_intr_tv);
440 dprintk("timeout add %d for %lu usec\n",
441 last_value, pulse_end);
442 add_read_queue(last_value, pulse_end);
443 last_value = 0;
444 last_tv = last_intr_tv;
445 }
446 }
447 spin_unlock_irqrestore(&timer_lock, flags);
448}
449
450static irqreturn_t it87_interrupt(int irq, void *dev_id)
451{
452 unsigned char data;
453 struct timeval curr_tv;
454 static unsigned long deltv;
455 unsigned long deltintrtv;
456 unsigned long flags, hw_flags;
457 int iir, lsr;
458 int fifo = 0;
459 static char lastbit;
460 char bit;
461
462 /* Bit duration in microseconds */
463 const unsigned long bit_duration = 1000000ul /
464 (115200 / IT87_CIR_BAUDRATE_DIVISOR);
465
466
467 iir = inb(io + IT87_CIR_IIR);
468
469 switch (iir & IT87_CIR_IIR_IID) {
470 case 0x4:
471 case 0x6:
472 lsr = inb(io + IT87_CIR_RSR) & (IT87_CIR_RSR_RXFTO |
473 IT87_CIR_RSR_RXFBC);
474 fifo = lsr & IT87_CIR_RSR_RXFBC;
475 dprintk("iir: 0x%x fifo: 0x%x\n", iir, lsr);
476
477 /* avoid interference with timer */
478 spin_lock_irqsave(&timer_lock, flags);
479 spin_lock_irqsave(&hardware_lock, hw_flags);
480 if (digimatrix) {
481 static unsigned long acc_pulse;
482 static unsigned long acc_space;
483
484 do {
485 data = inb(io + IT87_CIR_DR);
486 data = ~data;
487 fifo--;
488 if (data != 0x00) {
489 if (timer_enabled)
490 del_timer(&timerlist);
491 /*
492 * start timer for end of
493 * sequence detection
494 */
495 timerlist.expires = jiffies +
496 IT87_TIMEOUT;
497 add_timer(&timerlist);
498 timer_enabled = 1;
499 }
500 /* Loop through */
501 for (bit = 0; bit < 8; ++bit) {
502 if ((data >> bit) & 1) {
503 ++acc_pulse;
504 if (lastbit == 0) {
505 add_read_queue(0,
506 acc_space *
507 bit_duration);
508 acc_space = 0;
509 }
510 } else {
511 ++acc_space;
512 if (lastbit == 1) {
513 add_read_queue(1,
514 acc_pulse *
515 bit_duration);
516 acc_pulse = 0;
517 }
518 }
519 lastbit = (data >> bit) & 1;
520 }
521
522 } while (fifo != 0);
523 } else { /* Normal Operation */
524 do {
525 del_timer(&timerlist);
526 data = inb(io + IT87_CIR_DR);
527
528 dprintk("data=%02x\n", data);
529 do_gettimeofday(&curr_tv);
530 deltv = delta(&last_tv, &curr_tv);
531 deltintrtv = delta(&last_intr_tv, &curr_tv);
532
533 dprintk("t %lu , d %d\n",
534 deltintrtv, (int)data);
535
536 /*
537 * if nothing came in last 2 cycles,
538 * it was gap
539 */
540 if (deltintrtv > TIME_CONST * 2) {
541 if (last_value) {
542 dprintk("GAP\n");
543
544 /* simulate signal change */
545 add_read_queue(last_value,
546 deltv -
547 deltintrtv);
548 last_value = 0;
549 last_tv.tv_sec =
550 last_intr_tv.tv_sec;
551 last_tv.tv_usec =
552 last_intr_tv.tv_usec;
553 deltv = deltintrtv;
554 }
555 }
556 data = 1;
557 if (data ^ last_value) {
558 /*
559 * deltintrtv > 2*TIME_CONST,
560 * remember ? the other case is
561 * timeout
562 */
563 add_read_queue(last_value,
564 deltv-TIME_CONST);
565 last_value = data;
566 last_tv = curr_tv;
567 if (last_tv.tv_usec >= TIME_CONST)
568 last_tv.tv_usec -= TIME_CONST;
569 else {
570 last_tv.tv_sec--;
571 last_tv.tv_usec += 1000000 -
572 TIME_CONST;
573 }
574 }
575 last_intr_tv = curr_tv;
576 if (data) {
577 /*
578 * start timer for end of
579 * sequence detection
580 */
581 timerlist.expires =
582 jiffies + IT87_TIMEOUT;
583 add_timer(&timerlist);
584 }
585 outb((inb(io + IT87_CIR_RCR) &
586 ~IT87_CIR_RCR_RXEN) |
587 IT87_CIR_RCR_RXACT,
588 io + IT87_CIR_RCR);
589 if (it87_RXEN_mask)
590 outb(inb(io + IT87_CIR_RCR) |
591 IT87_CIR_RCR_RXEN,
592 io + IT87_CIR_RCR);
593 fifo--;
594 } while (fifo != 0);
595 }
596 spin_unlock_irqrestore(&hardware_lock, hw_flags);
597 spin_unlock_irqrestore(&timer_lock, flags);
598
599 return IRQ_RETVAL(IRQ_HANDLED);
600
601 default:
602 /* not our irq */
603 dprintk("unknown IRQ (shouldn't happen) !!\n");
604 return IRQ_RETVAL(IRQ_NONE);
605 }
606}
607
608
609static void send_it87(unsigned long len, unsigned long stime,
610 unsigned char send_byte, unsigned int count_bits)
611{
612 long count = len / stime;
613 long time_left = 0;
614 static unsigned char byte_out;
615 unsigned long hw_flags;
616
617 dprintk("%s: len=%ld, sb=%d\n", __func__, len, send_byte);
618
619 time_left = (long)len - (long)count * (long)stime;
620 count += ((2 * time_left) / stime);
621 while (count) {
622 long i = 0;
623 for (i = 0; i < count_bits; i++) {
624 byte_out = (byte_out << 1) | (send_byte & 1);
625 it87_bits_in_byte_out++;
626 }
627 if (it87_bits_in_byte_out == 8) {
628 dprintk("out=0x%x, tsr_txfbc: 0x%x\n",
629 byte_out,
630 inb(io + IT87_CIR_TSR) &
631 IT87_CIR_TSR_TXFBC);
632
633 while ((inb(io + IT87_CIR_TSR) &
634 IT87_CIR_TSR_TXFBC) >= IT87_CIR_FIFO_SIZE)
635 ;
636
637 spin_lock_irqsave(&hardware_lock, hw_flags);
638 outb(byte_out, io + IT87_CIR_DR);
639 spin_unlock_irqrestore(&hardware_lock, hw_flags);
640
641 it87_bits_in_byte_out = 0;
642 it87_send_counter++;
643 byte_out = 0;
644 }
645 count--;
646 }
647}
648
649
650/*TODO: maybe exchange space and pulse because it8705 only modulates 0-bits */
651
652static void send_space(unsigned long len)
653{
654 send_it87(len, TIME_CONST, IT87_CIR_SPACE, IT87_CIR_BAUDRATE_DIVISOR);
655}
656
657static void send_pulse(unsigned long len)
658{
659 send_it87(len, TIME_CONST, IT87_CIR_PULSE, IT87_CIR_BAUDRATE_DIVISOR);
660}
661
662
663static void init_send()
664{
665 unsigned long flags;
666
667 spin_lock_irqsave(&hardware_lock, flags);
668 /* RXEN=0: receiver disable */
669 it87_RXEN_mask = 0;
670 outb(inb(io + IT87_CIR_RCR) & ~IT87_CIR_RCR_RXEN,
671 io + IT87_CIR_RCR);
672 spin_unlock_irqrestore(&hardware_lock, flags);
673 it87_bits_in_byte_out = 0;
674 it87_send_counter = 0;
675}
676
677
678static void terminate_send(unsigned long len)
679{
680 unsigned long flags;
681 unsigned long last = 0;
682
683 last = it87_send_counter;
684 /* make sure all necessary data has been sent */
685 while (last == it87_send_counter)
686 send_space(len);
687 /* wait until all data sent */
688 while ((inb(io + IT87_CIR_TSR) & IT87_CIR_TSR_TXFBC) != 0)
689 ;
690 /* then re-enable receiver */
691 spin_lock_irqsave(&hardware_lock, flags);
692 it87_RXEN_mask = IT87_CIR_RCR_RXEN;
693 outb(inb(io + IT87_CIR_RCR) | IT87_CIR_RCR_RXEN,
694 io + IT87_CIR_RCR);
695 spin_unlock_irqrestore(&hardware_lock, flags);
696}
697
698
699static int init_hardware(void)
700{
701 unsigned long flags;
702 unsigned char it87_rcr = 0;
703
704 spin_lock_irqsave(&hardware_lock, flags);
705 /* init cir-port */
706 /* enable r/w-access to Baudrate-Register */
707 outb(IT87_CIR_IER_BR, io + IT87_CIR_IER);
708 outb(IT87_CIR_BAUDRATE_DIVISOR % 0x100, io+IT87_CIR_BDLR);
709 outb(IT87_CIR_BAUDRATE_DIVISOR / 0x100, io+IT87_CIR_BDHR);
710 /* Baudrate Register off, define IRQs: Input only */
711 if (digimatrix) {
712 outb(IT87_CIR_IER_IEC | IT87_CIR_IER_RFOIE, io + IT87_CIR_IER);
713 /* RX: HCFS=0, RXDCR = 001b (33,75..38,25 kHz), RXEN=1 */
714 } else {
715 outb(IT87_CIR_IER_IEC | IT87_CIR_IER_RDAIE, io + IT87_CIR_IER);
716 /* RX: HCFS=0, RXDCR = 001b (35,6..40,3 kHz), RXEN=1 */
717 }
718 it87_rcr = (IT87_CIR_RCR_RXEN & it87_RXEN_mask) | 0x1;
719 if (it87_enable_demodulator)
720 it87_rcr |= IT87_CIR_RCR_RXEND;
721 outb(it87_rcr, io + IT87_CIR_RCR);
722 if (digimatrix) {
723 /* Set FIFO depth to 1 byte, and disable TX */
724 outb(inb(io + IT87_CIR_TCR1) | 0x00,
725 io + IT87_CIR_TCR1);
726
727 /*
728 * TX: it87_freq (36kHz), 'reserved' sensitivity
729 * setting (0x00)
730 */
731 outb(((it87_freq - IT87_CIR_FREQ_MIN) << 3) | 0x00,
732 io + IT87_CIR_TCR2);
733 } else {
734 /* TX: 38kHz, 13,3us (pulse-width) */
735 outb(((it87_freq - IT87_CIR_FREQ_MIN) << 3) | 0x06,
736 io + IT87_CIR_TCR2);
737 }
738 spin_unlock_irqrestore(&hardware_lock, flags);
739 return 0;
740}
741
742
743static void drop_hardware(void)
744{
745 unsigned long flags;
746
747 spin_lock_irqsave(&hardware_lock, flags);
748 disable_irq(irq);
749 /* receiver disable */
750 it87_RXEN_mask = 0;
751 outb(0x1, io + IT87_CIR_RCR);
752 /* turn off irqs */
753 outb(0, io + IT87_CIR_IER);
754 /* fifo clear */
755 outb(IT87_CIR_TCR1_FIFOCLR, io+IT87_CIR_TCR1);
756 /* reset */
757 outb(IT87_CIR_IER_RESET, io+IT87_CIR_IER);
758 enable_irq(irq);
759 spin_unlock_irqrestore(&hardware_lock, flags);
760}
761
762
763static unsigned char it87_read(unsigned char port)
764{
765 outb(port, IT87_ADRPORT);
766 return inb(IT87_DATAPORT);
767}
768
769
770static void it87_write(unsigned char port, unsigned char data)
771{
772 outb(port, IT87_ADRPORT);
773 outb(data, IT87_DATAPORT);
774}
775
776
777/* SECTION: Initialisation */
778
779static int init_port(void)
780{
781 unsigned long hw_flags;
782 int retval = 0;
783
784 unsigned char init_bytes[4] = IT87_INIT;
785 unsigned char it87_chipid = 0;
786 unsigned char ldn = 0;
787 unsigned int it87_io = 0;
788 unsigned int it87_irq = 0;
789
790 /* Enter MB PnP Mode */
791 outb(init_bytes[0], IT87_ADRPORT);
792 outb(init_bytes[1], IT87_ADRPORT);
793 outb(init_bytes[2], IT87_ADRPORT);
794 outb(init_bytes[3], IT87_ADRPORT);
795
796 /* 8712 or 8705 ? */
797 it87_chipid = it87_read(IT87_CHIP_ID1);
798 if (it87_chipid != 0x87) {
799 retval = -ENXIO;
800 return retval;
801 }
802 it87_chipid = it87_read(IT87_CHIP_ID2);
803 if ((it87_chipid != 0x05) &&
804 (it87_chipid != 0x12) &&
805 (it87_chipid != 0x18) &&
806 (it87_chipid != 0x20)) {
807 printk(KERN_INFO LIRC_DRIVER_NAME
808 ": no IT8704/05/12/18/20 found (claimed IT87%02x), "
809 "exiting..\n", it87_chipid);
810 retval = -ENXIO;
811 return retval;
812 }
813 printk(KERN_INFO LIRC_DRIVER_NAME
814 ": found IT87%02x.\n",
815 it87_chipid);
816
817 /* get I/O-Port and IRQ */
818 if (it87_chipid == 0x12 || it87_chipid == 0x18)
819 ldn = IT8712_CIR_LDN;
820 else
821 ldn = IT8705_CIR_LDN;
822 it87_write(IT87_LDN, ldn);
823
824 it87_io = it87_read(IT87_CIR_BASE_MSB) * 256 +
825 it87_read(IT87_CIR_BASE_LSB);
826 if (it87_io == 0) {
827 if (io == 0)
828 io = IT87_CIR_DEFAULT_IOBASE;
829 printk(KERN_INFO LIRC_DRIVER_NAME
830 ": set default io 0x%x\n",
831 io);
832 it87_write(IT87_CIR_BASE_MSB, io / 0x100);
833 it87_write(IT87_CIR_BASE_LSB, io % 0x100);
834 } else
835 io = it87_io;
836
837 it87_irq = it87_read(IT87_CIR_IRQ);
838 if (digimatrix || it87_irq == 0) {
839 if (irq == 0)
840 irq = IT87_CIR_DEFAULT_IRQ;
841 printk(KERN_INFO LIRC_DRIVER_NAME
842 ": set default irq 0x%x\n",
843 irq);
844 it87_write(IT87_CIR_IRQ, irq);
845 } else
846 irq = it87_irq;
847
848 spin_lock_irqsave(&hardware_lock, hw_flags);
849 /* reset */
850 outb(IT87_CIR_IER_RESET, io+IT87_CIR_IER);
851 /* fifo clear */
852 outb(IT87_CIR_TCR1_FIFOCLR |
853 /* IT87_CIR_TCR1_ILE | */
854 IT87_CIR_TCR1_TXRLE |
855 IT87_CIR_TCR1_TXENDF, io+IT87_CIR_TCR1);
856 spin_unlock_irqrestore(&hardware_lock, hw_flags);
857
858 /* get I/O port access and IRQ line */
859 if (request_region(io, 8, LIRC_DRIVER_NAME) == NULL) {
860 printk(KERN_ERR LIRC_DRIVER_NAME
861 ": i/o port 0x%.4x already in use.\n", io);
862 /* Leaving MB PnP Mode */
863 it87_write(IT87_CFGCTRL, 0x2);
864 return -EBUSY;
865 }
866
867 /* activate CIR-Device */
868 it87_write(IT87_CIR_ACT, 0x1);
869
870 /* Leaving MB PnP Mode */
871 it87_write(IT87_CFGCTRL, 0x2);
872
873 retval = request_irq(irq, it87_interrupt, 0 /*IRQF_DISABLED*/,
874 LIRC_DRIVER_NAME, NULL);
875 if (retval < 0) {
876 printk(KERN_ERR LIRC_DRIVER_NAME
877 ": IRQ %d already in use.\n",
878 irq);
879 release_region(io, 8);
880 return retval;
881 }
882
883 printk(KERN_INFO LIRC_DRIVER_NAME
884 ": I/O port 0x%.4x, IRQ %d.\n", io, irq);
885
886 init_timer(&timerlist);
887 timerlist.function = it87_timeout;
888 timerlist.data = 0xabadcafe;
889
890 return 0;
891}
892
893
894static void drop_port(void)
895{
896#if 0
897 unsigned char init_bytes[4] = IT87_INIT;
898
899 /* Enter MB PnP Mode */
900 outb(init_bytes[0], IT87_ADRPORT);
901 outb(init_bytes[1], IT87_ADRPORT);
902 outb(init_bytes[2], IT87_ADRPORT);
903 outb(init_bytes[3], IT87_ADRPORT);
904
905 /* deactivate CIR-Device */
906 it87_write(IT87_CIR_ACT, 0x0);
907
908 /* Leaving MB PnP Mode */
909 it87_write(IT87_CFGCTRL, 0x2);
910#endif
911
912 del_timer_sync(&timerlist);
913 free_irq(irq, NULL);
914 release_region(io, 8);
915}
916
917
918static int init_lirc_it87(void)
919{
920 int retval;
921
922 init_waitqueue_head(&lirc_read_queue);
923 retval = init_port();
924 if (retval < 0)
925 return retval;
926 init_hardware();
927 printk(KERN_INFO LIRC_DRIVER_NAME ": Installed.\n");
928 return 0;
929}
930
931static int it87_probe(struct pnp_dev *pnp_dev,
932 const struct pnp_device_id *dev_id)
933{
934 int retval;
935
936 driver.dev = &pnp_dev->dev;
937
938 retval = init_chrdev();
939 if (retval < 0)
940 return retval;
941
942 retval = init_lirc_it87();
943 if (retval)
944 goto init_lirc_it87_failed;
945
946 return 0;
947
948init_lirc_it87_failed:
949 drop_chrdev();
950
951 return retval;
952}
953
954static int __init lirc_it87_init(void)
955{
956 return pnp_register_driver(&it87_pnp_driver);
957}
958
959
960static void __exit lirc_it87_exit(void)
961{
962 drop_hardware();
963 drop_chrdev();
964 drop_port();
965 pnp_unregister_driver(&it87_pnp_driver);
966 printk(KERN_INFO LIRC_DRIVER_NAME ": Uninstalled.\n");
967}
968
4c8fa381 969/* SECTION: PNP for ITE8704/13/18 */
c147f907
JW		 970
971static const struct pnp_device_id pnp_dev_table[] = {
972 {"ITE8704", 0},
4c8fa381 973 {"ITE8713", 0},
c147f907
JW		 974 {}
975};
976
977MODULE_DEVICE_TABLE(pnp, pnp_dev_table);
978
979static struct pnp_driver it87_pnp_driver = {
980 .name = LIRC_DRIVER_NAME,
981 .id_table = pnp_dev_table,
982 .probe = it87_probe,
983};
984
985module_init(lirc_it87_init);
986module_exit(lirc_it87_exit);
987
988MODULE_DESCRIPTION("LIRC driver for ITE IT8704/05/12/18/20 CIR port");
989MODULE_AUTHOR("Hans-Gunter Lutke Uphues");
990MODULE_LICENSE("GPL");
991
992module_param(io, int, S_IRUGO);
993MODULE_PARM_DESC(io, "I/O base address (default: 0x310)");
994
995module_param(irq, int, S_IRUGO);
996#ifdef LIRC_IT87_DIGIMATRIX
997MODULE_PARM_DESC(irq, "Interrupt (1,3-12) (default: 9)");
998#else
999MODULE_PARM_DESC(irq, "Interrupt (1,3-12) (default: 7)");
1000#endif
1001
1002module_param(it87_enable_demodulator, bool, S_IRUGO);
1003MODULE_PARM_DESC(it87_enable_demodulator,
1004 "Receiver demodulator enable/disable (1/0), default: 0");
1005
1006module_param(debug, bool, S_IRUGO | S_IWUSR);
1007MODULE_PARM_DESC(debug, "Enable debugging messages");
1008
1009module_param(digimatrix, bool, S_IRUGO | S_IWUSR);
1010#ifdef LIRC_IT87_DIGIMATRIX
1011MODULE_PARM_DESC(digimatrix,
1012 "Asus Digimatrix it87 compat. enable/disable (1/0), default: 1");
1013#else
1014MODULE_PARM_DESC(digimatrix,
1015 "Asus Digimatrix it87 compat. enable/disable (1/0), default: 0");
1016#endif
1017
1018
1019module_param(it87_freq, int, S_IRUGO);
1020#ifdef LIRC_IT87_DIGIMATRIX
1021MODULE_PARM_DESC(it87_freq,
1022 "Carrier demodulator frequency (kHz), (default: 36)");
1023#else
1024MODULE_PARM_DESC(it87_freq,
1025 "Carrier demodulator frequency (kHz), (default: 38)");
1026#endif
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