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[net-next-2.6.git] / drivers / staging / lirc / lirc_it87.c
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c147f907
JW		 1/*
2 * LIRC driver for ITE IT8712/IT8705 CIR port
3 *
4 * Copyright (C) 2001 Hans-Gunter Lutke Uphues <hg_lu@web.de>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of the
9 * License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
19 * USA
20 *
21 * ITE IT8705 and IT8712(not tested) and IT8720 CIR-port support for lirc based
22 * via cut and paste from lirc_sir.c (C) 2000 Milan Pikula
23 *
24 * Attention: Sendmode only tested with debugging logs
25 *
26 * 2001/02/27 Christoph Bartelmus <lirc@bartelmus.de> :
27 * reimplemented read function
28 * 2005/06/05 Andrew Calkin implemented support for Asus Digimatrix,
29 * based on work of the following member of the Outertrack Digimatrix
30 * Forum: Art103 <r_tay@hotmail.com>
31 * 2009/12/24 James Edwards <jimbo-lirc@edwardsclan.net> implemeted support
32 * for ITE8704/ITE8718, on my machine, the DSDT reports 8704, but the
33 * chip identifies as 18.
34 */
35
36#include <linux/module.h>
37#include <linux/sched.h>
38#include <linux/errno.h>
39#include <linux/signal.h>
40#include <linux/fs.h>
41#include <linux/interrupt.h>
42#include <linux/ioport.h>
43#include <linux/kernel.h>
44#include <linux/time.h>
45#include <linux/string.h>
46#include <linux/types.h>
47#include <linux/wait.h>
48#include <linux/mm.h>
49#include <linux/delay.h>
50#include <linux/poll.h>
51#include <asm/system.h>
52#include <linux/io.h>
53#include <linux/irq.h>
54#include <linux/fcntl.h>
55
56#include <linux/timer.h>
57#include <linux/pnp.h>
58
59#include <media/lirc.h>
60#include <media/lirc_dev.h>
61
62#include "lirc_it87.h"
63
64#ifdef LIRC_IT87_DIGIMATRIX
65static int digimatrix = 1;
66static int it87_freq = 36; /* kHz */
67static int irq = 9;
68#else
69static int digimatrix;
70static int it87_freq = 38; /* kHz */
71static int irq = IT87_CIR_DEFAULT_IRQ;
72#endif
73
74static unsigned long it87_bits_in_byte_out;
75static unsigned long it87_send_counter;
76static unsigned char it87_RXEN_mask = IT87_CIR_RCR_RXEN;
77
78#define RBUF_LEN 1024
79
80#define LIRC_DRIVER_NAME "lirc_it87"
81
82/* timeout for sequences in jiffies (=5/100s) */
83/* must be longer than TIME_CONST */
84#define IT87_TIMEOUT (HZ*5/100)
85
86/* module parameters */
87static int debug;
88#define dprintk(fmt, args...) \
89 do { \
90 if (debug) \
91 printk(KERN_DEBUG LIRC_DRIVER_NAME ": " \
92 fmt, ## args); \
93 } while (0)
94
95static int io = IT87_CIR_DEFAULT_IOBASE;
96/* receiver demodulator default: off */
97static int it87_enable_demodulator;
98
99static int timer_enabled;
100static DEFINE_SPINLOCK(timer_lock);
101static struct timer_list timerlist;
102/* time of last signal change detected */
103static struct timeval last_tv = {0, 0};
104/* time of last UART data ready interrupt */
105static struct timeval last_intr_tv = {0, 0};
106static int last_value;
107
108static DECLARE_WAIT_QUEUE_HEAD(lirc_read_queue);
109
110static DEFINE_SPINLOCK(hardware_lock);
111static DEFINE_SPINLOCK(dev_lock);
82ce67bf 112static bool device_open;
c147f907
JW		 113
114static int rx_buf[RBUF_LEN];
115unsigned int rx_tail, rx_head;
116
117static struct pnp_driver it87_pnp_driver;
118
119/* SECTION: Prototypes */
120
121/* Communication with user-space */
122static int lirc_open(struct inode *inode, struct file *file);
123static int lirc_close(struct inode *inode, struct file *file);
124static unsigned int lirc_poll(struct file *file, poll_table *wait);
125static ssize_t lirc_read(struct file *file, char *buf,
126 size_t count, loff_t *ppos);
127static ssize_t lirc_write(struct file *file, const char *buf,
128 size_t n, loff_t *pos);
129static long lirc_ioctl(struct file *filep, unsigned int cmd, unsigned long arg);
130static void add_read_queue(int flag, unsigned long val);
131static int init_chrdev(void);
132static void drop_chrdev(void);
133/* Hardware */
134static irqreturn_t it87_interrupt(int irq, void *dev_id);
135static void send_space(unsigned long len);
136static void send_pulse(unsigned long len);
137static void init_send(void);
138static void terminate_send(unsigned long len);
139static int init_hardware(void);
140static void drop_hardware(void);
141/* Initialisation */
142static int init_port(void);
143static void drop_port(void);
144
145
146/* SECTION: Communication with user-space */
147
148static int lirc_open(struct inode *inode, struct file *file)
149{
150 spin_lock(&dev_lock);
82ce67bf 151 if (device_open) {
c147f907
JW		 152 spin_unlock(&dev_lock);
153 return -EBUSY;
154 }
82ce67bf 155 device_open = true;
c147f907
JW		 156 spin_unlock(&dev_lock);
157 return 0;
158}
159
160
161static int lirc_close(struct inode *inode, struct file *file)
162{
82ce67bf
JW		 163 spin_lock(&dev_lock);
164 device_open = false;
165 spin_unlock(&dev_lock);
c147f907
JW		 166 return 0;
167}
168
169
170static unsigned int lirc_poll(struct file *file, poll_table *wait)
171{
172 poll_wait(file, &lirc_read_queue, wait);
173 if (rx_head != rx_tail)
174 return POLLIN | POLLRDNORM;
175 return 0;
176}
177
178
179static ssize_t lirc_read(struct file *file, char *buf,
180 size_t count, loff_t *ppos)
181{
182 int n = 0;
183 int retval = 0;
184
185 while (n < count) {
186 if (file->f_flags & O_NONBLOCK && rx_head == rx_tail) {
187 retval = -EAGAIN;
188 break;
189 }
190 retval = wait_event_interruptible(lirc_read_queue,
191 rx_head != rx_tail);
192 if (retval)
193 break;
194
195 if (copy_to_user((void *) buf + n, (void *) (rx_buf + rx_head),
196 sizeof(int))) {
197 retval = -EFAULT;
198 break;
199 }
200 rx_head = (rx_head + 1) & (RBUF_LEN - 1);
201 n += sizeof(int);
202 }
203 if (n)
204 return n;
205 return retval;
206}
207
208
209static ssize_t lirc_write(struct file *file, const char *buf,
210 size_t n, loff_t *pos)
211{
212 int i = 0;
213 int *tx_buf;
214
215 if (n % sizeof(int))
216 return -EINVAL;
217 tx_buf = memdup_user(buf, n);
218 if (IS_ERR(tx_buf))
219 return PTR_ERR(tx_buf);
220 n /= sizeof(int);
221 init_send();
222 while (1) {
223 if (i >= n)
224 break;
225 if (tx_buf[i])
226 send_pulse(tx_buf[i]);
227 i++;
228 if (i >= n)
229 break;
230 if (tx_buf[i])
231 send_space(tx_buf[i]);
232 i++;
233 }
234 terminate_send(tx_buf[i - 1]);
235 return n;
236}
237
238
239static long lirc_ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
240{
241 int retval = 0;
242 unsigned long value = 0;
243 unsigned int ivalue;
244 unsigned long hw_flags;
245
246 if (cmd == LIRC_GET_FEATURES)
247 value = LIRC_CAN_SEND_PULSE |
248 LIRC_CAN_SET_SEND_CARRIER |
249 LIRC_CAN_REC_MODE2;
250 else if (cmd == LIRC_GET_SEND_MODE)
251 value = LIRC_MODE_PULSE;
252 else if (cmd == LIRC_GET_REC_MODE)
253 value = LIRC_MODE_MODE2;
254
255 switch (cmd) {
256 case LIRC_GET_FEATURES:
257 case LIRC_GET_SEND_MODE:
258 case LIRC_GET_REC_MODE:
259 retval = put_user(value, (unsigned long *) arg);
260 break;
261
262 case LIRC_SET_SEND_MODE:
263 case LIRC_SET_REC_MODE:
264 retval = get_user(value, (unsigned long *) arg);
265 break;
266
267 case LIRC_SET_SEND_CARRIER:
268 retval = get_user(ivalue, (unsigned int *) arg);
269 if (retval)
270 return retval;
271 ivalue /= 1000;
272 if (ivalue > IT87_CIR_FREQ_MAX ||
273 ivalue < IT87_CIR_FREQ_MIN)
274 return -EINVAL;
275
276 it87_freq = ivalue;
277
278 spin_lock_irqsave(&hardware_lock, hw_flags);
279 outb(((inb(io + IT87_CIR_TCR2) & IT87_CIR_TCR2_TXMPW) |
280 (it87_freq - IT87_CIR_FREQ_MIN) << 3),
281 io + IT87_CIR_TCR2);
282 spin_unlock_irqrestore(&hardware_lock, hw_flags);
283 dprintk("demodulation frequency: %d kHz\n", it87_freq);
284
285 break;
286
287 default:
288 retval = -EINVAL;
289 }
290
291 if (retval)
292 return retval;
293
294 if (cmd == LIRC_SET_REC_MODE) {
295 if (value != LIRC_MODE_MODE2)
296 retval = -ENOSYS;
297 } else if (cmd == LIRC_SET_SEND_MODE) {
298 if (value != LIRC_MODE_PULSE)
299 retval = -ENOSYS;
300 }
301 return retval;
302}
303
304static void add_read_queue(int flag, unsigned long val)
305{
306 unsigned int new_rx_tail;
307 int newval;
308
309 dprintk("add flag %d with val %lu\n", flag, val);
310
311 newval = val & PULSE_MASK;
312
313 /*
314 * statistically, pulses are ~TIME_CONST/2 too long. we could
315 * maybe make this more exact, but this is good enough
316 */
317 if (flag) {
318 /* pulse */
319 if (newval > TIME_CONST / 2)
320 newval -= TIME_CONST / 2;
321 else /* should not ever happen */
322 newval = 1;
323 newval |= PULSE_BIT;
324 } else
325 newval += TIME_CONST / 2;
326 new_rx_tail = (rx_tail + 1) & (RBUF_LEN - 1);
327 if (new_rx_tail == rx_head) {
328 dprintk("Buffer overrun.\n");
329 return;
330 }
331 rx_buf[rx_tail] = newval;
332 rx_tail = new_rx_tail;
333 wake_up_interruptible(&lirc_read_queue);
334}
335
336
0f9313ad 337static const struct file_operations lirc_fops = {
c147f907
JW		 338 .owner = THIS_MODULE,
339 .read = lirc_read,
340 .write = lirc_write,
341 .poll = lirc_poll,
342 .unlocked_ioctl = lirc_ioctl,
343 .open = lirc_open,
344 .release = lirc_close,
6038f373 345 .llseek = noop_llseek,
c147f907
JW		 346};
347
348static int set_use_inc(void *data)
349{
350 return 0;
351}
352
353static void set_use_dec(void *data)
354{
355}
356
357static struct lirc_driver driver = {
358 .name = LIRC_DRIVER_NAME,
359 .minor = -1,
360 .code_length = 1,
361 .sample_rate = 0,
362 .data = NULL,
363 .add_to_buf = NULL,
364 .set_use_inc = set_use_inc,
365 .set_use_dec = set_use_dec,
366 .fops = &lirc_fops,
367 .dev = NULL,
368 .owner = THIS_MODULE,
369};
370
371
c147f907
JW		 372static int init_chrdev(void)
373{
374 driver.minor = lirc_register_driver(&driver);
375
376 if (driver.minor < 0) {
377 printk(KERN_ERR LIRC_DRIVER_NAME ": init_chrdev() failed.\n");
378 return -EIO;
379 }
380 return 0;
381}
382
383
384static void drop_chrdev(void)
385{
386 lirc_unregister_driver(driver.minor);
387}
c147f907
JW		 388
389
390/* SECTION: Hardware */
391static long delta(struct timeval *tv1, struct timeval *tv2)
392{
393 unsigned long deltv;
394
395 deltv = tv2->tv_sec - tv1->tv_sec;
396 if (deltv > 15)
397 deltv = 0xFFFFFF;
398 else
399 deltv = deltv*1000000 + tv2->tv_usec - tv1->tv_usec;
400 return deltv;
401}
402
403static void it87_timeout(unsigned long data)
404{
405 unsigned long flags;
406
407 /* avoid interference with interrupt */
408 spin_lock_irqsave(&timer_lock, flags);
409
410 if (digimatrix) {
411 /* We have timed out. Disable the RX mechanism. */
412
413 outb((inb(io + IT87_CIR_RCR) & ~IT87_CIR_RCR_RXEN) |
414 IT87_CIR_RCR_RXACT, io + IT87_CIR_RCR);
415 if (it87_RXEN_mask)
416 outb(inb(io + IT87_CIR_RCR) | IT87_CIR_RCR_RXEN,
417 io + IT87_CIR_RCR);
418 dprintk(" TIMEOUT\n");
419 timer_enabled = 0;
420
421 /* fifo clear */
422 outb(inb(io + IT87_CIR_TCR1) | IT87_CIR_TCR1_FIFOCLR,
423 io+IT87_CIR_TCR1);
424
425 } else {
426 /*
427 * if last received signal was a pulse, but receiving stopped
428 * within the 9 bit frame, we need to finish this pulse and
429 * simulate a signal change to from pulse to space. Otherwise
430 * upper layers will receive two sequences next time.
431 */
432
433 if (last_value) {
434 unsigned long pulse_end;
435
436 /* determine 'virtual' pulse end: */
437 pulse_end = delta(&last_tv, &last_intr_tv);
438 dprintk("timeout add %d for %lu usec\n",
439 last_value, pulse_end);
440 add_read_queue(last_value, pulse_end);
441 last_value = 0;
442 last_tv = last_intr_tv;
443 }
444 }
445 spin_unlock_irqrestore(&timer_lock, flags);
446}
447
448static irqreturn_t it87_interrupt(int irq, void *dev_id)
449{
450 unsigned char data;
451 struct timeval curr_tv;
452 static unsigned long deltv;
453 unsigned long deltintrtv;
454 unsigned long flags, hw_flags;
455 int iir, lsr;
456 int fifo = 0;
457 static char lastbit;
458 char bit;
459
460 /* Bit duration in microseconds */
461 const unsigned long bit_duration = 1000000ul /
462 (115200 / IT87_CIR_BAUDRATE_DIVISOR);
463
464
465 iir = inb(io + IT87_CIR_IIR);
466
467 switch (iir & IT87_CIR_IIR_IID) {
468 case 0x4:
469 case 0x6:
470 lsr = inb(io + IT87_CIR_RSR) & (IT87_CIR_RSR_RXFTO |
471 IT87_CIR_RSR_RXFBC);
472 fifo = lsr & IT87_CIR_RSR_RXFBC;
473 dprintk("iir: 0x%x fifo: 0x%x\n", iir, lsr);
474
475 /* avoid interference with timer */
476 spin_lock_irqsave(&timer_lock, flags);
477 spin_lock_irqsave(&hardware_lock, hw_flags);
478 if (digimatrix) {
479 static unsigned long acc_pulse;
480 static unsigned long acc_space;
481
482 do {
483 data = inb(io + IT87_CIR_DR);
484 data = ~data;
485 fifo--;
486 if (data != 0x00) {
487 if (timer_enabled)
488 del_timer(&timerlist);
489 /*
490 * start timer for end of
491 * sequence detection
492 */
493 timerlist.expires = jiffies +
494 IT87_TIMEOUT;
495 add_timer(&timerlist);
496 timer_enabled = 1;
497 }
498 /* Loop through */
499 for (bit = 0; bit < 8; ++bit) {
500 if ((data >> bit) & 1) {
501 ++acc_pulse;
502 if (lastbit == 0) {
503 add_read_queue(0,
504 acc_space *
505 bit_duration);
506 acc_space = 0;
507 }
508 } else {
509 ++acc_space;
510 if (lastbit == 1) {
511 add_read_queue(1,
512 acc_pulse *
513 bit_duration);
514 acc_pulse = 0;
515 }
516 }
517 lastbit = (data >> bit) & 1;
518 }
519
520 } while (fifo != 0);
521 } else { /* Normal Operation */
522 do {
523 del_timer(&timerlist);
524 data = inb(io + IT87_CIR_DR);
525
526 dprintk("data=%02x\n", data);
527 do_gettimeofday(&curr_tv);
528 deltv = delta(&last_tv, &curr_tv);
529 deltintrtv = delta(&last_intr_tv, &curr_tv);
530
531 dprintk("t %lu , d %d\n",
532 deltintrtv, (int)data);
533
534 /*
535 * if nothing came in last 2 cycles,
536 * it was gap
537 */
538 if (deltintrtv > TIME_CONST * 2) {
539 if (last_value) {
540 dprintk("GAP\n");
541
542 /* simulate signal change */
543 add_read_queue(last_value,
544 deltv -
545 deltintrtv);
546 last_value = 0;
547 last_tv.tv_sec =
548 last_intr_tv.tv_sec;
549 last_tv.tv_usec =
550 last_intr_tv.tv_usec;
551 deltv = deltintrtv;
552 }
553 }
554 data = 1;
555 if (data ^ last_value) {
556 /*
557 * deltintrtv > 2*TIME_CONST,
558 * remember ? the other case is
559 * timeout
560 */
561 add_read_queue(last_value,
562 deltv-TIME_CONST);
563 last_value = data;
564 last_tv = curr_tv;
565 if (last_tv.tv_usec >= TIME_CONST)
566 last_tv.tv_usec -= TIME_CONST;
567 else {
568 last_tv.tv_sec--;
569 last_tv.tv_usec += 1000000 -
570 TIME_CONST;
571 }
572 }
573 last_intr_tv = curr_tv;
574 if (data) {
575 /*
576 * start timer for end of
577 * sequence detection
578 */
579 timerlist.expires =
580 jiffies + IT87_TIMEOUT;
581 add_timer(&timerlist);
582 }
583 outb((inb(io + IT87_CIR_RCR) &
584 ~IT87_CIR_RCR_RXEN) |
585 IT87_CIR_RCR_RXACT,
586 io + IT87_CIR_RCR);
587 if (it87_RXEN_mask)
588 outb(inb(io + IT87_CIR_RCR) |
589 IT87_CIR_RCR_RXEN,
590 io + IT87_CIR_RCR);
591 fifo--;
592 } while (fifo != 0);
593 }
594 spin_unlock_irqrestore(&hardware_lock, hw_flags);
595 spin_unlock_irqrestore(&timer_lock, flags);
596
597 return IRQ_RETVAL(IRQ_HANDLED);
598
599 default:
600 /* not our irq */
601 dprintk("unknown IRQ (shouldn't happen) !!\n");
602 return IRQ_RETVAL(IRQ_NONE);
603 }
604}
605
606
607static void send_it87(unsigned long len, unsigned long stime,
608 unsigned char send_byte, unsigned int count_bits)
609{
610 long count = len / stime;
611 long time_left = 0;
612 static unsigned char byte_out;
613 unsigned long hw_flags;
614
615 dprintk("%s: len=%ld, sb=%d\n", __func__, len, send_byte);
616
617 time_left = (long)len - (long)count * (long)stime;
618 count += ((2 * time_left) / stime);
619 while (count) {
620 long i = 0;
621 for (i = 0; i < count_bits; i++) {
622 byte_out = (byte_out << 1) | (send_byte & 1);
623 it87_bits_in_byte_out++;
624 }
625 if (it87_bits_in_byte_out == 8) {
626 dprintk("out=0x%x, tsr_txfbc: 0x%x\n",
627 byte_out,
628 inb(io + IT87_CIR_TSR) &
629 IT87_CIR_TSR_TXFBC);
630
631 while ((inb(io + IT87_CIR_TSR) &
632 IT87_CIR_TSR_TXFBC) >= IT87_CIR_FIFO_SIZE)
633 ;
634
635 spin_lock_irqsave(&hardware_lock, hw_flags);
636 outb(byte_out, io + IT87_CIR_DR);
637 spin_unlock_irqrestore(&hardware_lock, hw_flags);
638
639 it87_bits_in_byte_out = 0;
640 it87_send_counter++;
641 byte_out = 0;
642 }
643 count--;
644 }
645}
646
647
648/*TODO: maybe exchange space and pulse because it8705 only modulates 0-bits */
649
650static void send_space(unsigned long len)
651{
652 send_it87(len, TIME_CONST, IT87_CIR_SPACE, IT87_CIR_BAUDRATE_DIVISOR);
653}
654
655static void send_pulse(unsigned long len)
656{
657 send_it87(len, TIME_CONST, IT87_CIR_PULSE, IT87_CIR_BAUDRATE_DIVISOR);
658}
659
660
661static void init_send()
662{
663 unsigned long flags;
664
665 spin_lock_irqsave(&hardware_lock, flags);
666 /* RXEN=0: receiver disable */
667 it87_RXEN_mask = 0;
668 outb(inb(io + IT87_CIR_RCR) & ~IT87_CIR_RCR_RXEN,
669 io + IT87_CIR_RCR);
670 spin_unlock_irqrestore(&hardware_lock, flags);
671 it87_bits_in_byte_out = 0;
672 it87_send_counter = 0;
673}
674
675
676static void terminate_send(unsigned long len)
677{
678 unsigned long flags;
679 unsigned long last = 0;
680
681 last = it87_send_counter;
682 /* make sure all necessary data has been sent */
683 while (last == it87_send_counter)
684 send_space(len);
685 /* wait until all data sent */
686 while ((inb(io + IT87_CIR_TSR) & IT87_CIR_TSR_TXFBC) != 0)
687 ;
688 /* then re-enable receiver */
689 spin_lock_irqsave(&hardware_lock, flags);
690 it87_RXEN_mask = IT87_CIR_RCR_RXEN;
691 outb(inb(io + IT87_CIR_RCR) | IT87_CIR_RCR_RXEN,
692 io + IT87_CIR_RCR);
693 spin_unlock_irqrestore(&hardware_lock, flags);
694}
695
696
697static int init_hardware(void)
698{
699 unsigned long flags;
700 unsigned char it87_rcr = 0;
701
702 spin_lock_irqsave(&hardware_lock, flags);
703 /* init cir-port */
704 /* enable r/w-access to Baudrate-Register */
705 outb(IT87_CIR_IER_BR, io + IT87_CIR_IER);
706 outb(IT87_CIR_BAUDRATE_DIVISOR % 0x100, io+IT87_CIR_BDLR);
707 outb(IT87_CIR_BAUDRATE_DIVISOR / 0x100, io+IT87_CIR_BDHR);
708 /* Baudrate Register off, define IRQs: Input only */
709 if (digimatrix) {
710 outb(IT87_CIR_IER_IEC | IT87_CIR_IER_RFOIE, io + IT87_CIR_IER);
711 /* RX: HCFS=0, RXDCR = 001b (33,75..38,25 kHz), RXEN=1 */
712 } else {
713 outb(IT87_CIR_IER_IEC | IT87_CIR_IER_RDAIE, io + IT87_CIR_IER);
714 /* RX: HCFS=0, RXDCR = 001b (35,6..40,3 kHz), RXEN=1 */
715 }
716 it87_rcr = (IT87_CIR_RCR_RXEN & it87_RXEN_mask) | 0x1;
717 if (it87_enable_demodulator)
718 it87_rcr |= IT87_CIR_RCR_RXEND;
719 outb(it87_rcr, io + IT87_CIR_RCR);
720 if (digimatrix) {
721 /* Set FIFO depth to 1 byte, and disable TX */
722 outb(inb(io + IT87_CIR_TCR1) | 0x00,
723 io + IT87_CIR_TCR1);
724
725 /*
726 * TX: it87_freq (36kHz), 'reserved' sensitivity
727 * setting (0x00)
728 */
729 outb(((it87_freq - IT87_CIR_FREQ_MIN) << 3) | 0x00,
730 io + IT87_CIR_TCR2);
731 } else {
732 /* TX: 38kHz, 13,3us (pulse-width) */
733 outb(((it87_freq - IT87_CIR_FREQ_MIN) << 3) | 0x06,
734 io + IT87_CIR_TCR2);
735 }
736 spin_unlock_irqrestore(&hardware_lock, flags);
737 return 0;
738}
739
740
741static void drop_hardware(void)
742{
743 unsigned long flags;
744
745 spin_lock_irqsave(&hardware_lock, flags);
746 disable_irq(irq);
747 /* receiver disable */
748 it87_RXEN_mask = 0;
749 outb(0x1, io + IT87_CIR_RCR);
750 /* turn off irqs */
751 outb(0, io + IT87_CIR_IER);
752 /* fifo clear */
753 outb(IT87_CIR_TCR1_FIFOCLR, io+IT87_CIR_TCR1);
754 /* reset */
755 outb(IT87_CIR_IER_RESET, io+IT87_CIR_IER);
756 enable_irq(irq);
757 spin_unlock_irqrestore(&hardware_lock, flags);
758}
759
760
761static unsigned char it87_read(unsigned char port)
762{
763 outb(port, IT87_ADRPORT);
764 return inb(IT87_DATAPORT);
765}
766
767
768static void it87_write(unsigned char port, unsigned char data)
769{
770 outb(port, IT87_ADRPORT);
771 outb(data, IT87_DATAPORT);
772}
773
774
775/* SECTION: Initialisation */
776
777static int init_port(void)
778{
779 unsigned long hw_flags;
780 int retval = 0;
781
782 unsigned char init_bytes[4] = IT87_INIT;
783 unsigned char it87_chipid = 0;
784 unsigned char ldn = 0;
785 unsigned int it87_io = 0;
786 unsigned int it87_irq = 0;
787
788 /* Enter MB PnP Mode */
789 outb(init_bytes[0], IT87_ADRPORT);
790 outb(init_bytes[1], IT87_ADRPORT);
791 outb(init_bytes[2], IT87_ADRPORT);
792 outb(init_bytes[3], IT87_ADRPORT);
793
794 /* 8712 or 8705 ? */
795 it87_chipid = it87_read(IT87_CHIP_ID1);
796 if (it87_chipid != 0x87) {
797 retval = -ENXIO;
798 return retval;
799 }
800 it87_chipid = it87_read(IT87_CHIP_ID2);
801 if ((it87_chipid != 0x05) &&
802 (it87_chipid != 0x12) &&
803 (it87_chipid != 0x18) &&
804 (it87_chipid != 0x20)) {
805 printk(KERN_INFO LIRC_DRIVER_NAME
806 ": no IT8704/05/12/18/20 found (claimed IT87%02x), "
807 "exiting..\n", it87_chipid);
808 retval = -ENXIO;
809 return retval;
810 }
811 printk(KERN_INFO LIRC_DRIVER_NAME
812 ": found IT87%02x.\n",
813 it87_chipid);
814
815 /* get I/O-Port and IRQ */
816 if (it87_chipid == 0x12 || it87_chipid == 0x18)
817 ldn = IT8712_CIR_LDN;
818 else
819 ldn = IT8705_CIR_LDN;
820 it87_write(IT87_LDN, ldn);
821
822 it87_io = it87_read(IT87_CIR_BASE_MSB) * 256 +
823 it87_read(IT87_CIR_BASE_LSB);
824 if (it87_io == 0) {
825 if (io == 0)
826 io = IT87_CIR_DEFAULT_IOBASE;
827 printk(KERN_INFO LIRC_DRIVER_NAME
828 ": set default io 0x%x\n",
829 io);
830 it87_write(IT87_CIR_BASE_MSB, io / 0x100);
831 it87_write(IT87_CIR_BASE_LSB, io % 0x100);
832 } else
833 io = it87_io;
834
835 it87_irq = it87_read(IT87_CIR_IRQ);
836 if (digimatrix || it87_irq == 0) {
837 if (irq == 0)
838 irq = IT87_CIR_DEFAULT_IRQ;
839 printk(KERN_INFO LIRC_DRIVER_NAME
840 ": set default irq 0x%x\n",
841 irq);
842 it87_write(IT87_CIR_IRQ, irq);
843 } else
844 irq = it87_irq;
845
846 spin_lock_irqsave(&hardware_lock, hw_flags);
847 /* reset */
848 outb(IT87_CIR_IER_RESET, io+IT87_CIR_IER);
849 /* fifo clear */
850 outb(IT87_CIR_TCR1_FIFOCLR |
851 /* IT87_CIR_TCR1_ILE | */
852 IT87_CIR_TCR1_TXRLE |
853 IT87_CIR_TCR1_TXENDF, io+IT87_CIR_TCR1);
854 spin_unlock_irqrestore(&hardware_lock, hw_flags);
855
856 /* get I/O port access and IRQ line */
857 if (request_region(io, 8, LIRC_DRIVER_NAME) == NULL) {
858 printk(KERN_ERR LIRC_DRIVER_NAME
859 ": i/o port 0x%.4x already in use.\n", io);
860 /* Leaving MB PnP Mode */
861 it87_write(IT87_CFGCTRL, 0x2);
862 return -EBUSY;
863 }
864
865 /* activate CIR-Device */
866 it87_write(IT87_CIR_ACT, 0x1);
867
868 /* Leaving MB PnP Mode */
869 it87_write(IT87_CFGCTRL, 0x2);
870
871 retval = request_irq(irq, it87_interrupt, 0 /*IRQF_DISABLED*/,
872 LIRC_DRIVER_NAME, NULL);
873 if (retval < 0) {
874 printk(KERN_ERR LIRC_DRIVER_NAME
875 ": IRQ %d already in use.\n",
876 irq);
877 release_region(io, 8);
878 return retval;
879 }
880
881 printk(KERN_INFO LIRC_DRIVER_NAME
882 ": I/O port 0x%.4x, IRQ %d.\n", io, irq);
883
884 init_timer(&timerlist);
885 timerlist.function = it87_timeout;
886 timerlist.data = 0xabadcafe;
887
888 return 0;
889}
890
891
892static void drop_port(void)
893{
894#if 0
895 unsigned char init_bytes[4] = IT87_INIT;
896
897 /* Enter MB PnP Mode */
898 outb(init_bytes[0], IT87_ADRPORT);
899 outb(init_bytes[1], IT87_ADRPORT);
900 outb(init_bytes[2], IT87_ADRPORT);
901 outb(init_bytes[3], IT87_ADRPORT);
902
903 /* deactivate CIR-Device */
904 it87_write(IT87_CIR_ACT, 0x0);
905
906 /* Leaving MB PnP Mode */
907 it87_write(IT87_CFGCTRL, 0x2);
908#endif
909
910 del_timer_sync(&timerlist);
911 free_irq(irq, NULL);
912 release_region(io, 8);
913}
914
915
916static int init_lirc_it87(void)
917{
918 int retval;
919
920 init_waitqueue_head(&lirc_read_queue);
921 retval = init_port();
922 if (retval < 0)
923 return retval;
924 init_hardware();
925 printk(KERN_INFO LIRC_DRIVER_NAME ": Installed.\n");
926 return 0;
927}
928
929static int it87_probe(struct pnp_dev *pnp_dev,
930 const struct pnp_device_id *dev_id)
931{
932 int retval;
933
934 driver.dev = &pnp_dev->dev;
935
936 retval = init_chrdev();
937 if (retval < 0)
938 return retval;
939
940 retval = init_lirc_it87();
941 if (retval)
942 goto init_lirc_it87_failed;
943
944 return 0;
945
946init_lirc_it87_failed:
947 drop_chrdev();
948
949 return retval;
950}
951
952static int __init lirc_it87_init(void)
953{
954 return pnp_register_driver(&it87_pnp_driver);
955}
956
957
958static void __exit lirc_it87_exit(void)
959{
960 drop_hardware();
961 drop_chrdev();
962 drop_port();
963 pnp_unregister_driver(&it87_pnp_driver);
964 printk(KERN_INFO LIRC_DRIVER_NAME ": Uninstalled.\n");
965}
966
967/* SECTION: PNP for ITE8704/18 */
968
969static const struct pnp_device_id pnp_dev_table[] = {
970 {"ITE8704", 0},
971 {}
972};
973
974MODULE_DEVICE_TABLE(pnp, pnp_dev_table);
975
976static struct pnp_driver it87_pnp_driver = {
977 .name = LIRC_DRIVER_NAME,
978 .id_table = pnp_dev_table,
979 .probe = it87_probe,
980};
981
982module_init(lirc_it87_init);
983module_exit(lirc_it87_exit);
984
985MODULE_DESCRIPTION("LIRC driver for ITE IT8704/05/12/18/20 CIR port");
986MODULE_AUTHOR("Hans-Gunter Lutke Uphues");
987MODULE_LICENSE("GPL");
988
989module_param(io, int, S_IRUGO);
990MODULE_PARM_DESC(io, "I/O base address (default: 0x310)");
991
992module_param(irq, int, S_IRUGO);
993#ifdef LIRC_IT87_DIGIMATRIX
994MODULE_PARM_DESC(irq, "Interrupt (1,3-12) (default: 9)");
995#else
996MODULE_PARM_DESC(irq, "Interrupt (1,3-12) (default: 7)");
997#endif
998
999module_param(it87_enable_demodulator, bool, S_IRUGO);
1000MODULE_PARM_DESC(it87_enable_demodulator,
1001 "Receiver demodulator enable/disable (1/0), default: 0");
1002
1003module_param(debug, bool, S_IRUGO | S_IWUSR);
1004MODULE_PARM_DESC(debug, "Enable debugging messages");
1005
1006module_param(digimatrix, bool, S_IRUGO | S_IWUSR);
1007#ifdef LIRC_IT87_DIGIMATRIX
1008MODULE_PARM_DESC(digimatrix,
1009 "Asus Digimatrix it87 compat. enable/disable (1/0), default: 1");
1010#else
1011MODULE_PARM_DESC(digimatrix,
1012 "Asus Digimatrix it87 compat. enable/disable (1/0), default: 0");
1013#endif
1014
1015
1016module_param(it87_freq, int, S_IRUGO);
1017#ifdef LIRC_IT87_DIGIMATRIX
1018MODULE_PARM_DESC(it87_freq,
1019 "Carrier demodulator frequency (kHz), (default: 36)");
1020#else
1021MODULE_PARM_DESC(it87_freq,
1022 "Carrier demodulator frequency (kHz), (default: 38)");
1023#endif
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