git://bbs.cooldavid.org / net-next-2.6.git / blame
| Commit | Line | Data |
|---|---|---|
| e79753ed PM |
1 | /* include/asm-arm/arch-msm/msm_adsp.h |
| 2 | * | |
| 3 | * Copyright (C) 2008 Google, Inc. | |
| 4 | * | |
| 5 | * This software is licensed under the terms of the GNU General Public | |
| 6 | * License version 2, as published by the Free Software Foundation, and | |
| 7 | * may be copied, distributed, and modified under those terms. | |
| 8 | * | |
| 9 | * This program is distributed in the hope that it will be useful, | |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 12 | * GNU General Public License for more details. | |
| 13 | * | |
| 14 | */ | |
| 15 | ||
| 16 | #ifndef __ASM__ARCH_MSM_ADSP_H | |
| 17 | #define __ASM__ARCH_MSM_ADSP_H | |
| 18 | ||
| 19 | struct msm_adsp_module; | |
| 20 | ||
| 21 | struct msm_adsp_ops { | |
| 22 | /* event is called from interrupt context when a message | |
| 23 | * arrives from the DSP. Use the provided function pointer | |
| 24 | * to copy the message into a local buffer. Do NOT call | |
| 25 | * it multiple times. | |
| 26 | */ | |
| 27 | void (*event)(void *driver_data, unsigned id, size_t len, | |
| 28 | void (*getevent)(void *ptr, size_t len)); | |
| 29 | }; | |
| 30 | ||
| 31 | /* Get, Put, Enable, and Disable are synchronous and must only | |
| 32 | * be called from thread context. Enable and Disable will block | |
| 33 | * up to one second in the event of a fatal DSP error but are | |
| 34 | * much faster otherwise. | |
| 35 | */ | |
| 36 | int msm_adsp_get(const char *name, struct msm_adsp_module **module, | |
| 37 | struct msm_adsp_ops *ops, void *driver_data); | |
| 38 | void msm_adsp_put(struct msm_adsp_module *module); | |
| 39 | int msm_adsp_enable(struct msm_adsp_module *module); | |
| 40 | int msm_adsp_disable(struct msm_adsp_module *module); | |
| 41 | int adsp_set_clkrate(struct msm_adsp_module *module, unsigned long clk_rate); | |
| 42 | ||
| 43 | /* Write is safe to call from interrupt context. | |
| 44 | */ | |
| 45 | int msm_adsp_write(struct msm_adsp_module *module, | |
| 46 | unsigned queue_id, | |
| 47 | void *data, size_t len); | |
| 48 | ||
| 49 | #if CONFIG_MSM_AMSS_VERSION >= 6350 | |
| 50 | /* Command Queue Indexes */ | |
| 51 | #define QDSP_lpmCommandQueue 0 | |
| 52 | #define QDSP_mpuAfeQueue 1 | |
| 53 | #define QDSP_mpuGraphicsCmdQueue 2 | |
| 54 | #define QDSP_mpuModmathCmdQueue 3 | |
| 55 | #define QDSP_mpuVDecCmdQueue 4 | |
| 56 | #define QDSP_mpuVDecPktQueue 5 | |
| 57 | #define QDSP_mpuVEncCmdQueue 6 | |
| 58 | #define QDSP_rxMpuDecCmdQueue 7 | |
| 59 | #define QDSP_rxMpuDecPktQueue 8 | |
| 60 | #define QDSP_txMpuEncQueue 9 | |
| 61 | #define QDSP_uPAudPPCmd1Queue 10 | |
| 62 | #define QDSP_uPAudPPCmd2Queue 11 | |
| 63 | #define QDSP_uPAudPPCmd3Queue 12 | |
| 64 | #define QDSP_uPAudPlay0BitStreamCtrlQueue 13 | |
| 65 | #define QDSP_uPAudPlay1BitStreamCtrlQueue 14 | |
| 66 | #define QDSP_uPAudPlay2BitStreamCtrlQueue 15 | |
| 67 | #define QDSP_uPAudPlay3BitStreamCtrlQueue 16 | |
| 68 | #define QDSP_uPAudPlay4BitStreamCtrlQueue 17 | |
| 69 | #define QDSP_uPAudPreProcCmdQueue 18 | |
| 70 | #define QDSP_uPAudRecBitStreamQueue 19 | |
| 71 | #define QDSP_uPAudRecCmdQueue 20 | |
| 72 | #define QDSP_uPDiagQueue 21 | |
| 73 | #define QDSP_uPJpegActionCmdQueue 22 | |
| 74 | #define QDSP_uPJpegCfgCmdQueue 23 | |
| 75 | #define QDSP_uPVocProcQueue 24 | |
| 76 | #define QDSP_vfeCommandQueue 25 | |
| 77 | #define QDSP_vfeCommandScaleQueue 26 | |
| 78 | #define QDSP_vfeCommandTableQueue 27 | |
| 79 | #define QDSP_MAX_NUM_QUEUES 28 | |
| 80 | #else | |
| 81 | /* Command Queue Indexes */ | |
| 82 | #define QDSP_lpmCommandQueue 0 | |
| 83 | #define QDSP_mpuAfeQueue 1 | |
| 84 | #define QDSP_mpuGraphicsCmdQueue 2 | |
| 85 | #define QDSP_mpuModmathCmdQueue 3 | |
| 86 | #define QDSP_mpuVDecCmdQueue 4 | |
| 87 | #define QDSP_mpuVDecPktQueue 5 | |
| 88 | #define QDSP_mpuVEncCmdQueue 6 | |
| 89 | #define QDSP_rxMpuDecCmdQueue 7 | |
| 90 | #define QDSP_rxMpuDecPktQueue 8 | |
| 91 | #define QDSP_txMpuEncQueue 9 | |
| 92 | #define QDSP_uPAudPPCmd1Queue 10 | |
| 93 | #define QDSP_uPAudPPCmd2Queue 11 | |
| 94 | #define QDSP_uPAudPPCmd3Queue 12 | |
| 95 | #define QDSP_uPAudPlay0BitStreamCtrlQueue 13 | |
| 96 | #define QDSP_uPAudPlay1BitStreamCtrlQueue 14 | |
| 97 | #define QDSP_uPAudPlay2BitStreamCtrlQueue 15 | |
| 98 | #define QDSP_uPAudPlay3BitStreamCtrlQueue 16 | |
| 99 | #define QDSP_uPAudPlay4BitStreamCtrlQueue 17 | |
| 100 | #define QDSP_uPAudPreProcCmdQueue 18 | |
| 101 | #define QDSP_uPAudRecBitStreamQueue 19 | |
| 102 | #define QDSP_uPAudRecCmdQueue 20 | |
| 103 | #define QDSP_uPJpegActionCmdQueue 21 | |
| 104 | #define QDSP_uPJpegCfgCmdQueue 22 | |
| 105 | #define QDSP_uPVocProcQueue 23 | |
| 106 | #define QDSP_vfeCommandQueue 24 | |
| 107 | #define QDSP_vfeCommandScaleQueue 25 | |
| 108 | #define QDSP_vfeCommandTableQueue 26 | |
| 109 | #define QDSP_QUEUE_MAX 26 | |
| 110 | #endif | |
| 111 | ||
| 112 | #endif |