[net-next-2.6.git] / drivers / sh / intc / internals.h

#include <linux/sh_intc.h>
#include <linux/irq.h>
#include <linux/list.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/radix-tree.h>
#include <linux/sysdev.h>

#define _INTC_MK(fn, mode, addr_e, addr_d, width, shift) \
	((shift) | ((width) << 5) | ((fn) << 9) | ((mode) << 13) | \
	 ((addr_e) << 16) | ((addr_d << 24)))

#define _INTC_SHIFT(h)		(h & 0x1f)
#define _INTC_WIDTH(h)		((h >> 5) & 0xf)
#define _INTC_FN(h)		((h >> 9) & 0xf)
#define _INTC_MODE(h)		((h >> 13) & 0x7)
#define _INTC_ADDR_E(h)		((h >> 16) & 0xff)
#define _INTC_ADDR_D(h)		((h >> 24) & 0xff)

#ifdef CONFIG_SMP
#define IS_SMP(x)		(x.smp)
#define INTC_REG(d, x, c)	(d->reg[(x)] + ((d->smp[(x)] & 0xff) * c))
#define SMP_NR(d, x)		((d->smp[(x)] >> 8) ? (d->smp[(x)] >> 8) : 1)
#else
#define IS_SMP(x)		0
#define INTC_REG(d, x, c)	(d->reg[(x)])
#define SMP_NR(d, x)		1
#endif

struct intc_handle_int {
	unsigned int irq;
	unsigned long handle;
};

struct intc_window {
	phys_addr_t phys;
	void __iomem *virt;
	unsigned long size;
};

struct intc_map_entry {
	intc_enum enum_id;
	struct intc_desc_int *desc;
};

struct intc_subgroup_entry {
	unsigned int pirq;
	intc_enum enum_id;
	unsigned long handle;
};

struct intc_desc_int {
	struct list_head list;
	struct sys_device sysdev;
	struct radix_tree_root tree;
	pm_message_t state;
	raw_spinlock_t lock;
	unsigned int index;
	unsigned long *reg;
#ifdef CONFIG_SMP
	unsigned long *smp;
#endif
	unsigned int nr_reg;
	struct intc_handle_int *prio;
	unsigned int nr_prio;
	struct intc_handle_int *sense;
	unsigned int nr_sense;
	struct intc_window *window;
	unsigned int nr_windows;
	struct irq_chip chip;
};


enum {
	REG_FN_ERR = 0,
	REG_FN_TEST_BASE = 1,
	REG_FN_WRITE_BASE = 5,
	REG_FN_MODIFY_BASE = 9
};

enum {	MODE_ENABLE_REG = 0, /* Bit(s) set -> interrupt enabled */
	MODE_MASK_REG,       /* Bit(s) set -> interrupt disabled */
	MODE_DUAL_REG,       /* Two registers, set bit to enable / disable */
	MODE_PRIO_REG,       /* Priority value written to enable interrupt */
	MODE_PCLR_REG,       /* Above plus all bits set to disable interrupt */
};

static inline struct intc_desc_int *get_intc_desc(unsigned int irq)
{
	struct irq_chip *chip = get_irq_chip(irq);

	return container_of(chip, struct intc_desc_int, chip);
}

/*
 * Grumble.
 */
static inline void activate_irq(int irq)
{
#ifdef CONFIG_ARM
	/* ARM requires an extra step to clear IRQ_NOREQUEST, which it
	 * sets on behalf of every irq_chip.  Also sets IRQ_NOPROBE.
	 */
	set_irq_flags(irq, IRQF_VALID);
#else
	/* same effect on other architectures */
	set_irq_noprobe(irq);
#endif
}

/* access.c */
extern unsigned long
(*intc_reg_fns[])(unsigned long addr, unsigned long h, unsigned long data);

extern unsigned long
(*intc_enable_fns[])(unsigned long addr, unsigned long handle,
		     unsigned long (*fn)(unsigned long,
				unsigned long, unsigned long),
		     unsigned int irq);
extern unsigned long
(*intc_disable_fns[])(unsigned long addr, unsigned long handle,
		      unsigned long (*fn)(unsigned long,
				unsigned long, unsigned long),
		      unsigned int irq);
extern unsigned long
(*intc_enable_noprio_fns[])(unsigned long addr, unsigned long handle,
		            unsigned long (*fn)(unsigned long,
				unsigned long, unsigned long),
			    unsigned int irq);

unsigned long intc_phys_to_virt(struct intc_desc_int *d, unsigned long address);
unsigned int intc_get_reg(struct intc_desc_int *d, unsigned long address);
unsigned int intc_set_field_from_handle(unsigned int value,
			    unsigned int field_value,
			    unsigned int handle);
unsigned long intc_get_field_from_handle(unsigned int value,
					 unsigned int handle);

/* balancing.c */
#ifdef CONFIG_INTC_BALANCING
void intc_balancing_enable(unsigned int irq);
void intc_balancing_disable(unsigned int irq);
void intc_set_dist_handle(unsigned int irq, struct intc_desc *desc,
			  struct intc_desc_int *d, intc_enum id);
#else
static inline void intc_balancing_enable(unsigned int irq) { }
static inline void intc_balancing_disable(unsigned int irq) { }
static inline void
intc_set_dist_handle(unsigned int irq, struct intc_desc *desc,
		     struct intc_desc_int *d, intc_enum id) { }
#endif

/* chip.c */
extern struct irq_chip intc_irq_chip;
void _intc_enable(unsigned int irq, unsigned long handle);

/* core.c */
extern struct list_head intc_list;
extern raw_spinlock_t intc_big_lock;
extern unsigned int nr_intc_controllers;
extern struct sysdev_class intc_sysdev_class;

unsigned int intc_get_dfl_prio_level(void);
unsigned int intc_get_prio_level(unsigned int irq);
void intc_set_prio_level(unsigned int irq, unsigned int level);

/* handle.c */
unsigned int intc_get_mask_handle(struct intc_desc *desc,
				  struct intc_desc_int *d,
				  intc_enum enum_id, int do_grps);
unsigned int intc_get_prio_handle(struct intc_desc *desc,
				  struct intc_desc_int *d,
				  intc_enum enum_id, int do_grps);
unsigned int intc_get_sense_handle(struct intc_desc *desc,
				   struct intc_desc_int *d,
				   intc_enum enum_id);
void intc_set_ack_handle(unsigned int irq, struct intc_desc *desc,
			 struct intc_desc_int *d, intc_enum id);
unsigned long intc_get_ack_handle(unsigned int irq);
void intc_enable_disable_enum(struct intc_desc *desc, struct intc_desc_int *d,
			      intc_enum enum_id, int enable);

/* virq.c */
void intc_subgroup_init(struct intc_desc *desc, struct intc_desc_int *d);
void intc_irq_xlate_set(unsigned int irq, intc_enum id, struct intc_desc_int *d);
struct intc_map_entry *intc_irq_xlate_get(unsigned int irq);
Commit	Line	Data
2be6bb0c PM	1	#include <linux/sh_intc.h>
	2	#include <linux/irq.h>
	3	#include <linux/list.h>
	4	#include <linux/kernel.h>
	5	#include <linux/types.h>
	6	#include <linux/radix-tree.h>
	7	#include <linux/sysdev.h>
	8
	9	#define _INTC_MK(fn, mode, addr_e, addr_d, width, shift) \
	10	((shift) \| ((width) << 5) \| ((fn) << 9) \| ((mode) << 13) \| \
	11	((addr_e) << 16) \| ((addr_d << 24)))
	12
	13	#define _INTC_SHIFT(h) (h & 0x1f)
	14	#define _INTC_WIDTH(h) ((h >> 5) & 0xf)
	15	#define _INTC_FN(h) ((h >> 9) & 0xf)
	16	#define _INTC_MODE(h) ((h >> 13) & 0x7)
	17	#define _INTC_ADDR_E(h) ((h >> 16) & 0xff)
	18	#define _INTC_ADDR_D(h) ((h >> 24) & 0xff)
	19
	20	#ifdef CONFIG_SMP
	21	#define IS_SMP(x) (x.smp)
	22	#define INTC_REG(d, x, c) (d->reg[(x)] + ((d->smp[(x)] & 0xff) * c))
	23	#define SMP_NR(d, x) ((d->smp[(x)] >> 8) ? (d->smp[(x)] >> 8) : 1)
	24	#else
	25	#define IS_SMP(x) 0
	26	#define INTC_REG(d, x, c) (d->reg[(x)])
	27	#define SMP_NR(d, x) 1
	28	#endif
	29
	30	struct intc_handle_int {
	31	unsigned int irq;
	32	unsigned long handle;
	33	};
	34
	35	struct intc_window {
	36	phys_addr_t phys;
	37	void __iomem *virt;
	38	unsigned long size;
	39	};
	40
	41	struct intc_map_entry {
	42	intc_enum enum_id;
	43	struct intc_desc_int *desc;
	44	};
	45
	46	struct intc_subgroup_entry {
	47	unsigned int pirq;
	48	intc_enum enum_id;
	49	unsigned long handle;
	50	};
	51
	52	struct intc_desc_int {
	53	struct list_head list;
	54	struct sys_device sysdev;
	55	struct radix_tree_root tree;
	56	pm_message_t state;
	57	raw_spinlock_t lock;
	58	unsigned int index;
	59	unsigned long *reg;
	60	#ifdef CONFIG_SMP
	61	unsigned long *smp;
	62	#endif
	63	unsigned int nr_reg;
	64	struct intc_handle_int *prio;
65	unsigned int nr_prio;
66	struct intc_handle_int *sense;
67	unsigned int nr_sense;
68	struct intc_window *window;
69	unsigned int nr_windows;
70	struct irq_chip chip;
71	};
72
73
74	enum {
75	REG_FN_ERR = 0,
76	REG_FN_TEST_BASE = 1,
77	REG_FN_WRITE_BASE = 5,
78	REG_FN_MODIFY_BASE = 9
79	};
80
81	enum { MODE_ENABLE_REG = 0, /* Bit(s) set -> interrupt enabled */
82	MODE_MASK_REG, /* Bit(s) set -> interrupt disabled */
83	MODE_DUAL_REG, /* Two registers, set bit to enable / disable */
84	MODE_PRIO_REG, /* Priority value written to enable interrupt */
85	MODE_PCLR_REG, /* Above plus all bits set to disable interrupt */
86	};
87
88	static inline struct intc_desc_int *get_intc_desc(unsigned int irq)
89	{
90	struct irq_chip *chip = get_irq_chip(irq);
91
92	return container_of(chip, struct intc_desc_int, chip);
93	}
94
95	/*
96	* Grumble.
97	*/
98	static inline void activate_irq(int irq)
99	{
100	#ifdef CONFIG_ARM
101	/* ARM requires an extra step to clear IRQ_NOREQUEST, which it
102	* sets on behalf of every irq_chip. Also sets IRQ_NOPROBE.
103	*/
104	set_irq_flags(irq, IRQF_VALID);
105	#else
106	/* same effect on other architectures */
107	set_irq_noprobe(irq);
108	#endif
109	}
110
111	/* access.c */
112	extern unsigned long
113	(*intc_reg_fns[])(unsigned long addr, unsigned long h, unsigned long data);
114
115	extern unsigned long
116	(*intc_enable_fns[])(unsigned long addr, unsigned long handle,
117	unsigned long (*fn)(unsigned long,
118	unsigned long, unsigned long),
119	unsigned int irq);
120	extern unsigned long
121	(*intc_disable_fns[])(unsigned long addr, unsigned long handle,
122	unsigned long (*fn)(unsigned long,
123	unsigned long, unsigned long),
124	unsigned int irq);
125	extern unsigned long
126	(*intc_enable_noprio_fns[])(unsigned long addr, unsigned long handle,
127	unsigned long (*fn)(unsigned long,
128	unsigned long, unsigned long),
129	unsigned int irq);
130
131	unsigned long intc_phys_to_virt(struct intc_desc_int *d, unsigned long address);
132	unsigned int intc_get_reg(struct intc_desc_int *d, unsigned long address);
133	unsigned int intc_set_field_from_handle(unsigned int value,
134	unsigned int field_value,
135	unsigned int handle);
136	unsigned long intc_get_field_from_handle(unsigned int value,
137	unsigned int handle);
138
139	/* balancing.c */
140	#ifdef CONFIG_INTC_BALANCING
141	void intc_balancing_enable(unsigned int irq);
142	void intc_balancing_disable(unsigned int irq);
143	void intc_set_dist_handle(unsigned int irq, struct intc_desc *desc,
144	struct intc_desc_int *d, intc_enum id);
145	#else
6966fed9 PM	146	static inline void intc_balancing_enable(unsigned int irq) { }
	147	static inline void intc_balancing_disable(unsigned int irq) { }
	148	static inline void
	149	intc_set_dist_handle(unsigned int irq, struct intc_desc *desc,
	150	struct intc_desc_int *d, intc_enum id) { }
2be6bb0c PM	151	#endif
	152
	153	/* chip.c */
	154	extern struct irq_chip intc_irq_chip;
	155	void _intc_enable(unsigned int irq, unsigned long handle);
	156
	157	/* core.c */
	158	extern struct list_head intc_list;
	159	extern raw_spinlock_t intc_big_lock;
	160	extern unsigned int nr_intc_controllers;
	161	extern struct sysdev_class intc_sysdev_class;
	162
	163	unsigned int intc_get_dfl_prio_level(void);
	164	unsigned int intc_get_prio_level(unsigned int irq);
	165	void intc_set_prio_level(unsigned int irq, unsigned int level);
	166
	167	/* handle.c */
	168	unsigned int intc_get_mask_handle(struct intc_desc *desc,
	169	struct intc_desc_int *d,
	170	intc_enum enum_id, int do_grps);
	171	unsigned int intc_get_prio_handle(struct intc_desc *desc,
	172	struct intc_desc_int *d,
	173	intc_enum enum_id, int do_grps);
	174	unsigned int intc_get_sense_handle(struct intc_desc *desc,
	175	struct intc_desc_int *d,
	176	intc_enum enum_id);
	177	void intc_set_ack_handle(unsigned int irq, struct intc_desc *desc,
	178	struct intc_desc_int *d, intc_enum id);
	179	unsigned long intc_get_ack_handle(unsigned int irq);
	180	void intc_enable_disable_enum(struct intc_desc desc, struct intc_desc_int d,
	181	intc_enum enum_id, int enable);
	182
	183	/* virq.c */
	184	void intc_subgroup_init(struct intc_desc desc, struct intc_desc_int d);
	185	void intc_irq_xlate_set(unsigned int irq, intc_enum id, struct intc_desc_int *d);
	186	struct intc_map_entry *intc_irq_xlate_get(unsigned int irq);