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Blackfin serial driver: hook up our UARTs STP bit with userspaces CMSPAR
[net-next-2.6.git] / drivers / serial / bfin_5xx.c
CommitLineData
194de561
BW		 1/*
2 * File: drivers/serial/bfin_5xx.c
3 * Based on: Based on drivers/serial/sa1100.c
4 * Author: Aubrey Li <aubrey.li@analog.com>
5 *
6 * Created:
7 * Description: Driver for blackfin 5xx serial ports
8 *
194de561
BW		 9 * Modified:
10 * Copyright 2006 Analog Devices Inc.
11 *
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
28 */
29
30#if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
31#define SUPPORT_SYSRQ
32#endif
33
34#include <linux/module.h>
35#include <linux/ioport.h>
36#include <linux/init.h>
37#include <linux/console.h>
38#include <linux/sysrq.h>
39#include <linux/platform_device.h>
40#include <linux/tty.h>
41#include <linux/tty_flip.h>
42#include <linux/serial_core.h>
43
44#include <asm/gpio.h>
45#include <asm/mach/bfin_serial_5xx.h>
46
47#ifdef CONFIG_SERIAL_BFIN_DMA
48#include <linux/dma-mapping.h>
49#include <asm/io.h>
50#include <asm/irq.h>
51#include <asm/cacheflush.h>
52#endif
53
54/* UART name and device definitions */
55#define BFIN_SERIAL_NAME "ttyBF"
56#define BFIN_SERIAL_MAJOR 204
57#define BFIN_SERIAL_MINOR 64
58
59/*
60 * Setup for console. Argument comes from the menuconfig
61 */
62#define DMA_RX_XCOUNT 512
63#define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
64
65#define DMA_RX_FLUSH_JIFFIES 5
66
67#ifdef CONFIG_SERIAL_BFIN_DMA
68static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
69#else
70static void bfin_serial_do_work(struct work_struct *work);
71static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
72static void local_put_char(struct bfin_serial_port *uart, char ch);
73#endif
74
75static void bfin_serial_mctrl_check(struct bfin_serial_port *uart);
76
77/*
78 * interrupts are disabled on entry
79 */
80static void bfin_serial_stop_tx(struct uart_port *port)
81{
82 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
83
84#ifdef CONFIG_SERIAL_BFIN_DMA
85 disable_dma(uart->tx_dma_channel);
86#else
87 unsigned short ier;
88
89 ier = UART_GET_IER(uart);
90 ier &= ~ETBEI;
91 UART_PUT_IER(uart, ier);
92#endif
93}
94
95/*
96 * port is locked and interrupts are disabled
97 */
98static void bfin_serial_start_tx(struct uart_port *port)
99{
100 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
101
102#ifdef CONFIG_SERIAL_BFIN_DMA
103 bfin_serial_dma_tx_chars(uart);
104#else
105 unsigned short ier;
106 ier = UART_GET_IER(uart);
107 ier |= ETBEI;
108 UART_PUT_IER(uart, ier);
109 bfin_serial_tx_chars(uart);
110#endif
111}
112
113/*
114 * Interrupts are enabled
115 */
116static void bfin_serial_stop_rx(struct uart_port *port)
117{
118 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
119 unsigned short ier;
120
121 ier = UART_GET_IER(uart);
122 ier &= ~ERBFI;
123 UART_PUT_IER(uart, ier);
124}
125
126/*
127 * Set the modem control timer to fire immediately.
128 */
129static void bfin_serial_enable_ms(struct uart_port *port)
130{
131}
132
133#ifdef CONFIG_SERIAL_BFIN_PIO
134static void local_put_char(struct bfin_serial_port *uart, char ch)
135{
136 unsigned short status;
137 int flags = 0;
138
139 spin_lock_irqsave(&uart->port.lock, flags);
140
141 do {
142 status = UART_GET_LSR(uart);
143 } while (!(status & THRE));
144
145 UART_PUT_CHAR(uart, ch);
146 SSYNC();
147
148 spin_unlock_irqrestore(&uart->port.lock, flags);
149}
150
151static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
152{
2ac5ee47 153 struct tty_struct *tty = uart->port.info->tty;
194de561
BW		 154 unsigned int status, ch, flg;
155#ifdef BF533_FAMILY
156 static int in_break = 0;
157#endif
158
159 status = UART_GET_LSR(uart);
160 ch = UART_GET_CHAR(uart);
161 uart->port.icount.rx++;
162
163#ifdef BF533_FAMILY
164 /* The BF533 family of processors have a nice misbehavior where
165 * they continuously generate characters for a "single" break.
166 * We have to basically ignore this flood until the "next" valid
167 * character comes across. All other Blackfin families operate
168 * properly though.
169 */
170 if (in_break) {
171 if (ch != 0) {
172 in_break = 0;
173 ch = UART_GET_CHAR(uart);
2ac5ee47
MF		 174 if (bfin_revid() < 5)
175 return;
176 } else
177 return;
194de561
BW		 178 }
179#endif
180
181 if (status & BI) {
182#ifdef BF533_FAMILY
183 in_break = 1;
184#endif
185 uart->port.icount.brk++;
186 if (uart_handle_break(&uart->port))
187 goto ignore_char;
2ac5ee47
MF		 188 }
189 if (status & PE)
194de561 190 uart->port.icount.parity++;
2ac5ee47 191 if (status & OE)
194de561 192 uart->port.icount.overrun++;
2ac5ee47 193 if (status & FE)
194de561 194 uart->port.icount.frame++;
2ac5ee47
MF		 195
196 status &= uart->port.read_status_mask;
197
198 if (status & BI)
199 flg = TTY_BREAK;
200 else if (status & PE)
201 flg = TTY_PARITY;
202 else if (status & FE)
203 flg = TTY_FRAME;
204 else
194de561
BW		 205 flg = TTY_NORMAL;
206
207 if (uart_handle_sysrq_char(&uart->port, ch))
208 goto ignore_char;
194de561 209
2ac5ee47
MF		 210 uart_insert_char(&uart->port, status, OE, ch, flg);
211
212 ignore_char:
213 tty_flip_buffer_push(tty);
194de561
BW		 214}
215
216static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
217{
218 struct circ_buf *xmit = &uart->port.info->xmit;
219
220 if (uart->port.x_char) {
221 UART_PUT_CHAR(uart, uart->port.x_char);
222 uart->port.icount.tx++;
223 uart->port.x_char = 0;
224 return;
225 }
226 /*
227 * Check the modem control lines before
228 * transmitting anything.
229 */
230 bfin_serial_mctrl_check(uart);
231
232 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
233 bfin_serial_stop_tx(&uart->port);
234 return;
235 }
236
237 local_put_char(uart, xmit->buf[xmit->tail]);
238 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
239 uart->port.icount.tx++;
240
241 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
242 uart_write_wakeup(&uart->port);
243
244 if (uart_circ_empty(xmit))
245 bfin_serial_stop_tx(&uart->port);
246}
247
5c4e472b
AL		 248static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
249{
250 struct bfin_serial_port *uart = dev_id;
251
252 spin_lock(&uart->port.lock);
253 while ((UART_GET_IIR(uart) & IIR_STATUS) == IIR_RX_READY)
254 bfin_serial_rx_chars(uart);
255 spin_unlock(&uart->port.lock);
256 return IRQ_HANDLED;
257}
258
259static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
194de561
BW		 260{
261 struct bfin_serial_port *uart = dev_id;
194de561
BW		 262
263 spin_lock(&uart->port.lock);
5c4e472b
AL		 264 while ((UART_GET_IIR(uart) & IIR_STATUS) == IIR_TX_READY)
265 bfin_serial_tx_chars(uart);
194de561
BW		 266 spin_unlock(&uart->port.lock);
267 return IRQ_HANDLED;
268}
269
5c4e472b 270
194de561
BW		 271static void bfin_serial_do_work(struct work_struct *work)
272{
273 struct bfin_serial_port *uart = container_of(work, struct bfin_serial_port, cts_workqueue);
274
275 bfin_serial_mctrl_check(uart);
276}
277
278#endif
279
280#ifdef CONFIG_SERIAL_BFIN_DMA
281static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
282{
283 struct circ_buf *xmit = &uart->port.info->xmit;
284 unsigned short ier;
285 int flags = 0;
286
287 if (!uart->tx_done)
288 return;
289
290 uart->tx_done = 0;
291
292 if (uart->port.x_char) {
293 UART_PUT_CHAR(uart, uart->port.x_char);
294 uart->port.icount.tx++;
295 uart->port.x_char = 0;
296 uart->tx_done = 1;
297 return;
298 }
299 /*
300 * Check the modem control lines before
301 * transmitting anything.
302 */
303 bfin_serial_mctrl_check(uart);
304
305 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
306 bfin_serial_stop_tx(&uart->port);
307 uart->tx_done = 1;
308 return;
309 }
310
311 spin_lock_irqsave(&uart->port.lock, flags);
312 uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
313 if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
314 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
315 blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
316 (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
317 set_dma_config(uart->tx_dma_channel,
318 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
319 INTR_ON_BUF,
320 DIMENSION_LINEAR,
321 DATA_SIZE_8));
322 set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
323 set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
324 set_dma_x_modify(uart->tx_dma_channel, 1);
325 enable_dma(uart->tx_dma_channel);
326 ier = UART_GET_IER(uart);
327 ier |= ETBEI;
328 UART_PUT_IER(uart, ier);
329 spin_unlock_irqrestore(&uart->port.lock, flags);
330}
331
2ac5ee47 332static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
194de561
BW		 333{
334 struct tty_struct *tty = uart->port.info->tty;
335 int i, flg, status;
336
337 status = UART_GET_LSR(uart);
338 uart->port.icount.rx += CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail, UART_XMIT_SIZE);;
339
340 if (status & BI) {
341 uart->port.icount.brk++;
342 if (uart_handle_break(&uart->port))
343 goto dma_ignore_char;
2ac5ee47
MF		 344 }
345 if (status & PE)
194de561 346 uart->port.icount.parity++;
2ac5ee47 347 if (status & OE)
194de561 348 uart->port.icount.overrun++;
2ac5ee47 349 if (status & FE)
194de561 350 uart->port.icount.frame++;
2ac5ee47
MF		 351
352 status &= uart->port.read_status_mask;
353
354 if (status & BI)
355 flg = TTY_BREAK;
356 else if (status & PE)
357 flg = TTY_PARITY;
358 else if (status & FE)
359 flg = TTY_FRAME;
360 else
194de561
BW		 361 flg = TTY_NORMAL;
362
363 for (i = uart->rx_dma_buf.head; i < uart->rx_dma_buf.tail; i++) {
364 if (uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
365 goto dma_ignore_char;
2ac5ee47 366 uart_insert_char(&uart->port, status, OE, uart->rx_dma_buf.buf[i], flg);
194de561 367 }
2ac5ee47
MF		 368
369 dma_ignore_char:
194de561
BW		 370 tty_flip_buffer_push(tty);
371}
372
373void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
374{
375 int x_pos, pos;
376 int flags = 0;
377
378 bfin_serial_dma_tx_chars(uart);
379
380 spin_lock_irqsave(&uart->port.lock, flags);
381 x_pos = DMA_RX_XCOUNT - get_dma_curr_xcount(uart->rx_dma_channel);
382 if (x_pos == DMA_RX_XCOUNT)
383 x_pos = 0;
384
385 pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
386
387 if (pos>uart->rx_dma_buf.tail) {
388 uart->rx_dma_buf.tail = pos;
389 bfin_serial_dma_rx_chars(uart);
390 uart->rx_dma_buf.head = uart->rx_dma_buf.tail;
391 }
392 spin_unlock_irqrestore(&uart->port.lock, flags);
393 uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
394 add_timer(&(uart->rx_dma_timer));
395}
396
397static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
398{
399 struct bfin_serial_port *uart = dev_id;
400 struct circ_buf *xmit = &uart->port.info->xmit;
401 unsigned short ier;
402
403 spin_lock(&uart->port.lock);
404 if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
405 clear_dma_irqstat(uart->tx_dma_channel);
406 disable_dma(uart->tx_dma_channel);
407 ier = UART_GET_IER(uart);
408 ier &= ~ETBEI;
409 UART_PUT_IER(uart, ier);
410 xmit->tail = (xmit->tail+uart->tx_count) &(UART_XMIT_SIZE -1);
411 uart->port.icount.tx+=uart->tx_count;
412
413 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
414 uart_write_wakeup(&uart->port);
415
416 if (uart_circ_empty(xmit))
417 bfin_serial_stop_tx(&uart->port);
418 uart->tx_done = 1;
419 }
420
421 spin_unlock(&uart->port.lock);
422 return IRQ_HANDLED;
423}
424
425static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
426{
427 struct bfin_serial_port *uart = dev_id;
428 unsigned short irqstat;
429
430 uart->rx_dma_nrows++;
431 if (uart->rx_dma_nrows == DMA_RX_YCOUNT) {
432 uart->rx_dma_nrows = 0;
433 uart->rx_dma_buf.tail = DMA_RX_XCOUNT*DMA_RX_YCOUNT;
434 bfin_serial_dma_rx_chars(uart);
435 uart->rx_dma_buf.head = uart->rx_dma_buf.tail = 0;
436 }
437 spin_lock(&uart->port.lock);
438 irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
439 clear_dma_irqstat(uart->rx_dma_channel);
440
441 spin_unlock(&uart->port.lock);
442 return IRQ_HANDLED;
443}
444#endif
445
446/*
447 * Return TIOCSER_TEMT when transmitter is not busy.
448 */
449static unsigned int bfin_serial_tx_empty(struct uart_port *port)
450{
451 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
452 unsigned short lsr;
453
454 lsr = UART_GET_LSR(uart);
455 if (lsr & TEMT)
456 return TIOCSER_TEMT;
457 else
458 return 0;
459}
460
461static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
462{
463#ifdef CONFIG_SERIAL_BFIN_CTSRTS
464 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
465 if (uart->cts_pin < 0)
466 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
467
468 if (gpio_get_value(uart->cts_pin))
469 return TIOCM_DSR | TIOCM_CAR;
470 else
471#endif
472 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
473}
474
475static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
476{
477#ifdef CONFIG_SERIAL_BFIN_CTSRTS
478 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
479 if (uart->rts_pin < 0)
480 return;
481
482 if (mctrl & TIOCM_RTS)
483 gpio_set_value(uart->rts_pin, 0);
484 else
485 gpio_set_value(uart->rts_pin, 1);
486#endif
487}
488
489/*
490 * Handle any change of modem status signal since we were last called.
491 */
492static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
493{
494#ifdef CONFIG_SERIAL_BFIN_CTSRTS
495 unsigned int status;
496# ifdef CONFIG_SERIAL_BFIN_DMA
497 struct uart_info *info = uart->port.info;
498 struct tty_struct *tty = info->tty;
499
500 status = bfin_serial_get_mctrl(&uart->port);
501 if (!(status & TIOCM_CTS)) {
502 tty->hw_stopped = 1;
503 } else {
504 tty->hw_stopped = 0;
505 }
506# else
507 status = bfin_serial_get_mctrl(&uart->port);
508 uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
509 if (!(status & TIOCM_CTS))
510 schedule_work(&uart->cts_workqueue);
511# endif
512#endif
513}
514
515/*
516 * Interrupts are always disabled.
517 */
518static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
519{
520}
521
522static int bfin_serial_startup(struct uart_port *port)
523{
524 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
525
526#ifdef CONFIG_SERIAL_BFIN_DMA
527 dma_addr_t dma_handle;
528
529 if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
530 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
531 return -EBUSY;
532 }
533
534 if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
535 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
536 free_dma(uart->rx_dma_channel);
537 return -EBUSY;
538 }
539
540 set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
541 set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
542
543 uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
544 uart->rx_dma_buf.head = 0;
545 uart->rx_dma_buf.tail = 0;
546 uart->rx_dma_nrows = 0;
547
548 set_dma_config(uart->rx_dma_channel,
549 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
550 INTR_ON_ROW, DIMENSION_2D,
551 DATA_SIZE_8));
552 set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
553 set_dma_x_modify(uart->rx_dma_channel, 1);
554 set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
555 set_dma_y_modify(uart->rx_dma_channel, 1);
556 set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
557 enable_dma(uart->rx_dma_channel);
558
559 uart->rx_dma_timer.data = (unsigned long)(uart);
560 uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
561 uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
562 add_timer(&(uart->rx_dma_timer));
563#else
564 if (request_irq
5c4e472b 565 (uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
194de561
BW		 566 "BFIN_UART_RX", uart)) {
567 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
568 return -EBUSY;
569 }
570
571 if (request_irq
5c4e472b 572 (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
194de561
BW		 573 "BFIN_UART_TX", uart)) {
574 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
575 free_irq(uart->port.irq, uart);
576 return -EBUSY;
577 }
578#endif
579 UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
580 return 0;
581}
582
583static void bfin_serial_shutdown(struct uart_port *port)
584{
585 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
586
587#ifdef CONFIG_SERIAL_BFIN_DMA
588 disable_dma(uart->tx_dma_channel);
589 free_dma(uart->tx_dma_channel);
590 disable_dma(uart->rx_dma_channel);
591 free_dma(uart->rx_dma_channel);
592 del_timer(&(uart->rx_dma_timer));
593#else
594 free_irq(uart->port.irq, uart);
595 free_irq(uart->port.irq+1, uart);
596#endif
597}
598
599static void
600bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
601 struct ktermios *old)
602{
603 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
604 unsigned long flags;
605 unsigned int baud, quot;
606 unsigned short val, ier, lsr, lcr = 0;
607
608 switch (termios->c_cflag & CSIZE) {
609 case CS8:
610 lcr = WLS(8);
611 break;
612 case CS7:
613 lcr = WLS(7);
614 break;
615 case CS6:
616 lcr = WLS(6);
617 break;
618 case CS5:
619 lcr = WLS(5);
620 break;
621 default:
622 printk(KERN_ERR "%s: word lengh not supported\n",
623 __FUNCTION__);
624 }
625
626 if (termios->c_cflag & CSTOPB)
627 lcr |= STB;
628 if (termios->c_cflag & PARENB) {
629 lcr |= PEN;
630 if (!(termios->c_cflag & PARODD))
631 lcr |= EPS;
c16c3ca7
MF		 632 if (termios->c_cflag & CMSPAR)
633 lcr |= STP;
194de561
BW		 634 }
635
2ac5ee47
MF		 636 port->read_status_mask = OE;
637 if (termios->c_iflag & INPCK)
638 port->read_status_mask |= (FE | PE);
639 if (termios->c_iflag & (BRKINT | PARMRK))
640 port->read_status_mask |= BI;
194de561 641
2ac5ee47
MF		 642 /*
643 * Characters to ignore
644 */
645 port->ignore_status_mask = 0;
646 if (termios->c_iflag & IGNPAR)
647 port->ignore_status_mask |= FE | PE;
648 if (termios->c_iflag & IGNBRK) {
649 port->ignore_status_mask |= BI;
650 /*
651 * If we're ignoring parity and break indicators,
652 * ignore overruns too (for real raw support).
653 */
654 if (termios->c_iflag & IGNPAR)
655 port->ignore_status_mask |= OE;
656 }
194de561
BW		 657
658 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
659 quot = uart_get_divisor(port, baud);
660 spin_lock_irqsave(&uart->port.lock, flags);
661
662 do {
663 lsr = UART_GET_LSR(uart);
664 } while (!(lsr & TEMT));
665
666 /* Disable UART */
667 ier = UART_GET_IER(uart);
668 UART_PUT_IER(uart, 0);
669
670 /* Set DLAB in LCR to Access DLL and DLH */
671 val = UART_GET_LCR(uart);
672 val |= DLAB;
673 UART_PUT_LCR(uart, val);
674 SSYNC();
675
676 UART_PUT_DLL(uart, quot & 0xFF);
677 SSYNC();
678 UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
679 SSYNC();
680
681 /* Clear DLAB in LCR to Access THR RBR IER */
682 val = UART_GET_LCR(uart);
683 val &= ~DLAB;
684 UART_PUT_LCR(uart, val);
685 SSYNC();
686
687 UART_PUT_LCR(uart, lcr);
688
689 /* Enable UART */
690 UART_PUT_IER(uart, ier);
691
692 val = UART_GET_GCTL(uart);
693 val |= UCEN;
694 UART_PUT_GCTL(uart, val);
695
696 spin_unlock_irqrestore(&uart->port.lock, flags);
697}
698
699static const char *bfin_serial_type(struct uart_port *port)
700{
701 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
702
703 return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
704}
705
706/*
707 * Release the memory region(s) being used by 'port'.
708 */
709static void bfin_serial_release_port(struct uart_port *port)
710{
711}
712
713/*
714 * Request the memory region(s) being used by 'port'.
715 */
716static int bfin_serial_request_port(struct uart_port *port)
717{
718 return 0;
719}
720
721/*
722 * Configure/autoconfigure the port.
723 */
724static void bfin_serial_config_port(struct uart_port *port, int flags)
725{
726 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
727
728 if (flags & UART_CONFIG_TYPE &&
729 bfin_serial_request_port(&uart->port) == 0)
730 uart->port.type = PORT_BFIN;
731}
732
733/*
734 * Verify the new serial_struct (for TIOCSSERIAL).
735 * The only change we allow are to the flags and type, and
736 * even then only between PORT_BFIN and PORT_UNKNOWN
737 */
738static int
739bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
740{
741 return 0;
742}
743
744static struct uart_ops bfin_serial_pops = {
745 .tx_empty = bfin_serial_tx_empty,
746 .set_mctrl = bfin_serial_set_mctrl,
747 .get_mctrl = bfin_serial_get_mctrl,
748 .stop_tx = bfin_serial_stop_tx,
749 .start_tx = bfin_serial_start_tx,
750 .stop_rx = bfin_serial_stop_rx,
751 .enable_ms = bfin_serial_enable_ms,
752 .break_ctl = bfin_serial_break_ctl,
753 .startup = bfin_serial_startup,
754 .shutdown = bfin_serial_shutdown,
755 .set_termios = bfin_serial_set_termios,
756 .type = bfin_serial_type,
757 .release_port = bfin_serial_release_port,
758 .request_port = bfin_serial_request_port,
759 .config_port = bfin_serial_config_port,
760 .verify_port = bfin_serial_verify_port,
761};
762
763static void __init bfin_serial_init_ports(void)
764{
765 static int first = 1;
766 int i;
767
768 if (!first)
769 return;
770 first = 0;
771
772 for (i = 0; i < nr_ports; i++) {
773 bfin_serial_ports[i].port.uartclk = get_sclk();
774 bfin_serial_ports[i].port.ops = &bfin_serial_pops;
775 bfin_serial_ports[i].port.line = i;
776 bfin_serial_ports[i].port.iotype = UPIO_MEM;
777 bfin_serial_ports[i].port.membase =
778 (void __iomem *)bfin_serial_resource[i].uart_base_addr;
779 bfin_serial_ports[i].port.mapbase =
780 bfin_serial_resource[i].uart_base_addr;
781 bfin_serial_ports[i].port.irq =
782 bfin_serial_resource[i].uart_irq;
783 bfin_serial_ports[i].port.flags = UPF_BOOT_AUTOCONF;
784#ifdef CONFIG_SERIAL_BFIN_DMA
785 bfin_serial_ports[i].tx_done = 1;
786 bfin_serial_ports[i].tx_count = 0;
787 bfin_serial_ports[i].tx_dma_channel =
788 bfin_serial_resource[i].uart_tx_dma_channel;
789 bfin_serial_ports[i].rx_dma_channel =
790 bfin_serial_resource[i].uart_rx_dma_channel;
791 init_timer(&(bfin_serial_ports[i].rx_dma_timer));
792#else
793 INIT_WORK(&bfin_serial_ports[i].cts_workqueue, bfin_serial_do_work);
794#endif
795#ifdef CONFIG_SERIAL_BFIN_CTSRTS
796 bfin_serial_ports[i].cts_pin =
797 bfin_serial_resource[i].uart_cts_pin;
798 bfin_serial_ports[i].rts_pin =
799 bfin_serial_resource[i].uart_rts_pin;
800#endif
801 bfin_serial_hw_init(&bfin_serial_ports[i]);
802
803 }
804}
805
806#ifdef CONFIG_SERIAL_BFIN_CONSOLE
807static void bfin_serial_console_putchar(struct uart_port *port, int ch)
808{
809 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
810 while (!(UART_GET_LSR(uart)))
811 barrier();
812 UART_PUT_CHAR(uart, ch);
813 SSYNC();
814}
815
816/*
817 * Interrupts are disabled on entering
818 */
819static void
820bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
821{
822 struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
823 int flags = 0;
824
825 spin_lock_irqsave(&uart->port.lock, flags);
826 uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
827 spin_unlock_irqrestore(&uart->port.lock, flags);
828
829}
830
831/*
832 * If the port was already initialised (eg, by a boot loader),
833 * try to determine the current setup.
834 */
835static void __init
836bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
837 int *parity, int *bits)
838{
839 unsigned short status;
840
841 status = UART_GET_IER(uart) & (ERBFI | ETBEI);
842 if (status == (ERBFI | ETBEI)) {
843 /* ok, the port was enabled */
844 unsigned short lcr, val;
845 unsigned short dlh, dll;
846
847 lcr = UART_GET_LCR(uart);
848
849 *parity = 'n';
850 if (lcr & PEN) {
851 if (lcr & EPS)
852 *parity = 'e';
853 else
854 *parity = 'o';
855 }
856 switch (lcr & 0x03) {
857 case 0: *bits = 5; break;
858 case 1: *bits = 6; break;
859 case 2: *bits = 7; break;
860 case 3: *bits = 8; break;
861 }
862 /* Set DLAB in LCR to Access DLL and DLH */
863 val = UART_GET_LCR(uart);
864 val |= DLAB;
865 UART_PUT_LCR(uart, val);
866
867 dll = UART_GET_DLL(uart);
868 dlh = UART_GET_DLH(uart);
869
870 /* Clear DLAB in LCR to Access THR RBR IER */
871 val = UART_GET_LCR(uart);
872 val &= ~DLAB;
873 UART_PUT_LCR(uart, val);
874
875 *baud = get_sclk() / (16*(dll | dlh << 8));
876 }
877 pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __FUNCTION__, *baud, *parity, *bits);
878}
879
880static int __init
881bfin_serial_console_setup(struct console *co, char *options)
882{
883 struct bfin_serial_port *uart;
884 int baud = 57600;
885 int bits = 8;
886 int parity = 'n';
887#ifdef CONFIG_SERIAL_BFIN_CTSRTS
888 int flow = 'r';
889#else
890 int flow = 'n';
891#endif
892
893 /*
894 * Check whether an invalid uart number has been specified, and
895 * if so, search for the first available port that does have
896 * console support.
897 */
898 if (co->index == -1 || co->index >= nr_ports)
899 co->index = 0;
900 uart = &bfin_serial_ports[co->index];
901
902 if (options)
903 uart_parse_options(options, &baud, &parity, &bits, &flow);
904 else
905 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
906
907 return uart_set_options(&uart->port, co, baud, parity, bits, flow);
908}
909
910static struct uart_driver bfin_serial_reg;
911static struct console bfin_serial_console = {
912 .name = BFIN_SERIAL_NAME,
913 .write = bfin_serial_console_write,
914 .device = uart_console_device,
915 .setup = bfin_serial_console_setup,
916 .flags = CON_PRINTBUFFER,
917 .index = -1,
918 .data = &bfin_serial_reg,
919};
920
921static int __init bfin_serial_rs_console_init(void)
922{
923 bfin_serial_init_ports();
924 register_console(&bfin_serial_console);
925 return 0;
926}
927console_initcall(bfin_serial_rs_console_init);
928
929#define BFIN_SERIAL_CONSOLE &bfin_serial_console
930#else
931#define BFIN_SERIAL_CONSOLE NULL
932#endif
933
934static struct uart_driver bfin_serial_reg = {
935 .owner = THIS_MODULE,
936 .driver_name = "bfin-uart",
937 .dev_name = BFIN_SERIAL_NAME,
938 .major = BFIN_SERIAL_MAJOR,
939 .minor = BFIN_SERIAL_MINOR,
940 .nr = NR_PORTS,
941 .cons = BFIN_SERIAL_CONSOLE,
942};
943
944static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
945{
946 struct bfin_serial_port *uart = platform_get_drvdata(dev);
947
948 if (uart)
949 uart_suspend_port(&bfin_serial_reg, &uart->port);
950
951 return 0;
952}
953
954static int bfin_serial_resume(struct platform_device *dev)
955{
956 struct bfin_serial_port *uart = platform_get_drvdata(dev);
957
958 if (uart)
959 uart_resume_port(&bfin_serial_reg, &uart->port);
960
961 return 0;
962}
963
964static int bfin_serial_probe(struct platform_device *dev)
965{
966 struct resource *res = dev->resource;
967 int i;
968
969 for (i = 0; i < dev->num_resources; i++, res++)
970 if (res->flags & IORESOURCE_MEM)
971 break;
972
973 if (i < dev->num_resources) {
974 for (i = 0; i < nr_ports; i++, res++) {
975 if (bfin_serial_ports[i].port.mapbase != res->start)
976 continue;
977 bfin_serial_ports[i].port.dev = &dev->dev;
978 uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
979 platform_set_drvdata(dev, &bfin_serial_ports[i]);
980 }
981 }
982
983 return 0;
984}
985
986static int bfin_serial_remove(struct platform_device *pdev)
987{
988 struct bfin_serial_port *uart = platform_get_drvdata(pdev);
989
990
991#ifdef CONFIG_SERIAL_BFIN_CTSRTS
992 gpio_free(uart->cts_pin);
993 gpio_free(uart->rts_pin);
994#endif
995
996 platform_set_drvdata(pdev, NULL);
997
998 if (uart)
999 uart_remove_one_port(&bfin_serial_reg, &uart->port);
1000
1001 return 0;
1002}
1003
1004static struct platform_driver bfin_serial_driver = {
1005 .probe = bfin_serial_probe,
1006 .remove = bfin_serial_remove,
1007 .suspend = bfin_serial_suspend,
1008 .resume = bfin_serial_resume,
1009 .driver = {
1010 .name = "bfin-uart",
1011 },
1012};
1013
1014static int __init bfin_serial_init(void)
1015{
1016 int ret;
1017
1018 pr_info("Serial: Blackfin serial driver\n");
1019
1020 bfin_serial_init_ports();
1021
1022 ret = uart_register_driver(&bfin_serial_reg);
1023 if (ret == 0) {
1024 ret = platform_driver_register(&bfin_serial_driver);
1025 if (ret) {
1026 pr_debug("uart register failed\n");
1027 uart_unregister_driver(&bfin_serial_reg);
1028 }
1029 }
1030 return ret;
1031}
1032
1033static void __exit bfin_serial_exit(void)
1034{
1035 platform_driver_unregister(&bfin_serial_driver);
1036 uart_unregister_driver(&bfin_serial_reg);
1037}
1038
1039module_init(bfin_serial_init);
1040module_exit(bfin_serial_exit);
1041
1042MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
1043MODULE_DESCRIPTION("Blackfin generic serial port driver");
1044MODULE_LICENSE("GPL");
1045MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
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