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1da177e4
LT
1/*
2 * UART driver for 68360 CPM SCC or SMC
3 * Copyright (c) 2000 D. Jeff Dionne <jeff@uclinux.org>,
4 * Copyright (c) 2000 Michael Leslie <mleslie@lineo.ca>
5 * Copyright (c) 1997 Dan Malek <dmalek@jlc.net>
6 *
7 * I used the serial.c driver as the framework for this driver.
8 * Give credit to those guys.
9 * The original code was written for the MBX860 board. I tried to make
10 * it generic, but there may be some assumptions in the structures that
11 * have to be fixed later.
12 * To save porting time, I did not bother to change any object names
13 * that are not accessed outside of this file.
14 * It still needs lots of work........When it was easy, I included code
15 * to support the SCCs, but this has never been tested, nor is it complete.
16 * Only the SCCs support modem control, so that is not complete either.
17 *
18 * This module exports the following rs232 io functions:
19 *
20 * int rs_360_init(void);
21 */
22
1da177e4
LT
23#include <linux/module.h>
24#include <linux/errno.h>
25#include <linux/signal.h>
26#include <linux/sched.h>
27#include <linux/timer.h>
28#include <linux/interrupt.h>
29#include <linux/tty.h>
30#include <linux/tty_flip.h>
31#include <linux/serial.h>
32#include <linux/serialP.h>
33#include <linux/major.h>
34#include <linux/string.h>
35#include <linux/fcntl.h>
36#include <linux/ptrace.h>
37#include <linux/mm.h>
38#include <linux/init.h>
39#include <linux/delay.h>
40#include <asm/irq.h>
41#include <asm/m68360.h>
42#include <asm/commproc.h>
43
44
45#ifdef CONFIG_KGDB
46extern void breakpoint(void);
47extern void set_debug_traps(void);
48extern int kgdb_output_string (const char* s, unsigned int count);
49#endif
50
51
52/* #ifdef CONFIG_SERIAL_CONSOLE */ /* This seems to be a post 2.0 thing - mles */
53#include <linux/console.h>
d1ec61e6 54#include <linux/jiffies.h>
1da177e4
LT
55
56/* this defines the index into rs_table for the port to use
57 */
58#ifndef CONFIG_SERIAL_CONSOLE_PORT
59#define CONFIG_SERIAL_CONSOLE_PORT 1 /* ie SMC2 - note USE_SMC2 must be defined */
60#endif
61/* #endif */
62
63#if 0
64/* SCC2 for console
65 */
66#undef CONFIG_SERIAL_CONSOLE_PORT
67#define CONFIG_SERIAL_CONSOLE_PORT 2
68#endif
69
70
71#define TX_WAKEUP ASYNC_SHARE_IRQ
72
73static char *serial_name = "CPM UART driver";
74static char *serial_version = "0.03";
75
76static struct tty_driver *serial_driver;
77int serial_console_setup(struct console *co, char *options);
78
79/*
80 * Serial driver configuration section. Here are the various options:
81 */
82#define SERIAL_PARANOIA_CHECK
83#define CONFIG_SERIAL_NOPAUSE_IO
84#define SERIAL_DO_RESTART
85
86/* Set of debugging defines */
87
88#undef SERIAL_DEBUG_INTR
89#undef SERIAL_DEBUG_OPEN
90#undef SERIAL_DEBUG_FLOW
91#undef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
92
93#define _INLINE_ inline
94
95#define DBG_CNT(s)
96
97/* We overload some of the items in the data structure to meet our
98 * needs. For example, the port address is the CPM parameter ram
99 * offset for the SCC or SMC. The maximum number of ports is 4 SCCs and
100 * 2 SMCs. The "hub6" field is used to indicate the channel number, with
101 * a flag indicating SCC or SMC, and the number is used as an index into
102 * the CPM parameter area for this device.
103 * The "type" field is currently set to 0, for PORT_UNKNOWN. It is
104 * not currently used. I should probably use it to indicate the port
105 * type of SMC or SCC.
106 * The SMCs do not support any modem control signals.
107 */
108#define smc_scc_num hub6
109#define NUM_IS_SCC ((int)0x00010000)
110#define PORT_NUM(P) ((P) & 0x0000ffff)
111
112
113#if defined (CONFIG_UCQUICC)
114
115volatile extern void *_periph_base;
116/* sipex transceiver
117 * mode bits for are on pins
118 *
119 * SCC2 d16..19
120 * SCC3 d20..23
121 * SCC4 d24..27
122 */
123#define SIPEX_MODE(n,m) ((m & 0x0f)<<(16+4*(n-1)))
124
125static uint sipex_mode_bits = 0x00000000;
126
127#endif
128
129/* There is no `serial_state' defined back here in 2.0.
130 * Try to get by with serial_struct
131 */
132/* #define serial_state serial_struct */
133
134/* 2.4 -> 2.0 portability problem: async_icount in 2.4 has a few
135 * extras: */
136
137#if 0
138struct async_icount_24 {
139 __u32 cts, dsr, rng, dcd, tx, rx;
140 __u32 frame, parity, overrun, brk;
141 __u32 buf_overrun;
142} icount;
143#endif
144
145#if 0
146
147struct serial_state {
148 int magic;
149 int baud_base;
150 unsigned long port;
151 int irq;
152 int flags;
153 int hub6;
154 int type;
155 int line;
156 int revision; /* Chip revision (950) */
157 int xmit_fifo_size;
158 int custom_divisor;
159 int count;
160 u8 *iomem_base;
161 u16 iomem_reg_shift;
162 unsigned short close_delay;
163 unsigned short closing_wait; /* time to wait before closing */
164 struct async_icount_24 icount;
165 int io_type;
166 struct async_struct *info;
167};
168#endif
169
170#define SSTATE_MAGIC 0x5302
171
172
173
174/* SMC2 is sometimes used for low performance TDM interfaces. Define
175 * this as 1 if you want SMC2 as a serial port UART managed by this driver.
176 * Define this as 0 if you wish to use SMC2 for something else.
177 */
178#define USE_SMC2 1
179
180#if 0
181/* Define SCC to ttySx mapping. */
182#define SCC_NUM_BASE (USE_SMC2 + 1) /* SCC base tty "number" */
183
184/* Define which SCC is the first one to use for a serial port. These
185 * are 0-based numbers, i.e. this assumes the first SCC (SCC1) is used
186 * for Ethernet, and the first available SCC for serial UART is SCC2.
187 * NOTE: IF YOU CHANGE THIS, you have to change the PROFF_xxx and
188 * interrupt vectors in the table below to match.
189 */
190#define SCC_IDX_BASE 1 /* table index */
191#endif
192
193
194/* Processors other than the 860 only get SMCs configured by default.
195 * Either they don't have SCCs or they are allocated somewhere else.
196 * Of course, there are now 860s without some SCCs, so we will need to
197 * address that someday.
198 * The Embedded Planet Multimedia I/O cards use TDM interfaces to the
199 * stereo codec parts, and we use SMC2 to help support that.
200 */
201static struct serial_state rs_table[] = {
202/* type line PORT IRQ FLAGS smc_scc_num (F.K.A. hub6) */
203 { 0, 0, PRSLOT_SMC1, CPMVEC_SMC1, 0, 0 } /* SMC1 ttyS0 */
204#if USE_SMC2
205 ,{ 0, 0, PRSLOT_SMC2, CPMVEC_SMC2, 0, 1 } /* SMC2 ttyS1 */
206#endif
207
208#if defined(CONFIG_SERIAL_68360_SCC)
209 ,{ 0, 0, PRSLOT_SCC2, CPMVEC_SCC2, 0, (NUM_IS_SCC | 1) } /* SCC2 ttyS2 */
210 ,{ 0, 0, PRSLOT_SCC3, CPMVEC_SCC3, 0, (NUM_IS_SCC | 2) } /* SCC3 ttyS3 */
211 ,{ 0, 0, PRSLOT_SCC4, CPMVEC_SCC4, 0, (NUM_IS_SCC | 3) } /* SCC4 ttyS4 */
212#endif
213};
214
215#define NR_PORTS (sizeof(rs_table)/sizeof(struct serial_state))
216
217/* The number of buffer descriptors and their sizes.
218 */
219#define RX_NUM_FIFO 4
220#define RX_BUF_SIZE 32
221#define TX_NUM_FIFO 4
222#define TX_BUF_SIZE 32
223
224#define CONSOLE_NUM_FIFO 2
225#define CONSOLE_BUF_SIZE 4
226
227char *console_fifos[CONSOLE_NUM_FIFO * CONSOLE_BUF_SIZE];
228
229/* The async_struct in serial.h does not really give us what we
230 * need, so define our own here.
231 */
232typedef struct serial_info {
233 int magic;
234 int flags;
235
236 struct serial_state *state;
237 /* struct serial_struct *state; */
238 /* struct async_struct *state; */
239
240 struct tty_struct *tty;
241 int read_status_mask;
242 int ignore_status_mask;
243 int timeout;
244 int line;
245 int x_char; /* xon/xoff character */
246 int close_delay;
247 unsigned short closing_wait;
248 unsigned short closing_wait2;
249 unsigned long event;
250 unsigned long last_active;
251 int blocked_open; /* # of blocked opens */
252 struct work_struct tqueue;
253 struct work_struct tqueue_hangup;
254 wait_queue_head_t open_wait;
255 wait_queue_head_t close_wait;
256
257
258/* CPM Buffer Descriptor pointers.
259 */
260 QUICC_BD *rx_bd_base;
261 QUICC_BD *rx_cur;
262 QUICC_BD *tx_bd_base;
263 QUICC_BD *tx_cur;
264} ser_info_t;
265
266
267/* since kmalloc_init() does not get called until much after this initialization: */
268static ser_info_t quicc_ser_info[NR_PORTS];
269static char rx_buf_pool[NR_PORTS * RX_NUM_FIFO * RX_BUF_SIZE];
270static char tx_buf_pool[NR_PORTS * TX_NUM_FIFO * TX_BUF_SIZE];
271
272static void change_speed(ser_info_t *info);
273static void rs_360_wait_until_sent(struct tty_struct *tty, int timeout);
274
275static inline int serial_paranoia_check(ser_info_t *info,
276 char *name, const char *routine)
277{
278#ifdef SERIAL_PARANOIA_CHECK
279 static const char *badmagic =
280 "Warning: bad magic number for serial struct (%s) in %s\n";
281 static const char *badinfo =
282 "Warning: null async_struct for (%s) in %s\n";
283
284 if (!info) {
285 printk(badinfo, name, routine);
286 return 1;
287 }
288 if (info->magic != SERIAL_MAGIC) {
289 printk(badmagic, name, routine);
290 return 1;
291 }
292#endif
293 return 0;
294}
295
296/*
297 * This is used to figure out the divisor speeds and the timeouts,
298 * indexed by the termio value. The generic CPM functions are responsible
299 * for setting and assigning baud rate generators for us.
300 */
301static int baud_table[] = {
302 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800,
303 9600, 19200, 38400, 57600, 115200, 230400, 460800, 0 };
304
305/* This sucks. There is a better way: */
306#if defined(CONFIG_CONSOLE_9600)
307 #define CONSOLE_BAUDRATE 9600
308#elif defined(CONFIG_CONSOLE_19200)
309 #define CONSOLE_BAUDRATE 19200
310#elif defined(CONFIG_CONSOLE_115200)
311 #define CONSOLE_BAUDRATE 115200
312#else
313 #warning "console baud rate undefined"
314 #define CONSOLE_BAUDRATE 9600
315#endif
316
317/*
318 * ------------------------------------------------------------
319 * rs_stop() and rs_start()
320 *
321 * This routines are called before setting or resetting tty->stopped.
322 * They enable or disable transmitter interrupts, as necessary.
323 * ------------------------------------------------------------
324 */
325static void rs_360_stop(struct tty_struct *tty)
326{
327 ser_info_t *info = (ser_info_t *)tty->driver_data;
328 int idx;
329 unsigned long flags;
330 volatile struct scc_regs *sccp;
331 volatile struct smc_regs *smcp;
332
333 if (serial_paranoia_check(info, tty->name, "rs_stop"))
334 return;
335
336 local_irq_save(flags);
337 idx = PORT_NUM(info->state->smc_scc_num);
338 if (info->state->smc_scc_num & NUM_IS_SCC) {
339 sccp = &pquicc->scc_regs[idx];
340 sccp->scc_sccm &= ~UART_SCCM_TX;
341 } else {
342 /* smcp = &cpmp->cp_smc[idx]; */
343 smcp = &pquicc->smc_regs[idx];
344 smcp->smc_smcm &= ~SMCM_TX;
345 }
346 local_irq_restore(flags);
347}
348
349
350static void rs_360_start(struct tty_struct *tty)
351{
352 ser_info_t *info = (ser_info_t *)tty->driver_data;
353 int idx;
354 unsigned long flags;
355 volatile struct scc_regs *sccp;
356 volatile struct smc_regs *smcp;
357
358 if (serial_paranoia_check(info, tty->name, "rs_stop"))
359 return;
360
361 local_irq_save(flags);
362 idx = PORT_NUM(info->state->smc_scc_num);
363 if (info->state->smc_scc_num & NUM_IS_SCC) {
364 sccp = &pquicc->scc_regs[idx];
365 sccp->scc_sccm |= UART_SCCM_TX;
366 } else {
367 smcp = &pquicc->smc_regs[idx];
368 smcp->smc_smcm |= SMCM_TX;
369 }
370 local_irq_restore(flags);
371}
372
373/*
374 * ----------------------------------------------------------------------
375 *
376 * Here starts the interrupt handling routines. All of the following
377 * subroutines are declared as inline and are folded into
378 * rs_interrupt(). They were separated out for readability's sake.
379 *
380 * Note: rs_interrupt() is a "fast" interrupt, which means that it
381 * runs with interrupts turned off. People who may want to modify
382 * rs_interrupt() should try to keep the interrupt handler as fast as
383 * possible. After you are done making modifications, it is not a bad
384 * idea to do:
385 *
386 * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c
387 *
388 * and look at the resulting assemble code in serial.s.
389 *
390 * - Ted Ts'o (tytso@mit.edu), 7-Mar-93
391 * -----------------------------------------------------------------------
392 */
393
394static _INLINE_ void receive_chars(ser_info_t *info)
395{
396 struct tty_struct *tty = info->tty;
33f0f88f 397 unsigned char ch, flag, *cp;
1da177e4
LT
398 /*int ignored = 0;*/
399 int i;
400 ushort status;
401 struct async_icount *icount;
402 /* struct async_icount_24 *icount; */
403 volatile QUICC_BD *bdp;
404
405 icount = &info->state->icount;
406
407 /* Just loop through the closed BDs and copy the characters into
408 * the buffer.
409 */
410 bdp = info->rx_cur;
411 for (;;) {
412 if (bdp->status & BD_SC_EMPTY) /* If this one is empty */
413 break; /* we are all done */
414
415 /* The read status mask tell us what we should do with
416 * incoming characters, especially if errors occur.
417 * One special case is the use of BD_SC_EMPTY. If
418 * this is not set, we are supposed to be ignoring
419 * inputs. In this case, just mark the buffer empty and
420 * continue.
421 */
422 if (!(info->read_status_mask & BD_SC_EMPTY)) {
423 bdp->status |= BD_SC_EMPTY;
424 bdp->status &=
425 ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV);
426
427 if (bdp->status & BD_SC_WRAP)
428 bdp = info->rx_bd_base;
429 else
430 bdp++;
431 continue;
432 }
433
434 /* Get the number of characters and the buffer pointer.
435 */
436 i = bdp->length;
437 /* cp = (unsigned char *)__va(bdp->buf); */
438 cp = (char *)bdp->buf;
439 status = bdp->status;
440
1da177e4
LT
441 while (i-- > 0) {
442 ch = *cp++;
1da177e4
LT
443 icount->rx++;
444
445#ifdef SERIAL_DEBUG_INTR
446 printk("DR%02x:%02x...", ch, status);
447#endif
33f0f88f
AC
448 flag = TTY_NORMAL;
449
1da177e4
LT
450 if (status & (BD_SC_BR | BD_SC_FR |
451 BD_SC_PR | BD_SC_OV)) {
452 /*
453 * For statistics only
454 */
455 if (status & BD_SC_BR)
456 icount->brk++;
457 else if (status & BD_SC_PR)
458 icount->parity++;
459 else if (status & BD_SC_FR)
460 icount->frame++;
461 if (status & BD_SC_OV)
462 icount->overrun++;
463
464 /*
465 * Now check to see if character should be
466 * ignored, and mask off conditions which
467 * should be ignored.
468 if (status & info->ignore_status_mask) {
469 if (++ignored > 100)
470 break;
471 continue;
472 }
473 */
474 status &= info->read_status_mask;
475
476 if (status & (BD_SC_BR)) {
477#ifdef SERIAL_DEBUG_INTR
478 printk("handling break....");
479#endif
480 *tty->flip.flag_buf_ptr = TTY_BREAK;
481 if (info->flags & ASYNC_SAK)
482 do_SAK(tty);
483 } else if (status & BD_SC_PR)
33f0f88f 484 flag = TTY_PARITY;
1da177e4 485 else if (status & BD_SC_FR)
33f0f88f 486 flag = TTY_FRAME;
1da177e4 487 }
33f0f88f
AC
488 tty_insert_flip_char(tty, ch, flag);
489 if (status & BD_SC_OV)
490 /*
491 * Overrun is special, since it's
492 * reported immediately, and doesn't
493 * affect the current character
494 */
495 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
1da177e4
LT
496 }
497
498 /* This BD is ready to be used again. Clear status.
499 * Get next BD.
500 */
501 bdp->status |= BD_SC_EMPTY;
502 bdp->status &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV);
503
504 if (bdp->status & BD_SC_WRAP)
505 bdp = info->rx_bd_base;
506 else
507 bdp++;
508 }
509
510 info->rx_cur = (QUICC_BD *)bdp;
511
e3948563 512 tty_schedule_flip(tty);
1da177e4
LT
513}
514
515static _INLINE_ void receive_break(ser_info_t *info)
516{
517 struct tty_struct *tty = info->tty;
518
519 info->state->icount.brk++;
520 /* Check to see if there is room in the tty buffer for
521 * the break. If not, we exit now, losing the break. FIXME
522 */
33f0f88f 523 tty_insert_flip_char(tty, 0, TTY_BREAK);
e3948563 524 tty_schedule_flip(tty);
1da177e4
LT
525}
526
527static _INLINE_ void transmit_chars(ser_info_t *info)
528{
529
530 if ((info->flags & TX_WAKEUP) ||
531 (info->tty->flags & (1 << TTY_DO_WRITE_WAKEUP))) {
532 schedule_work(&info->tqueue);
533 }
534
535#ifdef SERIAL_DEBUG_INTR
536 printk("THRE...");
537#endif
538}
539
540#ifdef notdef
541 /* I need to do this for the SCCs, so it is left as a reminder.
542 */
543static _INLINE_ void check_modem_status(struct async_struct *info)
544{
545 int status;
546 /* struct async_icount *icount; */
547 struct async_icount_24 *icount;
548
549 status = serial_in(info, UART_MSR);
550
551 if (status & UART_MSR_ANY_DELTA) {
552 icount = &info->state->icount;
553 /* update input line counters */
554 if (status & UART_MSR_TERI)
555 icount->rng++;
556 if (status & UART_MSR_DDSR)
557 icount->dsr++;
558 if (status & UART_MSR_DDCD) {
559 icount->dcd++;
560#ifdef CONFIG_HARD_PPS
561 if ((info->flags & ASYNC_HARDPPS_CD) &&
562 (status & UART_MSR_DCD))
563 hardpps();
564#endif
565 }
566 if (status & UART_MSR_DCTS)
567 icount->cts++;
568 wake_up_interruptible(&info->delta_msr_wait);
569 }
570
571 if ((info->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
572#if (defined(SERIAL_DEBUG_OPEN) || defined(SERIAL_DEBUG_INTR))
573 printk("ttys%d CD now %s...", info->line,
574 (status & UART_MSR_DCD) ? "on" : "off");
575#endif
576 if (status & UART_MSR_DCD)
577 wake_up_interruptible(&info->open_wait);
578 else {
579#ifdef SERIAL_DEBUG_OPEN
580 printk("scheduling hangup...");
581#endif
582 queue_task(&info->tqueue_hangup,
583 &tq_scheduler);
584 }
585 }
586 if (info->flags & ASYNC_CTS_FLOW) {
587 if (info->tty->hw_stopped) {
588 if (status & UART_MSR_CTS) {
589#if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW))
590 printk("CTS tx start...");
591#endif
592 info->tty->hw_stopped = 0;
593 info->IER |= UART_IER_THRI;
594 serial_out(info, UART_IER, info->IER);
595 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
596 return;
597 }
598 } else {
599 if (!(status & UART_MSR_CTS)) {
600#if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW))
601 printk("CTS tx stop...");
602#endif
603 info->tty->hw_stopped = 1;
604 info->IER &= ~UART_IER_THRI;
605 serial_out(info, UART_IER, info->IER);
606 }
607 }
608 }
609}
610#endif
611
612/*
613 * This is the serial driver's interrupt routine for a single port
614 */
615/* static void rs_360_interrupt(void *dev_id) */ /* until and if we start servicing irqs here */
7d12e780 616static void rs_360_interrupt(int vec, void *dev_id)
1da177e4
LT
617{
618 u_char events;
619 int idx;
620 ser_info_t *info;
621 volatile struct smc_regs *smcp;
622 volatile struct scc_regs *sccp;
623
c7bec5ab 624 info = dev_id;
1da177e4
LT
625
626 idx = PORT_NUM(info->state->smc_scc_num);
627 if (info->state->smc_scc_num & NUM_IS_SCC) {
628 sccp = &pquicc->scc_regs[idx];
629 events = sccp->scc_scce;
630 if (events & SCCM_RX)
631 receive_chars(info);
632 if (events & SCCM_TX)
633 transmit_chars(info);
634 sccp->scc_scce = events;
635 } else {
636 smcp = &pquicc->smc_regs[idx];
637 events = smcp->smc_smce;
638 if (events & SMCM_BRKE)
639 receive_break(info);
640 if (events & SMCM_RX)
641 receive_chars(info);
642 if (events & SMCM_TX)
643 transmit_chars(info);
644 smcp->smc_smce = events;
645 }
646
647#ifdef SERIAL_DEBUG_INTR
648 printk("rs_interrupt_single(%d, %x)...",
649 info->state->smc_scc_num, events);
650#endif
651#ifdef modem_control
652 check_modem_status(info);
653#endif
654 info->last_active = jiffies;
655#ifdef SERIAL_DEBUG_INTR
656 printk("end.\n");
657#endif
658}
659
660
661/*
662 * -------------------------------------------------------------------
663 * Here ends the serial interrupt routines.
664 * -------------------------------------------------------------------
665 */
666
667
668static void do_softint(void *private_)
669{
670 ser_info_t *info = (ser_info_t *) private_;
671 struct tty_struct *tty;
672
673 tty = info->tty;
674 if (!tty)
675 return;
676
677 if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event))
678 tty_wakeup(tty);
679}
680
681
682/*
683 * This routine is called from the scheduler tqueue when the interrupt
684 * routine has signalled that a hangup has occurred. The path of
685 * hangup processing is:
686 *
687 * serial interrupt routine -> (scheduler tqueue) ->
688 * do_serial_hangup() -> tty->hangup() -> rs_hangup()
689 *
690 */
691static void do_serial_hangup(void *private_)
692{
693 struct async_struct *info = (struct async_struct *) private_;
694 struct tty_struct *tty;
695
696 tty = info->tty;
697 if (!tty)
698 return;
699
700 tty_hangup(tty);
701}
702
703
704static int startup(ser_info_t *info)
705{
706 unsigned long flags;
707 int retval=0;
708 int idx;
709 /*struct serial_state *state = info->state;*/
710 volatile struct smc_regs *smcp;
711 volatile struct scc_regs *sccp;
712 volatile struct smc_uart_pram *up;
713 volatile struct uart_pram *scup;
714
715
716 local_irq_save(flags);
717
718 if (info->flags & ASYNC_INITIALIZED) {
719 goto errout;
720 }
721
722#ifdef maybe
723 if (!state->port || !state->type) {
724 if (info->tty)
725 set_bit(TTY_IO_ERROR, &info->tty->flags);
726 goto errout;
727 }
728#endif
729
730#ifdef SERIAL_DEBUG_OPEN
731 printk("starting up ttys%d (irq %d)...", info->line, state->irq);
732#endif
733
734
735#ifdef modem_control
736 info->MCR = 0;
737 if (info->tty->termios->c_cflag & CBAUD)
738 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
739#endif
740
741 if (info->tty)
742 clear_bit(TTY_IO_ERROR, &info->tty->flags);
743
744 /*
745 * and set the speed of the serial port
746 */
747 change_speed(info);
748
749 idx = PORT_NUM(info->state->smc_scc_num);
750 if (info->state->smc_scc_num & NUM_IS_SCC) {
751 sccp = &pquicc->scc_regs[idx];
752 scup = &pquicc->pram[info->state->port].scc.pscc.u;
753
754 scup->mrblr = RX_BUF_SIZE;
755 scup->max_idl = RX_BUF_SIZE;
756
757 sccp->scc_sccm |= (UART_SCCM_TX | UART_SCCM_RX);
758 sccp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
759
760 } else {
761 smcp = &pquicc->smc_regs[idx];
762
763 /* Enable interrupts and I/O.
764 */
765 smcp->smc_smcm |= (SMCM_RX | SMCM_TX);
766 smcp->smc_smcmr |= (SMCMR_REN | SMCMR_TEN);
767
768 /* We can tune the buffer length and idle characters
769 * to take advantage of the entire incoming buffer size.
770 * If mrblr is something other than 1, maxidl has to be
771 * non-zero or we never get an interrupt. The maxidl
772 * is the number of character times we wait after reception
773 * of the last character before we decide no more characters
774 * are coming.
775 */
776 /* up = (smc_uart_t *)&pquicc->cp_dparam[state->port]; */
777 /* holy unionized structures, Batman: */
778 up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
779
780 up->mrblr = RX_BUF_SIZE;
781 up->max_idl = RX_BUF_SIZE;
782
783 up->brkcr = 1; /* number of break chars */
784 }
785
786 info->flags |= ASYNC_INITIALIZED;
787 local_irq_restore(flags);
788 return 0;
789
790errout:
791 local_irq_restore(flags);
792 return retval;
793}
794
795/*
796 * This routine will shutdown a serial port; interrupts are disabled, and
797 * DTR is dropped if the hangup on close termio flag is on.
798 */
799static void shutdown(ser_info_t *info)
800{
801 unsigned long flags;
802 struct serial_state *state;
803 int idx;
804 volatile struct smc_regs *smcp;
805 volatile struct scc_regs *sccp;
806
807 if (!(info->flags & ASYNC_INITIALIZED))
808 return;
809
810 state = info->state;
811
812#ifdef SERIAL_DEBUG_OPEN
813 printk("Shutting down serial port %d (irq %d)....", info->line,
814 state->irq);
815#endif
816
817 local_irq_save(flags);
818
819 idx = PORT_NUM(state->smc_scc_num);
820 if (state->smc_scc_num & NUM_IS_SCC) {
821 sccp = &pquicc->scc_regs[idx];
822 sccp->scc_gsmr.w.low &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
823#ifdef CONFIG_SERIAL_CONSOLE
824 /* We can't disable the transmitter if this is the
825 * system console.
826 */
827 if ((state - rs_table) != CONFIG_SERIAL_CONSOLE_PORT)
828#endif
829 sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX);
830 } else {
831 smcp = &pquicc->smc_regs[idx];
832
833 /* Disable interrupts and I/O.
834 */
835 smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX);
836#ifdef CONFIG_SERIAL_CONSOLE
837 /* We can't disable the transmitter if this is the
838 * system console.
839 */
840 if ((state - rs_table) != CONFIG_SERIAL_CONSOLE_PORT)
841#endif
842 smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
843 }
844
845 if (info->tty)
846 set_bit(TTY_IO_ERROR, &info->tty->flags);
847
848 info->flags &= ~ASYNC_INITIALIZED;
849 local_irq_restore(flags);
850}
851
852/*
853 * This routine is called to set the UART divisor registers to match
854 * the specified baud rate for a serial port.
855 */
856static void change_speed(ser_info_t *info)
857{
858 int baud_rate;
859 unsigned cflag, cval, scval, prev_mode;
860 int i, bits, sbits, idx;
861 unsigned long flags;
862 struct serial_state *state;
863 volatile struct smc_regs *smcp;
864 volatile struct scc_regs *sccp;
865
866 if (!info->tty || !info->tty->termios)
867 return;
868 cflag = info->tty->termios->c_cflag;
869
870 state = info->state;
871
872 /* Character length programmed into the mode register is the
873 * sum of: 1 start bit, number of data bits, 0 or 1 parity bit,
874 * 1 or 2 stop bits, minus 1.
875 * The value 'bits' counts this for us.
876 */
877 cval = 0;
878 scval = 0;
879
880 /* byte size and parity */
881 switch (cflag & CSIZE) {
882 case CS5: bits = 5; break;
883 case CS6: bits = 6; break;
884 case CS7: bits = 7; break;
885 case CS8: bits = 8; break;
886 /* Never happens, but GCC is too dumb to figure it out */
887 default: bits = 8; break;
888 }
889 sbits = bits - 5;
890
891 if (cflag & CSTOPB) {
892 cval |= SMCMR_SL; /* Two stops */
893 scval |= SCU_PMSR_SL;
894 bits++;
895 }
896 if (cflag & PARENB) {
897 cval |= SMCMR_PEN;
898 scval |= SCU_PMSR_PEN;
899 bits++;
900 }
901 if (!(cflag & PARODD)) {
902 cval |= SMCMR_PM_EVEN;
903 scval |= (SCU_PMSR_REVP | SCU_PMSR_TEVP);
904 }
905
906 /* Determine divisor based on baud rate */
907 i = cflag & CBAUD;
908 if (i >= (sizeof(baud_table)/sizeof(int)))
909 baud_rate = 9600;
910 else
911 baud_rate = baud_table[i];
912
913 info->timeout = (TX_BUF_SIZE*HZ*bits);
914 info->timeout += HZ/50; /* Add .02 seconds of slop */
915
916#ifdef modem_control
917 /* CTS flow control flag and modem status interrupts */
918 info->IER &= ~UART_IER_MSI;
919 if (info->flags & ASYNC_HARDPPS_CD)
920 info->IER |= UART_IER_MSI;
921 if (cflag & CRTSCTS) {
922 info->flags |= ASYNC_CTS_FLOW;
923 info->IER |= UART_IER_MSI;
924 } else
925 info->flags &= ~ASYNC_CTS_FLOW;
926 if (cflag & CLOCAL)
927 info->flags &= ~ASYNC_CHECK_CD;
928 else {
929 info->flags |= ASYNC_CHECK_CD;
930 info->IER |= UART_IER_MSI;
931 }
932 serial_out(info, UART_IER, info->IER);
933#endif
934
935 /*
936 * Set up parity check flag
937 */
1da177e4
LT
938 info->read_status_mask = (BD_SC_EMPTY | BD_SC_OV);
939 if (I_INPCK(info->tty))
940 info->read_status_mask |= BD_SC_FR | BD_SC_PR;
941 if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
942 info->read_status_mask |= BD_SC_BR;
943
944 /*
945 * Characters to ignore
946 */
947 info->ignore_status_mask = 0;
948 if (I_IGNPAR(info->tty))
949 info->ignore_status_mask |= BD_SC_PR | BD_SC_FR;
950 if (I_IGNBRK(info->tty)) {
951 info->ignore_status_mask |= BD_SC_BR;
952 /*
953 * If we're ignore parity and break indicators, ignore
954 * overruns too. (For real raw support).
955 */
956 if (I_IGNPAR(info->tty))
957 info->ignore_status_mask |= BD_SC_OV;
958 }
959 /*
960 * !!! ignore all characters if CREAD is not set
961 */
962 if ((cflag & CREAD) == 0)
963 info->read_status_mask &= ~BD_SC_EMPTY;
964 local_irq_save(flags);
965
966 /* Start bit has not been added (so don't, because we would just
967 * subtract it later), and we need to add one for the number of
968 * stops bits (there is always at least one).
969 */
970 bits++;
971 idx = PORT_NUM(state->smc_scc_num);
972 if (state->smc_scc_num & NUM_IS_SCC) {
973 sccp = &pquicc->scc_regs[idx];
974 sccp->scc_psmr = (sbits << 12) | scval;
975 } else {
976 smcp = &pquicc->smc_regs[idx];
977
978 /* Set the mode register. We want to keep a copy of the
979 * enables, because we want to put them back if they were
980 * present.
981 */
982 prev_mode = smcp->smc_smcmr;
983 smcp->smc_smcmr = smcr_mk_clen(bits) | cval | SMCMR_SM_UART;
984 smcp->smc_smcmr |= (prev_mode & (SMCMR_REN | SMCMR_TEN));
985 }
986
987 m360_cpm_setbrg((state - rs_table), baud_rate);
988
989 local_irq_restore(flags);
990}
991
992static void rs_360_put_char(struct tty_struct *tty, unsigned char ch)
993{
994 ser_info_t *info = (ser_info_t *)tty->driver_data;
995 volatile QUICC_BD *bdp;
996
997 if (serial_paranoia_check(info, tty->name, "rs_put_char"))
998 return;
999
1000 if (!tty)
1001 return;
1002
1003 bdp = info->tx_cur;
1004 while (bdp->status & BD_SC_READY);
1005
1006 /* *((char *)__va(bdp->buf)) = ch; */
1007 *((char *)bdp->buf) = ch;
1008 bdp->length = 1;
1009 bdp->status |= BD_SC_READY;
1010
1011 /* Get next BD.
1012 */
1013 if (bdp->status & BD_SC_WRAP)
1014 bdp = info->tx_bd_base;
1015 else
1016 bdp++;
1017
1018 info->tx_cur = (QUICC_BD *)bdp;
1019
1020}
1021
1022static int rs_360_write(struct tty_struct * tty,
1023 const unsigned char *buf, int count)
1024{
1025 int c, ret = 0;
1026 ser_info_t *info = (ser_info_t *)tty->driver_data;
1027 volatile QUICC_BD *bdp;
1028
1029#ifdef CONFIG_KGDB
1030 /* Try to let stub handle output. Returns true if it did. */
1031 if (kgdb_output_string(buf, count))
1032 return ret;
1033#endif
1034
1035 if (serial_paranoia_check(info, tty->name, "rs_write"))
1036 return 0;
1037
1038 if (!tty)
1039 return 0;
1040
1041 bdp = info->tx_cur;
1042
1043 while (1) {
1044 c = min(count, TX_BUF_SIZE);
1045
1046 if (c <= 0)
1047 break;
1048
1049 if (bdp->status & BD_SC_READY) {
1050 info->flags |= TX_WAKEUP;
1051 break;
1052 }
1053
1054 /* memcpy(__va(bdp->buf), buf, c); */
1055 memcpy((void *)bdp->buf, buf, c);
1056
1057 bdp->length = c;
1058 bdp->status |= BD_SC_READY;
1059
1060 buf += c;
1061 count -= c;
1062 ret += c;
1063
1064 /* Get next BD.
1065 */
1066 if (bdp->status & BD_SC_WRAP)
1067 bdp = info->tx_bd_base;
1068 else
1069 bdp++;
1070 info->tx_cur = (QUICC_BD *)bdp;
1071 }
1072 return ret;
1073}
1074
1075static int rs_360_write_room(struct tty_struct *tty)
1076{
1077 ser_info_t *info = (ser_info_t *)tty->driver_data;
1078 int ret;
1079
1080 if (serial_paranoia_check(info, tty->name, "rs_write_room"))
1081 return 0;
1082
1083 if ((info->tx_cur->status & BD_SC_READY) == 0) {
1084 info->flags &= ~TX_WAKEUP;
1085 ret = TX_BUF_SIZE;
1086 }
1087 else {
1088 info->flags |= TX_WAKEUP;
1089 ret = 0;
1090 }
1091 return ret;
1092}
1093
1094/* I could track this with transmit counters....maybe later.
1095*/
1096static int rs_360_chars_in_buffer(struct tty_struct *tty)
1097{
1098 ser_info_t *info = (ser_info_t *)tty->driver_data;
1099
1100 if (serial_paranoia_check(info, tty->name, "rs_chars_in_buffer"))
1101 return 0;
1102 return 0;
1103}
1104
1105static void rs_360_flush_buffer(struct tty_struct *tty)
1106{
1107 ser_info_t *info = (ser_info_t *)tty->driver_data;
1108
1109 if (serial_paranoia_check(info, tty->name, "rs_flush_buffer"))
1110 return;
1111
1112 /* There is nothing to "flush", whatever we gave the CPM
1113 * is on its way out.
1114 */
1115 tty_wakeup(tty);
1116 info->flags &= ~TX_WAKEUP;
1117}
1118
1119/*
1120 * This function is used to send a high-priority XON/XOFF character to
1121 * the device
1122 */
1123static void rs_360_send_xchar(struct tty_struct *tty, char ch)
1124{
1125 volatile QUICC_BD *bdp;
1126
1127 ser_info_t *info = (ser_info_t *)tty->driver_data;
1128
1129 if (serial_paranoia_check(info, tty->name, "rs_send_char"))
1130 return;
1131
1132 bdp = info->tx_cur;
1133 while (bdp->status & BD_SC_READY);
1134
1135 /* *((char *)__va(bdp->buf)) = ch; */
1136 *((char *)bdp->buf) = ch;
1137 bdp->length = 1;
1138 bdp->status |= BD_SC_READY;
1139
1140 /* Get next BD.
1141 */
1142 if (bdp->status & BD_SC_WRAP)
1143 bdp = info->tx_bd_base;
1144 else
1145 bdp++;
1146
1147 info->tx_cur = (QUICC_BD *)bdp;
1148}
1149
1150/*
1151 * ------------------------------------------------------------
1152 * rs_throttle()
1153 *
1154 * This routine is called by the upper-layer tty layer to signal that
1155 * incoming characters should be throttled.
1156 * ------------------------------------------------------------
1157 */
1158static void rs_360_throttle(struct tty_struct * tty)
1159{
1160 ser_info_t *info = (ser_info_t *)tty->driver_data;
1161#ifdef SERIAL_DEBUG_THROTTLE
1162 char buf[64];
1163
1164 printk("throttle %s: %d....\n", _tty_name(tty, buf),
1165 tty->ldisc.chars_in_buffer(tty));
1166#endif
1167
1168 if (serial_paranoia_check(info, tty->name, "rs_throttle"))
1169 return;
1170
1171 if (I_IXOFF(tty))
1172 rs_360_send_xchar(tty, STOP_CHAR(tty));
1173
1174#ifdef modem_control
1175 if (tty->termios->c_cflag & CRTSCTS)
1176 info->MCR &= ~UART_MCR_RTS;
1177
1178 local_irq_disable();
1179 serial_out(info, UART_MCR, info->MCR);
1180 local_irq_enable();
1181#endif
1182}
1183
1184static void rs_360_unthrottle(struct tty_struct * tty)
1185{
1186 ser_info_t *info = (ser_info_t *)tty->driver_data;
1187#ifdef SERIAL_DEBUG_THROTTLE
1188 char buf[64];
1189
1190 printk("unthrottle %s: %d....\n", _tty_name(tty, buf),
1191 tty->ldisc.chars_in_buffer(tty));
1192#endif
1193
1194 if (serial_paranoia_check(info, tty->name, "rs_unthrottle"))
1195 return;
1196
1197 if (I_IXOFF(tty)) {
1198 if (info->x_char)
1199 info->x_char = 0;
1200 else
1201 rs_360_send_xchar(tty, START_CHAR(tty));
1202 }
1203#ifdef modem_control
1204 if (tty->termios->c_cflag & CRTSCTS)
1205 info->MCR |= UART_MCR_RTS;
1206 local_irq_disable();
1207 serial_out(info, UART_MCR, info->MCR);
1208 local_irq_enable();
1209#endif
1210}
1211
1212/*
1213 * ------------------------------------------------------------
1214 * rs_ioctl() and friends
1215 * ------------------------------------------------------------
1216 */
1217
1218#ifdef maybe
1219/*
1220 * get_lsr_info - get line status register info
1221 *
1222 * Purpose: Let user call ioctl() to get info when the UART physically
1223 * is emptied. On bus types like RS485, the transmitter must
1224 * release the bus after transmitting. This must be done when
1225 * the transmit shift register is empty, not be done when the
1226 * transmit holding register is empty. This functionality
1227 * allows an RS485 driver to be written in user space.
1228 */
1229static int get_lsr_info(struct async_struct * info, unsigned int *value)
1230{
1231 unsigned char status;
1232 unsigned int result;
1233
1234 local_irq_disable();
1235 status = serial_in(info, UART_LSR);
1236 local_irq_enable();
1237 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
1238 return put_user(result,value);
1239}
1240#endif
1241
1242static int rs_360_tiocmget(struct tty_struct *tty, struct file *file)
1243{
1244 ser_info_t *info = (ser_info_t *)tty->driver_data;
1245 unsigned int result = 0;
1246#ifdef modem_control
1247 unsigned char control, status;
1248
1249 if (serial_paranoia_check(info, tty->name, __FUNCTION__))
1250 return -ENODEV;
1251
1252 if (tty->flags & (1 << TTY_IO_ERROR))
1253 return -EIO;
1254
1255 control = info->MCR;
1256 local_irq_disable();
1257 status = serial_in(info, UART_MSR);
1258 local_irq_enable();
1259 result = ((control & UART_MCR_RTS) ? TIOCM_RTS : 0)
1260 | ((control & UART_MCR_DTR) ? TIOCM_DTR : 0)
1261#ifdef TIOCM_OUT1
1262 | ((control & UART_MCR_OUT1) ? TIOCM_OUT1 : 0)
1263 | ((control & UART_MCR_OUT2) ? TIOCM_OUT2 : 0)
1264#endif
1265 | ((status & UART_MSR_DCD) ? TIOCM_CAR : 0)
1266 | ((status & UART_MSR_RI) ? TIOCM_RNG : 0)
1267 | ((status & UART_MSR_DSR) ? TIOCM_DSR : 0)
1268 | ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1269#endif
1270 return result;
1271}
1272
1273static int rs_360_tiocmset(struct tty_struct *tty, struct file *file,
1274 unsigned int set, unsigned int clear)
1275{
1276#ifdef modem_control
1277 ser_info_t *info = (ser_info_t *)tty->driver_data;
1278 unsigned int arg;
1279
1280 if (serial_paranoia_check(info, tty->name, __FUNCTION__))
1281 return -ENODEV;
1282
1283 if (tty->flags & (1 << TTY_IO_ERROR))
1284 return -EIO;
c0754c99 1285 /* FIXME: locking on info->mcr */
1da177e4
LT
1286 if (set & TIOCM_RTS)
1287 info->mcr |= UART_MCR_RTS;
1288 if (set & TIOCM_DTR)
1289 info->mcr |= UART_MCR_DTR;
1290 if (clear & TIOCM_RTS)
1291 info->MCR &= ~UART_MCR_RTS;
1292 if (clear & TIOCM_DTR)
1293 info->MCR &= ~UART_MCR_DTR;
1294
1295#ifdef TIOCM_OUT1
1296 if (set & TIOCM_OUT1)
1297 info->MCR |= UART_MCR_OUT1;
1298 if (set & TIOCM_OUT2)
1299 info->MCR |= UART_MCR_OUT2;
1300 if (clear & TIOCM_OUT1)
1301 info->MCR &= ~UART_MCR_OUT1;
1302 if (clear & TIOCM_OUT2)
1303 info->MCR &= ~UART_MCR_OUT2;
1304#endif
1305
1306 local_irq_disable();
1307 serial_out(info, UART_MCR, info->MCR);
1308 local_irq_enable();
1309#endif
1310 return 0;
1311}
1312
1313/* Sending a break is a two step process on the SMC/SCC. It is accomplished
1314 * by sending a STOP TRANSMIT command followed by a RESTART TRANSMIT
1315 * command. We take advantage of the begin/end functions to make this
1316 * happen.
1317 */
1318static ushort smc_chan_map[] = {
1319 CPM_CR_CH_SMC1,
1320 CPM_CR_CH_SMC2
1321};
1322
1323static ushort scc_chan_map[] = {
1324 CPM_CR_CH_SCC1,
1325 CPM_CR_CH_SCC2,
1326 CPM_CR_CH_SCC3,
1327 CPM_CR_CH_SCC4
1328};
1329
1330static void begin_break(ser_info_t *info)
1331{
1332 volatile QUICC *cp;
1333 ushort chan;
1334 int idx;
1335
1336 cp = pquicc;
1337
1338 idx = PORT_NUM(info->state->smc_scc_num);
1339 if (info->state->smc_scc_num & NUM_IS_SCC)
1340 chan = scc_chan_map[idx];
1341 else
1342 chan = smc_chan_map[idx];
1343
1344 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_STOP_TX) | CPM_CR_FLG;
1345 while (cp->cp_cr & CPM_CR_FLG);
1346}
1347
1348static void end_break(ser_info_t *info)
1349{
1350 volatile QUICC *cp;
1351 ushort chan;
1352 int idx;
1353
1354 cp = pquicc;
1355
1356 idx = PORT_NUM(info->state->smc_scc_num);
1357 if (info->state->smc_scc_num & NUM_IS_SCC)
1358 chan = scc_chan_map[idx];
1359 else
1360 chan = smc_chan_map[idx];
1361
1362 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_RESTART_TX) | CPM_CR_FLG;
1363 while (cp->cp_cr & CPM_CR_FLG);
1364}
1365
1366/*
1367 * This routine sends a break character out the serial port.
1368 */
5d582b4e 1369static void send_break(ser_info_t *info, unsigned int duration)
1da177e4 1370{
1da177e4
LT
1371#ifdef SERIAL_DEBUG_SEND_BREAK
1372 printk("rs_send_break(%d) jiff=%lu...", duration, jiffies);
1373#endif
1374 begin_break(info);
5d582b4e 1375 msleep_interruptible(duration);
1da177e4
LT
1376 end_break(info);
1377#ifdef SERIAL_DEBUG_SEND_BREAK
1378 printk("done jiffies=%lu\n", jiffies);
1379#endif
1380}
1381
1382
1383static int rs_360_ioctl(struct tty_struct *tty, struct file * file,
1384 unsigned int cmd, unsigned long arg)
1385{
1386 int error;
1387 ser_info_t *info = (ser_info_t *)tty->driver_data;
1388 int retval;
1389 struct async_icount cnow;
1390 /* struct async_icount_24 cnow;*/ /* kernel counter temps */
1391 struct serial_icounter_struct *p_cuser; /* user space */
1392
1393 if (serial_paranoia_check(info, tty->name, "rs_ioctl"))
1394 return -ENODEV;
1395
1396 if ((cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
1397 if (tty->flags & (1 << TTY_IO_ERROR))
1398 return -EIO;
1399 }
1400
1401 switch (cmd) {
1402 case TCSBRK: /* SVID version: non-zero arg --> no break */
1403 retval = tty_check_change(tty);
1404 if (retval)
1405 return retval;
1406 tty_wait_until_sent(tty, 0);
1407 if (signal_pending(current))
1408 return -EINTR;
1409 if (!arg) {
5d582b4e 1410 send_break(info, 250); /* 1/4 second */
1da177e4
LT
1411 if (signal_pending(current))
1412 return -EINTR;
1413 }
1414 return 0;
1415 case TCSBRKP: /* support for POSIX tcsendbreak() */
1416 retval = tty_check_change(tty);
1417 if (retval)
1418 return retval;
1419 tty_wait_until_sent(tty, 0);
1420 if (signal_pending(current))
1421 return -EINTR;
5d582b4e 1422 send_break(info, arg ? arg*100 : 250);
1da177e4
LT
1423 if (signal_pending(current))
1424 return -EINTR;
1425 return 0;
1426 case TIOCSBRK:
1427 retval = tty_check_change(tty);
1428 if (retval)
1429 return retval;
1430 tty_wait_until_sent(tty, 0);
1431 begin_break(info);
1432 return 0;
1433 case TIOCCBRK:
1434 retval = tty_check_change(tty);
1435 if (retval)
1436 return retval;
1437 end_break(info);
1438 return 0;
1439 case TIOCGSOFTCAR:
1440 /* return put_user(C_CLOCAL(tty) ? 1 : 0, (int *) arg); */
1441 put_user(C_CLOCAL(tty) ? 1 : 0, (int *) arg);
1442 return 0;
1443 case TIOCSSOFTCAR:
1444 error = get_user(arg, (unsigned int *) arg);
1445 if (error)
1446 return error;
1447 tty->termios->c_cflag =
1448 ((tty->termios->c_cflag & ~CLOCAL) |
1449 (arg ? CLOCAL : 0));
1450 return 0;
1451#ifdef maybe
1452 case TIOCSERGETLSR: /* Get line status register */
1453 return get_lsr_info(info, (unsigned int *) arg);
1454#endif
1455 /*
1456 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1457 * - mask passed in arg for lines of interest
1458 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1459 * Caller should use TIOCGICOUNT to see which one it was
1460 */
1461 case TIOCMIWAIT:
1462#ifdef modem_control
1463 local_irq_disable();
1464 /* note the counters on entry */
1465 cprev = info->state->icount;
1466 local_irq_enable();
1467 while (1) {
1468 interruptible_sleep_on(&info->delta_msr_wait);
1469 /* see if a signal did it */
1470 if (signal_pending(current))
1471 return -ERESTARTSYS;
1472 local_irq_disable();
1473 cnow = info->state->icount; /* atomic copy */
1474 local_irq_enable();
1475 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
1476 cnow.dcd == cprev.dcd && cnow.cts == cprev.cts)
1477 return -EIO; /* no change => error */
1478 if ( ((arg & TIOCM_RNG) && (cnow.rng != cprev.rng)) ||
1479 ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) ||
1480 ((arg & TIOCM_CD) && (cnow.dcd != cprev.dcd)) ||
1481 ((arg & TIOCM_CTS) && (cnow.cts != cprev.cts)) ) {
1482 return 0;
1483 }
1484 cprev = cnow;
1485 }
1486 /* NOTREACHED */
1487#else
1488 return 0;
1489#endif
1490
1491 /*
1492 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1493 * Return: write counters to the user passed counter struct
1494 * NB: both 1->0 and 0->1 transitions are counted except for
1495 * RI where only 0->1 is counted.
1496 */
1497 case TIOCGICOUNT:
1498 local_irq_disable();
1499 cnow = info->state->icount;
1500 local_irq_enable();
1501 p_cuser = (struct serial_icounter_struct *) arg;
1502/* error = put_user(cnow.cts, &p_cuser->cts); */
1503/* if (error) return error; */
1504/* error = put_user(cnow.dsr, &p_cuser->dsr); */
1505/* if (error) return error; */
1506/* error = put_user(cnow.rng, &p_cuser->rng); */
1507/* if (error) return error; */
1508/* error = put_user(cnow.dcd, &p_cuser->dcd); */
1509/* if (error) return error; */
1510
1511 put_user(cnow.cts, &p_cuser->cts);
1512 put_user(cnow.dsr, &p_cuser->dsr);
1513 put_user(cnow.rng, &p_cuser->rng);
1514 put_user(cnow.dcd, &p_cuser->dcd);
1515 return 0;
1516
1517 default:
1518 return -ENOIOCTLCMD;
1519 }
1520 return 0;
1521}
1522
1523/* FIX UP modem control here someday......
1524*/
606d099c 1525static void rs_360_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
1da177e4
LT
1526{
1527 ser_info_t *info = (ser_info_t *)tty->driver_data;
1528
1da177e4
LT
1529 change_speed(info);
1530
1531#ifdef modem_control
1532 /* Handle transition to B0 status */
1533 if ((old_termios->c_cflag & CBAUD) &&
1534 !(tty->termios->c_cflag & CBAUD)) {
1535 info->MCR &= ~(UART_MCR_DTR|UART_MCR_RTS);
1536 local_irq_disable();
1537 serial_out(info, UART_MCR, info->MCR);
1538 local_irq_enable();
1539 }
1540
1541 /* Handle transition away from B0 status */
1542 if (!(old_termios->c_cflag & CBAUD) &&
1543 (tty->termios->c_cflag & CBAUD)) {
1544 info->MCR |= UART_MCR_DTR;
1545 if (!tty->hw_stopped ||
1546 !(tty->termios->c_cflag & CRTSCTS)) {
1547 info->MCR |= UART_MCR_RTS;
1548 }
1549 local_irq_disable();
1550 serial_out(info, UART_MCR, info->MCR);
1551 local_irq_enable();
1552 }
1553
1554 /* Handle turning off CRTSCTS */
1555 if ((old_termios->c_cflag & CRTSCTS) &&
1556 !(tty->termios->c_cflag & CRTSCTS)) {
1557 tty->hw_stopped = 0;
1558 rs_360_start(tty);
1559 }
1560#endif
1561
1562#if 0
1563 /*
1564 * No need to wake up processes in open wait, since they
1565 * sample the CLOCAL flag once, and don't recheck it.
1566 * XXX It's not clear whether the current behavior is correct
1567 * or not. Hence, this may change.....
1568 */
1569 if (!(old_termios->c_cflag & CLOCAL) &&
1570 (tty->termios->c_cflag & CLOCAL))
1571 wake_up_interruptible(&info->open_wait);
1572#endif
1573}
1574
1575/*
1576 * ------------------------------------------------------------
1577 * rs_close()
1578 *
1579 * This routine is called when the serial port gets closed. First, we
1580 * wait for the last remaining data to be sent. Then, we unlink its
1581 * async structure from the interrupt chain if necessary, and we free
1582 * that IRQ if nothing is left in the chain.
1583 * ------------------------------------------------------------
1584 */
1585static void rs_360_close(struct tty_struct *tty, struct file * filp)
1586{
1587 ser_info_t *info = (ser_info_t *)tty->driver_data;
1588 /* struct async_state *state; */
1589 struct serial_state *state;
1590 unsigned long flags;
1591 int idx;
1592 volatile struct smc_regs *smcp;
1593 volatile struct scc_regs *sccp;
1594
1595 if (!info || serial_paranoia_check(info, tty->name, "rs_close"))
1596 return;
1597
1598 state = info->state;
1599
1600 local_irq_save(flags);
1601
1602 if (tty_hung_up_p(filp)) {
1603 DBG_CNT("before DEC-hung");
1604 local_irq_restore(flags);
1605 return;
1606 }
1607
1608#ifdef SERIAL_DEBUG_OPEN
1609 printk("rs_close ttys%d, count = %d\n", info->line, state->count);
1610#endif
1611 if ((tty->count == 1) && (state->count != 1)) {
1612 /*
1613 * Uh, oh. tty->count is 1, which means that the tty
1614 * structure will be freed. state->count should always
1615 * be one in these conditions. If it's greater than
1616 * one, we've got real problems, since it means the
1617 * serial port won't be shutdown.
1618 */
1619 printk("rs_close: bad serial port count; tty->count is 1, "
1620 "state->count is %d\n", state->count);
1621 state->count = 1;
1622 }
1623 if (--state->count < 0) {
1624 printk("rs_close: bad serial port count for ttys%d: %d\n",
1625 info->line, state->count);
1626 state->count = 0;
1627 }
1628 if (state->count) {
1629 DBG_CNT("before DEC-2");
1630 local_irq_restore(flags);
1631 return;
1632 }
1633 info->flags |= ASYNC_CLOSING;
1634 /*
1635 * Now we wait for the transmit buffer to clear; and we notify
1636 * the line discipline to only process XON/XOFF characters.
1637 */
1638 tty->closing = 1;
1639 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
1640 tty_wait_until_sent(tty, info->closing_wait);
1641 /*
1642 * At this point we stop accepting input. To do this, we
1643 * disable the receive line status interrupts, and tell the
1644 * interrupt driver to stop checking the data ready bit in the
1645 * line status register.
1646 */
1647 info->read_status_mask &= ~BD_SC_EMPTY;
1648 if (info->flags & ASYNC_INITIALIZED) {
1649
1650 idx = PORT_NUM(info->state->smc_scc_num);
1651 if (info->state->smc_scc_num & NUM_IS_SCC) {
1652 sccp = &pquicc->scc_regs[idx];
1653 sccp->scc_sccm &= ~UART_SCCM_RX;
1654 sccp->scc_gsmr.w.low &= ~SCC_GSMRL_ENR;
1655 } else {
1656 smcp = &pquicc->smc_regs[idx];
1657 smcp->smc_smcm &= ~SMCM_RX;
1658 smcp->smc_smcmr &= ~SMCMR_REN;
1659 }
1660 /*
1661 * Before we drop DTR, make sure the UART transmitter
1662 * has completely drained; this is especially
1663 * important if there is a transmit FIFO!
1664 */
1665 rs_360_wait_until_sent(tty, info->timeout);
1666 }
1667 shutdown(info);
1668 if (tty->driver->flush_buffer)
1669 tty->driver->flush_buffer(tty);
1670 tty_ldisc_flush(tty);
1671 tty->closing = 0;
1672 info->event = 0;
1673 info->tty = 0;
1674 if (info->blocked_open) {
1675 if (info->close_delay) {
1676 msleep_interruptible(jiffies_to_msecs(info->close_delay));
1677 }
1678 wake_up_interruptible(&info->open_wait);
1679 }
1680 info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
1681 wake_up_interruptible(&info->close_wait);
1682 local_irq_restore(flags);
1683}
1684
1685/*
1686 * rs_wait_until_sent() --- wait until the transmitter is empty
1687 */
1688static void rs_360_wait_until_sent(struct tty_struct *tty, int timeout)
1689{
1690 ser_info_t *info = (ser_info_t *)tty->driver_data;
1691 unsigned long orig_jiffies, char_time;
1692 /*int lsr;*/
1693 volatile QUICC_BD *bdp;
1694
1695 if (serial_paranoia_check(info, tty->name, "rs_wait_until_sent"))
1696 return;
1697
1698#ifdef maybe
1699 if (info->state->type == PORT_UNKNOWN)
1700 return;
1701#endif
1702
1703 orig_jiffies = jiffies;
1704 /*
1705 * Set the check interval to be 1/5 of the estimated time to
1706 * send a single character, and make it at least 1. The check
1707 * interval should also be less than the timeout.
1708 *
1709 * Note: we have to use pretty tight timings here to satisfy
1710 * the NIST-PCTS.
1711 */
1712 char_time = 1;
1713 if (timeout)
1714 char_time = min(char_time, (unsigned long)timeout);
1715#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1716 printk("In rs_wait_until_sent(%d) check=%lu...", timeout, char_time);
1717 printk("jiff=%lu...", jiffies);
1718#endif
1719
1720 /* We go through the loop at least once because we can't tell
1721 * exactly when the last character exits the shifter. There can
1722 * be at least two characters waiting to be sent after the buffers
1723 * are empty.
1724 */
1725 do {
1726#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1727 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
1728#endif
1729/* current->counter = 0; make us low-priority */
1730 msleep_interruptible(jiffies_to_msecs(char_time));
1731 if (signal_pending(current))
1732 break;
d1ec61e6 1733 if (timeout && (time_after(jiffies, orig_jiffies + timeout)))
1da177e4
LT
1734 break;
1735 /* The 'tx_cur' is really the next buffer to send. We
1736 * have to back up to the previous BD and wait for it
1737 * to go. This isn't perfect, because all this indicates
1738 * is the buffer is available. There are still characters
1739 * in the CPM FIFO.
1740 */
1741 bdp = info->tx_cur;
1742 if (bdp == info->tx_bd_base)
1743 bdp += (TX_NUM_FIFO-1);
1744 else
1745 bdp--;
1746 } while (bdp->status & BD_SC_READY);
1747 current->state = TASK_RUNNING;
1748#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1749 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
1750#endif
1751}
1752
1753/*
1754 * rs_hangup() --- called by tty_hangup() when a hangup is signaled.
1755 */
1756static void rs_360_hangup(struct tty_struct *tty)
1757{
1758 ser_info_t *info = (ser_info_t *)tty->driver_data;
1759 struct serial_state *state = info->state;
1760
1761 if (serial_paranoia_check(info, tty->name, "rs_hangup"))
1762 return;
1763
1764 state = info->state;
1765
1766 rs_360_flush_buffer(tty);
1767 shutdown(info);
1768 info->event = 0;
1769 state->count = 0;
1770 info->flags &= ~ASYNC_NORMAL_ACTIVE;
1771 info->tty = 0;
1772 wake_up_interruptible(&info->open_wait);
1773}
1774
1775/*
1776 * ------------------------------------------------------------
1777 * rs_open() and friends
1778 * ------------------------------------------------------------
1779 */
1780static int block_til_ready(struct tty_struct *tty, struct file * filp,
1781 ser_info_t *info)
1782{
1783#ifdef DO_THIS_LATER
1784 DECLARE_WAITQUEUE(wait, current);
1785#endif
1786 struct serial_state *state = info->state;
1787 int retval;
1788 int do_clocal = 0;
1789
1790 /*
1791 * If the device is in the middle of being closed, then block
1792 * until it's done, and then try again.
1793 */
1794 if (tty_hung_up_p(filp) ||
1795 (info->flags & ASYNC_CLOSING)) {
1796 if (info->flags & ASYNC_CLOSING)
1797 interruptible_sleep_on(&info->close_wait);
1798#ifdef SERIAL_DO_RESTART
1799 if (info->flags & ASYNC_HUP_NOTIFY)
1800 return -EAGAIN;
1801 else
1802 return -ERESTARTSYS;
1803#else
1804 return -EAGAIN;
1805#endif
1806 }
1807
1808 /*
1809 * If non-blocking mode is set, or the port is not enabled,
1810 * then make the check up front and then exit.
1811 * If this is an SMC port, we don't have modem control to wait
1812 * for, so just get out here.
1813 */
1814 if ((filp->f_flags & O_NONBLOCK) ||
1815 (tty->flags & (1 << TTY_IO_ERROR)) ||
1816 !(info->state->smc_scc_num & NUM_IS_SCC)) {
1817 info->flags |= ASYNC_NORMAL_ACTIVE;
1818 return 0;
1819 }
1820
1821 if (tty->termios->c_cflag & CLOCAL)
1822 do_clocal = 1;
1823
1824 /*
1825 * Block waiting for the carrier detect and the line to become
1826 * free (i.e., not in use by the callout). While we are in
1827 * this loop, state->count is dropped by one, so that
1828 * rs_close() knows when to free things. We restore it upon
1829 * exit, either normal or abnormal.
1830 */
1831 retval = 0;
1832#ifdef DO_THIS_LATER
1833 add_wait_queue(&info->open_wait, &wait);
1834#ifdef SERIAL_DEBUG_OPEN
1835 printk("block_til_ready before block: ttys%d, count = %d\n",
1836 state->line, state->count);
1837#endif
1838 local_irq_disable();
1839 if (!tty_hung_up_p(filp))
1840 state->count--;
1841 local_irq_enable();
1842 info->blocked_open++;
1843 while (1) {
1844 local_irq_disable();
1845 if (tty->termios->c_cflag & CBAUD)
1846 serial_out(info, UART_MCR,
1847 serial_inp(info, UART_MCR) |
1848 (UART_MCR_DTR | UART_MCR_RTS));
1849 local_irq_enable();
1850 set_current_state(TASK_INTERRUPTIBLE);
1851 if (tty_hung_up_p(filp) ||
1852 !(info->flags & ASYNC_INITIALIZED)) {
1853#ifdef SERIAL_DO_RESTART
1854 if (info->flags & ASYNC_HUP_NOTIFY)
1855 retval = -EAGAIN;
1856 else
1857 retval = -ERESTARTSYS;
1858#else
1859 retval = -EAGAIN;
1860#endif
1861 break;
1862 }
1863 if (!(info->flags & ASYNC_CLOSING) &&
1864 (do_clocal || (serial_in(info, UART_MSR) &
1865 UART_MSR_DCD)))
1866 break;
1867 if (signal_pending(current)) {
1868 retval = -ERESTARTSYS;
1869 break;
1870 }
1871#ifdef SERIAL_DEBUG_OPEN
1872 printk("block_til_ready blocking: ttys%d, count = %d\n",
1873 info->line, state->count);
1874#endif
1875 schedule();
1876 }
1877 current->state = TASK_RUNNING;
1878 remove_wait_queue(&info->open_wait, &wait);
1879 if (!tty_hung_up_p(filp))
1880 state->count++;
1881 info->blocked_open--;
1882#ifdef SERIAL_DEBUG_OPEN
1883 printk("block_til_ready after blocking: ttys%d, count = %d\n",
1884 info->line, state->count);
1885#endif
1886#endif /* DO_THIS_LATER */
1887 if (retval)
1888 return retval;
1889 info->flags |= ASYNC_NORMAL_ACTIVE;
1890 return 0;
1891}
1892
1893static int get_async_struct(int line, ser_info_t **ret_info)
1894{
1895 struct serial_state *sstate;
1896
1897 sstate = rs_table + line;
1898 if (sstate->info) {
1899 sstate->count++;
1900 *ret_info = (ser_info_t *)sstate->info;
1901 return 0;
1902 }
1903 else {
1904 return -ENOMEM;
1905 }
1906}
1907
1908/*
1909 * This routine is called whenever a serial port is opened. It
1910 * enables interrupts for a serial port, linking in its async structure into
1911 * the IRQ chain. It also performs the serial-specific
1912 * initialization for the tty structure.
1913 */
1914static int rs_360_open(struct tty_struct *tty, struct file * filp)
1915{
1916 ser_info_t *info;
1917 int retval, line;
1918
1919 line = tty->index;
1920 if ((line < 0) || (line >= NR_PORTS))
1921 return -ENODEV;
1922 retval = get_async_struct(line, &info);
1923 if (retval)
1924 return retval;
1925 if (serial_paranoia_check(info, tty->name, "rs_open"))
1926 return -ENODEV;
1927
1928#ifdef SERIAL_DEBUG_OPEN
1929 printk("rs_open %s, count = %d\n", tty->name, info->state->count);
1930#endif
1931 tty->driver_data = info;
1932 info->tty = tty;
1933
1934 /*
1935 * Start up serial port
1936 */
1937 retval = startup(info);
1938 if (retval)
1939 return retval;
1940
1941 retval = block_til_ready(tty, filp, info);
1942 if (retval) {
1943#ifdef SERIAL_DEBUG_OPEN
1944 printk("rs_open returning after block_til_ready with %d\n",
1945 retval);
1946#endif
1947 return retval;
1948 }
1949
1950#ifdef SERIAL_DEBUG_OPEN
1951 printk("rs_open %s successful...", tty->name);
1952#endif
1953 return 0;
1954}
1955
1956/*
1957 * /proc fs routines....
1958 */
1959
1960static inline int line_info(char *buf, struct serial_state *state)
1961{
1962#ifdef notdef
1963 struct async_struct *info = state->info, scr_info;
1964 char stat_buf[30], control, status;
1965#endif
1966 int ret;
1967
1968 ret = sprintf(buf, "%d: uart:%s port:%X irq:%d",
1969 state->line,
1970 (state->smc_scc_num & NUM_IS_SCC) ? "SCC" : "SMC",
1971 (unsigned int)(state->port), state->irq);
1972
1973 if (!state->port || (state->type == PORT_UNKNOWN)) {
1974 ret += sprintf(buf+ret, "\n");
1975 return ret;
1976 }
1977
1978#ifdef notdef
1979 /*
1980 * Figure out the current RS-232 lines
1981 */
1982 if (!info) {
1983 info = &scr_info; /* This is just for serial_{in,out} */
1984
1985 info->magic = SERIAL_MAGIC;
1986 info->port = state->port;
1987 info->flags = state->flags;
1988 info->quot = 0;
1989 info->tty = 0;
1990 }
1991 local_irq_disable();
1992 status = serial_in(info, UART_MSR);
1993 control = info ? info->MCR : serial_in(info, UART_MCR);
1994 local_irq_enable();
1995
1996 stat_buf[0] = 0;
1997 stat_buf[1] = 0;
1998 if (control & UART_MCR_RTS)
1999 strcat(stat_buf, "|RTS");
2000 if (status & UART_MSR_CTS)
2001 strcat(stat_buf, "|CTS");
2002 if (control & UART_MCR_DTR)
2003 strcat(stat_buf, "|DTR");
2004 if (status & UART_MSR_DSR)
2005 strcat(stat_buf, "|DSR");
2006 if (status & UART_MSR_DCD)
2007 strcat(stat_buf, "|CD");
2008 if (status & UART_MSR_RI)
2009 strcat(stat_buf, "|RI");
2010
2011 if (info->quot) {
2012 ret += sprintf(buf+ret, " baud:%d",
2013 state->baud_base / info->quot);
2014 }
2015
2016 ret += sprintf(buf+ret, " tx:%d rx:%d",
2017 state->icount.tx, state->icount.rx);
2018
2019 if (state->icount.frame)
2020 ret += sprintf(buf+ret, " fe:%d", state->icount.frame);
2021
2022 if (state->icount.parity)
2023 ret += sprintf(buf+ret, " pe:%d", state->icount.parity);
2024
2025 if (state->icount.brk)
2026 ret += sprintf(buf+ret, " brk:%d", state->icount.brk);
2027
2028 if (state->icount.overrun)
2029 ret += sprintf(buf+ret, " oe:%d", state->icount.overrun);
2030
2031 /*
2032 * Last thing is the RS-232 status lines
2033 */
2034 ret += sprintf(buf+ret, " %s\n", stat_buf+1);
2035#endif
2036 return ret;
2037}
2038
2039int rs_360_read_proc(char *page, char **start, off_t off, int count,
2040 int *eof, void *data)
2041{
2042 int i, len = 0;
2043 off_t begin = 0;
2044
2045 len += sprintf(page, "serinfo:1.0 driver:%s\n", serial_version);
2046 for (i = 0; i < NR_PORTS && len < 4000; i++) {
2047 len += line_info(page + len, &rs_table[i]);
2048 if (len+begin > off+count)
2049 goto done;
2050 if (len+begin < off) {
2051 begin += len;
2052 len = 0;
2053 }
2054 }
2055 *eof = 1;
2056done:
2057 if (off >= len+begin)
2058 return 0;
2059 *start = page + (begin-off);
2060 return ((count < begin+len-off) ? count : begin+len-off);
2061}
2062
2063/*
2064 * ---------------------------------------------------------------------
2065 * rs_init() and friends
2066 *
2067 * rs_init() is called at boot-time to initialize the serial driver.
2068 * ---------------------------------------------------------------------
2069 */
2070
2071/*
2072 * This routine prints out the appropriate serial driver version
2073 * number, and identifies which options were configured into this
2074 * driver.
2075 */
2076static _INLINE_ void show_serial_version(void)
2077{
2078 printk(KERN_INFO "%s version %s\n", serial_name, serial_version);
2079}
2080
2081
2082/*
2083 * The serial console driver used during boot. Note that these names
2084 * clash with those found in "serial.c", so we currently can't support
2085 * the 16xxx uarts and these at the same time. I will fix this to become
2086 * an indirect function call from tty_io.c (or something).
2087 */
2088
2089#ifdef CONFIG_SERIAL_CONSOLE
2090
2091/*
2092 * Print a string to the serial port trying not to disturb any possible
2093 * real use of the port...
2094 */
2095static void my_console_write(int idx, const char *s,
2096 unsigned count)
2097{
2098 struct serial_state *ser;
2099 ser_info_t *info;
2100 unsigned i;
2101 QUICC_BD *bdp, *bdbase;
2102 volatile struct smc_uart_pram *up;
2103 volatile u_char *cp;
2104
2105 ser = rs_table + idx;
2106
2107
2108 /* If the port has been initialized for general use, we have
2109 * to use the buffer descriptors allocated there. Otherwise,
2110 * we simply use the single buffer allocated.
2111 */
2112 if ((info = (ser_info_t *)ser->info) != NULL) {
2113 bdp = info->tx_cur;
2114 bdbase = info->tx_bd_base;
2115 }
2116 else {
2117 /* Pointer to UART in parameter ram.
2118 */
2119 /* up = (smc_uart_t *)&cpmp->cp_dparam[ser->port]; */
2120 up = &pquicc->pram[ser->port].scc.pothers.idma_smc.psmc.u;
2121
2122 /* Get the address of the host memory buffer.
2123 */
2124 bdp = bdbase = (QUICC_BD *)((uint)pquicc + (uint)up->tbase);
2125 }
2126
2127 /*
2128 * We need to gracefully shut down the transmitter, disable
2129 * interrupts, then send our bytes out.
2130 */
2131
2132 /*
2133 * Now, do each character. This is not as bad as it looks
2134 * since this is a holding FIFO and not a transmitting FIFO.
2135 * We could add the complexity of filling the entire transmit
2136 * buffer, but we would just wait longer between accesses......
2137 */
2138 for (i = 0; i < count; i++, s++) {
2139 /* Wait for transmitter fifo to empty.
2140 * Ready indicates output is ready, and xmt is doing
2141 * that, not that it is ready for us to send.
2142 */
2143 while (bdp->status & BD_SC_READY);
2144
2145 /* Send the character out.
2146 */
2147 cp = bdp->buf;
2148 *cp = *s;
2149
2150 bdp->length = 1;
2151 bdp->status |= BD_SC_READY;
2152
2153 if (bdp->status & BD_SC_WRAP)
2154 bdp = bdbase;
2155 else
2156 bdp++;
2157
2158 /* if a LF, also do CR... */
2159 if (*s == 10) {
2160 while (bdp->status & BD_SC_READY);
2161 /* cp = __va(bdp->buf); */
2162 cp = bdp->buf;
2163 *cp = 13;
2164 bdp->length = 1;
2165 bdp->status |= BD_SC_READY;
2166
2167 if (bdp->status & BD_SC_WRAP) {
2168 bdp = bdbase;
2169 }
2170 else {
2171 bdp++;
2172 }
2173 }
2174 }
2175
2176 /*
2177 * Finally, Wait for transmitter & holding register to empty
2178 * and restore the IER
2179 */
2180 while (bdp->status & BD_SC_READY);
2181
2182 if (info)
2183 info->tx_cur = (QUICC_BD *)bdp;
2184}
2185
2186static void serial_console_write(struct console *c, const char *s,
2187 unsigned count)
2188{
2189#ifdef CONFIG_KGDB
2190 /* Try to let stub handle output. Returns true if it did. */
2191 if (kgdb_output_string(s, count))
2192 return;
2193#endif
2194 my_console_write(c->index, s, count);
2195}
2196
2197
2198
2199/*void console_print_68360(const char *p)
2200{
2201 const char *cp = p;
2202 int i;
2203
2204 for (i=0;cp[i]!=0;i++);
2205
2206 serial_console_write (p, i);
2207
2208 //Comment this if you want to have a strict interrupt-driven output
2209 //rs_fair_output();
2210
2211 return;
2212}*/
2213
2214
2215
2216
2217
2218
2219#ifdef CONFIG_XMON
2220int
2221xmon_360_write(const char *s, unsigned count)
2222{
2223 my_console_write(0, s, count);
2224 return(count);
2225}
2226#endif
2227
2228#ifdef CONFIG_KGDB
2229void
2230putDebugChar(char ch)
2231{
2232 my_console_write(0, &ch, 1);
2233}
2234#endif
2235
2236/*
2237 * Receive character from the serial port. This only works well
2238 * before the port is initialized for real use.
2239 */
2240static int my_console_wait_key(int idx, int xmon, char *obuf)
2241{
2242 struct serial_state *ser;
2243 u_char c, *cp;
2244 ser_info_t *info;
2245 QUICC_BD *bdp;
2246 volatile struct smc_uart_pram *up;
2247 int i;
2248
2249 ser = rs_table + idx;
2250
2251 /* Get the address of the host memory buffer.
2252 * If the port has been initialized for general use, we must
2253 * use information from the port structure.
2254 */
2255 if ((info = (ser_info_t *)ser->info))
2256 bdp = info->rx_cur;
2257 else
2258 /* bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_rbase]; */
2259 bdp = (QUICC_BD *)((uint)pquicc + (uint)up->tbase);
2260
2261 /* Pointer to UART in parameter ram.
2262 */
2263 /* up = (smc_uart_t *)&cpmp->cp_dparam[ser->port]; */
2264 up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
2265
2266 /*
2267 * We need to gracefully shut down the receiver, disable
2268 * interrupts, then read the input.
2269 * XMON just wants a poll. If no character, return -1, else
2270 * return the character.
2271 */
2272 if (!xmon) {
2273 while (bdp->status & BD_SC_EMPTY);
2274 }
2275 else {
2276 if (bdp->status & BD_SC_EMPTY)
2277 return -1;
2278 }
2279
2280 cp = (char *)bdp->buf;
2281
2282 if (obuf) {
2283 i = c = bdp->length;
2284 while (i-- > 0)
2285 *obuf++ = *cp++;
2286 }
2287 else {
2288 c = *cp;
2289 }
2290 bdp->status |= BD_SC_EMPTY;
2291
2292 if (info) {
2293 if (bdp->status & BD_SC_WRAP) {
2294 bdp = info->rx_bd_base;
2295 }
2296 else {
2297 bdp++;
2298 }
2299 info->rx_cur = (QUICC_BD *)bdp;
2300 }
2301
2302 return((int)c);
2303}
2304
2305static int serial_console_wait_key(struct console *co)
2306{
2307 return(my_console_wait_key(co->index, 0, NULL));
2308}
2309
2310#ifdef CONFIG_XMON
2311int
2312xmon_360_read_poll(void)
2313{
2314 return(my_console_wait_key(0, 1, NULL));
2315}
2316
2317int
2318xmon_360_read_char(void)
2319{
2320 return(my_console_wait_key(0, 0, NULL));
2321}
2322#endif
2323
2324#ifdef CONFIG_KGDB
2325static char kgdb_buf[RX_BUF_SIZE], *kgdp;
2326static int kgdb_chars;
2327
2328unsigned char
2329getDebugChar(void)
2330{
2331 if (kgdb_chars <= 0) {
2332 kgdb_chars = my_console_wait_key(0, 0, kgdb_buf);
2333 kgdp = kgdb_buf;
2334 }
2335 kgdb_chars--;
2336
2337 return(*kgdp++);
2338}
2339
2340void kgdb_interruptible(int state)
2341{
2342}
2343void kgdb_map_scc(void)
2344{
2345 struct serial_state *ser;
2346 uint mem_addr;
2347 volatile QUICC_BD *bdp;
2348 volatile smc_uart_t *up;
2349
2350 cpmp = (cpm360_t *)&(((immap_t *)IMAP_ADDR)->im_cpm);
2351
2352 /* To avoid data cache CPM DMA coherency problems, allocate a
2353 * buffer in the CPM DPRAM. This will work until the CPM and
2354 * serial ports are initialized. At that time a memory buffer
2355 * will be allocated.
2356 * The port is already initialized from the boot procedure, all
2357 * we do here is give it a different buffer and make it a FIFO.
2358 */
2359
2360 ser = rs_table;
2361
2362 /* Right now, assume we are using SMCs.
2363 */
2364 up = (smc_uart_t *)&cpmp->cp_dparam[ser->port];
2365
2366 /* Allocate space for an input FIFO, plus a few bytes for output.
2367 * Allocate bytes to maintain word alignment.
2368 */
2369 mem_addr = (uint)(&cpmp->cp_dpmem[0x1000]);
2370
2371 /* Set the physical address of the host memory buffers in
2372 * the buffer descriptors.
2373 */
2374 bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_rbase];
2375 bdp->buf = mem_addr;
2376
2377 bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_tbase];
2378 bdp->buf = mem_addr+RX_BUF_SIZE;
2379
2380 up->smc_mrblr = RX_BUF_SIZE; /* receive buffer length */
2381 up->smc_maxidl = RX_BUF_SIZE;
2382}
2383#endif
2384
2385static struct tty_struct *serial_console_device(struct console *c, int *index)
2386{
2387 *index = c->index;
2388 return serial_driver;
2389}
2390
2391
2392struct console sercons = {
2393 .name = "ttyS",
2394 .write = serial_console_write,
2395 .device = serial_console_device,
2396 .wait_key = serial_console_wait_key,
2397 .setup = serial_console_setup,
2398 .flags = CON_PRINTBUFFER,
2399 .index = CONFIG_SERIAL_CONSOLE_PORT,
2400};
2401
2402
2403
2404/*
2405 * Register console.
2406 */
2407long console_360_init(long kmem_start, long kmem_end)
2408{
2409 register_console(&sercons);
2410 /*register_console (console_print_68360); - 2.0.38 only required a write
2411 function pointer. */
2412 return kmem_start;
2413}
2414
2415#endif
2416
2417/* Index in baud rate table of the default console baud rate.
2418*/
2419static int baud_idx;
2420
b68e31d0 2421static const struct tty_operations rs_360_ops = {
1da177e4
LT
2422 .owner = THIS_MODULE,
2423 .open = rs_360_open,
2424 .close = rs_360_close,
2425 .write = rs_360_write,
2426 .put_char = rs_360_put_char,
2427 .write_room = rs_360_write_room,
2428 .chars_in_buffer = rs_360_chars_in_buffer,
2429 .flush_buffer = rs_360_flush_buffer,
2430 .ioctl = rs_360_ioctl,
2431 .throttle = rs_360_throttle,
2432 .unthrottle = rs_360_unthrottle,
2433 /* .send_xchar = rs_360_send_xchar, */
2434 .set_termios = rs_360_set_termios,
2435 .stop = rs_360_stop,
2436 .start = rs_360_start,
2437 .hangup = rs_360_hangup,
2438 /* .wait_until_sent = rs_360_wait_until_sent, */
2439 /* .read_proc = rs_360_read_proc, */
2440 .tiocmget = rs_360_tiocmget,
2441 .tiocmset = rs_360_tiocmset,
2442};
2443
a1007770 2444static int __init rs_360_init(void)
1da177e4
LT
2445{
2446 struct serial_state * state;
2447 ser_info_t *info;
2448 void *mem_addr;
2449 uint dp_addr, iobits;
2450 int i, j, idx;
2451 ushort chan;
2452 QUICC_BD *bdp;
2453 volatile QUICC *cp;
2454 volatile struct smc_regs *sp;
2455 volatile struct smc_uart_pram *up;
2456 volatile struct scc_regs *scp;
2457 volatile struct uart_pram *sup;
2458 /* volatile immap_t *immap; */
2459
2460 serial_driver = alloc_tty_driver(NR_PORTS);
2461 if (!serial_driver)
2462 return -1;
2463
2464 show_serial_version();
2465
2466 serial_driver->name = "ttyS";
2467 serial_driver->major = TTY_MAJOR;
2468 serial_driver->minor_start = 64;
2469 serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
2470 serial_driver->subtype = SERIAL_TYPE_NORMAL;
2471 serial_driver->init_termios = tty_std_termios;
2472 serial_driver->init_termios.c_cflag =
2473 baud_idx | CS8 | CREAD | HUPCL | CLOCAL;
2474 serial_driver->flags = TTY_DRIVER_REAL_RAW;
2475 tty_set_operations(serial_driver, &rs_360_ops);
2476
2477 if (tty_register_driver(serial_driver))
2478 panic("Couldn't register serial driver\n");
2479
2480 cp = pquicc; /* Get pointer to Communication Processor */
2481 /* immap = (immap_t *)IMAP_ADDR; */ /* and to internal registers */
2482
2483
2484 /* Configure SCC2, SCC3, and SCC4 instead of port A parallel I/O.
2485 */
2486 /* The "standard" configuration through the 860.
2487 */
2488/* immap->im_ioport.iop_papar |= 0x00fc; */
2489/* immap->im_ioport.iop_padir &= ~0x00fc; */
2490/* immap->im_ioport.iop_paodr &= ~0x00fc; */
2491 cp->pio_papar |= 0x00fc;
2492 cp->pio_padir &= ~0x00fc;
2493 /* cp->pio_paodr &= ~0x00fc; */
2494
2495
2496 /* Since we don't yet do modem control, connect the port C pins
2497 * as general purpose I/O. This will assert CTS and CD for the
2498 * SCC ports.
2499 */
2500 /* FIXME: see 360um p.7-365 and 860um p.34-12
2501 * I can't make sense of these bits - mleslie*/
2502/* immap->im_ioport.iop_pcdir |= 0x03c6; */
2503/* immap->im_ioport.iop_pcpar &= ~0x03c6; */
2504
2505/* cp->pio_pcdir |= 0x03c6; */
2506/* cp->pio_pcpar &= ~0x03c6; */
2507
2508
2509
2510 /* Connect SCC2 and SCC3 to NMSI. Connect BRG3 to SCC2 and
2511 * BRG4 to SCC3.
2512 */
2513 cp->si_sicr &= ~0x00ffff00;
2514 cp->si_sicr |= 0x001b1200;
2515
2516#ifdef CONFIG_PP04
2517 /* Frequentis PP04 forced to RS-232 until we know better.
2518 * Port C 12 and 13 low enables RS-232 on SCC3 and SCC4.
2519 */
2520 immap->im_ioport.iop_pcdir |= 0x000c;
2521 immap->im_ioport.iop_pcpar &= ~0x000c;
2522 immap->im_ioport.iop_pcdat &= ~0x000c;
2523
2524 /* This enables the TX driver.
2525 */
2526 cp->cp_pbpar &= ~0x6000;
2527 cp->cp_pbdat &= ~0x6000;
2528#endif
2529
2530 for (i = 0, state = rs_table; i < NR_PORTS; i++,state++) {
2531 state->magic = SSTATE_MAGIC;
2532 state->line = i;
2533 state->type = PORT_UNKNOWN;
2534 state->custom_divisor = 0;
2535 state->close_delay = 5*HZ/10;
2536 state->closing_wait = 30*HZ;
2537 state->icount.cts = state->icount.dsr =
2538 state->icount.rng = state->icount.dcd = 0;
2539 state->icount.rx = state->icount.tx = 0;
2540 state->icount.frame = state->icount.parity = 0;
2541 state->icount.overrun = state->icount.brk = 0;
2542 printk(KERN_INFO "ttyS%d at irq 0x%02x is an %s\n",
2543 i, (unsigned int)(state->irq),
2544 (state->smc_scc_num & NUM_IS_SCC) ? "SCC" : "SMC");
2545
2546#ifdef CONFIG_SERIAL_CONSOLE
2547 /* If we just printed the message on the console port, and
2548 * we are about to initialize it for general use, we have
2549 * to wait a couple of character times for the CR/NL to
2550 * make it out of the transmit buffer.
2551 */
2552 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2553 mdelay(8);
2554
2555
2556/* idx = PORT_NUM(info->state->smc_scc_num); */
2557/* if (info->state->smc_scc_num & NUM_IS_SCC) */
2558/* chan = scc_chan_map[idx]; */
2559/* else */
2560/* chan = smc_chan_map[idx]; */
2561
2562/* cp->cp_cr = mk_cr_cmd(chan, CPM_CR_STOP_TX) | CPM_CR_FLG; */
2563/* while (cp->cp_cr & CPM_CR_FLG); */
2564
2565#endif
2566 /* info = kmalloc(sizeof(ser_info_t), GFP_KERNEL); */
2567 info = &quicc_ser_info[i];
2568 if (info) {
2569 memset (info, 0, sizeof(ser_info_t));
2570 info->magic = SERIAL_MAGIC;
2571 info->line = i;
2572 info->flags = state->flags;
2573 INIT_WORK(&info->tqueue, do_softint, info);
2574 INIT_WORK(&info->tqueue_hangup, do_serial_hangup, info);
2575 init_waitqueue_head(&info->open_wait);
2576 init_waitqueue_head(&info->close_wait);
2577 info->state = state;
2578 state->info = (struct async_struct *)info;
2579
2580 /* We need to allocate a transmit and receive buffer
2581 * descriptors from dual port ram, and a character
2582 * buffer area from host mem.
2583 */
2584 dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * RX_NUM_FIFO);
2585
2586 /* Allocate space for FIFOs in the host memory.
2587 * (for now this is from a static array of buffers :(
2588 */
2589 /* mem_addr = m360_cpm_hostalloc(RX_NUM_FIFO * RX_BUF_SIZE); */
2590 /* mem_addr = kmalloc (RX_NUM_FIFO * RX_BUF_SIZE, GFP_BUFFER); */
2591 mem_addr = &rx_buf_pool[i * RX_NUM_FIFO * RX_BUF_SIZE];
2592
2593 /* Set the physical address of the host memory
2594 * buffers in the buffer descriptors, and the
2595 * virtual address for us to work with.
2596 */
2597 bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
2598 info->rx_cur = info->rx_bd_base = bdp;
2599
2600 /* initialize rx buffer descriptors */
2601 for (j=0; j<(RX_NUM_FIFO-1); j++) {
2602 bdp->buf = &rx_buf_pool[(i * RX_NUM_FIFO + j ) * RX_BUF_SIZE];
2603 bdp->status = BD_SC_EMPTY | BD_SC_INTRPT;
2604 mem_addr += RX_BUF_SIZE;
2605 bdp++;
2606 }
2607 bdp->buf = &rx_buf_pool[(i * RX_NUM_FIFO + j ) * RX_BUF_SIZE];
2608 bdp->status = BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT;
2609
2610
2611 idx = PORT_NUM(info->state->smc_scc_num);
2612 if (info->state->smc_scc_num & NUM_IS_SCC) {
2613
2614#if defined (CONFIG_UCQUICC) && 1
2615 /* set the transceiver mode to RS232 */
2616 sipex_mode_bits &= ~(uint)SIPEX_MODE(idx,0x0f); /* clear current mode */
2617 sipex_mode_bits |= (uint)SIPEX_MODE(idx,0x02);
2618 *(uint *)_periph_base = sipex_mode_bits;
2619 /* printk ("sipex bits = 0x%08x\n", sipex_mode_bits); */
2620#endif
2621 }
2622
2623 dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * TX_NUM_FIFO);
2624
2625 /* Allocate space for FIFOs in the host memory.
2626 */
2627 /* mem_addr = m360_cpm_hostalloc(TX_NUM_FIFO * TX_BUF_SIZE); */
2628 /* mem_addr = kmalloc (TX_NUM_FIFO * TX_BUF_SIZE, GFP_BUFFER); */
2629 mem_addr = &tx_buf_pool[i * TX_NUM_FIFO * TX_BUF_SIZE];
2630
2631 /* Set the physical address of the host memory
2632 * buffers in the buffer descriptors, and the
2633 * virtual address for us to work with.
2634 */
2635 /* bdp = (QUICC_BD *)&cp->cp_dpmem[dp_addr]; */
2636 bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
2637 info->tx_cur = info->tx_bd_base = (QUICC_BD *)bdp;
2638
2639 /* initialize tx buffer descriptors */
2640 for (j=0; j<(TX_NUM_FIFO-1); j++) {
2641 bdp->buf = &tx_buf_pool[(i * TX_NUM_FIFO + j ) * TX_BUF_SIZE];
2642 bdp->status = BD_SC_INTRPT;
2643 mem_addr += TX_BUF_SIZE;
2644 bdp++;
2645 }
2646 bdp->buf = &tx_buf_pool[(i * TX_NUM_FIFO + j ) * TX_BUF_SIZE];
2647 bdp->status = (BD_SC_WRAP | BD_SC_INTRPT);
2648
2649 if (info->state->smc_scc_num & NUM_IS_SCC) {
2650 scp = &pquicc->scc_regs[idx];
2651 sup = &pquicc->pram[info->state->port].scc.pscc.u;
2652 sup->rbase = dp_addr;
2653 sup->tbase = dp_addr;
2654
2655 /* Set up the uart parameters in the
2656 * parameter ram.
2657 */
2658 sup->rfcr = SMC_EB;
2659 sup->tfcr = SMC_EB;
2660
2661 /* Set this to 1 for now, so we get single
2662 * character interrupts. Using idle charater
2663 * time requires some additional tuning.
2664 */
2665 sup->mrblr = 1;
2666 sup->max_idl = 0;
2667 sup->brkcr = 1;
2668 sup->parec = 0;
2669 sup->frmer = 0;
2670 sup->nosec = 0;
2671 sup->brkec = 0;
2672 sup->uaddr1 = 0;
2673 sup->uaddr2 = 0;
2674 sup->toseq = 0;
2675 {
2676 int i;
2677 for (i=0;i<8;i++)
2678 sup->cc[i] = 0x8000;
2679 }
2680 sup->rccm = 0xc0ff;
2681
2682 /* Send the CPM an initialize command.
2683 */
2684 chan = scc_chan_map[idx];
2685
2686 /* execute the INIT RX & TX PARAMS command for this channel. */
2687 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
2688 while (cp->cp_cr & CPM_CR_FLG);
2689
2690 /* Set UART mode, 8 bit, no parity, one stop.
2691 * Enable receive and transmit.
2692 */
2693 scp->scc_gsmr.w.high = 0;
2694 scp->scc_gsmr.w.low =
2695 (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
2696
2697 /* Disable all interrupts and clear all pending
2698 * events.
2699 */
2700 scp->scc_sccm = 0;
2701 scp->scc_scce = 0xffff;
2702 scp->scc_dsr = 0x7e7e;
2703 scp->scc_psmr = 0x3000;
2704
2705 /* If the port is the console, enable Rx and Tx.
2706 */
2707#ifdef CONFIG_SERIAL_CONSOLE
2708 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2709 scp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
2710#endif
2711 }
2712 else {
2713 /* Configure SMCs Tx/Rx instead of port B
2714 * parallel I/O.
2715 */
2716 up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
2717 up->rbase = dp_addr;
2718
2719 iobits = 0xc0 << (idx * 4);
2720 cp->pip_pbpar |= iobits;
2721 cp->pip_pbdir &= ~iobits;
2722 cp->pip_pbodr &= ~iobits;
2723
2724
2725 /* Connect the baud rate generator to the
2726 * SMC based upon index in rs_table. Also
2727 * make sure it is connected to NMSI.
2728 */
2729 cp->si_simode &= ~(0xffff << (idx * 16));
2730 cp->si_simode |= (i << ((idx * 16) + 12));
2731
2732 up->tbase = dp_addr;
2733
2734 /* Set up the uart parameters in the
2735 * parameter ram.
2736 */
2737 up->rfcr = SMC_EB;
2738 up->tfcr = SMC_EB;
2739
2740 /* Set this to 1 for now, so we get single
2741 * character interrupts. Using idle charater
2742 * time requires some additional tuning.
2743 */
2744 up->mrblr = 1;
2745 up->max_idl = 0;
2746 up->brkcr = 1;
2747
2748 /* Send the CPM an initialize command.
2749 */
2750 chan = smc_chan_map[idx];
2751
2752 cp->cp_cr = mk_cr_cmd(chan,
2753 CPM_CR_INIT_TRX) | CPM_CR_FLG;
2754#ifdef CONFIG_SERIAL_CONSOLE
2755 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2756 printk("");
2757#endif
2758 while (cp->cp_cr & CPM_CR_FLG);
2759
2760 /* Set UART mode, 8 bit, no parity, one stop.
2761 * Enable receive and transmit.
2762 */
2763 sp = &cp->smc_regs[idx];
2764 sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART;
2765
2766 /* Disable all interrupts and clear all pending
2767 * events.
2768 */
2769 sp->smc_smcm = 0;
2770 sp->smc_smce = 0xff;
2771
2772 /* If the port is the console, enable Rx and Tx.
2773 */
2774#ifdef CONFIG_SERIAL_CONSOLE
2775 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2776 sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
2777#endif
2778 }
2779
2780 /* Install interrupt handler.
2781 */
2782 /* cpm_install_handler(IRQ_MACHSPEC | state->irq, rs_360_interrupt, info); */
2783 /*request_irq(IRQ_MACHSPEC | state->irq, rs_360_interrupt, */
2784 request_irq(state->irq, rs_360_interrupt,
2785 IRQ_FLG_LOCK, "ttyS", (void *)info);
2786
2787 /* Set up the baud rate generator.
2788 */
2789 m360_cpm_setbrg(i, baud_table[baud_idx]);
2790
2791 }
2792 }
2793
2794 return 0;
2795}
a1007770 2796module_init(rs_360_init);
1da177e4
LT
2797
2798/* This must always be called before the rs_360_init() function, otherwise
2799 * it blows away the port control information.
2800 */
2801//static int __init serial_console_setup( struct console *co, char *options)
2802int serial_console_setup( struct console *co, char *options)
2803{
2804 struct serial_state *ser;
2805 uint mem_addr, dp_addr, bidx, idx, iobits;
2806 ushort chan;
2807 QUICC_BD *bdp;
2808 volatile QUICC *cp;
2809 volatile struct smc_regs *sp;
2810 volatile struct scc_regs *scp;
2811 volatile struct smc_uart_pram *up;
2812 volatile struct uart_pram *sup;
2813
2814/* mleslie TODO:
2815 * add something to the 68k bootloader to store a desired initial console baud rate */
2816
2817/* bd_t *bd; */ /* a board info struct used by EPPC-bug */
2818/* bd = (bd_t *)__res; */
2819
2820 for (bidx = 0; bidx < (sizeof(baud_table) / sizeof(int)); bidx++)
2821 /* if (bd->bi_baudrate == baud_table[bidx]) */
2822 if (CONSOLE_BAUDRATE == baud_table[bidx])
2823 break;
2824
2825 /* co->cflag = CREAD|CLOCAL|bidx|CS8; */
2826 baud_idx = bidx;
2827
2828 ser = rs_table + CONFIG_SERIAL_CONSOLE_PORT;
2829
2830 cp = pquicc; /* Get pointer to Communication Processor */
2831
2832 idx = PORT_NUM(ser->smc_scc_num);
2833 if (ser->smc_scc_num & NUM_IS_SCC) {
2834
2835 /* TODO: need to set up SCC pin assignment etc. here */
2836
2837 }
2838 else {
2839 iobits = 0xc0 << (idx * 4);
2840 cp->pip_pbpar |= iobits;
2841 cp->pip_pbdir &= ~iobits;
2842 cp->pip_pbodr &= ~iobits;
2843
2844 /* Connect the baud rate generator to the
2845 * SMC based upon index in rs_table. Also
2846 * make sure it is connected to NMSI.
2847 */
2848 cp->si_simode &= ~(0xffff << (idx * 16));
2849 cp->si_simode |= (idx << ((idx * 16) + 12));
2850 }
2851
2852 /* When we get here, the CPM has been reset, so we need
2853 * to configure the port.
2854 * We need to allocate a transmit and receive buffer descriptor
2855 * from dual port ram, and a character buffer area from host mem.
2856 */
2857
2858 /* Allocate space for two buffer descriptors in the DP ram.
2859 */
2860 dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * CONSOLE_NUM_FIFO);
2861
2862 /* Allocate space for two 2 byte FIFOs in the host memory.
2863 */
2864 /* mem_addr = m360_cpm_hostalloc(8); */
2865 mem_addr = (uint)console_fifos;
2866
2867
2868 /* Set the physical address of the host memory buffers in
2869 * the buffer descriptors.
2870 */
2871 /* bdp = (QUICC_BD *)&cp->cp_dpmem[dp_addr]; */
2872 bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
2873 bdp->buf = (char *)mem_addr;
2874 (bdp+1)->buf = (char *)(mem_addr+4);
2875
2876 /* For the receive, set empty and wrap.
2877 * For transmit, set wrap.
2878 */
2879 bdp->status = BD_SC_EMPTY | BD_SC_WRAP;
2880 (bdp+1)->status = BD_SC_WRAP;
2881
2882 /* Set up the uart parameters in the parameter ram.
2883 */
2884 if (ser->smc_scc_num & NUM_IS_SCC) {
2885 scp = &cp->scc_regs[idx];
2886 /* sup = (scc_uart_t *)&cp->cp_dparam[ser->port]; */
2887 sup = &pquicc->pram[ser->port].scc.pscc.u;
2888
2889 sup->rbase = dp_addr;
2890 sup->tbase = dp_addr + sizeof(QUICC_BD);
2891
2892 /* Set up the uart parameters in the
2893 * parameter ram.
2894 */
2895 sup->rfcr = SMC_EB;
2896 sup->tfcr = SMC_EB;
2897
2898 /* Set this to 1 for now, so we get single
2899 * character interrupts. Using idle charater
2900 * time requires some additional tuning.
2901 */
2902 sup->mrblr = 1;
2903 sup->max_idl = 0;
2904 sup->brkcr = 1;
2905 sup->parec = 0;
2906 sup->frmer = 0;
2907 sup->nosec = 0;
2908 sup->brkec = 0;
2909 sup->uaddr1 = 0;
2910 sup->uaddr2 = 0;
2911 sup->toseq = 0;
2912 {
2913 int i;
2914 for (i=0;i<8;i++)
2915 sup->cc[i] = 0x8000;
2916 }
2917 sup->rccm = 0xc0ff;
2918
2919 /* Send the CPM an initialize command.
2920 */
2921 chan = scc_chan_map[idx];
2922
2923 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
2924 while (cp->cp_cr & CPM_CR_FLG);
2925
2926 /* Set UART mode, 8 bit, no parity, one stop.
2927 * Enable receive and transmit.
2928 */
2929 scp->scc_gsmr.w.high = 0;
2930 scp->scc_gsmr.w.low =
2931 (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
2932
2933 /* Disable all interrupts and clear all pending
2934 * events.
2935 */
2936 scp->scc_sccm = 0;
2937 scp->scc_scce = 0xffff;
2938 scp->scc_dsr = 0x7e7e;
2939 scp->scc_psmr = 0x3000;
2940
2941 scp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
2942
2943 }
2944 else {
2945 /* up = (smc_uart_t *)&cp->cp_dparam[ser->port]; */
2946 up = &pquicc->pram[ser->port].scc.pothers.idma_smc.psmc.u;
2947
2948 up->rbase = dp_addr; /* Base of receive buffer desc. */
2949 up->tbase = dp_addr+sizeof(QUICC_BD); /* Base of xmt buffer desc. */
2950 up->rfcr = SMC_EB;
2951 up->tfcr = SMC_EB;
2952
2953 /* Set this to 1 for now, so we get single character interrupts.
2954 */
2955 up->mrblr = 1; /* receive buffer length */
2956 up->max_idl = 0; /* wait forever for next char */
2957
2958 /* Send the CPM an initialize command.
2959 */
2960 chan = smc_chan_map[idx];
2961 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
2962 while (cp->cp_cr & CPM_CR_FLG);
2963
2964 /* Set UART mode, 8 bit, no parity, one stop.
2965 * Enable receive and transmit.
2966 */
2967 sp = &cp->smc_regs[idx];
2968 sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART;
2969
2970 /* And finally, enable Rx and Tx.
2971 */
2972 sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
2973 }
2974
2975 /* Set up the baud rate generator.
2976 */
2977 /* m360_cpm_setbrg((ser - rs_table), bd->bi_baudrate); */
2978 m360_cpm_setbrg((ser - rs_table), CONSOLE_BAUDRATE);
2979
2980 return 0;
2981}
2982
2983/*
2984 * Local variables:
2985 * c-indent-level: 4
2986 * c-basic-offset: 4
2987 * tab-width: 4
2988 * End:
2989 */