[net-next-2.6.git] / drivers / scsi / sun3x_esp.c

/* sun3x_esp.c:  EnhancedScsiProcessor Sun3x SCSI driver code.
 *
 * (C) 1999 Thomas Bogendoerfer (tsbogend@alpha.franken.de)
 *
 * Based on David S. Miller's esp driver
 */

#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/string.h>
#include <linux/slab.h>
#include <linux/blkdev.h>
#include <linux/proc_fs.h>
#include <linux/stat.h>
#include <linux/delay.h>
#include <linux/interrupt.h>

#include "scsi.h"
#include <scsi/scsi_host.h>
#include "NCR53C9x.h"

#include <asm/sun3x.h>
#include <asm/dvma.h>
#include <asm/irq.h>

static void dma_barrier(struct NCR_ESP *esp);
static int  dma_bytes_sent(struct NCR_ESP *esp, int fifo_count);
static int  dma_can_transfer(struct NCR_ESP *esp, Scsi_Cmnd *sp);
static void dma_drain(struct NCR_ESP *esp);
static void dma_invalidate(struct NCR_ESP *esp);
static void dma_dump_state(struct NCR_ESP *esp);
static void dma_init_read(struct NCR_ESP *esp, __u32 vaddress, int length);
static void dma_init_write(struct NCR_ESP *esp, __u32 vaddress, int length);
static void dma_ints_off(struct NCR_ESP *esp);
static void dma_ints_on(struct NCR_ESP *esp);
static int  dma_irq_p(struct NCR_ESP *esp);
static void dma_poll(struct NCR_ESP *esp, unsigned char *vaddr);
static int  dma_ports_p(struct NCR_ESP *esp);
static void dma_reset(struct NCR_ESP *esp);
static void dma_setup(struct NCR_ESP *esp, __u32 addr, int count, int write);
static void dma_mmu_get_scsi_one (struct NCR_ESP *esp, Scsi_Cmnd *sp);
static void dma_mmu_get_scsi_sgl (struct NCR_ESP *esp, Scsi_Cmnd *sp);
static void dma_mmu_release_scsi_one (struct NCR_ESP *esp, Scsi_Cmnd *sp);
static void dma_mmu_release_scsi_sgl (struct NCR_ESP *esp, Scsi_Cmnd *sp);
static void dma_advance_sg (Scsi_Cmnd *sp);

/* Detecting ESP chips on the machine.  This is the simple and easy
 * version.
 */
int sun3x_esp_detect(struct scsi_host_template *tpnt)
{
	struct NCR_ESP *esp;
	struct ConfigDev *esp_dev;

	esp_dev = 0;
	esp = esp_allocate(tpnt, esp_dev, 0);

	/* Do command transfer with DMA */
	esp->do_pio_cmds = 0;

	/* Required functions */
	esp->dma_bytes_sent = &dma_bytes_sent;
	esp->dma_can_transfer = &dma_can_transfer;
	esp->dma_dump_state = &dma_dump_state;
	esp->dma_init_read = &dma_init_read;
	esp->dma_init_write = &dma_init_write;
	esp->dma_ints_off = &dma_ints_off;
	esp->dma_ints_on = &dma_ints_on;
	esp->dma_irq_p = &dma_irq_p;
	esp->dma_ports_p = &dma_ports_p;
	esp->dma_setup = &dma_setup;

	/* Optional functions */
	esp->dma_barrier = &dma_barrier;
	esp->dma_invalidate = &dma_invalidate;
	esp->dma_drain = &dma_drain;
	esp->dma_irq_entry = 0;
	esp->dma_irq_exit = 0;
	esp->dma_led_on = 0;
	esp->dma_led_off = 0;
	esp->dma_poll = &dma_poll;
	esp->dma_reset = &dma_reset;

        /* virtual DMA functions */
        esp->dma_mmu_get_scsi_one = &dma_mmu_get_scsi_one;
        esp->dma_mmu_get_scsi_sgl = &dma_mmu_get_scsi_sgl;
        esp->dma_mmu_release_scsi_one = &dma_mmu_release_scsi_one;
        esp->dma_mmu_release_scsi_sgl = &dma_mmu_release_scsi_sgl;
        esp->dma_advance_sg = &dma_advance_sg;
	    
	/* SCSI chip speed */
	esp->cfreq = 20000000;
	esp->eregs = (struct ESP_regs *)(SUN3X_ESP_BASE);
	esp->dregs = (void *)SUN3X_ESP_DMA;

	esp->esp_command = (volatile unsigned char *)dvma_malloc(DVMA_PAGE_SIZE);
	esp->esp_command_dvma = dvma_vtob((unsigned long)esp->esp_command);

	esp->irq = 2;
	if (request_irq(esp->irq, esp_intr, IRQF_DISABLED,
			"SUN3X SCSI", esp->ehost)) {
		esp_deallocate(esp);
		return 0;
	}

	esp->scsi_id = 7;
	esp->diff = 0;

	esp_initialize(esp);

 	/* for reasons beyond my knowledge (and which should likely be fixed)
 	   sync mode doesn't work on a 3/80 at 5mhz.  but it does at 4. */
 	esp->sync_defp = 0x3f;

	printk("ESP: Total of %d ESP hosts found, %d actually in use.\n", nesps,
	       esps_in_use);
	esps_running = esps_in_use;
	return esps_in_use;
}

static void dma_do_drain(struct NCR_ESP *esp)
{
 	struct sparc_dma_registers *dregs =
 		(struct sparc_dma_registers *) esp->dregs;
 	
 	int count = 500000;
 
 	while((dregs->cond_reg & DMA_PEND_READ) && (--count > 0)) 
 		udelay(1);
 
 	if(!count) {
 		printk("%s:%d timeout CSR %08lx\n", __FILE__, __LINE__, dregs->cond_reg);
 	}
 
 	dregs->cond_reg |= DMA_FIFO_STDRAIN;
 	
 	count = 500000;
 
 	while((dregs->cond_reg & DMA_FIFO_ISDRAIN) && (--count > 0)) 
 		udelay(1);
 
 	if(!count) {
 		printk("%s:%d timeout CSR %08lx\n", __FILE__, __LINE__, dregs->cond_reg);
 	}
 
}
 
static void dma_barrier(struct NCR_ESP *esp)
{
  	struct sparc_dma_registers *dregs =
  		(struct sparc_dma_registers *) esp->dregs;
 	int count = 500000;
  
 	while((dregs->cond_reg & DMA_PEND_READ) && (--count > 0))
  		udelay(1);
 
 	if(!count) {
 		printk("%s:%d timeout CSR %08lx\n", __FILE__, __LINE__, dregs->cond_reg);
 	}
 
  	dregs->cond_reg &= ~(DMA_ENABLE);
}

/* This uses various DMA csr fields and the fifo flags count value to
 * determine how many bytes were successfully sent/received by the ESP.
 */
static int dma_bytes_sent(struct NCR_ESP *esp, int fifo_count)
{
	struct sparc_dma_registers *dregs = 
		(struct sparc_dma_registers *) esp->dregs;

	int rval = dregs->st_addr - esp->esp_command_dvma;

	return rval - fifo_count;
}

static int dma_can_transfer(struct NCR_ESP *esp, Scsi_Cmnd *sp)
{
	return sp->SCp.this_residual;
}

static void dma_drain(struct NCR_ESP *esp)
{
	struct sparc_dma_registers *dregs =
		(struct sparc_dma_registers *) esp->dregs;
	int count = 500000;

	if(dregs->cond_reg & DMA_FIFO_ISDRAIN) {
		dregs->cond_reg |= DMA_FIFO_STDRAIN;
		while((dregs->cond_reg & DMA_FIFO_ISDRAIN) && (--count > 0))
			udelay(1);
		if(!count) {
			printk("%s:%d timeout CSR %08lx\n", __FILE__, __LINE__, dregs->cond_reg);
		}

	}
}

static void dma_invalidate(struct NCR_ESP *esp)
{
	struct sparc_dma_registers *dregs =
		(struct sparc_dma_registers *) esp->dregs;

	__u32 tmp;
	int count = 500000;

	while(((tmp = dregs->cond_reg) & DMA_PEND_READ) && (--count > 0)) 
		udelay(1);

	if(!count) {
		printk("%s:%d timeout CSR %08lx\n", __FILE__, __LINE__, dregs->cond_reg);
	}

	dregs->cond_reg = tmp | DMA_FIFO_INV;
	dregs->cond_reg &= ~DMA_FIFO_INV;

}

static void dma_dump_state(struct NCR_ESP *esp)
{
	struct sparc_dma_registers *dregs =
		(struct sparc_dma_registers *) esp->dregs;

	ESPLOG(("esp%d: dma -- cond_reg<%08lx> addr<%08lx>\n",
		esp->esp_id, dregs->cond_reg, dregs->st_addr));
}

static void dma_init_read(struct NCR_ESP *esp, __u32 vaddress, int length)
{
	struct sparc_dma_registers *dregs = 
		(struct sparc_dma_registers *) esp->dregs;

	dregs->st_addr = vaddress;
	dregs->cond_reg |= (DMA_ST_WRITE | DMA_ENABLE);
}

static void dma_init_write(struct NCR_ESP *esp, __u32 vaddress, int length)
{
	struct sparc_dma_registers *dregs = 
		(struct sparc_dma_registers *) esp->dregs;

	/* Set up the DMA counters */

	dregs->st_addr = vaddress;
	dregs->cond_reg = ((dregs->cond_reg & ~(DMA_ST_WRITE)) | DMA_ENABLE);
}

static void dma_ints_off(struct NCR_ESP *esp)
{
	DMA_INTSOFF((struct sparc_dma_registers *) esp->dregs);
}

static void dma_ints_on(struct NCR_ESP *esp)
{
	DMA_INTSON((struct sparc_dma_registers *) esp->dregs);
}

static int dma_irq_p(struct NCR_ESP *esp)
{
	return DMA_IRQ_P((struct sparc_dma_registers *) esp->dregs);
}

static void dma_poll(struct NCR_ESP *esp, unsigned char *vaddr)
{
	int count = 50;
	dma_do_drain(esp);

	/* Wait till the first bits settle. */
	while((*(volatile unsigned char *)vaddr == 0xff) && (--count > 0))
		udelay(1);

	if(!count) {
//		printk("%s:%d timeout expire (data %02x)\n", __FILE__, __LINE__,
//		       esp_read(esp->eregs->esp_fdata));
		//mach_halt();
		vaddr[0] = esp_read(esp->eregs->esp_fdata);
		vaddr[1] = esp_read(esp->eregs->esp_fdata);
	}

}	

static int dma_ports_p(struct NCR_ESP *esp)
{
	return (((struct sparc_dma_registers *) esp->dregs)->cond_reg 
			& DMA_INT_ENAB);
}

/* Resetting various pieces of the ESP scsi driver chipset/buses. */
static void dma_reset(struct NCR_ESP *esp)
{
	struct sparc_dma_registers *dregs =
		(struct sparc_dma_registers *)esp->dregs;

	/* Punt the DVMA into a known state. */
	dregs->cond_reg |= DMA_RST_SCSI;
	dregs->cond_reg &= ~(DMA_RST_SCSI);
	DMA_INTSON(dregs);
}

static void dma_setup(struct NCR_ESP *esp, __u32 addr, int count, int write)
{
	struct sparc_dma_registers *dregs = 
		(struct sparc_dma_registers *) esp->dregs;
	unsigned long nreg = dregs->cond_reg;

//	printk("dma_setup %c addr %08x cnt %08x\n",
//	       write ? 'W' : 'R', addr, count);

	dma_do_drain(esp);

	if(write)
		nreg |= DMA_ST_WRITE;
	else {
		nreg &= ~(DMA_ST_WRITE);
	}
		
	nreg |= DMA_ENABLE;
	dregs->cond_reg = nreg;
	dregs->st_addr = addr;
}

static void dma_mmu_get_scsi_one (struct NCR_ESP *esp, Scsi_Cmnd *sp)
{
    sp->SCp.have_data_in = dvma_map((unsigned long)sp->SCp.buffer,
				       sp->SCp.this_residual);
    sp->SCp.ptr = (char *)((unsigned long)sp->SCp.have_data_in);
}

static void dma_mmu_get_scsi_sgl (struct NCR_ESP *esp, Scsi_Cmnd *sp)
{
    int sz = sp->SCp.buffers_residual;
    struct scatterlist *sg = sp->SCp.buffer;

    while (sz >= 0) {
	    sg[sz].dma_address = dvma_map((unsigned long)page_address(sg[sz].page) +
					   sg[sz].offset, sg[sz].length);
	    sz--;
    }
    sp->SCp.ptr=(char *)((unsigned long)sp->SCp.buffer->dma_address);
}

static void dma_mmu_release_scsi_one (struct NCR_ESP *esp, Scsi_Cmnd *sp)
{
    dvma_unmap((char *)sp->SCp.have_data_in);
}

static void dma_mmu_release_scsi_sgl (struct NCR_ESP *esp, Scsi_Cmnd *sp)
{
    int sz = sp->use_sg - 1;
    struct scatterlist *sg = (struct scatterlist *)sp->request_buffer;
                        
    while(sz >= 0) {
        dvma_unmap((char *)sg[sz].dma_address);
        sz--;
    }
}

static void dma_advance_sg (Scsi_Cmnd *sp)
{
    sp->SCp.ptr = (char *)((unsigned long)sp->SCp.buffer->dma_address);
}

static int sun3x_esp_release(struct Scsi_Host *instance)
{
	/* this code does not support being compiled as a module */	 
	return 1;

}

static struct scsi_host_template driver_template = {
	.proc_name		= "sun3x_esp",
	.proc_info		= &esp_proc_info,
	.name			= "Sun ESP 100/100a/200",
	.detect			= sun3x_esp_detect,
	.release                = sun3x_esp_release,
	.slave_alloc		= esp_slave_alloc,
	.slave_destroy		= esp_slave_destroy,
	.info			= esp_info,
	.queuecommand		= esp_queue,
	.eh_abort_handler	= esp_abort,
	.eh_bus_reset_handler	= esp_reset,
	.can_queue		= 7,
	.this_id		= 7,
	.sg_tablesize		= SG_ALL,
	.cmd_per_lun		= 1,
	.use_clustering		= DISABLE_CLUSTERING,
};


#include "scsi_module.c"

MODULE_LICENSE("GPL");
Commit	Line	Data
1da177e4 LT	1	/* sun3x_esp.c: EnhancedScsiProcessor Sun3x SCSI driver code.
	2	*
	3	* (C) 1999 Thomas Bogendoerfer (tsbogend@alpha.franken.de)
	4	*
	5	* Based on David S. Miller's esp driver
	6	*/
	7
	8	#include <linux/kernel.h>
	9	#include <linux/types.h>
	10	#include <linux/string.h>
	11	#include <linux/slab.h>
	12	#include <linux/blkdev.h>
	13	#include <linux/proc_fs.h>
	14	#include <linux/stat.h>
	15	#include <linux/delay.h>
	16	#include <linux/interrupt.h>
	17
	18	#include "scsi.h"
	19	#include <scsi/scsi_host.h>
	20	#include "NCR53C9x.h"
	21
	22	#include <asm/sun3x.h>
	23	#include <asm/dvma.h>
	24	#include <asm/irq.h>
	25
1da177e4 LT	26	static void dma_barrier(struct NCR_ESP *esp);
	27	static int dma_bytes_sent(struct NCR_ESP *esp, int fifo_count);
	28	static int dma_can_transfer(struct NCR_ESP esp, Scsi_Cmnd sp);
	29	static void dma_drain(struct NCR_ESP *esp);
	30	static void dma_invalidate(struct NCR_ESP *esp);
	31	static void dma_dump_state(struct NCR_ESP *esp);
	32	static void dma_init_read(struct NCR_ESP *esp, __u32 vaddress, int length);
	33	static void dma_init_write(struct NCR_ESP *esp, __u32 vaddress, int length);
	34	static void dma_ints_off(struct NCR_ESP *esp);
	35	static void dma_ints_on(struct NCR_ESP *esp);
	36	static int dma_irq_p(struct NCR_ESP *esp);
	37	static void dma_poll(struct NCR_ESP esp, unsigned char vaddr);
	38	static int dma_ports_p(struct NCR_ESP *esp);
	39	static void dma_reset(struct NCR_ESP *esp);
	40	static void dma_setup(struct NCR_ESP *esp, __u32 addr, int count, int write);
	41	static void dma_mmu_get_scsi_one (struct NCR_ESP esp, Scsi_Cmnd sp);
	42	static void dma_mmu_get_scsi_sgl (struct NCR_ESP esp, Scsi_Cmnd sp);
	43	static void dma_mmu_release_scsi_one (struct NCR_ESP esp, Scsi_Cmnd sp);
	44	static void dma_mmu_release_scsi_sgl (struct NCR_ESP esp, Scsi_Cmnd sp);
	45	static void dma_advance_sg (Scsi_Cmnd *sp);
	46
	47	/* Detecting ESP chips on the machine. This is the simple and easy
	48	* version.
	49	*/
d0be4a7d	50	int sun3x_esp_detect(struct scsi_host_template *tpnt)
1da177e4 LT	51	{
	52	struct NCR_ESP *esp;
	53	struct ConfigDev *esp_dev;
	54
	55	esp_dev = 0;
4df4db5c	56	esp = esp_allocate(tpnt, esp_dev, 0);
1da177e4 LT	57
	58	/* Do command transfer with DMA */
	59	esp->do_pio_cmds = 0;
	60
	61	/* Required functions */
	62	esp->dma_bytes_sent = &dma_bytes_sent;
	63	esp->dma_can_transfer = &dma_can_transfer;
	64	esp->dma_dump_state = &dma_dump_state;
	65	esp->dma_init_read = &dma_init_read;
	66	esp->dma_init_write = &dma_init_write;
	67	esp->dma_ints_off = &dma_ints_off;
	68	esp->dma_ints_on = &dma_ints_on;
	69	esp->dma_irq_p = &dma_irq_p;
	70	esp->dma_ports_p = &dma_ports_p;
	71	esp->dma_setup = &dma_setup;
	72
	73	/* Optional functions */
	74	esp->dma_barrier = &dma_barrier;
	75	esp->dma_invalidate = &dma_invalidate;
	76	esp->dma_drain = &dma_drain;
	77	esp->dma_irq_entry = 0;
	78	esp->dma_irq_exit = 0;
	79	esp->dma_led_on = 0;
	80	esp->dma_led_off = 0;
	81	esp->dma_poll = &dma_poll;
	82	esp->dma_reset = &dma_reset;
	83
	84	/* virtual DMA functions */
	85	esp->dma_mmu_get_scsi_one = &dma_mmu_get_scsi_one;
	86	esp->dma_mmu_get_scsi_sgl = &dma_mmu_get_scsi_sgl;
	87	esp->dma_mmu_release_scsi_one = &dma_mmu_release_scsi_one;
	88	esp->dma_mmu_release_scsi_sgl = &dma_mmu_release_scsi_sgl;
	89	esp->dma_advance_sg = &dma_advance_sg;
	90
	91	/* SCSI chip speed */
	92	esp->cfreq = 20000000;
	93	esp->eregs = (struct ESP_regs *)(SUN3X_ESP_BASE);
	94	esp->dregs = (void *)SUN3X_ESP_DMA;
	95
	96	esp->esp_command = (volatile unsigned char *)dvma_malloc(DVMA_PAGE_SIZE);
	97	esp->esp_command_dvma = dvma_vtob((unsigned long)esp->esp_command);
	98
	99	esp->irq = 2;
1d6f359a	100	if (request_irq(esp->irq, esp_intr, IRQF_DISABLED,
1da177e4 LT	101	"SUN3X SCSI", esp->ehost)) {
	102	esp_deallocate(esp);
	103	return 0;
	104	}
	105
	106	esp->scsi_id = 7;
	107	esp->diff = 0;
	108
	109	esp_initialize(esp);
	110
	111	/* for reasons beyond my knowledge (and which should likely be fixed)
	112	sync mode doesn't work on a 3/80 at 5mhz. but it does at 4. */
	113	esp->sync_defp = 0x3f;
	114
	115	printk("ESP: Total of %d ESP hosts found, %d actually in use.\n", nesps,
	116	esps_in_use);
	117	esps_running = esps_in_use;
	118	return esps_in_use;
	119	}
	120
	121	static void dma_do_drain(struct NCR_ESP *esp)
	122	{
	123	struct sparc_dma_registers *dregs =
	124	(struct sparc_dma_registers *) esp->dregs;
	125
	126	int count = 500000;
	127
	128	while((dregs->cond_reg & DMA_PEND_READ) && (--count > 0))
	129	udelay(1);
	130
	131	if(!count) {
	132	printk("%s:%d timeout CSR %08lx\n", __FILE__, __LINE__, dregs->cond_reg);
	133	}
	134
	135	dregs->cond_reg \|= DMA_FIFO_STDRAIN;
	136
	137	count = 500000;
	138
	139	while((dregs->cond_reg & DMA_FIFO_ISDRAIN) && (--count > 0))
	140	udelay(1);
	141
	142	if(!count) {
	143	printk("%s:%d timeout CSR %08lx\n", __FILE__, __LINE__, dregs->cond_reg);
	144	}
	145
	146	}
	147
	148	static void dma_barrier(struct NCR_ESP *esp)
	149	{
	150	struct sparc_dma_registers *dregs =
	151	(struct sparc_dma_registers *) esp->dregs;
	152	int count = 500000;
	153
	154	while((dregs->cond_reg & DMA_PEND_READ) && (--count > 0))
	155	udelay(1);
	156
	157	if(!count) {
	158	printk("%s:%d timeout CSR %08lx\n", __FILE__, __LINE__, dregs->cond_reg);
	159	}
	160
	161	dregs->cond_reg &= ~(DMA_ENABLE);
	162	}
	163
	164	/* This uses various DMA csr fields and the fifo flags count value to
165	* determine how many bytes were successfully sent/received by the ESP.
166	*/
167	static int dma_bytes_sent(struct NCR_ESP *esp, int fifo_count)
168	{
169	struct sparc_dma_registers *dregs =
170	(struct sparc_dma_registers *) esp->dregs;
171
172	int rval = dregs->st_addr - esp->esp_command_dvma;
173
174	return rval - fifo_count;
175	}
176
177	static int dma_can_transfer(struct NCR_ESP esp, Scsi_Cmnd sp)
178	{
179	return sp->SCp.this_residual;
180	}
181
182	static void dma_drain(struct NCR_ESP *esp)
183	{
184	struct sparc_dma_registers *dregs =
185	(struct sparc_dma_registers *) esp->dregs;
186	int count = 500000;
187
188	if(dregs->cond_reg & DMA_FIFO_ISDRAIN) {
189	dregs->cond_reg \|= DMA_FIFO_STDRAIN;
190	while((dregs->cond_reg & DMA_FIFO_ISDRAIN) && (--count > 0))
191	udelay(1);
192	if(!count) {
193	printk("%s:%d timeout CSR %08lx\n", __FILE__, __LINE__, dregs->cond_reg);
194	}
195
196	}
197	}
198
199	static void dma_invalidate(struct NCR_ESP *esp)
200	{
201	struct sparc_dma_registers *dregs =
202	(struct sparc_dma_registers *) esp->dregs;
203
204	__u32 tmp;
205	int count = 500000;
206
207	while(((tmp = dregs->cond_reg) & DMA_PEND_READ) && (--count > 0))
208	udelay(1);
209
210	if(!count) {
211	printk("%s:%d timeout CSR %08lx\n", __FILE__, __LINE__, dregs->cond_reg);
212	}
213
214	dregs->cond_reg = tmp \| DMA_FIFO_INV;
215	dregs->cond_reg &= ~DMA_FIFO_INV;
216
217	}
218
219	static void dma_dump_state(struct NCR_ESP *esp)
220	{
221	struct sparc_dma_registers *dregs =
222	(struct sparc_dma_registers *) esp->dregs;
223
224	ESPLOG(("esp%d: dma -- cond_reg<%08lx> addr<%08lx>\n",
225	esp->esp_id, dregs->cond_reg, dregs->st_addr));
226	}
227
228	static void dma_init_read(struct NCR_ESP *esp, __u32 vaddress, int length)
229	{
230	struct sparc_dma_registers *dregs =
231	(struct sparc_dma_registers *) esp->dregs;
232
233	dregs->st_addr = vaddress;
234	dregs->cond_reg \|= (DMA_ST_WRITE \| DMA_ENABLE);
235	}
236
237	static void dma_init_write(struct NCR_ESP *esp, __u32 vaddress, int length)
238	{
239	struct sparc_dma_registers *dregs =
240	(struct sparc_dma_registers *) esp->dregs;
241
242	/* Set up the DMA counters */
243
244	dregs->st_addr = vaddress;
245	dregs->cond_reg = ((dregs->cond_reg & ~(DMA_ST_WRITE)) \| DMA_ENABLE);
246	}
247
248	static void dma_ints_off(struct NCR_ESP *esp)
249	{
250	DMA_INTSOFF((struct sparc_dma_registers *) esp->dregs);
251	}
252
253	static void dma_ints_on(struct NCR_ESP *esp)
254	{
255	DMA_INTSON((struct sparc_dma_registers *) esp->dregs);
256	}
257
258	static int dma_irq_p(struct NCR_ESP *esp)
259	{
260	return DMA_IRQ_P((struct sparc_dma_registers *) esp->dregs);
261	}
262
263	static void dma_poll(struct NCR_ESP esp, unsigned char vaddr)
264	{
265	int count = 50;
266	dma_do_drain(esp);
267
268	/* Wait till the first bits settle. */
269	while(((volatile unsigned char )vaddr == 0xff) && (--count > 0))
270	udelay(1);
271
272	if(!count) {
273	// printk("%s:%d timeout expire (data %02x)\n", __FILE__, __LINE__,
274	// esp_read(esp->eregs->esp_fdata));
275	//mach_halt();
276	vaddr[0] = esp_read(esp->eregs->esp_fdata);
277	vaddr[1] = esp_read(esp->eregs->esp_fdata);
278	}
279
280	}
281
282	static int dma_ports_p(struct NCR_ESP *esp)
283	{
284	return (((struct sparc_dma_registers *) esp->dregs)->cond_reg
285	& DMA_INT_ENAB);
286	}
287
288	/* Resetting various pieces of the ESP scsi driver chipset/buses. */
289	static void dma_reset(struct NCR_ESP *esp)
290	{
291	struct sparc_dma_registers *dregs =
292	(struct sparc_dma_registers *)esp->dregs;
293
294	/* Punt the DVMA into a known state. */
295	dregs->cond_reg \|= DMA_RST_SCSI;
296	dregs->cond_reg &= ~(DMA_RST_SCSI);
297	DMA_INTSON(dregs);
298	}
299
300	static void dma_setup(struct NCR_ESP *esp, __u32 addr, int count, int write)
301	{
302	struct sparc_dma_registers *dregs =
303	(struct sparc_dma_registers *) esp->dregs;
304	unsigned long nreg = dregs->cond_reg;
305
306	// printk("dma_setup %c addr %08x cnt %08x\n",
307	// write ? 'W' : 'R', addr, count);
308
309	dma_do_drain(esp);
310
311	if(write)
312	nreg \|= DMA_ST_WRITE;
313	else {
314	nreg &= ~(DMA_ST_WRITE);
315	}
316
317	nreg \|= DMA_ENABLE;
318	dregs->cond_reg = nreg;
319	dregs->st_addr = addr;
320	}
321
322	static void dma_mmu_get_scsi_one (struct NCR_ESP esp, Scsi_Cmnd sp)
323	{
324	sp->SCp.have_data_in = dvma_map((unsigned long)sp->SCp.buffer,
325	sp->SCp.this_residual);
326	sp->SCp.ptr = (char *)((unsigned long)sp->SCp.have_data_in);
327	}
328
329	static void dma_mmu_get_scsi_sgl (struct NCR_ESP esp, Scsi_Cmnd sp)
330	{
331	int sz = sp->SCp.buffers_residual;
332	struct scatterlist *sg = sp->SCp.buffer;
333
334	while (sz >= 0) {
b035c96b	335	sg[sz].dma_address = dvma_map((unsigned long)page_address(sg[sz].page) +
1da177e4 LT	336	sg[sz].offset, sg[sz].length);
	337	sz--;
	338	}
b035c96b	339	sp->SCp.ptr=(char *)((unsigned long)sp->SCp.buffer->dma_address);
1da177e4 LT	340	}
	341
	342	static void dma_mmu_release_scsi_one (struct NCR_ESP esp, Scsi_Cmnd sp)
	343	{
	344	dvma_unmap((char *)sp->SCp.have_data_in);
	345	}
	346
	347	static void dma_mmu_release_scsi_sgl (struct NCR_ESP esp, Scsi_Cmnd sp)
	348	{
	349	int sz = sp->use_sg - 1;
79bd3f85	350	struct scatterlist sg = (struct scatterlist )sp->request_buffer;
1da177e4 LT	351
1da177e4 LT	352	while(sz >= 0) {
b035c96b	353	dvma_unmap((char *)sg[sz].dma_address);
1da177e4 LT	354	sz--;
	355	}
	356	}
	357
	358	static void dma_advance_sg (Scsi_Cmnd *sp)
	359	{
b035c96b	360	sp->SCp.ptr = (char *)((unsigned long)sp->SCp.buffer->dma_address);
1da177e4 LT	361	}
	362
	363	static int sun3x_esp_release(struct Scsi_Host *instance)
	364	{
	365	/* this code does not support being compiled as a module */
	366	return 1;
	367
	368	}
	369
d0be4a7d	370	static struct scsi_host_template driver_template = {
1da177e4 LT	371	.proc_name = "sun3x_esp",
	372	.proc_info = &esp_proc_info,
	373	.name = "Sun ESP 100/100a/200",
	374	.detect = sun3x_esp_detect,
	375	.release = sun3x_esp_release,
	376	.slave_alloc = esp_slave_alloc,
	377	.slave_destroy = esp_slave_destroy,
	378	.info = esp_info,
	379	.queuecommand = esp_queue,
	380	.eh_abort_handler = esp_abort,
	381	.eh_bus_reset_handler = esp_reset,
	382	.can_queue = 7,
	383	.this_id = 7,
	384	.sg_tablesize = SG_ALL,
	385	.cmd_per_lun = 1,
	386	.use_clustering = DISABLE_CLUSTERING,
	387	};
	388
	389
	390	#include "scsi_module.c"
	391
	392	MODULE_LICENSE("GPL");