[net-next-2.6.git] / drivers / scsi / lpfc / lpfc_sli4.h

/*******************************************************************
 * This file is part of the Emulex Linux Device Driver for         *
 * Fibre Channel Host Bus Adapters.                                *
 * Copyright (C) 2009 Emulex.  All rights reserved.                *
 * EMULEX and SLI are trademarks of Emulex.                        *
 * www.emulex.com                                                  *
 *                                                                 *
 * This program is free software; you can redistribute it and/or   *
 * modify it under the terms of version 2 of the GNU General       *
 * Public License as published by the Free Software Foundation.    *
 * This program is distributed in the hope that it will be useful. *
 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND          *
 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY,  *
 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE      *
 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
 * TO BE LEGALLY INVALID.  See the GNU General Public License for  *
 * more details, a copy of which can be found in the file COPYING  *
 * included with this package.                                     *
 *******************************************************************/

#define LPFC_ACTIVE_MBOX_WAIT_CNT               100
#define LPFC_RELEASE_NOTIFICATION_INTERVAL	32
#define LPFC_GET_QE_REL_INT			32
#define LPFC_RPI_LOW_WATER_MARK			10

/* Amount of time in seconds for waiting FCF rediscovery to complete */
#define LPFC_FCF_REDISCOVER_WAIT_TMO		2000 /* msec */

/* Number of SGL entries can be posted in a 4KB nonembedded mbox command */
#define LPFC_NEMBED_MBOX_SGL_CNT		254

/* Multi-queue arrangement for fast-path FCP work queues */
#define LPFC_FN_EQN_MAX       8
#define LPFC_SP_EQN_DEF       1
#define LPFC_FP_EQN_DEF       4
#define LPFC_FP_EQN_MIN       1
#define LPFC_FP_EQN_MAX       (LPFC_FN_EQN_MAX - LPFC_SP_EQN_DEF)

#define LPFC_FN_WQN_MAX       32
#define LPFC_SP_WQN_DEF       1
#define LPFC_FP_WQN_DEF       4
#define LPFC_FP_WQN_MIN       1
#define LPFC_FP_WQN_MAX       (LPFC_FN_WQN_MAX - LPFC_SP_WQN_DEF)

/*
 * Provide the default FCF Record attributes used by the driver
 * when nonFIP mode is configured and there is no other default
 * FCF Record attributes.
 */
#define LPFC_FCOE_FCF_DEF_INDEX	0
#define LPFC_FCOE_FCF_GET_FIRST	0xFFFF
#define LPFC_FCOE_FCF_NEXT_NONE	0xFFFF

#define LPFC_FCOE_NULL_VID	0xFFF
#define LPFC_FCOE_IGNORE_VID	0xFFFF

/* First 3 bytes of default FCF MAC is specified by FC_MAP */
#define LPFC_FCOE_FCF_MAC3	0xFF
#define LPFC_FCOE_FCF_MAC4	0xFF
#define LPFC_FCOE_FCF_MAC5	0xFE
#define LPFC_FCOE_FCF_MAP0	0x0E
#define LPFC_FCOE_FCF_MAP1	0xFC
#define LPFC_FCOE_FCF_MAP2	0x00
#define LPFC_FCOE_MAX_RCV_SIZE	0x800
#define LPFC_FCOE_FKA_ADV_PER	0
#define LPFC_FCOE_FIP_PRIORITY	0x80

#define sli4_sid_from_fc_hdr(fc_hdr)  \
	((fc_hdr)->fh_s_id[0] << 16 | \
	 (fc_hdr)->fh_s_id[1] <<  8 | \
	 (fc_hdr)->fh_s_id[2])

#define sli4_fctl_from_fc_hdr(fc_hdr)  \
	((fc_hdr)->fh_f_ctl[0] << 16 | \
	 (fc_hdr)->fh_f_ctl[1] <<  8 | \
	 (fc_hdr)->fh_f_ctl[2])

enum lpfc_sli4_queue_type {
	LPFC_EQ,
	LPFC_GCQ,
	LPFC_MCQ,
	LPFC_WCQ,
	LPFC_RCQ,
	LPFC_MQ,
	LPFC_WQ,
	LPFC_HRQ,
	LPFC_DRQ
};

/* The queue sub-type defines the functional purpose of the queue */
enum lpfc_sli4_queue_subtype {
	LPFC_NONE,
	LPFC_MBOX,
	LPFC_FCP,
	LPFC_ELS,
	LPFC_USOL
};

union sli4_qe {
	void *address;
	struct lpfc_eqe *eqe;
	struct lpfc_cqe *cqe;
	struct lpfc_mcqe *mcqe;
	struct lpfc_wcqe_complete *wcqe_complete;
	struct lpfc_wcqe_release *wcqe_release;
	struct sli4_wcqe_xri_aborted *wcqe_xri_aborted;
	struct lpfc_rcqe_complete *rcqe_complete;
	struct lpfc_mqe *mqe;
	union  lpfc_wqe *wqe;
	struct lpfc_rqe *rqe;
};

struct lpfc_queue {
	struct list_head list;
	enum lpfc_sli4_queue_type type;
	enum lpfc_sli4_queue_subtype subtype;
	struct lpfc_hba *phba;
	struct list_head child_list;
	uint32_t entry_count;	/* Number of entries to support on the queue */
	uint32_t entry_size;	/* Size of each queue entry. */
	uint32_t queue_id;	/* Queue ID assigned by the hardware */
	struct list_head page_list;
	uint32_t page_count;	/* Number of pages allocated for this queue */

	uint32_t host_index;	/* The host's index for putting or getting */
	uint32_t hba_index;	/* The last known hba index for get or put */
	union sli4_qe qe[1];	/* array to index entries (must be last) */
};

struct lpfc_sli4_link {
	uint8_t speed;
	uint8_t duplex;
	uint8_t status;
	uint8_t physical;
	uint8_t fault;
	uint16_t logical_speed;
};

struct lpfc_fcf_rec {
	uint8_t  fabric_name[8];
	uint8_t  switch_name[8];
	uint8_t  mac_addr[6];
	uint16_t fcf_indx;
	uint32_t priority;
	uint16_t vlan_id;
	uint32_t addr_mode;
	uint32_t flag;
#define BOOT_ENABLE	0x01
#define RECORD_VALID	0x02
};

struct lpfc_fcf {
	uint16_t fcfi;
	uint32_t fcf_flag;
#define FCF_AVAILABLE	0x01 /* FCF available for discovery */
#define FCF_REGISTERED	0x02 /* FCF registered with FW */
#define FCF_SCAN_DONE	0x04 /* FCF table scan done */
#define FCF_IN_USE	0x08 /* Atleast one discovery completed */
#define FCF_INIT_DISC	0x10 /* Initial FCF discovery */
#define FCF_DEAD_DISC	0x20 /* FCF DEAD fast FCF failover discovery */
#define FCF_ACVL_DISC	0x40 /* All CVL fast FCF failover discovery */
#define FCF_DISCOVERY	(FCF_INIT_DISC | FCF_DEAD_DISC | FCF_ACVL_DISC)
#define FCF_REDISC_PEND	0x80 /* FCF rediscovery pending */
#define FCF_REDISC_EVT	0x100 /* FCF rediscovery event to worker thread */
#define FCF_REDISC_FOV	0x200 /* Post FCF rediscovery fast failover */
#define FCF_REDISC_RRU	0x400 /* Roundrobin bitmap updated */
	uint32_t addr_mode;
	uint16_t fcf_rr_init_indx;
	uint32_t eligible_fcf_cnt;
	struct lpfc_fcf_rec current_rec;
	struct lpfc_fcf_rec failover_rec;
	struct timer_list redisc_wait;
	unsigned long *fcf_rr_bmask; /* Eligible FCF indexes for RR failover */
};

/*
 * Maximum FCF table index, it is for driver internal book keeping, it
 * just needs to be no less than the supported HBA's FCF table size.
 */
#define LPFC_SLI4_FCF_TBL_INDX_MAX	32

#define LPFC_REGION23_SIGNATURE "RG23"
#define LPFC_REGION23_VERSION	1
#define LPFC_REGION23_LAST_REC  0xff
#define DRIVER_SPECIFIC_TYPE	0xA2
#define LINUX_DRIVER_ID		0x20
#define PORT_STE_TYPE		0x1

struct lpfc_fip_param_hdr {
	uint8_t type;
#define FCOE_PARAM_TYPE		0xA0
	uint8_t length;
#define FCOE_PARAM_LENGTH	2
	uint8_t parm_version;
#define FIPP_VERSION		0x01
	uint8_t parm_flags;
#define	lpfc_fip_param_hdr_fipp_mode_SHIFT	6
#define	lpfc_fip_param_hdr_fipp_mode_MASK	0x3
#define lpfc_fip_param_hdr_fipp_mode_WORD	parm_flags
#define	FIPP_MODE_ON				0x1
#define	FIPP_MODE_OFF				0x0
#define FIPP_VLAN_VALID				0x1
};

struct lpfc_fcoe_params {
	uint8_t fc_map[3];
	uint8_t reserved1;
	uint16_t vlan_tag;
	uint8_t reserved[2];
};

struct lpfc_fcf_conn_hdr {
	uint8_t type;
#define FCOE_CONN_TBL_TYPE		0xA1
	uint8_t length;   /* words */
	uint8_t reserved[2];
};

struct lpfc_fcf_conn_rec {
	uint16_t flags;
#define	FCFCNCT_VALID		0x0001
#define	FCFCNCT_BOOT		0x0002
#define	FCFCNCT_PRIMARY		0x0004   /* if not set, Secondary */
#define	FCFCNCT_FBNM_VALID	0x0008
#define	FCFCNCT_SWNM_VALID	0x0010
#define	FCFCNCT_VLAN_VALID	0x0020
#define	FCFCNCT_AM_VALID	0x0040
#define	FCFCNCT_AM_PREFERRED	0x0080   /* if not set, AM Required */
#define	FCFCNCT_AM_SPMA		0x0100	 /* if not set, FPMA */

	uint16_t vlan_tag;
	uint8_t fabric_name[8];
	uint8_t switch_name[8];
};

struct lpfc_fcf_conn_entry {
	struct list_head list;
	struct lpfc_fcf_conn_rec conn_rec;
};

/*
 * Define the host's bootstrap mailbox.  This structure contains
 * the member attributes needed to create, use, and destroy the
 * bootstrap mailbox region.
 *
 * The macro definitions for the bmbx data structure are defined
 * in lpfc_hw4.h with the register definition.
 */
struct lpfc_bmbx {
	struct lpfc_dmabuf *dmabuf;
	struct dma_address dma_address;
	void *avirt;
	dma_addr_t aphys;
	uint32_t bmbx_size;
};

#define LPFC_EQE_SIZE LPFC_EQE_SIZE_4

#define LPFC_EQE_SIZE_4B 	4
#define LPFC_EQE_SIZE_16B	16
#define LPFC_CQE_SIZE		16
#define LPFC_WQE_SIZE		64
#define LPFC_MQE_SIZE		256
#define LPFC_RQE_SIZE		8

#define LPFC_EQE_DEF_COUNT	1024
#define LPFC_CQE_DEF_COUNT      256
#define LPFC_WQE_DEF_COUNT      256
#define LPFC_MQE_DEF_COUNT      16
#define LPFC_RQE_DEF_COUNT	512

#define LPFC_QUEUE_NOARM	false
#define LPFC_QUEUE_REARM	true


/*
 * SLI4 CT field defines
 */
#define SLI4_CT_RPI 0
#define SLI4_CT_VPI 1
#define SLI4_CT_VFI 2
#define SLI4_CT_FCFI 3

#define LPFC_SLI4_FL1_MAX_SEGMENT_SIZE	0x10000
#define LPFC_SLI4_FL1_MAX_BUF_SIZE	0X2000
#define LPFC_SLI4_MIN_BUF_SIZE		0x400
#define LPFC_SLI4_MAX_BUF_SIZE		0x20000

/*
 * SLI4 specific data structures
 */
struct lpfc_max_cfg_param {
	uint16_t max_xri;
	uint16_t xri_base;
	uint16_t xri_used;
	uint16_t max_rpi;
	uint16_t rpi_base;
	uint16_t rpi_used;
	uint16_t max_vpi;
	uint16_t vpi_base;
	uint16_t vpi_used;
	uint16_t max_vfi;
	uint16_t vfi_base;
	uint16_t vfi_used;
	uint16_t max_fcfi;
	uint16_t fcfi_base;
	uint16_t fcfi_used;
	uint16_t max_eq;
	uint16_t max_rq;
	uint16_t max_cq;
	uint16_t max_wq;
};

struct lpfc_hba;
/* SLI4 HBA multi-fcp queue handler struct */
struct lpfc_fcp_eq_hdl {
	uint32_t idx;
	struct lpfc_hba *phba;
};

/* Port Capabilities for SLI4 Parameters */
struct lpfc_pc_sli4_params {
	uint32_t supported;
	uint32_t if_type;
	uint32_t sli_rev;
	uint32_t sli_family;
	uint32_t featurelevel_1;
	uint32_t featurelevel_2;
	uint32_t proto_types;
#define LPFC_SLI4_PROTO_FCOE	0x0000001
#define LPFC_SLI4_PROTO_FC	0x0000002
#define LPFC_SLI4_PROTO_NIC	0x0000004
#define LPFC_SLI4_PROTO_ISCSI	0x0000008
#define LPFC_SLI4_PROTO_RDMA	0x0000010
	uint32_t sge_supp_len;
	uint32_t if_page_sz;
	uint32_t rq_db_window;
	uint32_t loopbk_scope;
	uint32_t eq_pages_max;
	uint32_t eqe_size;
	uint32_t cq_pages_max;
	uint32_t cqe_size;
	uint32_t mq_pages_max;
	uint32_t mqe_size;
	uint32_t mq_elem_cnt;
	uint32_t wq_pages_max;
	uint32_t wqe_size;
	uint32_t rq_pages_max;
	uint32_t rqe_size;
	uint32_t hdr_pages_max;
	uint32_t hdr_size;
	uint32_t hdr_pp_align;
	uint32_t sgl_pages_max;
	uint32_t sgl_pp_align;
};

/* SLI4 HBA data structure entries */
struct lpfc_sli4_hba {
	void __iomem *conf_regs_memmap_p; /* Kernel memory mapped address for
					     PCI BAR0, config space registers */
	void __iomem *ctrl_regs_memmap_p; /* Kernel memory mapped address for
					     PCI BAR1, control registers */
	void __iomem *drbl_regs_memmap_p; /* Kernel memory mapped address for
					     PCI BAR2, doorbell registers */
	/* BAR0 PCI config space register memory map */
	void __iomem *UERRLOregaddr; /* Address to UERR_STATUS_LO register */
	void __iomem *UERRHIregaddr; /* Address to UERR_STATUS_HI register */
	void __iomem *UEMASKLOregaddr; /* Address to UE_MASK_LO register */
	void __iomem *UEMASKHIregaddr; /* Address to UE_MASK_HI register */
	void __iomem *SLIINTFregaddr; /* Address to SLI_INTF register */
	/* BAR1 FCoE function CSR register memory map */
	void __iomem *STAregaddr;    /* Address to HST_STATE register */
	void __iomem *ISRregaddr;    /* Address to HST_ISR register */
	void __iomem *IMRregaddr;    /* Address to HST_IMR register */
	void __iomem *ISCRregaddr;   /* Address to HST_ISCR register */
	/* BAR2 VF-0 doorbell register memory map */
	void __iomem *RQDBregaddr;   /* Address to RQ_DOORBELL register */
	void __iomem *WQDBregaddr;   /* Address to WQ_DOORBELL register */
	void __iomem *EQCQDBregaddr; /* Address to EQCQ_DOORBELL register */
	void __iomem *MQDBregaddr;   /* Address to MQ_DOORBELL register */
	void __iomem *BMBXregaddr;   /* Address to BootStrap MBX register */

	uint32_t ue_mask_lo;
	uint32_t ue_mask_hi;
	struct lpfc_register sli_intf;
	struct lpfc_pc_sli4_params pc_sli4_params;
	struct msix_entry *msix_entries;
	uint32_t cfg_eqn;
	uint32_t msix_vec_nr;
	struct lpfc_fcp_eq_hdl *fcp_eq_hdl; /* FCP per-WQ handle */
	/* Pointers to the constructed SLI4 queues */
	struct lpfc_queue **fp_eq; /* Fast-path event queue */
	struct lpfc_queue *sp_eq;  /* Slow-path event queue */
	struct lpfc_queue **fcp_wq;/* Fast-path FCP work queue */
	struct lpfc_queue *mbx_wq; /* Slow-path MBOX work queue */
	struct lpfc_queue *els_wq; /* Slow-path ELS work queue */
	struct lpfc_queue *hdr_rq; /* Slow-path Header Receive queue */
	struct lpfc_queue *dat_rq; /* Slow-path Data Receive queue */
	struct lpfc_queue **fcp_cq;/* Fast-path FCP compl queue */
	struct lpfc_queue *mbx_cq; /* Slow-path mailbox complete queue */
	struct lpfc_queue *els_cq; /* Slow-path ELS response complete queue */

	/* Setup information for various queue parameters */
	int eq_esize;
	int eq_ecount;
	int cq_esize;
	int cq_ecount;
	int wq_esize;
	int wq_ecount;
	int mq_esize;
	int mq_ecount;
	int rq_esize;
	int rq_ecount;
#define LPFC_SP_EQ_MAX_INTR_SEC         10000
#define LPFC_FP_EQ_MAX_INTR_SEC         10000

	uint32_t intr_enable;
	struct lpfc_bmbx bmbx;
	struct lpfc_max_cfg_param max_cfg_param;
	uint16_t next_xri; /* last_xri - max_cfg_param.xri_base = used */
	uint16_t next_rpi;
	uint16_t scsi_xri_max;
	uint16_t scsi_xri_cnt;
	struct list_head lpfc_free_sgl_list;
	struct list_head lpfc_sgl_list;
	struct lpfc_sglq **lpfc_els_sgl_array;
	struct list_head lpfc_abts_els_sgl_list;
	struct lpfc_scsi_buf **lpfc_scsi_psb_array;
	struct list_head lpfc_abts_scsi_buf_list;
	uint32_t total_sglq_bufs;
	struct lpfc_sglq **lpfc_sglq_active_list;
	struct list_head lpfc_rpi_hdr_list;
	unsigned long *rpi_bmask;
	uint16_t rpi_count;
	struct lpfc_sli4_flags sli4_flags;
	struct list_head sp_queue_event;
	struct list_head sp_cqe_event_pool;
	struct list_head sp_asynce_work_queue;
	struct list_head sp_fcp_xri_aborted_work_queue;
	struct list_head sp_els_xri_aborted_work_queue;
	struct list_head sp_unsol_work_queue;
	struct lpfc_sli4_link link_state;
	spinlock_t abts_scsi_buf_list_lock; /* list of aborted SCSI IOs */
	spinlock_t abts_sgl_list_lock; /* list of aborted els IOs */
};

enum lpfc_sge_type {
	GEN_BUFF_TYPE,
	SCSI_BUFF_TYPE
};

enum lpfc_sgl_state {
	SGL_FREED,
	SGL_ALLOCATED,
	SGL_XRI_ABORTED
};

struct lpfc_sglq {
	/* lpfc_sglqs are used in double linked lists */
	struct list_head list;
	struct list_head clist;
	enum lpfc_sge_type buff_type; /* is this a scsi sgl */
	enum lpfc_sgl_state state;
	uint16_t iotag;         /* pre-assigned IO tag */
	uint16_t sli4_xritag;   /* pre-assigned XRI, (OXID) tag. */
	struct sli4_sge *sgl;	/* pre-assigned SGL */
	void *virt;		/* virtual address. */
	dma_addr_t phys;	/* physical address */
};

struct lpfc_rpi_hdr {
	struct list_head list;
	uint32_t len;
	struct lpfc_dmabuf *dmabuf;
	uint32_t page_count;
	uint32_t start_rpi;
};

/*
 * SLI4 specific function prototypes
 */
int lpfc_pci_function_reset(struct lpfc_hba *);
int lpfc_sli4_hba_setup(struct lpfc_hba *);
int lpfc_sli4_config(struct lpfc_hba *, struct lpfcMboxq *, uint8_t,
		     uint8_t, uint32_t, bool);
void lpfc_sli4_mbox_cmd_free(struct lpfc_hba *, struct lpfcMboxq *);
void lpfc_sli4_mbx_sge_set(struct lpfcMboxq *, uint32_t, dma_addr_t, uint32_t);
void lpfc_sli4_mbx_sge_get(struct lpfcMboxq *, uint32_t,
			   struct lpfc_mbx_sge *);
int lpfc_sli4_mbx_read_fcf_rec(struct lpfc_hba *, struct lpfcMboxq *,
			       uint16_t);

void lpfc_sli4_hba_reset(struct lpfc_hba *);
struct lpfc_queue *lpfc_sli4_queue_alloc(struct lpfc_hba *, uint32_t,
			uint32_t);
void lpfc_sli4_queue_free(struct lpfc_queue *);
uint32_t lpfc_eq_create(struct lpfc_hba *, struct lpfc_queue *, uint16_t);
uint32_t lpfc_cq_create(struct lpfc_hba *, struct lpfc_queue *,
			struct lpfc_queue *, uint32_t, uint32_t);
int32_t lpfc_mq_create(struct lpfc_hba *, struct lpfc_queue *,
		       struct lpfc_queue *, uint32_t);
uint32_t lpfc_wq_create(struct lpfc_hba *, struct lpfc_queue *,
			struct lpfc_queue *, uint32_t);
uint32_t lpfc_rq_create(struct lpfc_hba *, struct lpfc_queue *,
			struct lpfc_queue *, struct lpfc_queue *, uint32_t);
uint32_t lpfc_eq_destroy(struct lpfc_hba *, struct lpfc_queue *);
uint32_t lpfc_cq_destroy(struct lpfc_hba *, struct lpfc_queue *);
uint32_t lpfc_mq_destroy(struct lpfc_hba *, struct lpfc_queue *);
uint32_t lpfc_wq_destroy(struct lpfc_hba *, struct lpfc_queue *);
uint32_t lpfc_rq_destroy(struct lpfc_hba *, struct lpfc_queue *,
			 struct lpfc_queue *);
int lpfc_sli4_queue_setup(struct lpfc_hba *);
void lpfc_sli4_queue_unset(struct lpfc_hba *);
int lpfc_sli4_post_sgl(struct lpfc_hba *, dma_addr_t, dma_addr_t, uint16_t);
int lpfc_sli4_repost_scsi_sgl_list(struct lpfc_hba *);
uint16_t lpfc_sli4_next_xritag(struct lpfc_hba *);
int lpfc_sli4_post_async_mbox(struct lpfc_hba *);
int lpfc_sli4_post_sgl_list(struct lpfc_hba *phba);
int lpfc_sli4_post_scsi_sgl_block(struct lpfc_hba *, struct list_head *, int);
struct lpfc_cq_event *__lpfc_sli4_cq_event_alloc(struct lpfc_hba *);
struct lpfc_cq_event *lpfc_sli4_cq_event_alloc(struct lpfc_hba *);
void __lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *);
void lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *);
int lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *);
int lpfc_sli4_post_rpi_hdr(struct lpfc_hba *, struct lpfc_rpi_hdr *);
int lpfc_sli4_post_all_rpi_hdrs(struct lpfc_hba *);
struct lpfc_rpi_hdr *lpfc_sli4_create_rpi_hdr(struct lpfc_hba *);
void lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *);
int lpfc_sli4_alloc_rpi(struct lpfc_hba *);
void __lpfc_sli4_free_rpi(struct lpfc_hba *, int);
void lpfc_sli4_free_rpi(struct lpfc_hba *, int);
void lpfc_sli4_remove_rpis(struct lpfc_hba *);
void lpfc_sli4_async_event_proc(struct lpfc_hba *);
void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *);
int lpfc_sli4_resume_rpi(struct lpfc_nodelist *);
void lpfc_sli4_fcp_xri_abort_event_proc(struct lpfc_hba *);
void lpfc_sli4_els_xri_abort_event_proc(struct lpfc_hba *);
void lpfc_sli4_fcp_xri_aborted(struct lpfc_hba *,
			       struct sli4_wcqe_xri_aborted *);
void lpfc_sli4_els_xri_aborted(struct lpfc_hba *,
			       struct sli4_wcqe_xri_aborted *);
int lpfc_sli4_brdreset(struct lpfc_hba *);
int lpfc_sli4_add_fcf_record(struct lpfc_hba *, struct fcf_record *);
void lpfc_sli_remove_dflt_fcf(struct lpfc_hba *);
int lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *);
int lpfc_sli4_init_vpi(struct lpfc_hba *, uint16_t);
uint32_t lpfc_sli4_cq_release(struct lpfc_queue *, bool);
uint32_t lpfc_sli4_eq_release(struct lpfc_queue *, bool);
void lpfc_sli4_fcfi_unreg(struct lpfc_hba *, uint16_t);
int lpfc_sli4_fcf_scan_read_fcf_rec(struct lpfc_hba *, uint16_t);
int lpfc_sli4_fcf_rr_read_fcf_rec(struct lpfc_hba *, uint16_t);
int lpfc_sli4_read_fcf_rec(struct lpfc_hba *, uint16_t);
void lpfc_mbx_cmpl_fcf_scan_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *);
void lpfc_mbx_cmpl_fcf_rr_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *);
void lpfc_mbx_cmpl_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *);
int lpfc_sli4_unregister_fcf(struct lpfc_hba *);
int lpfc_sli4_post_status_check(struct lpfc_hba *);
uint8_t lpfc_sli4_mbox_opcode_get(struct lpfc_hba *, struct lpfcMboxq *);
Commit	Line	Data
da0436e9 JS	1	/*******************************************************************
	2	* This file is part of the Emulex Linux Device Driver for *
	3	* Fibre Channel Host Bus Adapters. *
	4	* Copyright (C) 2009 Emulex. All rights reserved. *
	5	* EMULEX and SLI are trademarks of Emulex. *
	6	* www.emulex.com *
	7	* *
	8	* This program is free software; you can redistribute it and/or *
	9	* modify it under the terms of version 2 of the GNU General *
	10	* Public License as published by the Free Software Foundation. *
	11	* This program is distributed in the hope that it will be useful. *
	12	* ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
	13	* WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
	14	* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
	15	* DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
	16	* TO BE LEGALLY INVALID. See the GNU General Public License for *
	17	* more details, a copy of which can be found in the file COPYING *
	18	* included with this package. *
	19	*******************************************************************/
	20
	21	#define LPFC_ACTIVE_MBOX_WAIT_CNT 100
	22	#define LPFC_RELEASE_NOTIFICATION_INTERVAL 32
	23	#define LPFC_GET_QE_REL_INT 32
	24	#define LPFC_RPI_LOW_WATER_MARK 10
ecfd03c6 JS	25
	26	/* Amount of time in seconds for waiting FCF rediscovery to complete */
	27	#define LPFC_FCF_REDISCOVER_WAIT_TMO 2000 /* msec */
	28
da0436e9 JS	29	/* Number of SGL entries can be posted in a 4KB nonembedded mbox command */
	30	#define LPFC_NEMBED_MBOX_SGL_CNT 254
	31
	32	/* Multi-queue arrangement for fast-path FCP work queues */
	33	#define LPFC_FN_EQN_MAX 8
	34	#define LPFC_SP_EQN_DEF 1
def9c7a9	35	#define LPFC_FP_EQN_DEF 4
da0436e9 JS	36	#define LPFC_FP_EQN_MIN 1
	37	#define LPFC_FP_EQN_MAX (LPFC_FN_EQN_MAX - LPFC_SP_EQN_DEF)
	38
	39	#define LPFC_FN_WQN_MAX 32
	40	#define LPFC_SP_WQN_DEF 1
	41	#define LPFC_FP_WQN_DEF 4
	42	#define LPFC_FP_WQN_MIN 1
	43	#define LPFC_FP_WQN_MAX (LPFC_FN_WQN_MAX - LPFC_SP_WQN_DEF)
	44
	45	/*
	46	* Provide the default FCF Record attributes used by the driver
	47	* when nonFIP mode is configured and there is no other default
	48	* FCF Record attributes.
	49	*/
	50	#define LPFC_FCOE_FCF_DEF_INDEX 0
	51	#define LPFC_FCOE_FCF_GET_FIRST 0xFFFF
	52	#define LPFC_FCOE_FCF_NEXT_NONE 0xFFFF
	53
dbb6b3ab JS	54	#define LPFC_FCOE_NULL_VID 0xFFF
	55	#define LPFC_FCOE_IGNORE_VID 0xFFFF
	56
da0436e9 JS	57	/* First 3 bytes of default FCF MAC is specified by FC_MAP */
	58	#define LPFC_FCOE_FCF_MAC3 0xFF
	59	#define LPFC_FCOE_FCF_MAC4 0xFF
	60	#define LPFC_FCOE_FCF_MAC5 0xFE
	61	#define LPFC_FCOE_FCF_MAP0 0x0E
	62	#define LPFC_FCOE_FCF_MAP1 0xFC
	63	#define LPFC_FCOE_FCF_MAP2 0x00
98fc5dd9	64	#define LPFC_FCOE_MAX_RCV_SIZE 0x800
da0436e9 JS	65	#define LPFC_FCOE_FKA_ADV_PER 0
	66	#define LPFC_FCOE_FIP_PRIORITY 0x80
	67
6669f9bb JS	68	#define sli4_sid_from_fc_hdr(fc_hdr) \
	69	((fc_hdr)->fh_s_id[0] << 16 \| \
	70	(fc_hdr)->fh_s_id[1] << 8 \| \
	71	(fc_hdr)->fh_s_id[2])
	72
5ffc266e JS	73	#define sli4_fctl_from_fc_hdr(fc_hdr) \
	74	((fc_hdr)->fh_f_ctl[0] << 16 \| \
	75	(fc_hdr)->fh_f_ctl[1] << 8 \| \
	76	(fc_hdr)->fh_f_ctl[2])
	77
da0436e9 JS	78	enum lpfc_sli4_queue_type {
	79	LPFC_EQ,
	80	LPFC_GCQ,
	81	LPFC_MCQ,
	82	LPFC_WCQ,
	83	LPFC_RCQ,
	84	LPFC_MQ,
	85	LPFC_WQ,
	86	LPFC_HRQ,
	87	LPFC_DRQ
	88	};
	89
	90	/* The queue sub-type defines the functional purpose of the queue */
	91	enum lpfc_sli4_queue_subtype {
	92	LPFC_NONE,
	93	LPFC_MBOX,
	94	LPFC_FCP,
	95	LPFC_ELS,
	96	LPFC_USOL
	97	};
	98
	99	union sli4_qe {
	100	void *address;
	101	struct lpfc_eqe *eqe;
	102	struct lpfc_cqe *cqe;
	103	struct lpfc_mcqe *mcqe;
	104	struct lpfc_wcqe_complete *wcqe_complete;
	105	struct lpfc_wcqe_release *wcqe_release;
	106	struct sli4_wcqe_xri_aborted *wcqe_xri_aborted;
	107	struct lpfc_rcqe_complete *rcqe_complete;
	108	struct lpfc_mqe *mqe;
	109	union lpfc_wqe *wqe;
	110	struct lpfc_rqe *rqe;
	111	};
	112
	113	struct lpfc_queue {
	114	struct list_head list;
	115	enum lpfc_sli4_queue_type type;
	116	enum lpfc_sli4_queue_subtype subtype;
	117	struct lpfc_hba *phba;
	118	struct list_head child_list;
	119	uint32_t entry_count; /* Number of entries to support on the queue */
	120	uint32_t entry_size; /* Size of each queue entry. */
	121	uint32_t queue_id; /* Queue ID assigned by the hardware */
	122	struct list_head page_list;
	123	uint32_t page_count; /* Number of pages allocated for this queue */
	124
	125	uint32_t host_index; /* The host's index for putting or getting */
	126	uint32_t hba_index; /* The last known hba index for get or put */
	127	union sli4_qe qe[1]; /* array to index entries (must be last) */
	128	};
	129
da0436e9 JS	130	struct lpfc_sli4_link {
	131	uint8_t speed;
	132	uint8_t duplex;
	133	uint8_t status;
	134	uint8_t physical;
	135	uint8_t fault;
65467b6b	136	uint16_t logical_speed;
da0436e9 JS	137	};
da0436e9 JS	138
ecfd03c6 JS	139	struct lpfc_fcf_rec {
	140	uint8_t fabric_name[8];
	141	uint8_t switch_name[8];
da0436e9 JS	142	uint8_t mac_addr[6];
da0436e9 JS	143	uint16_t fcf_indx;
ecfd03c6 JS	144	uint32_t priority;
	145	uint16_t vlan_id;
	146	uint32_t addr_mode;
	147	uint32_t flag;
	148	#define BOOT_ENABLE 0x01
	149	#define RECORD_VALID 0x02
	150	};
	151
	152	struct lpfc_fcf {
da0436e9 JS	153	uint16_t fcfi;
	154	uint32_t fcf_flag;
	155	#define FCF_AVAILABLE 0x01 /* FCF available for discovery */
	156	#define FCF_REGISTERED 0x02 /* FCF registered with FW */
ecfd03c6 JS	157	#define FCF_SCAN_DONE 0x04 /* FCF table scan done */
ecfd03c6 JS	158	#define FCF_IN_USE 0x08 /* Atleast one discovery completed */
0c9ab6f5 JS	159	#define FCF_INIT_DISC 0x10 /* Initial FCF discovery */
	160	#define FCF_DEAD_DISC 0x20 /* FCF DEAD fast FCF failover discovery */
	161	#define FCF_ACVL_DISC 0x40 /* All CVL fast FCF failover discovery */
	162	#define FCF_DISCOVERY (FCF_INIT_DISC \| FCF_DEAD_DISC \| FCF_ACVL_DISC)
	163	#define FCF_REDISC_PEND 0x80 /* FCF rediscovery pending */
	164	#define FCF_REDISC_EVT 0x100 /* FCF rediscovery event to worker thread */
	165	#define FCF_REDISC_FOV 0x200 /* Post FCF rediscovery fast failover */
3804dc84	166	#define FCF_REDISC_RRU 0x400 /* Roundrobin bitmap updated */
da0436e9	167	uint32_t addr_mode;
0c9ab6f5	168	uint16_t fcf_rr_init_indx;
999d813f	169	uint32_t eligible_fcf_cnt;
ecfd03c6 JS	170	struct lpfc_fcf_rec current_rec;
	171	struct lpfc_fcf_rec failover_rec;
	172	struct timer_list redisc_wait;
0c9ab6f5	173	unsigned long fcf_rr_bmask; / Eligible FCF indexes for RR failover */
da0436e9 JS	174	};
da0436e9 JS	175
0c9ab6f5 JS	176	/*
	177	* Maximum FCF table index, it is for driver internal book keeping, it
	178	* just needs to be no less than the supported HBA's FCF table size.
	179	*/
	180	#define LPFC_SLI4_FCF_TBL_INDX_MAX 32
	181
da0436e9 JS	182	#define LPFC_REGION23_SIGNATURE "RG23"
	183	#define LPFC_REGION23_VERSION 1
	184	#define LPFC_REGION23_LAST_REC 0xff
a0c87cbd JS	185	#define DRIVER_SPECIFIC_TYPE 0xA2
	186	#define LINUX_DRIVER_ID 0x20
	187	#define PORT_STE_TYPE 0x1
	188
da0436e9 JS	189	struct lpfc_fip_param_hdr {
	190	uint8_t type;
	191	#define FCOE_PARAM_TYPE 0xA0
	192	uint8_t length;
	193	#define FCOE_PARAM_LENGTH 2
	194	uint8_t parm_version;
	195	#define FIPP_VERSION 0x01
	196	uint8_t parm_flags;
	197	#define lpfc_fip_param_hdr_fipp_mode_SHIFT 6
	198	#define lpfc_fip_param_hdr_fipp_mode_MASK 0x3
	199	#define lpfc_fip_param_hdr_fipp_mode_WORD parm_flags
6a9c52cf	200	#define FIPP_MODE_ON 0x1
da0436e9 JS	201	#define FIPP_MODE_OFF 0x0
	202	#define FIPP_VLAN_VALID 0x1
	203	};
	204
	205	struct lpfc_fcoe_params {
	206	uint8_t fc_map[3];
	207	uint8_t reserved1;
	208	uint16_t vlan_tag;
	209	uint8_t reserved[2];
	210	};
	211
	212	struct lpfc_fcf_conn_hdr {
	213	uint8_t type;
	214	#define FCOE_CONN_TBL_TYPE 0xA1
	215	uint8_t length; /* words */
	216	uint8_t reserved[2];
	217	};
	218
	219	struct lpfc_fcf_conn_rec {
	220	uint16_t flags;
	221	#define FCFCNCT_VALID 0x0001
	222	#define FCFCNCT_BOOT 0x0002
	223	#define FCFCNCT_PRIMARY 0x0004 /* if not set, Secondary */
	224	#define FCFCNCT_FBNM_VALID 0x0008
	225	#define FCFCNCT_SWNM_VALID 0x0010
	226	#define FCFCNCT_VLAN_VALID 0x0020
	227	#define FCFCNCT_AM_VALID 0x0040
	228	#define FCFCNCT_AM_PREFERRED 0x0080 /* if not set, AM Required */
	229	#define FCFCNCT_AM_SPMA 0x0100 /* if not set, FPMA */
	230
	231	uint16_t vlan_tag;
	232	uint8_t fabric_name[8];
	233	uint8_t switch_name[8];
	234	};
	235
	236	struct lpfc_fcf_conn_entry {
	237	struct list_head list;
	238	struct lpfc_fcf_conn_rec conn_rec;
	239	};
	240
	241	/*
	242	* Define the host's bootstrap mailbox. This structure contains
	243	* the member attributes needed to create, use, and destroy the
	244	* bootstrap mailbox region.
	245	*
	246	* The macro definitions for the bmbx data structure are defined
	247	* in lpfc_hw4.h with the register definition.
	248	*/
	249	struct lpfc_bmbx {
	250	struct lpfc_dmabuf *dmabuf;
	251	struct dma_address dma_address;
	252	void *avirt;
	253	dma_addr_t aphys;
	254	uint32_t bmbx_size;
	255	};
	256
	257	#define LPFC_EQE_SIZE LPFC_EQE_SIZE_4
	258
	259	#define LPFC_EQE_SIZE_4B 4
	260	#define LPFC_EQE_SIZE_16B 16
	261	#define LPFC_CQE_SIZE 16
	262	#define LPFC_WQE_SIZE 64
	263	#define LPFC_MQE_SIZE 256
	264	#define LPFC_RQE_SIZE 8
265
266	#define LPFC_EQE_DEF_COUNT 1024
267	#define LPFC_CQE_DEF_COUNT 256
f1126688	268	#define LPFC_WQE_DEF_COUNT 256
da0436e9 JS	269	#define LPFC_MQE_DEF_COUNT 16
	270	#define LPFC_RQE_DEF_COUNT 512
	271
	272	#define LPFC_QUEUE_NOARM false
	273	#define LPFC_QUEUE_REARM true
	274
	275
	276	/*
	277	* SLI4 CT field defines
	278	*/
	279	#define SLI4_CT_RPI 0
	280	#define SLI4_CT_VPI 1
	281	#define SLI4_CT_VFI 2
	282	#define SLI4_CT_FCFI 3
	283
28baac74 JS	284	#define LPFC_SLI4_FL1_MAX_SEGMENT_SIZE 0x10000
	285	#define LPFC_SLI4_FL1_MAX_BUF_SIZE 0X2000
	286	#define LPFC_SLI4_MIN_BUF_SIZE 0x400
	287	#define LPFC_SLI4_MAX_BUF_SIZE 0x20000
da0436e9 JS	288
	289	/*
	290	* SLI4 specific data structures
	291	*/
	292	struct lpfc_max_cfg_param {
	293	uint16_t max_xri;
	294	uint16_t xri_base;
	295	uint16_t xri_used;
	296	uint16_t max_rpi;
	297	uint16_t rpi_base;
	298	uint16_t rpi_used;
	299	uint16_t max_vpi;
	300	uint16_t vpi_base;
	301	uint16_t vpi_used;
	302	uint16_t max_vfi;
	303	uint16_t vfi_base;
	304	uint16_t vfi_used;
	305	uint16_t max_fcfi;
	306	uint16_t fcfi_base;
	307	uint16_t fcfi_used;
	308	uint16_t max_eq;
	309	uint16_t max_rq;
	310	uint16_t max_cq;
	311	uint16_t max_wq;
	312	};
	313
	314	struct lpfc_hba;
	315	/* SLI4 HBA multi-fcp queue handler struct */
	316	struct lpfc_fcp_eq_hdl {
	317	uint32_t idx;
	318	struct lpfc_hba *phba;
	319	};
	320
28baac74 JS	321	/* Port Capabilities for SLI4 Parameters */
	322	struct lpfc_pc_sli4_params {
	323	uint32_t supported;
	324	uint32_t if_type;
	325	uint32_t sli_rev;
	326	uint32_t sli_family;
	327	uint32_t featurelevel_1;
	328	uint32_t featurelevel_2;
	329	uint32_t proto_types;
	330	#define LPFC_SLI4_PROTO_FCOE 0x0000001
	331	#define LPFC_SLI4_PROTO_FC 0x0000002
	332	#define LPFC_SLI4_PROTO_NIC 0x0000004
	333	#define LPFC_SLI4_PROTO_ISCSI 0x0000008
	334	#define LPFC_SLI4_PROTO_RDMA 0x0000010
	335	uint32_t sge_supp_len;
	336	uint32_t if_page_sz;
	337	uint32_t rq_db_window;
	338	uint32_t loopbk_scope;
	339	uint32_t eq_pages_max;
	340	uint32_t eqe_size;
	341	uint32_t cq_pages_max;
	342	uint32_t cqe_size;
	343	uint32_t mq_pages_max;
	344	uint32_t mqe_size;
	345	uint32_t mq_elem_cnt;
	346	uint32_t wq_pages_max;
	347	uint32_t wqe_size;
	348	uint32_t rq_pages_max;
	349	uint32_t rqe_size;
	350	uint32_t hdr_pages_max;
	351	uint32_t hdr_size;
	352	uint32_t hdr_pp_align;
	353	uint32_t sgl_pages_max;
	354	uint32_t sgl_pp_align;
	355	};
	356
da0436e9 JS	357	/* SLI4 HBA data structure entries */
	358	struct lpfc_sli4_hba {
	359	void __iomem conf_regs_memmap_p; / Kernel memory mapped address for
	360	PCI BAR0, config space registers */
	361	void __iomem ctrl_regs_memmap_p; / Kernel memory mapped address for
	362	PCI BAR1, control registers */
	363	void __iomem drbl_regs_memmap_p; / Kernel memory mapped address for
	364	PCI BAR2, doorbell registers */
	365	/* BAR0 PCI config space register memory map */
	366	void __iomem UERRLOregaddr; / Address to UERR_STATUS_LO register */
	367	void __iomem UERRHIregaddr; / Address to UERR_STATUS_HI register */
a747c9ce JS	368	void __iomem UEMASKLOregaddr; / Address to UE_MASK_LO register */
a747c9ce JS	369	void __iomem UEMASKHIregaddr; / Address to UE_MASK_HI register */
28baac74	370	void __iomem SLIINTFregaddr; / Address to SLI_INTF register */
da0436e9 JS	371	/* BAR1 FCoE function CSR register memory map */
	372	void __iomem STAregaddr; / Address to HST_STATE register */
	373	void __iomem ISRregaddr; / Address to HST_ISR register */
	374	void __iomem IMRregaddr; / Address to HST_IMR register */
	375	void __iomem ISCRregaddr; / Address to HST_ISCR register */
	376	/* BAR2 VF-0 doorbell register memory map */
	377	void __iomem RQDBregaddr; / Address to RQ_DOORBELL register */
	378	void __iomem WQDBregaddr; / Address to WQ_DOORBELL register */
	379	void __iomem EQCQDBregaddr; / Address to EQCQ_DOORBELL register */
	380	void __iomem MQDBregaddr; / Address to MQ_DOORBELL register */
	381	void __iomem BMBXregaddr; / Address to BootStrap MBX register */
	382
a747c9ce JS	383	uint32_t ue_mask_lo;
a747c9ce JS	384	uint32_t ue_mask_hi;
28baac74 JS	385	struct lpfc_register sli_intf;
28baac74 JS	386	struct lpfc_pc_sli4_params pc_sli4_params;
da0436e9 JS	387	struct msix_entry *msix_entries;
da0436e9 JS	388	uint32_t cfg_eqn;
75baf696	389	uint32_t msix_vec_nr;
da0436e9 JS	390	struct lpfc_fcp_eq_hdl fcp_eq_hdl; / FCP per-WQ handle */
	391	/* Pointers to the constructed SLI4 queues */
	392	struct lpfc_queue *fp_eq; / Fast-path event queue */
	393	struct lpfc_queue sp_eq; / Slow-path event queue */
	394	struct lpfc_queue *fcp_wq;/ Fast-path FCP work queue */
	395	struct lpfc_queue mbx_wq; / Slow-path MBOX work queue */
	396	struct lpfc_queue els_wq; / Slow-path ELS work queue */
	397	struct lpfc_queue hdr_rq; / Slow-path Header Receive queue */
	398	struct lpfc_queue dat_rq; / Slow-path Data Receive queue */
	399	struct lpfc_queue *fcp_cq;/ Fast-path FCP compl queue */
	400	struct lpfc_queue mbx_cq; / Slow-path mailbox complete queue */
	401	struct lpfc_queue els_cq; / Slow-path ELS response complete queue */
da0436e9 JS	402
	403	/* Setup information for various queue parameters */
	404	int eq_esize;
	405	int eq_ecount;
	406	int cq_esize;
	407	int cq_ecount;
	408	int wq_esize;
	409	int wq_ecount;
	410	int mq_esize;
	411	int mq_ecount;
	412	int rq_esize;
	413	int rq_ecount;
	414	#define LPFC_SP_EQ_MAX_INTR_SEC 10000
	415	#define LPFC_FP_EQ_MAX_INTR_SEC 10000
	416
	417	uint32_t intr_enable;
	418	struct lpfc_bmbx bmbx;
	419	struct lpfc_max_cfg_param max_cfg_param;
	420	uint16_t next_xri; /* last_xri - max_cfg_param.xri_base = used */
	421	uint16_t next_rpi;
	422	uint16_t scsi_xri_max;
	423	uint16_t scsi_xri_cnt;
	424	struct list_head lpfc_free_sgl_list;
	425	struct list_head lpfc_sgl_list;
	426	struct lpfc_sglq **lpfc_els_sgl_array;
	427	struct list_head lpfc_abts_els_sgl_list;
	428	struct lpfc_scsi_buf **lpfc_scsi_psb_array;
	429	struct list_head lpfc_abts_scsi_buf_list;
	430	uint32_t total_sglq_bufs;
	431	struct lpfc_sglq **lpfc_sglq_active_list;
	432	struct list_head lpfc_rpi_hdr_list;
	433	unsigned long *rpi_bmask;
	434	uint16_t rpi_count;
	435	struct lpfc_sli4_flags sli4_flags;
45ed1190	436	struct list_head sp_queue_event;
da0436e9 JS	437	struct list_head sp_cqe_event_pool;
	438	struct list_head sp_asynce_work_queue;
	439	struct list_head sp_fcp_xri_aborted_work_queue;
	440	struct list_head sp_els_xri_aborted_work_queue;
	441	struct list_head sp_unsol_work_queue;
	442	struct lpfc_sli4_link link_state;
	443	spinlock_t abts_scsi_buf_list_lock; /* list of aborted SCSI IOs */
	444	spinlock_t abts_sgl_list_lock; /* list of aborted els IOs */
	445	};
	446
	447	enum lpfc_sge_type {
	448	GEN_BUFF_TYPE,
	449	SCSI_BUFF_TYPE
	450	};
	451
0f65ff68 JS	452	enum lpfc_sgl_state {
	453	SGL_FREED,
	454	SGL_ALLOCATED,
	455	SGL_XRI_ABORTED
	456	};
	457
da0436e9 JS	458	struct lpfc_sglq {
	459	/* lpfc_sglqs are used in double linked lists */
	460	struct list_head list;
	461	struct list_head clist;
	462	enum lpfc_sge_type buff_type; /* is this a scsi sgl */
0f65ff68	463	enum lpfc_sgl_state state;
da0436e9 JS	464	uint16_t iotag; /* pre-assigned IO tag */
	465	uint16_t sli4_xritag; /* pre-assigned XRI, (OXID) tag. */
	466	struct sli4_sge sgl; / pre-assigned SGL */
	467	void virt; / virtual address. */
	468	dma_addr_t phys; /* physical address */
	469	};
	470
	471	struct lpfc_rpi_hdr {
	472	struct list_head list;
	473	uint32_t len;
	474	struct lpfc_dmabuf *dmabuf;
	475	uint32_t page_count;
	476	uint32_t start_rpi;
	477	};
	478
	479	/*
	480	* SLI4 specific function prototypes
	481	*/
	482	int lpfc_pci_function_reset(struct lpfc_hba *);
	483	int lpfc_sli4_hba_setup(struct lpfc_hba *);
da0436e9 JS	484	int lpfc_sli4_config(struct lpfc_hba , struct lpfcMboxq , uint8_t,
	485	uint8_t, uint32_t, bool);
	486	void lpfc_sli4_mbox_cmd_free(struct lpfc_hba , struct lpfcMboxq );
	487	void lpfc_sli4_mbx_sge_set(struct lpfcMboxq *, uint32_t, dma_addr_t, uint32_t);
	488	void lpfc_sli4_mbx_sge_get(struct lpfcMboxq *, uint32_t,
	489	struct lpfc_mbx_sge *);
0c9ab6f5 JS	490	int lpfc_sli4_mbx_read_fcf_rec(struct lpfc_hba , struct lpfcMboxq ,
0c9ab6f5 JS	491	uint16_t);
da0436e9 JS	492
	493	void lpfc_sli4_hba_reset(struct lpfc_hba *);
	494	struct lpfc_queue lpfc_sli4_queue_alloc(struct lpfc_hba , uint32_t,
	495	uint32_t);
	496	void lpfc_sli4_queue_free(struct lpfc_queue *);
	497	uint32_t lpfc_eq_create(struct lpfc_hba , struct lpfc_queue , uint16_t);
	498	uint32_t lpfc_cq_create(struct lpfc_hba , struct lpfc_queue ,
	499	struct lpfc_queue *, uint32_t, uint32_t);
b19a061a JS	500	int32_t lpfc_mq_create(struct lpfc_hba , struct lpfc_queue ,
b19a061a JS	501	struct lpfc_queue *, uint32_t);
da0436e9 JS	502	uint32_t lpfc_wq_create(struct lpfc_hba , struct lpfc_queue ,
	503	struct lpfc_queue *, uint32_t);
	504	uint32_t lpfc_rq_create(struct lpfc_hba , struct lpfc_queue ,
	505	struct lpfc_queue , struct lpfc_queue , uint32_t);
	506	uint32_t lpfc_eq_destroy(struct lpfc_hba , struct lpfc_queue );
	507	uint32_t lpfc_cq_destroy(struct lpfc_hba , struct lpfc_queue );
	508	uint32_t lpfc_mq_destroy(struct lpfc_hba , struct lpfc_queue );
	509	uint32_t lpfc_wq_destroy(struct lpfc_hba , struct lpfc_queue );
	510	uint32_t lpfc_rq_destroy(struct lpfc_hba , struct lpfc_queue ,
	511	struct lpfc_queue *);
	512	int lpfc_sli4_queue_setup(struct lpfc_hba *);
	513	void lpfc_sli4_queue_unset(struct lpfc_hba *);
	514	int lpfc_sli4_post_sgl(struct lpfc_hba *, dma_addr_t, dma_addr_t, uint16_t);
	515	int lpfc_sli4_repost_scsi_sgl_list(struct lpfc_hba *);
da0436e9 JS	516	uint16_t lpfc_sli4_next_xritag(struct lpfc_hba *);
	517	int lpfc_sli4_post_async_mbox(struct lpfc_hba *);
	518	int lpfc_sli4_post_sgl_list(struct lpfc_hba *phba);
	519	int lpfc_sli4_post_scsi_sgl_block(struct lpfc_hba , struct list_head , int);
	520	struct lpfc_cq_event __lpfc_sli4_cq_event_alloc(struct lpfc_hba );
	521	struct lpfc_cq_event lpfc_sli4_cq_event_alloc(struct lpfc_hba );
	522	void __lpfc_sli4_cq_event_release(struct lpfc_hba , struct lpfc_cq_event );
	523	void lpfc_sli4_cq_event_release(struct lpfc_hba , struct lpfc_cq_event );
	524	int lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *);
	525	int lpfc_sli4_post_rpi_hdr(struct lpfc_hba , struct lpfc_rpi_hdr );
	526	int lpfc_sli4_post_all_rpi_hdrs(struct lpfc_hba *);
	527	struct lpfc_rpi_hdr lpfc_sli4_create_rpi_hdr(struct lpfc_hba );
	528	void lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *);
	529	int lpfc_sli4_alloc_rpi(struct lpfc_hba *);
d7c47992	530	void __lpfc_sli4_free_rpi(struct lpfc_hba *, int);
da0436e9 JS	531	void lpfc_sli4_free_rpi(struct lpfc_hba *, int);
	532	void lpfc_sli4_remove_rpis(struct lpfc_hba *);
	533	void lpfc_sli4_async_event_proc(struct lpfc_hba *);
ecfd03c6	534	void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *);
da0436e9 JS	535	int lpfc_sli4_resume_rpi(struct lpfc_nodelist *);
	536	void lpfc_sli4_fcp_xri_abort_event_proc(struct lpfc_hba *);
	537	void lpfc_sli4_els_xri_abort_event_proc(struct lpfc_hba *);
	538	void lpfc_sli4_fcp_xri_aborted(struct lpfc_hba *,
	539	struct sli4_wcqe_xri_aborted *);
	540	void lpfc_sli4_els_xri_aborted(struct lpfc_hba *,
	541	struct sli4_wcqe_xri_aborted *);
	542	int lpfc_sli4_brdreset(struct lpfc_hba *);
	543	int lpfc_sli4_add_fcf_record(struct lpfc_hba , struct fcf_record );
	544	void lpfc_sli_remove_dflt_fcf(struct lpfc_hba *);
	545	int lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *);
	546	int lpfc_sli4_init_vpi(struct lpfc_hba *, uint16_t);
	547	uint32_t lpfc_sli4_cq_release(struct lpfc_queue *, bool);
	548	uint32_t lpfc_sli4_eq_release(struct lpfc_queue *, bool);
	549	void lpfc_sli4_fcfi_unreg(struct lpfc_hba *, uint16_t);
0c9ab6f5 JS	550	int lpfc_sli4_fcf_scan_read_fcf_rec(struct lpfc_hba *, uint16_t);
	551	int lpfc_sli4_fcf_rr_read_fcf_rec(struct lpfc_hba *, uint16_t);
	552	int lpfc_sli4_read_fcf_rec(struct lpfc_hba *, uint16_t);
	553	void lpfc_mbx_cmpl_fcf_scan_read_fcf_rec(struct lpfc_hba , LPFC_MBOXQ_t );
	554	void lpfc_mbx_cmpl_fcf_rr_read_fcf_rec(struct lpfc_hba , LPFC_MBOXQ_t );
	555	void lpfc_mbx_cmpl_read_fcf_rec(struct lpfc_hba , LPFC_MBOXQ_t );
	556	int lpfc_sli4_unregister_fcf(struct lpfc_hba *);
da0436e9 JS	557	int lpfc_sli4_post_status_check(struct lpfc_hba *);
	558	uint8_t lpfc_sli4_mbox_opcode_get(struct lpfc_hba , struct lpfcMboxq );
	559