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[SCSI] lpfc 8.2.5 : Miscellaneous discovery Fixes
[net-next-2.6.git] / drivers / scsi / lpfc / lpfc_sli.c
CommitLineData
dea3101e
JB		 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173 3 * Fibre Channel Host Bus Adapters. *
1b32f6aa 4 * Copyright (C) 2004-2008 Emulex. All rights reserved. *
c44ce173 5 * EMULEX and SLI are trademarks of Emulex. *
dea3101e 6 * www.emulex.com *
c44ce173 7 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea3101e
JB		 8 * *
9 * This program is free software; you can redistribute it and/or *
c44ce173
JSEC		 10 * modify it under the terms of version 2 of the GNU General *
11 * Public License as published by the Free Software Foundation. *
12 * This program is distributed in the hope that it will be useful. *
13 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
14 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
15 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
16 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
17 * TO BE LEGALLY INVALID. See the GNU General Public License for *
18 * more details, a copy of which can be found in the file COPYING *
19 * included with this package. *
dea3101e
JB		 20 *******************************************************************/
21
dea3101e
JB		 22#include <linux/blkdev.h>
23#include <linux/pci.h>
24#include <linux/interrupt.h>
25#include <linux/delay.h>
26
91886523 27#include <scsi/scsi.h>
dea3101e
JB		 28#include <scsi/scsi_cmnd.h>
29#include <scsi/scsi_device.h>
30#include <scsi/scsi_host.h>
f888ba3c 31#include <scsi/scsi_transport_fc.h>
dea3101e
JB		 32
33#include "lpfc_hw.h"
34#include "lpfc_sli.h"
35#include "lpfc_disc.h"
36#include "lpfc_scsi.h"
37#include "lpfc.h"
38#include "lpfc_crtn.h"
39#include "lpfc_logmsg.h"
40#include "lpfc_compat.h"
858c9f6c 41#include "lpfc_debugfs.h"
dea3101e
JB		 42
43/*
44 * Define macro to log: Mailbox command x%x cannot issue Data
45 * This allows multiple uses of lpfc_msgBlk0311
46 * w/o perturbing log msg utility.
47 */
92d7f7b0 48#define LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag) \
dea3101e
JB		 49 lpfc_printf_log(phba, \
50 KERN_INFO, \
51 LOG_MBOX | LOG_SLI, \
e8b62011 52 "(%d):0311 Mailbox command x%x cannot " \
92d7f7b0 53 "issue Data: x%x x%x x%x\n", \
92d7f7b0
JS		 54 pmbox->vport ? pmbox->vport->vpi : 0, \
55 pmbox->mb.mbxCommand, \
2e0fef85 56 phba->pport->port_state, \
dea3101e 57 psli->sli_flag, \
2e0fef85 58 flag)
dea3101e
JB		 59
60
61/* There are only four IOCB completion types. */
62typedef enum _lpfc_iocb_type {
63 LPFC_UNKNOWN_IOCB,
64 LPFC_UNSOL_IOCB,
65 LPFC_SOL_IOCB,
66 LPFC_ABORT_IOCB
67} lpfc_iocb_type;
68
92d7f7b0
JS		 69 /* SLI-2/SLI-3 provide different sized iocbs. Given a pointer
70 * to the start of the ring, and the slot number of the
71 * desired iocb entry, calc a pointer to that entry.
72 */
ed957684
JS		 73static inline IOCB_t *
74lpfc_cmd_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
75{
76 return (IOCB_t *) (((char *) pring->cmdringaddr) +
77 pring->cmdidx * phba->iocb_cmd_size);
78}
79
80static inline IOCB_t *
81lpfc_resp_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
82{
83 return (IOCB_t *) (((char *) pring->rspringaddr) +
84 pring->rspidx * phba->iocb_rsp_size);
85}
86
2e0fef85
JS		 87static struct lpfc_iocbq *
88__lpfc_sli_get_iocbq(struct lpfc_hba *phba)
0bd4ca25
JSEC		 89{
90 struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
91 struct lpfc_iocbq * iocbq = NULL;
92
93 list_remove_head(lpfc_iocb_list, iocbq, struct lpfc_iocbq, list);
94 return iocbq;
95}
96
2e0fef85
JS		 97struct lpfc_iocbq *
98lpfc_sli_get_iocbq(struct lpfc_hba *phba)
99{
100 struct lpfc_iocbq * iocbq = NULL;
101 unsigned long iflags;
102
103 spin_lock_irqsave(&phba->hbalock, iflags);
104 iocbq = __lpfc_sli_get_iocbq(phba);
105 spin_unlock_irqrestore(&phba->hbalock, iflags);
106 return iocbq;
107}
108
a6ababd2 109static void
2e0fef85 110__lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
604a3e30 111{
2e0fef85 112 size_t start_clean = offsetof(struct lpfc_iocbq, iocb);
604a3e30
JB		 113
114 /*
115 * Clean all volatile data fields, preserve iotag and node struct.
116 */
117 memset((char*)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
118 list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
119}
120
2e0fef85
JS		 121void
122lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
123{
124 unsigned long iflags;
125
126 /*
127 * Clean all volatile data fields, preserve iotag and node struct.
128 */
129 spin_lock_irqsave(&phba->hbalock, iflags);
130 __lpfc_sli_release_iocbq(phba, iocbq);
131 spin_unlock_irqrestore(&phba->hbalock, iflags);
132}
133
dea3101e
JB		 134/*
135 * Translate the iocb command to an iocb command type used to decide the final
136 * disposition of each completed IOCB.
137 */
138static lpfc_iocb_type
139lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
140{
141 lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
142
143 if (iocb_cmnd > CMD_MAX_IOCB_CMD)
144 return 0;
145
146 switch (iocb_cmnd) {
147 case CMD_XMIT_SEQUENCE_CR:
148 case CMD_XMIT_SEQUENCE_CX:
149 case CMD_XMIT_BCAST_CN:
150 case CMD_XMIT_BCAST_CX:
151 case CMD_ELS_REQUEST_CR:
152 case CMD_ELS_REQUEST_CX:
153 case CMD_CREATE_XRI_CR:
154 case CMD_CREATE_XRI_CX:
155 case CMD_GET_RPI_CN:
156 case CMD_XMIT_ELS_RSP_CX:
157 case CMD_GET_RPI_CR:
158 case CMD_FCP_IWRITE_CR:
159 case CMD_FCP_IWRITE_CX:
160 case CMD_FCP_IREAD_CR:
161 case CMD_FCP_IREAD_CX:
162 case CMD_FCP_ICMND_CR:
163 case CMD_FCP_ICMND_CX:
f5603511
JS		 164 case CMD_FCP_TSEND_CX:
165 case CMD_FCP_TRSP_CX:
166 case CMD_FCP_TRECEIVE_CX:
167 case CMD_FCP_AUTO_TRSP_CX:
dea3101e
JB		 168 case CMD_ADAPTER_MSG:
169 case CMD_ADAPTER_DUMP:
170 case CMD_XMIT_SEQUENCE64_CR:
171 case CMD_XMIT_SEQUENCE64_CX:
172 case CMD_XMIT_BCAST64_CN:
173 case CMD_XMIT_BCAST64_CX:
174 case CMD_ELS_REQUEST64_CR:
175 case CMD_ELS_REQUEST64_CX:
176 case CMD_FCP_IWRITE64_CR:
177 case CMD_FCP_IWRITE64_CX:
178 case CMD_FCP_IREAD64_CR:
179 case CMD_FCP_IREAD64_CX:
180 case CMD_FCP_ICMND64_CR:
181 case CMD_FCP_ICMND64_CX:
f5603511
JS		 182 case CMD_FCP_TSEND64_CX:
183 case CMD_FCP_TRSP64_CX:
184 case CMD_FCP_TRECEIVE64_CX:
dea3101e
JB		 185 case CMD_GEN_REQUEST64_CR:
186 case CMD_GEN_REQUEST64_CX:
187 case CMD_XMIT_ELS_RSP64_CX:
188 type = LPFC_SOL_IOCB;
189 break;
190 case CMD_ABORT_XRI_CN:
191 case CMD_ABORT_XRI_CX:
192 case CMD_CLOSE_XRI_CN:
193 case CMD_CLOSE_XRI_CX:
194 case CMD_XRI_ABORTED_CX:
195 case CMD_ABORT_MXRI64_CN:
196 type = LPFC_ABORT_IOCB;
197 break;
198 case CMD_RCV_SEQUENCE_CX:
199 case CMD_RCV_ELS_REQ_CX:
200 case CMD_RCV_SEQUENCE64_CX:
201 case CMD_RCV_ELS_REQ64_CX:
57127f15 202 case CMD_ASYNC_STATUS:
ed957684
JS		 203 case CMD_IOCB_RCV_SEQ64_CX:
204 case CMD_IOCB_RCV_ELS64_CX:
205 case CMD_IOCB_RCV_CONT64_CX:
dea3101e
JB		 206 type = LPFC_UNSOL_IOCB;
207 break;
208 default:
209 type = LPFC_UNKNOWN_IOCB;
210 break;
211 }
212
213 return type;
214}
215
216static int
ed957684 217lpfc_sli_ring_map(struct lpfc_hba *phba)
dea3101e
JB		 218{
219 struct lpfc_sli *psli = &phba->sli;
ed957684
JS		 220 LPFC_MBOXQ_t *pmb;
221 MAILBOX_t *pmbox;
222 int i, rc, ret = 0;
dea3101e 223
ed957684
JS		 224 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
225 if (!pmb)
226 return -ENOMEM;
227 pmbox = &pmb->mb;
228 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e 229 for (i = 0; i < psli->num_rings; i++) {
dea3101e
JB		 230 lpfc_config_ring(phba, i, pmb);
231 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
232 if (rc != MBX_SUCCESS) {
92d7f7b0 233 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 234 "0446 Adapter failed to init (%d), "
dea3101e
JB		 235 "mbxCmd x%x CFG_RING, mbxStatus x%x, "
236 "ring %d\n",
e8b62011
JS		 237 rc, pmbox->mbxCommand,
238 pmbox->mbxStatus, i);
2e0fef85 239 phba->link_state = LPFC_HBA_ERROR;
ed957684
JS		 240 ret = -ENXIO;
241 break;
dea3101e
JB		 242 }
243 }
ed957684
JS		 244 mempool_free(pmb, phba->mbox_mem_pool);
245 return ret;
dea3101e
JB		 246}
247
248static int
2e0fef85
JS		 249lpfc_sli_ringtxcmpl_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
250 struct lpfc_iocbq *piocb)
dea3101e 251{
dea3101e
JB		 252 list_add_tail(&piocb->list, &pring->txcmplq);
253 pring->txcmplq_cnt++;
92d7f7b0
JS		 254 if ((unlikely(pring->ringno == LPFC_ELS_RING)) &&
255 (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
256 (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
257 if (!piocb->vport)
258 BUG();
259 else
260 mod_timer(&piocb->vport->els_tmofunc,
261 jiffies + HZ * (phba->fc_ratov << 1));
262 }
263
dea3101e 264
2e0fef85 265 return 0;
dea3101e
JB		 266}
267
268static struct lpfc_iocbq *
2e0fef85 269lpfc_sli_ringtx_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e 270{
dea3101e
JB		 271 struct lpfc_iocbq *cmd_iocb;
272
858c9f6c
JS		 273 list_remove_head((&pring->txq), cmd_iocb, struct lpfc_iocbq, list);
274 if (cmd_iocb != NULL)
dea3101e 275 pring->txq_cnt--;
2e0fef85 276 return cmd_iocb;
dea3101e
JB		 277}
278
279static IOCB_t *
280lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
281{
ed957684
JS		 282 struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
283 &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
284 &phba->slim2p->mbx.us.s2.port[pring->ringno];
dea3101e 285 uint32_t max_cmd_idx = pring->numCiocb;
dea3101e
JB		 286
287 if ((pring->next_cmdidx == pring->cmdidx) &&
288 (++pring->next_cmdidx >= max_cmd_idx))
289 pring->next_cmdidx = 0;
290
291 if (unlikely(pring->local_getidx == pring->next_cmdidx)) {
292
293 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
294
295 if (unlikely(pring->local_getidx >= max_cmd_idx)) {
296 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 297 "0315 Ring %d issue: portCmdGet %d "
dea3101e 298 "is bigger then cmd ring %d\n",
e8b62011 299 pring->ringno,
dea3101e
JB		 300 pring->local_getidx, max_cmd_idx);
301
2e0fef85 302 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB		 303 /*
304 * All error attention handlers are posted to
305 * worker thread
306 */
307 phba->work_ha |= HA_ERATT;
308 phba->work_hs = HS_FFER3;
92d7f7b0
JS		 309
310 /* hbalock should already be held */
dea3101e 311 if (phba->work_wait)
92d7f7b0 312 lpfc_worker_wake_up(phba);
dea3101e
JB		 313
314 return NULL;
315 }
316
317 if (pring->local_getidx == pring->next_cmdidx)
318 return NULL;
319 }
320
ed957684 321 return lpfc_cmd_iocb(phba, pring);
dea3101e
JB		 322}
323
604a3e30 324uint16_t
2e0fef85 325lpfc_sli_next_iotag(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
dea3101e 326{
2e0fef85
JS		 327 struct lpfc_iocbq **new_arr;
328 struct lpfc_iocbq **old_arr;
604a3e30
JB		 329 size_t new_len;
330 struct lpfc_sli *psli = &phba->sli;
331 uint16_t iotag;
dea3101e 332
2e0fef85 333 spin_lock_irq(&phba->hbalock);
604a3e30
JB		 334 iotag = psli->last_iotag;
335 if(++iotag < psli->iocbq_lookup_len) {
336 psli->last_iotag = iotag;
337 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 338 spin_unlock_irq(&phba->hbalock);
604a3e30
JB		 339 iocbq->iotag = iotag;
340 return iotag;
2e0fef85 341 } else if (psli->iocbq_lookup_len < (0xffff
604a3e30
JB		 342 - LPFC_IOCBQ_LOOKUP_INCREMENT)) {
343 new_len = psli->iocbq_lookup_len + LPFC_IOCBQ_LOOKUP_INCREMENT;
2e0fef85
JS		 344 spin_unlock_irq(&phba->hbalock);
345 new_arr = kzalloc(new_len * sizeof (struct lpfc_iocbq *),
604a3e30
JB		 346 GFP_KERNEL);
347 if (new_arr) {
2e0fef85 348 spin_lock_irq(&phba->hbalock);
604a3e30
JB		 349 old_arr = psli->iocbq_lookup;
350 if (new_len <= psli->iocbq_lookup_len) {
351 /* highly unprobable case */
352 kfree(new_arr);
353 iotag = psli->last_iotag;
354 if(++iotag < psli->iocbq_lookup_len) {
355 psli->last_iotag = iotag;
356 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 357 spin_unlock_irq(&phba->hbalock);
604a3e30
JB		 358 iocbq->iotag = iotag;
359 return iotag;
360 }
2e0fef85 361 spin_unlock_irq(&phba->hbalock);
604a3e30
JB		 362 return 0;
363 }
364 if (psli->iocbq_lookup)
365 memcpy(new_arr, old_arr,
366 ((psli->last_iotag + 1) *
311464ec 367 sizeof (struct lpfc_iocbq *)));
604a3e30
JB		 368 psli->iocbq_lookup = new_arr;
369 psli->iocbq_lookup_len = new_len;
370 psli->last_iotag = iotag;
371 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 372 spin_unlock_irq(&phba->hbalock);
604a3e30
JB		 373 iocbq->iotag = iotag;
374 kfree(old_arr);
375 return iotag;
376 }
8f6d98d2 377 } else
2e0fef85 378 spin_unlock_irq(&phba->hbalock);
dea3101e 379
604a3e30 380 lpfc_printf_log(phba, KERN_ERR,LOG_SLI,
e8b62011
JS		 381 "0318 Failed to allocate IOTAG.last IOTAG is %d\n",
382 psli->last_iotag);
dea3101e 383
604a3e30 384 return 0;
dea3101e
JB		 385}
386
387static void
388lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
389 IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
390{
391 /*
604a3e30 392 * Set up an iotag
dea3101e 393 */
604a3e30 394 nextiocb->iocb.ulpIoTag = (nextiocb->iocb_cmpl) ? nextiocb->iotag : 0;
dea3101e 395
a58cbd52
JS		 396 if (pring->ringno == LPFC_ELS_RING) {
397 lpfc_debugfs_slow_ring_trc(phba,
398 "IOCB cmd ring: wd4:x%08x wd6:x%08x wd7:x%08x",
399 *(((uint32_t *) &nextiocb->iocb) + 4),
400 *(((uint32_t *) &nextiocb->iocb) + 6),
401 *(((uint32_t *) &nextiocb->iocb) + 7));
402 }
403
dea3101e
JB		 404 /*
405 * Issue iocb command to adapter
406 */
92d7f7b0 407 lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, phba->iocb_cmd_size);
dea3101e
JB		 408 wmb();
409 pring->stats.iocb_cmd++;
410
411 /*
412 * If there is no completion routine to call, we can release the
413 * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
414 * that have no rsp ring completion, iocb_cmpl MUST be NULL.
415 */
416 if (nextiocb->iocb_cmpl)
417 lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
604a3e30 418 else
2e0fef85 419 __lpfc_sli_release_iocbq(phba, nextiocb);
dea3101e
JB		 420
421 /*
422 * Let the HBA know what IOCB slot will be the next one the
423 * driver will put a command into.
424 */
425 pring->cmdidx = pring->next_cmdidx;
ed957684 426 writel(pring->cmdidx, &phba->host_gp[pring->ringno].cmdPutInx);
dea3101e
JB		 427}
428
429static void
2e0fef85 430lpfc_sli_update_full_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e
JB		 431{
432 int ringno = pring->ringno;
433
434 pring->flag |= LPFC_CALL_RING_AVAILABLE;
435
436 wmb();
437
438 /*
439 * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
440 * The HBA will tell us when an IOCB entry is available.
441 */
442 writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
443 readl(phba->CAregaddr); /* flush */
444
445 pring->stats.iocb_cmd_full++;
446}
447
448static void
2e0fef85 449lpfc_sli_update_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e
JB		 450{
451 int ringno = pring->ringno;
452
453 /*
454 * Tell the HBA that there is work to do in this ring.
455 */
456 wmb();
457 writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
458 readl(phba->CAregaddr); /* flush */
459}
460
461static void
2e0fef85 462lpfc_sli_resume_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e
JB		 463{
464 IOCB_t *iocb;
465 struct lpfc_iocbq *nextiocb;
466
467 /*
468 * Check to see if:
469 * (a) there is anything on the txq to send
470 * (b) link is up
471 * (c) link attention events can be processed (fcp ring only)
472 * (d) IOCB processing is not blocked by the outstanding mbox command.
473 */
474 if (pring->txq_cnt &&
2e0fef85 475 lpfc_is_link_up(phba) &&
dea3101e 476 (pring->ringno != phba->sli.fcp_ring ||
0b727fea 477 phba->sli.sli_flag & LPFC_PROCESS_LA)) {
dea3101e
JB		 478
479 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
480 (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
481 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
482
483 if (iocb)
484 lpfc_sli_update_ring(phba, pring);
485 else
486 lpfc_sli_update_full_ring(phba, pring);
487 }
488
489 return;
490}
491
a6ababd2 492static struct lpfc_hbq_entry *
ed957684
JS		 493lpfc_sli_next_hbq_slot(struct lpfc_hba *phba, uint32_t hbqno)
494{
495 struct hbq_s *hbqp = &phba->hbqs[hbqno];
496
497 if (hbqp->next_hbqPutIdx == hbqp->hbqPutIdx &&
498 ++hbqp->next_hbqPutIdx >= hbqp->entry_count)
499 hbqp->next_hbqPutIdx = 0;
500
501 if (unlikely(hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)) {
92d7f7b0 502 uint32_t raw_index = phba->hbq_get[hbqno];
ed957684
JS		 503 uint32_t getidx = le32_to_cpu(raw_index);
504
505 hbqp->local_hbqGetIdx = getidx;
506
507 if (unlikely(hbqp->local_hbqGetIdx >= hbqp->entry_count)) {
508 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 509 LOG_SLI | LOG_VPORT,
e8b62011 510 "1802 HBQ %d: local_hbqGetIdx "
ed957684 511 "%u is > than hbqp->entry_count %u\n",
e8b62011 512 hbqno, hbqp->local_hbqGetIdx,
ed957684
JS		 513 hbqp->entry_count);
514
515 phba->link_state = LPFC_HBA_ERROR;
516 return NULL;
517 }
518
519 if (hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)
520 return NULL;
521 }
522
51ef4c26
JS		 523 return (struct lpfc_hbq_entry *) phba->hbqs[hbqno].hbq_virt +
524 hbqp->hbqPutIdx;
ed957684
JS		 525}
526
527void
528lpfc_sli_hbqbuf_free_all(struct lpfc_hba *phba)
529{
92d7f7b0
JS		 530 struct lpfc_dmabuf *dmabuf, *next_dmabuf;
531 struct hbq_dmabuf *hbq_buf;
51ef4c26 532 int i, hbq_count;
ed957684 533
51ef4c26 534 hbq_count = lpfc_sli_hbq_count();
ed957684 535 /* Return all memory used by all HBQs */
51ef4c26
JS		 536 for (i = 0; i < hbq_count; ++i) {
537 list_for_each_entry_safe(dmabuf, next_dmabuf,
538 &phba->hbqs[i].hbq_buffer_list, list) {
539 hbq_buf = container_of(dmabuf, struct hbq_dmabuf, dbuf);
540 list_del(&hbq_buf->dbuf.list);
541 (phba->hbqs[i].hbq_free_buffer)(phba, hbq_buf);
542 }
a8adb832 543 phba->hbqs[i].buffer_count = 0;
ed957684 544 }
ed957684
JS		 545}
546
51ef4c26 547static struct lpfc_hbq_entry *
ed957684 548lpfc_sli_hbq_to_firmware(struct lpfc_hba *phba, uint32_t hbqno,
92d7f7b0 549 struct hbq_dmabuf *hbq_buf)
ed957684
JS		 550{
551 struct lpfc_hbq_entry *hbqe;
92d7f7b0 552 dma_addr_t physaddr = hbq_buf->dbuf.phys;
ed957684
JS		 553
554 /* Get next HBQ entry slot to use */
555 hbqe = lpfc_sli_next_hbq_slot(phba, hbqno);
556 if (hbqe) {
557 struct hbq_s *hbqp = &phba->hbqs[hbqno];
558
92d7f7b0
JS		 559 hbqe->bde.addrHigh = le32_to_cpu(putPaddrHigh(physaddr));
560 hbqe->bde.addrLow = le32_to_cpu(putPaddrLow(physaddr));
51ef4c26 561 hbqe->bde.tus.f.bdeSize = hbq_buf->size;
ed957684 562 hbqe->bde.tus.f.bdeFlags = 0;
92d7f7b0
JS		 563 hbqe->bde.tus.w = le32_to_cpu(hbqe->bde.tus.w);
564 hbqe->buffer_tag = le32_to_cpu(hbq_buf->tag);
565 /* Sync SLIM */
ed957684
JS		 566 hbqp->hbqPutIdx = hbqp->next_hbqPutIdx;
567 writel(hbqp->hbqPutIdx, phba->hbq_put + hbqno);
92d7f7b0 568 /* flush */
ed957684 569 readl(phba->hbq_put + hbqno);
51ef4c26 570 list_add_tail(&hbq_buf->dbuf.list, &hbqp->hbq_buffer_list);
ed957684 571 }
51ef4c26 572 return hbqe;
ed957684
JS		 573}
574
92d7f7b0
JS		 575static struct lpfc_hbq_init lpfc_els_hbq = {
576 .rn = 1,
577 .entry_count = 200,
578 .mask_count = 0,
579 .profile = 0,
51ef4c26 580 .ring_mask = (1 << LPFC_ELS_RING),
92d7f7b0
JS		 581 .buffer_count = 0,
582 .init_count = 20,
583 .add_count = 5,
584};
ed957684 585
51ef4c26
JS		 586static struct lpfc_hbq_init lpfc_extra_hbq = {
587 .rn = 1,
588 .entry_count = 200,
589 .mask_count = 0,
590 .profile = 0,
591 .ring_mask = (1 << LPFC_EXTRA_RING),
592 .buffer_count = 0,
593 .init_count = 0,
594 .add_count = 5,
595};
596
78b2d852 597struct lpfc_hbq_init *lpfc_hbq_defs[] = {
92d7f7b0 598 &lpfc_els_hbq,
51ef4c26 599 &lpfc_extra_hbq,
92d7f7b0 600};
ed957684 601
311464ec 602static int
92d7f7b0 603lpfc_sli_hbqbuf_fill_hbqs(struct lpfc_hba *phba, uint32_t hbqno, uint32_t count)
ed957684 604{
92d7f7b0
JS		 605 uint32_t i, start, end;
606 struct hbq_dmabuf *hbq_buffer;
ed957684 607
51ef4c26
JS		 608 if (!phba->hbqs[hbqno].hbq_alloc_buffer) {
609 return 0;
610 }
611
a8adb832
JS		 612 start = phba->hbqs[hbqno].buffer_count;
613 end = count + start;
92d7f7b0
JS		 614 if (end > lpfc_hbq_defs[hbqno]->entry_count) {
615 end = lpfc_hbq_defs[hbqno]->entry_count;
616 }
ed957684
JS		 617
618 /* Populate HBQ entries */
92d7f7b0 619 for (i = start; i < end; i++) {
51ef4c26 620 hbq_buffer = (phba->hbqs[hbqno].hbq_alloc_buffer)(phba);
92d7f7b0
JS		 621 if (!hbq_buffer)
622 return 1;
92d7f7b0 623 hbq_buffer->tag = (i | (hbqno << 16));
51ef4c26 624 if (lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer))
a8adb832 625 phba->hbqs[hbqno].buffer_count++;
51ef4c26
JS		 626 else
627 (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
ed957684
JS		 628 }
629 return 0;
630}
631
92d7f7b0
JS		 632int
633lpfc_sli_hbqbuf_add_hbqs(struct lpfc_hba *phba, uint32_t qno)
ed957684 634{
92d7f7b0
JS		 635 return(lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
636 lpfc_hbq_defs[qno]->add_count));
637}
ed957684 638
a6ababd2 639static int
92d7f7b0
JS		 640lpfc_sli_hbqbuf_init_hbqs(struct lpfc_hba *phba, uint32_t qno)
641{
642 return(lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
643 lpfc_hbq_defs[qno]->init_count));
ed957684
JS		 644}
645
a6ababd2 646static struct hbq_dmabuf *
92d7f7b0 647lpfc_sli_hbqbuf_find(struct lpfc_hba *phba, uint32_t tag)
ed957684 648{
92d7f7b0
JS		 649 struct lpfc_dmabuf *d_buf;
650 struct hbq_dmabuf *hbq_buf;
51ef4c26
JS		 651 uint32_t hbqno;
652
653 hbqno = tag >> 16;
a0a74e45 654 if (hbqno >= LPFC_MAX_HBQS)
51ef4c26 655 return NULL;
ed957684 656
51ef4c26 657 list_for_each_entry(d_buf, &phba->hbqs[hbqno].hbq_buffer_list, list) {
92d7f7b0 658 hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
51ef4c26 659 if (hbq_buf->tag == tag) {
92d7f7b0 660 return hbq_buf;
ed957684
JS		 661 }
662 }
92d7f7b0 663 lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_VPORT,
e8b62011 664 "1803 Bad hbq tag. Data: x%x x%x\n",
a8adb832 665 tag, phba->hbqs[tag >> 16].buffer_count);
92d7f7b0 666 return NULL;
ed957684
JS		 667}
668
669void
51ef4c26 670lpfc_sli_free_hbq(struct lpfc_hba *phba, struct hbq_dmabuf *hbq_buffer)
ed957684
JS		 671{
672 uint32_t hbqno;
673
51ef4c26
JS		 674 if (hbq_buffer) {
675 hbqno = hbq_buffer->tag >> 16;
676 if (!lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer)) {
677 (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
678 }
ed957684
JS		 679 }
680}
681
dea3101e
JB		 682static int
683lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
684{
685 uint8_t ret;
686
687 switch (mbxCommand) {
688 case MBX_LOAD_SM:
689 case MBX_READ_NV:
690 case MBX_WRITE_NV:
a8adb832 691 case MBX_WRITE_VPARMS:
dea3101e
JB		 692 case MBX_RUN_BIU_DIAG:
693 case MBX_INIT_LINK:
694 case MBX_DOWN_LINK:
695 case MBX_CONFIG_LINK:
696 case MBX_CONFIG_RING:
697 case MBX_RESET_RING:
698 case MBX_READ_CONFIG:
699 case MBX_READ_RCONFIG:
700 case MBX_READ_SPARM:
701 case MBX_READ_STATUS:
702 case MBX_READ_RPI:
703 case MBX_READ_XRI:
704 case MBX_READ_REV:
705 case MBX_READ_LNK_STAT:
706 case MBX_REG_LOGIN:
707 case MBX_UNREG_LOGIN:
708 case MBX_READ_LA:
709 case MBX_CLEAR_LA:
710 case MBX_DUMP_MEMORY:
711 case MBX_DUMP_CONTEXT:
712 case MBX_RUN_DIAGS:
713 case MBX_RESTART:
714 case MBX_UPDATE_CFG:
715 case MBX_DOWN_LOAD:
716 case MBX_DEL_LD_ENTRY:
717 case MBX_RUN_PROGRAM:
718 case MBX_SET_MASK:
09372820 719 case MBX_SET_VARIABLE:
dea3101e 720 case MBX_UNREG_D_ID:
41415862 721 case MBX_KILL_BOARD:
dea3101e 722 case MBX_CONFIG_FARP:
41415862 723 case MBX_BEACON:
dea3101e
JB		 724 case MBX_LOAD_AREA:
725 case MBX_RUN_BIU_DIAG64:
726 case MBX_CONFIG_PORT:
727 case MBX_READ_SPARM64:
728 case MBX_READ_RPI64:
729 case MBX_REG_LOGIN64:
730 case MBX_READ_LA64:
09372820 731 case MBX_WRITE_WWN:
dea3101e
JB		 732 case MBX_SET_DEBUG:
733 case MBX_LOAD_EXP_ROM:
57127f15 734 case MBX_ASYNCEVT_ENABLE:
92d7f7b0
JS		 735 case MBX_REG_VPI:
736 case MBX_UNREG_VPI:
858c9f6c 737 case MBX_HEARTBEAT:
dea3101e
JB		 738 ret = mbxCommand;
739 break;
740 default:
741 ret = MBX_SHUTDOWN;
742 break;
743 }
2e0fef85 744 return ret;
dea3101e
JB		 745}
746static void
2e0fef85 747lpfc_sli_wake_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
dea3101e
JB		 748{
749 wait_queue_head_t *pdone_q;
858c9f6c 750 unsigned long drvr_flag;
dea3101e
JB		 751
752 /*
753 * If pdone_q is empty, the driver thread gave up waiting and
754 * continued running.
755 */
7054a606 756 pmboxq->mbox_flag |= LPFC_MBX_WAKE;
858c9f6c 757 spin_lock_irqsave(&phba->hbalock, drvr_flag);
dea3101e
JB		 758 pdone_q = (wait_queue_head_t *) pmboxq->context1;
759 if (pdone_q)
760 wake_up_interruptible(pdone_q);
858c9f6c 761 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e
JB		 762 return;
763}
764
765void
2e0fef85 766lpfc_sli_def_mbox_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
dea3101e
JB		 767{
768 struct lpfc_dmabuf *mp;
7054a606
JS		 769 uint16_t rpi;
770 int rc;
771
dea3101e 772 mp = (struct lpfc_dmabuf *) (pmb->context1);
7054a606 773
dea3101e
JB		 774 if (mp) {
775 lpfc_mbuf_free(phba, mp->virt, mp->phys);
776 kfree(mp);
777 }
7054a606
JS		 778
779 /*
780 * If a REG_LOGIN succeeded after node is destroyed or node
781 * is in re-discovery driver need to cleanup the RPI.
782 */
2e0fef85
JS		 783 if (!(phba->pport->load_flag & FC_UNLOADING) &&
784 pmb->mb.mbxCommand == MBX_REG_LOGIN64 &&
785 !pmb->mb.mbxStatus) {
7054a606
JS		 786
787 rpi = pmb->mb.un.varWords[0];
92d7f7b0
JS		 788 lpfc_unreg_login(phba, pmb->mb.un.varRegLogin.vpi, rpi, pmb);
789 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
7054a606
JS		 790 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
791 if (rc != MBX_NOT_FINISHED)
792 return;
793 }
794
2e0fef85 795 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e
JB		 796 return;
797}
798
799int
2e0fef85 800lpfc_sli_handle_mb_event(struct lpfc_hba *phba)
dea3101e 801{
92d7f7b0 802 MAILBOX_t *pmbox;
dea3101e 803 LPFC_MBOXQ_t *pmb;
92d7f7b0
JS		 804 int rc;
805 LIST_HEAD(cmplq);
dea3101e
JB		 806
807 phba->sli.slistat.mbox_event++;
808
92d7f7b0
JS		 809 /* Get all completed mailboxe buffers into the cmplq */
810 spin_lock_irq(&phba->hbalock);
811 list_splice_init(&phba->sli.mboxq_cmpl, &cmplq);
812 spin_unlock_irq(&phba->hbalock);
dea3101e 813
92d7f7b0
JS		 814 /* Get a Mailbox buffer to setup mailbox commands for callback */
815 do {
816 list_remove_head(&cmplq, pmb, LPFC_MBOXQ_t, list);
817 if (pmb == NULL)
818 break;
2e0fef85 819
92d7f7b0 820 pmbox = &pmb->mb;
dea3101e 821
858c9f6c
JS		 822 if (pmbox->mbxCommand != MBX_HEARTBEAT) {
823 if (pmb->vport) {
824 lpfc_debugfs_disc_trc(pmb->vport,
825 LPFC_DISC_TRC_MBOX_VPORT,
826 "MBOX cmpl vport: cmd:x%x mb:x%x x%x",
827 (uint32_t)pmbox->mbxCommand,
828 pmbox->un.varWords[0],
829 pmbox->un.varWords[1]);
830 }
831 else {
832 lpfc_debugfs_disc_trc(phba->pport,
833 LPFC_DISC_TRC_MBOX,
834 "MBOX cmpl: cmd:x%x mb:x%x x%x",
835 (uint32_t)pmbox->mbxCommand,
836 pmbox->un.varWords[0],
837 pmbox->un.varWords[1]);
838 }
839 }
840
dea3101e
JB		 841 /*
842 * It is a fatal error if unknown mbox command completion.
843 */
844 if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
845 MBX_SHUTDOWN) {
dea3101e 846 /* Unknow mailbox command compl */
92d7f7b0 847 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
e8b62011 848 "(%d):0323 Unknown Mailbox command "
92d7f7b0 849 "%x Cmpl\n",
92d7f7b0
JS		 850 pmb->vport ? pmb->vport->vpi : 0,
851 pmbox->mbxCommand);
2e0fef85 852 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB		 853 phba->work_hs = HS_FFER3;
854 lpfc_handle_eratt(phba);
92d7f7b0 855 continue;
dea3101e
JB		 856 }
857
dea3101e
JB		 858 if (pmbox->mbxStatus) {
859 phba->sli.slistat.mbox_stat_err++;
860 if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
861 /* Mbox cmd cmpl error - RETRYing */
92d7f7b0
JS		 862 lpfc_printf_log(phba, KERN_INFO,
863 LOG_MBOX | LOG_SLI,
e8b62011 864 "(%d):0305 Mbox cmd cmpl "
92d7f7b0
JS		 865 "error - RETRYing Data: x%x "
866 "x%x x%x x%x\n",
92d7f7b0
JS		 867 pmb->vport ? pmb->vport->vpi :0,
868 pmbox->mbxCommand,
869 pmbox->mbxStatus,
870 pmbox->un.varWords[0],
871 pmb->vport->port_state);
dea3101e
JB		 872 pmbox->mbxStatus = 0;
873 pmbox->mbxOwner = OWN_HOST;
2e0fef85 874 spin_lock_irq(&phba->hbalock);
dea3101e 875 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 876 spin_unlock_irq(&phba->hbalock);
dea3101e
JB		 877 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
878 if (rc == MBX_SUCCESS)
92d7f7b0 879 continue;
dea3101e
JB		 880 }
881 }
882
883 /* Mailbox cmd <cmd> Cmpl <cmpl> */
92d7f7b0 884 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
e8b62011 885 "(%d):0307 Mailbox cmd x%x Cmpl x%p "
dea3101e 886 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x\n",
92d7f7b0 887 pmb->vport ? pmb->vport->vpi : 0,
dea3101e
JB		 888 pmbox->mbxCommand,
889 pmb->mbox_cmpl,
890 *((uint32_t *) pmbox),
891 pmbox->un.varWords[0],
892 pmbox->un.varWords[1],
893 pmbox->un.varWords[2],
894 pmbox->un.varWords[3],
895 pmbox->un.varWords[4],
896 pmbox->un.varWords[5],
897 pmbox->un.varWords[6],
898 pmbox->un.varWords[7]);
899
92d7f7b0 900 if (pmb->mbox_cmpl)
dea3101e 901 pmb->mbox_cmpl(phba,pmb);
92d7f7b0
JS		 902 } while (1);
903 return 0;
904}
dea3101e 905
92d7f7b0
JS		 906static struct lpfc_dmabuf *
907lpfc_sli_replace_hbqbuff(struct lpfc_hba *phba, uint32_t tag)
908{
909 struct hbq_dmabuf *hbq_entry, *new_hbq_entry;
51ef4c26
JS		 910 uint32_t hbqno;
911 void *virt; /* virtual address ptr */
912 dma_addr_t phys; /* mapped address */
dea3101e 913
92d7f7b0
JS		 914 hbq_entry = lpfc_sli_hbqbuf_find(phba, tag);
915 if (hbq_entry == NULL)
916 return NULL;
917 list_del(&hbq_entry->dbuf.list);
51ef4c26
JS		 918
919 hbqno = tag >> 16;
920 new_hbq_entry = (phba->hbqs[hbqno].hbq_alloc_buffer)(phba);
92d7f7b0
JS		 921 if (new_hbq_entry == NULL)
922 return &hbq_entry->dbuf;
92d7f7b0 923 new_hbq_entry->tag = -1;
51ef4c26
JS		 924 phys = new_hbq_entry->dbuf.phys;
925 virt = new_hbq_entry->dbuf.virt;
926 new_hbq_entry->dbuf.phys = hbq_entry->dbuf.phys;
927 new_hbq_entry->dbuf.virt = hbq_entry->dbuf.virt;
928 hbq_entry->dbuf.phys = phys;
929 hbq_entry->dbuf.virt = virt;
92d7f7b0
JS		 930 lpfc_sli_free_hbq(phba, hbq_entry);
931 return &new_hbq_entry->dbuf;
dea3101e 932}
92d7f7b0 933
76bb24ef
JS		 934static struct lpfc_dmabuf *
935lpfc_sli_get_buff(struct lpfc_hba *phba,
936 struct lpfc_sli_ring *pring,
937 uint32_t tag)
938{
939 if (tag & QUE_BUFTAG_BIT)
940 return lpfc_sli_ring_taggedbuf_get(phba, pring, tag);
941 else
942 return lpfc_sli_replace_hbqbuff(phba, tag);
943}
57127f15 944
dea3101e
JB		 945static int
946lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
947 struct lpfc_iocbq *saveq)
948{
949 IOCB_t * irsp;
950 WORD5 * w5p;
951 uint32_t Rctl, Type;
952 uint32_t match, i;
76bb24ef 953 struct lpfc_iocbq *iocbq;
dea3101e
JB		 954
955 match = 0;
956 irsp = &(saveq->iocb);
57127f15 957
9c2face6
JS		 958 if (irsp->ulpStatus == IOSTAT_NEED_BUFFER)
959 return 1;
57127f15
JS		 960 if (irsp->ulpCommand == CMD_ASYNC_STATUS) {
961 if (pring->lpfc_sli_rcv_async_status)
962 pring->lpfc_sli_rcv_async_status(phba, pring, saveq);
963 else
964 lpfc_printf_log(phba,
965 KERN_WARNING,
966 LOG_SLI,
967 "0316 Ring %d handler: unexpected "
968 "ASYNC_STATUS iocb received evt_code "
969 "0x%x\n",
970 pring->ringno,
971 irsp->un.asyncstat.evt_code);
972 return 1;
973 }
974
92d7f7b0 975 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
76bb24ef
JS		 976 if (irsp->ulpBdeCount != 0) {
977 saveq->context2 = lpfc_sli_get_buff(phba, pring,
978 irsp->un.ulpWord[3]);
979 if (!saveq->context2)
980 lpfc_printf_log(phba,
981 KERN_ERR,
982 LOG_SLI,
983 "0341 Ring %d Cannot find buffer for "
984 "an unsolicited iocb. tag 0x%x\n",
985 pring->ringno,
986 irsp->un.ulpWord[3]);
76bb24ef
JS		 987 }
988 if (irsp->ulpBdeCount == 2) {
989 saveq->context3 = lpfc_sli_get_buff(phba, pring,
990 irsp->unsli3.sli3Words[7]);
991 if (!saveq->context3)
992 lpfc_printf_log(phba,
993 KERN_ERR,
994 LOG_SLI,
995 "0342 Ring %d Cannot find buffer for an"
996 " unsolicited iocb. tag 0x%x\n",
997 pring->ringno,
998 irsp->unsli3.sli3Words[7]);
999 }
1000 list_for_each_entry(iocbq, &saveq->list, list) {
76bb24ef 1001 irsp = &(iocbq->iocb);
76bb24ef
JS		 1002 if (irsp->ulpBdeCount != 0) {
1003 iocbq->context2 = lpfc_sli_get_buff(phba, pring,
1004 irsp->un.ulpWord[3]);
9c2face6 1005 if (!iocbq->context2)
76bb24ef
JS		 1006 lpfc_printf_log(phba,
1007 KERN_ERR,
1008 LOG_SLI,
1009 "0343 Ring %d Cannot find "
1010 "buffer for an unsolicited iocb"
1011 ". tag 0x%x\n", pring->ringno,
92d7f7b0 1012 irsp->un.ulpWord[3]);
76bb24ef
JS		 1013 }
1014 if (irsp->ulpBdeCount == 2) {
1015 iocbq->context3 = lpfc_sli_get_buff(phba, pring,
51ef4c26 1016 irsp->unsli3.sli3Words[7]);
9c2face6 1017 if (!iocbq->context3)
76bb24ef
JS		 1018 lpfc_printf_log(phba,
1019 KERN_ERR,
1020 LOG_SLI,
1021 "0344 Ring %d Cannot find "
1022 "buffer for an unsolicited "
1023 "iocb. tag 0x%x\n",
1024 pring->ringno,
1025 irsp->unsli3.sli3Words[7]);
1026 }
1027 }
92d7f7b0 1028 }
9c2face6
JS		 1029 if (irsp->ulpBdeCount != 0 &&
1030 (irsp->ulpCommand == CMD_IOCB_RCV_CONT64_CX ||
1031 irsp->ulpStatus == IOSTAT_INTERMED_RSP)) {
1032 int found = 0;
1033
1034 /* search continue save q for same XRI */
1035 list_for_each_entry(iocbq, &pring->iocb_continue_saveq, clist) {
1036 if (iocbq->iocb.ulpContext == saveq->iocb.ulpContext) {
1037 list_add_tail(&saveq->list, &iocbq->list);
1038 found = 1;
1039 break;
1040 }
1041 }
1042 if (!found)
1043 list_add_tail(&saveq->clist,
1044 &pring->iocb_continue_saveq);
1045 if (saveq->iocb.ulpStatus != IOSTAT_INTERMED_RSP) {
1046 list_del_init(&iocbq->clist);
1047 saveq = iocbq;
1048 irsp = &(saveq->iocb);
1049 } else
1050 return 0;
1051 }
1052 if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX) ||
1053 (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX) ||
1054 (irsp->ulpCommand == CMD_IOCB_RCV_ELS64_CX)) {
1055 Rctl = FC_ELS_REQ;
1056 Type = FC_ELS_DATA;
1057 } else {
1058 w5p = (WORD5 *)&(saveq->iocb.un.ulpWord[5]);
1059 Rctl = w5p->hcsw.Rctl;
1060 Type = w5p->hcsw.Type;
1061
1062 /* Firmware Workaround */
1063 if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
1064 (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX ||
1065 irsp->ulpCommand == CMD_IOCB_RCV_SEQ64_CX)) {
1066 Rctl = FC_ELS_REQ;
1067 Type = FC_ELS_DATA;
1068 w5p->hcsw.Rctl = Rctl;
1069 w5p->hcsw.Type = Type;
1070 }
1071 }
92d7f7b0 1072
dea3101e
JB		 1073 /* unSolicited Responses */
1074 if (pring->prt[0].profile) {
cf5bf97e
JW		 1075 if (pring->prt[0].lpfc_sli_rcv_unsol_event)
1076 (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring,
1077 saveq);
dea3101e
JB		 1078 match = 1;
1079 } else {
1080 /* We must search, based on rctl / type
1081 for the right routine */
9c2face6
JS		 1082 for (i = 0; i < pring->num_mask; i++) {
1083 if ((pring->prt[i].rctl == Rctl)
1084 && (pring->prt[i].type == Type)) {
cf5bf97e
JW		 1085 if (pring->prt[i].lpfc_sli_rcv_unsol_event)
1086 (pring->prt[i].lpfc_sli_rcv_unsol_event)
1087 (phba, pring, saveq);
dea3101e
JB		 1088 match = 1;
1089 break;
1090 }
1091 }
1092 }
1093 if (match == 0) {
1094 /* Unexpected Rctl / Type received */
1095 /* Ring <ringno> handler: unexpected
1096 Rctl <Rctl> Type <Type> received */
92d7f7b0 1097 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 1098 "0313 Ring %d handler: unexpected Rctl x%x "
92d7f7b0 1099 "Type x%x received\n",
e8b62011 1100 pring->ringno, Rctl, Type);
dea3101e 1101 }
92d7f7b0 1102 return 1;
dea3101e
JB		 1103}
1104
1105static struct lpfc_iocbq *
2e0fef85
JS		 1106lpfc_sli_iocbq_lookup(struct lpfc_hba *phba,
1107 struct lpfc_sli_ring *pring,
1108 struct lpfc_iocbq *prspiocb)
dea3101e 1109{
dea3101e
JB		 1110 struct lpfc_iocbq *cmd_iocb = NULL;
1111 uint16_t iotag;
1112
604a3e30
JB		 1113 iotag = prspiocb->iocb.ulpIoTag;
1114
1115 if (iotag != 0 && iotag <= phba->sli.last_iotag) {
1116 cmd_iocb = phba->sli.iocbq_lookup[iotag];
92d7f7b0 1117 list_del_init(&cmd_iocb->list);
604a3e30
JB		 1118 pring->txcmplq_cnt--;
1119 return cmd_iocb;
dea3101e
JB		 1120 }
1121
dea3101e 1122 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1123 "0317 iotag x%x is out off "
604a3e30 1124 "range: max iotag x%x wd0 x%x\n",
e8b62011 1125 iotag, phba->sli.last_iotag,
604a3e30 1126 *(((uint32_t *) &prspiocb->iocb) + 7));
dea3101e
JB		 1127 return NULL;
1128}
1129
1130static int
2e0fef85 1131lpfc_sli_process_sol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
dea3101e
JB		 1132 struct lpfc_iocbq *saveq)
1133{
2e0fef85 1134 struct lpfc_iocbq *cmdiocbp;
dea3101e
JB		 1135 int rc = 1;
1136 unsigned long iflag;
1137
1138 /* Based on the iotag field, get the cmd IOCB from the txcmplq */
2e0fef85 1139 spin_lock_irqsave(&phba->hbalock, iflag);
604a3e30 1140 cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring, saveq);
2e0fef85
JS		 1141 spin_unlock_irqrestore(&phba->hbalock, iflag);
1142
dea3101e
JB		 1143 if (cmdiocbp) {
1144 if (cmdiocbp->iocb_cmpl) {
1145 /*
1146 * Post all ELS completions to the worker thread.
1147 * All other are passed to the completion callback.
1148 */
1149 if (pring->ringno == LPFC_ELS_RING) {
07951076
JS		 1150 if (cmdiocbp->iocb_flag & LPFC_DRIVER_ABORTED) {
1151 cmdiocbp->iocb_flag &=
1152 ~LPFC_DRIVER_ABORTED;
1153 saveq->iocb.ulpStatus =
1154 IOSTAT_LOCAL_REJECT;
1155 saveq->iocb.un.ulpWord[4] =
1156 IOERR_SLI_ABORTED;
0ff10d46
JS		 1157
1158 /* Firmware could still be in progress
1159 * of DMAing payload, so don't free data
1160 * buffer till after a hbeat.
1161 */
1162 saveq->iocb_flag |= LPFC_DELAY_MEM_FREE;
07951076 1163 }
dea3101e 1164 }
2e0fef85 1165 (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
604a3e30
JB		 1166 } else
1167 lpfc_sli_release_iocbq(phba, cmdiocbp);
dea3101e
JB		 1168 } else {
1169 /*
1170 * Unknown initiating command based on the response iotag.
1171 * This could be the case on the ELS ring because of
1172 * lpfc_els_abort().
1173 */
1174 if (pring->ringno != LPFC_ELS_RING) {
1175 /*
1176 * Ring <ringno> handler: unexpected completion IoTag
1177 * <IoTag>
1178 */
e8b62011
JS		 1179 lpfc_printf_vlog(cmdiocbp->vport, KERN_WARNING, LOG_SLI,
1180 "0322 Ring %d handler: "
1181 "unexpected completion IoTag x%x "
1182 "Data: x%x x%x x%x x%x\n",
1183 pring->ringno,
1184 saveq->iocb.ulpIoTag,
1185 saveq->iocb.ulpStatus,
1186 saveq->iocb.un.ulpWord[4],
1187 saveq->iocb.ulpCommand,
1188 saveq->iocb.ulpContext);
dea3101e
JB		 1189 }
1190 }
68876920 1191
dea3101e
JB		 1192 return rc;
1193}
1194
2e0fef85
JS		 1195static void
1196lpfc_sli_rsp_pointers_error(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
875fbdfe 1197{
ed957684
JS		 1198 struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
1199 &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
1200 &phba->slim2p->mbx.us.s2.port[pring->ringno];
875fbdfe
JSEC		 1201 /*
1202 * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
1203 * rsp ring <portRspMax>
1204 */
1205 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1206 "0312 Ring %d handler: portRspPut %d "
875fbdfe 1207 "is bigger then rsp ring %d\n",
e8b62011 1208 pring->ringno, le32_to_cpu(pgp->rspPutInx),
875fbdfe
JSEC		 1209 pring->numRiocb);
1210
2e0fef85 1211 phba->link_state = LPFC_HBA_ERROR;
875fbdfe
JSEC		 1212
1213 /*
1214 * All error attention handlers are posted to
1215 * worker thread
1216 */
1217 phba->work_ha |= HA_ERATT;
1218 phba->work_hs = HS_FFER3;
92d7f7b0
JS		 1219
1220 /* hbalock should already be held */
875fbdfe 1221 if (phba->work_wait)
92d7f7b0 1222 lpfc_worker_wake_up(phba);
875fbdfe
JSEC		 1223
1224 return;
1225}
1226
2e0fef85 1227void lpfc_sli_poll_fcp_ring(struct lpfc_hba *phba)
875fbdfe 1228{
2e0fef85
JS		 1229 struct lpfc_sli *psli = &phba->sli;
1230 struct lpfc_sli_ring *pring = &psli->ring[LPFC_FCP_RING];
875fbdfe
JSEC		 1231 IOCB_t *irsp = NULL;
1232 IOCB_t *entry = NULL;
1233 struct lpfc_iocbq *cmdiocbq = NULL;
1234 struct lpfc_iocbq rspiocbq;
1235 struct lpfc_pgp *pgp;
1236 uint32_t status;
1237 uint32_t portRspPut, portRspMax;
1238 int type;
1239 uint32_t rsp_cmpl = 0;
875fbdfe 1240 uint32_t ha_copy;
2e0fef85 1241 unsigned long iflags;
875fbdfe
JSEC		 1242
1243 pring->stats.iocb_event++;
1244
ed957684
JS		 1245 pgp = (phba->sli_rev == 3) ?
1246 &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
1247 &phba->slim2p->mbx.us.s2.port[pring->ringno];
1248
875fbdfe
JSEC		 1249
1250 /*
1251 * The next available response entry should never exceed the maximum
1252 * entries. If it does, treat it as an adapter hardware error.
1253 */
1254 portRspMax = pring->numRiocb;
1255 portRspPut = le32_to_cpu(pgp->rspPutInx);
1256 if (unlikely(portRspPut >= portRspMax)) {
1257 lpfc_sli_rsp_pointers_error(phba, pring);
1258 return;
1259 }
1260
1261 rmb();
1262 while (pring->rspidx != portRspPut) {
ed957684 1263 entry = lpfc_resp_iocb(phba, pring);
875fbdfe
JSEC		 1264 if (++pring->rspidx >= portRspMax)
1265 pring->rspidx = 0;
1266
1267 lpfc_sli_pcimem_bcopy((uint32_t *) entry,
1268 (uint32_t *) &rspiocbq.iocb,
92d7f7b0 1269 phba->iocb_rsp_size);
875fbdfe
JSEC		 1270 irsp = &rspiocbq.iocb;
1271 type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
1272 pring->stats.iocb_rsp++;
1273 rsp_cmpl++;
1274
1275 if (unlikely(irsp->ulpStatus)) {
1276 /* Rsp ring <ringno> error: IOCB */
1277 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 1278 "0326 Rsp Ring %d error: IOCB Data: "
875fbdfe 1279 "x%x x%x x%x x%x x%x x%x x%x x%x\n",
e8b62011 1280 pring->ringno,
875fbdfe
JSEC		 1281 irsp->un.ulpWord[0],
1282 irsp->un.ulpWord[1],
1283 irsp->un.ulpWord[2],
1284 irsp->un.ulpWord[3],
1285 irsp->un.ulpWord[4],
1286 irsp->un.ulpWord[5],
1287 *(((uint32_t *) irsp) + 6),
1288 *(((uint32_t *) irsp) + 7));
1289 }
1290
1291 switch (type) {
1292 case LPFC_ABORT_IOCB:
1293 case LPFC_SOL_IOCB:
1294 /*
1295 * Idle exchange closed via ABTS from port. No iocb
1296 * resources need to be recovered.
1297 */
1298 if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
dca9479b 1299 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011
JS		 1300 "0314 IOCB cmd 0x%x "
1301 "processed. Skipping "
1302 "completion",
dca9479b 1303 irsp->ulpCommand);
875fbdfe
JSEC		 1304 break;
1305 }
1306
2e0fef85 1307 spin_lock_irqsave(&phba->hbalock, iflags);
875fbdfe
JSEC		 1308 cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
1309 &rspiocbq);
2e0fef85 1310 spin_unlock_irqrestore(&phba->hbalock, iflags);
875fbdfe
JSEC		 1311 if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
1312 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
1313 &rspiocbq);
1314 }
1315 break;
1316 default:
1317 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
1318 char adaptermsg[LPFC_MAX_ADPTMSG];
1319 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
1320 memcpy(&adaptermsg[0], (uint8_t *) irsp,
1321 MAX_MSG_DATA);
898eb71c
JP		 1322 dev_warn(&((phba->pcidev)->dev),
1323 "lpfc%d: %s\n",
875fbdfe
JSEC		 1324 phba->brd_no, adaptermsg);
1325 } else {
1326 /* Unknown IOCB command */
1327 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1328 "0321 Unknown IOCB command "
875fbdfe 1329 "Data: x%x, x%x x%x x%x x%x\n",
e8b62011 1330 type, irsp->ulpCommand,
875fbdfe
JSEC		 1331 irsp->ulpStatus,
1332 irsp->ulpIoTag,
1333 irsp->ulpContext);
1334 }
1335 break;
1336 }
1337
1338 /*
1339 * The response IOCB has been processed. Update the ring
1340 * pointer in SLIM. If the port response put pointer has not
1341 * been updated, sync the pgp->rspPutInx and fetch the new port
1342 * response put pointer.
1343 */
ed957684 1344 writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
875fbdfe
JSEC		 1345
1346 if (pring->rspidx == portRspPut)
1347 portRspPut = le32_to_cpu(pgp->rspPutInx);
1348 }
1349
1350 ha_copy = readl(phba->HAregaddr);
1351 ha_copy >>= (LPFC_FCP_RING * 4);
1352
1353 if ((rsp_cmpl > 0) && (ha_copy & HA_R0RE_REQ)) {
2e0fef85 1354 spin_lock_irqsave(&phba->hbalock, iflags);
875fbdfe
JSEC		 1355 pring->stats.iocb_rsp_full++;
1356 status = ((CA_R0ATT | CA_R0RE_RSP) << (LPFC_FCP_RING * 4));
1357 writel(status, phba->CAregaddr);
1358 readl(phba->CAregaddr);
2e0fef85 1359 spin_unlock_irqrestore(&phba->hbalock, iflags);
875fbdfe
JSEC		 1360 }
1361 if ((ha_copy & HA_R0CE_RSP) &&
1362 (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
2e0fef85 1363 spin_lock_irqsave(&phba->hbalock, iflags);
875fbdfe
JSEC		 1364 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
1365 pring->stats.iocb_cmd_empty++;
1366
1367 /* Force update of the local copy of cmdGetInx */
1368 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
1369 lpfc_sli_resume_iocb(phba, pring);
1370
1371 if ((pring->lpfc_sli_cmd_available))
1372 (pring->lpfc_sli_cmd_available) (phba, pring);
1373
2e0fef85 1374 spin_unlock_irqrestore(&phba->hbalock, iflags);
875fbdfe
JSEC		 1375 }
1376
1377 return;
1378}
1379
dea3101e
JB		 1380/*
1381 * This routine presumes LPFC_FCP_RING handling and doesn't bother
1382 * to check it explicitly.
1383 */
1384static int
2e0fef85
JS		 1385lpfc_sli_handle_fast_ring_event(struct lpfc_hba *phba,
1386 struct lpfc_sli_ring *pring, uint32_t mask)
dea3101e 1387{
ed957684
JS		 1388 struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
1389 &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
1390 &phba->slim2p->mbx.us.s2.port[pring->ringno];
dea3101e 1391 IOCB_t *irsp = NULL;
87f6eaff 1392 IOCB_t *entry = NULL;
dea3101e
JB		 1393 struct lpfc_iocbq *cmdiocbq = NULL;
1394 struct lpfc_iocbq rspiocbq;
dea3101e
JB		 1395 uint32_t status;
1396 uint32_t portRspPut, portRspMax;
1397 int rc = 1;
1398 lpfc_iocb_type type;
1399 unsigned long iflag;
1400 uint32_t rsp_cmpl = 0;
dea3101e 1401
2e0fef85 1402 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e
JB		 1403 pring->stats.iocb_event++;
1404
dea3101e
JB		 1405 /*
1406 * The next available response entry should never exceed the maximum
1407 * entries. If it does, treat it as an adapter hardware error.
1408 */
1409 portRspMax = pring->numRiocb;
1410 portRspPut = le32_to_cpu(pgp->rspPutInx);
1411 if (unlikely(portRspPut >= portRspMax)) {
875fbdfe 1412 lpfc_sli_rsp_pointers_error(phba, pring);
2e0fef85 1413 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB		 1414 return 1;
1415 }
1416
1417 rmb();
1418 while (pring->rspidx != portRspPut) {
87f6eaff
JSEC		 1419 /*
1420 * Fetch an entry off the ring and copy it into a local data
1421 * structure. The copy involves a byte-swap since the
1422 * network byte order and pci byte orders are different.
1423 */
ed957684 1424 entry = lpfc_resp_iocb(phba, pring);
858c9f6c 1425 phba->last_completion_time = jiffies;
875fbdfe
JSEC		 1426
1427 if (++pring->rspidx >= portRspMax)
1428 pring->rspidx = 0;
1429
87f6eaff
JSEC		 1430 lpfc_sli_pcimem_bcopy((uint32_t *) entry,
1431 (uint32_t *) &rspiocbq.iocb,
ed957684 1432 phba->iocb_rsp_size);
a4bc3379 1433 INIT_LIST_HEAD(&(rspiocbq.list));
87f6eaff
JSEC		 1434 irsp = &rspiocbq.iocb;
1435
dea3101e
JB		 1436 type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
1437 pring->stats.iocb_rsp++;
1438 rsp_cmpl++;
1439
1440 if (unlikely(irsp->ulpStatus)) {
92d7f7b0
JS		 1441 /*
1442 * If resource errors reported from HBA, reduce
1443 * queuedepths of the SCSI device.
1444 */
1445 if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
1446 (irsp->un.ulpWord[4] == IOERR_NO_RESOURCES)) {
1447 spin_unlock_irqrestore(&phba->hbalock, iflag);
1448 lpfc_adjust_queue_depth(phba);
1449 spin_lock_irqsave(&phba->hbalock, iflag);
1450 }
1451
dea3101e
JB		 1452 /* Rsp ring <ringno> error: IOCB */
1453 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 1454 "0336 Rsp Ring %d error: IOCB Data: "
92d7f7b0 1455 "x%x x%x x%x x%x x%x x%x x%x x%x\n",
e8b62011 1456 pring->ringno,
92d7f7b0
JS		 1457 irsp->un.ulpWord[0],
1458 irsp->un.ulpWord[1],
1459 irsp->un.ulpWord[2],
1460 irsp->un.ulpWord[3],
1461 irsp->un.ulpWord[4],
1462 irsp->un.ulpWord[5],
1463 *(((uint32_t *) irsp) + 6),
1464 *(((uint32_t *) irsp) + 7));
dea3101e
JB		 1465 }
1466
1467 switch (type) {
1468 case LPFC_ABORT_IOCB:
1469 case LPFC_SOL_IOCB:
1470 /*
1471 * Idle exchange closed via ABTS from port. No iocb
1472 * resources need to be recovered.
1473 */
1474 if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
dca9479b 1475 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 1476 "0333 IOCB cmd 0x%x"
dca9479b 1477 " processed. Skipping"
92d7f7b0 1478 " completion\n",
dca9479b 1479 irsp->ulpCommand);
dea3101e
JB		 1480 break;
1481 }
1482
604a3e30
JB		 1483 cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
1484 &rspiocbq);
dea3101e 1485 if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
b808608b
JW		 1486 if (phba->cfg_poll & ENABLE_FCP_RING_POLLING) {
1487 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
1488 &rspiocbq);
1489 } else {
2e0fef85
JS		 1490 spin_unlock_irqrestore(&phba->hbalock,
1491 iflag);
b808608b
JW		 1492 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
1493 &rspiocbq);
2e0fef85 1494 spin_lock_irqsave(&phba->hbalock,
b808608b
JW		 1495 iflag);
1496 }
dea3101e
JB		 1497 }
1498 break;
a4bc3379 1499 case LPFC_UNSOL_IOCB:
2e0fef85 1500 spin_unlock_irqrestore(&phba->hbalock, iflag);
a4bc3379 1501 lpfc_sli_process_unsol_iocb(phba, pring, &rspiocbq);
2e0fef85 1502 spin_lock_irqsave(&phba->hbalock, iflag);
a4bc3379 1503 break;
dea3101e
JB		 1504 default:
1505 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
1506 char adaptermsg[LPFC_MAX_ADPTMSG];
1507 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
1508 memcpy(&adaptermsg[0], (uint8_t *) irsp,
1509 MAX_MSG_DATA);
898eb71c
JP		 1510 dev_warn(&((phba->pcidev)->dev),
1511 "lpfc%d: %s\n",
dea3101e
JB		 1512 phba->brd_no, adaptermsg);
1513 } else {
1514 /* Unknown IOCB command */
1515 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1516 "0334 Unknown IOCB command "
92d7f7b0 1517 "Data: x%x, x%x x%x x%x x%x\n",
e8b62011 1518 type, irsp->ulpCommand,
92d7f7b0
JS		 1519 irsp->ulpStatus,
1520 irsp->ulpIoTag,
1521 irsp->ulpContext);
dea3101e
JB		 1522 }
1523 break;
1524 }
1525
1526 /*
1527 * The response IOCB has been processed. Update the ring
1528 * pointer in SLIM. If the port response put pointer has not
1529 * been updated, sync the pgp->rspPutInx and fetch the new port
1530 * response put pointer.
1531 */
ed957684 1532 writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
dea3101e
JB		 1533
1534 if (pring->rspidx == portRspPut)
1535 portRspPut = le32_to_cpu(pgp->rspPutInx);
1536 }
1537
1538 if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
1539 pring->stats.iocb_rsp_full++;
1540 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
1541 writel(status, phba->CAregaddr);
1542 readl(phba->CAregaddr);
1543 }
1544 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
1545 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
1546 pring->stats.iocb_cmd_empty++;
1547
1548 /* Force update of the local copy of cmdGetInx */
1549 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
1550 lpfc_sli_resume_iocb(phba, pring);
1551
1552 if ((pring->lpfc_sli_cmd_available))
1553 (pring->lpfc_sli_cmd_available) (phba, pring);
1554
1555 }
1556
2e0fef85 1557 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB		 1558 return rc;
1559}
1560
dea3101e 1561int
2e0fef85
JS		 1562lpfc_sli_handle_slow_ring_event(struct lpfc_hba *phba,
1563 struct lpfc_sli_ring *pring, uint32_t mask)
dea3101e 1564{
ed957684
JS		 1565 struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
1566 &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
1567 &phba->slim2p->mbx.us.s2.port[pring->ringno];
dea3101e
JB		 1568 IOCB_t *entry;
1569 IOCB_t *irsp = NULL;
1570 struct lpfc_iocbq *rspiocbp = NULL;
1571 struct lpfc_iocbq *next_iocb;
1572 struct lpfc_iocbq *cmdiocbp;
1573 struct lpfc_iocbq *saveq;
dea3101e
JB		 1574 uint8_t iocb_cmd_type;
1575 lpfc_iocb_type type;
1576 uint32_t status, free_saveq;
1577 uint32_t portRspPut, portRspMax;
1578 int rc = 1;
1579 unsigned long iflag;
dea3101e 1580
2e0fef85 1581 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e
JB		 1582 pring->stats.iocb_event++;
1583
dea3101e
JB		 1584 /*
1585 * The next available response entry should never exceed the maximum
1586 * entries. If it does, treat it as an adapter hardware error.
1587 */
1588 portRspMax = pring->numRiocb;
1589 portRspPut = le32_to_cpu(pgp->rspPutInx);
1590 if (portRspPut >= portRspMax) {
1591 /*
1592 * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
1593 * rsp ring <portRspMax>
1594 */
ed957684 1595 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1596 "0303 Ring %d handler: portRspPut %d "
dea3101e 1597 "is bigger then rsp ring %d\n",
e8b62011 1598 pring->ringno, portRspPut, portRspMax);
dea3101e 1599
2e0fef85
JS		 1600 phba->link_state = LPFC_HBA_ERROR;
1601 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB		 1602
1603 phba->work_hs = HS_FFER3;
1604 lpfc_handle_eratt(phba);
1605
1606 return 1;
1607 }
1608
1609 rmb();
dea3101e
JB		 1610 while (pring->rspidx != portRspPut) {
1611 /*
1612 * Build a completion list and call the appropriate handler.
1613 * The process is to get the next available response iocb, get
1614 * a free iocb from the list, copy the response data into the
1615 * free iocb, insert to the continuation list, and update the
1616 * next response index to slim. This process makes response
1617 * iocb's in the ring available to DMA as fast as possible but
1618 * pays a penalty for a copy operation. Since the iocb is
1619 * only 32 bytes, this penalty is considered small relative to
1620 * the PCI reads for register values and a slim write. When
1621 * the ulpLe field is set, the entire Command has been
1622 * received.
1623 */
ed957684
JS		 1624 entry = lpfc_resp_iocb(phba, pring);
1625
858c9f6c 1626 phba->last_completion_time = jiffies;
2e0fef85 1627 rspiocbp = __lpfc_sli_get_iocbq(phba);
dea3101e
JB		 1628 if (rspiocbp == NULL) {
1629 printk(KERN_ERR "%s: out of buffers! Failing "
1630 "completion.\n", __FUNCTION__);
1631 break;
1632 }
1633
ed957684
JS		 1634 lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb,
1635 phba->iocb_rsp_size);
dea3101e
JB		 1636 irsp = &rspiocbp->iocb;
1637
1638 if (++pring->rspidx >= portRspMax)
1639 pring->rspidx = 0;
1640
a58cbd52
JS		 1641 if (pring->ringno == LPFC_ELS_RING) {
1642 lpfc_debugfs_slow_ring_trc(phba,
1643 "IOCB rsp ring: wd4:x%08x wd6:x%08x wd7:x%08x",
1644 *(((uint32_t *) irsp) + 4),
1645 *(((uint32_t *) irsp) + 6),
1646 *(((uint32_t *) irsp) + 7));
1647 }
1648
ed957684 1649 writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
dea3101e 1650
9c2face6 1651 list_add_tail(&rspiocbp->list, &(pring->iocb_continueq));
dea3101e
JB		 1652
1653 pring->iocb_continueq_cnt++;
1654 if (irsp->ulpLe) {
1655 /*
1656 * By default, the driver expects to free all resources
1657 * associated with this iocb completion.
1658 */
1659 free_saveq = 1;
1660 saveq = list_get_first(&pring->iocb_continueq,
1661 struct lpfc_iocbq, list);
1662 irsp = &(saveq->iocb);
1663 list_del_init(&pring->iocb_continueq);
1664 pring->iocb_continueq_cnt = 0;
1665
1666 pring->stats.iocb_rsp++;
1667
92d7f7b0
JS		 1668 /*
1669 * If resource errors reported from HBA, reduce
1670 * queuedepths of the SCSI device.
1671 */
1672 if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
1673 (irsp->un.ulpWord[4] == IOERR_NO_RESOURCES)) {
1674 spin_unlock_irqrestore(&phba->hbalock, iflag);
1675 lpfc_adjust_queue_depth(phba);
1676 spin_lock_irqsave(&phba->hbalock, iflag);
1677 }
1678
dea3101e
JB		 1679 if (irsp->ulpStatus) {
1680 /* Rsp ring <ringno> error: IOCB */
ed957684 1681 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 1682 "0328 Rsp Ring %d error: "
ed957684
JS		 1683 "IOCB Data: "
1684 "x%x x%x x%x x%x "
1685 "x%x x%x x%x x%x "
1686 "x%x x%x x%x x%x "
1687 "x%x x%x x%x x%x\n",
ed957684
JS		 1688 pring->ringno,
1689 irsp->un.ulpWord[0],
1690 irsp->un.ulpWord[1],
1691 irsp->un.ulpWord[2],
1692 irsp->un.ulpWord[3],
1693 irsp->un.ulpWord[4],
1694 irsp->un.ulpWord[5],
1695 *(((uint32_t *) irsp) + 6),
1696 *(((uint32_t *) irsp) + 7),
1697 *(((uint32_t *) irsp) + 8),
1698 *(((uint32_t *) irsp) + 9),
1699 *(((uint32_t *) irsp) + 10),
1700 *(((uint32_t *) irsp) + 11),
1701 *(((uint32_t *) irsp) + 12),
1702 *(((uint32_t *) irsp) + 13),
1703 *(((uint32_t *) irsp) + 14),
1704 *(((uint32_t *) irsp) + 15));
dea3101e
JB		 1705 }
1706
1707 /*
1708 * Fetch the IOCB command type and call the correct
1709 * completion routine. Solicited and Unsolicited
1710 * IOCBs on the ELS ring get freed back to the
1711 * lpfc_iocb_list by the discovery kernel thread.
1712 */
1713 iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
1714 type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
1715 if (type == LPFC_SOL_IOCB) {
9c2face6 1716 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e 1717 rc = lpfc_sli_process_sol_iocb(phba, pring,
2e0fef85
JS		 1718 saveq);
1719 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e 1720 } else if (type == LPFC_UNSOL_IOCB) {
9c2face6 1721 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e 1722 rc = lpfc_sli_process_unsol_iocb(phba, pring,
2e0fef85
JS		 1723 saveq);
1724 spin_lock_irqsave(&phba->hbalock, iflag);
9c2face6
JS		 1725 if (!rc)
1726 free_saveq = 0;
dea3101e
JB		 1727 } else if (type == LPFC_ABORT_IOCB) {
1728 if ((irsp->ulpCommand != CMD_XRI_ABORTED_CX) &&
1729 ((cmdiocbp =
604a3e30
JB		 1730 lpfc_sli_iocbq_lookup(phba, pring,
1731 saveq)))) {
dea3101e
JB		 1732 /* Call the specified completion
1733 routine */
1734 if (cmdiocbp->iocb_cmpl) {
1735 spin_unlock_irqrestore(
2e0fef85 1736 &phba->hbalock,
dea3101e
JB		 1737 iflag);
1738 (cmdiocbp->iocb_cmpl) (phba,
1739 cmdiocbp, saveq);
1740 spin_lock_irqsave(
2e0fef85 1741 &phba->hbalock,
dea3101e 1742 iflag);
604a3e30 1743 } else
2e0fef85 1744 __lpfc_sli_release_iocbq(phba,
604a3e30 1745 cmdiocbp);
dea3101e
JB		 1746 }
1747 } else if (type == LPFC_UNKNOWN_IOCB) {
1748 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
1749
1750 char adaptermsg[LPFC_MAX_ADPTMSG];
1751
1752 memset(adaptermsg, 0,
1753 LPFC_MAX_ADPTMSG);
1754 memcpy(&adaptermsg[0], (uint8_t *) irsp,
1755 MAX_MSG_DATA);
1756 dev_warn(&((phba->pcidev)->dev),
898eb71c 1757 "lpfc%d: %s\n",
dea3101e
JB		 1758 phba->brd_no, adaptermsg);
1759 } else {
1760 /* Unknown IOCB command */
92d7f7b0 1761 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1762 "0335 Unknown IOCB "
92d7f7b0
JS		 1763 "command Data: x%x "
1764 "x%x x%x x%x\n",
92d7f7b0
JS		 1765 irsp->ulpCommand,
1766 irsp->ulpStatus,
1767 irsp->ulpIoTag,
1768 irsp->ulpContext);
dea3101e
JB		 1769 }
1770 }
1771
1772 if (free_saveq) {
2e0fef85
JS		 1773 list_for_each_entry_safe(rspiocbp, next_iocb,
1774 &saveq->list, list) {
1775 list_del(&rspiocbp->list);
1776 __lpfc_sli_release_iocbq(phba,
1777 rspiocbp);
dea3101e 1778 }
2e0fef85 1779 __lpfc_sli_release_iocbq(phba, saveq);
dea3101e 1780 }
92d7f7b0 1781 rspiocbp = NULL;
dea3101e
JB		 1782 }
1783
1784 /*
1785 * If the port response put pointer has not been updated, sync
1786 * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
1787 * response put pointer.
1788 */
1789 if (pring->rspidx == portRspPut) {
1790 portRspPut = le32_to_cpu(pgp->rspPutInx);
1791 }
1792 } /* while (pring->rspidx != portRspPut) */
1793
92d7f7b0 1794 if ((rspiocbp != NULL) && (mask & HA_R0RE_REQ)) {
dea3101e
JB		 1795 /* At least one response entry has been freed */
1796 pring->stats.iocb_rsp_full++;
1797 /* SET RxRE_RSP in Chip Att register */
1798 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
1799 writel(status, phba->CAregaddr);
1800 readl(phba->CAregaddr); /* flush */
1801 }
1802 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
1803 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
1804 pring->stats.iocb_cmd_empty++;
1805
1806 /* Force update of the local copy of cmdGetInx */
1807 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
1808 lpfc_sli_resume_iocb(phba, pring);
1809
1810 if ((pring->lpfc_sli_cmd_available))
1811 (pring->lpfc_sli_cmd_available) (phba, pring);
1812
1813 }
1814
2e0fef85 1815 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB		 1816 return rc;
1817}
1818
2e0fef85 1819void
dea3101e
JB		 1820lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
1821{
2534ba75 1822 LIST_HEAD(completions);
dea3101e 1823 struct lpfc_iocbq *iocb, *next_iocb;
2534ba75 1824 IOCB_t *cmd = NULL;
dea3101e 1825
92d7f7b0
JS		 1826 if (pring->ringno == LPFC_ELS_RING) {
1827 lpfc_fabric_abort_hba(phba);
1828 }
1829
dea3101e
JB		 1830 /* Error everything on txq and txcmplq
1831 * First do the txq.
1832 */
2e0fef85 1833 spin_lock_irq(&phba->hbalock);
2534ba75 1834 list_splice_init(&pring->txq, &completions);
dea3101e 1835 pring->txq_cnt = 0;
dea3101e
JB		 1836
1837 /* Next issue ABTS for everything on the txcmplq */
2534ba75
JS		 1838 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list)
1839 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
dea3101e 1840
2e0fef85 1841 spin_unlock_irq(&phba->hbalock);
dea3101e 1842
2534ba75
JS		 1843 while (!list_empty(&completions)) {
1844 iocb = list_get_first(&completions, struct lpfc_iocbq, list);
1845 cmd = &iocb->iocb;
92d7f7b0 1846 list_del_init(&iocb->list);
dea3101e 1847
2e0fef85
JS		 1848 if (!iocb->iocb_cmpl)
1849 lpfc_sli_release_iocbq(phba, iocb);
1850 else {
dea3101e
JB		 1851 cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
1852 cmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
dea3101e 1853 (iocb->iocb_cmpl) (phba, iocb, iocb);
2e0fef85 1854 }
dea3101e 1855 }
dea3101e
JB		 1856}
1857
41415862 1858int
2e0fef85 1859lpfc_sli_brdready(struct lpfc_hba *phba, uint32_t mask)
dea3101e 1860{
41415862
JW		 1861 uint32_t status;
1862 int i = 0;
1863 int retval = 0;
dea3101e 1864
41415862
JW		 1865 /* Read the HBA Host Status Register */
1866 status = readl(phba->HSregaddr);
dea3101e 1867
41415862
JW		 1868 /*
1869 * Check status register every 100ms for 5 retries, then every
1870 * 500ms for 5, then every 2.5 sec for 5, then reset board and
1871 * every 2.5 sec for 4.
1872 * Break our of the loop if errors occurred during init.
1873 */
1874 while (((status & mask) != mask) &&
1875 !(status & HS_FFERM) &&
1876 i++ < 20) {
dea3101e 1877
41415862
JW		 1878 if (i <= 5)
1879 msleep(10);
1880 else if (i <= 10)
1881 msleep(500);
1882 else
1883 msleep(2500);
dea3101e 1884
41415862 1885 if (i == 15) {
2e0fef85 1886 /* Do post */
92d7f7b0 1887 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862
JW		 1888 lpfc_sli_brdrestart(phba);
1889 }
1890 /* Read the HBA Host Status Register */
1891 status = readl(phba->HSregaddr);
1892 }
dea3101e 1893
41415862
JW		 1894 /* Check to see if any errors occurred during init */
1895 if ((status & HS_FFERM) || (i >= 20)) {
2e0fef85 1896 phba->link_state = LPFC_HBA_ERROR;
41415862 1897 retval = 1;
dea3101e 1898 }
dea3101e 1899
41415862
JW		 1900 return retval;
1901}
dea3101e 1902
9290831f
JS		 1903#define BARRIER_TEST_PATTERN (0xdeadbeef)
1904
2e0fef85 1905void lpfc_reset_barrier(struct lpfc_hba *phba)
9290831f 1906{
65a29c16
JS		 1907 uint32_t __iomem *resp_buf;
1908 uint32_t __iomem *mbox_buf;
9290831f
JS		 1909 volatile uint32_t mbox;
1910 uint32_t hc_copy;
1911 int i;
1912 uint8_t hdrtype;
1913
1914 pci_read_config_byte(phba->pcidev, PCI_HEADER_TYPE, &hdrtype);
1915 if (hdrtype != 0x80 ||
1916 (FC_JEDEC_ID(phba->vpd.rev.biuRev) != HELIOS_JEDEC_ID &&
1917 FC_JEDEC_ID(phba->vpd.rev.biuRev) != THOR_JEDEC_ID))
1918 return;
1919
1920 /*
1921 * Tell the other part of the chip to suspend temporarily all
1922 * its DMA activity.
1923 */
65a29c16 1924 resp_buf = phba->MBslimaddr;
9290831f
JS		 1925
1926 /* Disable the error attention */
1927 hc_copy = readl(phba->HCregaddr);
1928 writel((hc_copy & ~HC_ERINT_ENA), phba->HCregaddr);
1929 readl(phba->HCregaddr); /* flush */
2e0fef85 1930 phba->link_flag |= LS_IGNORE_ERATT;
9290831f
JS		 1931
1932 if (readl(phba->HAregaddr) & HA_ERATT) {
1933 /* Clear Chip error bit */
1934 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 1935 phba->pport->stopped = 1;
9290831f
JS		 1936 }
1937
1938 mbox = 0;
1939 ((MAILBOX_t *)&mbox)->mbxCommand = MBX_KILL_BOARD;
1940 ((MAILBOX_t *)&mbox)->mbxOwner = OWN_CHIP;
1941
1942 writel(BARRIER_TEST_PATTERN, (resp_buf + 1));
65a29c16 1943 mbox_buf = phba->MBslimaddr;
9290831f
JS		 1944 writel(mbox, mbox_buf);
1945
1946 for (i = 0;
1947 readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN) && i < 50; i++)
1948 mdelay(1);
1949
1950 if (readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN)) {
1951 if (phba->sli.sli_flag & LPFC_SLI2_ACTIVE ||
2e0fef85 1952 phba->pport->stopped)
9290831f
JS		 1953 goto restore_hc;
1954 else
1955 goto clear_errat;
1956 }
1957
1958 ((MAILBOX_t *)&mbox)->mbxOwner = OWN_HOST;
1959 for (i = 0; readl(resp_buf) != mbox && i < 500; i++)
1960 mdelay(1);
1961
1962clear_errat:
1963
1964 while (!(readl(phba->HAregaddr) & HA_ERATT) && ++i < 500)
1965 mdelay(1);
1966
1967 if (readl(phba->HAregaddr) & HA_ERATT) {
1968 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 1969 phba->pport->stopped = 1;
9290831f
JS		 1970 }
1971
1972restore_hc:
2e0fef85 1973 phba->link_flag &= ~LS_IGNORE_ERATT;
9290831f
JS		 1974 writel(hc_copy, phba->HCregaddr);
1975 readl(phba->HCregaddr); /* flush */
1976}
1977
41415862 1978int
2e0fef85 1979lpfc_sli_brdkill(struct lpfc_hba *phba)
41415862
JW		 1980{
1981 struct lpfc_sli *psli;
1982 LPFC_MBOXQ_t *pmb;
1983 uint32_t status;
1984 uint32_t ha_copy;
1985 int retval;
1986 int i = 0;
dea3101e 1987
41415862 1988 psli = &phba->sli;
dea3101e 1989
41415862 1990 /* Kill HBA */
ed957684 1991 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011
JS		 1992 "0329 Kill HBA Data: x%x x%x\n",
1993 phba->pport->port_state, psli->sli_flag);
41415862 1994
98c9ea5c
JS		 1995 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
1996 if (!pmb)
41415862 1997 return 1;
41415862
JW		 1998
1999 /* Disable the error attention */
2e0fef85 2000 spin_lock_irq(&phba->hbalock);
41415862
JW		 2001 status = readl(phba->HCregaddr);
2002 status &= ~HC_ERINT_ENA;
2003 writel(status, phba->HCregaddr);
2004 readl(phba->HCregaddr); /* flush */
2e0fef85
JS		 2005 phba->link_flag |= LS_IGNORE_ERATT;
2006 spin_unlock_irq(&phba->hbalock);
41415862
JW		 2007
2008 lpfc_kill_board(phba, pmb);
2009 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
2010 retval = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
2011
2012 if (retval != MBX_SUCCESS) {
2013 if (retval != MBX_BUSY)
2014 mempool_free(pmb, phba->mbox_mem_pool);
2e0fef85
JS		 2015 spin_lock_irq(&phba->hbalock);
2016 phba->link_flag &= ~LS_IGNORE_ERATT;
2017 spin_unlock_irq(&phba->hbalock);
41415862
JW		 2018 return 1;
2019 }
2020
9290831f
JS		 2021 psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
2022
41415862
JW		 2023 mempool_free(pmb, phba->mbox_mem_pool);
2024
2025 /* There is no completion for a KILL_BOARD mbox cmd. Check for an error
2026 * attention every 100ms for 3 seconds. If we don't get ERATT after
2027 * 3 seconds we still set HBA_ERROR state because the status of the
2028 * board is now undefined.
2029 */
2030 ha_copy = readl(phba->HAregaddr);
2031
2032 while ((i++ < 30) && !(ha_copy & HA_ERATT)) {
2033 mdelay(100);
2034 ha_copy = readl(phba->HAregaddr);
2035 }
2036
2037 del_timer_sync(&psli->mbox_tmo);
9290831f
JS		 2038 if (ha_copy & HA_ERATT) {
2039 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 2040 phba->pport->stopped = 1;
9290831f 2041 }
2e0fef85 2042 spin_lock_irq(&phba->hbalock);
41415862 2043 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85
JS		 2044 phba->link_flag &= ~LS_IGNORE_ERATT;
2045 spin_unlock_irq(&phba->hbalock);
41415862
JW		 2046
2047 psli->mbox_active = NULL;
2048 lpfc_hba_down_post(phba);
2e0fef85 2049 phba->link_state = LPFC_HBA_ERROR;
41415862 2050
2e0fef85 2051 return ha_copy & HA_ERATT ? 0 : 1;
dea3101e
JB		 2052}
2053
41415862 2054int
2e0fef85 2055lpfc_sli_brdreset(struct lpfc_hba *phba)
dea3101e 2056{
41415862 2057 struct lpfc_sli *psli;
dea3101e 2058 struct lpfc_sli_ring *pring;
41415862 2059 uint16_t cfg_value;
dea3101e 2060 int i;
dea3101e 2061
41415862 2062 psli = &phba->sli;
dea3101e 2063
41415862
JW		 2064 /* Reset HBA */
2065 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 2066 "0325 Reset HBA Data: x%x x%x\n",
2e0fef85 2067 phba->pport->port_state, psli->sli_flag);
dea3101e
JB		 2068
2069 /* perform board reset */
2070 phba->fc_eventTag = 0;
2e0fef85
JS		 2071 phba->pport->fc_myDID = 0;
2072 phba->pport->fc_prevDID = 0;
dea3101e 2073
41415862
JW		 2074 /* Turn off parity checking and serr during the physical reset */
2075 pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value);
2076 pci_write_config_word(phba->pcidev, PCI_COMMAND,
2077 (cfg_value &
2078 ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
2079
1c067a42 2080 psli->sli_flag &= ~(LPFC_SLI2_ACTIVE | LPFC_PROCESS_LA);
41415862
JW		 2081 /* Now toggle INITFF bit in the Host Control Register */
2082 writel(HC_INITFF, phba->HCregaddr);
2083 mdelay(1);
2084 readl(phba->HCregaddr); /* flush */
2085 writel(0, phba->HCregaddr);
2086 readl(phba->HCregaddr); /* flush */
2087
2088 /* Restore PCI cmd register */
2089 pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
dea3101e
JB		 2090
2091 /* Initialize relevant SLI info */
41415862
JW		 2092 for (i = 0; i < psli->num_rings; i++) {
2093 pring = &psli->ring[i];
dea3101e
JB		 2094 pring->flag = 0;
2095 pring->rspidx = 0;
2096 pring->next_cmdidx = 0;
2097 pring->local_getidx = 0;
2098 pring->cmdidx = 0;
2099 pring->missbufcnt = 0;
2100 }
dea3101e 2101
2e0fef85 2102 phba->link_state = LPFC_WARM_START;
41415862
JW		 2103 return 0;
2104}
2105
2106int
2e0fef85 2107lpfc_sli_brdrestart(struct lpfc_hba *phba)
41415862
JW		 2108{
2109 MAILBOX_t *mb;
2110 struct lpfc_sli *psli;
2111 uint16_t skip_post;
2112 volatile uint32_t word0;
2113 void __iomem *to_slim;
2114
2e0fef85 2115 spin_lock_irq(&phba->hbalock);
41415862
JW		 2116
2117 psli = &phba->sli;
2118
2119 /* Restart HBA */
2120 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 2121 "0337 Restart HBA Data: x%x x%x\n",
2e0fef85 2122 phba->pport->port_state, psli->sli_flag);
41415862
JW		 2123
2124 word0 = 0;
2125 mb = (MAILBOX_t *) &word0;
2126 mb->mbxCommand = MBX_RESTART;
2127 mb->mbxHc = 1;
2128
9290831f
JS		 2129 lpfc_reset_barrier(phba);
2130
41415862
JW		 2131 to_slim = phba->MBslimaddr;
2132 writel(*(uint32_t *) mb, to_slim);
2133 readl(to_slim); /* flush */
2134
2135 /* Only skip post after fc_ffinit is completed */
2e0fef85 2136 if (phba->pport->port_state) {
41415862
JW		 2137 skip_post = 1;
2138 word0 = 1; /* This is really setting up word1 */
dea3101e 2139 } else {
41415862
JW		 2140 skip_post = 0;
2141 word0 = 0; /* This is really setting up word1 */
dea3101e 2142 }
65a29c16 2143 to_slim = phba->MBslimaddr + sizeof (uint32_t);
41415862
JW		 2144 writel(*(uint32_t *) mb, to_slim);
2145 readl(to_slim); /* flush */
dea3101e 2146
41415862 2147 lpfc_sli_brdreset(phba);
2e0fef85
JS		 2148 phba->pport->stopped = 0;
2149 phba->link_state = LPFC_INIT_START;
41415862 2150
2e0fef85 2151 spin_unlock_irq(&phba->hbalock);
41415862 2152
64ba8818
JS		 2153 memset(&psli->lnk_stat_offsets, 0, sizeof(psli->lnk_stat_offsets));
2154 psli->stats_start = get_seconds();
2155
41415862
JW		 2156 if (skip_post)
2157 mdelay(100);
2158 else
2159 mdelay(2000);
2160
2161 lpfc_hba_down_post(phba);
dea3101e
JB		 2162
2163 return 0;
2164}
2165
2166static int
2167lpfc_sli_chipset_init(struct lpfc_hba *phba)
2168{
2169 uint32_t status, i = 0;
2170
2171 /* Read the HBA Host Status Register */
2172 status = readl(phba->HSregaddr);
2173
2174 /* Check status register to see what current state is */
2175 i = 0;
2176 while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
2177
2178 /* Check every 100ms for 5 retries, then every 500ms for 5, then
2179 * every 2.5 sec for 5, then reset board and every 2.5 sec for
2180 * 4.
2181 */
2182 if (i++ >= 20) {
2183 /* Adapter failed to init, timeout, status reg
2184 <status> */
ed957684 2185 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 2186 "0436 Adapter failed to init, "
09372820
JS		 2187 "timeout, status reg x%x, "
2188 "FW Data: A8 x%x AC x%x\n", status,
2189 readl(phba->MBslimaddr + 0xa8),
2190 readl(phba->MBslimaddr + 0xac));
2e0fef85 2191 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB		 2192 return -ETIMEDOUT;
2193 }
2194
2195 /* Check to see if any errors occurred during init */
2196 if (status & HS_FFERM) {
2197 /* ERROR: During chipset initialization */
2198 /* Adapter failed to init, chipset, status reg
2199 <status> */
ed957684 2200 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 2201 "0437 Adapter failed to init, "
09372820
JS		 2202 "chipset, status reg x%x, "
2203 "FW Data: A8 x%x AC x%x\n", status,
2204 readl(phba->MBslimaddr + 0xa8),
2205 readl(phba->MBslimaddr + 0xac));
2e0fef85 2206 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB		 2207 return -EIO;
2208 }
2209
2210 if (i <= 5) {
2211 msleep(10);
2212 } else if (i <= 10) {
2213 msleep(500);
2214 } else {
2215 msleep(2500);
2216 }
2217
2218 if (i == 15) {
2e0fef85 2219 /* Do post */
92d7f7b0 2220 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862 2221 lpfc_sli_brdrestart(phba);
dea3101e
JB		 2222 }
2223 /* Read the HBA Host Status Register */
2224 status = readl(phba->HSregaddr);
2225 }
2226
2227 /* Check to see if any errors occurred during init */
2228 if (status & HS_FFERM) {
2229 /* ERROR: During chipset initialization */
2230 /* Adapter failed to init, chipset, status reg <status> */
ed957684 2231 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 2232 "0438 Adapter failed to init, chipset, "
09372820
JS		 2233 "status reg x%x, "
2234 "FW Data: A8 x%x AC x%x\n", status,
2235 readl(phba->MBslimaddr + 0xa8),
2236 readl(phba->MBslimaddr + 0xac));
2e0fef85 2237 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB		 2238 return -EIO;
2239 }
2240
2241 /* Clear all interrupt enable conditions */
2242 writel(0, phba->HCregaddr);
2243 readl(phba->HCregaddr); /* flush */
2244
2245 /* setup host attn register */
2246 writel(0xffffffff, phba->HAregaddr);
2247 readl(phba->HAregaddr); /* flush */
2248 return 0;
2249}
2250
78b2d852 2251int
ed957684
JS		 2252lpfc_sli_hbq_count(void)
2253{
92d7f7b0 2254 return ARRAY_SIZE(lpfc_hbq_defs);
ed957684
JS		 2255}
2256
2257static int
2258lpfc_sli_hbq_entry_count(void)
2259{
2260 int hbq_count = lpfc_sli_hbq_count();
2261 int count = 0;
2262 int i;
2263
2264 for (i = 0; i < hbq_count; ++i)
92d7f7b0 2265 count += lpfc_hbq_defs[i]->entry_count;
ed957684
JS		 2266 return count;
2267}
2268
dea3101e 2269int
ed957684
JS		 2270lpfc_sli_hbq_size(void)
2271{
2272 return lpfc_sli_hbq_entry_count() * sizeof(struct lpfc_hbq_entry);
2273}
2274
2275static int
2276lpfc_sli_hbq_setup(struct lpfc_hba *phba)
2277{
2278 int hbq_count = lpfc_sli_hbq_count();
2279 LPFC_MBOXQ_t *pmb;
2280 MAILBOX_t *pmbox;
2281 uint32_t hbqno;
2282 uint32_t hbq_entry_index;
ed957684 2283
92d7f7b0
JS		 2284 /* Get a Mailbox buffer to setup mailbox
2285 * commands for HBA initialization
2286 */
ed957684
JS		 2287 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
2288
2289 if (!pmb)
2290 return -ENOMEM;
2291
2292 pmbox = &pmb->mb;
2293
2294 /* Initialize the struct lpfc_sli_hbq structure for each hbq */
2295 phba->link_state = LPFC_INIT_MBX_CMDS;
2296
2297 hbq_entry_index = 0;
2298 for (hbqno = 0; hbqno < hbq_count; ++hbqno) {
2299 phba->hbqs[hbqno].next_hbqPutIdx = 0;
2300 phba->hbqs[hbqno].hbqPutIdx = 0;
2301 phba->hbqs[hbqno].local_hbqGetIdx = 0;
2302 phba->hbqs[hbqno].entry_count =
92d7f7b0 2303 lpfc_hbq_defs[hbqno]->entry_count;
51ef4c26
JS		 2304 lpfc_config_hbq(phba, hbqno, lpfc_hbq_defs[hbqno],
2305 hbq_entry_index, pmb);
ed957684
JS		 2306 hbq_entry_index += phba->hbqs[hbqno].entry_count;
2307
2308 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
2309 /* Adapter failed to init, mbxCmd <cmd> CFG_RING,
2310 mbxStatus <status>, ring <num> */
2311
2312 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 2313 LOG_SLI | LOG_VPORT,
e8b62011 2314 "1805 Adapter failed to init. "
ed957684 2315 "Data: x%x x%x x%x\n",
e8b62011 2316 pmbox->mbxCommand,
ed957684
JS		 2317 pmbox->mbxStatus, hbqno);
2318
2319 phba->link_state = LPFC_HBA_ERROR;
2320 mempool_free(pmb, phba->mbox_mem_pool);
ed957684
JS		 2321 return ENXIO;
2322 }
2323 }
2324 phba->hbq_count = hbq_count;
2325
ed957684
JS		 2326 mempool_free(pmb, phba->mbox_mem_pool);
2327
92d7f7b0
JS		 2328 /* Initially populate or replenish the HBQs */
2329 for (hbqno = 0; hbqno < hbq_count; ++hbqno) {
2330 if (lpfc_sli_hbqbuf_init_hbqs(phba, hbqno))
2331 return -ENOMEM;
2332 }
ed957684
JS		 2333 return 0;
2334}
2335
2336static int
2337lpfc_do_config_port(struct lpfc_hba *phba, int sli_mode)
dea3101e
JB		 2338{
2339 LPFC_MBOXQ_t *pmb;
2340 uint32_t resetcount = 0, rc = 0, done = 0;
2341
2342 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
2343 if (!pmb) {
2e0fef85 2344 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB		 2345 return -ENOMEM;
2346 }
2347
ed957684 2348 phba->sli_rev = sli_mode;
dea3101e 2349 while (resetcount < 2 && !done) {
2e0fef85 2350 spin_lock_irq(&phba->hbalock);
1c067a42 2351 phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
2e0fef85 2352 spin_unlock_irq(&phba->hbalock);
92d7f7b0 2353 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862 2354 lpfc_sli_brdrestart(phba);
dea3101e
JB		 2355 msleep(2500);
2356 rc = lpfc_sli_chipset_init(phba);
2357 if (rc)
2358 break;
2359
2e0fef85 2360 spin_lock_irq(&phba->hbalock);
1c067a42 2361 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 2362 spin_unlock_irq(&phba->hbalock);
dea3101e
JB		 2363 resetcount++;
2364
ed957684
JS		 2365 /* Call pre CONFIG_PORT mailbox command initialization. A
2366 * value of 0 means the call was successful. Any other
2367 * nonzero value is a failure, but if ERESTART is returned,
2368 * the driver may reset the HBA and try again.
2369 */
dea3101e
JB		 2370 rc = lpfc_config_port_prep(phba);
2371 if (rc == -ERESTART) {
ed957684 2372 phba->link_state = LPFC_LINK_UNKNOWN;
dea3101e
JB		 2373 continue;
2374 } else if (rc) {
2375 break;
2376 }
2377
2e0fef85 2378 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e
JB		 2379 lpfc_config_port(phba, pmb);
2380 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
ed957684 2381 if (rc != MBX_SUCCESS) {
dea3101e 2382 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 2383 "0442 Adapter failed to init, mbxCmd x%x "
92d7f7b0 2384 "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
e8b62011 2385 pmb->mb.mbxCommand, pmb->mb.mbxStatus, 0);
2e0fef85 2386 spin_lock_irq(&phba->hbalock);
dea3101e 2387 phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
2e0fef85
JS		 2388 spin_unlock_irq(&phba->hbalock);
2389 rc = -ENXIO;
ed957684
JS		 2390 } else {
2391 done = 1;
92d7f7b0
JS		 2392 phba->max_vpi = (phba->max_vpi &&
2393 pmb->mb.un.varCfgPort.gmv) != 0
2394 ? pmb->mb.un.varCfgPort.max_vpi
2395 : 0;
dea3101e
JB		 2396 }
2397 }
ed957684
JS		 2398
2399 if (!done) {
2400 rc = -EINVAL;
2401 goto do_prep_failed;
2402 }
2403
2404 if ((pmb->mb.un.varCfgPort.sli_mode == 3) &&
92d7f7b0 2405 (!pmb->mb.un.varCfgPort.cMA)) {
ed957684 2406 rc = -ENXIO;
ed957684 2407 }
ed957684 2408
92d7f7b0 2409do_prep_failed:
ed957684
JS		 2410 mempool_free(pmb, phba->mbox_mem_pool);
2411 return rc;
2412}
2413
2414int
2415lpfc_sli_hba_setup(struct lpfc_hba *phba)
2416{
2417 uint32_t rc;
92d7f7b0 2418 int mode = 3;
ed957684
JS		 2419
2420 switch (lpfc_sli_mode) {
2421 case 2:
78b2d852 2422 if (phba->cfg_enable_npiv) {
92d7f7b0 2423 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
e8b62011 2424 "1824 NPIV enabled: Override lpfc_sli_mode "
92d7f7b0 2425 "parameter (%d) to auto (0).\n",
e8b62011 2426 lpfc_sli_mode);
92d7f7b0
JS		 2427 break;
2428 }
ed957684
JS		 2429 mode = 2;
2430 break;
2431 case 0:
2432 case 3:
2433 break;
2434 default:
92d7f7b0 2435 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
e8b62011
JS		 2436 "1819 Unrecognized lpfc_sli_mode "
2437 "parameter: %d.\n", lpfc_sli_mode);
ed957684
JS		 2438
2439 break;
2440 }
2441
2442 rc = lpfc_do_config_port(phba, mode);
2443 if (rc && lpfc_sli_mode == 3)
92d7f7b0 2444 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
e8b62011
JS		 2445 "1820 Unable to select SLI-3. "
2446 "Not supported by adapter.\n");
ed957684
JS		 2447 if (rc && mode != 2)
2448 rc = lpfc_do_config_port(phba, 2);
2449 if (rc)
dea3101e
JB		 2450 goto lpfc_sli_hba_setup_error;
2451
ed957684
JS		 2452 if (phba->sli_rev == 3) {
2453 phba->iocb_cmd_size = SLI3_IOCB_CMD_SIZE;
2454 phba->iocb_rsp_size = SLI3_IOCB_RSP_SIZE;
2455 phba->sli3_options |= LPFC_SLI3_ENABLED;
2456 phba->sli3_options |= LPFC_SLI3_HBQ_ENABLED;
2457
2458 } else {
2459 phba->iocb_cmd_size = SLI2_IOCB_CMD_SIZE;
2460 phba->iocb_rsp_size = SLI2_IOCB_RSP_SIZE;
92d7f7b0 2461 phba->sli3_options = 0;
ed957684
JS		 2462 }
2463
2464 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS		 2465 "0444 Firmware in SLI %x mode. Max_vpi %d\n",
2466 phba->sli_rev, phba->max_vpi);
ed957684 2467 rc = lpfc_sli_ring_map(phba);
dea3101e
JB		 2468
2469 if (rc)
2470 goto lpfc_sli_hba_setup_error;
2471
92d7f7b0 2472 /* Init HBQs */
ed957684
JS		 2473
2474 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
2475 rc = lpfc_sli_hbq_setup(phba);
2476 if (rc)
2477 goto lpfc_sli_hba_setup_error;
2478 }
2479
dea3101e
JB		 2480 phba->sli.sli_flag |= LPFC_PROCESS_LA;
2481
2482 rc = lpfc_config_port_post(phba);
2483 if (rc)
2484 goto lpfc_sli_hba_setup_error;
2485
ed957684
JS		 2486 return rc;
2487
92d7f7b0 2488lpfc_sli_hba_setup_error:
2e0fef85 2489 phba->link_state = LPFC_HBA_ERROR;
ed957684 2490 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011 2491 "0445 Firmware initialization failed\n");
dea3101e
JB		 2492 return rc;
2493}
2494
dea3101e
JB		 2495/*! lpfc_mbox_timeout
2496 *
2497 * \pre
2498 * \post
2499 * \param hba Pointer to per struct lpfc_hba structure
2500 * \param l1 Pointer to the driver's mailbox queue.
2501 * \return
2502 * void
2503 *
2504 * \b Description:
2505 *
2506 * This routine handles mailbox timeout events at timer interrupt context.
2507 */
2508void
2509lpfc_mbox_timeout(unsigned long ptr)
2510{
92d7f7b0 2511 struct lpfc_hba *phba = (struct lpfc_hba *) ptr;
dea3101e 2512 unsigned long iflag;
2e0fef85 2513 uint32_t tmo_posted;
dea3101e 2514
2e0fef85 2515 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
92d7f7b0 2516 tmo_posted = phba->pport->work_port_events & WORKER_MBOX_TMO;
2e0fef85
JS		 2517 if (!tmo_posted)
2518 phba->pport->work_port_events |= WORKER_MBOX_TMO;
2519 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
2520
2521 if (!tmo_posted) {
92d7f7b0 2522 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e 2523 if (phba->work_wait)
92d7f7b0
JS		 2524 lpfc_worker_wake_up(phba);
2525 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e 2526 }
dea3101e
JB		 2527}
2528
2529void
2530lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
2531{
2e0fef85
JS		 2532 LPFC_MBOXQ_t *pmbox = phba->sli.mbox_active;
2533 MAILBOX_t *mb = &pmbox->mb;
1dcb58e5
JS		 2534 struct lpfc_sli *psli = &phba->sli;
2535 struct lpfc_sli_ring *pring;
dea3101e 2536
2e0fef85 2537 if (!(phba->pport->work_port_events & WORKER_MBOX_TMO)) {
dea3101e
JB		 2538 return;
2539 }
2540
dea3101e 2541 /* Mbox cmd <mbxCommand> timeout */
ed957684 2542 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
e8b62011 2543 "0310 Mailbox command x%x timeout Data: x%x x%x x%p\n",
92d7f7b0
JS		 2544 mb->mbxCommand,
2545 phba->pport->port_state,
2546 phba->sli.sli_flag,
2547 phba->sli.mbox_active);
dea3101e 2548
1dcb58e5
JS		 2549 /* Setting state unknown so lpfc_sli_abort_iocb_ring
2550 * would get IOCB_ERROR from lpfc_sli_issue_iocb, allowing
2551 * it to fail all oustanding SCSI IO.
2552 */
2e0fef85
JS		 2553 spin_lock_irq(&phba->pport->work_port_lock);
2554 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
2555 spin_unlock_irq(&phba->pport->work_port_lock);
2556 spin_lock_irq(&phba->hbalock);
2557 phba->link_state = LPFC_LINK_UNKNOWN;
2558 phba->pport->fc_flag |= FC_ESTABLISH_LINK;
1dcb58e5 2559 psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
2e0fef85 2560 spin_unlock_irq(&phba->hbalock);
1dcb58e5
JS		 2561
2562 pring = &psli->ring[psli->fcp_ring];
2563 lpfc_sli_abort_iocb_ring(phba, pring);
2564
2565 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
76bb24ef 2566 "0345 Resetting board due to mailbox timeout\n");
1dcb58e5
JS		 2567 /*
2568 * lpfc_offline calls lpfc_sli_hba_down which will clean up
2569 * on oustanding mailbox commands.
2570 */
13815c83
JS		 2571 /* If resets are disabled then set error state and return. */
2572 if (!phba->cfg_enable_hba_reset) {
2573 phba->link_state = LPFC_HBA_ERROR;
2574 return;
2575 }
1dcb58e5
JS		 2576 lpfc_offline_prep(phba);
2577 lpfc_offline(phba);
2578 lpfc_sli_brdrestart(phba);
2579 if (lpfc_online(phba) == 0) /* Initialize the HBA */
2580 mod_timer(&phba->fc_estabtmo, jiffies + HZ * 60);
2581 lpfc_unblock_mgmt_io(phba);
dea3101e
JB		 2582 return;
2583}
2584
2585int
2e0fef85 2586lpfc_sli_issue_mbox(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmbox, uint32_t flag)
dea3101e 2587{
dea3101e 2588 MAILBOX_t *mb;
2e0fef85 2589 struct lpfc_sli *psli = &phba->sli;
dea3101e
JB		 2590 uint32_t status, evtctr;
2591 uint32_t ha_copy;
2592 int i;
09372820 2593 unsigned long timeout;
dea3101e
JB		 2594 unsigned long drvr_flag = 0;
2595 volatile uint32_t word0, ldata;
2596 void __iomem *to_slim;
2597
ed957684 2598 if (pmbox->mbox_cmpl && pmbox->mbox_cmpl != lpfc_sli_def_mbox_cmpl &&
92d7f7b0 2599 pmbox->mbox_cmpl != lpfc_sli_wake_mbox_wait) {
ed957684
JS		 2600 if(!pmbox->vport) {
2601 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 2602 LOG_MBOX | LOG_VPORT,
e8b62011 2603 "1806 Mbox x%x failed. No vport\n",
ed957684
JS		 2604 pmbox->mb.mbxCommand);
2605 dump_stack();
fa4066b6 2606 return MBX_NOT_FINISHED;
ed957684
JS		 2607 }
2608 }
2609
92d7f7b0 2610
8d63f375
LV		 2611 /* If the PCI channel is in offline state, do not post mbox. */
2612 if (unlikely(pci_channel_offline(phba->pcidev)))
2613 return MBX_NOT_FINISHED;
2614
2e0fef85 2615 spin_lock_irqsave(&phba->hbalock, drvr_flag);
dea3101e 2616 psli = &phba->sli;
92d7f7b0
JS		 2617
2618
dea3101e
JB		 2619 mb = &pmbox->mb;
2620 status = MBX_SUCCESS;
2621
2e0fef85
JS		 2622 if (phba->link_state == LPFC_HBA_ERROR) {
2623 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
41415862
JW		 2624
2625 /* Mbox command <mbxCommand> cannot issue */
7f5f3d0d 2626 LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
2e0fef85 2627 return MBX_NOT_FINISHED;
41415862
JW		 2628 }
2629
9290831f
JS		 2630 if (mb->mbxCommand != MBX_KILL_BOARD && flag & MBX_NOWAIT &&
2631 !(readl(phba->HCregaddr) & HC_MBINT_ENA)) {
2e0fef85 2632 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
7f5f3d0d 2633 LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
2e0fef85 2634 return MBX_NOT_FINISHED;
9290831f
JS		 2635 }
2636
dea3101e
JB		 2637 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
2638 /* Polling for a mbox command when another one is already active
2639 * is not allowed in SLI. Also, the driver must have established
2640 * SLI2 mode to queue and process multiple mbox commands.
2641 */
2642
2643 if (flag & MBX_POLL) {
2e0fef85 2644 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e
JB		 2645
2646 /* Mbox command <mbxCommand> cannot issue */
92d7f7b0 2647 LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
2e0fef85 2648 return MBX_NOT_FINISHED;
dea3101e
JB		 2649 }
2650
2651 if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
2e0fef85 2652 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 2653 /* Mbox command <mbxCommand> cannot issue */
92d7f7b0 2654 LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
2e0fef85 2655 return MBX_NOT_FINISHED;
dea3101e
JB		 2656 }
2657
dea3101e
JB		 2658 /* Another mailbox command is still being processed, queue this
2659 * command to be processed later.
2660 */
2661 lpfc_mbox_put(phba, pmbox);
2662
2663 /* Mbox cmd issue - BUSY */
ed957684 2664 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
e8b62011 2665 "(%d):0308 Mbox cmd issue - BUSY Data: "
92d7f7b0 2666 "x%x x%x x%x x%x\n",
92d7f7b0
JS		 2667 pmbox->vport ? pmbox->vport->vpi : 0xffffff,
2668 mb->mbxCommand, phba->pport->port_state,
2669 psli->sli_flag, flag);
dea3101e
JB		 2670
2671 psli->slistat.mbox_busy++;
2e0fef85 2672 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 2673
858c9f6c
JS		 2674 if (pmbox->vport) {
2675 lpfc_debugfs_disc_trc(pmbox->vport,
2676 LPFC_DISC_TRC_MBOX_VPORT,
2677 "MBOX Bsy vport: cmd:x%x mb:x%x x%x",
2678 (uint32_t)mb->mbxCommand,
2679 mb->un.varWords[0], mb->un.varWords[1]);
2680 }
2681 else {
2682 lpfc_debugfs_disc_trc(phba->pport,
2683 LPFC_DISC_TRC_MBOX,
2684 "MBOX Bsy: cmd:x%x mb:x%x x%x",
2685 (uint32_t)mb->mbxCommand,
2686 mb->un.varWords[0], mb->un.varWords[1]);
2687 }
2688
2e0fef85 2689 return MBX_BUSY;
dea3101e
JB		 2690 }
2691
dea3101e
JB		 2692 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
2693
2694 /* If we are not polling, we MUST be in SLI2 mode */
2695 if (flag != MBX_POLL) {
41415862
JW		 2696 if (!(psli->sli_flag & LPFC_SLI2_ACTIVE) &&
2697 (mb->mbxCommand != MBX_KILL_BOARD)) {
dea3101e 2698 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 2699 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 2700 /* Mbox command <mbxCommand> cannot issue */
92d7f7b0 2701 LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
2e0fef85 2702 return MBX_NOT_FINISHED;
dea3101e
JB		 2703 }
2704 /* timeout active mbox command */
a309a6b6
JS		 2705 mod_timer(&psli->mbox_tmo, (jiffies +
2706 (HZ * lpfc_mbox_tmo_val(phba, mb->mbxCommand))));
dea3101e
JB		 2707 }
2708
2709 /* Mailbox cmd <cmd> issue */
ed957684 2710 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
e8b62011 2711 "(%d):0309 Mailbox cmd x%x issue Data: x%x x%x "
92d7f7b0 2712 "x%x\n",
e8b62011 2713 pmbox->vport ? pmbox->vport->vpi : 0,
92d7f7b0
JS		 2714 mb->mbxCommand, phba->pport->port_state,
2715 psli->sli_flag, flag);
dea3101e 2716
858c9f6c
JS		 2717 if (mb->mbxCommand != MBX_HEARTBEAT) {
2718 if (pmbox->vport) {
2719 lpfc_debugfs_disc_trc(pmbox->vport,
2720 LPFC_DISC_TRC_MBOX_VPORT,
2721 "MBOX Send vport: cmd:x%x mb:x%x x%x",
2722 (uint32_t)mb->mbxCommand,
2723 mb->un.varWords[0], mb->un.varWords[1]);
2724 }
2725 else {
2726 lpfc_debugfs_disc_trc(phba->pport,
2727 LPFC_DISC_TRC_MBOX,
2728 "MBOX Send: cmd:x%x mb:x%x x%x",
2729 (uint32_t)mb->mbxCommand,
2730 mb->un.varWords[0], mb->un.varWords[1]);
2731 }
2732 }
2733
dea3101e
JB		 2734 psli->slistat.mbox_cmd++;
2735 evtctr = psli->slistat.mbox_event;
2736
2737 /* next set own bit for the adapter and copy over command word */
2738 mb->mbxOwner = OWN_CHIP;
2739
2740 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
dea3101e 2741 /* First copy command data to host SLIM area */
4cc2da1d 2742 lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx, MAILBOX_CMD_SIZE);
dea3101e 2743 } else {
9290831f 2744 if (mb->mbxCommand == MBX_CONFIG_PORT) {
dea3101e 2745 /* copy command data into host mbox for cmpl */
4cc2da1d 2746 lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx,
92d7f7b0 2747 MAILBOX_CMD_SIZE);
dea3101e
JB		 2748 }
2749
2750 /* First copy mbox command data to HBA SLIM, skip past first
2751 word */
2752 to_slim = phba->MBslimaddr + sizeof (uint32_t);
2753 lpfc_memcpy_to_slim(to_slim, &mb->un.varWords[0],
2754 MAILBOX_CMD_SIZE - sizeof (uint32_t));
2755
2756 /* Next copy over first word, with mbxOwner set */
2757 ldata = *((volatile uint32_t *)mb);
2758 to_slim = phba->MBslimaddr;
2759 writel(ldata, to_slim);
2760 readl(to_slim); /* flush */
2761
2762 if (mb->mbxCommand == MBX_CONFIG_PORT) {
2763 /* switch over to host mailbox */
2764 psli->sli_flag |= LPFC_SLI2_ACTIVE;
2765 }
2766 }
2767
2768 wmb();
dea3101e
JB		 2769
2770 switch (flag) {
2771 case MBX_NOWAIT:
09372820 2772 /* Set up reference to mailbox command */
dea3101e 2773 psli->mbox_active = pmbox;
09372820
JS		 2774 /* Interrupt board to do it */
2775 writel(CA_MBATT, phba->CAregaddr);
2776 readl(phba->CAregaddr); /* flush */
2777 /* Don't wait for it to finish, just return */
dea3101e
JB		 2778 break;
2779
2780 case MBX_POLL:
09372820 2781 /* Set up null reference to mailbox command */
dea3101e 2782 psli->mbox_active = NULL;
09372820
JS		 2783 /* Interrupt board to do it */
2784 writel(CA_MBATT, phba->CAregaddr);
2785 readl(phba->CAregaddr); /* flush */
2786
dea3101e
JB		 2787 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
2788 /* First read mbox status word */
4cc2da1d 2789 word0 = *((volatile uint32_t *)&phba->slim2p->mbx);
dea3101e
JB		 2790 word0 = le32_to_cpu(word0);
2791 } else {
2792 /* First read mbox status word */
2793 word0 = readl(phba->MBslimaddr);
2794 }
2795
2796 /* Read the HBA Host Attention Register */
2797 ha_copy = readl(phba->HAregaddr);
09372820
JS		 2798 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
2799 mb->mbxCommand) *
2800 1000) + jiffies;
2801 i = 0;
dea3101e 2802 /* Wait for command to complete */
41415862
JW		 2803 while (((word0 & OWN_CHIP) == OWN_CHIP) ||
2804 (!(ha_copy & HA_MBATT) &&
2e0fef85 2805 (phba->link_state > LPFC_WARM_START))) {
09372820 2806 if (time_after(jiffies, timeout)) {
dea3101e 2807 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 2808 spin_unlock_irqrestore(&phba->hbalock,
dea3101e 2809 drvr_flag);
2e0fef85 2810 return MBX_NOT_FINISHED;
dea3101e
JB		 2811 }
2812
2813 /* Check if we took a mbox interrupt while we were
2814 polling */
2815 if (((word0 & OWN_CHIP) != OWN_CHIP)
2816 && (evtctr != psli->slistat.mbox_event))
2817 break;
2818
09372820
JS		 2819 if (i++ > 10) {
2820 spin_unlock_irqrestore(&phba->hbalock,
2821 drvr_flag);
2822 msleep(1);
2823 spin_lock_irqsave(&phba->hbalock, drvr_flag);
2824 }
dea3101e
JB		 2825
2826 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
2827 /* First copy command data */
4cc2da1d
JSEC		 2828 word0 = *((volatile uint32_t *)
2829 &phba->slim2p->mbx);
dea3101e
JB		 2830 word0 = le32_to_cpu(word0);
2831 if (mb->mbxCommand == MBX_CONFIG_PORT) {
2832 MAILBOX_t *slimmb;
2833 volatile uint32_t slimword0;
2834 /* Check real SLIM for any errors */
2835 slimword0 = readl(phba->MBslimaddr);
2836 slimmb = (MAILBOX_t *) & slimword0;
2837 if (((slimword0 & OWN_CHIP) != OWN_CHIP)
2838 && slimmb->mbxStatus) {
2839 psli->sli_flag &=
2840 ~LPFC_SLI2_ACTIVE;
2841 word0 = slimword0;
2842 }
2843 }
2844 } else {
2845 /* First copy command data */
2846 word0 = readl(phba->MBslimaddr);
2847 }
2848 /* Read the HBA Host Attention Register */
2849 ha_copy = readl(phba->HAregaddr);
2850 }
2851
2852 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
dea3101e 2853 /* copy results back to user */
4cc2da1d 2854 lpfc_sli_pcimem_bcopy(&phba->slim2p->mbx, mb,
92d7f7b0 2855 MAILBOX_CMD_SIZE);
dea3101e
JB		 2856 } else {
2857 /* First copy command data */
2858 lpfc_memcpy_from_slim(mb, phba->MBslimaddr,
2859 MAILBOX_CMD_SIZE);
2860 if ((mb->mbxCommand == MBX_DUMP_MEMORY) &&
2861 pmbox->context2) {
92d7f7b0 2862 lpfc_memcpy_from_slim((void *)pmbox->context2,
dea3101e
JB		 2863 phba->MBslimaddr + DMP_RSP_OFFSET,
2864 mb->un.varDmp.word_cnt);
2865 }
2866 }
2867
2868 writel(HA_MBATT, phba->HAregaddr);
2869 readl(phba->HAregaddr); /* flush */
2870
2871 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2872 status = mb->mbxStatus;
2873 }
2874
2e0fef85
JS		 2875 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
2876 return status;
dea3101e
JB		 2877}
2878
92d7f7b0
JS		 2879/*
2880 * Caller needs to hold lock.
2881 */
858c9f6c 2882static void
92d7f7b0 2883__lpfc_sli_ringtx_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 2884 struct lpfc_iocbq *piocb)
dea3101e
JB		 2885{
2886 /* Insert the caller's iocb in the txq tail for later processing. */
2887 list_add_tail(&piocb->list, &pring->txq);
2888 pring->txq_cnt++;
dea3101e
JB		 2889}
2890
2891static struct lpfc_iocbq *
2892lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 2893 struct lpfc_iocbq **piocb)
dea3101e
JB		 2894{
2895 struct lpfc_iocbq * nextiocb;
2896
2897 nextiocb = lpfc_sli_ringtx_get(phba, pring);
2898 if (!nextiocb) {
2899 nextiocb = *piocb;
2900 *piocb = NULL;
2901 }
2902
2903 return nextiocb;
2904}
2905
92d7f7b0
JS		 2906/*
2907 * Lockless version of lpfc_sli_issue_iocb.
2908 */
98c9ea5c 2909static int
92d7f7b0 2910__lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
dea3101e
JB		 2911 struct lpfc_iocbq *piocb, uint32_t flag)
2912{
2913 struct lpfc_iocbq *nextiocb;
2914 IOCB_t *iocb;
2915
92d7f7b0
JS		 2916 if (piocb->iocb_cmpl && (!piocb->vport) &&
2917 (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
2918 (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
2919 lpfc_printf_log(phba, KERN_ERR,
2920 LOG_SLI | LOG_VPORT,
e8b62011 2921 "1807 IOCB x%x failed. No vport\n",
92d7f7b0
JS		 2922 piocb->iocb.ulpCommand);
2923 dump_stack();
2924 return IOCB_ERROR;
2925 }
2926
2927
8d63f375
LV		 2928 /* If the PCI channel is in offline state, do not post iocbs. */
2929 if (unlikely(pci_channel_offline(phba->pcidev)))
2930 return IOCB_ERROR;
2931
dea3101e
JB		 2932 /*
2933 * We should never get an IOCB if we are in a < LINK_DOWN state
2934 */
2e0fef85 2935 if (unlikely(phba->link_state < LPFC_LINK_DOWN))
dea3101e
JB		 2936 return IOCB_ERROR;
2937
2938 /*
2939 * Check to see if we are blocking IOCB processing because of a
0b727fea 2940 * outstanding event.
dea3101e 2941 */
0b727fea 2942 if (unlikely(pring->flag & LPFC_STOP_IOCB_EVENT))
dea3101e
JB		 2943 goto iocb_busy;
2944
2e0fef85 2945 if (unlikely(phba->link_state == LPFC_LINK_DOWN)) {
dea3101e 2946 /*
2680eeaa 2947 * Only CREATE_XRI, CLOSE_XRI, and QUE_RING_BUF
dea3101e
JB		 2948 * can be issued if the link is not up.
2949 */
2950 switch (piocb->iocb.ulpCommand) {
2951 case CMD_QUE_RING_BUF_CN:
2952 case CMD_QUE_RING_BUF64_CN:
dea3101e
JB		 2953 /*
2954 * For IOCBs, like QUE_RING_BUF, that have no rsp ring
2955 * completion, iocb_cmpl MUST be 0.
2956 */
2957 if (piocb->iocb_cmpl)
2958 piocb->iocb_cmpl = NULL;
2959 /*FALLTHROUGH*/
2960 case CMD_CREATE_XRI_CR:
2680eeaa
JS		 2961 case CMD_CLOSE_XRI_CN:
2962 case CMD_CLOSE_XRI_CX:
dea3101e
JB		 2963 break;
2964 default:
2965 goto iocb_busy;
2966 }
2967
2968 /*
2969 * For FCP commands, we must be in a state where we can process link
2970 * attention events.
2971 */
2972 } else if (unlikely(pring->ringno == phba->sli.fcp_ring &&
92d7f7b0 2973 !(phba->sli.sli_flag & LPFC_PROCESS_LA))) {
dea3101e 2974 goto iocb_busy;
92d7f7b0 2975 }
dea3101e 2976
dea3101e
JB		 2977 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
2978 (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
2979 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
2980
2981 if (iocb)
2982 lpfc_sli_update_ring(phba, pring);
2983 else
2984 lpfc_sli_update_full_ring(phba, pring);
2985
2986 if (!piocb)
2987 return IOCB_SUCCESS;
2988
2989 goto out_busy;
2990
2991 iocb_busy:
2992 pring->stats.iocb_cmd_delay++;
2993
2994 out_busy:
2995
2996 if (!(flag & SLI_IOCB_RET_IOCB)) {
92d7f7b0 2997 __lpfc_sli_ringtx_put(phba, pring, piocb);
dea3101e
JB		 2998 return IOCB_SUCCESS;
2999 }
3000
3001 return IOCB_BUSY;
3002}
3003
92d7f7b0
JS		 3004
3005int
3006lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
3007 struct lpfc_iocbq *piocb, uint32_t flag)
3008{
3009 unsigned long iflags;
3010 int rc;
3011
3012 spin_lock_irqsave(&phba->hbalock, iflags);
3013 rc = __lpfc_sli_issue_iocb(phba, pring, piocb, flag);
3014 spin_unlock_irqrestore(&phba->hbalock, iflags);
3015
3016 return rc;
3017}
3018
cf5bf97e
JW		 3019static int
3020lpfc_extra_ring_setup( struct lpfc_hba *phba)
3021{
3022 struct lpfc_sli *psli;
3023 struct lpfc_sli_ring *pring;
3024
3025 psli = &phba->sli;
3026
3027 /* Adjust cmd/rsp ring iocb entries more evenly */
a4bc3379
JS		 3028
3029 /* Take some away from the FCP ring */
cf5bf97e
JW		 3030 pring = &psli->ring[psli->fcp_ring];
3031 pring->numCiocb -= SLI2_IOCB_CMD_R1XTRA_ENTRIES;
3032 pring->numRiocb -= SLI2_IOCB_RSP_R1XTRA_ENTRIES;
3033 pring->numCiocb -= SLI2_IOCB_CMD_R3XTRA_ENTRIES;
3034 pring->numRiocb -= SLI2_IOCB_RSP_R3XTRA_ENTRIES;
3035
a4bc3379
JS		 3036 /* and give them to the extra ring */
3037 pring = &psli->ring[psli->extra_ring];
3038
cf5bf97e
JW		 3039 pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
3040 pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
3041 pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
3042 pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
3043
3044 /* Setup default profile for this ring */
3045 pring->iotag_max = 4096;
3046 pring->num_mask = 1;
3047 pring->prt[0].profile = 0; /* Mask 0 */
a4bc3379
JS		 3048 pring->prt[0].rctl = phba->cfg_multi_ring_rctl;
3049 pring->prt[0].type = phba->cfg_multi_ring_type;
cf5bf97e
JW		 3050 pring->prt[0].lpfc_sli_rcv_unsol_event = NULL;
3051 return 0;
3052}
3053
98c9ea5c 3054static void
57127f15
JS		 3055lpfc_sli_async_event_handler(struct lpfc_hba * phba,
3056 struct lpfc_sli_ring * pring, struct lpfc_iocbq * iocbq)
3057{
3058 IOCB_t *icmd;
3059 uint16_t evt_code;
3060 uint16_t temp;
3061 struct temp_event temp_event_data;
3062 struct Scsi_Host *shost;
3063
3064 icmd = &iocbq->iocb;
3065 evt_code = icmd->un.asyncstat.evt_code;
3066 temp = icmd->ulpContext;
3067
3068 if ((evt_code != ASYNC_TEMP_WARN) &&
3069 (evt_code != ASYNC_TEMP_SAFE)) {
3070 lpfc_printf_log(phba,
3071 KERN_ERR,
3072 LOG_SLI,
76bb24ef 3073 "0346 Ring %d handler: unexpected ASYNC_STATUS"
57127f15
JS		 3074 " evt_code 0x%x\n",
3075 pring->ringno,
3076 icmd->un.asyncstat.evt_code);
3077 return;
3078 }
3079 temp_event_data.data = (uint32_t)temp;
3080 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
3081 if (evt_code == ASYNC_TEMP_WARN) {
3082 temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
3083 lpfc_printf_log(phba,
09372820 3084 KERN_ERR,
57127f15 3085 LOG_TEMP,
76bb24ef 3086 "0347 Adapter is very hot, please take "
57127f15
JS		 3087 "corrective action. temperature : %d Celsius\n",
3088 temp);
3089 }
3090 if (evt_code == ASYNC_TEMP_SAFE) {
3091 temp_event_data.event_code = LPFC_NORMAL_TEMP;
3092 lpfc_printf_log(phba,
09372820 3093 KERN_ERR,
57127f15
JS		 3094 LOG_TEMP,
3095 "0340 Adapter temperature is OK now. "
3096 "temperature : %d Celsius\n",
3097 temp);
3098 }
3099
3100 /* Send temperature change event to applications */
3101 shost = lpfc_shost_from_vport(phba->pport);
3102 fc_host_post_vendor_event(shost, fc_get_event_number(),
3103 sizeof(temp_event_data), (char *) &temp_event_data,
3104 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
3105
3106}
3107
3108
dea3101e
JB		 3109int
3110lpfc_sli_setup(struct lpfc_hba *phba)
3111{
ed957684 3112 int i, totiocbsize = 0;
dea3101e
JB		 3113 struct lpfc_sli *psli = &phba->sli;
3114 struct lpfc_sli_ring *pring;
3115
3116 psli->num_rings = MAX_CONFIGURED_RINGS;
3117 psli->sli_flag = 0;
3118 psli->fcp_ring = LPFC_FCP_RING;
3119 psli->next_ring = LPFC_FCP_NEXT_RING;
a4bc3379 3120 psli->extra_ring = LPFC_EXTRA_RING;
dea3101e 3121
604a3e30
JB		 3122 psli->iocbq_lookup = NULL;
3123 psli->iocbq_lookup_len = 0;
3124 psli->last_iotag = 0;
3125
dea3101e
JB		 3126 for (i = 0; i < psli->num_rings; i++) {
3127 pring = &psli->ring[i];
3128 switch (i) {
3129 case LPFC_FCP_RING: /* ring 0 - FCP */
3130 /* numCiocb and numRiocb are used in config_port */
3131 pring->numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
3132 pring->numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
3133 pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
3134 pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
3135 pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
3136 pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
ed957684 3137 pring->sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 3138 SLI3_IOCB_CMD_SIZE :
3139 SLI2_IOCB_CMD_SIZE;
ed957684 3140 pring->sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 3141 SLI3_IOCB_RSP_SIZE :
3142 SLI2_IOCB_RSP_SIZE;
dea3101e
JB		 3143 pring->iotag_ctr = 0;
3144 pring->iotag_max =
92d7f7b0 3145 (phba->cfg_hba_queue_depth * 2);
dea3101e
JB		 3146 pring->fast_iotag = pring->iotag_max;
3147 pring->num_mask = 0;
3148 break;
a4bc3379 3149 case LPFC_EXTRA_RING: /* ring 1 - EXTRA */
dea3101e
JB		 3150 /* numCiocb and numRiocb are used in config_port */
3151 pring->numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
3152 pring->numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
ed957684 3153 pring->sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 3154 SLI3_IOCB_CMD_SIZE :
3155 SLI2_IOCB_CMD_SIZE;
ed957684 3156 pring->sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 3157 SLI3_IOCB_RSP_SIZE :
3158 SLI2_IOCB_RSP_SIZE;
2e0fef85 3159 pring->iotag_max = phba->cfg_hba_queue_depth;
dea3101e
JB		 3160 pring->num_mask = 0;
3161 break;
3162 case LPFC_ELS_RING: /* ring 2 - ELS / CT */
3163 /* numCiocb and numRiocb are used in config_port */
3164 pring->numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
3165 pring->numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
ed957684 3166 pring->sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 3167 SLI3_IOCB_CMD_SIZE :
3168 SLI2_IOCB_CMD_SIZE;
ed957684 3169 pring->sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 3170 SLI3_IOCB_RSP_SIZE :
3171 SLI2_IOCB_RSP_SIZE;
dea3101e
JB		 3172 pring->fast_iotag = 0;
3173 pring->iotag_ctr = 0;
3174 pring->iotag_max = 4096;
57127f15
JS		 3175 pring->lpfc_sli_rcv_async_status =
3176 lpfc_sli_async_event_handler;
dea3101e
JB		 3177 pring->num_mask = 4;
3178 pring->prt[0].profile = 0; /* Mask 0 */
3179 pring->prt[0].rctl = FC_ELS_REQ;
3180 pring->prt[0].type = FC_ELS_DATA;
3181 pring->prt[0].lpfc_sli_rcv_unsol_event =
92d7f7b0 3182 lpfc_els_unsol_event;
dea3101e
JB		 3183 pring->prt[1].profile = 0; /* Mask 1 */
3184 pring->prt[1].rctl = FC_ELS_RSP;
3185 pring->prt[1].type = FC_ELS_DATA;
3186 pring->prt[1].lpfc_sli_rcv_unsol_event =
92d7f7b0 3187 lpfc_els_unsol_event;
dea3101e
JB		 3188 pring->prt[2].profile = 0; /* Mask 2 */
3189 /* NameServer Inquiry */
3190 pring->prt[2].rctl = FC_UNSOL_CTL;
3191 /* NameServer */
3192 pring->prt[2].type = FC_COMMON_TRANSPORT_ULP;
3193 pring->prt[2].lpfc_sli_rcv_unsol_event =
92d7f7b0 3194 lpfc_ct_unsol_event;
dea3101e
JB		 3195 pring->prt[3].profile = 0; /* Mask 3 */
3196 /* NameServer response */
3197 pring->prt[3].rctl = FC_SOL_CTL;
3198 /* NameServer */
3199 pring->prt[3].type = FC_COMMON_TRANSPORT_ULP;
3200 pring->prt[3].lpfc_sli_rcv_unsol_event =
92d7f7b0 3201 lpfc_ct_unsol_event;
dea3101e
JB		 3202 break;
3203 }
ed957684 3204 totiocbsize += (pring->numCiocb * pring->sizeCiocb) +
92d7f7b0 3205 (pring->numRiocb * pring->sizeRiocb);
dea3101e 3206 }
ed957684 3207 if (totiocbsize > MAX_SLIM_IOCB_SIZE) {
dea3101e 3208 /* Too many cmd / rsp ring entries in SLI2 SLIM */
e8b62011
JS		 3209 printk(KERN_ERR "%d:0462 Too many cmd / rsp ring entries in "
3210 "SLI2 SLIM Data: x%x x%lx\n",
3211 phba->brd_no, totiocbsize,
3212 (unsigned long) MAX_SLIM_IOCB_SIZE);
dea3101e 3213 }
cf5bf97e
JW		 3214 if (phba->cfg_multi_ring_support == 2)
3215 lpfc_extra_ring_setup(phba);
dea3101e
JB		 3216
3217 return 0;
3218}
3219
3220int
2e0fef85 3221lpfc_sli_queue_setup(struct lpfc_hba *phba)
dea3101e
JB		 3222{
3223 struct lpfc_sli *psli;
3224 struct lpfc_sli_ring *pring;
604a3e30 3225 int i;
dea3101e
JB		 3226
3227 psli = &phba->sli;
2e0fef85 3228 spin_lock_irq(&phba->hbalock);
dea3101e 3229 INIT_LIST_HEAD(&psli->mboxq);
92d7f7b0 3230 INIT_LIST_HEAD(&psli->mboxq_cmpl);
dea3101e
JB		 3231 /* Initialize list headers for txq and txcmplq as double linked lists */
3232 for (i = 0; i < psli->num_rings; i++) {
3233 pring = &psli->ring[i];
3234 pring->ringno = i;
3235 pring->next_cmdidx = 0;
3236 pring->local_getidx = 0;
3237 pring->cmdidx = 0;
3238 INIT_LIST_HEAD(&pring->txq);
3239 INIT_LIST_HEAD(&pring->txcmplq);
3240 INIT_LIST_HEAD(&pring->iocb_continueq);
9c2face6 3241 INIT_LIST_HEAD(&pring->iocb_continue_saveq);
dea3101e 3242 INIT_LIST_HEAD(&pring->postbufq);
dea3101e 3243 }
2e0fef85
JS		 3244 spin_unlock_irq(&phba->hbalock);
3245 return 1;
dea3101e
JB		 3246}
3247
92d7f7b0
JS		 3248int
3249lpfc_sli_host_down(struct lpfc_vport *vport)
3250{
858c9f6c 3251 LIST_HEAD(completions);
92d7f7b0
JS		 3252 struct lpfc_hba *phba = vport->phba;
3253 struct lpfc_sli *psli = &phba->sli;
3254 struct lpfc_sli_ring *pring;
3255 struct lpfc_iocbq *iocb, *next_iocb;
92d7f7b0
JS		 3256 int i;
3257 unsigned long flags = 0;
3258 uint16_t prev_pring_flag;
3259
3260 lpfc_cleanup_discovery_resources(vport);
3261
3262 spin_lock_irqsave(&phba->hbalock, flags);
92d7f7b0
JS		 3263 for (i = 0; i < psli->num_rings; i++) {
3264 pring = &psli->ring[i];
3265 prev_pring_flag = pring->flag;
858c9f6c
JS		 3266 if (pring->ringno == LPFC_ELS_RING) /* Only slow rings */
3267 pring->flag |= LPFC_DEFERRED_RING_EVENT;
92d7f7b0
JS		 3268 /*
3269 * Error everything on the txq since these iocbs have not been
3270 * given to the FW yet.
3271 */
92d7f7b0
JS		 3272 list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
3273 if (iocb->vport != vport)
3274 continue;
858c9f6c 3275 list_move_tail(&iocb->list, &completions);
92d7f7b0 3276 pring->txq_cnt--;
92d7f7b0
JS		 3277 }
3278
3279 /* Next issue ABTS for everything on the txcmplq */
3280 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq,
3281 list) {
3282 if (iocb->vport != vport)
3283 continue;
3284 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
3285 }
3286
3287 pring->flag = prev_pring_flag;
3288 }
3289
3290 spin_unlock_irqrestore(&phba->hbalock, flags);
3291
858c9f6c
JS		 3292 while (!list_empty(&completions)) {
3293 list_remove_head(&completions, iocb, struct lpfc_iocbq, list);
3294
3295 if (!iocb->iocb_cmpl)
3296 lpfc_sli_release_iocbq(phba, iocb);
3297 else {
3298 iocb->iocb.ulpStatus = IOSTAT_LOCAL_REJECT;
3299 iocb->iocb.un.ulpWord[4] = IOERR_SLI_DOWN;
3300 (iocb->iocb_cmpl) (phba, iocb, iocb);
3301 }
3302 }
92d7f7b0
JS		 3303 return 1;
3304}
3305
dea3101e 3306int
2e0fef85 3307lpfc_sli_hba_down(struct lpfc_hba *phba)
dea3101e 3308{
2534ba75 3309 LIST_HEAD(completions);
2e0fef85 3310 struct lpfc_sli *psli = &phba->sli;
dea3101e 3311 struct lpfc_sli_ring *pring;
0ff10d46 3312 struct lpfc_dmabuf *buf_ptr;
dea3101e 3313 LPFC_MBOXQ_t *pmb;
2534ba75
JS		 3314 struct lpfc_iocbq *iocb;
3315 IOCB_t *cmd = NULL;
dea3101e
JB		 3316 int i;
3317 unsigned long flags = 0;
3318
dea3101e
JB		 3319 lpfc_hba_down_prep(phba);
3320
92d7f7b0
JS		 3321 lpfc_fabric_abort_hba(phba);
3322
2e0fef85 3323 spin_lock_irqsave(&phba->hbalock, flags);
dea3101e
JB		 3324 for (i = 0; i < psli->num_rings; i++) {
3325 pring = &psli->ring[i];
858c9f6c
JS		 3326 if (pring->ringno == LPFC_ELS_RING) /* Only slow rings */
3327 pring->flag |= LPFC_DEFERRED_RING_EVENT;
dea3101e
JB		 3328
3329 /*
3330 * Error everything on the txq since these iocbs have not been
3331 * given to the FW yet.
3332 */
2534ba75 3333 list_splice_init(&pring->txq, &completions);
dea3101e
JB		 3334 pring->txq_cnt = 0;
3335
2534ba75 3336 }
2e0fef85 3337 spin_unlock_irqrestore(&phba->hbalock, flags);
dea3101e 3338
2534ba75 3339 while (!list_empty(&completions)) {
92d7f7b0 3340 list_remove_head(&completions, iocb, struct lpfc_iocbq, list);
2534ba75 3341 cmd = &iocb->iocb;
dea3101e 3342
2e0fef85
JS		 3343 if (!iocb->iocb_cmpl)
3344 lpfc_sli_release_iocbq(phba, iocb);
3345 else {
2534ba75
JS		 3346 cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
3347 cmd->un.ulpWord[4] = IOERR_SLI_DOWN;
3348 (iocb->iocb_cmpl) (phba, iocb, iocb);
2e0fef85 3349 }
dea3101e
JB		 3350 }
3351
0ff10d46
JS		 3352 spin_lock_irqsave(&phba->hbalock, flags);
3353 list_splice_init(&phba->elsbuf, &completions);
3354 phba->elsbuf_cnt = 0;
3355 phba->elsbuf_prev_cnt = 0;
3356 spin_unlock_irqrestore(&phba->hbalock, flags);
3357
3358 while (!list_empty(&completions)) {
3359 list_remove_head(&completions, buf_ptr,
3360 struct lpfc_dmabuf, list);
3361 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
3362 kfree(buf_ptr);
3363 }
3364
dea3101e
JB		 3365 /* Return any active mbox cmds */
3366 del_timer_sync(&psli->mbox_tmo);
92d7f7b0 3367 spin_lock_irqsave(&phba->hbalock, flags);
2e0fef85 3368
92d7f7b0 3369 spin_lock(&phba->pport->work_port_lock);
2e0fef85 3370 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
92d7f7b0 3371 spin_unlock(&phba->pport->work_port_lock);
2e0fef85 3372
92d7f7b0
JS		 3373 if (psli->mbox_active) {
3374 list_add_tail(&psli->mbox_active->list, &completions);
2e0fef85 3375 psli->mbox_active = NULL;
2e0fef85 3376 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
dea3101e 3377 }
dea3101e 3378
92d7f7b0
JS		 3379 /* Return any pending or completed mbox cmds */
3380 list_splice_init(&phba->sli.mboxq, &completions);
3381 list_splice_init(&phba->sli.mboxq_cmpl, &completions);
3382 INIT_LIST_HEAD(&psli->mboxq);
3383 INIT_LIST_HEAD(&psli->mboxq_cmpl);
3384
3385 spin_unlock_irqrestore(&phba->hbalock, flags);
3386
3387 while (!list_empty(&completions)) {
3388 list_remove_head(&completions, pmb, LPFC_MBOXQ_t, list);
dea3101e
JB		 3389 pmb->mb.mbxStatus = MBX_NOT_FINISHED;
3390 if (pmb->mbox_cmpl) {
dea3101e 3391 pmb->mbox_cmpl(phba,pmb);
dea3101e
JB		 3392 }
3393 }
dea3101e
JB		 3394 return 1;
3395}
3396
3397void
3398lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
3399{
3400 uint32_t *src = srcp;
3401 uint32_t *dest = destp;
3402 uint32_t ldata;
3403 int i;
3404
3405 for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
3406 ldata = *src;
3407 ldata = le32_to_cpu(ldata);
3408 *dest = ldata;
3409 src++;
3410 dest++;
3411 }
3412}
3413
3414int
2e0fef85
JS		 3415lpfc_sli_ringpostbuf_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
3416 struct lpfc_dmabuf *mp)
dea3101e
JB		 3417{
3418 /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
3419 later */
2e0fef85 3420 spin_lock_irq(&phba->hbalock);
dea3101e 3421 list_add_tail(&mp->list, &pring->postbufq);
dea3101e 3422 pring->postbufq_cnt++;
2e0fef85 3423 spin_unlock_irq(&phba->hbalock);
dea3101e
JB		 3424 return 0;
3425}
3426
76bb24ef
JS		 3427uint32_t
3428lpfc_sli_get_buffer_tag(struct lpfc_hba *phba)
3429{
3430 spin_lock_irq(&phba->hbalock);
3431 phba->buffer_tag_count++;
3432 /*
3433 * Always set the QUE_BUFTAG_BIT to distiguish between
3434 * a tag assigned by HBQ.
3435 */
3436 phba->buffer_tag_count |= QUE_BUFTAG_BIT;
3437 spin_unlock_irq(&phba->hbalock);
3438 return phba->buffer_tag_count;
3439}
3440
3441struct lpfc_dmabuf *
3442lpfc_sli_ring_taggedbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
3443 uint32_t tag)
3444{
3445 struct lpfc_dmabuf *mp, *next_mp;
3446 struct list_head *slp = &pring->postbufq;
3447
3448 /* Search postbufq, from the begining, looking for a match on tag */
3449 spin_lock_irq(&phba->hbalock);
3450 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
3451 if (mp->buffer_tag == tag) {
3452 list_del_init(&mp->list);
3453 pring->postbufq_cnt--;
3454 spin_unlock_irq(&phba->hbalock);
3455 return mp;
3456 }
3457 }
3458
3459 spin_unlock_irq(&phba->hbalock);
3460 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
3461 "0410 Cannot find virtual addr for buffer tag on "
3462 "ring %d Data x%lx x%p x%p x%x\n",
3463 pring->ringno, (unsigned long) tag,
3464 slp->next, slp->prev, pring->postbufq_cnt);
3465
3466 return NULL;
3467}
dea3101e
JB		 3468
3469struct lpfc_dmabuf *
3470lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
3471 dma_addr_t phys)
3472{
3473 struct lpfc_dmabuf *mp, *next_mp;
3474 struct list_head *slp = &pring->postbufq;
3475
3476 /* Search postbufq, from the begining, looking for a match on phys */
2e0fef85 3477 spin_lock_irq(&phba->hbalock);
dea3101e
JB		 3478 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
3479 if (mp->phys == phys) {
3480 list_del_init(&mp->list);
3481 pring->postbufq_cnt--;
2e0fef85 3482 spin_unlock_irq(&phba->hbalock);
dea3101e
JB		 3483 return mp;
3484 }
3485 }
3486
2e0fef85 3487 spin_unlock_irq(&phba->hbalock);
dea3101e 3488 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 3489 "0410 Cannot find virtual addr for mapped buf on "
dea3101e 3490 "ring %d Data x%llx x%p x%p x%x\n",
e8b62011 3491 pring->ringno, (unsigned long long)phys,
dea3101e
JB		 3492 slp->next, slp->prev, pring->postbufq_cnt);
3493 return NULL;
3494}
3495
3496static void
2e0fef85
JS		 3497lpfc_sli_abort_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
3498 struct lpfc_iocbq *rspiocb)
dea3101e 3499{
2e0fef85 3500 IOCB_t *irsp = &rspiocb->iocb;
2680eeaa 3501 uint16_t abort_iotag, abort_context;
92d7f7b0 3502 struct lpfc_iocbq *abort_iocb;
2680eeaa
JS		 3503 struct lpfc_sli_ring *pring = &phba->sli.ring[LPFC_ELS_RING];
3504
3505 abort_iocb = NULL;
2680eeaa
JS		 3506
3507 if (irsp->ulpStatus) {
3508 abort_context = cmdiocb->iocb.un.acxri.abortContextTag;
3509 abort_iotag = cmdiocb->iocb.un.acxri.abortIoTag;
3510
2e0fef85 3511 spin_lock_irq(&phba->hbalock);
2680eeaa
JS		 3512 if (abort_iotag != 0 && abort_iotag <= phba->sli.last_iotag)
3513 abort_iocb = phba->sli.iocbq_lookup[abort_iotag];
3514
92d7f7b0 3515 lpfc_printf_log(phba, KERN_INFO, LOG_ELS | LOG_SLI,
e8b62011 3516 "0327 Cannot abort els iocb %p "
92d7f7b0
JS		 3517 "with tag %x context %x, abort status %x, "
3518 "abort code %x\n",
e8b62011
JS		 3519 abort_iocb, abort_iotag, abort_context,
3520 irsp->ulpStatus, irsp->un.ulpWord[4]);
2680eeaa
JS		 3521
3522 /*
3523 * make sure we have the right iocbq before taking it
3524 * off the txcmplq and try to call completion routine.
3525 */
2e0fef85
JS		 3526 if (!abort_iocb ||
3527 abort_iocb->iocb.ulpContext != abort_context ||
3528 (abort_iocb->iocb_flag & LPFC_DRIVER_ABORTED) == 0)
3529 spin_unlock_irq(&phba->hbalock);
3530 else {
92d7f7b0 3531 list_del_init(&abort_iocb->list);
2680eeaa 3532 pring->txcmplq_cnt--;
2e0fef85 3533 spin_unlock_irq(&phba->hbalock);
2680eeaa 3534
0ff10d46
JS		 3535 /* Firmware could still be in progress of DMAing
3536 * payload, so don't free data buffer till after
3537 * a hbeat.
3538 */
3539 abort_iocb->iocb_flag |= LPFC_DELAY_MEM_FREE;
3540
92d7f7b0
JS		 3541 abort_iocb->iocb_flag &= ~LPFC_DRIVER_ABORTED;
3542 abort_iocb->iocb.ulpStatus = IOSTAT_LOCAL_REJECT;
3543 abort_iocb->iocb.un.ulpWord[4] = IOERR_SLI_ABORTED;
3544 (abort_iocb->iocb_cmpl)(phba, abort_iocb, abort_iocb);
2680eeaa
JS		 3545 }
3546 }
3547
604a3e30 3548 lpfc_sli_release_iocbq(phba, cmdiocb);
dea3101e
JB		 3549 return;
3550}
3551
92d7f7b0
JS		 3552static void
3553lpfc_ignore_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
3554 struct lpfc_iocbq *rspiocb)
3555{
3556 IOCB_t *irsp = &rspiocb->iocb;
3557
3558 /* ELS cmd tag <ulpIoTag> completes */
3559 lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
e8b62011 3560 "0133 Ignoring ELS cmd tag x%x completion Data: "
92d7f7b0 3561 "x%x x%x x%x\n",
e8b62011 3562 irsp->ulpIoTag, irsp->ulpStatus,
92d7f7b0 3563 irsp->un.ulpWord[4], irsp->ulpTimeout);
858c9f6c
JS		 3564 if (cmdiocb->iocb.ulpCommand == CMD_GEN_REQUEST64_CR)
3565 lpfc_ct_free_iocb(phba, cmdiocb);
3566 else
3567 lpfc_els_free_iocb(phba, cmdiocb);
92d7f7b0
JS		 3568 return;
3569}
3570
dea3101e 3571int
2e0fef85
JS		 3572lpfc_sli_issue_abort_iotag(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
3573 struct lpfc_iocbq *cmdiocb)
dea3101e 3574{
2e0fef85 3575 struct lpfc_vport *vport = cmdiocb->vport;
0bd4ca25 3576 struct lpfc_iocbq *abtsiocbp;
dea3101e
JB		 3577 IOCB_t *icmd = NULL;
3578 IOCB_t *iabt = NULL;
07951076
JS		 3579 int retval = IOCB_ERROR;
3580
92d7f7b0
JS		 3581 /*
3582 * There are certain command types we don't want to abort. And we
3583 * don't want to abort commands that are already in the process of
3584 * being aborted.
07951076
JS		 3585 */
3586 icmd = &cmdiocb->iocb;
2e0fef85 3587 if (icmd->ulpCommand == CMD_ABORT_XRI_CN ||
92d7f7b0
JS		 3588 icmd->ulpCommand == CMD_CLOSE_XRI_CN ||
3589 (cmdiocb->iocb_flag & LPFC_DRIVER_ABORTED) != 0)
07951076
JS		 3590 return 0;
3591
858c9f6c
JS		 3592 /* If we're unloading, don't abort iocb on the ELS ring, but change the
3593 * callback so that nothing happens when it finishes.
07951076 3594 */
858c9f6c
JS		 3595 if ((vport->load_flag & FC_UNLOADING) &&
3596 (pring->ringno == LPFC_ELS_RING)) {
92d7f7b0
JS		 3597 if (cmdiocb->iocb_flag & LPFC_IO_FABRIC)
3598 cmdiocb->fabric_iocb_cmpl = lpfc_ignore_els_cmpl;
3599 else
3600 cmdiocb->iocb_cmpl = lpfc_ignore_els_cmpl;
07951076 3601 goto abort_iotag_exit;
92d7f7b0 3602 }
dea3101e
JB		 3603
3604 /* issue ABTS for this IOCB based on iotag */
92d7f7b0 3605 abtsiocbp = __lpfc_sli_get_iocbq(phba);
dea3101e
JB		 3606 if (abtsiocbp == NULL)
3607 return 0;
dea3101e 3608
07951076
JS		 3609 /* This signals the response to set the correct status
3610 * before calling the completion handler.
3611 */
3612 cmdiocb->iocb_flag |= LPFC_DRIVER_ABORTED;
3613
dea3101e 3614 iabt = &abtsiocbp->iocb;
07951076
JS		 3615 iabt->un.acxri.abortType = ABORT_TYPE_ABTS;
3616 iabt->un.acxri.abortContextTag = icmd->ulpContext;
3617 iabt->un.acxri.abortIoTag = icmd->ulpIoTag;
3618 iabt->ulpLe = 1;
3619 iabt->ulpClass = icmd->ulpClass;
dea3101e 3620
2e0fef85 3621 if (phba->link_state >= LPFC_LINK_UP)
07951076
JS		 3622 iabt->ulpCommand = CMD_ABORT_XRI_CN;
3623 else
3624 iabt->ulpCommand = CMD_CLOSE_XRI_CN;
dea3101e 3625
07951076 3626 abtsiocbp->iocb_cmpl = lpfc_sli_abort_els_cmpl;
5b8bd0c9 3627
e8b62011
JS		 3628 lpfc_printf_vlog(vport, KERN_INFO, LOG_SLI,
3629 "0339 Abort xri x%x, original iotag x%x, "
3630 "abort cmd iotag x%x\n",
3631 iabt->un.acxri.abortContextTag,
3632 iabt->un.acxri.abortIoTag, abtsiocbp->iotag);
92d7f7b0 3633 retval = __lpfc_sli_issue_iocb(phba, pring, abtsiocbp, 0);
dea3101e 3634
07951076 3635abort_iotag_exit:
2e0fef85
JS		 3636 /*
3637 * Caller to this routine should check for IOCB_ERROR
3638 * and handle it properly. This routine no longer removes
3639 * iocb off txcmplq and call compl in case of IOCB_ERROR.
07951076 3640 */
2e0fef85 3641 return retval;
dea3101e
JB		 3642}
3643
3644static int
51ef4c26
JS		 3645lpfc_sli_validate_fcp_iocb(struct lpfc_iocbq *iocbq, struct lpfc_vport *vport,
3646 uint16_t tgt_id, uint64_t lun_id,
0bd4ca25 3647 lpfc_ctx_cmd ctx_cmd)
dea3101e 3648{
0bd4ca25
JSEC		 3649 struct lpfc_scsi_buf *lpfc_cmd;
3650 struct scsi_cmnd *cmnd;
dea3101e
JB		 3651 int rc = 1;
3652
0bd4ca25
JSEC		 3653 if (!(iocbq->iocb_flag & LPFC_IO_FCP))
3654 return rc;
3655
51ef4c26
JS		 3656 if (iocbq->vport != vport)
3657 return rc;
3658
0bd4ca25
JSEC		 3659 lpfc_cmd = container_of(iocbq, struct lpfc_scsi_buf, cur_iocbq);
3660 cmnd = lpfc_cmd->pCmd;
3661
3662 if (cmnd == NULL)
dea3101e
JB		 3663 return rc;
3664
3665 switch (ctx_cmd) {
3666 case LPFC_CTX_LUN:
0bd4ca25
JSEC		 3667 if ((cmnd->device->id == tgt_id) &&
3668 (cmnd->device->lun == lun_id))
dea3101e
JB		 3669 rc = 0;
3670 break;
3671 case LPFC_CTX_TGT:
0bd4ca25 3672 if (cmnd->device->id == tgt_id)
dea3101e
JB		 3673 rc = 0;
3674 break;
dea3101e
JB		 3675 case LPFC_CTX_HOST:
3676 rc = 0;
3677 break;
3678 default:
3679 printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
3680 __FUNCTION__, ctx_cmd);
3681 break;
3682 }
3683
3684 return rc;
3685}
3686
3687int
51ef4c26
JS		 3688lpfc_sli_sum_iocb(struct lpfc_vport *vport, uint16_t tgt_id, uint64_t lun_id,
3689 lpfc_ctx_cmd ctx_cmd)
dea3101e 3690{
51ef4c26 3691 struct lpfc_hba *phba = vport->phba;
0bd4ca25
JSEC		 3692 struct lpfc_iocbq *iocbq;
3693 int sum, i;
dea3101e 3694
0bd4ca25
JSEC		 3695 for (i = 1, sum = 0; i <= phba->sli.last_iotag; i++) {
3696 iocbq = phba->sli.iocbq_lookup[i];
dea3101e 3697
51ef4c26
JS		 3698 if (lpfc_sli_validate_fcp_iocb (iocbq, vport, tgt_id, lun_id,
3699 ctx_cmd) == 0)
0bd4ca25 3700 sum++;
dea3101e 3701 }
0bd4ca25 3702
dea3101e
JB		 3703 return sum;
3704}
3705
5eb95af0 3706void
2e0fef85
JS		 3707lpfc_sli_abort_fcp_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
3708 struct lpfc_iocbq *rspiocb)
5eb95af0 3709{
604a3e30 3710 lpfc_sli_release_iocbq(phba, cmdiocb);
5eb95af0
JSEC		 3711 return;
3712}
3713
dea3101e 3714int
51ef4c26
JS		 3715lpfc_sli_abort_iocb(struct lpfc_vport *vport, struct lpfc_sli_ring *pring,
3716 uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd abort_cmd)
dea3101e 3717{
51ef4c26 3718 struct lpfc_hba *phba = vport->phba;
0bd4ca25
JSEC		 3719 struct lpfc_iocbq *iocbq;
3720 struct lpfc_iocbq *abtsiocb;
dea3101e 3721 IOCB_t *cmd = NULL;
dea3101e 3722 int errcnt = 0, ret_val = 0;
0bd4ca25 3723 int i;
dea3101e 3724
0bd4ca25
JSEC		 3725 for (i = 1; i <= phba->sli.last_iotag; i++) {
3726 iocbq = phba->sli.iocbq_lookup[i];
dea3101e 3727
51ef4c26 3728 if (lpfc_sli_validate_fcp_iocb(iocbq, vport, tgt_id, lun_id,
2e0fef85 3729 abort_cmd) != 0)
dea3101e
JB		 3730 continue;
3731
3732 /* issue ABTS for this IOCB based on iotag */
0bd4ca25 3733 abtsiocb = lpfc_sli_get_iocbq(phba);
dea3101e
JB		 3734 if (abtsiocb == NULL) {
3735 errcnt++;
3736 continue;
3737 }
dea3101e 3738
0bd4ca25 3739 cmd = &iocbq->iocb;
dea3101e
JB		 3740 abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
3741 abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
3742 abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
3743 abtsiocb->iocb.ulpLe = 1;
3744 abtsiocb->iocb.ulpClass = cmd->ulpClass;
2e0fef85 3745 abtsiocb->vport = phba->pport;
dea3101e 3746
2e0fef85 3747 if (lpfc_is_link_up(phba))
dea3101e
JB		 3748 abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
3749 else
3750 abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
3751
5eb95af0
JSEC		 3752 /* Setup callback routine and issue the command. */
3753 abtsiocb->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
dea3101e
JB		 3754 ret_val = lpfc_sli_issue_iocb(phba, pring, abtsiocb, 0);
3755 if (ret_val == IOCB_ERROR) {
604a3e30 3756 lpfc_sli_release_iocbq(phba, abtsiocb);
dea3101e
JB		 3757 errcnt++;
3758 continue;
3759 }
3760 }
3761
3762 return errcnt;
3763}
3764
68876920
JSEC		 3765static void
3766lpfc_sli_wake_iocb_wait(struct lpfc_hba *phba,
3767 struct lpfc_iocbq *cmdiocbq,
3768 struct lpfc_iocbq *rspiocbq)
dea3101e 3769{
68876920
JSEC		 3770 wait_queue_head_t *pdone_q;
3771 unsigned long iflags;
dea3101e 3772
2e0fef85 3773 spin_lock_irqsave(&phba->hbalock, iflags);
68876920
JSEC		 3774 cmdiocbq->iocb_flag |= LPFC_IO_WAKE;
3775 if (cmdiocbq->context2 && rspiocbq)
3776 memcpy(&((struct lpfc_iocbq *)cmdiocbq->context2)->iocb,
3777 &rspiocbq->iocb, sizeof(IOCB_t));
3778
3779 pdone_q = cmdiocbq->context_un.wait_queue;
68876920
JSEC		 3780 if (pdone_q)
3781 wake_up(pdone_q);
858c9f6c 3782 spin_unlock_irqrestore(&phba->hbalock, iflags);
dea3101e
JB		 3783 return;
3784}
3785
68876920
JSEC		 3786/*
3787 * Issue the caller's iocb and wait for its completion, but no longer than the
3788 * caller's timeout. Note that iocb_flags is cleared before the
3789 * lpfc_sli_issue_call since the wake routine sets a unique value and by
3790 * definition this is a wait function.
3791 */
92d7f7b0 3792
dea3101e 3793int
2e0fef85
JS		 3794lpfc_sli_issue_iocb_wait(struct lpfc_hba *phba,
3795 struct lpfc_sli_ring *pring,
3796 struct lpfc_iocbq *piocb,
3797 struct lpfc_iocbq *prspiocbq,
68876920 3798 uint32_t timeout)
dea3101e 3799{
7259f0d0 3800 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
68876920
JSEC		 3801 long timeleft, timeout_req = 0;
3802 int retval = IOCB_SUCCESS;
875fbdfe 3803 uint32_t creg_val;
dea3101e
JB		 3804
3805 /*
68876920
JSEC		 3806 * If the caller has provided a response iocbq buffer, then context2
3807 * is NULL or its an error.
dea3101e 3808 */
68876920
JSEC		 3809 if (prspiocbq) {
3810 if (piocb->context2)
3811 return IOCB_ERROR;
3812 piocb->context2 = prspiocbq;
dea3101e
JB		 3813 }
3814
68876920
JSEC		 3815 piocb->iocb_cmpl = lpfc_sli_wake_iocb_wait;
3816 piocb->context_un.wait_queue = &done_q;
3817 piocb->iocb_flag &= ~LPFC_IO_WAKE;
dea3101e 3818
875fbdfe
JSEC		 3819 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
3820 creg_val = readl(phba->HCregaddr);
3821 creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
3822 writel(creg_val, phba->HCregaddr);
3823 readl(phba->HCregaddr); /* flush */
3824 }
3825
68876920
JSEC		 3826 retval = lpfc_sli_issue_iocb(phba, pring, piocb, 0);
3827 if (retval == IOCB_SUCCESS) {
3828 timeout_req = timeout * HZ;
68876920
JSEC		 3829 timeleft = wait_event_timeout(done_q,
3830 piocb->iocb_flag & LPFC_IO_WAKE,
3831 timeout_req);
dea3101e 3832
7054a606
JS		 3833 if (piocb->iocb_flag & LPFC_IO_WAKE) {
3834 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 3835 "0331 IOCB wake signaled\n");
7054a606 3836 } else if (timeleft == 0) {
68876920 3837 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011
JS		 3838 "0338 IOCB wait timeout error - no "
3839 "wake response Data x%x\n", timeout);
68876920 3840 retval = IOCB_TIMEDOUT;
7054a606 3841 } else {
68876920 3842 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011
JS		 3843 "0330 IOCB wake NOT set, "
3844 "Data x%x x%lx\n",
68876920
JSEC		 3845 timeout, (timeleft / jiffies));
3846 retval = IOCB_TIMEDOUT;
dea3101e 3847 }
68876920
JSEC		 3848 } else {
3849 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011
JS		 3850 ":0332 IOCB wait issue failed, Data x%x\n",
3851 retval);
68876920 3852 retval = IOCB_ERROR;
dea3101e
JB		 3853 }
3854
875fbdfe
JSEC		 3855 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
3856 creg_val = readl(phba->HCregaddr);
3857 creg_val &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
3858 writel(creg_val, phba->HCregaddr);
3859 readl(phba->HCregaddr); /* flush */
3860 }
3861
68876920
JSEC		 3862 if (prspiocbq)
3863 piocb->context2 = NULL;
3864
3865 piocb->context_un.wait_queue = NULL;
3866 piocb->iocb_cmpl = NULL;
dea3101e
JB		 3867 return retval;
3868}
68876920 3869
dea3101e 3870int
2e0fef85 3871lpfc_sli_issue_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq,
dea3101e
JB		 3872 uint32_t timeout)
3873{
7259f0d0 3874 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
dea3101e 3875 int retval;
858c9f6c 3876 unsigned long flag;
dea3101e
JB		 3877
3878 /* The caller must leave context1 empty. */
98c9ea5c 3879 if (pmboxq->context1)
2e0fef85 3880 return MBX_NOT_FINISHED;
dea3101e
JB		 3881
3882 /* setup wake call as IOCB callback */
3883 pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
3884 /* setup context field to pass wait_queue pointer to wake function */
3885 pmboxq->context1 = &done_q;
3886
dea3101e
JB		 3887 /* now issue the command */
3888 retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
3889
3890 if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
7054a606
JS		 3891 wait_event_interruptible_timeout(done_q,
3892 pmboxq->mbox_flag & LPFC_MBX_WAKE,
3893 timeout * HZ);
3894
858c9f6c 3895 spin_lock_irqsave(&phba->hbalock, flag);
dea3101e 3896 pmboxq->context1 = NULL;
7054a606
JS		 3897 /*
3898 * if LPFC_MBX_WAKE flag is set the mailbox is completed
3899 * else do not free the resources.
3900 */
3901 if (pmboxq->mbox_flag & LPFC_MBX_WAKE)
dea3101e 3902 retval = MBX_SUCCESS;
858c9f6c 3903 else {
7054a606 3904 retval = MBX_TIMEOUT;
858c9f6c
JS		 3905 pmboxq->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
3906 }
3907 spin_unlock_irqrestore(&phba->hbalock, flag);
dea3101e
JB		 3908 }
3909
dea3101e
JB		 3910 return retval;
3911}
3912
b4c02652
JS		 3913int
3914lpfc_sli_flush_mbox_queue(struct lpfc_hba * phba)
3915{
2e0fef85 3916 struct lpfc_vport *vport = phba->pport;
b4c02652 3917 int i = 0;
ed957684 3918 uint32_t ha_copy;
b4c02652 3919
2e0fef85 3920 while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE && !vport->stopped) {
b4c02652
JS		 3921 if (i++ > LPFC_MBOX_TMO * 1000)
3922 return 1;
3923
ed957684
JS		 3924 /*
3925 * Call lpfc_sli_handle_mb_event only if a mailbox cmd
3926 * did finish. This way we won't get the misleading
3927 * "Stray Mailbox Interrupt" message.
3928 */
3929 spin_lock_irq(&phba->hbalock);
3930 ha_copy = phba->work_ha;
3931 phba->work_ha &= ~HA_MBATT;
3932 spin_unlock_irq(&phba->hbalock);
3933
3934 if (ha_copy & HA_MBATT)
3935 if (lpfc_sli_handle_mb_event(phba) == 0)
3936 i = 0;
b4c02652
JS		 3937
3938 msleep(1);
3939 }
3940
3941 return (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) ? 1 : 0;
3942}
3943
dea3101e 3944irqreturn_t
7d12e780 3945lpfc_intr_handler(int irq, void *dev_id)
dea3101e 3946{
2e0fef85 3947 struct lpfc_hba *phba;
dea3101e
JB		 3948 uint32_t ha_copy;
3949 uint32_t work_ha_copy;
3950 unsigned long status;
dea3101e
JB		 3951 uint32_t control;
3952
92d7f7b0 3953 MAILBOX_t *mbox, *pmbox;
858c9f6c
JS		 3954 struct lpfc_vport *vport;
3955 struct lpfc_nodelist *ndlp;
3956 struct lpfc_dmabuf *mp;
92d7f7b0
JS		 3957 LPFC_MBOXQ_t *pmb;
3958 int rc;
3959
dea3101e
JB		 3960 /*
3961 * Get the driver's phba structure from the dev_id and
3962 * assume the HBA is not interrupting.
3963 */
3964 phba = (struct lpfc_hba *) dev_id;
3965
3966 if (unlikely(!phba))
3967 return IRQ_NONE;
3968
8d63f375
LV		 3969 /* If the pci channel is offline, ignore all the interrupts. */
3970 if (unlikely(pci_channel_offline(phba->pcidev)))
3971 return IRQ_NONE;
3972
dea3101e
JB		 3973 phba->sli.slistat.sli_intr++;
3974
3975 /*
3976 * Call the HBA to see if it is interrupting. If not, don't claim
3977 * the interrupt
3978 */
3979
3980 /* Ignore all interrupts during initialization. */
2e0fef85 3981 if (unlikely(phba->link_state < LPFC_LINK_DOWN))
dea3101e
JB		 3982 return IRQ_NONE;
3983
3984 /*
3985 * Read host attention register to determine interrupt source
3986 * Clear Attention Sources, except Error Attention (to
3987 * preserve status) and Link Attention
3988 */
2e0fef85 3989 spin_lock(&phba->hbalock);
dea3101e 3990 ha_copy = readl(phba->HAregaddr);
ebdbe65f
JS		 3991 /* If somebody is waiting to handle an eratt don't process it
3992 * here. The brdkill function will do this.
3993 */
2e0fef85 3994 if (phba->link_flag & LS_IGNORE_ERATT)
ebdbe65f 3995 ha_copy &= ~HA_ERATT;
dea3101e
JB		 3996 writel((ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
3997 readl(phba->HAregaddr); /* flush */
2e0fef85 3998 spin_unlock(&phba->hbalock);
dea3101e
JB		 3999
4000 if (unlikely(!ha_copy))
4001 return IRQ_NONE;
4002
4003 work_ha_copy = ha_copy & phba->work_ha_mask;
4004
4005 if (unlikely(work_ha_copy)) {
4006 if (work_ha_copy & HA_LATT) {
4007 if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
4008 /*
4009 * Turn off Link Attention interrupts
4010 * until CLEAR_LA done
4011 */
2e0fef85 4012 spin_lock(&phba->hbalock);
dea3101e
JB		 4013 phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
4014 control = readl(phba->HCregaddr);
4015 control &= ~HC_LAINT_ENA;
4016 writel(control, phba->HCregaddr);
4017 readl(phba->HCregaddr); /* flush */
2e0fef85 4018 spin_unlock(&phba->hbalock);
dea3101e
JB		 4019 }
4020 else
4021 work_ha_copy &= ~HA_LATT;
4022 }
4023
4024 if (work_ha_copy & ~(HA_ERATT|HA_MBATT|HA_LATT)) {
858c9f6c
JS		 4025 /*
4026 * Turn off Slow Rings interrupts, LPFC_ELS_RING is
4027 * the only slow ring.
4028 */
4029 status = (work_ha_copy &
4030 (HA_RXMASK << (4*LPFC_ELS_RING)));
4031 status >>= (4*LPFC_ELS_RING);
4032 if (status & HA_RXMASK) {
4033 spin_lock(&phba->hbalock);
4034 control = readl(phba->HCregaddr);
a58cbd52
JS		 4035
4036 lpfc_debugfs_slow_ring_trc(phba,
4037 "ISR slow ring: ctl:x%x stat:x%x isrcnt:x%x",
4038 control, status,
4039 (uint32_t)phba->sli.slistat.sli_intr);
4040
858c9f6c 4041 if (control & (HC_R0INT_ENA << LPFC_ELS_RING)) {
a58cbd52
JS		 4042 lpfc_debugfs_slow_ring_trc(phba,
4043 "ISR Disable ring:"
4044 "pwork:x%x hawork:x%x wait:x%x",
4045 phba->work_ha, work_ha_copy,
4046 (uint32_t)((unsigned long)
4047 phba->work_wait));
4048
858c9f6c
JS		 4049 control &=
4050 ~(HC_R0INT_ENA << LPFC_ELS_RING);
dea3101e
JB		 4051 writel(control, phba->HCregaddr);
4052 readl(phba->HCregaddr); /* flush */
dea3101e 4053 }
a58cbd52
JS		 4054 else {
4055 lpfc_debugfs_slow_ring_trc(phba,
4056 "ISR slow ring: pwork:"
4057 "x%x hawork:x%x wait:x%x",
4058 phba->work_ha, work_ha_copy,
4059 (uint32_t)((unsigned long)
4060 phba->work_wait));
4061 }
858c9f6c 4062 spin_unlock(&phba->hbalock);
dea3101e
JB		 4063 }
4064 }
4065
4066 if (work_ha_copy & HA_ERATT) {
dea3101e
JB		 4067 /*
4068 * There was a link/board error. Read the
4069 * status register to retrieve the error event
4070 * and process it.
4071 */
4072 phba->sli.slistat.err_attn_event++;
4073 /* Save status info */
4074 phba->work_hs = readl(phba->HSregaddr);
4075 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
4076 phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
4077
4078 /* Clear Chip error bit */
4079 writel(HA_ERATT, phba->HAregaddr);
4080 readl(phba->HAregaddr); /* flush */
2e0fef85 4081 phba->pport->stopped = 1;
dea3101e
JB		 4082 }
4083
92d7f7b0
JS		 4084 if ((work_ha_copy & HA_MBATT) &&
4085 (phba->sli.mbox_active)) {
4086 pmb = phba->sli.mbox_active;
4087 pmbox = &pmb->mb;
4088 mbox = &phba->slim2p->mbx;
858c9f6c 4089 vport = pmb->vport;
92d7f7b0
JS		 4090
4091 /* First check out the status word */
4092 lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof(uint32_t));
4093 if (pmbox->mbxOwner != OWN_HOST) {
4094 /*
4095 * Stray Mailbox Interrupt, mbxCommand <cmd>
4096 * mbxStatus <status>
4097 */
09372820 4098 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX |
92d7f7b0 4099 LOG_SLI,
e8b62011 4100 "(%d):0304 Stray Mailbox "
92d7f7b0
JS		 4101 "Interrupt mbxCommand x%x "
4102 "mbxStatus x%x\n",
e8b62011 4103 (vport ? vport->vpi : 0),
92d7f7b0
JS		 4104 pmbox->mbxCommand,
4105 pmbox->mbxStatus);
09372820
JS		 4106 /* clear mailbox attention bit */
4107 work_ha_copy &= ~HA_MBATT;
4108 } else {
4109 phba->last_completion_time = jiffies;
4110 del_timer(&phba->sli.mbox_tmo);
858c9f6c 4111
09372820
JS		 4112 phba->sli.mbox_active = NULL;
4113 if (pmb->mbox_cmpl) {
4114 lpfc_sli_pcimem_bcopy(mbox, pmbox,
4115 MAILBOX_CMD_SIZE);
4116 }
4117 if (pmb->mbox_flag & LPFC_MBX_IMED_UNREG) {
4118 pmb->mbox_flag &= ~LPFC_MBX_IMED_UNREG;
4119
4120 lpfc_debugfs_disc_trc(vport,
4121 LPFC_DISC_TRC_MBOX_VPORT,
4122 "MBOX dflt rpi: : "
4123 "status:x%x rpi:x%x",
4124 (uint32_t)pmbox->mbxStatus,
4125 pmbox->un.varWords[0], 0);
4126
4127 if (!pmbox->mbxStatus) {
4128 mp = (struct lpfc_dmabuf *)
4129 (pmb->context1);
4130 ndlp = (struct lpfc_nodelist *)
4131 pmb->context2;
4132
4133 /* Reg_LOGIN of dflt RPI was
4134 * successful. new lets get
4135 * rid of the RPI using the
4136 * same mbox buffer.
4137 */
4138 lpfc_unreg_login(phba,
4139 vport->vpi,
4140 pmbox->un.varWords[0],
4141 pmb);
4142 pmb->mbox_cmpl =
4143 lpfc_mbx_cmpl_dflt_rpi;
4144 pmb->context1 = mp;
4145 pmb->context2 = ndlp;
4146 pmb->vport = vport;
4147 spin_lock(&phba->hbalock);
4148 phba->sli.sli_flag &=
4149 ~LPFC_SLI_MBOX_ACTIVE;
4150 spin_unlock(&phba->hbalock);
4151 goto send_current_mbox;
4152 }
858c9f6c 4153 }
09372820
JS		 4154 spin_lock(&phba->pport->work_port_lock);
4155 phba->pport->work_port_events &=
4156 ~WORKER_MBOX_TMO;
4157 spin_unlock(&phba->pport->work_port_lock);
4158 lpfc_mbox_cmpl_put(phba, pmb);
858c9f6c 4159 }
92d7f7b0
JS		 4160 }
4161 if ((work_ha_copy & HA_MBATT) &&
4162 (phba->sli.mbox_active == NULL)) {
4163send_next_mbox:
4164 spin_lock(&phba->hbalock);
4165 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
4166 pmb = lpfc_mbox_get(phba);
4167 spin_unlock(&phba->hbalock);
858c9f6c 4168send_current_mbox:
92d7f7b0
JS		 4169 /* Process next mailbox command if there is one */
4170 if (pmb != NULL) {
4171 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4172 if (rc == MBX_NOT_FINISHED) {
4173 pmb->mb.mbxStatus = MBX_NOT_FINISHED;
4174 lpfc_mbox_cmpl_put(phba, pmb);
4175 goto send_next_mbox;
4176 }
92d7f7b0
JS		 4177 }
4178
4179 }
4180
2e0fef85 4181 spin_lock(&phba->hbalock);
dea3101e
JB		 4182 phba->work_ha |= work_ha_copy;
4183 if (phba->work_wait)
92d7f7b0 4184 lpfc_worker_wake_up(phba);
2e0fef85 4185 spin_unlock(&phba->hbalock);
dea3101e
JB		 4186 }
4187
4188 ha_copy &= ~(phba->work_ha_mask);
4189
4190 /*
4191 * Process all events on FCP ring. Take the optimized path for
4192 * FCP IO. Any other IO is slow path and is handled by
4193 * the worker thread.
4194 */
4195 status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
4196 status >>= (4*LPFC_FCP_RING);
858c9f6c 4197 if (status & HA_RXMASK)
dea3101e
JB		 4198 lpfc_sli_handle_fast_ring_event(phba,
4199 &phba->sli.ring[LPFC_FCP_RING],
4200 status);
a4bc3379
JS		 4201
4202 if (phba->cfg_multi_ring_support == 2) {
4203 /*
4204 * Process all events on extra ring. Take the optimized path
4205 * for extra ring IO. Any other IO is slow path and is handled
4206 * by the worker thread.
4207 */
4208 status = (ha_copy & (HA_RXMASK << (4*LPFC_EXTRA_RING)));
4209 status >>= (4*LPFC_EXTRA_RING);
858c9f6c 4210 if (status & HA_RXMASK) {
a4bc3379
JS		 4211 lpfc_sli_handle_fast_ring_event(phba,
4212 &phba->sli.ring[LPFC_EXTRA_RING],
4213 status);
4214 }
4215 }
dea3101e
JB		 4216 return IRQ_HANDLED;
4217
4218} /* lpfc_intr_handler */
Clone of davem's net-next-2.6 tree