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[SCSI] lpfc 8.3.13: FC Discovery Fixes and enhancements.
[net-next-2.6.git] / drivers / scsi / lpfc / lpfc.h
CommitLineData
dea3101e
JB		 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173 3 * Fibre Channel Host Bus Adapters. *
4fede78f 4 * Copyright (C) 2004-2010 Emulex. All rights reserved. *
c44ce173 5 * EMULEX and SLI are trademarks of Emulex. *
dea3101e 6 * www.emulex.com *
c44ce173 7 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea3101e
JB		 8 * *
9 * This program is free software; you can redistribute it and/or *
c44ce173
JSEC		 10 * modify it under the terms of version 2 of the GNU General *
11 * Public License as published by the Free Software Foundation. *
12 * This program is distributed in the hope that it will be useful. *
13 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
14 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
15 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
16 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
17 * TO BE LEGALLY INVALID. See the GNU General Public License for *
18 * more details, a copy of which can be found in the file COPYING *
19 * included with this package. *
dea3101e
JB		 20 *******************************************************************/
21
2e0fef85
JS		 22#include <scsi/scsi_host.h>
23
dea3101e
JB		 24struct lpfc_sli2_slim;
25
3772a991
JS		 26#define LPFC_PCI_DEV_LP 0x1
27#define LPFC_PCI_DEV_OC 0x2
28
29#define LPFC_SLI_REV2 2
30#define LPFC_SLI_REV3 3
31#define LPFC_SLI_REV4 4
32
97eab634 33#define LPFC_MAX_TARGET 4096 /* max number of targets supported */
e17da18e
JS		 34#define LPFC_MAX_DISC_THREADS 64 /* max outstanding discovery els
35 requests */
36#define LPFC_MAX_NS_RETRY 3 /* Number of retry attempts to contact
37 the NameServer before giving up. */
445cf4f4 38#define LPFC_CMD_PER_LUN 3 /* max outstanding cmds per lun */
81301a9b 39#define LPFC_DEFAULT_SG_SEG_CNT 64 /* sg element count per scsi cmnd */
e2aed29f
JS		 40#define LPFC_DEFAULT_MENLO_SG_SEG_CNT 128 /* sg element count per scsi
41 cmnd for menlo needs nearly twice as for firmware
42 downloads using bsg */
81301a9b
JS		 43#define LPFC_DEFAULT_PROT_SG_SEG_CNT 4096 /* sg protection elements count */
44#define LPFC_MAX_SG_SEG_CNT 4096 /* sg element count per scsi cmnd */
45#define LPFC_MAX_PROT_SG_SEG_CNT 4096 /* prot sg element count per scsi cmd*/
dea3101e 46#define LPFC_IOCB_LIST_CNT 2250 /* list of IOCBs for fast-path usage. */
445cf4f4 47#define LPFC_Q_RAMP_UP_INTERVAL 120 /* lun q_depth ramp up interval */
495a714c 48#define LPFC_VNAME_LEN 100 /* vport symbolic name length */
977b5a0a
JS		 49#define LPFC_TGTQ_INTERVAL 40000 /* Min amount of time between tgt
50 queue depth change in millisecs */
51#define LPFC_TGTQ_RAMPUP_PCENT 5 /* Target queue rampup in percentage */
52#define LPFC_MIN_TGT_QDEPTH 100
53#define LPFC_MAX_TGT_QDEPTH 0xFFFF
dea3101e 54
ea2151b4
JS		 55#define LPFC_MAX_BUCKET_COUNT 20 /* Maximum no. of buckets for stat data
56 collection. */
92d7f7b0
JS		 57/*
58 * Following time intervals are used of adjusting SCSI device
59 * queue depths when there are driver resource error or Firmware
60 * resource error.
61 */
62#define QUEUE_RAMP_DOWN_INTERVAL (1 * HZ) /* 1 Second */
63#define QUEUE_RAMP_UP_INTERVAL (300 * HZ) /* 5 minutes */
64
65/* Number of exchanges reserved for discovery to complete */
66#define LPFC_DISC_IOCB_BUFF_COUNT 20
67
858c9f6c 68#define LPFC_HB_MBOX_INTERVAL 5 /* Heart beat interval in seconds. */
311464ec 69#define LPFC_HB_MBOX_TIMEOUT 30 /* Heart beat timeout in seconds. */
858c9f6c 70
9399627f
JS		 71/* Error Attention event polling interval */
72#define LPFC_ERATT_POLL_INTERVAL 5 /* EATT poll interval in seconds */
73
dea3101e
JB		 74/* Define macros for 64 bit support */
75#define putPaddrLow(addr) ((uint32_t) (0xffffffff & (u64)(addr)))
76#define putPaddrHigh(addr) ((uint32_t) (0xffffffff & (((u64)(addr))>>32)))
77#define getPaddr(high, low) ((dma_addr_t)( \
78 (( (u64)(high)<<16 ) << 16)|( (u64)(low))))
79/* Provide maximum configuration definitions. */
80#define LPFC_DRVR_TIMEOUT 16 /* driver iocb timeout value in sec */
dea3101e
JB		 81#define FC_MAX_ADPTMSG 64
82
83#define MAX_HBAEVT 32
84
9399627f
JS		 85/* Number of MSI-X vectors the driver uses */
86#define LPFC_MSIX_VECTORS 2
87
5e9d9b82
JS		 88/* lpfc wait event data ready flag */
89#define LPFC_DATA_READY (1<<0)
90
875fbdfe
JSEC		 91enum lpfc_polling_flags {
92 ENABLE_FCP_RING_POLLING = 0x1,
93 DISABLE_FCP_RING_INT = 0x2
94};
95
dea3101e
JB		 96/* Provide DMA memory definitions the driver uses per port instance. */
97struct lpfc_dmabuf {
98 struct list_head list;
99 void *virt; /* virtual address ptr */
100 dma_addr_t phys; /* mapped address */
76bb24ef 101 uint32_t buffer_tag; /* used for tagged queue ring */
dea3101e
JB		 102};
103
104struct lpfc_dma_pool {
105 struct lpfc_dmabuf *elements;
106 uint32_t max_count;
107 uint32_t current_count;
108};
109
ed957684 110struct hbq_dmabuf {
da0436e9 111 struct lpfc_dmabuf hbuf;
ed957684 112 struct lpfc_dmabuf dbuf;
51ef4c26 113 uint32_t size;
ed957684 114 uint32_t tag;
4d9ab994 115 struct lpfc_cq_event cq_event;
45ed1190 116 unsigned long time_stamp;
ed957684
JS		 117};
118
dea3101e
JB		 119/* Priority bit. Set value to exceed low water mark in lpfc_mem. */
120#define MEM_PRI 0x100
121
122
123/****************************************************************************/
124/* Device VPD save area */
125/****************************************************************************/
126typedef struct lpfc_vpd {
127 uint32_t status; /* vpd status value */
128 uint32_t length; /* number of bytes actually returned */
129 struct {
130 uint32_t rsvd1; /* Revision numbers */
131 uint32_t biuRev;
132 uint32_t smRev;
133 uint32_t smFwRev;
134 uint32_t endecRev;
135 uint16_t rBit;
136 uint8_t fcphHigh;
137 uint8_t fcphLow;
138 uint8_t feaLevelHigh;
139 uint8_t feaLevelLow;
140 uint32_t postKernRev;
141 uint32_t opFwRev;
142 uint8_t opFwName[16];
143 uint32_t sli1FwRev;
144 uint8_t sli1FwName[16];
145 uint32_t sli2FwRev;
146 uint8_t sli2FwName[16];
147 } rev;
92d7f7b0
JS		 148 struct {
149#ifdef __BIG_ENDIAN_BITFIELD
da0436e9
JS		 150 uint32_t rsvd3 :19; /* Reserved */
151 uint32_t cdss : 1; /* Configure Data Security SLI */
152 uint32_t rsvd2 : 3; /* Reserved */
153 uint32_t cbg : 1; /* Configure BlockGuard */
92d7f7b0
JS		 154 uint32_t cmv : 1; /* Configure Max VPIs */
155 uint32_t ccrp : 1; /* Config Command Ring Polling */
156 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
157 uint32_t chbs : 1; /* Cofigure Host Backing store */
158 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
159 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
160 uint32_t cmx : 1; /* Configure Max XRIs */
161 uint32_t cmr : 1; /* Configure Max RPIs */
162#else /* __LITTLE_ENDIAN */
163 uint32_t cmr : 1; /* Configure Max RPIs */
164 uint32_t cmx : 1; /* Configure Max XRIs */
165 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
166 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
167 uint32_t chbs : 1; /* Cofigure Host Backing store */
168 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
169 uint32_t ccrp : 1; /* Config Command Ring Polling */
170 uint32_t cmv : 1; /* Configure Max VPIs */
da0436e9
JS		 171 uint32_t cbg : 1; /* Configure BlockGuard */
172 uint32_t rsvd2 : 3; /* Reserved */
173 uint32_t cdss : 1; /* Configure Data Security SLI */
174 uint32_t rsvd3 :19; /* Reserved */
92d7f7b0
JS		 175#endif
176 } sli3Feat;
dea3101e
JB		 177} lpfc_vpd_t;
178
179struct lpfc_scsi_buf;
180
181
182/*
183 * lpfc stat counters
184 */
185struct lpfc_stats {
186 /* Statistics for ELS commands */
187 uint32_t elsLogiCol;
188 uint32_t elsRetryExceeded;
189 uint32_t elsXmitRetry;
190 uint32_t elsDelayRetry;
191 uint32_t elsRcvDrop;
192 uint32_t elsRcvFrame;
193 uint32_t elsRcvRSCN;
194 uint32_t elsRcvRNID;
195 uint32_t elsRcvFARP;
196 uint32_t elsRcvFARPR;
197 uint32_t elsRcvFLOGI;
198 uint32_t elsRcvPLOGI;
199 uint32_t elsRcvADISC;
200 uint32_t elsRcvPDISC;
201 uint32_t elsRcvFAN;
202 uint32_t elsRcvLOGO;
203 uint32_t elsRcvPRLO;
204 uint32_t elsRcvPRLI;
7bb3b137
JW		 205 uint32_t elsRcvLIRR;
206 uint32_t elsRcvRPS;
207 uint32_t elsRcvRPL;
5ffc266e 208 uint32_t elsRcvRRQ;
dea3101e 209 uint32_t elsXmitFLOGI;
92d7f7b0 210 uint32_t elsXmitFDISC;
dea3101e
JB		 211 uint32_t elsXmitPLOGI;
212 uint32_t elsXmitPRLI;
213 uint32_t elsXmitADISC;
214 uint32_t elsXmitLOGO;
215 uint32_t elsXmitSCR;
216 uint32_t elsXmitRNID;
217 uint32_t elsXmitFARP;
218 uint32_t elsXmitFARPR;
219 uint32_t elsXmitACC;
220 uint32_t elsXmitLSRJT;
221
222 uint32_t frameRcvBcast;
223 uint32_t frameRcvMulti;
224 uint32_t strayXmitCmpl;
225 uint32_t frameXmitDelay;
226 uint32_t xriCmdCmpl;
227 uint32_t xriStatErr;
228 uint32_t LinkUp;
229 uint32_t LinkDown;
230 uint32_t LinkMultiEvent;
231 uint32_t NoRcvBuf;
232 uint32_t fcpCmd;
233 uint32_t fcpCmpl;
234 uint32_t fcpRspErr;
235 uint32_t fcpRemoteStop;
236 uint32_t fcpPortRjt;
237 uint32_t fcpPortBusy;
238 uint32_t fcpError;
239 uint32_t fcpLocalErr;
240};
241
242enum sysfs_mbox_state {
243 SMBOX_IDLE,
244 SMBOX_WRITING,
245 SMBOX_READING
246};
247
248struct lpfc_sysfs_mbox {
249 enum sysfs_mbox_state state;
250 size_t offset;
251 struct lpfcMboxq * mbox;
252};
253
2e0fef85
JS		 254struct lpfc_hba;
255
92d7f7b0 256
2e0fef85 257enum discovery_state {
92d7f7b0
JS		 258 LPFC_VPORT_UNKNOWN = 0, /* vport state is unknown */
259 LPFC_VPORT_FAILED = 1, /* vport has failed */
260 LPFC_LOCAL_CFG_LINK = 6, /* local NPORT Id configured */
261 LPFC_FLOGI = 7, /* FLOGI sent to Fabric */
262 LPFC_FDISC = 8, /* FDISC sent for vport */
263 LPFC_FABRIC_CFG_LINK = 9, /* Fabric assigned NPORT Id
264 * configured */
265 LPFC_NS_REG = 10, /* Register with NameServer */
266 LPFC_NS_QRY = 11, /* Query NameServer for NPort ID list */
267 LPFC_BUILD_DISC_LIST = 12, /* Build ADISC and PLOGI lists for
268 * device authentication / discovery */
269 LPFC_DISC_AUTH = 13, /* Processing ADISC list */
270 LPFC_VPORT_READY = 32,
2e0fef85
JS		 271};
272
273enum hba_state {
274 LPFC_LINK_UNKNOWN = 0, /* HBA state is unknown */
275 LPFC_WARM_START = 1, /* HBA state after selective reset */
276 LPFC_INIT_START = 2, /* Initial state after board reset */
277 LPFC_INIT_MBX_CMDS = 3, /* Initialize HBA with mbox commands */
278 LPFC_LINK_DOWN = 4, /* HBA initialized, link is down */
279 LPFC_LINK_UP = 5, /* Link is up - issue READ_LA */
92d7f7b0 280 LPFC_CLEAR_LA = 6, /* authentication cmplt - issue
2e0fef85 281 * CLEAR_LA */
92d7f7b0 282 LPFC_HBA_READY = 32,
2e0fef85
JS		 283 LPFC_HBA_ERROR = -1
284};
285
286struct lpfc_vport {
2e0fef85 287 struct lpfc_hba *phba;
3772a991 288 struct list_head listentry;
2e0fef85
JS		 289 uint8_t port_type;
290#define LPFC_PHYSICAL_PORT 1
291#define LPFC_NPIV_PORT 2
292#define LPFC_FABRIC_PORT 3
293 enum discovery_state port_state;
294
92d7f7b0 295 uint16_t vpi;
da0436e9 296 uint16_t vfi;
c868595d
JS		 297 uint8_t vpi_state;
298#define LPFC_VPI_REGISTERED 0x1
2e0fef85
JS		 299
300 uint32_t fc_flag; /* FC flags */
301/* Several of these flags are HBA centric and should be moved to
302 * phba->link_flag (e.g. FC_PTP, FC_PUBLIC_LOOP)
303 */
92d7f7b0
JS		 304#define FC_PT2PT 0x1 /* pt2pt with no fabric */
305#define FC_PT2PT_PLOGI 0x2 /* pt2pt initiate PLOGI */
306#define FC_DISC_TMO 0x4 /* Discovery timer running */
307#define FC_PUBLIC_LOOP 0x8 /* Public loop */
308#define FC_LBIT 0x10 /* LOGIN bit in loopinit set */
309#define FC_RSCN_MODE 0x20 /* RSCN cmd rcv'ed */
310#define FC_NLP_MORE 0x40 /* More node to process in node tbl */
311#define FC_OFFLINE_MODE 0x80 /* Interface is offline for diag */
312#define FC_FABRIC 0x100 /* We are fabric attached */
4b40c59e 313#define FC_VPORT_LOGO_RCVD 0x200 /* LOGO received on vport */
92d7f7b0 314#define FC_RSCN_DISCOVERY 0x400 /* Auth all devices after RSCN */
4b40c59e 315#define FC_LOGO_RCVD_DID_CHNG 0x800 /* FDISC on phys port detect DID chng*/
92d7f7b0
JS		 316#define FC_SCSI_SCAN_TMO 0x4000 /* scsi scan timer running */
317#define FC_ABORT_DISCOVERY 0x8000 /* we want to abort discovery */
318#define FC_NDISC_ACTIVE 0x10000 /* NPort discovery active */
319#define FC_BYPASSED_MODE 0x20000 /* NPort is in bypassed mode */
92d7f7b0
JS		 320#define FC_VPORT_NEEDS_REG_VPI 0x80000 /* Needs to have its vpi registered */
321#define FC_RSCN_DEFERRED 0x100000 /* A deferred RSCN being processed */
1c6834a7 322#define FC_VPORT_NEEDS_INIT_VPI 0x200000 /* Need to INIT_VPI before FDISC */
695a814e
JS		 323#define FC_VPORT_CVL_RCVD 0x400000 /* VLink failed due to CVL */
324#define FC_VFI_REGISTERED 0x800000 /* VFI is registered */
325#define FC_FDISC_COMPLETED 0x1000000/* FDISC completed */
2e0fef85 326
7ee5d43e
JS		 327 uint32_t ct_flags;
328#define FC_CT_RFF_ID 0x1 /* RFF_ID accepted by switch */
329#define FC_CT_RNN_ID 0x2 /* RNN_ID accepted by switch */
330#define FC_CT_RSNN_NN 0x4 /* RSNN_NN accepted by switch */
331#define FC_CT_RSPN_ID 0x8 /* RSPN_ID accepted by switch */
332#define FC_CT_RFT_ID 0x10 /* RFT_ID accepted by switch */
333
2e0fef85
JS		 334 struct list_head fc_nodes;
335
336 /* Keep counters for the number of entries in each list. */
337 uint16_t fc_plogi_cnt;
338 uint16_t fc_adisc_cnt;
339 uint16_t fc_reglogin_cnt;
340 uint16_t fc_prli_cnt;
341 uint16_t fc_unmap_cnt;
342 uint16_t fc_map_cnt;
343 uint16_t fc_npr_cnt;
344 uint16_t fc_unused_cnt;
345 struct serv_parm fc_sparam; /* buffer for our service parameters */
346
347 uint32_t fc_myDID; /* fibre channel S_ID */
348 uint32_t fc_prevDID; /* previous fibre channel S_ID */
349
350 int32_t stopped; /* HBA has not been restarted since last ERATT */
351 uint8_t fc_linkspeed; /* Link speed after last READ_LA */
352
353 uint32_t num_disc_nodes; /*in addition to hba_state */
354
355 uint32_t fc_nlp_cnt; /* outstanding NODELIST requests */
356 uint32_t fc_rscn_id_cnt; /* count of RSCNs payloads in list */
7f5f3d0d 357 uint32_t fc_rscn_flush; /* flag use of fc_rscn_id_list */
2e0fef85
JS		 358 struct lpfc_dmabuf *fc_rscn_id_list[FC_MAX_HOLD_RSCN];
359 struct lpfc_name fc_nodename; /* fc nodename */
360 struct lpfc_name fc_portname; /* fc portname */
361
362 struct lpfc_work_evt disc_timeout_evt;
363
364 struct timer_list fc_disctmo; /* Discovery rescue timer */
365 uint8_t fc_ns_retry; /* retries for fabric nameserver */
366 uint32_t fc_prli_sent; /* cntr for outstanding PRLIs */
367
368 spinlock_t work_port_lock;
369 uint32_t work_port_events; /* Timeout to be handled */
858c9f6c
JS		 370#define WORKER_DISC_TMO 0x1 /* vport: Discovery timeout */
371#define WORKER_ELS_TMO 0x2 /* vport: ELS timeout */
372#define WORKER_FDMI_TMO 0x4 /* vport: FDMI timeout */
373
374#define WORKER_MBOX_TMO 0x100 /* hba: MBOX timeout */
375#define WORKER_HB_TMO 0x200 /* hba: Heart beat timeout */
b1c11812 376#define WORKER_FABRIC_BLOCK_TMO 0x400 /* hba: fabric block timeout */
858c9f6c
JS		 377#define WORKER_RAMP_DOWN_QUEUE 0x800 /* hba: Decrease Q depth */
378#define WORKER_RAMP_UP_QUEUE 0x1000 /* hba: Increase Q depth */
2e0fef85
JS		 379
380 struct timer_list fc_fdmitmo;
381 struct timer_list els_tmofunc;
382
383 int unreg_vpi_cmpl;
384
385 uint8_t load_flag;
386#define FC_LOADING 0x1 /* HBA in process of loading drvr */
387#define FC_UNLOADING 0x2 /* HBA in process of unloading drvr */
3de2a653
JS		 388 /* Vport Config Parameters */
389 uint32_t cfg_scan_down;
390 uint32_t cfg_lun_queue_depth;
391 uint32_t cfg_nodev_tmo;
392 uint32_t cfg_devloss_tmo;
393 uint32_t cfg_restrict_login;
394 uint32_t cfg_peer_port_login;
395 uint32_t cfg_fcp_class;
396 uint32_t cfg_use_adisc;
397 uint32_t cfg_fdmi_on;
398 uint32_t cfg_discovery_threads;
e8b62011 399 uint32_t cfg_log_verbose;
3de2a653 400 uint32_t cfg_max_luns;
7ee5d43e 401 uint32_t cfg_enable_da_id;
977b5a0a 402 uint32_t cfg_max_scsicmpl_time;
3de2a653
JS		 403
404 uint32_t dev_loss_tmo_changed;
51ef4c26
JS		 405
406 struct fc_vport *fc_vport;
407
923e4b6a 408#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
51ef4c26
JS		 409 struct dentry *debug_disc_trc;
410 struct dentry *debug_nodelist;
411 struct dentry *vport_debugfs_root;
412 struct lpfc_debugfs_trc *disc_trc;
413 atomic_t disc_trc_cnt;
414#endif
ea2151b4
JS		 415 uint8_t stat_data_enabled;
416 uint8_t stat_data_blocked;
da0436e9 417 struct list_head rcv_buffer_list;
45ed1190 418 unsigned long rcv_buffer_time_stamp;
da0436e9
JS		 419 uint32_t vport_flag;
420#define STATIC_VPORT 1
2e0fef85
JS		 421};
422
ed957684
JS		 423struct hbq_s {
424 uint16_t entry_count; /* Current number of HBQ slots */
a8adb832 425 uint16_t buffer_count; /* Current number of buffers posted */
ed957684
JS		 426 uint32_t next_hbqPutIdx; /* Index to next HBQ slot to use */
427 uint32_t hbqPutIdx; /* HBQ slot to use */
428 uint32_t local_hbqGetIdx; /* Local copy of Get index from Port */
51ef4c26
JS		 429 void *hbq_virt; /* Virtual ptr to this hbq */
430 struct list_head hbq_buffer_list; /* buffers assigned to this HBQ */
431 /* Callback for HBQ buffer allocation */
432 struct hbq_dmabuf *(*hbq_alloc_buffer) (struct lpfc_hba *);
433 /* Callback for HBQ buffer free */
434 void (*hbq_free_buffer) (struct lpfc_hba *,
435 struct hbq_dmabuf *);
ed957684
JS		 436};
437
51ef4c26
JS		 438#define LPFC_MAX_HBQS 4
439/* this matches the position in the lpfc_hbq_defs array */
92d7f7b0 440#define LPFC_ELS_HBQ 0
51ef4c26 441#define LPFC_EXTRA_HBQ 1
ed957684 442
7af67051
JS		 443enum hba_temp_state {
444 HBA_NORMAL_TEMP,
445 HBA_OVER_TEMP
446};
447
db2378e0
JS		 448enum intr_type_t {
449 NONE = 0,
450 INTx,
451 MSI,
452 MSIX,
453};
454
f1c3b0fc
JS		 455struct unsol_rcv_ct_ctx {
456 uint32_t ctxt_id;
457 uint32_t SID;
458 uint32_t oxid;
4fede78f
JS		 459 uint32_t flags;
460#define UNSOL_VALID 0x00000001
f1c3b0fc
JS		 461};
462
dea3101e 463struct lpfc_hba {
3772a991
JS		 464 /* SCSI interface function jump table entries */
465 int (*lpfc_new_scsi_buf)
466 (struct lpfc_vport *, int);
467 struct lpfc_scsi_buf * (*lpfc_get_scsi_buf)
468 (struct lpfc_hba *);
469 int (*lpfc_scsi_prep_dma_buf)
470 (struct lpfc_hba *, struct lpfc_scsi_buf *);
471 void (*lpfc_scsi_unprep_dma_buf)
472 (struct lpfc_hba *, struct lpfc_scsi_buf *);
473 void (*lpfc_release_scsi_buf)
474 (struct lpfc_hba *, struct lpfc_scsi_buf *);
475 void (*lpfc_rampdown_queue_depth)
476 (struct lpfc_hba *);
477 void (*lpfc_scsi_prep_cmnd)
478 (struct lpfc_vport *, struct lpfc_scsi_buf *,
479 struct lpfc_nodelist *);
3772a991
JS		 480 /* IOCB interface function jump table entries */
481 int (*__lpfc_sli_issue_iocb)
482 (struct lpfc_hba *, uint32_t,
483 struct lpfc_iocbq *, uint32_t);
484 void (*__lpfc_sli_release_iocbq)(struct lpfc_hba *,
485 struct lpfc_iocbq *);
486 int (*lpfc_hba_down_post)(struct lpfc_hba *phba);
487
488
489 IOCB_t * (*lpfc_get_iocb_from_iocbq)
490 (struct lpfc_iocbq *);
491 void (*lpfc_scsi_cmd_iocb_cmpl)
492 (struct lpfc_hba *, struct lpfc_iocbq *, struct lpfc_iocbq *);
493
494 /* MBOX interface function jump table entries */
495 int (*lpfc_sli_issue_mbox)
496 (struct lpfc_hba *, LPFC_MBOXQ_t *, uint32_t);
497 /* Slow-path IOCB process function jump table entries */
498 void (*lpfc_sli_handle_slow_ring_event)
499 (struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
500 uint32_t mask);
501 /* INIT device interface function jump table entries */
502 int (*lpfc_sli_hbq_to_firmware)
503 (struct lpfc_hba *, uint32_t, struct hbq_dmabuf *);
504 int (*lpfc_sli_brdrestart)
505 (struct lpfc_hba *);
506 int (*lpfc_sli_brdready)
507 (struct lpfc_hba *, uint32_t);
508 void (*lpfc_handle_eratt)
509 (struct lpfc_hba *);
510 void (*lpfc_stop_port)
511 (struct lpfc_hba *);
84d1b006
JS		 512 int (*lpfc_hba_init_link)
513 (struct lpfc_hba *);
514 int (*lpfc_hba_down_link)
515 (struct lpfc_hba *);
3772a991 516
3772a991
JS		 517 /* SLI4 specific HBA data structure */
518 struct lpfc_sli4_hba sli4_hba;
519
dea3101e 520 struct lpfc_sli sli;
3772a991
JS		 521 uint8_t pci_dev_grp; /* lpfc PCI dev group: 0x0, 0x1, 0x2,... */
522 uint32_t sli_rev; /* SLI2, SLI3, or SLI4 */
ed957684 523 uint32_t sli3_options; /* Mask of enabled SLI3 options */
34b02dcd
JS		 524#define LPFC_SLI3_HBQ_ENABLED 0x01
525#define LPFC_SLI3_NPIV_ENABLED 0x02
526#define LPFC_SLI3_VPORT_TEARDOWN 0x04
527#define LPFC_SLI3_CRP_ENABLED 0x08
528#define LPFC_SLI3_INB_ENABLED 0x10
81301a9b 529#define LPFC_SLI3_BG_ENABLED 0x20
da0436e9 530#define LPFC_SLI3_DSS_ENABLED 0x40
ed957684
JS		 531 uint32_t iocb_cmd_size;
532 uint32_t iocb_rsp_size;
2e0fef85
JS		 533
534 enum hba_state link_state;
535 uint32_t link_flag; /* link state flags */
311464ec 536#define LS_LOOPBACK_MODE 0x1 /* NPort is in Loopback mode */
2e0fef85
JS		 537 /* This flag is set while issuing */
538 /* INIT_LINK mailbox command */
92d7f7b0 539#define LS_NPIV_FAB_SUPPORTED 0x2 /* Fabric supports NPIV */
1b32f6aa 540#define LS_IGNORE_ERATT 0x4 /* intr handler should ignore ERATT */
2e0fef85 541
9399627f
JS		 542 uint32_t hba_flag; /* hba generic flags */
543#define HBA_ERATT_HANDLED 0x1 /* This flag is set when eratt handled */
da0436e9
JS		 544#define DEFER_ERATT 0x2 /* Deferred error attention in progress */
545#define HBA_FCOE_SUPPORT 0x4 /* HBA function supports FCOE */
45ed1190 546#define HBA_SP_QUEUE_EVT 0x8 /* Slow-path qevt posted to worker thread*/
da0436e9
JS		 547#define HBA_POST_RECEIVE_BUFFER 0x10 /* Rcv buffers need to be posted */
548#define FCP_XRI_ABORT_EVENT 0x20
549#define ELS_XRI_ABORT_EVENT 0x40
550#define ASYNC_EVENT 0x80
a0c87cbd 551#define LINK_DISABLED 0x100 /* Link disabled by user */
32b9793f 552#define FCF_DISC_INPROGRESS 0x200 /* FCF discovery in progress */
45ed1190
JS		 553#define HBA_FIP_SUPPORT 0x400 /* FIP support in HBA */
554#define HBA_AER_ENABLED 0x800 /* AER enabled with HBA */
555 uint32_t fcp_ring_in_use; /* When polling test if intr-hndlr active*/
34b02dcd
JS		 556 struct lpfc_dmabuf slim2p;
557
558 MAILBOX_t *mbox;
7a470277 559 uint32_t *mbox_ext;
34b02dcd
JS		 560 uint32_t *inb_ha_copy;
561 uint32_t *inb_counter;
562 uint32_t inb_last_counter;
9399627f 563 uint32_t ha_copy;
34b02dcd
JS		 564 struct _PCB *pcb;
565 struct _IOCB *IOCBs;
2e0fef85 566
34b02dcd 567 struct lpfc_dmabuf hbqslimp;
2e0fef85 568
dea3101e
JB		 569 uint16_t pci_cfg_value;
570
dea3101e
JB		 571 uint8_t fc_linkspeed; /* Link speed after last READ_LA */
572
573 uint32_t fc_eventTag; /* event tag for link attention */
4d9ab994 574 uint32_t link_events;
dea3101e 575
dea3101e 576 /* These fields used to be binfo */
dea3101e 577 uint32_t fc_pref_DID; /* preferred D_ID */
92d7f7b0 578 uint8_t fc_pref_ALPA; /* preferred AL_PA */
dea3101e
JB		 579 uint32_t fc_edtov; /* E_D_TOV timer value */
580 uint32_t fc_arbtov; /* ARB_TOV timer value */
581 uint32_t fc_ratov; /* R_A_TOV timer value */
582 uint32_t fc_rttov; /* R_T_TOV timer value */
583 uint32_t fc_altov; /* AL_TOV timer value */
584 uint32_t fc_crtov; /* C_R_TOV timer value */
585 uint32_t fc_citov; /* C_I_TOV timer value */
dea3101e 586
dea3101e
JB		 587 struct serv_parm fc_fabparam; /* fabric service parameters buffer */
588 uint8_t alpa_map[128]; /* AL_PA map from READ_LA */
589
dea3101e 590 uint32_t lmt;
dea3101e
JB		 591
592 uint32_t fc_topology; /* link topology, from LINK INIT */
593
594 struct lpfc_stats fc_stat;
595
dea3101e
JB		 596 struct lpfc_nodelist fc_fcpnodev; /* nodelist entry for no device */
597 uint32_t nport_event_cnt; /* timestamp for nlplist entry */
598
2e0fef85
JS		 599 uint8_t wwnn[8];
600 uint8_t wwpn[8];
dea3101e
JB		 601 uint32_t RandomData[7];
602
3de2a653 603 /* HBA Config Parameters */
dea3101e 604 uint32_t cfg_ack0;
78b2d852 605 uint32_t cfg_enable_npiv;
dea3101e 606 uint32_t cfg_topology;
dea3101e
JB		 607 uint32_t cfg_link_speed;
608 uint32_t cfg_cr_delay;
609 uint32_t cfg_cr_count;
cf5bf97e 610 uint32_t cfg_multi_ring_support;
a4bc3379
JS		 611 uint32_t cfg_multi_ring_rctl;
612 uint32_t cfg_multi_ring_type;
875fbdfe
JSEC		 613 uint32_t cfg_poll;
614 uint32_t cfg_poll_tmo;
4ff43246 615 uint32_t cfg_use_msi;
da0436e9
JS		 616 uint32_t cfg_fcp_imax;
617 uint32_t cfg_fcp_wq_count;
618 uint32_t cfg_fcp_eq_count;
dea3101e 619 uint32_t cfg_sg_seg_cnt;
81301a9b 620 uint32_t cfg_prot_sg_seg_cnt;
dea3101e 621 uint32_t cfg_sg_dma_buf_size;
a12e07bc 622 uint64_t cfg_soft_wwnn;
c3f28afa 623 uint64_t cfg_soft_wwpn;
3de2a653 624 uint32_t cfg_hba_queue_depth;
13815c83
JS		 625 uint32_t cfg_enable_hba_reset;
626 uint32_t cfg_enable_hba_heartbeat;
81301a9b 627 uint32_t cfg_enable_bg;
7a470277 628 uint32_t cfg_hostmem_hgp;
da0436e9 629 uint32_t cfg_log_verbose;
0d878419 630 uint32_t cfg_aer_support;
84d1b006 631 uint32_t cfg_suppress_link_up;
e40a02c1
JS		 632#define LPFC_INITIALIZE_LINK 0 /* do normal init_link mbox */
633#define LPFC_DELAY_INIT_LINK 1 /* layered driver hold off */
634#define LPFC_DELAY_INIT_LINK_INDEFINITELY 2 /* wait, manual intervention */
c01f3208 635
dea3101e
JB		 636 lpfc_vpd_t vpd; /* vital product data */
637
dea3101e
JB		 638 struct pci_dev *pcidev;
639 struct list_head work_list;
640 uint32_t work_ha; /* Host Attention Bits for WT */
641 uint32_t work_ha_mask; /* HA Bits owned by WT */
642 uint32_t work_hs; /* HS stored in case of ERRAT */
643 uint32_t work_status[2]; /* Extra status from SLIM */
dea3101e 644
5e9d9b82 645 wait_queue_head_t work_waitq;
dea3101e 646 struct task_struct *worker_thread;
d7c255b2 647 unsigned long data_flags;
dea3101e 648
3163f725 649 uint32_t hbq_in_use; /* HBQs in use flag */
3772a991 650 struct list_head rb_pend_list; /* Received buffers to be processed */
ed957684 651 uint32_t hbq_count; /* Count of configured HBQs */
92d7f7b0 652 struct hbq_s hbqs[LPFC_MAX_HBQS]; /* local copy of hbq indicies */
ed957684 653
8fa38513
JS		 654 uint32_t fcp_qidx; /* next work queue to post work to */
655
dea3101e 656 unsigned long pci_bar0_map; /* Physical address for PCI BAR0 */
3772a991 657 unsigned long pci_bar1_map; /* Physical address for PCI BAR1 */
dea3101e
JB		 658 unsigned long pci_bar2_map; /* Physical address for PCI BAR2 */
659 void __iomem *slim_memmap_p; /* Kernel memory mapped address for
660 PCI BAR0 */
661 void __iomem *ctrl_regs_memmap_p;/* Kernel memory mapped address for
662 PCI BAR2 */
663
664 void __iomem *MBslimaddr; /* virtual address for mbox cmds */
665 void __iomem *HAregaddr; /* virtual address for host attn reg */
666 void __iomem *CAregaddr; /* virtual address for chip attn reg */
667 void __iomem *HSregaddr; /* virtual address for host status
668 reg */
669 void __iomem *HCregaddr; /* virtual address for host ctl reg */
670
ed957684 671 struct lpfc_hgp __iomem *host_gp; /* Host side get/put pointers */
34b02dcd 672 struct lpfc_pgp *port_gp;
ed957684 673 uint32_t __iomem *hbq_put; /* Address in SLIM to HBQ put ptrs */
92d7f7b0 674 uint32_t *hbq_get; /* Host mem address of HBQ get ptrs */
ed957684 675
dea3101e
JB		 676 int brd_no; /* FC board number */
677
678 char SerialNumber[32]; /* adapter Serial Number */
679 char OptionROMVersion[32]; /* adapter BIOS / Fcode version */
680 char ModelDesc[256]; /* Model Description */
681 char ModelName[80]; /* Model Name */
682 char ProgramType[256]; /* Program Type */
683 char Port[20]; /* Port No */
684 uint8_t vpd_flag; /* VPD data flag */
685
686#define VPD_MODEL_DESC 0x1 /* valid vpd model description */
687#define VPD_MODEL_NAME 0x2 /* valid vpd model name */
688#define VPD_PROGRAM_TYPE 0x4 /* valid vpd program type */
689#define VPD_PORT 0x8 /* valid vpd port data */
690#define VPD_MASK 0xf /* mask for any vpd data */
691
a12e07bc 692 uint8_t soft_wwn_enable;
c3f28afa 693
875fbdfe 694 struct timer_list fcp_poll_timer;
9399627f 695 struct timer_list eratt_poll;
875fbdfe 696
dea3101e
JB		 697 /*
698 * stat counters
699 */
700 uint64_t fc4InputRequests;
701 uint64_t fc4OutputRequests;
702 uint64_t fc4ControlRequests;
81301a9b
JS		 703 uint64_t bg_guard_err_cnt;
704 uint64_t bg_apptag_err_cnt;
705 uint64_t bg_reftag_err_cnt;
dea3101e
JB		 706
707 struct lpfc_sysfs_mbox sysfs_mbox;
708
709 /* fastpath list. */
875fbdfe 710 spinlock_t scsi_buf_list_lock;
dea3101e
JB		 711 struct list_head lpfc_scsi_buf_list;
712 uint32_t total_scsi_bufs;
713 struct list_head lpfc_iocb_list;
714 uint32_t total_iocbq_bufs;
2e0fef85 715 spinlock_t hbalock;
dea3101e
JB		 716
717 /* pci_mem_pools */
718 struct pci_pool *lpfc_scsi_dma_buf_pool;
719 struct pci_pool *lpfc_mbuf_pool;
da0436e9
JS		 720 struct pci_pool *lpfc_hrb_pool; /* header receive buffer pool */
721 struct pci_pool *lpfc_drb_pool; /* data receive buffer pool */
8568a4d2 722 struct pci_pool *lpfc_hbq_pool; /* SLI3 hbq buffer pool */
dea3101e
JB		 723 struct lpfc_dma_pool lpfc_mbuf_safety_pool;
724
725 mempool_t *mbox_mem_pool;
726 mempool_t *nlp_mem_pool;
f888ba3c
JSEC		 727
728 struct fc_host_statistics link_stats;
db2378e0 729 enum intr_type_t intr_type;
5b75da2f
JS		 730 uint32_t intr_mode;
731#define LPFC_INTR_ERROR 0xFFFFFFFF
9399627f 732 struct msix_entry msix_entries[LPFC_MSIX_VECTORS];
858c9f6c 733
2e0fef85 734 struct list_head port_list;
549e55cd
JS		 735 struct lpfc_vport *pport; /* physical lpfc_vport pointer */
736 uint16_t max_vpi; /* Maximum virtual nports */
09372820 737#define LPFC_MAX_VPI 0xFFFF /* Max number of VPI supported */
da0436e9
JS		 738 uint16_t max_vports; /*
739 * For IOV HBAs max_vpi can change
740 * after a reset. max_vports is max
741 * number of vports present. This can
742 * be greater than max_vpi.
743 */
744 uint16_t vpi_base;
745 uint16_t vfi_base;
549e55cd 746 unsigned long *vpi_bmask; /* vpi allocation table */
92d7f7b0
JS		 747
748 /* Data structure used by fabric iocb scheduler */
749 struct list_head fabric_iocb_list;
750 atomic_t fabric_iocb_count;
751 struct timer_list fabric_block_timer;
752 unsigned long bit_flags;
753#define FABRIC_COMANDS_BLOCKED 0
754 atomic_t num_rsrc_err;
755 atomic_t num_cmd_success;
756 unsigned long last_rsrc_error_time;
757 unsigned long last_ramp_down_time;
758 unsigned long last_ramp_up_time;
923e4b6a 759#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
858c9f6c
JS		 760 struct dentry *hba_debugfs_root;
761 atomic_t debugfs_vport_count;
78b2d852 762 struct dentry *debug_hbqinfo;
c95d6c6c
JS		 763 struct dentry *debug_dumpHostSlim;
764 struct dentry *debug_dumpHBASlim;
81301a9b
JS		 765 struct dentry *debug_dumpData; /* BlockGuard BPL*/
766 struct dentry *debug_dumpDif; /* BlockGuard BPL*/
a58cbd52
JS		 767 struct dentry *debug_slow_ring_trc;
768 struct lpfc_debugfs_trc *slow_ring_trc;
769 atomic_t slow_ring_trc_cnt;
858c9f6c
JS		 770#endif
771
0ff10d46
JS		 772 /* Used for deferred freeing of ELS data buffers */
773 struct list_head elsbuf;
774 int elsbuf_cnt;
775 int elsbuf_prev_cnt;
776
57127f15 777 uint8_t temp_sensor_support;
858c9f6c
JS		 778 /* Fields used for heart beat. */
779 unsigned long last_completion_time;
780 struct timer_list hb_tmofunc;
781 uint8_t hb_outstanding;
84774a4d 782 enum hba_temp_state over_temp_state;
e47c9093
JS		 783 /* ndlp reference management */
784 spinlock_t ndlp_lock;
76bb24ef
JS		 785 /*
786 * Following bit will be set for all buffer tags which are not
787 * associated with any HBQ.
788 */
789#define QUE_BUFTAG_BIT (1<<31)
790 uint32_t buffer_tag_count;
84774a4d
JS		 791 int wait_4_mlo_maint_flg;
792 wait_queue_head_t wait_4_mlo_m_q;
ea2151b4
JS		 793 /* data structure used for latency data collection */
794#define LPFC_NO_BUCKET 0
795#define LPFC_LINEAR_BUCKET 1
796#define LPFC_POWER2_BUCKET 2
797 uint8_t bucket_type;
798 uint32_t bucket_base;
799 uint32_t bucket_step;
800
801/* Maximum number of events that can be outstanding at any time*/
802#define LPFC_MAX_EVT_COUNT 512
803 atomic_t fast_event_count;
32b9793f
JS		 804 uint32_t fcoe_eventtag;
805 uint32_t fcoe_eventtag_at_fcf_scan;
da0436e9
JS		 806 struct lpfc_fcf fcf;
807 uint8_t fc_map[3];
808 uint8_t valid_vlan;
809 uint16_t vlan_id;
810 struct list_head fcf_conn_rec_list;
f1c3b0fc 811
4fede78f 812 spinlock_t ct_ev_lock; /* synchronize access to ct_ev_waiters */
f1c3b0fc
JS		 813 struct list_head ct_ev_waiters;
814 struct unsol_rcv_ct_ctx ct_ctx[64];
815 uint32_t ctx_idx;
e2aed29f
JS		 816
817 uint8_t menlo_flag; /* menlo generic flags */
818#define HBA_MENLO_SUPPORT 0x1 /* HBA supports menlo commands */
dea3101e
JB		 819};
820
2e0fef85
JS		 821static inline struct Scsi_Host *
822lpfc_shost_from_vport(struct lpfc_vport *vport)
823{
824 return container_of((void *) vport, struct Scsi_Host, hostdata[0]);
825}
826
5b8bd0c9 827static inline void
2e0fef85
JS		 828lpfc_set_loopback_flag(struct lpfc_hba *phba)
829{
5b8bd0c9 830 if (phba->cfg_topology == FLAGS_LOCAL_LB)
2e0fef85 831 phba->link_flag |= LS_LOOPBACK_MODE;
5b8bd0c9 832 else
2e0fef85
JS		 833 phba->link_flag &= ~LS_LOOPBACK_MODE;
834}
835
836static inline int
837lpfc_is_link_up(struct lpfc_hba *phba)
838{
839 return phba->link_state == LPFC_LINK_UP ||
92d7f7b0
JS		 840 phba->link_state == LPFC_CLEAR_LA ||
841 phba->link_state == LPFC_HBA_READY;
5b8bd0c9 842}
dea3101e 843
5e9d9b82
JS		 844static inline void
845lpfc_worker_wake_up(struct lpfc_hba *phba)
846{
847 /* Set the lpfc data pending flag */
848 set_bit(LPFC_DATA_READY, &phba->data_flags);
849
850 /* Wake up worker thread */
851 wake_up(&phba->work_waitq);
852 return;
853}
854
9399627f
JS		 855static inline void
856lpfc_sli_read_hs(struct lpfc_hba *phba)
857{
858 /*
859 * There was a link/board error. Read the status register to retrieve
860 * the error event and process it.
861 */
862 phba->sli.slistat.err_attn_event++;
863
864 /* Save status info */
865 phba->work_hs = readl(phba->HSregaddr);
866 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
867 phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
868
869 /* Clear chip Host Attention error bit */
870 writel(HA_ERATT, phba->HAregaddr);
871 readl(phba->HAregaddr); /* flush */
872 phba->pport->stopped = 1;
873
874 return;
875}
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