]> bbs.cooldavid.org Git - net-next-2.6.git/blame - drivers/scsi/lpfc/lpfc.h
git://bbs.cooldavid.org / net-next-2.6.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Merge branch 'upstream/core' of git://git.kernel.org/pub/scm/linux/kernel/git/jeremy/xen
[net-next-2.6.git] / drivers / scsi / lpfc / lpfc.h
CommitLineData
dea3101e
JB		 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173 3 * Fibre Channel Host Bus Adapters. *
4fede78f 4 * Copyright (C) 2004-2010 Emulex. All rights reserved. *
c44ce173 5 * EMULEX and SLI are trademarks of Emulex. *
dea3101e 6 * www.emulex.com *
c44ce173 7 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea3101e
JB		 8 * *
9 * This program is free software; you can redistribute it and/or *
c44ce173
JSEC		 10 * modify it under the terms of version 2 of the GNU General *
11 * Public License as published by the Free Software Foundation. *
12 * This program is distributed in the hope that it will be useful. *
13 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
14 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
15 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
16 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
17 * TO BE LEGALLY INVALID. See the GNU General Public License for *
18 * more details, a copy of which can be found in the file COPYING *
19 * included with this package. *
dea3101e
JB		 20 *******************************************************************/
21
2e0fef85 22#include <scsi/scsi_host.h>
dea3101e
JB		 23struct lpfc_sli2_slim;
24
3772a991
JS		 25#define LPFC_PCI_DEV_LP 0x1
26#define LPFC_PCI_DEV_OC 0x2
27
28#define LPFC_SLI_REV2 2
29#define LPFC_SLI_REV3 3
30#define LPFC_SLI_REV4 4
31
97eab634 32#define LPFC_MAX_TARGET 4096 /* max number of targets supported */
e17da18e
JS		 33#define LPFC_MAX_DISC_THREADS 64 /* max outstanding discovery els
34 requests */
35#define LPFC_MAX_NS_RETRY 3 /* Number of retry attempts to contact
36 the NameServer before giving up. */
445cf4f4 37#define LPFC_CMD_PER_LUN 3 /* max outstanding cmds per lun */
81301a9b 38#define LPFC_DEFAULT_SG_SEG_CNT 64 /* sg element count per scsi cmnd */
e2aed29f
JS		 39#define LPFC_DEFAULT_MENLO_SG_SEG_CNT 128 /* sg element count per scsi
40 cmnd for menlo needs nearly twice as for firmware
41 downloads using bsg */
81301a9b
JS		 42#define LPFC_DEFAULT_PROT_SG_SEG_CNT 4096 /* sg protection elements count */
43#define LPFC_MAX_SG_SEG_CNT 4096 /* sg element count per scsi cmnd */
44#define LPFC_MAX_PROT_SG_SEG_CNT 4096 /* prot sg element count per scsi cmd*/
dea3101e 45#define LPFC_IOCB_LIST_CNT 2250 /* list of IOCBs for fast-path usage. */
445cf4f4 46#define LPFC_Q_RAMP_UP_INTERVAL 120 /* lun q_depth ramp up interval */
495a714c 47#define LPFC_VNAME_LEN 100 /* vport symbolic name length */
977b5a0a
JS		 48#define LPFC_TGTQ_INTERVAL 40000 /* Min amount of time between tgt
49 queue depth change in millisecs */
50#define LPFC_TGTQ_RAMPUP_PCENT 5 /* Target queue rampup in percentage */
7dc517df 51#define LPFC_MIN_TGT_QDEPTH 10
977b5a0a 52#define LPFC_MAX_TGT_QDEPTH 0xFFFF
dea3101e 53
ea2151b4
JS		 54#define LPFC_MAX_BUCKET_COUNT 20 /* Maximum no. of buckets for stat data
55 collection. */
92d7f7b0
JS		 56/*
57 * Following time intervals are used of adjusting SCSI device
58 * queue depths when there are driver resource error or Firmware
59 * resource error.
60 */
61#define QUEUE_RAMP_DOWN_INTERVAL (1 * HZ) /* 1 Second */
62#define QUEUE_RAMP_UP_INTERVAL (300 * HZ) /* 5 minutes */
63
64/* Number of exchanges reserved for discovery to complete */
65#define LPFC_DISC_IOCB_BUFF_COUNT 20
66
858c9f6c 67#define LPFC_HB_MBOX_INTERVAL 5 /* Heart beat interval in seconds. */
311464ec 68#define LPFC_HB_MBOX_TIMEOUT 30 /* Heart beat timeout in seconds. */
858c9f6c 69
9399627f
JS		 70/* Error Attention event polling interval */
71#define LPFC_ERATT_POLL_INTERVAL 5 /* EATT poll interval in seconds */
72
dea3101e
JB		 73/* Define macros for 64 bit support */
74#define putPaddrLow(addr) ((uint32_t) (0xffffffff & (u64)(addr)))
75#define putPaddrHigh(addr) ((uint32_t) (0xffffffff & (((u64)(addr))>>32)))
76#define getPaddr(high, low) ((dma_addr_t)( \
77 (( (u64)(high)<<16 ) << 16)|( (u64)(low))))
78/* Provide maximum configuration definitions. */
79#define LPFC_DRVR_TIMEOUT 16 /* driver iocb timeout value in sec */
dea3101e
JB		 80#define FC_MAX_ADPTMSG 64
81
82#define MAX_HBAEVT 32
83
9399627f
JS		 84/* Number of MSI-X vectors the driver uses */
85#define LPFC_MSIX_VECTORS 2
86
5e9d9b82
JS		 87/* lpfc wait event data ready flag */
88#define LPFC_DATA_READY (1<<0)
89
875fbdfe
JSEC		 90enum lpfc_polling_flags {
91 ENABLE_FCP_RING_POLLING = 0x1,
92 DISABLE_FCP_RING_INT = 0x2
93};
94
dea3101e
JB		 95/* Provide DMA memory definitions the driver uses per port instance. */
96struct lpfc_dmabuf {
97 struct list_head list;
98 void *virt; /* virtual address ptr */
99 dma_addr_t phys; /* mapped address */
76bb24ef 100 uint32_t buffer_tag; /* used for tagged queue ring */
dea3101e
JB		 101};
102
103struct lpfc_dma_pool {
104 struct lpfc_dmabuf *elements;
105 uint32_t max_count;
106 uint32_t current_count;
107};
108
ed957684 109struct hbq_dmabuf {
da0436e9 110 struct lpfc_dmabuf hbuf;
ed957684 111 struct lpfc_dmabuf dbuf;
51ef4c26 112 uint32_t size;
ed957684 113 uint32_t tag;
4d9ab994 114 struct lpfc_cq_event cq_event;
45ed1190 115 unsigned long time_stamp;
ed957684
JS		 116};
117
dea3101e
JB		 118/* Priority bit. Set value to exceed low water mark in lpfc_mem. */
119#define MEM_PRI 0x100
120
121
122/****************************************************************************/
123/* Device VPD save area */
124/****************************************************************************/
125typedef struct lpfc_vpd {
126 uint32_t status; /* vpd status value */
127 uint32_t length; /* number of bytes actually returned */
128 struct {
129 uint32_t rsvd1; /* Revision numbers */
130 uint32_t biuRev;
131 uint32_t smRev;
132 uint32_t smFwRev;
133 uint32_t endecRev;
134 uint16_t rBit;
135 uint8_t fcphHigh;
136 uint8_t fcphLow;
137 uint8_t feaLevelHigh;
138 uint8_t feaLevelLow;
139 uint32_t postKernRev;
140 uint32_t opFwRev;
141 uint8_t opFwName[16];
142 uint32_t sli1FwRev;
143 uint8_t sli1FwName[16];
144 uint32_t sli2FwRev;
145 uint8_t sli2FwName[16];
146 } rev;
92d7f7b0
JS		 147 struct {
148#ifdef __BIG_ENDIAN_BITFIELD
da0436e9
JS		 149 uint32_t rsvd3 :19; /* Reserved */
150 uint32_t cdss : 1; /* Configure Data Security SLI */
151 uint32_t rsvd2 : 3; /* Reserved */
152 uint32_t cbg : 1; /* Configure BlockGuard */
92d7f7b0
JS		 153 uint32_t cmv : 1; /* Configure Max VPIs */
154 uint32_t ccrp : 1; /* Config Command Ring Polling */
155 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
156 uint32_t chbs : 1; /* Cofigure Host Backing store */
157 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
158 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
159 uint32_t cmx : 1; /* Configure Max XRIs */
160 uint32_t cmr : 1; /* Configure Max RPIs */
161#else /* __LITTLE_ENDIAN */
162 uint32_t cmr : 1; /* Configure Max RPIs */
163 uint32_t cmx : 1; /* Configure Max XRIs */
164 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
165 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
166 uint32_t chbs : 1; /* Cofigure Host Backing store */
167 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
168 uint32_t ccrp : 1; /* Config Command Ring Polling */
169 uint32_t cmv : 1; /* Configure Max VPIs */
da0436e9
JS		 170 uint32_t cbg : 1; /* Configure BlockGuard */
171 uint32_t rsvd2 : 3; /* Reserved */
172 uint32_t cdss : 1; /* Configure Data Security SLI */
173 uint32_t rsvd3 :19; /* Reserved */
92d7f7b0
JS		 174#endif
175 } sli3Feat;
dea3101e
JB		 176} lpfc_vpd_t;
177
178struct lpfc_scsi_buf;
179
180
181/*
182 * lpfc stat counters
183 */
184struct lpfc_stats {
185 /* Statistics for ELS commands */
186 uint32_t elsLogiCol;
187 uint32_t elsRetryExceeded;
188 uint32_t elsXmitRetry;
189 uint32_t elsDelayRetry;
190 uint32_t elsRcvDrop;
191 uint32_t elsRcvFrame;
192 uint32_t elsRcvRSCN;
193 uint32_t elsRcvRNID;
194 uint32_t elsRcvFARP;
195 uint32_t elsRcvFARPR;
196 uint32_t elsRcvFLOGI;
197 uint32_t elsRcvPLOGI;
198 uint32_t elsRcvADISC;
199 uint32_t elsRcvPDISC;
200 uint32_t elsRcvFAN;
201 uint32_t elsRcvLOGO;
202 uint32_t elsRcvPRLO;
203 uint32_t elsRcvPRLI;
7bb3b137 204 uint32_t elsRcvLIRR;
12265f68 205 uint32_t elsRcvRLS;
7bb3b137
JW		 206 uint32_t elsRcvRPS;
207 uint32_t elsRcvRPL;
5ffc266e 208 uint32_t elsRcvRRQ;
12265f68
JS		 209 uint32_t elsRcvRTV;
210 uint32_t elsRcvECHO;
dea3101e 211 uint32_t elsXmitFLOGI;
92d7f7b0 212 uint32_t elsXmitFDISC;
dea3101e
JB		 213 uint32_t elsXmitPLOGI;
214 uint32_t elsXmitPRLI;
215 uint32_t elsXmitADISC;
216 uint32_t elsXmitLOGO;
217 uint32_t elsXmitSCR;
218 uint32_t elsXmitRNID;
219 uint32_t elsXmitFARP;
220 uint32_t elsXmitFARPR;
221 uint32_t elsXmitACC;
222 uint32_t elsXmitLSRJT;
223
224 uint32_t frameRcvBcast;
225 uint32_t frameRcvMulti;
226 uint32_t strayXmitCmpl;
227 uint32_t frameXmitDelay;
228 uint32_t xriCmdCmpl;
229 uint32_t xriStatErr;
230 uint32_t LinkUp;
231 uint32_t LinkDown;
232 uint32_t LinkMultiEvent;
233 uint32_t NoRcvBuf;
234 uint32_t fcpCmd;
235 uint32_t fcpCmpl;
236 uint32_t fcpRspErr;
237 uint32_t fcpRemoteStop;
238 uint32_t fcpPortRjt;
239 uint32_t fcpPortBusy;
240 uint32_t fcpError;
241 uint32_t fcpLocalErr;
242};
243
244enum sysfs_mbox_state {
245 SMBOX_IDLE,
246 SMBOX_WRITING,
247 SMBOX_READING
248};
249
250struct lpfc_sysfs_mbox {
251 enum sysfs_mbox_state state;
252 size_t offset;
253 struct lpfcMboxq * mbox;
254};
255
2e0fef85
JS		 256struct lpfc_hba;
257
92d7f7b0 258
2e0fef85 259enum discovery_state {
92d7f7b0
JS		 260 LPFC_VPORT_UNKNOWN = 0, /* vport state is unknown */
261 LPFC_VPORT_FAILED = 1, /* vport has failed */
262 LPFC_LOCAL_CFG_LINK = 6, /* local NPORT Id configured */
263 LPFC_FLOGI = 7, /* FLOGI sent to Fabric */
264 LPFC_FDISC = 8, /* FDISC sent for vport */
265 LPFC_FABRIC_CFG_LINK = 9, /* Fabric assigned NPORT Id
266 * configured */
267 LPFC_NS_REG = 10, /* Register with NameServer */
268 LPFC_NS_QRY = 11, /* Query NameServer for NPort ID list */
269 LPFC_BUILD_DISC_LIST = 12, /* Build ADISC and PLOGI lists for
270 * device authentication / discovery */
271 LPFC_DISC_AUTH = 13, /* Processing ADISC list */
272 LPFC_VPORT_READY = 32,
2e0fef85
JS		 273};
274
275enum hba_state {
276 LPFC_LINK_UNKNOWN = 0, /* HBA state is unknown */
277 LPFC_WARM_START = 1, /* HBA state after selective reset */
278 LPFC_INIT_START = 2, /* Initial state after board reset */
279 LPFC_INIT_MBX_CMDS = 3, /* Initialize HBA with mbox commands */
280 LPFC_LINK_DOWN = 4, /* HBA initialized, link is down */
281 LPFC_LINK_UP = 5, /* Link is up - issue READ_LA */
92d7f7b0 282 LPFC_CLEAR_LA = 6, /* authentication cmplt - issue
2e0fef85 283 * CLEAR_LA */
92d7f7b0 284 LPFC_HBA_READY = 32,
2e0fef85
JS		 285 LPFC_HBA_ERROR = -1
286};
287
288struct lpfc_vport {
2e0fef85 289 struct lpfc_hba *phba;
3772a991 290 struct list_head listentry;
2e0fef85
JS		 291 uint8_t port_type;
292#define LPFC_PHYSICAL_PORT 1
293#define LPFC_NPIV_PORT 2
294#define LPFC_FABRIC_PORT 3
295 enum discovery_state port_state;
296
92d7f7b0 297 uint16_t vpi;
da0436e9 298 uint16_t vfi;
c868595d
JS		 299 uint8_t vpi_state;
300#define LPFC_VPI_REGISTERED 0x1
2e0fef85
JS		 301
302 uint32_t fc_flag; /* FC flags */
303/* Several of these flags are HBA centric and should be moved to
304 * phba->link_flag (e.g. FC_PTP, FC_PUBLIC_LOOP)
305 */
92d7f7b0
JS		 306#define FC_PT2PT 0x1 /* pt2pt with no fabric */
307#define FC_PT2PT_PLOGI 0x2 /* pt2pt initiate PLOGI */
308#define FC_DISC_TMO 0x4 /* Discovery timer running */
309#define FC_PUBLIC_LOOP 0x8 /* Public loop */
310#define FC_LBIT 0x10 /* LOGIN bit in loopinit set */
311#define FC_RSCN_MODE 0x20 /* RSCN cmd rcv'ed */
312#define FC_NLP_MORE 0x40 /* More node to process in node tbl */
313#define FC_OFFLINE_MODE 0x80 /* Interface is offline for diag */
314#define FC_FABRIC 0x100 /* We are fabric attached */
4b40c59e 315#define FC_VPORT_LOGO_RCVD 0x200 /* LOGO received on vport */
92d7f7b0 316#define FC_RSCN_DISCOVERY 0x400 /* Auth all devices after RSCN */
4b40c59e 317#define FC_LOGO_RCVD_DID_CHNG 0x800 /* FDISC on phys port detect DID chng*/
92d7f7b0
JS		 318#define FC_SCSI_SCAN_TMO 0x4000 /* scsi scan timer running */
319#define FC_ABORT_DISCOVERY 0x8000 /* we want to abort discovery */
320#define FC_NDISC_ACTIVE 0x10000 /* NPort discovery active */
321#define FC_BYPASSED_MODE 0x20000 /* NPort is in bypassed mode */
92d7f7b0
JS		 322#define FC_VPORT_NEEDS_REG_VPI 0x80000 /* Needs to have its vpi registered */
323#define FC_RSCN_DEFERRED 0x100000 /* A deferred RSCN being processed */
1c6834a7 324#define FC_VPORT_NEEDS_INIT_VPI 0x200000 /* Need to INIT_VPI before FDISC */
695a814e
JS		 325#define FC_VPORT_CVL_RCVD 0x400000 /* VLink failed due to CVL */
326#define FC_VFI_REGISTERED 0x800000 /* VFI is registered */
327#define FC_FDISC_COMPLETED 0x1000000/* FDISC completed */
2e0fef85 328
7ee5d43e
JS		 329 uint32_t ct_flags;
330#define FC_CT_RFF_ID 0x1 /* RFF_ID accepted by switch */
331#define FC_CT_RNN_ID 0x2 /* RNN_ID accepted by switch */
332#define FC_CT_RSNN_NN 0x4 /* RSNN_NN accepted by switch */
333#define FC_CT_RSPN_ID 0x8 /* RSPN_ID accepted by switch */
334#define FC_CT_RFT_ID 0x10 /* RFT_ID accepted by switch */
335
2e0fef85
JS		 336 struct list_head fc_nodes;
337
338 /* Keep counters for the number of entries in each list. */
339 uint16_t fc_plogi_cnt;
340 uint16_t fc_adisc_cnt;
341 uint16_t fc_reglogin_cnt;
342 uint16_t fc_prli_cnt;
343 uint16_t fc_unmap_cnt;
344 uint16_t fc_map_cnt;
345 uint16_t fc_npr_cnt;
346 uint16_t fc_unused_cnt;
347 struct serv_parm fc_sparam; /* buffer for our service parameters */
348
349 uint32_t fc_myDID; /* fibre channel S_ID */
350 uint32_t fc_prevDID; /* previous fibre channel S_ID */
351
352 int32_t stopped; /* HBA has not been restarted since last ERATT */
353 uint8_t fc_linkspeed; /* Link speed after last READ_LA */
354
355 uint32_t num_disc_nodes; /*in addition to hba_state */
356
357 uint32_t fc_nlp_cnt; /* outstanding NODELIST requests */
358 uint32_t fc_rscn_id_cnt; /* count of RSCNs payloads in list */
7f5f3d0d 359 uint32_t fc_rscn_flush; /* flag use of fc_rscn_id_list */
2e0fef85
JS		 360 struct lpfc_dmabuf *fc_rscn_id_list[FC_MAX_HOLD_RSCN];
361 struct lpfc_name fc_nodename; /* fc nodename */
362 struct lpfc_name fc_portname; /* fc portname */
363
364 struct lpfc_work_evt disc_timeout_evt;
365
366 struct timer_list fc_disctmo; /* Discovery rescue timer */
367 uint8_t fc_ns_retry; /* retries for fabric nameserver */
368 uint32_t fc_prli_sent; /* cntr for outstanding PRLIs */
369
370 spinlock_t work_port_lock;
371 uint32_t work_port_events; /* Timeout to be handled */
858c9f6c
JS		 372#define WORKER_DISC_TMO 0x1 /* vport: Discovery timeout */
373#define WORKER_ELS_TMO 0x2 /* vport: ELS timeout */
374#define WORKER_FDMI_TMO 0x4 /* vport: FDMI timeout */
375
376#define WORKER_MBOX_TMO 0x100 /* hba: MBOX timeout */
377#define WORKER_HB_TMO 0x200 /* hba: Heart beat timeout */
b1c11812 378#define WORKER_FABRIC_BLOCK_TMO 0x400 /* hba: fabric block timeout */
858c9f6c
JS		 379#define WORKER_RAMP_DOWN_QUEUE 0x800 /* hba: Decrease Q depth */
380#define WORKER_RAMP_UP_QUEUE 0x1000 /* hba: Increase Q depth */
2a9bf3d0 381#define WORKER_SERVICE_TXQ 0x2000 /* hba: IOCBs on the txq */
2e0fef85
JS		 382
383 struct timer_list fc_fdmitmo;
384 struct timer_list els_tmofunc;
385
386 int unreg_vpi_cmpl;
387
388 uint8_t load_flag;
389#define FC_LOADING 0x1 /* HBA in process of loading drvr */
390#define FC_UNLOADING 0x2 /* HBA in process of unloading drvr */
3de2a653
JS		 391 /* Vport Config Parameters */
392 uint32_t cfg_scan_down;
393 uint32_t cfg_lun_queue_depth;
394 uint32_t cfg_nodev_tmo;
395 uint32_t cfg_devloss_tmo;
396 uint32_t cfg_restrict_login;
397 uint32_t cfg_peer_port_login;
398 uint32_t cfg_fcp_class;
399 uint32_t cfg_use_adisc;
400 uint32_t cfg_fdmi_on;
401 uint32_t cfg_discovery_threads;
e8b62011 402 uint32_t cfg_log_verbose;
3de2a653 403 uint32_t cfg_max_luns;
7ee5d43e 404 uint32_t cfg_enable_da_id;
977b5a0a 405 uint32_t cfg_max_scsicmpl_time;
7dc517df 406 uint32_t cfg_tgt_queue_depth;
3de2a653
JS		 407
408 uint32_t dev_loss_tmo_changed;
51ef4c26
JS		 409
410 struct fc_vport *fc_vport;
411
923e4b6a 412#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
51ef4c26
JS		 413 struct dentry *debug_disc_trc;
414 struct dentry *debug_nodelist;
415 struct dentry *vport_debugfs_root;
416 struct lpfc_debugfs_trc *disc_trc;
417 atomic_t disc_trc_cnt;
418#endif
ea2151b4
JS		 419 uint8_t stat_data_enabled;
420 uint8_t stat_data_blocked;
da0436e9 421 struct list_head rcv_buffer_list;
45ed1190 422 unsigned long rcv_buffer_time_stamp;
da0436e9
JS		 423 uint32_t vport_flag;
424#define STATIC_VPORT 1
2e0fef85
JS		 425};
426
ed957684
JS		 427struct hbq_s {
428 uint16_t entry_count; /* Current number of HBQ slots */
a8adb832 429 uint16_t buffer_count; /* Current number of buffers posted */
ed957684
JS		 430 uint32_t next_hbqPutIdx; /* Index to next HBQ slot to use */
431 uint32_t hbqPutIdx; /* HBQ slot to use */
432 uint32_t local_hbqGetIdx; /* Local copy of Get index from Port */
51ef4c26
JS		 433 void *hbq_virt; /* Virtual ptr to this hbq */
434 struct list_head hbq_buffer_list; /* buffers assigned to this HBQ */
435 /* Callback for HBQ buffer allocation */
436 struct hbq_dmabuf *(*hbq_alloc_buffer) (struct lpfc_hba *);
437 /* Callback for HBQ buffer free */
438 void (*hbq_free_buffer) (struct lpfc_hba *,
439 struct hbq_dmabuf *);
ed957684
JS		 440};
441
51ef4c26
JS		 442#define LPFC_MAX_HBQS 4
443/* this matches the position in the lpfc_hbq_defs array */
92d7f7b0 444#define LPFC_ELS_HBQ 0
51ef4c26 445#define LPFC_EXTRA_HBQ 1
ed957684 446
7af67051
JS		 447enum hba_temp_state {
448 HBA_NORMAL_TEMP,
449 HBA_OVER_TEMP
450};
451
db2378e0
JS		 452enum intr_type_t {
453 NONE = 0,
454 INTx,
455 MSI,
456 MSIX,
457};
458
f1c3b0fc
JS		 459struct unsol_rcv_ct_ctx {
460 uint32_t ctxt_id;
461 uint32_t SID;
462 uint32_t oxid;
4fede78f
JS		 463 uint32_t flags;
464#define UNSOL_VALID 0x00000001
f1c3b0fc
JS		 465};
466
dea3101e 467struct lpfc_hba {
3772a991
JS		 468 /* SCSI interface function jump table entries */
469 int (*lpfc_new_scsi_buf)
470 (struct lpfc_vport *, int);
471 struct lpfc_scsi_buf * (*lpfc_get_scsi_buf)
472 (struct lpfc_hba *);
473 int (*lpfc_scsi_prep_dma_buf)
474 (struct lpfc_hba *, struct lpfc_scsi_buf *);
475 void (*lpfc_scsi_unprep_dma_buf)
476 (struct lpfc_hba *, struct lpfc_scsi_buf *);
477 void (*lpfc_release_scsi_buf)
478 (struct lpfc_hba *, struct lpfc_scsi_buf *);
479 void (*lpfc_rampdown_queue_depth)
480 (struct lpfc_hba *);
481 void (*lpfc_scsi_prep_cmnd)
482 (struct lpfc_vport *, struct lpfc_scsi_buf *,
483 struct lpfc_nodelist *);
3772a991
JS		 484 /* IOCB interface function jump table entries */
485 int (*__lpfc_sli_issue_iocb)
486 (struct lpfc_hba *, uint32_t,
487 struct lpfc_iocbq *, uint32_t);
488 void (*__lpfc_sli_release_iocbq)(struct lpfc_hba *,
489 struct lpfc_iocbq *);
490 int (*lpfc_hba_down_post)(struct lpfc_hba *phba);
491
492
493 IOCB_t * (*lpfc_get_iocb_from_iocbq)
494 (struct lpfc_iocbq *);
495 void (*lpfc_scsi_cmd_iocb_cmpl)
496 (struct lpfc_hba *, struct lpfc_iocbq *, struct lpfc_iocbq *);
497
498 /* MBOX interface function jump table entries */
499 int (*lpfc_sli_issue_mbox)
500 (struct lpfc_hba *, LPFC_MBOXQ_t *, uint32_t);
501 /* Slow-path IOCB process function jump table entries */
502 void (*lpfc_sli_handle_slow_ring_event)
503 (struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
504 uint32_t mask);
505 /* INIT device interface function jump table entries */
506 int (*lpfc_sli_hbq_to_firmware)
507 (struct lpfc_hba *, uint32_t, struct hbq_dmabuf *);
508 int (*lpfc_sli_brdrestart)
509 (struct lpfc_hba *);
510 int (*lpfc_sli_brdready)
511 (struct lpfc_hba *, uint32_t);
512 void (*lpfc_handle_eratt)
513 (struct lpfc_hba *);
514 void (*lpfc_stop_port)
515 (struct lpfc_hba *);
84d1b006 516 int (*lpfc_hba_init_link)
6e7288d9 517 (struct lpfc_hba *, uint32_t);
84d1b006 518 int (*lpfc_hba_down_link)
6e7288d9 519 (struct lpfc_hba *, uint32_t);
3772a991 520
3772a991
JS		 521 /* SLI4 specific HBA data structure */
522 struct lpfc_sli4_hba sli4_hba;
523
dea3101e 524 struct lpfc_sli sli;
3772a991
JS		 525 uint8_t pci_dev_grp; /* lpfc PCI dev group: 0x0, 0x1, 0x2,... */
526 uint32_t sli_rev; /* SLI2, SLI3, or SLI4 */
ed957684 527 uint32_t sli3_options; /* Mask of enabled SLI3 options */
34b02dcd
JS		 528#define LPFC_SLI3_HBQ_ENABLED 0x01
529#define LPFC_SLI3_NPIV_ENABLED 0x02
530#define LPFC_SLI3_VPORT_TEARDOWN 0x04
531#define LPFC_SLI3_CRP_ENABLED 0x08
81301a9b 532#define LPFC_SLI3_BG_ENABLED 0x20
da0436e9 533#define LPFC_SLI3_DSS_ENABLED 0x40
ed957684
JS		 534 uint32_t iocb_cmd_size;
535 uint32_t iocb_rsp_size;
2e0fef85
JS		 536
537 enum hba_state link_state;
538 uint32_t link_flag; /* link state flags */
311464ec 539#define LS_LOOPBACK_MODE 0x1 /* NPort is in Loopback mode */
2e0fef85
JS		 540 /* This flag is set while issuing */
541 /* INIT_LINK mailbox command */
92d7f7b0 542#define LS_NPIV_FAB_SUPPORTED 0x2 /* Fabric supports NPIV */
1b32f6aa 543#define LS_IGNORE_ERATT 0x4 /* intr handler should ignore ERATT */
2e0fef85 544
9399627f
JS		 545 uint32_t hba_flag; /* hba generic flags */
546#define HBA_ERATT_HANDLED 0x1 /* This flag is set when eratt handled */
da0436e9
JS		 547#define DEFER_ERATT 0x2 /* Deferred error attention in progress */
548#define HBA_FCOE_SUPPORT 0x4 /* HBA function supports FCOE */
45ed1190 549#define HBA_SP_QUEUE_EVT 0x8 /* Slow-path qevt posted to worker thread*/
da0436e9
JS		 550#define HBA_POST_RECEIVE_BUFFER 0x10 /* Rcv buffers need to be posted */
551#define FCP_XRI_ABORT_EVENT 0x20
552#define ELS_XRI_ABORT_EVENT 0x40
553#define ASYNC_EVENT 0x80
a0c87cbd 554#define LINK_DISABLED 0x100 /* Link disabled by user */
a93ff37a
JS		 555#define FCF_TS_INPROG 0x200 /* FCF table scan in progress */
556#define FCF_RR_INPROG 0x400 /* FCF roundrobin flogi in progress */
557#define HBA_FIP_SUPPORT 0x800 /* FIP support in HBA */
558#define HBA_AER_ENABLED 0x1000 /* AER enabled with HBA */
559#define HBA_DEVLOSS_TMO 0x2000 /* HBA in devloss timeout */
45ed1190 560 uint32_t fcp_ring_in_use; /* When polling test if intr-hndlr active*/
34b02dcd
JS		 561 struct lpfc_dmabuf slim2p;
562
563 MAILBOX_t *mbox;
7a470277 564 uint32_t *mbox_ext;
9399627f 565 uint32_t ha_copy;
34b02dcd
JS		 566 struct _PCB *pcb;
567 struct _IOCB *IOCBs;
2e0fef85 568
34b02dcd 569 struct lpfc_dmabuf hbqslimp;
2e0fef85 570
dea3101e
JB		 571 uint16_t pci_cfg_value;
572
dea3101e
JB		 573 uint8_t fc_linkspeed; /* Link speed after last READ_LA */
574
575 uint32_t fc_eventTag; /* event tag for link attention */
4d9ab994 576 uint32_t link_events;
dea3101e 577
dea3101e 578 /* These fields used to be binfo */
dea3101e 579 uint32_t fc_pref_DID; /* preferred D_ID */
92d7f7b0 580 uint8_t fc_pref_ALPA; /* preferred AL_PA */
12265f68 581 uint32_t fc_edtovResol; /* E_D_TOV timer resolution */
dea3101e
JB		 582 uint32_t fc_edtov; /* E_D_TOV timer value */
583 uint32_t fc_arbtov; /* ARB_TOV timer value */
584 uint32_t fc_ratov; /* R_A_TOV timer value */
585 uint32_t fc_rttov; /* R_T_TOV timer value */
586 uint32_t fc_altov; /* AL_TOV timer value */
587 uint32_t fc_crtov; /* C_R_TOV timer value */
588 uint32_t fc_citov; /* C_I_TOV timer value */
dea3101e 589
dea3101e
JB		 590 struct serv_parm fc_fabparam; /* fabric service parameters buffer */
591 uint8_t alpa_map[128]; /* AL_PA map from READ_LA */
592
dea3101e 593 uint32_t lmt;
dea3101e
JB		 594
595 uint32_t fc_topology; /* link topology, from LINK INIT */
596
597 struct lpfc_stats fc_stat;
598
dea3101e
JB		 599 struct lpfc_nodelist fc_fcpnodev; /* nodelist entry for no device */
600 uint32_t nport_event_cnt; /* timestamp for nlplist entry */
601
2e0fef85
JS		 602 uint8_t wwnn[8];
603 uint8_t wwpn[8];
dea3101e
JB		 604 uint32_t RandomData[7];
605
3de2a653 606 /* HBA Config Parameters */
dea3101e 607 uint32_t cfg_ack0;
78b2d852 608 uint32_t cfg_enable_npiv;
dea3101e 609 uint32_t cfg_topology;
dea3101e
JB		 610 uint32_t cfg_link_speed;
611 uint32_t cfg_cr_delay;
612 uint32_t cfg_cr_count;
cf5bf97e 613 uint32_t cfg_multi_ring_support;
a4bc3379
JS		 614 uint32_t cfg_multi_ring_rctl;
615 uint32_t cfg_multi_ring_type;
875fbdfe
JSEC		 616 uint32_t cfg_poll;
617 uint32_t cfg_poll_tmo;
4ff43246 618 uint32_t cfg_use_msi;
da0436e9
JS		 619 uint32_t cfg_fcp_imax;
620 uint32_t cfg_fcp_wq_count;
621 uint32_t cfg_fcp_eq_count;
dea3101e 622 uint32_t cfg_sg_seg_cnt;
81301a9b 623 uint32_t cfg_prot_sg_seg_cnt;
dea3101e 624 uint32_t cfg_sg_dma_buf_size;
a12e07bc 625 uint64_t cfg_soft_wwnn;
c3f28afa 626 uint64_t cfg_soft_wwpn;
3de2a653 627 uint32_t cfg_hba_queue_depth;
13815c83
JS		 628 uint32_t cfg_enable_hba_reset;
629 uint32_t cfg_enable_hba_heartbeat;
81301a9b 630 uint32_t cfg_enable_bg;
7a470277 631 uint32_t cfg_hostmem_hgp;
da0436e9 632 uint32_t cfg_log_verbose;
0d878419 633 uint32_t cfg_aer_support;
2a9bf3d0 634 uint32_t cfg_iocb_cnt;
84d1b006 635 uint32_t cfg_suppress_link_up;
e40a02c1
JS		 636#define LPFC_INITIALIZE_LINK 0 /* do normal init_link mbox */
637#define LPFC_DELAY_INIT_LINK 1 /* layered driver hold off */
638#define LPFC_DELAY_INIT_LINK_INDEFINITELY 2 /* wait, manual intervention */
c01f3208 639
dea3101e
JB		 640 lpfc_vpd_t vpd; /* vital product data */
641
dea3101e
JB		 642 struct pci_dev *pcidev;
643 struct list_head work_list;
644 uint32_t work_ha; /* Host Attention Bits for WT */
645 uint32_t work_ha_mask; /* HA Bits owned by WT */
646 uint32_t work_hs; /* HS stored in case of ERRAT */
647 uint32_t work_status[2]; /* Extra status from SLIM */
dea3101e 648
5e9d9b82 649 wait_queue_head_t work_waitq;
dea3101e 650 struct task_struct *worker_thread;
d7c255b2 651 unsigned long data_flags;
dea3101e 652
3163f725 653 uint32_t hbq_in_use; /* HBQs in use flag */
3772a991 654 struct list_head rb_pend_list; /* Received buffers to be processed */
ed957684 655 uint32_t hbq_count; /* Count of configured HBQs */
92d7f7b0 656 struct hbq_s hbqs[LPFC_MAX_HBQS]; /* local copy of hbq indicies */
ed957684 657
8fa38513
JS		 658 uint32_t fcp_qidx; /* next work queue to post work to */
659
dea3101e 660 unsigned long pci_bar0_map; /* Physical address for PCI BAR0 */
3772a991 661 unsigned long pci_bar1_map; /* Physical address for PCI BAR1 */
dea3101e
JB		 662 unsigned long pci_bar2_map; /* Physical address for PCI BAR2 */
663 void __iomem *slim_memmap_p; /* Kernel memory mapped address for
664 PCI BAR0 */
665 void __iomem *ctrl_regs_memmap_p;/* Kernel memory mapped address for
666 PCI BAR2 */
667
668 void __iomem *MBslimaddr; /* virtual address for mbox cmds */
669 void __iomem *HAregaddr; /* virtual address for host attn reg */
670 void __iomem *CAregaddr; /* virtual address for chip attn reg */
671 void __iomem *HSregaddr; /* virtual address for host status
672 reg */
673 void __iomem *HCregaddr; /* virtual address for host ctl reg */
674
ed957684 675 struct lpfc_hgp __iomem *host_gp; /* Host side get/put pointers */
34b02dcd 676 struct lpfc_pgp *port_gp;
ed957684 677 uint32_t __iomem *hbq_put; /* Address in SLIM to HBQ put ptrs */
92d7f7b0 678 uint32_t *hbq_get; /* Host mem address of HBQ get ptrs */
ed957684 679
dea3101e
JB		 680 int brd_no; /* FC board number */
681
682 char SerialNumber[32]; /* adapter Serial Number */
683 char OptionROMVersion[32]; /* adapter BIOS / Fcode version */
684 char ModelDesc[256]; /* Model Description */
685 char ModelName[80]; /* Model Name */
686 char ProgramType[256]; /* Program Type */
687 char Port[20]; /* Port No */
688 uint8_t vpd_flag; /* VPD data flag */
689
690#define VPD_MODEL_DESC 0x1 /* valid vpd model description */
691#define VPD_MODEL_NAME 0x2 /* valid vpd model name */
692#define VPD_PROGRAM_TYPE 0x4 /* valid vpd program type */
693#define VPD_PORT 0x8 /* valid vpd port data */
694#define VPD_MASK 0xf /* mask for any vpd data */
695
a12e07bc 696 uint8_t soft_wwn_enable;
c3f28afa 697
875fbdfe 698 struct timer_list fcp_poll_timer;
9399627f 699 struct timer_list eratt_poll;
875fbdfe 700
dea3101e
JB		 701 /*
702 * stat counters
703 */
704 uint64_t fc4InputRequests;
705 uint64_t fc4OutputRequests;
706 uint64_t fc4ControlRequests;
81301a9b
JS		 707 uint64_t bg_guard_err_cnt;
708 uint64_t bg_apptag_err_cnt;
709 uint64_t bg_reftag_err_cnt;
dea3101e
JB		 710
711 struct lpfc_sysfs_mbox sysfs_mbox;
712
713 /* fastpath list. */
875fbdfe 714 spinlock_t scsi_buf_list_lock;
dea3101e
JB		 715 struct list_head lpfc_scsi_buf_list;
716 uint32_t total_scsi_bufs;
717 struct list_head lpfc_iocb_list;
718 uint32_t total_iocbq_bufs;
2e0fef85 719 spinlock_t hbalock;
dea3101e
JB		 720
721 /* pci_mem_pools */
722 struct pci_pool *lpfc_scsi_dma_buf_pool;
723 struct pci_pool *lpfc_mbuf_pool;
da0436e9
JS		 724 struct pci_pool *lpfc_hrb_pool; /* header receive buffer pool */
725 struct pci_pool *lpfc_drb_pool; /* data receive buffer pool */
8568a4d2 726 struct pci_pool *lpfc_hbq_pool; /* SLI3 hbq buffer pool */
dea3101e
JB		 727 struct lpfc_dma_pool lpfc_mbuf_safety_pool;
728
729 mempool_t *mbox_mem_pool;
730 mempool_t *nlp_mem_pool;
f888ba3c
JSEC		 731
732 struct fc_host_statistics link_stats;
db2378e0 733 enum intr_type_t intr_type;
5b75da2f
JS		 734 uint32_t intr_mode;
735#define LPFC_INTR_ERROR 0xFFFFFFFF
9399627f 736 struct msix_entry msix_entries[LPFC_MSIX_VECTORS];
858c9f6c 737
2e0fef85 738 struct list_head port_list;
549e55cd
JS		 739 struct lpfc_vport *pport; /* physical lpfc_vport pointer */
740 uint16_t max_vpi; /* Maximum virtual nports */
09372820 741#define LPFC_MAX_VPI 0xFFFF /* Max number of VPI supported */
da0436e9
JS		 742 uint16_t max_vports; /*
743 * For IOV HBAs max_vpi can change
744 * after a reset. max_vports is max
745 * number of vports present. This can
746 * be greater than max_vpi.
747 */
748 uint16_t vpi_base;
749 uint16_t vfi_base;
549e55cd 750 unsigned long *vpi_bmask; /* vpi allocation table */
92d7f7b0
JS		 751
752 /* Data structure used by fabric iocb scheduler */
753 struct list_head fabric_iocb_list;
754 atomic_t fabric_iocb_count;
755 struct timer_list fabric_block_timer;
756 unsigned long bit_flags;
757#define FABRIC_COMANDS_BLOCKED 0
758 atomic_t num_rsrc_err;
759 atomic_t num_cmd_success;
760 unsigned long last_rsrc_error_time;
761 unsigned long last_ramp_down_time;
762 unsigned long last_ramp_up_time;
923e4b6a 763#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
858c9f6c
JS		 764 struct dentry *hba_debugfs_root;
765 atomic_t debugfs_vport_count;
78b2d852 766 struct dentry *debug_hbqinfo;
c95d6c6c
JS		 767 struct dentry *debug_dumpHostSlim;
768 struct dentry *debug_dumpHBASlim;
81301a9b
JS		 769 struct dentry *debug_dumpData; /* BlockGuard BPL*/
770 struct dentry *debug_dumpDif; /* BlockGuard BPL*/
a58cbd52
JS		 771 struct dentry *debug_slow_ring_trc;
772 struct lpfc_debugfs_trc *slow_ring_trc;
773 atomic_t slow_ring_trc_cnt;
858c9f6c
JS		 774#endif
775
0ff10d46
JS		 776 /* Used for deferred freeing of ELS data buffers */
777 struct list_head elsbuf;
778 int elsbuf_cnt;
779 int elsbuf_prev_cnt;
780
57127f15 781 uint8_t temp_sensor_support;
858c9f6c
JS		 782 /* Fields used for heart beat. */
783 unsigned long last_completion_time;
bc73905a 784 unsigned long skipped_hb;
858c9f6c
JS		 785 struct timer_list hb_tmofunc;
786 uint8_t hb_outstanding;
84774a4d 787 enum hba_temp_state over_temp_state;
e47c9093
JS		 788 /* ndlp reference management */
789 spinlock_t ndlp_lock;
76bb24ef
JS		 790 /*
791 * Following bit will be set for all buffer tags which are not
792 * associated with any HBQ.
793 */
794#define QUE_BUFTAG_BIT (1<<31)
795 uint32_t buffer_tag_count;
84774a4d
JS		 796 int wait_4_mlo_maint_flg;
797 wait_queue_head_t wait_4_mlo_m_q;
ea2151b4
JS		 798 /* data structure used for latency data collection */
799#define LPFC_NO_BUCKET 0
800#define LPFC_LINEAR_BUCKET 1
801#define LPFC_POWER2_BUCKET 2
802 uint8_t bucket_type;
803 uint32_t bucket_base;
804 uint32_t bucket_step;
805
806/* Maximum number of events that can be outstanding at any time*/
807#define LPFC_MAX_EVT_COUNT 512
808 atomic_t fast_event_count;
32b9793f
JS		 809 uint32_t fcoe_eventtag;
810 uint32_t fcoe_eventtag_at_fcf_scan;
da0436e9
JS		 811 struct lpfc_fcf fcf;
812 uint8_t fc_map[3];
813 uint8_t valid_vlan;
814 uint16_t vlan_id;
815 struct list_head fcf_conn_rec_list;
f1c3b0fc 816
4fede78f 817 spinlock_t ct_ev_lock; /* synchronize access to ct_ev_waiters */
f1c3b0fc
JS		 818 struct list_head ct_ev_waiters;
819 struct unsol_rcv_ct_ctx ct_ctx[64];
820 uint32_t ctx_idx;
e2aed29f
JS		 821
822 uint8_t menlo_flag; /* menlo generic flags */
823#define HBA_MENLO_SUPPORT 0x1 /* HBA supports menlo commands */
2a9bf3d0
JS		 824 uint32_t iocb_cnt;
825 uint32_t iocb_max;
d7c47992 826 atomic_t sdev_cnt;
bc73905a
JS		 827 uint8_t fips_spec_rev;
828 uint8_t fips_level;
dea3101e
JB		 829};
830
2e0fef85
JS		 831static inline struct Scsi_Host *
832lpfc_shost_from_vport(struct lpfc_vport *vport)
833{
834 return container_of((void *) vport, struct Scsi_Host, hostdata[0]);
835}
836
5b8bd0c9 837static inline void
2e0fef85
JS		 838lpfc_set_loopback_flag(struct lpfc_hba *phba)
839{
5b8bd0c9 840 if (phba->cfg_topology == FLAGS_LOCAL_LB)
2e0fef85 841 phba->link_flag |= LS_LOOPBACK_MODE;
5b8bd0c9 842 else
2e0fef85
JS		 843 phba->link_flag &= ~LS_LOOPBACK_MODE;
844}
845
846static inline int
847lpfc_is_link_up(struct lpfc_hba *phba)
848{
849 return phba->link_state == LPFC_LINK_UP ||
92d7f7b0
JS		 850 phba->link_state == LPFC_CLEAR_LA ||
851 phba->link_state == LPFC_HBA_READY;
5b8bd0c9 852}
dea3101e 853
5e9d9b82
JS		 854static inline void
855lpfc_worker_wake_up(struct lpfc_hba *phba)
856{
857 /* Set the lpfc data pending flag */
858 set_bit(LPFC_DATA_READY, &phba->data_flags);
859
860 /* Wake up worker thread */
861 wake_up(&phba->work_waitq);
862 return;
863}
864
9399627f
JS		 865static inline void
866lpfc_sli_read_hs(struct lpfc_hba *phba)
867{
868 /*
869 * There was a link/board error. Read the status register to retrieve
870 * the error event and process it.
871 */
872 phba->sli.slistat.err_attn_event++;
873
874 /* Save status info */
875 phba->work_hs = readl(phba->HSregaddr);
876 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
877 phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
878
879 /* Clear chip Host Attention error bit */
880 writel(HA_ERATT, phba->HAregaddr);
881 readl(phba->HAregaddr); /* flush */
882 phba->pport->stopped = 1;
883
884 return;
885}
Clone of davem's net-next-2.6 tree