]>
Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
af36d7f0 JG |
2 | * libata-core.c - helper library for ATA |
3 | * | |
4 | * Maintained by: Jeff Garzik <jgarzik@pobox.com> | |
5 | * Please ALWAYS copy linux-ide@vger.kernel.org | |
6 | * on emails. | |
7 | * | |
8 | * Copyright 2003-2004 Red Hat, Inc. All rights reserved. | |
9 | * Copyright 2003-2004 Jeff Garzik | |
10 | * | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License as published by | |
14 | * the Free Software Foundation; either version 2, or (at your option) | |
15 | * any later version. | |
16 | * | |
17 | * This program is distributed in the hope that it will be useful, | |
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | * GNU General Public License for more details. | |
21 | * | |
22 | * You should have received a copy of the GNU General Public License | |
23 | * along with this program; see the file COPYING. If not, write to | |
24 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. | |
25 | * | |
26 | * | |
27 | * libata documentation is available via 'make {ps|pdf}docs', | |
28 | * as Documentation/DocBook/libata.* | |
29 | * | |
30 | * Hardware documentation available from http://www.t13.org/ and | |
31 | * http://www.sata-io.org/ | |
32 | * | |
1da177e4 LT |
33 | */ |
34 | ||
35 | #include <linux/config.h> | |
36 | #include <linux/kernel.h> | |
37 | #include <linux/module.h> | |
38 | #include <linux/pci.h> | |
39 | #include <linux/init.h> | |
40 | #include <linux/list.h> | |
41 | #include <linux/mm.h> | |
42 | #include <linux/highmem.h> | |
43 | #include <linux/spinlock.h> | |
44 | #include <linux/blkdev.h> | |
45 | #include <linux/delay.h> | |
46 | #include <linux/timer.h> | |
47 | #include <linux/interrupt.h> | |
48 | #include <linux/completion.h> | |
49 | #include <linux/suspend.h> | |
50 | #include <linux/workqueue.h> | |
67846b30 | 51 | #include <linux/jiffies.h> |
378f058c | 52 | #include <linux/scatterlist.h> |
1da177e4 | 53 | #include <scsi/scsi.h> |
1da177e4 | 54 | #include "scsi_priv.h" |
193515d5 | 55 | #include <scsi/scsi_cmnd.h> |
1da177e4 LT |
56 | #include <scsi/scsi_host.h> |
57 | #include <linux/libata.h> | |
58 | #include <asm/io.h> | |
59 | #include <asm/semaphore.h> | |
60 | #include <asm/byteorder.h> | |
61 | ||
62 | #include "libata.h" | |
63 | ||
3373efd8 TH |
64 | static unsigned int ata_dev_init_params(struct ata_device *dev, |
65 | u16 heads, u16 sectors); | |
66 | static unsigned int ata_dev_set_xfermode(struct ata_device *dev); | |
67 | static void ata_dev_xfermask(struct ata_device *dev); | |
1da177e4 LT |
68 | |
69 | static unsigned int ata_unique_id = 1; | |
70 | static struct workqueue_struct *ata_wq; | |
71 | ||
418dc1f5 | 72 | int atapi_enabled = 1; |
1623c81e JG |
73 | module_param(atapi_enabled, int, 0444); |
74 | MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)"); | |
75 | ||
95de719a AL |
76 | int atapi_dmadir = 0; |
77 | module_param(atapi_dmadir, int, 0444); | |
78 | MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)"); | |
79 | ||
c3c013a2 JG |
80 | int libata_fua = 0; |
81 | module_param_named(fua, libata_fua, int, 0444); | |
82 | MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)"); | |
83 | ||
1da177e4 LT |
84 | MODULE_AUTHOR("Jeff Garzik"); |
85 | MODULE_DESCRIPTION("Library module for ATA devices"); | |
86 | MODULE_LICENSE("GPL"); | |
87 | MODULE_VERSION(DRV_VERSION); | |
88 | ||
0baab86b | 89 | |
1da177e4 LT |
90 | /** |
91 | * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure | |
92 | * @tf: Taskfile to convert | |
93 | * @fis: Buffer into which data will output | |
94 | * @pmp: Port multiplier port | |
95 | * | |
96 | * Converts a standard ATA taskfile to a Serial ATA | |
97 | * FIS structure (Register - Host to Device). | |
98 | * | |
99 | * LOCKING: | |
100 | * Inherited from caller. | |
101 | */ | |
102 | ||
057ace5e | 103 | void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp) |
1da177e4 LT |
104 | { |
105 | fis[0] = 0x27; /* Register - Host to Device FIS */ | |
106 | fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number, | |
107 | bit 7 indicates Command FIS */ | |
108 | fis[2] = tf->command; | |
109 | fis[3] = tf->feature; | |
110 | ||
111 | fis[4] = tf->lbal; | |
112 | fis[5] = tf->lbam; | |
113 | fis[6] = tf->lbah; | |
114 | fis[7] = tf->device; | |
115 | ||
116 | fis[8] = tf->hob_lbal; | |
117 | fis[9] = tf->hob_lbam; | |
118 | fis[10] = tf->hob_lbah; | |
119 | fis[11] = tf->hob_feature; | |
120 | ||
121 | fis[12] = tf->nsect; | |
122 | fis[13] = tf->hob_nsect; | |
123 | fis[14] = 0; | |
124 | fis[15] = tf->ctl; | |
125 | ||
126 | fis[16] = 0; | |
127 | fis[17] = 0; | |
128 | fis[18] = 0; | |
129 | fis[19] = 0; | |
130 | } | |
131 | ||
132 | /** | |
133 | * ata_tf_from_fis - Convert SATA FIS to ATA taskfile | |
134 | * @fis: Buffer from which data will be input | |
135 | * @tf: Taskfile to output | |
136 | * | |
e12a1be6 | 137 | * Converts a serial ATA FIS structure to a standard ATA taskfile. |
1da177e4 LT |
138 | * |
139 | * LOCKING: | |
140 | * Inherited from caller. | |
141 | */ | |
142 | ||
057ace5e | 143 | void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf) |
1da177e4 LT |
144 | { |
145 | tf->command = fis[2]; /* status */ | |
146 | tf->feature = fis[3]; /* error */ | |
147 | ||
148 | tf->lbal = fis[4]; | |
149 | tf->lbam = fis[5]; | |
150 | tf->lbah = fis[6]; | |
151 | tf->device = fis[7]; | |
152 | ||
153 | tf->hob_lbal = fis[8]; | |
154 | tf->hob_lbam = fis[9]; | |
155 | tf->hob_lbah = fis[10]; | |
156 | ||
157 | tf->nsect = fis[12]; | |
158 | tf->hob_nsect = fis[13]; | |
159 | } | |
160 | ||
8cbd6df1 AL |
161 | static const u8 ata_rw_cmds[] = { |
162 | /* pio multi */ | |
163 | ATA_CMD_READ_MULTI, | |
164 | ATA_CMD_WRITE_MULTI, | |
165 | ATA_CMD_READ_MULTI_EXT, | |
166 | ATA_CMD_WRITE_MULTI_EXT, | |
9a3dccc4 TH |
167 | 0, |
168 | 0, | |
169 | 0, | |
170 | ATA_CMD_WRITE_MULTI_FUA_EXT, | |
8cbd6df1 AL |
171 | /* pio */ |
172 | ATA_CMD_PIO_READ, | |
173 | ATA_CMD_PIO_WRITE, | |
174 | ATA_CMD_PIO_READ_EXT, | |
175 | ATA_CMD_PIO_WRITE_EXT, | |
9a3dccc4 TH |
176 | 0, |
177 | 0, | |
178 | 0, | |
179 | 0, | |
8cbd6df1 AL |
180 | /* dma */ |
181 | ATA_CMD_READ, | |
182 | ATA_CMD_WRITE, | |
183 | ATA_CMD_READ_EXT, | |
9a3dccc4 TH |
184 | ATA_CMD_WRITE_EXT, |
185 | 0, | |
186 | 0, | |
187 | 0, | |
188 | ATA_CMD_WRITE_FUA_EXT | |
8cbd6df1 | 189 | }; |
1da177e4 LT |
190 | |
191 | /** | |
8cbd6df1 AL |
192 | * ata_rwcmd_protocol - set taskfile r/w commands and protocol |
193 | * @qc: command to examine and configure | |
1da177e4 | 194 | * |
2e9edbf8 | 195 | * Examine the device configuration and tf->flags to calculate |
8cbd6df1 | 196 | * the proper read/write commands and protocol to use. |
1da177e4 LT |
197 | * |
198 | * LOCKING: | |
199 | * caller. | |
200 | */ | |
9a3dccc4 | 201 | int ata_rwcmd_protocol(struct ata_queued_cmd *qc) |
1da177e4 | 202 | { |
8cbd6df1 AL |
203 | struct ata_taskfile *tf = &qc->tf; |
204 | struct ata_device *dev = qc->dev; | |
9a3dccc4 | 205 | u8 cmd; |
1da177e4 | 206 | |
9a3dccc4 | 207 | int index, fua, lba48, write; |
2e9edbf8 | 208 | |
9a3dccc4 | 209 | fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0; |
8cbd6df1 AL |
210 | lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0; |
211 | write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0; | |
1da177e4 | 212 | |
8cbd6df1 AL |
213 | if (dev->flags & ATA_DFLAG_PIO) { |
214 | tf->protocol = ATA_PROT_PIO; | |
9a3dccc4 | 215 | index = dev->multi_count ? 0 : 8; |
8d238e01 AC |
216 | } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) { |
217 | /* Unable to use DMA due to host limitation */ | |
218 | tf->protocol = ATA_PROT_PIO; | |
0565c26d | 219 | index = dev->multi_count ? 0 : 8; |
8cbd6df1 AL |
220 | } else { |
221 | tf->protocol = ATA_PROT_DMA; | |
9a3dccc4 | 222 | index = 16; |
8cbd6df1 | 223 | } |
1da177e4 | 224 | |
9a3dccc4 TH |
225 | cmd = ata_rw_cmds[index + fua + lba48 + write]; |
226 | if (cmd) { | |
227 | tf->command = cmd; | |
228 | return 0; | |
229 | } | |
230 | return -1; | |
1da177e4 LT |
231 | } |
232 | ||
cb95d562 TH |
233 | /** |
234 | * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask | |
235 | * @pio_mask: pio_mask | |
236 | * @mwdma_mask: mwdma_mask | |
237 | * @udma_mask: udma_mask | |
238 | * | |
239 | * Pack @pio_mask, @mwdma_mask and @udma_mask into a single | |
240 | * unsigned int xfer_mask. | |
241 | * | |
242 | * LOCKING: | |
243 | * None. | |
244 | * | |
245 | * RETURNS: | |
246 | * Packed xfer_mask. | |
247 | */ | |
248 | static unsigned int ata_pack_xfermask(unsigned int pio_mask, | |
249 | unsigned int mwdma_mask, | |
250 | unsigned int udma_mask) | |
251 | { | |
252 | return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) | | |
253 | ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) | | |
254 | ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA); | |
255 | } | |
256 | ||
c0489e4e TH |
257 | /** |
258 | * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks | |
259 | * @xfer_mask: xfer_mask to unpack | |
260 | * @pio_mask: resulting pio_mask | |
261 | * @mwdma_mask: resulting mwdma_mask | |
262 | * @udma_mask: resulting udma_mask | |
263 | * | |
264 | * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask. | |
265 | * Any NULL distination masks will be ignored. | |
266 | */ | |
267 | static void ata_unpack_xfermask(unsigned int xfer_mask, | |
268 | unsigned int *pio_mask, | |
269 | unsigned int *mwdma_mask, | |
270 | unsigned int *udma_mask) | |
271 | { | |
272 | if (pio_mask) | |
273 | *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO; | |
274 | if (mwdma_mask) | |
275 | *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA; | |
276 | if (udma_mask) | |
277 | *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA; | |
278 | } | |
279 | ||
cb95d562 | 280 | static const struct ata_xfer_ent { |
be9a50c8 | 281 | int shift, bits; |
cb95d562 TH |
282 | u8 base; |
283 | } ata_xfer_tbl[] = { | |
284 | { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 }, | |
285 | { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 }, | |
286 | { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 }, | |
287 | { -1, }, | |
288 | }; | |
289 | ||
290 | /** | |
291 | * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask | |
292 | * @xfer_mask: xfer_mask of interest | |
293 | * | |
294 | * Return matching XFER_* value for @xfer_mask. Only the highest | |
295 | * bit of @xfer_mask is considered. | |
296 | * | |
297 | * LOCKING: | |
298 | * None. | |
299 | * | |
300 | * RETURNS: | |
301 | * Matching XFER_* value, 0 if no match found. | |
302 | */ | |
303 | static u8 ata_xfer_mask2mode(unsigned int xfer_mask) | |
304 | { | |
305 | int highbit = fls(xfer_mask) - 1; | |
306 | const struct ata_xfer_ent *ent; | |
307 | ||
308 | for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) | |
309 | if (highbit >= ent->shift && highbit < ent->shift + ent->bits) | |
310 | return ent->base + highbit - ent->shift; | |
311 | return 0; | |
312 | } | |
313 | ||
314 | /** | |
315 | * ata_xfer_mode2mask - Find matching xfer_mask for XFER_* | |
316 | * @xfer_mode: XFER_* of interest | |
317 | * | |
318 | * Return matching xfer_mask for @xfer_mode. | |
319 | * | |
320 | * LOCKING: | |
321 | * None. | |
322 | * | |
323 | * RETURNS: | |
324 | * Matching xfer_mask, 0 if no match found. | |
325 | */ | |
326 | static unsigned int ata_xfer_mode2mask(u8 xfer_mode) | |
327 | { | |
328 | const struct ata_xfer_ent *ent; | |
329 | ||
330 | for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) | |
331 | if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits) | |
332 | return 1 << (ent->shift + xfer_mode - ent->base); | |
333 | return 0; | |
334 | } | |
335 | ||
336 | /** | |
337 | * ata_xfer_mode2shift - Find matching xfer_shift for XFER_* | |
338 | * @xfer_mode: XFER_* of interest | |
339 | * | |
340 | * Return matching xfer_shift for @xfer_mode. | |
341 | * | |
342 | * LOCKING: | |
343 | * None. | |
344 | * | |
345 | * RETURNS: | |
346 | * Matching xfer_shift, -1 if no match found. | |
347 | */ | |
348 | static int ata_xfer_mode2shift(unsigned int xfer_mode) | |
349 | { | |
350 | const struct ata_xfer_ent *ent; | |
351 | ||
352 | for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) | |
353 | if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits) | |
354 | return ent->shift; | |
355 | return -1; | |
356 | } | |
357 | ||
1da177e4 | 358 | /** |
1da7b0d0 TH |
359 | * ata_mode_string - convert xfer_mask to string |
360 | * @xfer_mask: mask of bits supported; only highest bit counts. | |
1da177e4 LT |
361 | * |
362 | * Determine string which represents the highest speed | |
1da7b0d0 | 363 | * (highest bit in @modemask). |
1da177e4 LT |
364 | * |
365 | * LOCKING: | |
366 | * None. | |
367 | * | |
368 | * RETURNS: | |
369 | * Constant C string representing highest speed listed in | |
1da7b0d0 | 370 | * @mode_mask, or the constant C string "<n/a>". |
1da177e4 | 371 | */ |
1da7b0d0 | 372 | static const char *ata_mode_string(unsigned int xfer_mask) |
1da177e4 | 373 | { |
75f554bc TH |
374 | static const char * const xfer_mode_str[] = { |
375 | "PIO0", | |
376 | "PIO1", | |
377 | "PIO2", | |
378 | "PIO3", | |
379 | "PIO4", | |
380 | "MWDMA0", | |
381 | "MWDMA1", | |
382 | "MWDMA2", | |
383 | "UDMA/16", | |
384 | "UDMA/25", | |
385 | "UDMA/33", | |
386 | "UDMA/44", | |
387 | "UDMA/66", | |
388 | "UDMA/100", | |
389 | "UDMA/133", | |
390 | "UDMA7", | |
391 | }; | |
1da7b0d0 | 392 | int highbit; |
1da177e4 | 393 | |
1da7b0d0 TH |
394 | highbit = fls(xfer_mask) - 1; |
395 | if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str)) | |
396 | return xfer_mode_str[highbit]; | |
1da177e4 | 397 | return "<n/a>"; |
1da177e4 LT |
398 | } |
399 | ||
4c360c81 TH |
400 | static const char *sata_spd_string(unsigned int spd) |
401 | { | |
402 | static const char * const spd_str[] = { | |
403 | "1.5 Gbps", | |
404 | "3.0 Gbps", | |
405 | }; | |
406 | ||
407 | if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str)) | |
408 | return "<unknown>"; | |
409 | return spd_str[spd - 1]; | |
410 | } | |
411 | ||
3373efd8 | 412 | void ata_dev_disable(struct ata_device *dev) |
0b8efb0a | 413 | { |
e1211e3f | 414 | if (ata_dev_enabled(dev)) { |
f15a1daf | 415 | ata_dev_printk(dev, KERN_WARNING, "disabled\n"); |
0b8efb0a TH |
416 | dev->class++; |
417 | } | |
418 | } | |
419 | ||
1da177e4 LT |
420 | /** |
421 | * ata_pio_devchk - PATA device presence detection | |
422 | * @ap: ATA channel to examine | |
423 | * @device: Device to examine (starting at zero) | |
424 | * | |
425 | * This technique was originally described in | |
426 | * Hale Landis's ATADRVR (www.ata-atapi.com), and | |
427 | * later found its way into the ATA/ATAPI spec. | |
428 | * | |
429 | * Write a pattern to the ATA shadow registers, | |
430 | * and if a device is present, it will respond by | |
431 | * correctly storing and echoing back the | |
432 | * ATA shadow register contents. | |
433 | * | |
434 | * LOCKING: | |
435 | * caller. | |
436 | */ | |
437 | ||
438 | static unsigned int ata_pio_devchk(struct ata_port *ap, | |
439 | unsigned int device) | |
440 | { | |
441 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
442 | u8 nsect, lbal; | |
443 | ||
444 | ap->ops->dev_select(ap, device); | |
445 | ||
446 | outb(0x55, ioaddr->nsect_addr); | |
447 | outb(0xaa, ioaddr->lbal_addr); | |
448 | ||
449 | outb(0xaa, ioaddr->nsect_addr); | |
450 | outb(0x55, ioaddr->lbal_addr); | |
451 | ||
452 | outb(0x55, ioaddr->nsect_addr); | |
453 | outb(0xaa, ioaddr->lbal_addr); | |
454 | ||
455 | nsect = inb(ioaddr->nsect_addr); | |
456 | lbal = inb(ioaddr->lbal_addr); | |
457 | ||
458 | if ((nsect == 0x55) && (lbal == 0xaa)) | |
459 | return 1; /* we found a device */ | |
460 | ||
461 | return 0; /* nothing found */ | |
462 | } | |
463 | ||
464 | /** | |
465 | * ata_mmio_devchk - PATA device presence detection | |
466 | * @ap: ATA channel to examine | |
467 | * @device: Device to examine (starting at zero) | |
468 | * | |
469 | * This technique was originally described in | |
470 | * Hale Landis's ATADRVR (www.ata-atapi.com), and | |
471 | * later found its way into the ATA/ATAPI spec. | |
472 | * | |
473 | * Write a pattern to the ATA shadow registers, | |
474 | * and if a device is present, it will respond by | |
475 | * correctly storing and echoing back the | |
476 | * ATA shadow register contents. | |
477 | * | |
478 | * LOCKING: | |
479 | * caller. | |
480 | */ | |
481 | ||
482 | static unsigned int ata_mmio_devchk(struct ata_port *ap, | |
483 | unsigned int device) | |
484 | { | |
485 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
486 | u8 nsect, lbal; | |
487 | ||
488 | ap->ops->dev_select(ap, device); | |
489 | ||
490 | writeb(0x55, (void __iomem *) ioaddr->nsect_addr); | |
491 | writeb(0xaa, (void __iomem *) ioaddr->lbal_addr); | |
492 | ||
493 | writeb(0xaa, (void __iomem *) ioaddr->nsect_addr); | |
494 | writeb(0x55, (void __iomem *) ioaddr->lbal_addr); | |
495 | ||
496 | writeb(0x55, (void __iomem *) ioaddr->nsect_addr); | |
497 | writeb(0xaa, (void __iomem *) ioaddr->lbal_addr); | |
498 | ||
499 | nsect = readb((void __iomem *) ioaddr->nsect_addr); | |
500 | lbal = readb((void __iomem *) ioaddr->lbal_addr); | |
501 | ||
502 | if ((nsect == 0x55) && (lbal == 0xaa)) | |
503 | return 1; /* we found a device */ | |
504 | ||
505 | return 0; /* nothing found */ | |
506 | } | |
507 | ||
508 | /** | |
509 | * ata_devchk - PATA device presence detection | |
510 | * @ap: ATA channel to examine | |
511 | * @device: Device to examine (starting at zero) | |
512 | * | |
513 | * Dispatch ATA device presence detection, depending | |
514 | * on whether we are using PIO or MMIO to talk to the | |
515 | * ATA shadow registers. | |
516 | * | |
517 | * LOCKING: | |
518 | * caller. | |
519 | */ | |
520 | ||
521 | static unsigned int ata_devchk(struct ata_port *ap, | |
522 | unsigned int device) | |
523 | { | |
524 | if (ap->flags & ATA_FLAG_MMIO) | |
525 | return ata_mmio_devchk(ap, device); | |
526 | return ata_pio_devchk(ap, device); | |
527 | } | |
528 | ||
529 | /** | |
530 | * ata_dev_classify - determine device type based on ATA-spec signature | |
531 | * @tf: ATA taskfile register set for device to be identified | |
532 | * | |
533 | * Determine from taskfile register contents whether a device is | |
534 | * ATA or ATAPI, as per "Signature and persistence" section | |
535 | * of ATA/PI spec (volume 1, sect 5.14). | |
536 | * | |
537 | * LOCKING: | |
538 | * None. | |
539 | * | |
540 | * RETURNS: | |
541 | * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN | |
542 | * the event of failure. | |
543 | */ | |
544 | ||
057ace5e | 545 | unsigned int ata_dev_classify(const struct ata_taskfile *tf) |
1da177e4 LT |
546 | { |
547 | /* Apple's open source Darwin code hints that some devices only | |
548 | * put a proper signature into the LBA mid/high registers, | |
549 | * So, we only check those. It's sufficient for uniqueness. | |
550 | */ | |
551 | ||
552 | if (((tf->lbam == 0) && (tf->lbah == 0)) || | |
553 | ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) { | |
554 | DPRINTK("found ATA device by sig\n"); | |
555 | return ATA_DEV_ATA; | |
556 | } | |
557 | ||
558 | if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) || | |
559 | ((tf->lbam == 0x69) && (tf->lbah == 0x96))) { | |
560 | DPRINTK("found ATAPI device by sig\n"); | |
561 | return ATA_DEV_ATAPI; | |
562 | } | |
563 | ||
564 | DPRINTK("unknown device\n"); | |
565 | return ATA_DEV_UNKNOWN; | |
566 | } | |
567 | ||
568 | /** | |
569 | * ata_dev_try_classify - Parse returned ATA device signature | |
570 | * @ap: ATA channel to examine | |
571 | * @device: Device to examine (starting at zero) | |
b4dc7623 | 572 | * @r_err: Value of error register on completion |
1da177e4 LT |
573 | * |
574 | * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs, | |
575 | * an ATA/ATAPI-defined set of values is placed in the ATA | |
576 | * shadow registers, indicating the results of device detection | |
577 | * and diagnostics. | |
578 | * | |
579 | * Select the ATA device, and read the values from the ATA shadow | |
580 | * registers. Then parse according to the Error register value, | |
581 | * and the spec-defined values examined by ata_dev_classify(). | |
582 | * | |
583 | * LOCKING: | |
584 | * caller. | |
b4dc7623 TH |
585 | * |
586 | * RETURNS: | |
587 | * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE. | |
1da177e4 LT |
588 | */ |
589 | ||
b4dc7623 TH |
590 | static unsigned int |
591 | ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err) | |
1da177e4 | 592 | { |
1da177e4 LT |
593 | struct ata_taskfile tf; |
594 | unsigned int class; | |
595 | u8 err; | |
596 | ||
597 | ap->ops->dev_select(ap, device); | |
598 | ||
599 | memset(&tf, 0, sizeof(tf)); | |
600 | ||
1da177e4 | 601 | ap->ops->tf_read(ap, &tf); |
0169e284 | 602 | err = tf.feature; |
b4dc7623 TH |
603 | if (r_err) |
604 | *r_err = err; | |
1da177e4 LT |
605 | |
606 | /* see if device passed diags */ | |
607 | if (err == 1) | |
608 | /* do nothing */ ; | |
609 | else if ((device == 0) && (err == 0x81)) | |
610 | /* do nothing */ ; | |
611 | else | |
b4dc7623 | 612 | return ATA_DEV_NONE; |
1da177e4 | 613 | |
b4dc7623 | 614 | /* determine if device is ATA or ATAPI */ |
1da177e4 | 615 | class = ata_dev_classify(&tf); |
b4dc7623 | 616 | |
1da177e4 | 617 | if (class == ATA_DEV_UNKNOWN) |
b4dc7623 | 618 | return ATA_DEV_NONE; |
1da177e4 | 619 | if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0)) |
b4dc7623 TH |
620 | return ATA_DEV_NONE; |
621 | return class; | |
1da177e4 LT |
622 | } |
623 | ||
624 | /** | |
6a62a04d | 625 | * ata_id_string - Convert IDENTIFY DEVICE page into string |
1da177e4 LT |
626 | * @id: IDENTIFY DEVICE results we will examine |
627 | * @s: string into which data is output | |
628 | * @ofs: offset into identify device page | |
629 | * @len: length of string to return. must be an even number. | |
630 | * | |
631 | * The strings in the IDENTIFY DEVICE page are broken up into | |
632 | * 16-bit chunks. Run through the string, and output each | |
633 | * 8-bit chunk linearly, regardless of platform. | |
634 | * | |
635 | * LOCKING: | |
636 | * caller. | |
637 | */ | |
638 | ||
6a62a04d TH |
639 | void ata_id_string(const u16 *id, unsigned char *s, |
640 | unsigned int ofs, unsigned int len) | |
1da177e4 LT |
641 | { |
642 | unsigned int c; | |
643 | ||
644 | while (len > 0) { | |
645 | c = id[ofs] >> 8; | |
646 | *s = c; | |
647 | s++; | |
648 | ||
649 | c = id[ofs] & 0xff; | |
650 | *s = c; | |
651 | s++; | |
652 | ||
653 | ofs++; | |
654 | len -= 2; | |
655 | } | |
656 | } | |
657 | ||
0e949ff3 | 658 | /** |
6a62a04d | 659 | * ata_id_c_string - Convert IDENTIFY DEVICE page into C string |
0e949ff3 TH |
660 | * @id: IDENTIFY DEVICE results we will examine |
661 | * @s: string into which data is output | |
662 | * @ofs: offset into identify device page | |
663 | * @len: length of string to return. must be an odd number. | |
664 | * | |
6a62a04d | 665 | * This function is identical to ata_id_string except that it |
0e949ff3 TH |
666 | * trims trailing spaces and terminates the resulting string with |
667 | * null. @len must be actual maximum length (even number) + 1. | |
668 | * | |
669 | * LOCKING: | |
670 | * caller. | |
671 | */ | |
6a62a04d TH |
672 | void ata_id_c_string(const u16 *id, unsigned char *s, |
673 | unsigned int ofs, unsigned int len) | |
0e949ff3 TH |
674 | { |
675 | unsigned char *p; | |
676 | ||
677 | WARN_ON(!(len & 1)); | |
678 | ||
6a62a04d | 679 | ata_id_string(id, s, ofs, len - 1); |
0e949ff3 TH |
680 | |
681 | p = s + strnlen(s, len - 1); | |
682 | while (p > s && p[-1] == ' ') | |
683 | p--; | |
684 | *p = '\0'; | |
685 | } | |
0baab86b | 686 | |
2940740b TH |
687 | static u64 ata_id_n_sectors(const u16 *id) |
688 | { | |
689 | if (ata_id_has_lba(id)) { | |
690 | if (ata_id_has_lba48(id)) | |
691 | return ata_id_u64(id, 100); | |
692 | else | |
693 | return ata_id_u32(id, 60); | |
694 | } else { | |
695 | if (ata_id_current_chs_valid(id)) | |
696 | return ata_id_u32(id, 57); | |
697 | else | |
698 | return id[1] * id[3] * id[6]; | |
699 | } | |
700 | } | |
701 | ||
0baab86b EF |
702 | /** |
703 | * ata_noop_dev_select - Select device 0/1 on ATA bus | |
704 | * @ap: ATA channel to manipulate | |
705 | * @device: ATA device (numbered from zero) to select | |
706 | * | |
707 | * This function performs no actual function. | |
708 | * | |
709 | * May be used as the dev_select() entry in ata_port_operations. | |
710 | * | |
711 | * LOCKING: | |
712 | * caller. | |
713 | */ | |
1da177e4 LT |
714 | void ata_noop_dev_select (struct ata_port *ap, unsigned int device) |
715 | { | |
716 | } | |
717 | ||
0baab86b | 718 | |
1da177e4 LT |
719 | /** |
720 | * ata_std_dev_select - Select device 0/1 on ATA bus | |
721 | * @ap: ATA channel to manipulate | |
722 | * @device: ATA device (numbered from zero) to select | |
723 | * | |
724 | * Use the method defined in the ATA specification to | |
725 | * make either device 0, or device 1, active on the | |
0baab86b EF |
726 | * ATA channel. Works with both PIO and MMIO. |
727 | * | |
728 | * May be used as the dev_select() entry in ata_port_operations. | |
1da177e4 LT |
729 | * |
730 | * LOCKING: | |
731 | * caller. | |
732 | */ | |
733 | ||
734 | void ata_std_dev_select (struct ata_port *ap, unsigned int device) | |
735 | { | |
736 | u8 tmp; | |
737 | ||
738 | if (device == 0) | |
739 | tmp = ATA_DEVICE_OBS; | |
740 | else | |
741 | tmp = ATA_DEVICE_OBS | ATA_DEV1; | |
742 | ||
743 | if (ap->flags & ATA_FLAG_MMIO) { | |
744 | writeb(tmp, (void __iomem *) ap->ioaddr.device_addr); | |
745 | } else { | |
746 | outb(tmp, ap->ioaddr.device_addr); | |
747 | } | |
748 | ata_pause(ap); /* needed; also flushes, for mmio */ | |
749 | } | |
750 | ||
751 | /** | |
752 | * ata_dev_select - Select device 0/1 on ATA bus | |
753 | * @ap: ATA channel to manipulate | |
754 | * @device: ATA device (numbered from zero) to select | |
755 | * @wait: non-zero to wait for Status register BSY bit to clear | |
756 | * @can_sleep: non-zero if context allows sleeping | |
757 | * | |
758 | * Use the method defined in the ATA specification to | |
759 | * make either device 0, or device 1, active on the | |
760 | * ATA channel. | |
761 | * | |
762 | * This is a high-level version of ata_std_dev_select(), | |
763 | * which additionally provides the services of inserting | |
764 | * the proper pauses and status polling, where needed. | |
765 | * | |
766 | * LOCKING: | |
767 | * caller. | |
768 | */ | |
769 | ||
770 | void ata_dev_select(struct ata_port *ap, unsigned int device, | |
771 | unsigned int wait, unsigned int can_sleep) | |
772 | { | |
773 | VPRINTK("ENTER, ata%u: device %u, wait %u\n", | |
774 | ap->id, device, wait); | |
775 | ||
776 | if (wait) | |
777 | ata_wait_idle(ap); | |
778 | ||
779 | ap->ops->dev_select(ap, device); | |
780 | ||
781 | if (wait) { | |
782 | if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI) | |
783 | msleep(150); | |
784 | ata_wait_idle(ap); | |
785 | } | |
786 | } | |
787 | ||
788 | /** | |
789 | * ata_dump_id - IDENTIFY DEVICE info debugging output | |
0bd3300a | 790 | * @id: IDENTIFY DEVICE page to dump |
1da177e4 | 791 | * |
0bd3300a TH |
792 | * Dump selected 16-bit words from the given IDENTIFY DEVICE |
793 | * page. | |
1da177e4 LT |
794 | * |
795 | * LOCKING: | |
796 | * caller. | |
797 | */ | |
798 | ||
0bd3300a | 799 | static inline void ata_dump_id(const u16 *id) |
1da177e4 LT |
800 | { |
801 | DPRINTK("49==0x%04x " | |
802 | "53==0x%04x " | |
803 | "63==0x%04x " | |
804 | "64==0x%04x " | |
805 | "75==0x%04x \n", | |
0bd3300a TH |
806 | id[49], |
807 | id[53], | |
808 | id[63], | |
809 | id[64], | |
810 | id[75]); | |
1da177e4 LT |
811 | DPRINTK("80==0x%04x " |
812 | "81==0x%04x " | |
813 | "82==0x%04x " | |
814 | "83==0x%04x " | |
815 | "84==0x%04x \n", | |
0bd3300a TH |
816 | id[80], |
817 | id[81], | |
818 | id[82], | |
819 | id[83], | |
820 | id[84]); | |
1da177e4 LT |
821 | DPRINTK("88==0x%04x " |
822 | "93==0x%04x\n", | |
0bd3300a TH |
823 | id[88], |
824 | id[93]); | |
1da177e4 LT |
825 | } |
826 | ||
cb95d562 TH |
827 | /** |
828 | * ata_id_xfermask - Compute xfermask from the given IDENTIFY data | |
829 | * @id: IDENTIFY data to compute xfer mask from | |
830 | * | |
831 | * Compute the xfermask for this device. This is not as trivial | |
832 | * as it seems if we must consider early devices correctly. | |
833 | * | |
834 | * FIXME: pre IDE drive timing (do we care ?). | |
835 | * | |
836 | * LOCKING: | |
837 | * None. | |
838 | * | |
839 | * RETURNS: | |
840 | * Computed xfermask | |
841 | */ | |
842 | static unsigned int ata_id_xfermask(const u16 *id) | |
843 | { | |
844 | unsigned int pio_mask, mwdma_mask, udma_mask; | |
845 | ||
846 | /* Usual case. Word 53 indicates word 64 is valid */ | |
847 | if (id[ATA_ID_FIELD_VALID] & (1 << 1)) { | |
848 | pio_mask = id[ATA_ID_PIO_MODES] & 0x03; | |
849 | pio_mask <<= 3; | |
850 | pio_mask |= 0x7; | |
851 | } else { | |
852 | /* If word 64 isn't valid then Word 51 high byte holds | |
853 | * the PIO timing number for the maximum. Turn it into | |
854 | * a mask. | |
855 | */ | |
856 | pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ; | |
857 | ||
858 | /* But wait.. there's more. Design your standards by | |
859 | * committee and you too can get a free iordy field to | |
860 | * process. However its the speeds not the modes that | |
861 | * are supported... Note drivers using the timing API | |
862 | * will get this right anyway | |
863 | */ | |
864 | } | |
865 | ||
866 | mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07; | |
fb21f0d0 TH |
867 | |
868 | udma_mask = 0; | |
869 | if (id[ATA_ID_FIELD_VALID] & (1 << 2)) | |
870 | udma_mask = id[ATA_ID_UDMA_MODES] & 0xff; | |
cb95d562 TH |
871 | |
872 | return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask); | |
873 | } | |
874 | ||
86e45b6b TH |
875 | /** |
876 | * ata_port_queue_task - Queue port_task | |
877 | * @ap: The ata_port to queue port_task for | |
878 | * | |
879 | * Schedule @fn(@data) for execution after @delay jiffies using | |
880 | * port_task. There is one port_task per port and it's the | |
881 | * user(low level driver)'s responsibility to make sure that only | |
882 | * one task is active at any given time. | |
883 | * | |
884 | * libata core layer takes care of synchronization between | |
885 | * port_task and EH. ata_port_queue_task() may be ignored for EH | |
886 | * synchronization. | |
887 | * | |
888 | * LOCKING: | |
889 | * Inherited from caller. | |
890 | */ | |
891 | void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data, | |
892 | unsigned long delay) | |
893 | { | |
894 | int rc; | |
895 | ||
2e755f68 | 896 | if (ap->flags & ATA_FLAG_FLUSH_PORT_TASK) |
86e45b6b TH |
897 | return; |
898 | ||
899 | PREPARE_WORK(&ap->port_task, fn, data); | |
900 | ||
901 | if (!delay) | |
902 | rc = queue_work(ata_wq, &ap->port_task); | |
903 | else | |
904 | rc = queue_delayed_work(ata_wq, &ap->port_task, delay); | |
905 | ||
906 | /* rc == 0 means that another user is using port task */ | |
907 | WARN_ON(rc == 0); | |
908 | } | |
909 | ||
910 | /** | |
911 | * ata_port_flush_task - Flush port_task | |
912 | * @ap: The ata_port to flush port_task for | |
913 | * | |
914 | * After this function completes, port_task is guranteed not to | |
915 | * be running or scheduled. | |
916 | * | |
917 | * LOCKING: | |
918 | * Kernel thread context (may sleep) | |
919 | */ | |
920 | void ata_port_flush_task(struct ata_port *ap) | |
921 | { | |
922 | unsigned long flags; | |
923 | ||
924 | DPRINTK("ENTER\n"); | |
925 | ||
926 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
2e755f68 | 927 | ap->flags |= ATA_FLAG_FLUSH_PORT_TASK; |
86e45b6b TH |
928 | spin_unlock_irqrestore(&ap->host_set->lock, flags); |
929 | ||
930 | DPRINTK("flush #1\n"); | |
931 | flush_workqueue(ata_wq); | |
932 | ||
933 | /* | |
934 | * At this point, if a task is running, it's guaranteed to see | |
935 | * the FLUSH flag; thus, it will never queue pio tasks again. | |
936 | * Cancel and flush. | |
937 | */ | |
938 | if (!cancel_delayed_work(&ap->port_task)) { | |
939 | DPRINTK("flush #2\n"); | |
940 | flush_workqueue(ata_wq); | |
941 | } | |
942 | ||
943 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
2e755f68 | 944 | ap->flags &= ~ATA_FLAG_FLUSH_PORT_TASK; |
86e45b6b TH |
945 | spin_unlock_irqrestore(&ap->host_set->lock, flags); |
946 | ||
947 | DPRINTK("EXIT\n"); | |
948 | } | |
949 | ||
77853bf2 | 950 | void ata_qc_complete_internal(struct ata_queued_cmd *qc) |
a2a7a662 | 951 | { |
77853bf2 | 952 | struct completion *waiting = qc->private_data; |
a2a7a662 | 953 | |
a2a7a662 | 954 | complete(waiting); |
a2a7a662 TH |
955 | } |
956 | ||
957 | /** | |
958 | * ata_exec_internal - execute libata internal command | |
a2a7a662 TH |
959 | * @dev: Device to which the command is sent |
960 | * @tf: Taskfile registers for the command and the result | |
d69cf37d | 961 | * @cdb: CDB for packet command |
a2a7a662 TH |
962 | * @dma_dir: Data tranfer direction of the command |
963 | * @buf: Data buffer of the command | |
964 | * @buflen: Length of data buffer | |
965 | * | |
966 | * Executes libata internal command with timeout. @tf contains | |
967 | * command on entry and result on return. Timeout and error | |
968 | * conditions are reported via return value. No recovery action | |
969 | * is taken after a command times out. It's caller's duty to | |
970 | * clean up after timeout. | |
971 | * | |
972 | * LOCKING: | |
973 | * None. Should be called with kernel context, might sleep. | |
974 | */ | |
975 | ||
3373efd8 | 976 | unsigned ata_exec_internal(struct ata_device *dev, |
1ad8e7f9 TH |
977 | struct ata_taskfile *tf, const u8 *cdb, |
978 | int dma_dir, void *buf, unsigned int buflen) | |
a2a7a662 | 979 | { |
3373efd8 | 980 | struct ata_port *ap = dev->ap; |
a2a7a662 TH |
981 | u8 command = tf->command; |
982 | struct ata_queued_cmd *qc; | |
983 | DECLARE_COMPLETION(wait); | |
984 | unsigned long flags; | |
77853bf2 | 985 | unsigned int err_mask; |
a2a7a662 TH |
986 | |
987 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
988 | ||
3373efd8 | 989 | qc = ata_qc_new_init(dev); |
a2a7a662 TH |
990 | BUG_ON(qc == NULL); |
991 | ||
992 | qc->tf = *tf; | |
d69cf37d TH |
993 | if (cdb) |
994 | memcpy(qc->cdb, cdb, ATAPI_CDB_LEN); | |
e61e0672 | 995 | qc->flags |= ATA_QCFLAG_RESULT_TF; |
a2a7a662 TH |
996 | qc->dma_dir = dma_dir; |
997 | if (dma_dir != DMA_NONE) { | |
998 | ata_sg_init_one(qc, buf, buflen); | |
999 | qc->nsect = buflen / ATA_SECT_SIZE; | |
1000 | } | |
1001 | ||
77853bf2 | 1002 | qc->private_data = &wait; |
a2a7a662 TH |
1003 | qc->complete_fn = ata_qc_complete_internal; |
1004 | ||
8e0e694a | 1005 | ata_qc_issue(qc); |
a2a7a662 TH |
1006 | |
1007 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
1008 | ||
1009 | if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) { | |
41ade50c AL |
1010 | ata_port_flush_task(ap); |
1011 | ||
a2a7a662 TH |
1012 | spin_lock_irqsave(&ap->host_set->lock, flags); |
1013 | ||
1014 | /* We're racing with irq here. If we lose, the | |
1015 | * following test prevents us from completing the qc | |
1016 | * again. If completion irq occurs after here but | |
1017 | * before the caller cleans up, it will result in a | |
1018 | * spurious interrupt. We can live with that. | |
1019 | */ | |
77853bf2 | 1020 | if (qc->flags & ATA_QCFLAG_ACTIVE) { |
11a56d24 | 1021 | qc->err_mask = AC_ERR_TIMEOUT; |
a2a7a662 | 1022 | ata_qc_complete(qc); |
f15a1daf TH |
1023 | |
1024 | ata_dev_printk(dev, KERN_WARNING, | |
1025 | "qc timeout (cmd 0x%x)\n", command); | |
a2a7a662 TH |
1026 | } |
1027 | ||
1028 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
1029 | } | |
1030 | ||
15869303 TH |
1031 | /* finish up */ |
1032 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
1033 | ||
e61e0672 | 1034 | *tf = qc->result_tf; |
77853bf2 TH |
1035 | err_mask = qc->err_mask; |
1036 | ||
1037 | ata_qc_free(qc); | |
1038 | ||
1f7dd3e9 TH |
1039 | /* XXX - Some LLDDs (sata_mv) disable port on command failure. |
1040 | * Until those drivers are fixed, we detect the condition | |
1041 | * here, fail the command with AC_ERR_SYSTEM and reenable the | |
1042 | * port. | |
1043 | * | |
1044 | * Note that this doesn't change any behavior as internal | |
1045 | * command failure results in disabling the device in the | |
1046 | * higher layer for LLDDs without new reset/EH callbacks. | |
1047 | * | |
1048 | * Kill the following code as soon as those drivers are fixed. | |
1049 | */ | |
198e0fed | 1050 | if (ap->flags & ATA_FLAG_DISABLED) { |
1f7dd3e9 TH |
1051 | err_mask |= AC_ERR_SYSTEM; |
1052 | ata_port_probe(ap); | |
1053 | } | |
1054 | ||
15869303 TH |
1055 | spin_unlock_irqrestore(&ap->host_set->lock, flags); |
1056 | ||
77853bf2 | 1057 | return err_mask; |
a2a7a662 TH |
1058 | } |
1059 | ||
1bc4ccff AC |
1060 | /** |
1061 | * ata_pio_need_iordy - check if iordy needed | |
1062 | * @adev: ATA device | |
1063 | * | |
1064 | * Check if the current speed of the device requires IORDY. Used | |
1065 | * by various controllers for chip configuration. | |
1066 | */ | |
1067 | ||
1068 | unsigned int ata_pio_need_iordy(const struct ata_device *adev) | |
1069 | { | |
1070 | int pio; | |
1071 | int speed = adev->pio_mode - XFER_PIO_0; | |
1072 | ||
1073 | if (speed < 2) | |
1074 | return 0; | |
1075 | if (speed > 2) | |
1076 | return 1; | |
2e9edbf8 | 1077 | |
1bc4ccff AC |
1078 | /* If we have no drive specific rule, then PIO 2 is non IORDY */ |
1079 | ||
1080 | if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */ | |
1081 | pio = adev->id[ATA_ID_EIDE_PIO]; | |
1082 | /* Is the speed faster than the drive allows non IORDY ? */ | |
1083 | if (pio) { | |
1084 | /* This is cycle times not frequency - watch the logic! */ | |
1085 | if (pio > 240) /* PIO2 is 240nS per cycle */ | |
1086 | return 1; | |
1087 | return 0; | |
1088 | } | |
1089 | } | |
1090 | return 0; | |
1091 | } | |
1092 | ||
1da177e4 | 1093 | /** |
49016aca | 1094 | * ata_dev_read_id - Read ID data from the specified device |
49016aca TH |
1095 | * @dev: target device |
1096 | * @p_class: pointer to class of the target device (may be changed) | |
1097 | * @post_reset: is this read ID post-reset? | |
fe635c7e | 1098 | * @id: buffer to read IDENTIFY data into |
1da177e4 | 1099 | * |
49016aca TH |
1100 | * Read ID data from the specified device. ATA_CMD_ID_ATA is |
1101 | * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI | |
aec5c3c1 TH |
1102 | * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS |
1103 | * for pre-ATA4 drives. | |
1da177e4 LT |
1104 | * |
1105 | * LOCKING: | |
49016aca TH |
1106 | * Kernel thread context (may sleep) |
1107 | * | |
1108 | * RETURNS: | |
1109 | * 0 on success, -errno otherwise. | |
1da177e4 | 1110 | */ |
3373efd8 TH |
1111 | static int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class, |
1112 | int post_reset, u16 *id) | |
1da177e4 | 1113 | { |
3373efd8 | 1114 | struct ata_port *ap = dev->ap; |
49016aca | 1115 | unsigned int class = *p_class; |
a0123703 | 1116 | struct ata_taskfile tf; |
49016aca TH |
1117 | unsigned int err_mask = 0; |
1118 | const char *reason; | |
1119 | int rc; | |
1da177e4 | 1120 | |
49016aca | 1121 | DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno); |
1da177e4 | 1122 | |
49016aca | 1123 | ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */ |
1da177e4 | 1124 | |
49016aca | 1125 | retry: |
3373efd8 | 1126 | ata_tf_init(dev, &tf); |
a0123703 | 1127 | |
49016aca TH |
1128 | switch (class) { |
1129 | case ATA_DEV_ATA: | |
a0123703 | 1130 | tf.command = ATA_CMD_ID_ATA; |
49016aca TH |
1131 | break; |
1132 | case ATA_DEV_ATAPI: | |
a0123703 | 1133 | tf.command = ATA_CMD_ID_ATAPI; |
49016aca TH |
1134 | break; |
1135 | default: | |
1136 | rc = -ENODEV; | |
1137 | reason = "unsupported class"; | |
1138 | goto err_out; | |
1da177e4 LT |
1139 | } |
1140 | ||
a0123703 | 1141 | tf.protocol = ATA_PROT_PIO; |
1da177e4 | 1142 | |
3373efd8 | 1143 | err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE, |
49016aca | 1144 | id, sizeof(id[0]) * ATA_ID_WORDS); |
a0123703 | 1145 | if (err_mask) { |
49016aca TH |
1146 | rc = -EIO; |
1147 | reason = "I/O error"; | |
1da177e4 LT |
1148 | goto err_out; |
1149 | } | |
1150 | ||
49016aca | 1151 | swap_buf_le16(id, ATA_ID_WORDS); |
1da177e4 | 1152 | |
49016aca | 1153 | /* sanity check */ |
692785e7 | 1154 | if ((class == ATA_DEV_ATA) != (ata_id_is_ata(id) | ata_id_is_cfa(id))) { |
49016aca TH |
1155 | rc = -EINVAL; |
1156 | reason = "device reports illegal type"; | |
1157 | goto err_out; | |
1158 | } | |
1159 | ||
1160 | if (post_reset && class == ATA_DEV_ATA) { | |
1161 | /* | |
1162 | * The exact sequence expected by certain pre-ATA4 drives is: | |
1163 | * SRST RESET | |
1164 | * IDENTIFY | |
1165 | * INITIALIZE DEVICE PARAMETERS | |
1166 | * anything else.. | |
1167 | * Some drives were very specific about that exact sequence. | |
1168 | */ | |
1169 | if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) { | |
3373efd8 | 1170 | err_mask = ata_dev_init_params(dev, id[3], id[6]); |
49016aca TH |
1171 | if (err_mask) { |
1172 | rc = -EIO; | |
1173 | reason = "INIT_DEV_PARAMS failed"; | |
1174 | goto err_out; | |
1175 | } | |
1176 | ||
1177 | /* current CHS translation info (id[53-58]) might be | |
1178 | * changed. reread the identify device info. | |
1179 | */ | |
1180 | post_reset = 0; | |
1181 | goto retry; | |
1182 | } | |
1183 | } | |
1184 | ||
1185 | *p_class = class; | |
fe635c7e | 1186 | |
49016aca TH |
1187 | return 0; |
1188 | ||
1189 | err_out: | |
f15a1daf TH |
1190 | ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY " |
1191 | "(%s, err_mask=0x%x)\n", reason, err_mask); | |
49016aca TH |
1192 | return rc; |
1193 | } | |
1194 | ||
3373efd8 | 1195 | static inline u8 ata_dev_knobble(struct ata_device *dev) |
4b2f3ede | 1196 | { |
3373efd8 | 1197 | return ((dev->ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id))); |
4b2f3ede TH |
1198 | } |
1199 | ||
49016aca | 1200 | /** |
ffeae418 | 1201 | * ata_dev_configure - Configure the specified ATA/ATAPI device |
ffeae418 | 1202 | * @dev: Target device to configure |
4c2d721a | 1203 | * @print_info: Enable device info printout |
ffeae418 TH |
1204 | * |
1205 | * Configure @dev according to @dev->id. Generic and low-level | |
1206 | * driver specific fixups are also applied. | |
49016aca TH |
1207 | * |
1208 | * LOCKING: | |
ffeae418 TH |
1209 | * Kernel thread context (may sleep) |
1210 | * | |
1211 | * RETURNS: | |
1212 | * 0 on success, -errno otherwise | |
49016aca | 1213 | */ |
3373efd8 | 1214 | static int ata_dev_configure(struct ata_device *dev, int print_info) |
49016aca | 1215 | { |
3373efd8 | 1216 | struct ata_port *ap = dev->ap; |
1148c3a7 | 1217 | const u16 *id = dev->id; |
ff8854b2 | 1218 | unsigned int xfer_mask; |
49016aca TH |
1219 | int i, rc; |
1220 | ||
e1211e3f | 1221 | if (!ata_dev_enabled(dev)) { |
49016aca | 1222 | DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n", |
ffeae418 TH |
1223 | ap->id, dev->devno); |
1224 | return 0; | |
49016aca TH |
1225 | } |
1226 | ||
ffeae418 | 1227 | DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno); |
1da177e4 | 1228 | |
c39f5ebe TH |
1229 | /* print device capabilities */ |
1230 | if (print_info) | |
f15a1daf TH |
1231 | ata_dev_printk(dev, KERN_DEBUG, "cfg 49:%04x 82:%04x 83:%04x " |
1232 | "84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n", | |
1233 | id[49], id[82], id[83], id[84], | |
1234 | id[85], id[86], id[87], id[88]); | |
c39f5ebe | 1235 | |
208a9933 | 1236 | /* initialize to-be-configured parameters */ |
ea1dd4e1 | 1237 | dev->flags &= ~ATA_DFLAG_CFG_MASK; |
208a9933 TH |
1238 | dev->max_sectors = 0; |
1239 | dev->cdb_len = 0; | |
1240 | dev->n_sectors = 0; | |
1241 | dev->cylinders = 0; | |
1242 | dev->heads = 0; | |
1243 | dev->sectors = 0; | |
1244 | ||
1da177e4 LT |
1245 | /* |
1246 | * common ATA, ATAPI feature tests | |
1247 | */ | |
1248 | ||
ff8854b2 | 1249 | /* find max transfer mode; for printk only */ |
1148c3a7 | 1250 | xfer_mask = ata_id_xfermask(id); |
1da177e4 | 1251 | |
1148c3a7 | 1252 | ata_dump_id(id); |
1da177e4 LT |
1253 | |
1254 | /* ATA-specific feature tests */ | |
1255 | if (dev->class == ATA_DEV_ATA) { | |
1148c3a7 | 1256 | dev->n_sectors = ata_id_n_sectors(id); |
2940740b | 1257 | |
1148c3a7 | 1258 | if (ata_id_has_lba(id)) { |
4c2d721a | 1259 | const char *lba_desc; |
8bf62ece | 1260 | |
4c2d721a TH |
1261 | lba_desc = "LBA"; |
1262 | dev->flags |= ATA_DFLAG_LBA; | |
1148c3a7 | 1263 | if (ata_id_has_lba48(id)) { |
8bf62ece | 1264 | dev->flags |= ATA_DFLAG_LBA48; |
4c2d721a TH |
1265 | lba_desc = "LBA48"; |
1266 | } | |
8bf62ece AL |
1267 | |
1268 | /* print device info to dmesg */ | |
4c2d721a | 1269 | if (print_info) |
f15a1daf TH |
1270 | ata_dev_printk(dev, KERN_INFO, "ATA-%d, " |
1271 | "max %s, %Lu sectors: %s\n", | |
1272 | ata_id_major_version(id), | |
1273 | ata_mode_string(xfer_mask), | |
1274 | (unsigned long long)dev->n_sectors, | |
1275 | lba_desc); | |
ffeae418 | 1276 | } else { |
8bf62ece AL |
1277 | /* CHS */ |
1278 | ||
1279 | /* Default translation */ | |
1148c3a7 TH |
1280 | dev->cylinders = id[1]; |
1281 | dev->heads = id[3]; | |
1282 | dev->sectors = id[6]; | |
8bf62ece | 1283 | |
1148c3a7 | 1284 | if (ata_id_current_chs_valid(id)) { |
8bf62ece | 1285 | /* Current CHS translation is valid. */ |
1148c3a7 TH |
1286 | dev->cylinders = id[54]; |
1287 | dev->heads = id[55]; | |
1288 | dev->sectors = id[56]; | |
8bf62ece AL |
1289 | } |
1290 | ||
1291 | /* print device info to dmesg */ | |
4c2d721a | 1292 | if (print_info) |
f15a1daf TH |
1293 | ata_dev_printk(dev, KERN_INFO, "ATA-%d, " |
1294 | "max %s, %Lu sectors: CHS %u/%u/%u\n", | |
1295 | ata_id_major_version(id), | |
1296 | ata_mode_string(xfer_mask), | |
1297 | (unsigned long long)dev->n_sectors, | |
1298 | dev->cylinders, dev->heads, dev->sectors); | |
1da177e4 LT |
1299 | } |
1300 | ||
6e7846e9 | 1301 | dev->cdb_len = 16; |
1da177e4 LT |
1302 | } |
1303 | ||
1304 | /* ATAPI-specific feature tests */ | |
2c13b7ce | 1305 | else if (dev->class == ATA_DEV_ATAPI) { |
1148c3a7 | 1306 | rc = atapi_cdb_len(id); |
1da177e4 | 1307 | if ((rc < 12) || (rc > ATAPI_CDB_LEN)) { |
f15a1daf TH |
1308 | ata_dev_printk(dev, KERN_WARNING, |
1309 | "unsupported CDB len\n"); | |
ffeae418 | 1310 | rc = -EINVAL; |
1da177e4 LT |
1311 | goto err_out_nosup; |
1312 | } | |
6e7846e9 | 1313 | dev->cdb_len = (unsigned int) rc; |
1da177e4 LT |
1314 | |
1315 | /* print device info to dmesg */ | |
4c2d721a | 1316 | if (print_info) |
f15a1daf TH |
1317 | ata_dev_printk(dev, KERN_INFO, "ATAPI, max %s\n", |
1318 | ata_mode_string(xfer_mask)); | |
1da177e4 LT |
1319 | } |
1320 | ||
6e7846e9 TH |
1321 | ap->host->max_cmd_len = 0; |
1322 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
1323 | ap->host->max_cmd_len = max_t(unsigned int, | |
1324 | ap->host->max_cmd_len, | |
1325 | ap->device[i].cdb_len); | |
1326 | ||
4b2f3ede | 1327 | /* limit bridge transfers to udma5, 200 sectors */ |
3373efd8 | 1328 | if (ata_dev_knobble(dev)) { |
4c2d721a | 1329 | if (print_info) |
f15a1daf TH |
1330 | ata_dev_printk(dev, KERN_INFO, |
1331 | "applying bridge limits\n"); | |
5a529139 | 1332 | dev->udma_mask &= ATA_UDMA5; |
4b2f3ede TH |
1333 | dev->max_sectors = ATA_MAX_SECTORS; |
1334 | } | |
1335 | ||
1336 | if (ap->ops->dev_config) | |
1337 | ap->ops->dev_config(ap, dev); | |
1338 | ||
1da177e4 | 1339 | DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap)); |
ffeae418 | 1340 | return 0; |
1da177e4 LT |
1341 | |
1342 | err_out_nosup: | |
1da177e4 | 1343 | DPRINTK("EXIT, err\n"); |
ffeae418 | 1344 | return rc; |
1da177e4 LT |
1345 | } |
1346 | ||
1347 | /** | |
1348 | * ata_bus_probe - Reset and probe ATA bus | |
1349 | * @ap: Bus to probe | |
1350 | * | |
0cba632b JG |
1351 | * Master ATA bus probing function. Initiates a hardware-dependent |
1352 | * bus reset, then attempts to identify any devices found on | |
1353 | * the bus. | |
1354 | * | |
1da177e4 | 1355 | * LOCKING: |
0cba632b | 1356 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1357 | * |
1358 | * RETURNS: | |
96072e69 | 1359 | * Zero on success, negative errno otherwise. |
1da177e4 LT |
1360 | */ |
1361 | ||
1362 | static int ata_bus_probe(struct ata_port *ap) | |
1363 | { | |
28ca5c57 | 1364 | unsigned int classes[ATA_MAX_DEVICES]; |
14d2bac1 TH |
1365 | int tries[ATA_MAX_DEVICES]; |
1366 | int i, rc, down_xfermask; | |
e82cbdb9 | 1367 | struct ata_device *dev; |
1da177e4 | 1368 | |
28ca5c57 | 1369 | ata_port_probe(ap); |
c19ba8af | 1370 | |
14d2bac1 TH |
1371 | for (i = 0; i < ATA_MAX_DEVICES; i++) |
1372 | tries[i] = ATA_PROBE_MAX_TRIES; | |
1373 | ||
1374 | retry: | |
1375 | down_xfermask = 0; | |
1376 | ||
2044470c TH |
1377 | /* reset and determine device classes */ |
1378 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
1379 | classes[i] = ATA_DEV_UNKNOWN; | |
2061a47a | 1380 | |
2044470c | 1381 | if (ap->ops->probe_reset) { |
c19ba8af | 1382 | rc = ap->ops->probe_reset(ap, classes); |
28ca5c57 | 1383 | if (rc) { |
f15a1daf TH |
1384 | ata_port_printk(ap, KERN_ERR, |
1385 | "reset failed (errno=%d)\n", rc); | |
28ca5c57 | 1386 | return rc; |
c19ba8af | 1387 | } |
28ca5c57 | 1388 | } else { |
c19ba8af TH |
1389 | ap->ops->phy_reset(ap); |
1390 | ||
f8c2c420 TH |
1391 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
1392 | if (!(ap->flags & ATA_FLAG_DISABLED)) | |
28ca5c57 | 1393 | classes[i] = ap->device[i].class; |
f8c2c420 TH |
1394 | ap->device[i].class = ATA_DEV_UNKNOWN; |
1395 | } | |
2044470c | 1396 | |
28ca5c57 TH |
1397 | ata_port_probe(ap); |
1398 | } | |
1da177e4 | 1399 | |
2044470c TH |
1400 | for (i = 0; i < ATA_MAX_DEVICES; i++) |
1401 | if (classes[i] == ATA_DEV_UNKNOWN) | |
1402 | classes[i] = ATA_DEV_NONE; | |
1403 | ||
28ca5c57 | 1404 | /* read IDENTIFY page and configure devices */ |
1da177e4 | 1405 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
e82cbdb9 | 1406 | dev = &ap->device[i]; |
28ca5c57 | 1407 | |
ec573755 TH |
1408 | if (tries[i]) |
1409 | dev->class = classes[i]; | |
ffeae418 | 1410 | |
14d2bac1 | 1411 | if (!ata_dev_enabled(dev)) |
ffeae418 | 1412 | continue; |
ffeae418 | 1413 | |
3373efd8 | 1414 | rc = ata_dev_read_id(dev, &dev->class, 1, dev->id); |
14d2bac1 TH |
1415 | if (rc) |
1416 | goto fail; | |
1417 | ||
3373efd8 | 1418 | rc = ata_dev_configure(dev, 1); |
14d2bac1 TH |
1419 | if (rc) |
1420 | goto fail; | |
1da177e4 LT |
1421 | } |
1422 | ||
e82cbdb9 | 1423 | /* configure transfer mode */ |
3adcebb2 | 1424 | rc = ata_set_mode(ap, &dev); |
51713d35 TH |
1425 | if (rc) { |
1426 | down_xfermask = 1; | |
1427 | goto fail; | |
e82cbdb9 | 1428 | } |
1da177e4 | 1429 | |
e82cbdb9 TH |
1430 | for (i = 0; i < ATA_MAX_DEVICES; i++) |
1431 | if (ata_dev_enabled(&ap->device[i])) | |
1432 | return 0; | |
1da177e4 | 1433 | |
e82cbdb9 TH |
1434 | /* no device present, disable port */ |
1435 | ata_port_disable(ap); | |
1da177e4 | 1436 | ap->ops->port_disable(ap); |
96072e69 | 1437 | return -ENODEV; |
14d2bac1 TH |
1438 | |
1439 | fail: | |
1440 | switch (rc) { | |
1441 | case -EINVAL: | |
1442 | case -ENODEV: | |
1443 | tries[dev->devno] = 0; | |
1444 | break; | |
1445 | case -EIO: | |
3c567b7d | 1446 | sata_down_spd_limit(ap); |
14d2bac1 TH |
1447 | /* fall through */ |
1448 | default: | |
1449 | tries[dev->devno]--; | |
1450 | if (down_xfermask && | |
3373efd8 | 1451 | ata_down_xfermask_limit(dev, tries[dev->devno] == 1)) |
14d2bac1 TH |
1452 | tries[dev->devno] = 0; |
1453 | } | |
1454 | ||
ec573755 | 1455 | if (!tries[dev->devno]) { |
3373efd8 TH |
1456 | ata_down_xfermask_limit(dev, 1); |
1457 | ata_dev_disable(dev); | |
ec573755 TH |
1458 | } |
1459 | ||
14d2bac1 | 1460 | goto retry; |
1da177e4 LT |
1461 | } |
1462 | ||
1463 | /** | |
0cba632b JG |
1464 | * ata_port_probe - Mark port as enabled |
1465 | * @ap: Port for which we indicate enablement | |
1da177e4 | 1466 | * |
0cba632b JG |
1467 | * Modify @ap data structure such that the system |
1468 | * thinks that the entire port is enabled. | |
1469 | * | |
1470 | * LOCKING: host_set lock, or some other form of | |
1471 | * serialization. | |
1da177e4 LT |
1472 | */ |
1473 | ||
1474 | void ata_port_probe(struct ata_port *ap) | |
1475 | { | |
198e0fed | 1476 | ap->flags &= ~ATA_FLAG_DISABLED; |
1da177e4 LT |
1477 | } |
1478 | ||
3be680b7 TH |
1479 | /** |
1480 | * sata_print_link_status - Print SATA link status | |
1481 | * @ap: SATA port to printk link status about | |
1482 | * | |
1483 | * This function prints link speed and status of a SATA link. | |
1484 | * | |
1485 | * LOCKING: | |
1486 | * None. | |
1487 | */ | |
1488 | static void sata_print_link_status(struct ata_port *ap) | |
1489 | { | |
6d5f9732 | 1490 | u32 sstatus, scontrol, tmp; |
3be680b7 | 1491 | |
81952c54 | 1492 | if (sata_scr_read(ap, SCR_STATUS, &sstatus)) |
3be680b7 | 1493 | return; |
81952c54 | 1494 | sata_scr_read(ap, SCR_CONTROL, &scontrol); |
3be680b7 | 1495 | |
81952c54 | 1496 | if (ata_port_online(ap)) { |
3be680b7 | 1497 | tmp = (sstatus >> 4) & 0xf; |
f15a1daf TH |
1498 | ata_port_printk(ap, KERN_INFO, |
1499 | "SATA link up %s (SStatus %X SControl %X)\n", | |
1500 | sata_spd_string(tmp), sstatus, scontrol); | |
3be680b7 | 1501 | } else { |
f15a1daf TH |
1502 | ata_port_printk(ap, KERN_INFO, |
1503 | "SATA link down (SStatus %X SControl %X)\n", | |
1504 | sstatus, scontrol); | |
3be680b7 TH |
1505 | } |
1506 | } | |
1507 | ||
1da177e4 | 1508 | /** |
780a87f7 JG |
1509 | * __sata_phy_reset - Wake/reset a low-level SATA PHY |
1510 | * @ap: SATA port associated with target SATA PHY. | |
1da177e4 | 1511 | * |
780a87f7 JG |
1512 | * This function issues commands to standard SATA Sxxx |
1513 | * PHY registers, to wake up the phy (and device), and | |
1514 | * clear any reset condition. | |
1da177e4 LT |
1515 | * |
1516 | * LOCKING: | |
0cba632b | 1517 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1518 | * |
1519 | */ | |
1520 | void __sata_phy_reset(struct ata_port *ap) | |
1521 | { | |
1522 | u32 sstatus; | |
1523 | unsigned long timeout = jiffies + (HZ * 5); | |
1524 | ||
1525 | if (ap->flags & ATA_FLAG_SATA_RESET) { | |
cdcca89e | 1526 | /* issue phy wake/reset */ |
81952c54 | 1527 | sata_scr_write_flush(ap, SCR_CONTROL, 0x301); |
62ba2841 TH |
1528 | /* Couldn't find anything in SATA I/II specs, but |
1529 | * AHCI-1.1 10.4.2 says at least 1 ms. */ | |
1530 | mdelay(1); | |
1da177e4 | 1531 | } |
81952c54 TH |
1532 | /* phy wake/clear reset */ |
1533 | sata_scr_write_flush(ap, SCR_CONTROL, 0x300); | |
1da177e4 LT |
1534 | |
1535 | /* wait for phy to become ready, if necessary */ | |
1536 | do { | |
1537 | msleep(200); | |
81952c54 | 1538 | sata_scr_read(ap, SCR_STATUS, &sstatus); |
1da177e4 LT |
1539 | if ((sstatus & 0xf) != 1) |
1540 | break; | |
1541 | } while (time_before(jiffies, timeout)); | |
1542 | ||
3be680b7 TH |
1543 | /* print link status */ |
1544 | sata_print_link_status(ap); | |
656563e3 | 1545 | |
3be680b7 | 1546 | /* TODO: phy layer with polling, timeouts, etc. */ |
81952c54 | 1547 | if (!ata_port_offline(ap)) |
1da177e4 | 1548 | ata_port_probe(ap); |
3be680b7 | 1549 | else |
1da177e4 | 1550 | ata_port_disable(ap); |
1da177e4 | 1551 | |
198e0fed | 1552 | if (ap->flags & ATA_FLAG_DISABLED) |
1da177e4 LT |
1553 | return; |
1554 | ||
1555 | if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) { | |
1556 | ata_port_disable(ap); | |
1557 | return; | |
1558 | } | |
1559 | ||
1560 | ap->cbl = ATA_CBL_SATA; | |
1561 | } | |
1562 | ||
1563 | /** | |
780a87f7 JG |
1564 | * sata_phy_reset - Reset SATA bus. |
1565 | * @ap: SATA port associated with target SATA PHY. | |
1da177e4 | 1566 | * |
780a87f7 JG |
1567 | * This function resets the SATA bus, and then probes |
1568 | * the bus for devices. | |
1da177e4 LT |
1569 | * |
1570 | * LOCKING: | |
0cba632b | 1571 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1572 | * |
1573 | */ | |
1574 | void sata_phy_reset(struct ata_port *ap) | |
1575 | { | |
1576 | __sata_phy_reset(ap); | |
198e0fed | 1577 | if (ap->flags & ATA_FLAG_DISABLED) |
1da177e4 LT |
1578 | return; |
1579 | ata_bus_reset(ap); | |
1580 | } | |
1581 | ||
ebdfca6e AC |
1582 | /** |
1583 | * ata_dev_pair - return other device on cable | |
ebdfca6e AC |
1584 | * @adev: device |
1585 | * | |
1586 | * Obtain the other device on the same cable, or if none is | |
1587 | * present NULL is returned | |
1588 | */ | |
2e9edbf8 | 1589 | |
3373efd8 | 1590 | struct ata_device *ata_dev_pair(struct ata_device *adev) |
ebdfca6e | 1591 | { |
3373efd8 | 1592 | struct ata_port *ap = adev->ap; |
ebdfca6e | 1593 | struct ata_device *pair = &ap->device[1 - adev->devno]; |
e1211e3f | 1594 | if (!ata_dev_enabled(pair)) |
ebdfca6e AC |
1595 | return NULL; |
1596 | return pair; | |
1597 | } | |
1598 | ||
1da177e4 | 1599 | /** |
780a87f7 JG |
1600 | * ata_port_disable - Disable port. |
1601 | * @ap: Port to be disabled. | |
1da177e4 | 1602 | * |
780a87f7 JG |
1603 | * Modify @ap data structure such that the system |
1604 | * thinks that the entire port is disabled, and should | |
1605 | * never attempt to probe or communicate with devices | |
1606 | * on this port. | |
1607 | * | |
1608 | * LOCKING: host_set lock, or some other form of | |
1609 | * serialization. | |
1da177e4 LT |
1610 | */ |
1611 | ||
1612 | void ata_port_disable(struct ata_port *ap) | |
1613 | { | |
1614 | ap->device[0].class = ATA_DEV_NONE; | |
1615 | ap->device[1].class = ATA_DEV_NONE; | |
198e0fed | 1616 | ap->flags |= ATA_FLAG_DISABLED; |
1da177e4 LT |
1617 | } |
1618 | ||
1c3fae4d | 1619 | /** |
3c567b7d | 1620 | * sata_down_spd_limit - adjust SATA spd limit downward |
1c3fae4d TH |
1621 | * @ap: Port to adjust SATA spd limit for |
1622 | * | |
1623 | * Adjust SATA spd limit of @ap downward. Note that this | |
1624 | * function only adjusts the limit. The change must be applied | |
3c567b7d | 1625 | * using sata_set_spd(). |
1c3fae4d TH |
1626 | * |
1627 | * LOCKING: | |
1628 | * Inherited from caller. | |
1629 | * | |
1630 | * RETURNS: | |
1631 | * 0 on success, negative errno on failure | |
1632 | */ | |
3c567b7d | 1633 | int sata_down_spd_limit(struct ata_port *ap) |
1c3fae4d | 1634 | { |
81952c54 TH |
1635 | u32 sstatus, spd, mask; |
1636 | int rc, highbit; | |
1c3fae4d | 1637 | |
81952c54 TH |
1638 | rc = sata_scr_read(ap, SCR_STATUS, &sstatus); |
1639 | if (rc) | |
1640 | return rc; | |
1c3fae4d TH |
1641 | |
1642 | mask = ap->sata_spd_limit; | |
1643 | if (mask <= 1) | |
1644 | return -EINVAL; | |
1645 | highbit = fls(mask) - 1; | |
1646 | mask &= ~(1 << highbit); | |
1647 | ||
81952c54 | 1648 | spd = (sstatus >> 4) & 0xf; |
1c3fae4d TH |
1649 | if (spd <= 1) |
1650 | return -EINVAL; | |
1651 | spd--; | |
1652 | mask &= (1 << spd) - 1; | |
1653 | if (!mask) | |
1654 | return -EINVAL; | |
1655 | ||
1656 | ap->sata_spd_limit = mask; | |
1657 | ||
f15a1daf TH |
1658 | ata_port_printk(ap, KERN_WARNING, "limiting SATA link speed to %s\n", |
1659 | sata_spd_string(fls(mask))); | |
1c3fae4d TH |
1660 | |
1661 | return 0; | |
1662 | } | |
1663 | ||
3c567b7d | 1664 | static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol) |
1c3fae4d TH |
1665 | { |
1666 | u32 spd, limit; | |
1667 | ||
1668 | if (ap->sata_spd_limit == UINT_MAX) | |
1669 | limit = 0; | |
1670 | else | |
1671 | limit = fls(ap->sata_spd_limit); | |
1672 | ||
1673 | spd = (*scontrol >> 4) & 0xf; | |
1674 | *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4); | |
1675 | ||
1676 | return spd != limit; | |
1677 | } | |
1678 | ||
1679 | /** | |
3c567b7d | 1680 | * sata_set_spd_needed - is SATA spd configuration needed |
1c3fae4d TH |
1681 | * @ap: Port in question |
1682 | * | |
1683 | * Test whether the spd limit in SControl matches | |
1684 | * @ap->sata_spd_limit. This function is used to determine | |
1685 | * whether hardreset is necessary to apply SATA spd | |
1686 | * configuration. | |
1687 | * | |
1688 | * LOCKING: | |
1689 | * Inherited from caller. | |
1690 | * | |
1691 | * RETURNS: | |
1692 | * 1 if SATA spd configuration is needed, 0 otherwise. | |
1693 | */ | |
3c567b7d | 1694 | int sata_set_spd_needed(struct ata_port *ap) |
1c3fae4d TH |
1695 | { |
1696 | u32 scontrol; | |
1697 | ||
81952c54 | 1698 | if (sata_scr_read(ap, SCR_CONTROL, &scontrol)) |
1c3fae4d TH |
1699 | return 0; |
1700 | ||
3c567b7d | 1701 | return __sata_set_spd_needed(ap, &scontrol); |
1c3fae4d TH |
1702 | } |
1703 | ||
1704 | /** | |
3c567b7d | 1705 | * sata_set_spd - set SATA spd according to spd limit |
1c3fae4d TH |
1706 | * @ap: Port to set SATA spd for |
1707 | * | |
1708 | * Set SATA spd of @ap according to sata_spd_limit. | |
1709 | * | |
1710 | * LOCKING: | |
1711 | * Inherited from caller. | |
1712 | * | |
1713 | * RETURNS: | |
1714 | * 0 if spd doesn't need to be changed, 1 if spd has been | |
81952c54 | 1715 | * changed. Negative errno if SCR registers are inaccessible. |
1c3fae4d | 1716 | */ |
3c567b7d | 1717 | int sata_set_spd(struct ata_port *ap) |
1c3fae4d TH |
1718 | { |
1719 | u32 scontrol; | |
81952c54 | 1720 | int rc; |
1c3fae4d | 1721 | |
81952c54 TH |
1722 | if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol))) |
1723 | return rc; | |
1c3fae4d | 1724 | |
3c567b7d | 1725 | if (!__sata_set_spd_needed(ap, &scontrol)) |
1c3fae4d TH |
1726 | return 0; |
1727 | ||
81952c54 TH |
1728 | if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol))) |
1729 | return rc; | |
1730 | ||
1c3fae4d TH |
1731 | return 1; |
1732 | } | |
1733 | ||
452503f9 AC |
1734 | /* |
1735 | * This mode timing computation functionality is ported over from | |
1736 | * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik | |
1737 | */ | |
1738 | /* | |
1739 | * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds). | |
1740 | * These were taken from ATA/ATAPI-6 standard, rev 0a, except | |
1741 | * for PIO 5, which is a nonstandard extension and UDMA6, which | |
2e9edbf8 | 1742 | * is currently supported only by Maxtor drives. |
452503f9 AC |
1743 | */ |
1744 | ||
1745 | static const struct ata_timing ata_timing[] = { | |
1746 | ||
1747 | { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 }, | |
1748 | { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 }, | |
1749 | { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 }, | |
1750 | { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 }, | |
1751 | ||
1752 | { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 }, | |
1753 | { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 }, | |
1754 | { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 }, | |
1755 | ||
1756 | /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */ | |
2e9edbf8 | 1757 | |
452503f9 AC |
1758 | { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 }, |
1759 | { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 }, | |
1760 | { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 }, | |
2e9edbf8 | 1761 | |
452503f9 AC |
1762 | { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 }, |
1763 | { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 }, | |
1764 | { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 }, | |
1765 | ||
1766 | /* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */ | |
1767 | { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 }, | |
1768 | { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 }, | |
1769 | ||
1770 | { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 }, | |
1771 | { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 }, | |
1772 | { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 }, | |
1773 | ||
1774 | /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */ | |
1775 | ||
1776 | { 0xFF } | |
1777 | }; | |
1778 | ||
1779 | #define ENOUGH(v,unit) (((v)-1)/(unit)+1) | |
1780 | #define EZ(v,unit) ((v)?ENOUGH(v,unit):0) | |
1781 | ||
1782 | static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT) | |
1783 | { | |
1784 | q->setup = EZ(t->setup * 1000, T); | |
1785 | q->act8b = EZ(t->act8b * 1000, T); | |
1786 | q->rec8b = EZ(t->rec8b * 1000, T); | |
1787 | q->cyc8b = EZ(t->cyc8b * 1000, T); | |
1788 | q->active = EZ(t->active * 1000, T); | |
1789 | q->recover = EZ(t->recover * 1000, T); | |
1790 | q->cycle = EZ(t->cycle * 1000, T); | |
1791 | q->udma = EZ(t->udma * 1000, UT); | |
1792 | } | |
1793 | ||
1794 | void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b, | |
1795 | struct ata_timing *m, unsigned int what) | |
1796 | { | |
1797 | if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup); | |
1798 | if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b); | |
1799 | if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b); | |
1800 | if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b); | |
1801 | if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active); | |
1802 | if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover); | |
1803 | if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle); | |
1804 | if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma); | |
1805 | } | |
1806 | ||
1807 | static const struct ata_timing* ata_timing_find_mode(unsigned short speed) | |
1808 | { | |
1809 | const struct ata_timing *t; | |
1810 | ||
1811 | for (t = ata_timing; t->mode != speed; t++) | |
91190758 | 1812 | if (t->mode == 0xFF) |
452503f9 | 1813 | return NULL; |
2e9edbf8 | 1814 | return t; |
452503f9 AC |
1815 | } |
1816 | ||
1817 | int ata_timing_compute(struct ata_device *adev, unsigned short speed, | |
1818 | struct ata_timing *t, int T, int UT) | |
1819 | { | |
1820 | const struct ata_timing *s; | |
1821 | struct ata_timing p; | |
1822 | ||
1823 | /* | |
2e9edbf8 | 1824 | * Find the mode. |
75b1f2f8 | 1825 | */ |
452503f9 AC |
1826 | |
1827 | if (!(s = ata_timing_find_mode(speed))) | |
1828 | return -EINVAL; | |
1829 | ||
75b1f2f8 AL |
1830 | memcpy(t, s, sizeof(*s)); |
1831 | ||
452503f9 AC |
1832 | /* |
1833 | * If the drive is an EIDE drive, it can tell us it needs extended | |
1834 | * PIO/MW_DMA cycle timing. | |
1835 | */ | |
1836 | ||
1837 | if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */ | |
1838 | memset(&p, 0, sizeof(p)); | |
1839 | if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) { | |
1840 | if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO]; | |
1841 | else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY]; | |
1842 | } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) { | |
1843 | p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN]; | |
1844 | } | |
1845 | ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B); | |
1846 | } | |
1847 | ||
1848 | /* | |
1849 | * Convert the timing to bus clock counts. | |
1850 | */ | |
1851 | ||
75b1f2f8 | 1852 | ata_timing_quantize(t, t, T, UT); |
452503f9 AC |
1853 | |
1854 | /* | |
c893a3ae RD |
1855 | * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, |
1856 | * S.M.A.R.T * and some other commands. We have to ensure that the | |
1857 | * DMA cycle timing is slower/equal than the fastest PIO timing. | |
452503f9 AC |
1858 | */ |
1859 | ||
1860 | if (speed > XFER_PIO_4) { | |
1861 | ata_timing_compute(adev, adev->pio_mode, &p, T, UT); | |
1862 | ata_timing_merge(&p, t, t, ATA_TIMING_ALL); | |
1863 | } | |
1864 | ||
1865 | /* | |
c893a3ae | 1866 | * Lengthen active & recovery time so that cycle time is correct. |
452503f9 AC |
1867 | */ |
1868 | ||
1869 | if (t->act8b + t->rec8b < t->cyc8b) { | |
1870 | t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2; | |
1871 | t->rec8b = t->cyc8b - t->act8b; | |
1872 | } | |
1873 | ||
1874 | if (t->active + t->recover < t->cycle) { | |
1875 | t->active += (t->cycle - (t->active + t->recover)) / 2; | |
1876 | t->recover = t->cycle - t->active; | |
1877 | } | |
1878 | ||
1879 | return 0; | |
1880 | } | |
1881 | ||
cf176e1a TH |
1882 | /** |
1883 | * ata_down_xfermask_limit - adjust dev xfer masks downward | |
cf176e1a TH |
1884 | * @dev: Device to adjust xfer masks |
1885 | * @force_pio0: Force PIO0 | |
1886 | * | |
1887 | * Adjust xfer masks of @dev downward. Note that this function | |
1888 | * does not apply the change. Invoking ata_set_mode() afterwards | |
1889 | * will apply the limit. | |
1890 | * | |
1891 | * LOCKING: | |
1892 | * Inherited from caller. | |
1893 | * | |
1894 | * RETURNS: | |
1895 | * 0 on success, negative errno on failure | |
1896 | */ | |
3373efd8 | 1897 | int ata_down_xfermask_limit(struct ata_device *dev, int force_pio0) |
cf176e1a TH |
1898 | { |
1899 | unsigned long xfer_mask; | |
1900 | int highbit; | |
1901 | ||
1902 | xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask, | |
1903 | dev->udma_mask); | |
1904 | ||
1905 | if (!xfer_mask) | |
1906 | goto fail; | |
1907 | /* don't gear down to MWDMA from UDMA, go directly to PIO */ | |
1908 | if (xfer_mask & ATA_MASK_UDMA) | |
1909 | xfer_mask &= ~ATA_MASK_MWDMA; | |
1910 | ||
1911 | highbit = fls(xfer_mask) - 1; | |
1912 | xfer_mask &= ~(1 << highbit); | |
1913 | if (force_pio0) | |
1914 | xfer_mask &= 1 << ATA_SHIFT_PIO; | |
1915 | if (!xfer_mask) | |
1916 | goto fail; | |
1917 | ||
1918 | ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask, | |
1919 | &dev->udma_mask); | |
1920 | ||
f15a1daf TH |
1921 | ata_dev_printk(dev, KERN_WARNING, "limiting speed to %s\n", |
1922 | ata_mode_string(xfer_mask)); | |
cf176e1a TH |
1923 | |
1924 | return 0; | |
1925 | ||
1926 | fail: | |
1927 | return -EINVAL; | |
1928 | } | |
1929 | ||
3373efd8 | 1930 | static int ata_dev_set_mode(struct ata_device *dev) |
1da177e4 | 1931 | { |
83206a29 TH |
1932 | unsigned int err_mask; |
1933 | int rc; | |
1da177e4 | 1934 | |
e8384607 | 1935 | dev->flags &= ~ATA_DFLAG_PIO; |
1da177e4 LT |
1936 | if (dev->xfer_shift == ATA_SHIFT_PIO) |
1937 | dev->flags |= ATA_DFLAG_PIO; | |
1938 | ||
3373efd8 | 1939 | err_mask = ata_dev_set_xfermode(dev); |
83206a29 | 1940 | if (err_mask) { |
f15a1daf TH |
1941 | ata_dev_printk(dev, KERN_ERR, "failed to set xfermode " |
1942 | "(err_mask=0x%x)\n", err_mask); | |
83206a29 TH |
1943 | return -EIO; |
1944 | } | |
1da177e4 | 1945 | |
3373efd8 | 1946 | rc = ata_dev_revalidate(dev, 0); |
5eb45c02 | 1947 | if (rc) |
83206a29 | 1948 | return rc; |
48a8a14f | 1949 | |
23e71c3d TH |
1950 | DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n", |
1951 | dev->xfer_shift, (int)dev->xfer_mode); | |
1da177e4 | 1952 | |
f15a1daf TH |
1953 | ata_dev_printk(dev, KERN_INFO, "configured for %s\n", |
1954 | ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode))); | |
83206a29 | 1955 | return 0; |
1da177e4 LT |
1956 | } |
1957 | ||
1da177e4 LT |
1958 | /** |
1959 | * ata_set_mode - Program timings and issue SET FEATURES - XFER | |
1960 | * @ap: port on which timings will be programmed | |
e82cbdb9 | 1961 | * @r_failed_dev: out paramter for failed device |
1da177e4 | 1962 | * |
e82cbdb9 TH |
1963 | * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If |
1964 | * ata_set_mode() fails, pointer to the failing device is | |
1965 | * returned in @r_failed_dev. | |
780a87f7 | 1966 | * |
1da177e4 | 1967 | * LOCKING: |
0cba632b | 1968 | * PCI/etc. bus probe sem. |
e82cbdb9 TH |
1969 | * |
1970 | * RETURNS: | |
1971 | * 0 on success, negative errno otherwise | |
1da177e4 | 1972 | */ |
1ad8e7f9 | 1973 | int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev) |
1da177e4 | 1974 | { |
e8e0619f | 1975 | struct ata_device *dev; |
e82cbdb9 | 1976 | int i, rc = 0, used_dma = 0, found = 0; |
1da177e4 | 1977 | |
3adcebb2 TH |
1978 | /* has private set_mode? */ |
1979 | if (ap->ops->set_mode) { | |
1980 | /* FIXME: make ->set_mode handle no device case and | |
1981 | * return error code and failing device on failure. | |
1982 | */ | |
1983 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
1984 | if (ata_dev_enabled(&ap->device[i])) { | |
1985 | ap->ops->set_mode(ap); | |
1986 | break; | |
1987 | } | |
1988 | } | |
1989 | return 0; | |
1990 | } | |
1991 | ||
a6d5a51c TH |
1992 | /* step 1: calculate xfer_mask */ |
1993 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
acf356b1 | 1994 | unsigned int pio_mask, dma_mask; |
a6d5a51c | 1995 | |
e8e0619f TH |
1996 | dev = &ap->device[i]; |
1997 | ||
e1211e3f | 1998 | if (!ata_dev_enabled(dev)) |
a6d5a51c TH |
1999 | continue; |
2000 | ||
3373efd8 | 2001 | ata_dev_xfermask(dev); |
1da177e4 | 2002 | |
acf356b1 TH |
2003 | pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0); |
2004 | dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask); | |
2005 | dev->pio_mode = ata_xfer_mask2mode(pio_mask); | |
2006 | dev->dma_mode = ata_xfer_mask2mode(dma_mask); | |
5444a6f4 | 2007 | |
4f65977d | 2008 | found = 1; |
5444a6f4 AC |
2009 | if (dev->dma_mode) |
2010 | used_dma = 1; | |
a6d5a51c | 2011 | } |
4f65977d | 2012 | if (!found) |
e82cbdb9 | 2013 | goto out; |
a6d5a51c TH |
2014 | |
2015 | /* step 2: always set host PIO timings */ | |
e8e0619f TH |
2016 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
2017 | dev = &ap->device[i]; | |
2018 | if (!ata_dev_enabled(dev)) | |
2019 | continue; | |
2020 | ||
2021 | if (!dev->pio_mode) { | |
f15a1daf | 2022 | ata_dev_printk(dev, KERN_WARNING, "no PIO support\n"); |
e8e0619f | 2023 | rc = -EINVAL; |
e82cbdb9 | 2024 | goto out; |
e8e0619f TH |
2025 | } |
2026 | ||
2027 | dev->xfer_mode = dev->pio_mode; | |
2028 | dev->xfer_shift = ATA_SHIFT_PIO; | |
2029 | if (ap->ops->set_piomode) | |
2030 | ap->ops->set_piomode(ap, dev); | |
2031 | } | |
1da177e4 | 2032 | |
a6d5a51c | 2033 | /* step 3: set host DMA timings */ |
e8e0619f TH |
2034 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
2035 | dev = &ap->device[i]; | |
2036 | ||
2037 | if (!ata_dev_enabled(dev) || !dev->dma_mode) | |
2038 | continue; | |
2039 | ||
2040 | dev->xfer_mode = dev->dma_mode; | |
2041 | dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode); | |
2042 | if (ap->ops->set_dmamode) | |
2043 | ap->ops->set_dmamode(ap, dev); | |
2044 | } | |
1da177e4 LT |
2045 | |
2046 | /* step 4: update devices' xfer mode */ | |
83206a29 | 2047 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
e8e0619f | 2048 | dev = &ap->device[i]; |
1da177e4 | 2049 | |
e1211e3f | 2050 | if (!ata_dev_enabled(dev)) |
83206a29 TH |
2051 | continue; |
2052 | ||
3373efd8 | 2053 | rc = ata_dev_set_mode(dev); |
5bbc53f4 | 2054 | if (rc) |
e82cbdb9 | 2055 | goto out; |
83206a29 | 2056 | } |
1da177e4 | 2057 | |
e8e0619f TH |
2058 | /* Record simplex status. If we selected DMA then the other |
2059 | * host channels are not permitted to do so. | |
5444a6f4 | 2060 | */ |
5444a6f4 AC |
2061 | if (used_dma && (ap->host_set->flags & ATA_HOST_SIMPLEX)) |
2062 | ap->host_set->simplex_claimed = 1; | |
2063 | ||
e8e0619f | 2064 | /* step5: chip specific finalisation */ |
1da177e4 LT |
2065 | if (ap->ops->post_set_mode) |
2066 | ap->ops->post_set_mode(ap); | |
2067 | ||
e82cbdb9 TH |
2068 | out: |
2069 | if (rc) | |
2070 | *r_failed_dev = dev; | |
2071 | return rc; | |
1da177e4 LT |
2072 | } |
2073 | ||
1fdffbce JG |
2074 | /** |
2075 | * ata_tf_to_host - issue ATA taskfile to host controller | |
2076 | * @ap: port to which command is being issued | |
2077 | * @tf: ATA taskfile register set | |
2078 | * | |
2079 | * Issues ATA taskfile register set to ATA host controller, | |
2080 | * with proper synchronization with interrupt handler and | |
2081 | * other threads. | |
2082 | * | |
2083 | * LOCKING: | |
2084 | * spin_lock_irqsave(host_set lock) | |
2085 | */ | |
2086 | ||
2087 | static inline void ata_tf_to_host(struct ata_port *ap, | |
2088 | const struct ata_taskfile *tf) | |
2089 | { | |
2090 | ap->ops->tf_load(ap, tf); | |
2091 | ap->ops->exec_command(ap, tf); | |
2092 | } | |
2093 | ||
1da177e4 LT |
2094 | /** |
2095 | * ata_busy_sleep - sleep until BSY clears, or timeout | |
2096 | * @ap: port containing status register to be polled | |
2097 | * @tmout_pat: impatience timeout | |
2098 | * @tmout: overall timeout | |
2099 | * | |
780a87f7 JG |
2100 | * Sleep until ATA Status register bit BSY clears, |
2101 | * or a timeout occurs. | |
2102 | * | |
2103 | * LOCKING: None. | |
1da177e4 LT |
2104 | */ |
2105 | ||
6f8b9958 TH |
2106 | unsigned int ata_busy_sleep (struct ata_port *ap, |
2107 | unsigned long tmout_pat, unsigned long tmout) | |
1da177e4 LT |
2108 | { |
2109 | unsigned long timer_start, timeout; | |
2110 | u8 status; | |
2111 | ||
2112 | status = ata_busy_wait(ap, ATA_BUSY, 300); | |
2113 | timer_start = jiffies; | |
2114 | timeout = timer_start + tmout_pat; | |
2115 | while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) { | |
2116 | msleep(50); | |
2117 | status = ata_busy_wait(ap, ATA_BUSY, 3); | |
2118 | } | |
2119 | ||
2120 | if (status & ATA_BUSY) | |
f15a1daf TH |
2121 | ata_port_printk(ap, KERN_WARNING, |
2122 | "port is slow to respond, please be patient\n"); | |
1da177e4 LT |
2123 | |
2124 | timeout = timer_start + tmout; | |
2125 | while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) { | |
2126 | msleep(50); | |
2127 | status = ata_chk_status(ap); | |
2128 | } | |
2129 | ||
2130 | if (status & ATA_BUSY) { | |
f15a1daf TH |
2131 | ata_port_printk(ap, KERN_ERR, "port failed to respond " |
2132 | "(%lu secs)\n", tmout / HZ); | |
1da177e4 LT |
2133 | return 1; |
2134 | } | |
2135 | ||
2136 | return 0; | |
2137 | } | |
2138 | ||
2139 | static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask) | |
2140 | { | |
2141 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
2142 | unsigned int dev0 = devmask & (1 << 0); | |
2143 | unsigned int dev1 = devmask & (1 << 1); | |
2144 | unsigned long timeout; | |
2145 | ||
2146 | /* if device 0 was found in ata_devchk, wait for its | |
2147 | * BSY bit to clear | |
2148 | */ | |
2149 | if (dev0) | |
2150 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
2151 | ||
2152 | /* if device 1 was found in ata_devchk, wait for | |
2153 | * register access, then wait for BSY to clear | |
2154 | */ | |
2155 | timeout = jiffies + ATA_TMOUT_BOOT; | |
2156 | while (dev1) { | |
2157 | u8 nsect, lbal; | |
2158 | ||
2159 | ap->ops->dev_select(ap, 1); | |
2160 | if (ap->flags & ATA_FLAG_MMIO) { | |
2161 | nsect = readb((void __iomem *) ioaddr->nsect_addr); | |
2162 | lbal = readb((void __iomem *) ioaddr->lbal_addr); | |
2163 | } else { | |
2164 | nsect = inb(ioaddr->nsect_addr); | |
2165 | lbal = inb(ioaddr->lbal_addr); | |
2166 | } | |
2167 | if ((nsect == 1) && (lbal == 1)) | |
2168 | break; | |
2169 | if (time_after(jiffies, timeout)) { | |
2170 | dev1 = 0; | |
2171 | break; | |
2172 | } | |
2173 | msleep(50); /* give drive a breather */ | |
2174 | } | |
2175 | if (dev1) | |
2176 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
2177 | ||
2178 | /* is all this really necessary? */ | |
2179 | ap->ops->dev_select(ap, 0); | |
2180 | if (dev1) | |
2181 | ap->ops->dev_select(ap, 1); | |
2182 | if (dev0) | |
2183 | ap->ops->dev_select(ap, 0); | |
2184 | } | |
2185 | ||
1da177e4 LT |
2186 | static unsigned int ata_bus_softreset(struct ata_port *ap, |
2187 | unsigned int devmask) | |
2188 | { | |
2189 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
2190 | ||
2191 | DPRINTK("ata%u: bus reset via SRST\n", ap->id); | |
2192 | ||
2193 | /* software reset. causes dev0 to be selected */ | |
2194 | if (ap->flags & ATA_FLAG_MMIO) { | |
2195 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
2196 | udelay(20); /* FIXME: flush */ | |
2197 | writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr); | |
2198 | udelay(20); /* FIXME: flush */ | |
2199 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
2200 | } else { | |
2201 | outb(ap->ctl, ioaddr->ctl_addr); | |
2202 | udelay(10); | |
2203 | outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr); | |
2204 | udelay(10); | |
2205 | outb(ap->ctl, ioaddr->ctl_addr); | |
2206 | } | |
2207 | ||
2208 | /* spec mandates ">= 2ms" before checking status. | |
2209 | * We wait 150ms, because that was the magic delay used for | |
2210 | * ATAPI devices in Hale Landis's ATADRVR, for the period of time | |
2211 | * between when the ATA command register is written, and then | |
2212 | * status is checked. Because waiting for "a while" before | |
2213 | * checking status is fine, post SRST, we perform this magic | |
2214 | * delay here as well. | |
09c7ad79 AC |
2215 | * |
2216 | * Old drivers/ide uses the 2mS rule and then waits for ready | |
1da177e4 LT |
2217 | */ |
2218 | msleep(150); | |
2219 | ||
2e9edbf8 | 2220 | /* Before we perform post reset processing we want to see if |
298a41ca TH |
2221 | * the bus shows 0xFF because the odd clown forgets the D7 |
2222 | * pulldown resistor. | |
2223 | */ | |
987d2f05 | 2224 | if (ata_check_status(ap) == 0xFF) { |
f15a1daf | 2225 | ata_port_printk(ap, KERN_ERR, "SRST failed (status 0xFF)\n"); |
298a41ca | 2226 | return AC_ERR_OTHER; |
987d2f05 | 2227 | } |
09c7ad79 | 2228 | |
1da177e4 LT |
2229 | ata_bus_post_reset(ap, devmask); |
2230 | ||
2231 | return 0; | |
2232 | } | |
2233 | ||
2234 | /** | |
2235 | * ata_bus_reset - reset host port and associated ATA channel | |
2236 | * @ap: port to reset | |
2237 | * | |
2238 | * This is typically the first time we actually start issuing | |
2239 | * commands to the ATA channel. We wait for BSY to clear, then | |
2240 | * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its | |
2241 | * result. Determine what devices, if any, are on the channel | |
2242 | * by looking at the device 0/1 error register. Look at the signature | |
2243 | * stored in each device's taskfile registers, to determine if | |
2244 | * the device is ATA or ATAPI. | |
2245 | * | |
2246 | * LOCKING: | |
0cba632b JG |
2247 | * PCI/etc. bus probe sem. |
2248 | * Obtains host_set lock. | |
1da177e4 LT |
2249 | * |
2250 | * SIDE EFFECTS: | |
198e0fed | 2251 | * Sets ATA_FLAG_DISABLED if bus reset fails. |
1da177e4 LT |
2252 | */ |
2253 | ||
2254 | void ata_bus_reset(struct ata_port *ap) | |
2255 | { | |
2256 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
2257 | unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; | |
2258 | u8 err; | |
aec5c3c1 | 2259 | unsigned int dev0, dev1 = 0, devmask = 0; |
1da177e4 LT |
2260 | |
2261 | DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no); | |
2262 | ||
2263 | /* determine if device 0/1 are present */ | |
2264 | if (ap->flags & ATA_FLAG_SATA_RESET) | |
2265 | dev0 = 1; | |
2266 | else { | |
2267 | dev0 = ata_devchk(ap, 0); | |
2268 | if (slave_possible) | |
2269 | dev1 = ata_devchk(ap, 1); | |
2270 | } | |
2271 | ||
2272 | if (dev0) | |
2273 | devmask |= (1 << 0); | |
2274 | if (dev1) | |
2275 | devmask |= (1 << 1); | |
2276 | ||
2277 | /* select device 0 again */ | |
2278 | ap->ops->dev_select(ap, 0); | |
2279 | ||
2280 | /* issue bus reset */ | |
2281 | if (ap->flags & ATA_FLAG_SRST) | |
aec5c3c1 TH |
2282 | if (ata_bus_softreset(ap, devmask)) |
2283 | goto err_out; | |
1da177e4 LT |
2284 | |
2285 | /* | |
2286 | * determine by signature whether we have ATA or ATAPI devices | |
2287 | */ | |
b4dc7623 | 2288 | ap->device[0].class = ata_dev_try_classify(ap, 0, &err); |
1da177e4 | 2289 | if ((slave_possible) && (err != 0x81)) |
b4dc7623 | 2290 | ap->device[1].class = ata_dev_try_classify(ap, 1, &err); |
1da177e4 LT |
2291 | |
2292 | /* re-enable interrupts */ | |
2293 | if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */ | |
2294 | ata_irq_on(ap); | |
2295 | ||
2296 | /* is double-select really necessary? */ | |
2297 | if (ap->device[1].class != ATA_DEV_NONE) | |
2298 | ap->ops->dev_select(ap, 1); | |
2299 | if (ap->device[0].class != ATA_DEV_NONE) | |
2300 | ap->ops->dev_select(ap, 0); | |
2301 | ||
2302 | /* if no devices were detected, disable this port */ | |
2303 | if ((ap->device[0].class == ATA_DEV_NONE) && | |
2304 | (ap->device[1].class == ATA_DEV_NONE)) | |
2305 | goto err_out; | |
2306 | ||
2307 | if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) { | |
2308 | /* set up device control for ATA_FLAG_SATA_RESET */ | |
2309 | if (ap->flags & ATA_FLAG_MMIO) | |
2310 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
2311 | else | |
2312 | outb(ap->ctl, ioaddr->ctl_addr); | |
2313 | } | |
2314 | ||
2315 | DPRINTK("EXIT\n"); | |
2316 | return; | |
2317 | ||
2318 | err_out: | |
f15a1daf | 2319 | ata_port_printk(ap, KERN_ERR, "disabling port\n"); |
1da177e4 LT |
2320 | ap->ops->port_disable(ap); |
2321 | ||
2322 | DPRINTK("EXIT\n"); | |
2323 | } | |
2324 | ||
7a7921e8 TH |
2325 | static int sata_phy_resume(struct ata_port *ap) |
2326 | { | |
2327 | unsigned long timeout = jiffies + (HZ * 5); | |
852ee16a | 2328 | u32 scontrol, sstatus; |
81952c54 TH |
2329 | int rc; |
2330 | ||
2331 | if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol))) | |
2332 | return rc; | |
7a7921e8 | 2333 | |
852ee16a | 2334 | scontrol = (scontrol & 0x0f0) | 0x300; |
81952c54 TH |
2335 | |
2336 | if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol))) | |
2337 | return rc; | |
7a7921e8 TH |
2338 | |
2339 | /* Wait for phy to become ready, if necessary. */ | |
2340 | do { | |
2341 | msleep(200); | |
81952c54 TH |
2342 | if ((rc = sata_scr_read(ap, SCR_STATUS, &sstatus))) |
2343 | return rc; | |
7a7921e8 TH |
2344 | if ((sstatus & 0xf) != 1) |
2345 | return 0; | |
2346 | } while (time_before(jiffies, timeout)); | |
2347 | ||
81952c54 | 2348 | return -EBUSY; |
7a7921e8 TH |
2349 | } |
2350 | ||
8a19ac89 TH |
2351 | /** |
2352 | * ata_std_probeinit - initialize probing | |
2353 | * @ap: port to be probed | |
2354 | * | |
2355 | * @ap is about to be probed. Initialize it. This function is | |
2356 | * to be used as standard callback for ata_drive_probe_reset(). | |
3a39746a TH |
2357 | * |
2358 | * NOTE!!! Do not use this function as probeinit if a low level | |
2359 | * driver implements only hardreset. Just pass NULL as probeinit | |
2360 | * in that case. Using this function is probably okay but doing | |
2361 | * so makes reset sequence different from the original | |
2362 | * ->phy_reset implementation and Jeff nervous. :-P | |
8a19ac89 | 2363 | */ |
17efc5f7 | 2364 | void ata_std_probeinit(struct ata_port *ap) |
8a19ac89 | 2365 | { |
81952c54 | 2366 | u32 scontrol; |
1c3fae4d | 2367 | |
81952c54 TH |
2368 | /* resume link */ |
2369 | sata_phy_resume(ap); | |
1c3fae4d | 2370 | |
81952c54 TH |
2371 | /* init sata_spd_limit to the current value */ |
2372 | if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) { | |
2373 | int spd = (scontrol >> 4) & 0xf; | |
2374 | ap->sata_spd_limit &= (1 << spd) - 1; | |
3a39746a | 2375 | } |
81952c54 TH |
2376 | |
2377 | /* wait for device */ | |
2378 | if (ata_port_online(ap)) | |
2379 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
8a19ac89 TH |
2380 | } |
2381 | ||
c2bd5804 TH |
2382 | /** |
2383 | * ata_std_softreset - reset host port via ATA SRST | |
2384 | * @ap: port to reset | |
c2bd5804 TH |
2385 | * @classes: resulting classes of attached devices |
2386 | * | |
2387 | * Reset host port using ATA SRST. This function is to be used | |
2388 | * as standard callback for ata_drive_*_reset() functions. | |
2389 | * | |
2390 | * LOCKING: | |
2391 | * Kernel thread context (may sleep) | |
2392 | * | |
2393 | * RETURNS: | |
2394 | * 0 on success, -errno otherwise. | |
2395 | */ | |
2bf2cb26 | 2396 | int ata_std_softreset(struct ata_port *ap, unsigned int *classes) |
c2bd5804 TH |
2397 | { |
2398 | unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; | |
2399 | unsigned int devmask = 0, err_mask; | |
2400 | u8 err; | |
2401 | ||
2402 | DPRINTK("ENTER\n"); | |
2403 | ||
81952c54 | 2404 | if (ata_port_offline(ap)) { |
3a39746a TH |
2405 | classes[0] = ATA_DEV_NONE; |
2406 | goto out; | |
2407 | } | |
2408 | ||
c2bd5804 TH |
2409 | /* determine if device 0/1 are present */ |
2410 | if (ata_devchk(ap, 0)) | |
2411 | devmask |= (1 << 0); | |
2412 | if (slave_possible && ata_devchk(ap, 1)) | |
2413 | devmask |= (1 << 1); | |
2414 | ||
c2bd5804 TH |
2415 | /* select device 0 again */ |
2416 | ap->ops->dev_select(ap, 0); | |
2417 | ||
2418 | /* issue bus reset */ | |
2419 | DPRINTK("about to softreset, devmask=%x\n", devmask); | |
2420 | err_mask = ata_bus_softreset(ap, devmask); | |
2421 | if (err_mask) { | |
f15a1daf TH |
2422 | ata_port_printk(ap, KERN_ERR, "SRST failed (err_mask=0x%x)\n", |
2423 | err_mask); | |
c2bd5804 TH |
2424 | return -EIO; |
2425 | } | |
2426 | ||
2427 | /* determine by signature whether we have ATA or ATAPI devices */ | |
2428 | classes[0] = ata_dev_try_classify(ap, 0, &err); | |
2429 | if (slave_possible && err != 0x81) | |
2430 | classes[1] = ata_dev_try_classify(ap, 1, &err); | |
2431 | ||
3a39746a | 2432 | out: |
c2bd5804 TH |
2433 | DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]); |
2434 | return 0; | |
2435 | } | |
2436 | ||
2437 | /** | |
2438 | * sata_std_hardreset - reset host port via SATA phy reset | |
2439 | * @ap: port to reset | |
c2bd5804 TH |
2440 | * @class: resulting class of attached device |
2441 | * | |
2442 | * SATA phy-reset host port using DET bits of SControl register. | |
2443 | * This function is to be used as standard callback for | |
2444 | * ata_drive_*_reset(). | |
2445 | * | |
2446 | * LOCKING: | |
2447 | * Kernel thread context (may sleep) | |
2448 | * | |
2449 | * RETURNS: | |
2450 | * 0 on success, -errno otherwise. | |
2451 | */ | |
2bf2cb26 | 2452 | int sata_std_hardreset(struct ata_port *ap, unsigned int *class) |
c2bd5804 | 2453 | { |
852ee16a | 2454 | u32 scontrol; |
81952c54 | 2455 | int rc; |
852ee16a | 2456 | |
c2bd5804 TH |
2457 | DPRINTK("ENTER\n"); |
2458 | ||
3c567b7d | 2459 | if (sata_set_spd_needed(ap)) { |
1c3fae4d TH |
2460 | /* SATA spec says nothing about how to reconfigure |
2461 | * spd. To be on the safe side, turn off phy during | |
2462 | * reconfiguration. This works for at least ICH7 AHCI | |
2463 | * and Sil3124. | |
2464 | */ | |
81952c54 TH |
2465 | if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol))) |
2466 | return rc; | |
2467 | ||
1c3fae4d | 2468 | scontrol = (scontrol & 0x0f0) | 0x302; |
81952c54 TH |
2469 | |
2470 | if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol))) | |
2471 | return rc; | |
1c3fae4d | 2472 | |
3c567b7d | 2473 | sata_set_spd(ap); |
1c3fae4d TH |
2474 | } |
2475 | ||
2476 | /* issue phy wake/reset */ | |
81952c54 TH |
2477 | if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol))) |
2478 | return rc; | |
2479 | ||
852ee16a | 2480 | scontrol = (scontrol & 0x0f0) | 0x301; |
81952c54 TH |
2481 | |
2482 | if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol))) | |
2483 | return rc; | |
c2bd5804 | 2484 | |
1c3fae4d | 2485 | /* Couldn't find anything in SATA I/II specs, but AHCI-1.1 |
c2bd5804 TH |
2486 | * 10.4.2 says at least 1 ms. |
2487 | */ | |
2488 | msleep(1); | |
2489 | ||
1c3fae4d | 2490 | /* bring phy back */ |
7a7921e8 | 2491 | sata_phy_resume(ap); |
c2bd5804 | 2492 | |
c2bd5804 | 2493 | /* TODO: phy layer with polling, timeouts, etc. */ |
81952c54 | 2494 | if (ata_port_offline(ap)) { |
c2bd5804 TH |
2495 | *class = ATA_DEV_NONE; |
2496 | DPRINTK("EXIT, link offline\n"); | |
2497 | return 0; | |
2498 | } | |
2499 | ||
2500 | if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) { | |
f15a1daf TH |
2501 | ata_port_printk(ap, KERN_ERR, |
2502 | "COMRESET failed (device not ready)\n"); | |
c2bd5804 TH |
2503 | return -EIO; |
2504 | } | |
2505 | ||
3a39746a TH |
2506 | ap->ops->dev_select(ap, 0); /* probably unnecessary */ |
2507 | ||
c2bd5804 TH |
2508 | *class = ata_dev_try_classify(ap, 0, NULL); |
2509 | ||
2510 | DPRINTK("EXIT, class=%u\n", *class); | |
2511 | return 0; | |
2512 | } | |
2513 | ||
2514 | /** | |
2515 | * ata_std_postreset - standard postreset callback | |
2516 | * @ap: the target ata_port | |
2517 | * @classes: classes of attached devices | |
2518 | * | |
2519 | * This function is invoked after a successful reset. Note that | |
2520 | * the device might have been reset more than once using | |
2521 | * different reset methods before postreset is invoked. | |
c2bd5804 TH |
2522 | * |
2523 | * This function is to be used as standard callback for | |
2524 | * ata_drive_*_reset(). | |
2525 | * | |
2526 | * LOCKING: | |
2527 | * Kernel thread context (may sleep) | |
2528 | */ | |
2529 | void ata_std_postreset(struct ata_port *ap, unsigned int *classes) | |
2530 | { | |
dc2b3515 TH |
2531 | u32 serror; |
2532 | ||
c2bd5804 TH |
2533 | DPRINTK("ENTER\n"); |
2534 | ||
c2bd5804 | 2535 | /* print link status */ |
81952c54 | 2536 | sata_print_link_status(ap); |
c2bd5804 | 2537 | |
dc2b3515 TH |
2538 | /* clear SError */ |
2539 | if (sata_scr_read(ap, SCR_ERROR, &serror) == 0) | |
2540 | sata_scr_write(ap, SCR_ERROR, serror); | |
2541 | ||
3a39746a TH |
2542 | /* re-enable interrupts */ |
2543 | if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */ | |
2544 | ata_irq_on(ap); | |
c2bd5804 TH |
2545 | |
2546 | /* is double-select really necessary? */ | |
2547 | if (classes[0] != ATA_DEV_NONE) | |
2548 | ap->ops->dev_select(ap, 1); | |
2549 | if (classes[1] != ATA_DEV_NONE) | |
2550 | ap->ops->dev_select(ap, 0); | |
2551 | ||
3a39746a TH |
2552 | /* bail out if no device is present */ |
2553 | if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) { | |
2554 | DPRINTK("EXIT, no device\n"); | |
2555 | return; | |
2556 | } | |
2557 | ||
2558 | /* set up device control */ | |
2559 | if (ap->ioaddr.ctl_addr) { | |
2560 | if (ap->flags & ATA_FLAG_MMIO) | |
2561 | writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr); | |
2562 | else | |
2563 | outb(ap->ctl, ap->ioaddr.ctl_addr); | |
2564 | } | |
c2bd5804 TH |
2565 | |
2566 | DPRINTK("EXIT\n"); | |
2567 | } | |
2568 | ||
2569 | /** | |
2570 | * ata_std_probe_reset - standard probe reset method | |
2571 | * @ap: prot to perform probe-reset | |
2572 | * @classes: resulting classes of attached devices | |
2573 | * | |
2574 | * The stock off-the-shelf ->probe_reset method. | |
2575 | * | |
2576 | * LOCKING: | |
2577 | * Kernel thread context (may sleep) | |
2578 | * | |
2579 | * RETURNS: | |
2580 | * 0 on success, -errno otherwise. | |
2581 | */ | |
2582 | int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes) | |
2583 | { | |
2584 | ata_reset_fn_t hardreset; | |
2585 | ||
2586 | hardreset = NULL; | |
81952c54 | 2587 | if (sata_scr_valid(ap)) |
c2bd5804 TH |
2588 | hardreset = sata_std_hardreset; |
2589 | ||
8a19ac89 | 2590 | return ata_drive_probe_reset(ap, ata_std_probeinit, |
7944ea95 | 2591 | ata_std_softreset, hardreset, |
c2bd5804 TH |
2592 | ata_std_postreset, classes); |
2593 | } | |
2594 | ||
2bf2cb26 | 2595 | int ata_do_reset(struct ata_port *ap, ata_reset_fn_t reset, |
96bd39ec | 2596 | unsigned int *classes) |
a62c0fc5 TH |
2597 | { |
2598 | int i, rc; | |
2599 | ||
2600 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
2601 | classes[i] = ATA_DEV_UNKNOWN; | |
2602 | ||
2bf2cb26 | 2603 | rc = reset(ap, classes); |
a62c0fc5 TH |
2604 | if (rc) |
2605 | return rc; | |
2606 | ||
2607 | /* If any class isn't ATA_DEV_UNKNOWN, consider classification | |
2608 | * is complete and convert all ATA_DEV_UNKNOWN to | |
2609 | * ATA_DEV_NONE. | |
2610 | */ | |
2611 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
2612 | if (classes[i] != ATA_DEV_UNKNOWN) | |
2613 | break; | |
2614 | ||
2615 | if (i < ATA_MAX_DEVICES) | |
2616 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
2617 | if (classes[i] == ATA_DEV_UNKNOWN) | |
2618 | classes[i] = ATA_DEV_NONE; | |
2619 | ||
9974e7cc | 2620 | return 0; |
a62c0fc5 TH |
2621 | } |
2622 | ||
2623 | /** | |
2624 | * ata_drive_probe_reset - Perform probe reset with given methods | |
2625 | * @ap: port to reset | |
7944ea95 | 2626 | * @probeinit: probeinit method (can be NULL) |
a62c0fc5 TH |
2627 | * @softreset: softreset method (can be NULL) |
2628 | * @hardreset: hardreset method (can be NULL) | |
2629 | * @postreset: postreset method (can be NULL) | |
2630 | * @classes: resulting classes of attached devices | |
2631 | * | |
2632 | * Reset the specified port and classify attached devices using | |
2633 | * given methods. This function prefers softreset but tries all | |
2634 | * possible reset sequences to reset and classify devices. This | |
2635 | * function is intended to be used for constructing ->probe_reset | |
2636 | * callback by low level drivers. | |
2637 | * | |
2638 | * Reset methods should follow the following rules. | |
2639 | * | |
2640 | * - Return 0 on sucess, -errno on failure. | |
2641 | * - If classification is supported, fill classes[] with | |
2642 | * recognized class codes. | |
2643 | * - If classification is not supported, leave classes[] alone. | |
a62c0fc5 TH |
2644 | * |
2645 | * LOCKING: | |
2646 | * Kernel thread context (may sleep) | |
2647 | * | |
2648 | * RETURNS: | |
2649 | * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV | |
2650 | * if classification fails, and any error code from reset | |
2651 | * methods. | |
2652 | */ | |
7944ea95 | 2653 | int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit, |
a62c0fc5 TH |
2654 | ata_reset_fn_t softreset, ata_reset_fn_t hardreset, |
2655 | ata_postreset_fn_t postreset, unsigned int *classes) | |
2656 | { | |
2657 | int rc = -EINVAL; | |
2658 | ||
7944ea95 TH |
2659 | if (probeinit) |
2660 | probeinit(ap); | |
2661 | ||
3c567b7d | 2662 | if (softreset && !sata_set_spd_needed(ap)) { |
96bd39ec | 2663 | rc = ata_do_reset(ap, softreset, classes); |
9974e7cc TH |
2664 | if (rc == 0 && classes[0] != ATA_DEV_UNKNOWN) |
2665 | goto done; | |
f15a1daf TH |
2666 | ata_port_printk(ap, KERN_INFO, "softreset failed, " |
2667 | "will try hardreset in 5 secs\n"); | |
edbabd86 | 2668 | ssleep(5); |
a62c0fc5 TH |
2669 | } |
2670 | ||
2671 | if (!hardreset) | |
9974e7cc | 2672 | goto done; |
a62c0fc5 | 2673 | |
90dac02c | 2674 | while (1) { |
96bd39ec | 2675 | rc = ata_do_reset(ap, hardreset, classes); |
90dac02c TH |
2676 | if (rc == 0) { |
2677 | if (classes[0] != ATA_DEV_UNKNOWN) | |
2678 | goto done; | |
2679 | break; | |
2680 | } | |
2681 | ||
3c567b7d | 2682 | if (sata_down_spd_limit(ap)) |
90dac02c | 2683 | goto done; |
edbabd86 | 2684 | |
f15a1daf TH |
2685 | ata_port_printk(ap, KERN_INFO, "hardreset failed, " |
2686 | "will retry in 5 secs\n"); | |
edbabd86 | 2687 | ssleep(5); |
90dac02c | 2688 | } |
a62c0fc5 | 2689 | |
edbabd86 | 2690 | if (softreset) { |
f15a1daf TH |
2691 | ata_port_printk(ap, KERN_INFO, |
2692 | "hardreset succeeded without classification, " | |
2693 | "will retry softreset in 5 secs\n"); | |
edbabd86 TH |
2694 | ssleep(5); |
2695 | ||
96bd39ec | 2696 | rc = ata_do_reset(ap, softreset, classes); |
edbabd86 | 2697 | } |
a62c0fc5 | 2698 | |
9974e7cc | 2699 | done: |
96bd39ec TH |
2700 | if (rc == 0) { |
2701 | if (postreset) | |
2702 | postreset(ap, classes); | |
2703 | if (classes[0] == ATA_DEV_UNKNOWN) | |
2704 | rc = -ENODEV; | |
2705 | } | |
a62c0fc5 TH |
2706 | return rc; |
2707 | } | |
2708 | ||
623a3128 TH |
2709 | /** |
2710 | * ata_dev_same_device - Determine whether new ID matches configured device | |
623a3128 TH |
2711 | * @dev: device to compare against |
2712 | * @new_class: class of the new device | |
2713 | * @new_id: IDENTIFY page of the new device | |
2714 | * | |
2715 | * Compare @new_class and @new_id against @dev and determine | |
2716 | * whether @dev is the device indicated by @new_class and | |
2717 | * @new_id. | |
2718 | * | |
2719 | * LOCKING: | |
2720 | * None. | |
2721 | * | |
2722 | * RETURNS: | |
2723 | * 1 if @dev matches @new_class and @new_id, 0 otherwise. | |
2724 | */ | |
3373efd8 TH |
2725 | static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class, |
2726 | const u16 *new_id) | |
623a3128 TH |
2727 | { |
2728 | const u16 *old_id = dev->id; | |
2729 | unsigned char model[2][41], serial[2][21]; | |
2730 | u64 new_n_sectors; | |
2731 | ||
2732 | if (dev->class != new_class) { | |
f15a1daf TH |
2733 | ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n", |
2734 | dev->class, new_class); | |
623a3128 TH |
2735 | return 0; |
2736 | } | |
2737 | ||
2738 | ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0])); | |
2739 | ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1])); | |
2740 | ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0])); | |
2741 | ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1])); | |
2742 | new_n_sectors = ata_id_n_sectors(new_id); | |
2743 | ||
2744 | if (strcmp(model[0], model[1])) { | |
f15a1daf TH |
2745 | ata_dev_printk(dev, KERN_INFO, "model number mismatch " |
2746 | "'%s' != '%s'\n", model[0], model[1]); | |
623a3128 TH |
2747 | return 0; |
2748 | } | |
2749 | ||
2750 | if (strcmp(serial[0], serial[1])) { | |
f15a1daf TH |
2751 | ata_dev_printk(dev, KERN_INFO, "serial number mismatch " |
2752 | "'%s' != '%s'\n", serial[0], serial[1]); | |
623a3128 TH |
2753 | return 0; |
2754 | } | |
2755 | ||
2756 | if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) { | |
f15a1daf TH |
2757 | ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch " |
2758 | "%llu != %llu\n", | |
2759 | (unsigned long long)dev->n_sectors, | |
2760 | (unsigned long long)new_n_sectors); | |
623a3128 TH |
2761 | return 0; |
2762 | } | |
2763 | ||
2764 | return 1; | |
2765 | } | |
2766 | ||
2767 | /** | |
2768 | * ata_dev_revalidate - Revalidate ATA device | |
623a3128 TH |
2769 | * @dev: device to revalidate |
2770 | * @post_reset: is this revalidation after reset? | |
2771 | * | |
2772 | * Re-read IDENTIFY page and make sure @dev is still attached to | |
2773 | * the port. | |
2774 | * | |
2775 | * LOCKING: | |
2776 | * Kernel thread context (may sleep) | |
2777 | * | |
2778 | * RETURNS: | |
2779 | * 0 on success, negative errno otherwise | |
2780 | */ | |
3373efd8 | 2781 | int ata_dev_revalidate(struct ata_device *dev, int post_reset) |
623a3128 | 2782 | { |
5eb45c02 | 2783 | unsigned int class = dev->class; |
f15a1daf | 2784 | u16 *id = (void *)dev->ap->sector_buf; |
623a3128 TH |
2785 | int rc; |
2786 | ||
5eb45c02 TH |
2787 | if (!ata_dev_enabled(dev)) { |
2788 | rc = -ENODEV; | |
2789 | goto fail; | |
2790 | } | |
623a3128 | 2791 | |
fe635c7e | 2792 | /* read ID data */ |
3373efd8 | 2793 | rc = ata_dev_read_id(dev, &class, post_reset, id); |
623a3128 TH |
2794 | if (rc) |
2795 | goto fail; | |
2796 | ||
2797 | /* is the device still there? */ | |
3373efd8 | 2798 | if (!ata_dev_same_device(dev, class, id)) { |
623a3128 TH |
2799 | rc = -ENODEV; |
2800 | goto fail; | |
2801 | } | |
2802 | ||
fe635c7e | 2803 | memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS); |
623a3128 TH |
2804 | |
2805 | /* configure device according to the new ID */ | |
3373efd8 | 2806 | rc = ata_dev_configure(dev, 0); |
5eb45c02 TH |
2807 | if (rc == 0) |
2808 | return 0; | |
623a3128 TH |
2809 | |
2810 | fail: | |
f15a1daf | 2811 | ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc); |
623a3128 TH |
2812 | return rc; |
2813 | } | |
2814 | ||
98ac62de | 2815 | static const char * const ata_dma_blacklist [] = { |
f4b15fef AC |
2816 | "WDC AC11000H", NULL, |
2817 | "WDC AC22100H", NULL, | |
2818 | "WDC AC32500H", NULL, | |
2819 | "WDC AC33100H", NULL, | |
2820 | "WDC AC31600H", NULL, | |
2821 | "WDC AC32100H", "24.09P07", | |
2822 | "WDC AC23200L", "21.10N21", | |
2823 | "Compaq CRD-8241B", NULL, | |
2824 | "CRD-8400B", NULL, | |
2825 | "CRD-8480B", NULL, | |
2826 | "CRD-8482B", NULL, | |
2827 | "CRD-84", NULL, | |
2828 | "SanDisk SDP3B", NULL, | |
2829 | "SanDisk SDP3B-64", NULL, | |
2830 | "SANYO CD-ROM CRD", NULL, | |
2831 | "HITACHI CDR-8", NULL, | |
2e9edbf8 | 2832 | "HITACHI CDR-8335", NULL, |
f4b15fef | 2833 | "HITACHI CDR-8435", NULL, |
2e9edbf8 JG |
2834 | "Toshiba CD-ROM XM-6202B", NULL, |
2835 | "TOSHIBA CD-ROM XM-1702BC", NULL, | |
2836 | "CD-532E-A", NULL, | |
2837 | "E-IDE CD-ROM CR-840", NULL, | |
2838 | "CD-ROM Drive/F5A", NULL, | |
2839 | "WPI CDD-820", NULL, | |
f4b15fef | 2840 | "SAMSUNG CD-ROM SC-148C", NULL, |
2e9edbf8 | 2841 | "SAMSUNG CD-ROM SC", NULL, |
f4b15fef AC |
2842 | "SanDisk SDP3B-64", NULL, |
2843 | "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL, | |
2844 | "_NEC DV5800A", NULL, | |
2845 | "SAMSUNG CD-ROM SN-124", "N001" | |
1da177e4 | 2846 | }; |
2e9edbf8 | 2847 | |
f4b15fef AC |
2848 | static int ata_strim(char *s, size_t len) |
2849 | { | |
2850 | len = strnlen(s, len); | |
2851 | ||
2852 | /* ATAPI specifies that empty space is blank-filled; remove blanks */ | |
2853 | while ((len > 0) && (s[len - 1] == ' ')) { | |
2854 | len--; | |
2855 | s[len] = 0; | |
2856 | } | |
2857 | return len; | |
2858 | } | |
1da177e4 | 2859 | |
057ace5e | 2860 | static int ata_dma_blacklisted(const struct ata_device *dev) |
1da177e4 | 2861 | { |
f4b15fef AC |
2862 | unsigned char model_num[40]; |
2863 | unsigned char model_rev[16]; | |
2864 | unsigned int nlen, rlen; | |
1da177e4 LT |
2865 | int i; |
2866 | ||
f4b15fef AC |
2867 | ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS, |
2868 | sizeof(model_num)); | |
2869 | ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS, | |
2870 | sizeof(model_rev)); | |
2871 | nlen = ata_strim(model_num, sizeof(model_num)); | |
2872 | rlen = ata_strim(model_rev, sizeof(model_rev)); | |
1da177e4 | 2873 | |
f4b15fef AC |
2874 | for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i += 2) { |
2875 | if (!strncmp(ata_dma_blacklist[i], model_num, nlen)) { | |
2876 | if (ata_dma_blacklist[i+1] == NULL) | |
2877 | return 1; | |
2878 | if (!strncmp(ata_dma_blacklist[i], model_rev, rlen)) | |
2879 | return 1; | |
2880 | } | |
2881 | } | |
1da177e4 LT |
2882 | return 0; |
2883 | } | |
2884 | ||
a6d5a51c TH |
2885 | /** |
2886 | * ata_dev_xfermask - Compute supported xfermask of the given device | |
a6d5a51c TH |
2887 | * @dev: Device to compute xfermask for |
2888 | * | |
acf356b1 TH |
2889 | * Compute supported xfermask of @dev and store it in |
2890 | * dev->*_mask. This function is responsible for applying all | |
2891 | * known limits including host controller limits, device | |
2892 | * blacklist, etc... | |
a6d5a51c | 2893 | * |
600511e8 TH |
2894 | * FIXME: The current implementation limits all transfer modes to |
2895 | * the fastest of the lowested device on the port. This is not | |
05c8e0ac | 2896 | * required on most controllers. |
600511e8 | 2897 | * |
a6d5a51c TH |
2898 | * LOCKING: |
2899 | * None. | |
a6d5a51c | 2900 | */ |
3373efd8 | 2901 | static void ata_dev_xfermask(struct ata_device *dev) |
1da177e4 | 2902 | { |
3373efd8 | 2903 | struct ata_port *ap = dev->ap; |
5444a6f4 | 2904 | struct ata_host_set *hs = ap->host_set; |
a6d5a51c TH |
2905 | unsigned long xfer_mask; |
2906 | int i; | |
1da177e4 | 2907 | |
565083e1 TH |
2908 | xfer_mask = ata_pack_xfermask(ap->pio_mask, |
2909 | ap->mwdma_mask, ap->udma_mask); | |
2910 | ||
2911 | /* Apply cable rule here. Don't apply it early because when | |
2912 | * we handle hot plug the cable type can itself change. | |
2913 | */ | |
2914 | if (ap->cbl == ATA_CBL_PATA40) | |
2915 | xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA); | |
1da177e4 | 2916 | |
5444a6f4 | 2917 | /* FIXME: Use port-wide xfermask for now */ |
a6d5a51c TH |
2918 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
2919 | struct ata_device *d = &ap->device[i]; | |
565083e1 TH |
2920 | |
2921 | if (ata_dev_absent(d)) | |
2922 | continue; | |
2923 | ||
2924 | if (ata_dev_disabled(d)) { | |
2925 | /* to avoid violating device selection timing */ | |
2926 | xfer_mask &= ata_pack_xfermask(d->pio_mask, | |
2927 | UINT_MAX, UINT_MAX); | |
a6d5a51c | 2928 | continue; |
565083e1 TH |
2929 | } |
2930 | ||
2931 | xfer_mask &= ata_pack_xfermask(d->pio_mask, | |
2932 | d->mwdma_mask, d->udma_mask); | |
a6d5a51c TH |
2933 | xfer_mask &= ata_id_xfermask(d->id); |
2934 | if (ata_dma_blacklisted(d)) | |
2935 | xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); | |
1da177e4 LT |
2936 | } |
2937 | ||
a6d5a51c | 2938 | if (ata_dma_blacklisted(dev)) |
f15a1daf TH |
2939 | ata_dev_printk(dev, KERN_WARNING, |
2940 | "device is on DMA blacklist, disabling DMA\n"); | |
a6d5a51c | 2941 | |
5444a6f4 AC |
2942 | if (hs->flags & ATA_HOST_SIMPLEX) { |
2943 | if (hs->simplex_claimed) | |
2944 | xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); | |
2945 | } | |
565083e1 | 2946 | |
5444a6f4 AC |
2947 | if (ap->ops->mode_filter) |
2948 | xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask); | |
2949 | ||
565083e1 TH |
2950 | ata_unpack_xfermask(xfer_mask, &dev->pio_mask, |
2951 | &dev->mwdma_mask, &dev->udma_mask); | |
1da177e4 LT |
2952 | } |
2953 | ||
1da177e4 LT |
2954 | /** |
2955 | * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command | |
1da177e4 LT |
2956 | * @dev: Device to which command will be sent |
2957 | * | |
780a87f7 JG |
2958 | * Issue SET FEATURES - XFER MODE command to device @dev |
2959 | * on port @ap. | |
2960 | * | |
1da177e4 | 2961 | * LOCKING: |
0cba632b | 2962 | * PCI/etc. bus probe sem. |
83206a29 TH |
2963 | * |
2964 | * RETURNS: | |
2965 | * 0 on success, AC_ERR_* mask otherwise. | |
1da177e4 LT |
2966 | */ |
2967 | ||
3373efd8 | 2968 | static unsigned int ata_dev_set_xfermode(struct ata_device *dev) |
1da177e4 | 2969 | { |
a0123703 | 2970 | struct ata_taskfile tf; |
83206a29 | 2971 | unsigned int err_mask; |
1da177e4 LT |
2972 | |
2973 | /* set up set-features taskfile */ | |
2974 | DPRINTK("set features - xfer mode\n"); | |
2975 | ||
3373efd8 | 2976 | ata_tf_init(dev, &tf); |
a0123703 TH |
2977 | tf.command = ATA_CMD_SET_FEATURES; |
2978 | tf.feature = SETFEATURES_XFER; | |
2979 | tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
2980 | tf.protocol = ATA_PROT_NODATA; | |
2981 | tf.nsect = dev->xfer_mode; | |
1da177e4 | 2982 | |
3373efd8 | 2983 | err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0); |
1da177e4 | 2984 | |
83206a29 TH |
2985 | DPRINTK("EXIT, err_mask=%x\n", err_mask); |
2986 | return err_mask; | |
1da177e4 LT |
2987 | } |
2988 | ||
8bf62ece AL |
2989 | /** |
2990 | * ata_dev_init_params - Issue INIT DEV PARAMS command | |
8bf62ece | 2991 | * @dev: Device to which command will be sent |
3373efd8 TH |
2992 | * @heads: Number of heads |
2993 | * @sectors: Number of sectors | |
8bf62ece AL |
2994 | * |
2995 | * LOCKING: | |
6aff8f1f TH |
2996 | * Kernel thread context (may sleep) |
2997 | * | |
2998 | * RETURNS: | |
2999 | * 0 on success, AC_ERR_* mask otherwise. | |
8bf62ece | 3000 | */ |
3373efd8 TH |
3001 | static unsigned int ata_dev_init_params(struct ata_device *dev, |
3002 | u16 heads, u16 sectors) | |
8bf62ece | 3003 | { |
a0123703 | 3004 | struct ata_taskfile tf; |
6aff8f1f | 3005 | unsigned int err_mask; |
8bf62ece AL |
3006 | |
3007 | /* Number of sectors per track 1-255. Number of heads 1-16 */ | |
3008 | if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16) | |
00b6f5e9 | 3009 | return AC_ERR_INVALID; |
8bf62ece AL |
3010 | |
3011 | /* set up init dev params taskfile */ | |
3012 | DPRINTK("init dev params \n"); | |
3013 | ||
3373efd8 | 3014 | ata_tf_init(dev, &tf); |
a0123703 TH |
3015 | tf.command = ATA_CMD_INIT_DEV_PARAMS; |
3016 | tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
3017 | tf.protocol = ATA_PROT_NODATA; | |
3018 | tf.nsect = sectors; | |
3019 | tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */ | |
8bf62ece | 3020 | |
3373efd8 | 3021 | err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0); |
8bf62ece | 3022 | |
6aff8f1f TH |
3023 | DPRINTK("EXIT, err_mask=%x\n", err_mask); |
3024 | return err_mask; | |
8bf62ece AL |
3025 | } |
3026 | ||
1da177e4 | 3027 | /** |
0cba632b JG |
3028 | * ata_sg_clean - Unmap DMA memory associated with command |
3029 | * @qc: Command containing DMA memory to be released | |
3030 | * | |
3031 | * Unmap all mapped DMA memory associated with this command. | |
1da177e4 LT |
3032 | * |
3033 | * LOCKING: | |
0cba632b | 3034 | * spin_lock_irqsave(host_set lock) |
1da177e4 LT |
3035 | */ |
3036 | ||
3037 | static void ata_sg_clean(struct ata_queued_cmd *qc) | |
3038 | { | |
3039 | struct ata_port *ap = qc->ap; | |
cedc9a47 | 3040 | struct scatterlist *sg = qc->__sg; |
1da177e4 | 3041 | int dir = qc->dma_dir; |
cedc9a47 | 3042 | void *pad_buf = NULL; |
1da177e4 | 3043 | |
a4631474 TH |
3044 | WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP)); |
3045 | WARN_ON(sg == NULL); | |
1da177e4 LT |
3046 | |
3047 | if (qc->flags & ATA_QCFLAG_SINGLE) | |
f131883e | 3048 | WARN_ON(qc->n_elem > 1); |
1da177e4 | 3049 | |
2c13b7ce | 3050 | VPRINTK("unmapping %u sg elements\n", qc->n_elem); |
1da177e4 | 3051 | |
cedc9a47 JG |
3052 | /* if we padded the buffer out to 32-bit bound, and data |
3053 | * xfer direction is from-device, we must copy from the | |
3054 | * pad buffer back into the supplied buffer | |
3055 | */ | |
3056 | if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE)) | |
3057 | pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
3058 | ||
3059 | if (qc->flags & ATA_QCFLAG_SG) { | |
e1410f2d | 3060 | if (qc->n_elem) |
2f1f610b | 3061 | dma_unmap_sg(ap->dev, sg, qc->n_elem, dir); |
cedc9a47 JG |
3062 | /* restore last sg */ |
3063 | sg[qc->orig_n_elem - 1].length += qc->pad_len; | |
3064 | if (pad_buf) { | |
3065 | struct scatterlist *psg = &qc->pad_sgent; | |
3066 | void *addr = kmap_atomic(psg->page, KM_IRQ0); | |
3067 | memcpy(addr + psg->offset, pad_buf, qc->pad_len); | |
dfa15988 | 3068 | kunmap_atomic(addr, KM_IRQ0); |
cedc9a47 JG |
3069 | } |
3070 | } else { | |
2e242fa9 | 3071 | if (qc->n_elem) |
2f1f610b | 3072 | dma_unmap_single(ap->dev, |
e1410f2d JG |
3073 | sg_dma_address(&sg[0]), sg_dma_len(&sg[0]), |
3074 | dir); | |
cedc9a47 JG |
3075 | /* restore sg */ |
3076 | sg->length += qc->pad_len; | |
3077 | if (pad_buf) | |
3078 | memcpy(qc->buf_virt + sg->length - qc->pad_len, | |
3079 | pad_buf, qc->pad_len); | |
3080 | } | |
1da177e4 LT |
3081 | |
3082 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
cedc9a47 | 3083 | qc->__sg = NULL; |
1da177e4 LT |
3084 | } |
3085 | ||
3086 | /** | |
3087 | * ata_fill_sg - Fill PCI IDE PRD table | |
3088 | * @qc: Metadata associated with taskfile to be transferred | |
3089 | * | |
780a87f7 JG |
3090 | * Fill PCI IDE PRD (scatter-gather) table with segments |
3091 | * associated with the current disk command. | |
3092 | * | |
1da177e4 | 3093 | * LOCKING: |
780a87f7 | 3094 | * spin_lock_irqsave(host_set lock) |
1da177e4 LT |
3095 | * |
3096 | */ | |
3097 | static void ata_fill_sg(struct ata_queued_cmd *qc) | |
3098 | { | |
1da177e4 | 3099 | struct ata_port *ap = qc->ap; |
cedc9a47 JG |
3100 | struct scatterlist *sg; |
3101 | unsigned int idx; | |
1da177e4 | 3102 | |
a4631474 | 3103 | WARN_ON(qc->__sg == NULL); |
f131883e | 3104 | WARN_ON(qc->n_elem == 0 && qc->pad_len == 0); |
1da177e4 LT |
3105 | |
3106 | idx = 0; | |
cedc9a47 | 3107 | ata_for_each_sg(sg, qc) { |
1da177e4 LT |
3108 | u32 addr, offset; |
3109 | u32 sg_len, len; | |
3110 | ||
3111 | /* determine if physical DMA addr spans 64K boundary. | |
3112 | * Note h/w doesn't support 64-bit, so we unconditionally | |
3113 | * truncate dma_addr_t to u32. | |
3114 | */ | |
3115 | addr = (u32) sg_dma_address(sg); | |
3116 | sg_len = sg_dma_len(sg); | |
3117 | ||
3118 | while (sg_len) { | |
3119 | offset = addr & 0xffff; | |
3120 | len = sg_len; | |
3121 | if ((offset + sg_len) > 0x10000) | |
3122 | len = 0x10000 - offset; | |
3123 | ||
3124 | ap->prd[idx].addr = cpu_to_le32(addr); | |
3125 | ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff); | |
3126 | VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len); | |
3127 | ||
3128 | idx++; | |
3129 | sg_len -= len; | |
3130 | addr += len; | |
3131 | } | |
3132 | } | |
3133 | ||
3134 | if (idx) | |
3135 | ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT); | |
3136 | } | |
3137 | /** | |
3138 | * ata_check_atapi_dma - Check whether ATAPI DMA can be supported | |
3139 | * @qc: Metadata associated with taskfile to check | |
3140 | * | |
780a87f7 JG |
3141 | * Allow low-level driver to filter ATA PACKET commands, returning |
3142 | * a status indicating whether or not it is OK to use DMA for the | |
3143 | * supplied PACKET command. | |
3144 | * | |
1da177e4 | 3145 | * LOCKING: |
0cba632b JG |
3146 | * spin_lock_irqsave(host_set lock) |
3147 | * | |
1da177e4 LT |
3148 | * RETURNS: 0 when ATAPI DMA can be used |
3149 | * nonzero otherwise | |
3150 | */ | |
3151 | int ata_check_atapi_dma(struct ata_queued_cmd *qc) | |
3152 | { | |
3153 | struct ata_port *ap = qc->ap; | |
3154 | int rc = 0; /* Assume ATAPI DMA is OK by default */ | |
3155 | ||
3156 | if (ap->ops->check_atapi_dma) | |
3157 | rc = ap->ops->check_atapi_dma(qc); | |
3158 | ||
3159 | return rc; | |
3160 | } | |
3161 | /** | |
3162 | * ata_qc_prep - Prepare taskfile for submission | |
3163 | * @qc: Metadata associated with taskfile to be prepared | |
3164 | * | |
780a87f7 JG |
3165 | * Prepare ATA taskfile for submission. |
3166 | * | |
1da177e4 LT |
3167 | * LOCKING: |
3168 | * spin_lock_irqsave(host_set lock) | |
3169 | */ | |
3170 | void ata_qc_prep(struct ata_queued_cmd *qc) | |
3171 | { | |
3172 | if (!(qc->flags & ATA_QCFLAG_DMAMAP)) | |
3173 | return; | |
3174 | ||
3175 | ata_fill_sg(qc); | |
3176 | } | |
3177 | ||
e46834cd BK |
3178 | void ata_noop_qc_prep(struct ata_queued_cmd *qc) { } |
3179 | ||
0cba632b JG |
3180 | /** |
3181 | * ata_sg_init_one - Associate command with memory buffer | |
3182 | * @qc: Command to be associated | |
3183 | * @buf: Memory buffer | |
3184 | * @buflen: Length of memory buffer, in bytes. | |
3185 | * | |
3186 | * Initialize the data-related elements of queued_cmd @qc | |
3187 | * to point to a single memory buffer, @buf of byte length @buflen. | |
3188 | * | |
3189 | * LOCKING: | |
3190 | * spin_lock_irqsave(host_set lock) | |
3191 | */ | |
3192 | ||
1da177e4 LT |
3193 | void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen) |
3194 | { | |
3195 | struct scatterlist *sg; | |
3196 | ||
3197 | qc->flags |= ATA_QCFLAG_SINGLE; | |
3198 | ||
3199 | memset(&qc->sgent, 0, sizeof(qc->sgent)); | |
cedc9a47 | 3200 | qc->__sg = &qc->sgent; |
1da177e4 | 3201 | qc->n_elem = 1; |
cedc9a47 | 3202 | qc->orig_n_elem = 1; |
1da177e4 LT |
3203 | qc->buf_virt = buf; |
3204 | ||
cedc9a47 | 3205 | sg = qc->__sg; |
f0612bbc | 3206 | sg_init_one(sg, buf, buflen); |
1da177e4 LT |
3207 | } |
3208 | ||
0cba632b JG |
3209 | /** |
3210 | * ata_sg_init - Associate command with scatter-gather table. | |
3211 | * @qc: Command to be associated | |
3212 | * @sg: Scatter-gather table. | |
3213 | * @n_elem: Number of elements in s/g table. | |
3214 | * | |
3215 | * Initialize the data-related elements of queued_cmd @qc | |
3216 | * to point to a scatter-gather table @sg, containing @n_elem | |
3217 | * elements. | |
3218 | * | |
3219 | * LOCKING: | |
3220 | * spin_lock_irqsave(host_set lock) | |
3221 | */ | |
3222 | ||
1da177e4 LT |
3223 | void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg, |
3224 | unsigned int n_elem) | |
3225 | { | |
3226 | qc->flags |= ATA_QCFLAG_SG; | |
cedc9a47 | 3227 | qc->__sg = sg; |
1da177e4 | 3228 | qc->n_elem = n_elem; |
cedc9a47 | 3229 | qc->orig_n_elem = n_elem; |
1da177e4 LT |
3230 | } |
3231 | ||
3232 | /** | |
0cba632b JG |
3233 | * ata_sg_setup_one - DMA-map the memory buffer associated with a command. |
3234 | * @qc: Command with memory buffer to be mapped. | |
3235 | * | |
3236 | * DMA-map the memory buffer associated with queued_cmd @qc. | |
1da177e4 LT |
3237 | * |
3238 | * LOCKING: | |
3239 | * spin_lock_irqsave(host_set lock) | |
3240 | * | |
3241 | * RETURNS: | |
0cba632b | 3242 | * Zero on success, negative on error. |
1da177e4 LT |
3243 | */ |
3244 | ||
3245 | static int ata_sg_setup_one(struct ata_queued_cmd *qc) | |
3246 | { | |
3247 | struct ata_port *ap = qc->ap; | |
3248 | int dir = qc->dma_dir; | |
cedc9a47 | 3249 | struct scatterlist *sg = qc->__sg; |
1da177e4 | 3250 | dma_addr_t dma_address; |
2e242fa9 | 3251 | int trim_sg = 0; |
1da177e4 | 3252 | |
cedc9a47 JG |
3253 | /* we must lengthen transfers to end on a 32-bit boundary */ |
3254 | qc->pad_len = sg->length & 3; | |
3255 | if (qc->pad_len) { | |
3256 | void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
3257 | struct scatterlist *psg = &qc->pad_sgent; | |
3258 | ||
a4631474 | 3259 | WARN_ON(qc->dev->class != ATA_DEV_ATAPI); |
cedc9a47 JG |
3260 | |
3261 | memset(pad_buf, 0, ATA_DMA_PAD_SZ); | |
3262 | ||
3263 | if (qc->tf.flags & ATA_TFLAG_WRITE) | |
3264 | memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len, | |
3265 | qc->pad_len); | |
3266 | ||
3267 | sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ); | |
3268 | sg_dma_len(psg) = ATA_DMA_PAD_SZ; | |
3269 | /* trim sg */ | |
3270 | sg->length -= qc->pad_len; | |
2e242fa9 TH |
3271 | if (sg->length == 0) |
3272 | trim_sg = 1; | |
cedc9a47 JG |
3273 | |
3274 | DPRINTK("padding done, sg->length=%u pad_len=%u\n", | |
3275 | sg->length, qc->pad_len); | |
3276 | } | |
3277 | ||
2e242fa9 TH |
3278 | if (trim_sg) { |
3279 | qc->n_elem--; | |
e1410f2d JG |
3280 | goto skip_map; |
3281 | } | |
3282 | ||
2f1f610b | 3283 | dma_address = dma_map_single(ap->dev, qc->buf_virt, |
32529e01 | 3284 | sg->length, dir); |
537a95d9 TH |
3285 | if (dma_mapping_error(dma_address)) { |
3286 | /* restore sg */ | |
3287 | sg->length += qc->pad_len; | |
1da177e4 | 3288 | return -1; |
537a95d9 | 3289 | } |
1da177e4 LT |
3290 | |
3291 | sg_dma_address(sg) = dma_address; | |
32529e01 | 3292 | sg_dma_len(sg) = sg->length; |
1da177e4 | 3293 | |
2e242fa9 | 3294 | skip_map: |
1da177e4 LT |
3295 | DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg), |
3296 | qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); | |
3297 | ||
3298 | return 0; | |
3299 | } | |
3300 | ||
3301 | /** | |
0cba632b JG |
3302 | * ata_sg_setup - DMA-map the scatter-gather table associated with a command. |
3303 | * @qc: Command with scatter-gather table to be mapped. | |
3304 | * | |
3305 | * DMA-map the scatter-gather table associated with queued_cmd @qc. | |
1da177e4 LT |
3306 | * |
3307 | * LOCKING: | |
3308 | * spin_lock_irqsave(host_set lock) | |
3309 | * | |
3310 | * RETURNS: | |
0cba632b | 3311 | * Zero on success, negative on error. |
1da177e4 LT |
3312 | * |
3313 | */ | |
3314 | ||
3315 | static int ata_sg_setup(struct ata_queued_cmd *qc) | |
3316 | { | |
3317 | struct ata_port *ap = qc->ap; | |
cedc9a47 JG |
3318 | struct scatterlist *sg = qc->__sg; |
3319 | struct scatterlist *lsg = &sg[qc->n_elem - 1]; | |
e1410f2d | 3320 | int n_elem, pre_n_elem, dir, trim_sg = 0; |
1da177e4 LT |
3321 | |
3322 | VPRINTK("ENTER, ata%u\n", ap->id); | |
a4631474 | 3323 | WARN_ON(!(qc->flags & ATA_QCFLAG_SG)); |
1da177e4 | 3324 | |
cedc9a47 JG |
3325 | /* we must lengthen transfers to end on a 32-bit boundary */ |
3326 | qc->pad_len = lsg->length & 3; | |
3327 | if (qc->pad_len) { | |
3328 | void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
3329 | struct scatterlist *psg = &qc->pad_sgent; | |
3330 | unsigned int offset; | |
3331 | ||
a4631474 | 3332 | WARN_ON(qc->dev->class != ATA_DEV_ATAPI); |
cedc9a47 JG |
3333 | |
3334 | memset(pad_buf, 0, ATA_DMA_PAD_SZ); | |
3335 | ||
3336 | /* | |
3337 | * psg->page/offset are used to copy to-be-written | |
3338 | * data in this function or read data in ata_sg_clean. | |
3339 | */ | |
3340 | offset = lsg->offset + lsg->length - qc->pad_len; | |
3341 | psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT); | |
3342 | psg->offset = offset_in_page(offset); | |
3343 | ||
3344 | if (qc->tf.flags & ATA_TFLAG_WRITE) { | |
3345 | void *addr = kmap_atomic(psg->page, KM_IRQ0); | |
3346 | memcpy(pad_buf, addr + psg->offset, qc->pad_len); | |
dfa15988 | 3347 | kunmap_atomic(addr, KM_IRQ0); |
cedc9a47 JG |
3348 | } |
3349 | ||
3350 | sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ); | |
3351 | sg_dma_len(psg) = ATA_DMA_PAD_SZ; | |
3352 | /* trim last sg */ | |
3353 | lsg->length -= qc->pad_len; | |
e1410f2d JG |
3354 | if (lsg->length == 0) |
3355 | trim_sg = 1; | |
cedc9a47 JG |
3356 | |
3357 | DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n", | |
3358 | qc->n_elem - 1, lsg->length, qc->pad_len); | |
3359 | } | |
3360 | ||
e1410f2d JG |
3361 | pre_n_elem = qc->n_elem; |
3362 | if (trim_sg && pre_n_elem) | |
3363 | pre_n_elem--; | |
3364 | ||
3365 | if (!pre_n_elem) { | |
3366 | n_elem = 0; | |
3367 | goto skip_map; | |
3368 | } | |
3369 | ||
1da177e4 | 3370 | dir = qc->dma_dir; |
2f1f610b | 3371 | n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir); |
537a95d9 TH |
3372 | if (n_elem < 1) { |
3373 | /* restore last sg */ | |
3374 | lsg->length += qc->pad_len; | |
1da177e4 | 3375 | return -1; |
537a95d9 | 3376 | } |
1da177e4 LT |
3377 | |
3378 | DPRINTK("%d sg elements mapped\n", n_elem); | |
3379 | ||
e1410f2d | 3380 | skip_map: |
1da177e4 LT |
3381 | qc->n_elem = n_elem; |
3382 | ||
3383 | return 0; | |
3384 | } | |
3385 | ||
40e8c82c TH |
3386 | /** |
3387 | * ata_poll_qc_complete - turn irq back on and finish qc | |
3388 | * @qc: Command to complete | |
8e8b77dd | 3389 | * @err_mask: ATA status register content |
40e8c82c TH |
3390 | * |
3391 | * LOCKING: | |
3392 | * None. (grabs host lock) | |
3393 | */ | |
3394 | ||
a22e2eb0 | 3395 | void ata_poll_qc_complete(struct ata_queued_cmd *qc) |
40e8c82c TH |
3396 | { |
3397 | struct ata_port *ap = qc->ap; | |
b8f6153e | 3398 | unsigned long flags; |
40e8c82c | 3399 | |
b8f6153e | 3400 | spin_lock_irqsave(&ap->host_set->lock, flags); |
40e8c82c TH |
3401 | ap->flags &= ~ATA_FLAG_NOINTR; |
3402 | ata_irq_on(ap); | |
a22e2eb0 | 3403 | ata_qc_complete(qc); |
b8f6153e | 3404 | spin_unlock_irqrestore(&ap->host_set->lock, flags); |
40e8c82c TH |
3405 | } |
3406 | ||
1da177e4 | 3407 | /** |
c893a3ae | 3408 | * ata_pio_poll - poll using PIO, depending on current state |
c91af2c8 | 3409 | * @qc: qc in progress |
1da177e4 LT |
3410 | * |
3411 | * LOCKING: | |
0cba632b | 3412 | * None. (executing in kernel thread context) |
1da177e4 LT |
3413 | * |
3414 | * RETURNS: | |
6f0ef4fa | 3415 | * timeout value to use |
1da177e4 | 3416 | */ |
c91af2c8 | 3417 | static unsigned long ata_pio_poll(struct ata_queued_cmd *qc) |
1da177e4 | 3418 | { |
c91af2c8 | 3419 | struct ata_port *ap = qc->ap; |
1da177e4 | 3420 | u8 status; |
14be71f4 AL |
3421 | unsigned int poll_state = HSM_ST_UNKNOWN; |
3422 | unsigned int reg_state = HSM_ST_UNKNOWN; | |
14be71f4 AL |
3423 | |
3424 | switch (ap->hsm_task_state) { | |
3425 | case HSM_ST: | |
3426 | case HSM_ST_POLL: | |
3427 | poll_state = HSM_ST_POLL; | |
3428 | reg_state = HSM_ST; | |
1da177e4 | 3429 | break; |
14be71f4 AL |
3430 | case HSM_ST_LAST: |
3431 | case HSM_ST_LAST_POLL: | |
3432 | poll_state = HSM_ST_LAST_POLL; | |
3433 | reg_state = HSM_ST_LAST; | |
1da177e4 LT |
3434 | break; |
3435 | default: | |
3436 | BUG(); | |
3437 | break; | |
3438 | } | |
3439 | ||
3440 | status = ata_chk_status(ap); | |
3441 | if (status & ATA_BUSY) { | |
3442 | if (time_after(jiffies, ap->pio_task_timeout)) { | |
11a56d24 | 3443 | qc->err_mask |= AC_ERR_TIMEOUT; |
7c398335 | 3444 | ap->hsm_task_state = HSM_ST_TMOUT; |
1da177e4 LT |
3445 | return 0; |
3446 | } | |
14be71f4 | 3447 | ap->hsm_task_state = poll_state; |
1da177e4 LT |
3448 | return ATA_SHORT_PAUSE; |
3449 | } | |
3450 | ||
14be71f4 | 3451 | ap->hsm_task_state = reg_state; |
1da177e4 LT |
3452 | return 0; |
3453 | } | |
3454 | ||
3455 | /** | |
6f0ef4fa | 3456 | * ata_pio_complete - check if drive is busy or idle |
c91af2c8 | 3457 | * @qc: qc to complete |
1da177e4 LT |
3458 | * |
3459 | * LOCKING: | |
0cba632b | 3460 | * None. (executing in kernel thread context) |
7fb6ec28 JG |
3461 | * |
3462 | * RETURNS: | |
3463 | * Non-zero if qc completed, zero otherwise. | |
1da177e4 | 3464 | */ |
c91af2c8 | 3465 | static int ata_pio_complete(struct ata_queued_cmd *qc) |
1da177e4 | 3466 | { |
c91af2c8 | 3467 | struct ata_port *ap = qc->ap; |
1da177e4 LT |
3468 | u8 drv_stat; |
3469 | ||
3470 | /* | |
31433ea3 AC |
3471 | * This is purely heuristic. This is a fast path. Sometimes when |
3472 | * we enter, BSY will be cleared in a chk-status or two. If not, | |
3473 | * the drive is probably seeking or something. Snooze for a couple | |
3474 | * msecs, then chk-status again. If still busy, fall back to | |
14be71f4 | 3475 | * HSM_ST_POLL state. |
1da177e4 | 3476 | */ |
fe79e683 AL |
3477 | drv_stat = ata_busy_wait(ap, ATA_BUSY, 10); |
3478 | if (drv_stat & ATA_BUSY) { | |
1da177e4 | 3479 | msleep(2); |
fe79e683 AL |
3480 | drv_stat = ata_busy_wait(ap, ATA_BUSY, 10); |
3481 | if (drv_stat & ATA_BUSY) { | |
14be71f4 | 3482 | ap->hsm_task_state = HSM_ST_LAST_POLL; |
1da177e4 | 3483 | ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO; |
7fb6ec28 | 3484 | return 0; |
1da177e4 LT |
3485 | } |
3486 | } | |
3487 | ||
3488 | drv_stat = ata_wait_idle(ap); | |
3489 | if (!ata_ok(drv_stat)) { | |
1c848984 | 3490 | qc->err_mask |= __ac_err_mask(drv_stat); |
14be71f4 | 3491 | ap->hsm_task_state = HSM_ST_ERR; |
7fb6ec28 | 3492 | return 0; |
1da177e4 LT |
3493 | } |
3494 | ||
14be71f4 | 3495 | ap->hsm_task_state = HSM_ST_IDLE; |
1da177e4 | 3496 | |
a4631474 | 3497 | WARN_ON(qc->err_mask); |
a22e2eb0 | 3498 | ata_poll_qc_complete(qc); |
7fb6ec28 JG |
3499 | |
3500 | /* another command may start at this point */ | |
3501 | ||
3502 | return 1; | |
1da177e4 LT |
3503 | } |
3504 | ||
0baab86b EF |
3505 | |
3506 | /** | |
c893a3ae | 3507 | * swap_buf_le16 - swap halves of 16-bit words in place |
0baab86b EF |
3508 | * @buf: Buffer to swap |
3509 | * @buf_words: Number of 16-bit words in buffer. | |
3510 | * | |
3511 | * Swap halves of 16-bit words if needed to convert from | |
3512 | * little-endian byte order to native cpu byte order, or | |
3513 | * vice-versa. | |
3514 | * | |
3515 | * LOCKING: | |
6f0ef4fa | 3516 | * Inherited from caller. |
0baab86b | 3517 | */ |
1da177e4 LT |
3518 | void swap_buf_le16(u16 *buf, unsigned int buf_words) |
3519 | { | |
3520 | #ifdef __BIG_ENDIAN | |
3521 | unsigned int i; | |
3522 | ||
3523 | for (i = 0; i < buf_words; i++) | |
3524 | buf[i] = le16_to_cpu(buf[i]); | |
3525 | #endif /* __BIG_ENDIAN */ | |
3526 | } | |
3527 | ||
6ae4cfb5 AL |
3528 | /** |
3529 | * ata_mmio_data_xfer - Transfer data by MMIO | |
3530 | * @ap: port to read/write | |
3531 | * @buf: data buffer | |
3532 | * @buflen: buffer length | |
344babaa | 3533 | * @write_data: read/write |
6ae4cfb5 AL |
3534 | * |
3535 | * Transfer data from/to the device data register by MMIO. | |
3536 | * | |
3537 | * LOCKING: | |
3538 | * Inherited from caller. | |
6ae4cfb5 AL |
3539 | */ |
3540 | ||
1da177e4 LT |
3541 | static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf, |
3542 | unsigned int buflen, int write_data) | |
3543 | { | |
3544 | unsigned int i; | |
3545 | unsigned int words = buflen >> 1; | |
3546 | u16 *buf16 = (u16 *) buf; | |
3547 | void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr; | |
3548 | ||
6ae4cfb5 | 3549 | /* Transfer multiple of 2 bytes */ |
1da177e4 LT |
3550 | if (write_data) { |
3551 | for (i = 0; i < words; i++) | |
3552 | writew(le16_to_cpu(buf16[i]), mmio); | |
3553 | } else { | |
3554 | for (i = 0; i < words; i++) | |
3555 | buf16[i] = cpu_to_le16(readw(mmio)); | |
3556 | } | |
6ae4cfb5 AL |
3557 | |
3558 | /* Transfer trailing 1 byte, if any. */ | |
3559 | if (unlikely(buflen & 0x01)) { | |
3560 | u16 align_buf[1] = { 0 }; | |
3561 | unsigned char *trailing_buf = buf + buflen - 1; | |
3562 | ||
3563 | if (write_data) { | |
3564 | memcpy(align_buf, trailing_buf, 1); | |
3565 | writew(le16_to_cpu(align_buf[0]), mmio); | |
3566 | } else { | |
3567 | align_buf[0] = cpu_to_le16(readw(mmio)); | |
3568 | memcpy(trailing_buf, align_buf, 1); | |
3569 | } | |
3570 | } | |
1da177e4 LT |
3571 | } |
3572 | ||
6ae4cfb5 AL |
3573 | /** |
3574 | * ata_pio_data_xfer - Transfer data by PIO | |
3575 | * @ap: port to read/write | |
3576 | * @buf: data buffer | |
3577 | * @buflen: buffer length | |
344babaa | 3578 | * @write_data: read/write |
6ae4cfb5 AL |
3579 | * |
3580 | * Transfer data from/to the device data register by PIO. | |
3581 | * | |
3582 | * LOCKING: | |
3583 | * Inherited from caller. | |
6ae4cfb5 AL |
3584 | */ |
3585 | ||
1da177e4 LT |
3586 | static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf, |
3587 | unsigned int buflen, int write_data) | |
3588 | { | |
6ae4cfb5 | 3589 | unsigned int words = buflen >> 1; |
1da177e4 | 3590 | |
6ae4cfb5 | 3591 | /* Transfer multiple of 2 bytes */ |
1da177e4 | 3592 | if (write_data) |
6ae4cfb5 | 3593 | outsw(ap->ioaddr.data_addr, buf, words); |
1da177e4 | 3594 | else |
6ae4cfb5 AL |
3595 | insw(ap->ioaddr.data_addr, buf, words); |
3596 | ||
3597 | /* Transfer trailing 1 byte, if any. */ | |
3598 | if (unlikely(buflen & 0x01)) { | |
3599 | u16 align_buf[1] = { 0 }; | |
3600 | unsigned char *trailing_buf = buf + buflen - 1; | |
3601 | ||
3602 | if (write_data) { | |
3603 | memcpy(align_buf, trailing_buf, 1); | |
3604 | outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr); | |
3605 | } else { | |
3606 | align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr)); | |
3607 | memcpy(trailing_buf, align_buf, 1); | |
3608 | } | |
3609 | } | |
1da177e4 LT |
3610 | } |
3611 | ||
6ae4cfb5 AL |
3612 | /** |
3613 | * ata_data_xfer - Transfer data from/to the data register. | |
3614 | * @ap: port to read/write | |
3615 | * @buf: data buffer | |
3616 | * @buflen: buffer length | |
3617 | * @do_write: read/write | |
3618 | * | |
3619 | * Transfer data from/to the device data register. | |
3620 | * | |
3621 | * LOCKING: | |
3622 | * Inherited from caller. | |
6ae4cfb5 AL |
3623 | */ |
3624 | ||
1da177e4 LT |
3625 | static void ata_data_xfer(struct ata_port *ap, unsigned char *buf, |
3626 | unsigned int buflen, int do_write) | |
3627 | { | |
a1bd9e68 AC |
3628 | /* Make the crap hardware pay the costs not the good stuff */ |
3629 | if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) { | |
3630 | unsigned long flags; | |
3631 | local_irq_save(flags); | |
3632 | if (ap->flags & ATA_FLAG_MMIO) | |
3633 | ata_mmio_data_xfer(ap, buf, buflen, do_write); | |
3634 | else | |
3635 | ata_pio_data_xfer(ap, buf, buflen, do_write); | |
3636 | local_irq_restore(flags); | |
3637 | } else { | |
3638 | if (ap->flags & ATA_FLAG_MMIO) | |
3639 | ata_mmio_data_xfer(ap, buf, buflen, do_write); | |
3640 | else | |
3641 | ata_pio_data_xfer(ap, buf, buflen, do_write); | |
3642 | } | |
1da177e4 LT |
3643 | } |
3644 | ||
6ae4cfb5 AL |
3645 | /** |
3646 | * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data. | |
3647 | * @qc: Command on going | |
3648 | * | |
3649 | * Transfer ATA_SECT_SIZE of data from/to the ATA device. | |
3650 | * | |
3651 | * LOCKING: | |
3652 | * Inherited from caller. | |
3653 | */ | |
3654 | ||
1da177e4 LT |
3655 | static void ata_pio_sector(struct ata_queued_cmd *qc) |
3656 | { | |
3657 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
cedc9a47 | 3658 | struct scatterlist *sg = qc->__sg; |
1da177e4 LT |
3659 | struct ata_port *ap = qc->ap; |
3660 | struct page *page; | |
3661 | unsigned int offset; | |
3662 | unsigned char *buf; | |
3663 | ||
3664 | if (qc->cursect == (qc->nsect - 1)) | |
14be71f4 | 3665 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
3666 | |
3667 | page = sg[qc->cursg].page; | |
3668 | offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE; | |
3669 | ||
3670 | /* get the current page and offset */ | |
3671 | page = nth_page(page, (offset >> PAGE_SHIFT)); | |
3672 | offset %= PAGE_SIZE; | |
3673 | ||
3674 | buf = kmap(page) + offset; | |
3675 | ||
3676 | qc->cursect++; | |
3677 | qc->cursg_ofs++; | |
3678 | ||
32529e01 | 3679 | if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) { |
1da177e4 LT |
3680 | qc->cursg++; |
3681 | qc->cursg_ofs = 0; | |
3682 | } | |
3683 | ||
3684 | DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); | |
3685 | ||
3686 | /* do the actual data transfer */ | |
3687 | do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
3688 | ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write); | |
3689 | ||
3690 | kunmap(page); | |
3691 | } | |
3692 | ||
6ae4cfb5 AL |
3693 | /** |
3694 | * __atapi_pio_bytes - Transfer data from/to the ATAPI device. | |
3695 | * @qc: Command on going | |
3696 | * @bytes: number of bytes | |
3697 | * | |
3698 | * Transfer Transfer data from/to the ATAPI device. | |
3699 | * | |
3700 | * LOCKING: | |
3701 | * Inherited from caller. | |
3702 | * | |
3703 | */ | |
3704 | ||
1da177e4 LT |
3705 | static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes) |
3706 | { | |
3707 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
cedc9a47 | 3708 | struct scatterlist *sg = qc->__sg; |
1da177e4 LT |
3709 | struct ata_port *ap = qc->ap; |
3710 | struct page *page; | |
3711 | unsigned char *buf; | |
3712 | unsigned int offset, count; | |
3713 | ||
563a6e1f | 3714 | if (qc->curbytes + bytes >= qc->nbytes) |
14be71f4 | 3715 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
3716 | |
3717 | next_sg: | |
563a6e1f | 3718 | if (unlikely(qc->cursg >= qc->n_elem)) { |
7fb6ec28 | 3719 | /* |
563a6e1f AL |
3720 | * The end of qc->sg is reached and the device expects |
3721 | * more data to transfer. In order not to overrun qc->sg | |
3722 | * and fulfill length specified in the byte count register, | |
3723 | * - for read case, discard trailing data from the device | |
3724 | * - for write case, padding zero data to the device | |
3725 | */ | |
3726 | u16 pad_buf[1] = { 0 }; | |
3727 | unsigned int words = bytes >> 1; | |
3728 | unsigned int i; | |
3729 | ||
3730 | if (words) /* warning if bytes > 1 */ | |
f15a1daf TH |
3731 | ata_dev_printk(qc->dev, KERN_WARNING, |
3732 | "%u bytes trailing data\n", bytes); | |
563a6e1f AL |
3733 | |
3734 | for (i = 0; i < words; i++) | |
3735 | ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write); | |
3736 | ||
14be71f4 | 3737 | ap->hsm_task_state = HSM_ST_LAST; |
563a6e1f AL |
3738 | return; |
3739 | } | |
3740 | ||
cedc9a47 | 3741 | sg = &qc->__sg[qc->cursg]; |
1da177e4 | 3742 | |
1da177e4 LT |
3743 | page = sg->page; |
3744 | offset = sg->offset + qc->cursg_ofs; | |
3745 | ||
3746 | /* get the current page and offset */ | |
3747 | page = nth_page(page, (offset >> PAGE_SHIFT)); | |
3748 | offset %= PAGE_SIZE; | |
3749 | ||
6952df03 | 3750 | /* don't overrun current sg */ |
32529e01 | 3751 | count = min(sg->length - qc->cursg_ofs, bytes); |
1da177e4 LT |
3752 | |
3753 | /* don't cross page boundaries */ | |
3754 | count = min(count, (unsigned int)PAGE_SIZE - offset); | |
3755 | ||
3756 | buf = kmap(page) + offset; | |
3757 | ||
3758 | bytes -= count; | |
3759 | qc->curbytes += count; | |
3760 | qc->cursg_ofs += count; | |
3761 | ||
32529e01 | 3762 | if (qc->cursg_ofs == sg->length) { |
1da177e4 LT |
3763 | qc->cursg++; |
3764 | qc->cursg_ofs = 0; | |
3765 | } | |
3766 | ||
3767 | DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); | |
3768 | ||
3769 | /* do the actual data transfer */ | |
3770 | ata_data_xfer(ap, buf, count, do_write); | |
3771 | ||
3772 | kunmap(page); | |
3773 | ||
563a6e1f | 3774 | if (bytes) |
1da177e4 | 3775 | goto next_sg; |
1da177e4 LT |
3776 | } |
3777 | ||
6ae4cfb5 AL |
3778 | /** |
3779 | * atapi_pio_bytes - Transfer data from/to the ATAPI device. | |
3780 | * @qc: Command on going | |
3781 | * | |
3782 | * Transfer Transfer data from/to the ATAPI device. | |
3783 | * | |
3784 | * LOCKING: | |
3785 | * Inherited from caller. | |
6ae4cfb5 AL |
3786 | */ |
3787 | ||
1da177e4 LT |
3788 | static void atapi_pio_bytes(struct ata_queued_cmd *qc) |
3789 | { | |
3790 | struct ata_port *ap = qc->ap; | |
3791 | struct ata_device *dev = qc->dev; | |
3792 | unsigned int ireason, bc_lo, bc_hi, bytes; | |
3793 | int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0; | |
3794 | ||
3795 | ap->ops->tf_read(ap, &qc->tf); | |
3796 | ireason = qc->tf.nsect; | |
3797 | bc_lo = qc->tf.lbam; | |
3798 | bc_hi = qc->tf.lbah; | |
3799 | bytes = (bc_hi << 8) | bc_lo; | |
3800 | ||
3801 | /* shall be cleared to zero, indicating xfer of data */ | |
3802 | if (ireason & (1 << 0)) | |
3803 | goto err_out; | |
3804 | ||
3805 | /* make sure transfer direction matches expected */ | |
3806 | i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0; | |
3807 | if (do_write != i_write) | |
3808 | goto err_out; | |
3809 | ||
3810 | __atapi_pio_bytes(qc, bytes); | |
3811 | ||
3812 | return; | |
3813 | ||
3814 | err_out: | |
f15a1daf | 3815 | ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n"); |
11a56d24 | 3816 | qc->err_mask |= AC_ERR_HSM; |
14be71f4 | 3817 | ap->hsm_task_state = HSM_ST_ERR; |
1da177e4 LT |
3818 | } |
3819 | ||
3820 | /** | |
6f0ef4fa | 3821 | * ata_pio_block - start PIO on a block |
c91af2c8 | 3822 | * @qc: qc to transfer block for |
1da177e4 LT |
3823 | * |
3824 | * LOCKING: | |
0cba632b | 3825 | * None. (executing in kernel thread context) |
1da177e4 | 3826 | */ |
c91af2c8 | 3827 | static void ata_pio_block(struct ata_queued_cmd *qc) |
1da177e4 | 3828 | { |
c91af2c8 | 3829 | struct ata_port *ap = qc->ap; |
1da177e4 LT |
3830 | u8 status; |
3831 | ||
3832 | /* | |
6f0ef4fa | 3833 | * This is purely heuristic. This is a fast path. |
1da177e4 LT |
3834 | * Sometimes when we enter, BSY will be cleared in |
3835 | * a chk-status or two. If not, the drive is probably seeking | |
3836 | * or something. Snooze for a couple msecs, then | |
3837 | * chk-status again. If still busy, fall back to | |
14be71f4 | 3838 | * HSM_ST_POLL state. |
1da177e4 LT |
3839 | */ |
3840 | status = ata_busy_wait(ap, ATA_BUSY, 5); | |
3841 | if (status & ATA_BUSY) { | |
3842 | msleep(2); | |
3843 | status = ata_busy_wait(ap, ATA_BUSY, 10); | |
3844 | if (status & ATA_BUSY) { | |
14be71f4 | 3845 | ap->hsm_task_state = HSM_ST_POLL; |
1da177e4 LT |
3846 | ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO; |
3847 | return; | |
3848 | } | |
3849 | } | |
3850 | ||
fe79e683 AL |
3851 | /* check error */ |
3852 | if (status & (ATA_ERR | ATA_DF)) { | |
3853 | qc->err_mask |= AC_ERR_DEV; | |
3854 | ap->hsm_task_state = HSM_ST_ERR; | |
3855 | return; | |
3856 | } | |
3857 | ||
3858 | /* transfer data if any */ | |
1da177e4 | 3859 | if (is_atapi_taskfile(&qc->tf)) { |
fe79e683 | 3860 | /* DRQ=0 means no more data to transfer */ |
1da177e4 | 3861 | if ((status & ATA_DRQ) == 0) { |
14be71f4 | 3862 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
3863 | return; |
3864 | } | |
3865 | ||
3866 | atapi_pio_bytes(qc); | |
3867 | } else { | |
3868 | /* handle BSY=0, DRQ=0 as error */ | |
3869 | if ((status & ATA_DRQ) == 0) { | |
11a56d24 | 3870 | qc->err_mask |= AC_ERR_HSM; |
14be71f4 | 3871 | ap->hsm_task_state = HSM_ST_ERR; |
1da177e4 LT |
3872 | return; |
3873 | } | |
3874 | ||
3875 | ata_pio_sector(qc); | |
3876 | } | |
3877 | } | |
3878 | ||
c91af2c8 | 3879 | static void ata_pio_error(struct ata_queued_cmd *qc) |
1da177e4 | 3880 | { |
c91af2c8 | 3881 | struct ata_port *ap = qc->ap; |
1da177e4 | 3882 | |
0565c26d | 3883 | if (qc->tf.command != ATA_CMD_PACKET) |
f15a1daf | 3884 | ata_dev_printk(qc->dev, KERN_WARNING, "PIO error\n"); |
0565c26d | 3885 | |
2e9edbf8 | 3886 | /* make sure qc->err_mask is available to |
1c848984 AL |
3887 | * know what's wrong and recover |
3888 | */ | |
a4631474 | 3889 | WARN_ON(qc->err_mask == 0); |
1c848984 | 3890 | |
14be71f4 | 3891 | ap->hsm_task_state = HSM_ST_IDLE; |
1da177e4 | 3892 | |
a22e2eb0 | 3893 | ata_poll_qc_complete(qc); |
1da177e4 LT |
3894 | } |
3895 | ||
3896 | static void ata_pio_task(void *_data) | |
3897 | { | |
c91af2c8 TH |
3898 | struct ata_queued_cmd *qc = _data; |
3899 | struct ata_port *ap = qc->ap; | |
7fb6ec28 JG |
3900 | unsigned long timeout; |
3901 | int qc_completed; | |
3902 | ||
3903 | fsm_start: | |
3904 | timeout = 0; | |
3905 | qc_completed = 0; | |
1da177e4 | 3906 | |
14be71f4 AL |
3907 | switch (ap->hsm_task_state) { |
3908 | case HSM_ST_IDLE: | |
1da177e4 LT |
3909 | return; |
3910 | ||
14be71f4 | 3911 | case HSM_ST: |
c91af2c8 | 3912 | ata_pio_block(qc); |
1da177e4 LT |
3913 | break; |
3914 | ||
14be71f4 | 3915 | case HSM_ST_LAST: |
c91af2c8 | 3916 | qc_completed = ata_pio_complete(qc); |
1da177e4 LT |
3917 | break; |
3918 | ||
14be71f4 AL |
3919 | case HSM_ST_POLL: |
3920 | case HSM_ST_LAST_POLL: | |
c91af2c8 | 3921 | timeout = ata_pio_poll(qc); |
1da177e4 LT |
3922 | break; |
3923 | ||
14be71f4 AL |
3924 | case HSM_ST_TMOUT: |
3925 | case HSM_ST_ERR: | |
c91af2c8 | 3926 | ata_pio_error(qc); |
1da177e4 LT |
3927 | return; |
3928 | } | |
3929 | ||
3930 | if (timeout) | |
c91af2c8 | 3931 | ata_port_queue_task(ap, ata_pio_task, qc, timeout); |
7fb6ec28 JG |
3932 | else if (!qc_completed) |
3933 | goto fsm_start; | |
1da177e4 LT |
3934 | } |
3935 | ||
8061f5f0 TH |
3936 | /** |
3937 | * atapi_packet_task - Write CDB bytes to hardware | |
c91af2c8 | 3938 | * @_data: qc in progress |
8061f5f0 TH |
3939 | * |
3940 | * When device has indicated its readiness to accept | |
3941 | * a CDB, this function is called. Send the CDB. | |
3942 | * If DMA is to be performed, exit immediately. | |
3943 | * Otherwise, we are in polling mode, so poll | |
3944 | * status under operation succeeds or fails. | |
3945 | * | |
3946 | * LOCKING: | |
3947 | * Kernel thread context (may sleep) | |
3948 | */ | |
8061f5f0 TH |
3949 | static void atapi_packet_task(void *_data) |
3950 | { | |
c91af2c8 TH |
3951 | struct ata_queued_cmd *qc = _data; |
3952 | struct ata_port *ap = qc->ap; | |
8061f5f0 TH |
3953 | u8 status; |
3954 | ||
8061f5f0 TH |
3955 | /* sleep-wait for BSY to clear */ |
3956 | DPRINTK("busy wait\n"); | |
3957 | if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB)) { | |
3958 | qc->err_mask |= AC_ERR_TIMEOUT; | |
3959 | goto err_out; | |
3960 | } | |
3961 | ||
3962 | /* make sure DRQ is set */ | |
3963 | status = ata_chk_status(ap); | |
3964 | if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) { | |
3965 | qc->err_mask |= AC_ERR_HSM; | |
3966 | goto err_out; | |
3967 | } | |
3968 | ||
3969 | /* send SCSI cdb */ | |
3970 | DPRINTK("send cdb\n"); | |
3971 | WARN_ON(qc->dev->cdb_len < 12); | |
3972 | ||
3973 | if (qc->tf.protocol == ATA_PROT_ATAPI_DMA || | |
3974 | qc->tf.protocol == ATA_PROT_ATAPI_NODATA) { | |
3975 | unsigned long flags; | |
3976 | ||
3977 | /* Once we're done issuing command and kicking bmdma, | |
3978 | * irq handler takes over. To not lose irq, we need | |
3979 | * to clear NOINTR flag before sending cdb, but | |
3980 | * interrupt handler shouldn't be invoked before we're | |
3981 | * finished. Hence, the following locking. | |
3982 | */ | |
3983 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
3984 | ap->flags &= ~ATA_FLAG_NOINTR; | |
3985 | ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1); | |
3986 | if (qc->tf.protocol == ATA_PROT_ATAPI_DMA) | |
3987 | ap->ops->bmdma_start(qc); /* initiate bmdma */ | |
3988 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
3989 | } else { | |
3990 | ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1); | |
3991 | ||
3992 | /* PIO commands are handled by polling */ | |
3993 | ap->hsm_task_state = HSM_ST; | |
c91af2c8 | 3994 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
8061f5f0 TH |
3995 | } |
3996 | ||
3997 | return; | |
3998 | ||
3999 | err_out: | |
4000 | ata_poll_qc_complete(qc); | |
4001 | } | |
4002 | ||
1da177e4 LT |
4003 | /** |
4004 | * ata_qc_new - Request an available ATA command, for queueing | |
4005 | * @ap: Port associated with device @dev | |
4006 | * @dev: Device from whom we request an available command structure | |
4007 | * | |
4008 | * LOCKING: | |
0cba632b | 4009 | * None. |
1da177e4 LT |
4010 | */ |
4011 | ||
4012 | static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap) | |
4013 | { | |
4014 | struct ata_queued_cmd *qc = NULL; | |
4015 | unsigned int i; | |
4016 | ||
4017 | for (i = 0; i < ATA_MAX_QUEUE; i++) | |
4018 | if (!test_and_set_bit(i, &ap->qactive)) { | |
4019 | qc = ata_qc_from_tag(ap, i); | |
4020 | break; | |
4021 | } | |
4022 | ||
4023 | if (qc) | |
4024 | qc->tag = i; | |
4025 | ||
4026 | return qc; | |
4027 | } | |
4028 | ||
4029 | /** | |
4030 | * ata_qc_new_init - Request an available ATA command, and initialize it | |
1da177e4 LT |
4031 | * @dev: Device from whom we request an available command structure |
4032 | * | |
4033 | * LOCKING: | |
0cba632b | 4034 | * None. |
1da177e4 LT |
4035 | */ |
4036 | ||
3373efd8 | 4037 | struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev) |
1da177e4 | 4038 | { |
3373efd8 | 4039 | struct ata_port *ap = dev->ap; |
1da177e4 LT |
4040 | struct ata_queued_cmd *qc; |
4041 | ||
4042 | qc = ata_qc_new(ap); | |
4043 | if (qc) { | |
1da177e4 LT |
4044 | qc->scsicmd = NULL; |
4045 | qc->ap = ap; | |
4046 | qc->dev = dev; | |
1da177e4 | 4047 | |
2c13b7ce | 4048 | ata_qc_reinit(qc); |
1da177e4 LT |
4049 | } |
4050 | ||
4051 | return qc; | |
4052 | } | |
4053 | ||
1da177e4 LT |
4054 | /** |
4055 | * ata_qc_free - free unused ata_queued_cmd | |
4056 | * @qc: Command to complete | |
4057 | * | |
4058 | * Designed to free unused ata_queued_cmd object | |
4059 | * in case something prevents using it. | |
4060 | * | |
4061 | * LOCKING: | |
0cba632b | 4062 | * spin_lock_irqsave(host_set lock) |
1da177e4 LT |
4063 | */ |
4064 | void ata_qc_free(struct ata_queued_cmd *qc) | |
4065 | { | |
4ba946e9 TH |
4066 | struct ata_port *ap = qc->ap; |
4067 | unsigned int tag; | |
4068 | ||
a4631474 | 4069 | WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ |
1da177e4 | 4070 | |
4ba946e9 TH |
4071 | qc->flags = 0; |
4072 | tag = qc->tag; | |
4073 | if (likely(ata_tag_valid(tag))) { | |
4ba946e9 TH |
4074 | qc->tag = ATA_TAG_POISON; |
4075 | clear_bit(tag, &ap->qactive); | |
4076 | } | |
1da177e4 LT |
4077 | } |
4078 | ||
76014427 | 4079 | void __ata_qc_complete(struct ata_queued_cmd *qc) |
1da177e4 | 4080 | { |
a4631474 TH |
4081 | WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ |
4082 | WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE)); | |
1da177e4 LT |
4083 | |
4084 | if (likely(qc->flags & ATA_QCFLAG_DMAMAP)) | |
4085 | ata_sg_clean(qc); | |
4086 | ||
7401abf2 TH |
4087 | /* command should be marked inactive atomically with qc completion */ |
4088 | qc->ap->active_tag = ATA_TAG_POISON; | |
4089 | ||
3f3791d3 AL |
4090 | /* atapi: mark qc as inactive to prevent the interrupt handler |
4091 | * from completing the command twice later, before the error handler | |
4092 | * is called. (when rc != 0 and atapi request sense is needed) | |
4093 | */ | |
4094 | qc->flags &= ~ATA_QCFLAG_ACTIVE; | |
4095 | ||
1da177e4 | 4096 | /* call completion callback */ |
77853bf2 | 4097 | qc->complete_fn(qc); |
1da177e4 LT |
4098 | } |
4099 | ||
4100 | static inline int ata_should_dma_map(struct ata_queued_cmd *qc) | |
4101 | { | |
4102 | struct ata_port *ap = qc->ap; | |
4103 | ||
4104 | switch (qc->tf.protocol) { | |
4105 | case ATA_PROT_DMA: | |
4106 | case ATA_PROT_ATAPI_DMA: | |
4107 | return 1; | |
4108 | ||
4109 | case ATA_PROT_ATAPI: | |
4110 | case ATA_PROT_PIO: | |
1da177e4 LT |
4111 | if (ap->flags & ATA_FLAG_PIO_DMA) |
4112 | return 1; | |
4113 | ||
4114 | /* fall through */ | |
4115 | ||
4116 | default: | |
4117 | return 0; | |
4118 | } | |
4119 | ||
4120 | /* never reached */ | |
4121 | } | |
4122 | ||
4123 | /** | |
4124 | * ata_qc_issue - issue taskfile to device | |
4125 | * @qc: command to issue to device | |
4126 | * | |
4127 | * Prepare an ATA command to submission to device. | |
4128 | * This includes mapping the data into a DMA-able | |
4129 | * area, filling in the S/G table, and finally | |
4130 | * writing the taskfile to hardware, starting the command. | |
4131 | * | |
4132 | * LOCKING: | |
4133 | * spin_lock_irqsave(host_set lock) | |
1da177e4 | 4134 | */ |
8e0e694a | 4135 | void ata_qc_issue(struct ata_queued_cmd *qc) |
1da177e4 LT |
4136 | { |
4137 | struct ata_port *ap = qc->ap; | |
4138 | ||
e4a70e76 TH |
4139 | qc->ap->active_tag = qc->tag; |
4140 | qc->flags |= ATA_QCFLAG_ACTIVE; | |
4141 | ||
1da177e4 LT |
4142 | if (ata_should_dma_map(qc)) { |
4143 | if (qc->flags & ATA_QCFLAG_SG) { | |
4144 | if (ata_sg_setup(qc)) | |
8e436af9 | 4145 | goto sg_err; |
1da177e4 LT |
4146 | } else if (qc->flags & ATA_QCFLAG_SINGLE) { |
4147 | if (ata_sg_setup_one(qc)) | |
8e436af9 | 4148 | goto sg_err; |
1da177e4 LT |
4149 | } |
4150 | } else { | |
4151 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
4152 | } | |
4153 | ||
4154 | ap->ops->qc_prep(qc); | |
4155 | ||
8e0e694a TH |
4156 | qc->err_mask |= ap->ops->qc_issue(qc); |
4157 | if (unlikely(qc->err_mask)) | |
4158 | goto err; | |
4159 | return; | |
1da177e4 | 4160 | |
8e436af9 TH |
4161 | sg_err: |
4162 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
8e0e694a TH |
4163 | qc->err_mask |= AC_ERR_SYSTEM; |
4164 | err: | |
4165 | ata_qc_complete(qc); | |
1da177e4 LT |
4166 | } |
4167 | ||
4168 | /** | |
4169 | * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner | |
4170 | * @qc: command to issue to device | |
4171 | * | |
4172 | * Using various libata functions and hooks, this function | |
4173 | * starts an ATA command. ATA commands are grouped into | |
4174 | * classes called "protocols", and issuing each type of protocol | |
4175 | * is slightly different. | |
4176 | * | |
0baab86b EF |
4177 | * May be used as the qc_issue() entry in ata_port_operations. |
4178 | * | |
1da177e4 LT |
4179 | * LOCKING: |
4180 | * spin_lock_irqsave(host_set lock) | |
4181 | * | |
4182 | * RETURNS: | |
9a3d9eb0 | 4183 | * Zero on success, AC_ERR_* mask on failure |
1da177e4 LT |
4184 | */ |
4185 | ||
9a3d9eb0 | 4186 | unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc) |
1da177e4 LT |
4187 | { |
4188 | struct ata_port *ap = qc->ap; | |
4189 | ||
4190 | ata_dev_select(ap, qc->dev->devno, 1, 0); | |
4191 | ||
4192 | switch (qc->tf.protocol) { | |
4193 | case ATA_PROT_NODATA: | |
e5338254 | 4194 | ata_tf_to_host(ap, &qc->tf); |
1da177e4 LT |
4195 | break; |
4196 | ||
4197 | case ATA_PROT_DMA: | |
4198 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ | |
4199 | ap->ops->bmdma_setup(qc); /* set up bmdma */ | |
4200 | ap->ops->bmdma_start(qc); /* initiate bmdma */ | |
4201 | break; | |
4202 | ||
4203 | case ATA_PROT_PIO: /* load tf registers, initiate polling pio */ | |
4204 | ata_qc_set_polling(qc); | |
e5338254 | 4205 | ata_tf_to_host(ap, &qc->tf); |
14be71f4 | 4206 | ap->hsm_task_state = HSM_ST; |
c91af2c8 | 4207 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
1da177e4 LT |
4208 | break; |
4209 | ||
4210 | case ATA_PROT_ATAPI: | |
4211 | ata_qc_set_polling(qc); | |
e5338254 | 4212 | ata_tf_to_host(ap, &qc->tf); |
c91af2c8 | 4213 | ata_port_queue_task(ap, atapi_packet_task, qc, 0); |
1da177e4 LT |
4214 | break; |
4215 | ||
4216 | case ATA_PROT_ATAPI_NODATA: | |
c1389503 | 4217 | ap->flags |= ATA_FLAG_NOINTR; |
e5338254 | 4218 | ata_tf_to_host(ap, &qc->tf); |
c91af2c8 | 4219 | ata_port_queue_task(ap, atapi_packet_task, qc, 0); |
1da177e4 LT |
4220 | break; |
4221 | ||
4222 | case ATA_PROT_ATAPI_DMA: | |
c1389503 | 4223 | ap->flags |= ATA_FLAG_NOINTR; |
1da177e4 LT |
4224 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ |
4225 | ap->ops->bmdma_setup(qc); /* set up bmdma */ | |
c91af2c8 | 4226 | ata_port_queue_task(ap, atapi_packet_task, qc, 0); |
1da177e4 LT |
4227 | break; |
4228 | ||
4229 | default: | |
4230 | WARN_ON(1); | |
9a3d9eb0 | 4231 | return AC_ERR_SYSTEM; |
1da177e4 LT |
4232 | } |
4233 | ||
4234 | return 0; | |
4235 | } | |
4236 | ||
1da177e4 LT |
4237 | /** |
4238 | * ata_host_intr - Handle host interrupt for given (port, task) | |
4239 | * @ap: Port on which interrupt arrived (possibly...) | |
4240 | * @qc: Taskfile currently active in engine | |
4241 | * | |
4242 | * Handle host interrupt for given queued command. Currently, | |
4243 | * only DMA interrupts are handled. All other commands are | |
4244 | * handled via polling with interrupts disabled (nIEN bit). | |
4245 | * | |
4246 | * LOCKING: | |
4247 | * spin_lock_irqsave(host_set lock) | |
4248 | * | |
4249 | * RETURNS: | |
4250 | * One if interrupt was handled, zero if not (shared irq). | |
4251 | */ | |
4252 | ||
4253 | inline unsigned int ata_host_intr (struct ata_port *ap, | |
4254 | struct ata_queued_cmd *qc) | |
4255 | { | |
4256 | u8 status, host_stat; | |
4257 | ||
4258 | switch (qc->tf.protocol) { | |
4259 | ||
4260 | case ATA_PROT_DMA: | |
4261 | case ATA_PROT_ATAPI_DMA: | |
4262 | case ATA_PROT_ATAPI: | |
4263 | /* check status of DMA engine */ | |
4264 | host_stat = ap->ops->bmdma_status(ap); | |
4265 | VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat); | |
4266 | ||
4267 | /* if it's not our irq... */ | |
4268 | if (!(host_stat & ATA_DMA_INTR)) | |
4269 | goto idle_irq; | |
4270 | ||
4271 | /* before we do anything else, clear DMA-Start bit */ | |
b73fc89f | 4272 | ap->ops->bmdma_stop(qc); |
1da177e4 LT |
4273 | |
4274 | /* fall through */ | |
4275 | ||
4276 | case ATA_PROT_ATAPI_NODATA: | |
4277 | case ATA_PROT_NODATA: | |
4278 | /* check altstatus */ | |
4279 | status = ata_altstatus(ap); | |
4280 | if (status & ATA_BUSY) | |
4281 | goto idle_irq; | |
4282 | ||
4283 | /* check main status, clearing INTRQ */ | |
4284 | status = ata_chk_status(ap); | |
4285 | if (unlikely(status & ATA_BUSY)) | |
4286 | goto idle_irq; | |
4287 | DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n", | |
4288 | ap->id, qc->tf.protocol, status); | |
4289 | ||
4290 | /* ack bmdma irq events */ | |
4291 | ap->ops->irq_clear(ap); | |
4292 | ||
4293 | /* complete taskfile transaction */ | |
a22e2eb0 AL |
4294 | qc->err_mask |= ac_err_mask(status); |
4295 | ata_qc_complete(qc); | |
1da177e4 LT |
4296 | break; |
4297 | ||
4298 | default: | |
4299 | goto idle_irq; | |
4300 | } | |
4301 | ||
4302 | return 1; /* irq handled */ | |
4303 | ||
4304 | idle_irq: | |
4305 | ap->stats.idle_irq++; | |
4306 | ||
4307 | #ifdef ATA_IRQ_TRAP | |
4308 | if ((ap->stats.idle_irq % 1000) == 0) { | |
1da177e4 | 4309 | ata_irq_ack(ap, 0); /* debug trap */ |
f15a1daf | 4310 | ata_port_printk(ap, KERN_WARNING, "irq trap\n"); |
23cfce89 | 4311 | return 1; |
1da177e4 LT |
4312 | } |
4313 | #endif | |
4314 | return 0; /* irq not handled */ | |
4315 | } | |
4316 | ||
4317 | /** | |
4318 | * ata_interrupt - Default ATA host interrupt handler | |
0cba632b JG |
4319 | * @irq: irq line (unused) |
4320 | * @dev_instance: pointer to our ata_host_set information structure | |
1da177e4 LT |
4321 | * @regs: unused |
4322 | * | |
0cba632b JG |
4323 | * Default interrupt handler for PCI IDE devices. Calls |
4324 | * ata_host_intr() for each port that is not disabled. | |
4325 | * | |
1da177e4 | 4326 | * LOCKING: |
0cba632b | 4327 | * Obtains host_set lock during operation. |
1da177e4 LT |
4328 | * |
4329 | * RETURNS: | |
0cba632b | 4330 | * IRQ_NONE or IRQ_HANDLED. |
1da177e4 LT |
4331 | */ |
4332 | ||
4333 | irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs) | |
4334 | { | |
4335 | struct ata_host_set *host_set = dev_instance; | |
4336 | unsigned int i; | |
4337 | unsigned int handled = 0; | |
4338 | unsigned long flags; | |
4339 | ||
4340 | /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */ | |
4341 | spin_lock_irqsave(&host_set->lock, flags); | |
4342 | ||
4343 | for (i = 0; i < host_set->n_ports; i++) { | |
4344 | struct ata_port *ap; | |
4345 | ||
4346 | ap = host_set->ports[i]; | |
c1389503 | 4347 | if (ap && |
198e0fed | 4348 | !(ap->flags & (ATA_FLAG_DISABLED | ATA_FLAG_NOINTR))) { |
1da177e4 LT |
4349 | struct ata_queued_cmd *qc; |
4350 | ||
4351 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
21b1ed74 AL |
4352 | if (qc && (!(qc->tf.ctl & ATA_NIEN)) && |
4353 | (qc->flags & ATA_QCFLAG_ACTIVE)) | |
1da177e4 LT |
4354 | handled |= ata_host_intr(ap, qc); |
4355 | } | |
4356 | } | |
4357 | ||
4358 | spin_unlock_irqrestore(&host_set->lock, flags); | |
4359 | ||
4360 | return IRQ_RETVAL(handled); | |
4361 | } | |
4362 | ||
34bf2170 TH |
4363 | /** |
4364 | * sata_scr_valid - test whether SCRs are accessible | |
4365 | * @ap: ATA port to test SCR accessibility for | |
4366 | * | |
4367 | * Test whether SCRs are accessible for @ap. | |
4368 | * | |
4369 | * LOCKING: | |
4370 | * None. | |
4371 | * | |
4372 | * RETURNS: | |
4373 | * 1 if SCRs are accessible, 0 otherwise. | |
4374 | */ | |
4375 | int sata_scr_valid(struct ata_port *ap) | |
4376 | { | |
4377 | return ap->cbl == ATA_CBL_SATA && ap->ops->scr_read; | |
4378 | } | |
4379 | ||
4380 | /** | |
4381 | * sata_scr_read - read SCR register of the specified port | |
4382 | * @ap: ATA port to read SCR for | |
4383 | * @reg: SCR to read | |
4384 | * @val: Place to store read value | |
4385 | * | |
4386 | * Read SCR register @reg of @ap into *@val. This function is | |
4387 | * guaranteed to succeed if the cable type of the port is SATA | |
4388 | * and the port implements ->scr_read. | |
4389 | * | |
4390 | * LOCKING: | |
4391 | * None. | |
4392 | * | |
4393 | * RETURNS: | |
4394 | * 0 on success, negative errno on failure. | |
4395 | */ | |
4396 | int sata_scr_read(struct ata_port *ap, int reg, u32 *val) | |
4397 | { | |
4398 | if (sata_scr_valid(ap)) { | |
4399 | *val = ap->ops->scr_read(ap, reg); | |
4400 | return 0; | |
4401 | } | |
4402 | return -EOPNOTSUPP; | |
4403 | } | |
4404 | ||
4405 | /** | |
4406 | * sata_scr_write - write SCR register of the specified port | |
4407 | * @ap: ATA port to write SCR for | |
4408 | * @reg: SCR to write | |
4409 | * @val: value to write | |
4410 | * | |
4411 | * Write @val to SCR register @reg of @ap. This function is | |
4412 | * guaranteed to succeed if the cable type of the port is SATA | |
4413 | * and the port implements ->scr_read. | |
4414 | * | |
4415 | * LOCKING: | |
4416 | * None. | |
4417 | * | |
4418 | * RETURNS: | |
4419 | * 0 on success, negative errno on failure. | |
4420 | */ | |
4421 | int sata_scr_write(struct ata_port *ap, int reg, u32 val) | |
4422 | { | |
4423 | if (sata_scr_valid(ap)) { | |
4424 | ap->ops->scr_write(ap, reg, val); | |
4425 | return 0; | |
4426 | } | |
4427 | return -EOPNOTSUPP; | |
4428 | } | |
4429 | ||
4430 | /** | |
4431 | * sata_scr_write_flush - write SCR register of the specified port and flush | |
4432 | * @ap: ATA port to write SCR for | |
4433 | * @reg: SCR to write | |
4434 | * @val: value to write | |
4435 | * | |
4436 | * This function is identical to sata_scr_write() except that this | |
4437 | * function performs flush after writing to the register. | |
4438 | * | |
4439 | * LOCKING: | |
4440 | * None. | |
4441 | * | |
4442 | * RETURNS: | |
4443 | * 0 on success, negative errno on failure. | |
4444 | */ | |
4445 | int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val) | |
4446 | { | |
4447 | if (sata_scr_valid(ap)) { | |
4448 | ap->ops->scr_write(ap, reg, val); | |
4449 | ap->ops->scr_read(ap, reg); | |
4450 | return 0; | |
4451 | } | |
4452 | return -EOPNOTSUPP; | |
4453 | } | |
4454 | ||
4455 | /** | |
4456 | * ata_port_online - test whether the given port is online | |
4457 | * @ap: ATA port to test | |
4458 | * | |
4459 | * Test whether @ap is online. Note that this function returns 0 | |
4460 | * if online status of @ap cannot be obtained, so | |
4461 | * ata_port_online(ap) != !ata_port_offline(ap). | |
4462 | * | |
4463 | * LOCKING: | |
4464 | * None. | |
4465 | * | |
4466 | * RETURNS: | |
4467 | * 1 if the port online status is available and online. | |
4468 | */ | |
4469 | int ata_port_online(struct ata_port *ap) | |
4470 | { | |
4471 | u32 sstatus; | |
4472 | ||
4473 | if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) == 0x3) | |
4474 | return 1; | |
4475 | return 0; | |
4476 | } | |
4477 | ||
4478 | /** | |
4479 | * ata_port_offline - test whether the given port is offline | |
4480 | * @ap: ATA port to test | |
4481 | * | |
4482 | * Test whether @ap is offline. Note that this function returns | |
4483 | * 0 if offline status of @ap cannot be obtained, so | |
4484 | * ata_port_online(ap) != !ata_port_offline(ap). | |
4485 | * | |
4486 | * LOCKING: | |
4487 | * None. | |
4488 | * | |
4489 | * RETURNS: | |
4490 | * 1 if the port offline status is available and offline. | |
4491 | */ | |
4492 | int ata_port_offline(struct ata_port *ap) | |
4493 | { | |
4494 | u32 sstatus; | |
4495 | ||
4496 | if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) != 0x3) | |
4497 | return 1; | |
4498 | return 0; | |
4499 | } | |
0baab86b | 4500 | |
9b847548 JA |
4501 | /* |
4502 | * Execute a 'simple' command, that only consists of the opcode 'cmd' itself, | |
4503 | * without filling any other registers | |
4504 | */ | |
3373efd8 | 4505 | static int ata_do_simple_cmd(struct ata_device *dev, u8 cmd) |
9b847548 JA |
4506 | { |
4507 | struct ata_taskfile tf; | |
4508 | int err; | |
4509 | ||
3373efd8 | 4510 | ata_tf_init(dev, &tf); |
9b847548 JA |
4511 | |
4512 | tf.command = cmd; | |
4513 | tf.flags |= ATA_TFLAG_DEVICE; | |
4514 | tf.protocol = ATA_PROT_NODATA; | |
4515 | ||
3373efd8 | 4516 | err = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0); |
9b847548 | 4517 | if (err) |
f15a1daf TH |
4518 | ata_dev_printk(dev, KERN_ERR, "%s: ata command failed: %d\n", |
4519 | __FUNCTION__, err); | |
9b847548 JA |
4520 | |
4521 | return err; | |
4522 | } | |
4523 | ||
3373efd8 | 4524 | static int ata_flush_cache(struct ata_device *dev) |
9b847548 JA |
4525 | { |
4526 | u8 cmd; | |
4527 | ||
4528 | if (!ata_try_flush_cache(dev)) | |
4529 | return 0; | |
4530 | ||
4531 | if (ata_id_has_flush_ext(dev->id)) | |
4532 | cmd = ATA_CMD_FLUSH_EXT; | |
4533 | else | |
4534 | cmd = ATA_CMD_FLUSH; | |
4535 | ||
3373efd8 | 4536 | return ata_do_simple_cmd(dev, cmd); |
9b847548 JA |
4537 | } |
4538 | ||
3373efd8 | 4539 | static int ata_standby_drive(struct ata_device *dev) |
9b847548 | 4540 | { |
3373efd8 | 4541 | return ata_do_simple_cmd(dev, ATA_CMD_STANDBYNOW1); |
9b847548 JA |
4542 | } |
4543 | ||
3373efd8 | 4544 | static int ata_start_drive(struct ata_device *dev) |
9b847548 | 4545 | { |
3373efd8 | 4546 | return ata_do_simple_cmd(dev, ATA_CMD_IDLEIMMEDIATE); |
9b847548 JA |
4547 | } |
4548 | ||
4549 | /** | |
4550 | * ata_device_resume - wakeup a previously suspended devices | |
c893a3ae | 4551 | * @dev: the device to resume |
9b847548 JA |
4552 | * |
4553 | * Kick the drive back into action, by sending it an idle immediate | |
4554 | * command and making sure its transfer mode matches between drive | |
4555 | * and host. | |
4556 | * | |
4557 | */ | |
3373efd8 | 4558 | int ata_device_resume(struct ata_device *dev) |
9b847548 | 4559 | { |
3373efd8 TH |
4560 | struct ata_port *ap = dev->ap; |
4561 | ||
9b847548 | 4562 | if (ap->flags & ATA_FLAG_SUSPENDED) { |
e82cbdb9 | 4563 | struct ata_device *failed_dev; |
9b847548 | 4564 | ap->flags &= ~ATA_FLAG_SUSPENDED; |
e82cbdb9 | 4565 | while (ata_set_mode(ap, &failed_dev)) |
3373efd8 | 4566 | ata_dev_disable(failed_dev); |
9b847548 | 4567 | } |
e1211e3f | 4568 | if (!ata_dev_enabled(dev)) |
9b847548 JA |
4569 | return 0; |
4570 | if (dev->class == ATA_DEV_ATA) | |
3373efd8 | 4571 | ata_start_drive(dev); |
9b847548 JA |
4572 | |
4573 | return 0; | |
4574 | } | |
4575 | ||
4576 | /** | |
4577 | * ata_device_suspend - prepare a device for suspend | |
c893a3ae | 4578 | * @dev: the device to suspend |
9b847548 JA |
4579 | * |
4580 | * Flush the cache on the drive, if appropriate, then issue a | |
4581 | * standbynow command. | |
9b847548 | 4582 | */ |
3373efd8 | 4583 | int ata_device_suspend(struct ata_device *dev, pm_message_t state) |
9b847548 | 4584 | { |
3373efd8 TH |
4585 | struct ata_port *ap = dev->ap; |
4586 | ||
e1211e3f | 4587 | if (!ata_dev_enabled(dev)) |
9b847548 JA |
4588 | return 0; |
4589 | if (dev->class == ATA_DEV_ATA) | |
3373efd8 | 4590 | ata_flush_cache(dev); |
9b847548 | 4591 | |
082776e4 | 4592 | if (state.event != PM_EVENT_FREEZE) |
3373efd8 | 4593 | ata_standby_drive(dev); |
9b847548 JA |
4594 | ap->flags |= ATA_FLAG_SUSPENDED; |
4595 | return 0; | |
4596 | } | |
4597 | ||
c893a3ae RD |
4598 | /** |
4599 | * ata_port_start - Set port up for dma. | |
4600 | * @ap: Port to initialize | |
4601 | * | |
4602 | * Called just after data structures for each port are | |
4603 | * initialized. Allocates space for PRD table. | |
4604 | * | |
4605 | * May be used as the port_start() entry in ata_port_operations. | |
4606 | * | |
4607 | * LOCKING: | |
4608 | * Inherited from caller. | |
4609 | */ | |
4610 | ||
1da177e4 LT |
4611 | int ata_port_start (struct ata_port *ap) |
4612 | { | |
2f1f610b | 4613 | struct device *dev = ap->dev; |
6037d6bb | 4614 | int rc; |
1da177e4 LT |
4615 | |
4616 | ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL); | |
4617 | if (!ap->prd) | |
4618 | return -ENOMEM; | |
4619 | ||
6037d6bb JG |
4620 | rc = ata_pad_alloc(ap, dev); |
4621 | if (rc) { | |
cedc9a47 | 4622 | dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma); |
6037d6bb | 4623 | return rc; |
cedc9a47 JG |
4624 | } |
4625 | ||
1da177e4 LT |
4626 | DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma); |
4627 | ||
4628 | return 0; | |
4629 | } | |
4630 | ||
0baab86b EF |
4631 | |
4632 | /** | |
4633 | * ata_port_stop - Undo ata_port_start() | |
4634 | * @ap: Port to shut down | |
4635 | * | |
4636 | * Frees the PRD table. | |
4637 | * | |
4638 | * May be used as the port_stop() entry in ata_port_operations. | |
4639 | * | |
4640 | * LOCKING: | |
6f0ef4fa | 4641 | * Inherited from caller. |
0baab86b EF |
4642 | */ |
4643 | ||
1da177e4 LT |
4644 | void ata_port_stop (struct ata_port *ap) |
4645 | { | |
2f1f610b | 4646 | struct device *dev = ap->dev; |
1da177e4 LT |
4647 | |
4648 | dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma); | |
6037d6bb | 4649 | ata_pad_free(ap, dev); |
1da177e4 LT |
4650 | } |
4651 | ||
aa8f0dc6 JG |
4652 | void ata_host_stop (struct ata_host_set *host_set) |
4653 | { | |
4654 | if (host_set->mmio_base) | |
4655 | iounmap(host_set->mmio_base); | |
4656 | } | |
4657 | ||
4658 | ||
1da177e4 LT |
4659 | /** |
4660 | * ata_host_remove - Unregister SCSI host structure with upper layers | |
4661 | * @ap: Port to unregister | |
4662 | * @do_unregister: 1 if we fully unregister, 0 to just stop the port | |
4663 | * | |
4664 | * LOCKING: | |
6f0ef4fa | 4665 | * Inherited from caller. |
1da177e4 LT |
4666 | */ |
4667 | ||
4668 | static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister) | |
4669 | { | |
4670 | struct Scsi_Host *sh = ap->host; | |
4671 | ||
4672 | DPRINTK("ENTER\n"); | |
4673 | ||
4674 | if (do_unregister) | |
4675 | scsi_remove_host(sh); | |
4676 | ||
4677 | ap->ops->port_stop(ap); | |
4678 | } | |
4679 | ||
4680 | /** | |
4681 | * ata_host_init - Initialize an ata_port structure | |
4682 | * @ap: Structure to initialize | |
4683 | * @host: associated SCSI mid-layer structure | |
4684 | * @host_set: Collection of hosts to which @ap belongs | |
4685 | * @ent: Probe information provided by low-level driver | |
4686 | * @port_no: Port number associated with this ata_port | |
4687 | * | |
0cba632b JG |
4688 | * Initialize a new ata_port structure, and its associated |
4689 | * scsi_host. | |
4690 | * | |
1da177e4 | 4691 | * LOCKING: |
0cba632b | 4692 | * Inherited from caller. |
1da177e4 LT |
4693 | */ |
4694 | ||
4695 | static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host, | |
4696 | struct ata_host_set *host_set, | |
057ace5e | 4697 | const struct ata_probe_ent *ent, unsigned int port_no) |
1da177e4 LT |
4698 | { |
4699 | unsigned int i; | |
4700 | ||
4701 | host->max_id = 16; | |
4702 | host->max_lun = 1; | |
4703 | host->max_channel = 1; | |
4704 | host->unique_id = ata_unique_id++; | |
4705 | host->max_cmd_len = 12; | |
12413197 | 4706 | |
198e0fed | 4707 | ap->flags = ATA_FLAG_DISABLED; |
1da177e4 LT |
4708 | ap->id = host->unique_id; |
4709 | ap->host = host; | |
4710 | ap->ctl = ATA_DEVCTL_OBS; | |
4711 | ap->host_set = host_set; | |
2f1f610b | 4712 | ap->dev = ent->dev; |
1da177e4 LT |
4713 | ap->port_no = port_no; |
4714 | ap->hard_port_no = | |
4715 | ent->legacy_mode ? ent->hard_port_no : port_no; | |
4716 | ap->pio_mask = ent->pio_mask; | |
4717 | ap->mwdma_mask = ent->mwdma_mask; | |
4718 | ap->udma_mask = ent->udma_mask; | |
4719 | ap->flags |= ent->host_flags; | |
4720 | ap->ops = ent->port_ops; | |
1c3fae4d | 4721 | ap->sata_spd_limit = UINT_MAX; |
1da177e4 LT |
4722 | ap->active_tag = ATA_TAG_POISON; |
4723 | ap->last_ctl = 0xFF; | |
4724 | ||
86e45b6b | 4725 | INIT_WORK(&ap->port_task, NULL, NULL); |
a72ec4ce | 4726 | INIT_LIST_HEAD(&ap->eh_done_q); |
1da177e4 | 4727 | |
838df628 TH |
4728 | /* set cable type */ |
4729 | ap->cbl = ATA_CBL_NONE; | |
4730 | if (ap->flags & ATA_FLAG_SATA) | |
4731 | ap->cbl = ATA_CBL_SATA; | |
4732 | ||
acf356b1 TH |
4733 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
4734 | struct ata_device *dev = &ap->device[i]; | |
38d87234 | 4735 | dev->ap = ap; |
acf356b1 TH |
4736 | dev->devno = i; |
4737 | dev->pio_mask = UINT_MAX; | |
4738 | dev->mwdma_mask = UINT_MAX; | |
4739 | dev->udma_mask = UINT_MAX; | |
4740 | } | |
1da177e4 LT |
4741 | |
4742 | #ifdef ATA_IRQ_TRAP | |
4743 | ap->stats.unhandled_irq = 1; | |
4744 | ap->stats.idle_irq = 1; | |
4745 | #endif | |
4746 | ||
4747 | memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports)); | |
4748 | } | |
4749 | ||
4750 | /** | |
4751 | * ata_host_add - Attach low-level ATA driver to system | |
4752 | * @ent: Information provided by low-level driver | |
4753 | * @host_set: Collections of ports to which we add | |
4754 | * @port_no: Port number associated with this host | |
4755 | * | |
0cba632b JG |
4756 | * Attach low-level ATA driver to system. |
4757 | * | |
1da177e4 | 4758 | * LOCKING: |
0cba632b | 4759 | * PCI/etc. bus probe sem. |
1da177e4 LT |
4760 | * |
4761 | * RETURNS: | |
0cba632b | 4762 | * New ata_port on success, for NULL on error. |
1da177e4 LT |
4763 | */ |
4764 | ||
057ace5e | 4765 | static struct ata_port * ata_host_add(const struct ata_probe_ent *ent, |
1da177e4 LT |
4766 | struct ata_host_set *host_set, |
4767 | unsigned int port_no) | |
4768 | { | |
4769 | struct Scsi_Host *host; | |
4770 | struct ata_port *ap; | |
4771 | int rc; | |
4772 | ||
4773 | DPRINTK("ENTER\n"); | |
aec5c3c1 TH |
4774 | |
4775 | if (!ent->port_ops->probe_reset && | |
4776 | !(ent->host_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) { | |
4777 | printk(KERN_ERR "ata%u: no reset mechanism available\n", | |
4778 | port_no); | |
4779 | return NULL; | |
4780 | } | |
4781 | ||
1da177e4 LT |
4782 | host = scsi_host_alloc(ent->sht, sizeof(struct ata_port)); |
4783 | if (!host) | |
4784 | return NULL; | |
4785 | ||
30afc84c TH |
4786 | host->transportt = &ata_scsi_transport_template; |
4787 | ||
35bb94b1 | 4788 | ap = ata_shost_to_port(host); |
1da177e4 LT |
4789 | |
4790 | ata_host_init(ap, host, host_set, ent, port_no); | |
4791 | ||
4792 | rc = ap->ops->port_start(ap); | |
4793 | if (rc) | |
4794 | goto err_out; | |
4795 | ||
4796 | return ap; | |
4797 | ||
4798 | err_out: | |
4799 | scsi_host_put(host); | |
4800 | return NULL; | |
4801 | } | |
4802 | ||
4803 | /** | |
0cba632b JG |
4804 | * ata_device_add - Register hardware device with ATA and SCSI layers |
4805 | * @ent: Probe information describing hardware device to be registered | |
4806 | * | |
4807 | * This function processes the information provided in the probe | |
4808 | * information struct @ent, allocates the necessary ATA and SCSI | |
4809 | * host information structures, initializes them, and registers | |
4810 | * everything with requisite kernel subsystems. | |
4811 | * | |
4812 | * This function requests irqs, probes the ATA bus, and probes | |
4813 | * the SCSI bus. | |
1da177e4 LT |
4814 | * |
4815 | * LOCKING: | |
0cba632b | 4816 | * PCI/etc. bus probe sem. |
1da177e4 LT |
4817 | * |
4818 | * RETURNS: | |
0cba632b | 4819 | * Number of ports registered. Zero on error (no ports registered). |
1da177e4 LT |
4820 | */ |
4821 | ||
057ace5e | 4822 | int ata_device_add(const struct ata_probe_ent *ent) |
1da177e4 LT |
4823 | { |
4824 | unsigned int count = 0, i; | |
4825 | struct device *dev = ent->dev; | |
4826 | struct ata_host_set *host_set; | |
4827 | ||
4828 | DPRINTK("ENTER\n"); | |
4829 | /* alloc a container for our list of ATA ports (buses) */ | |
57f3bda8 | 4830 | host_set = kzalloc(sizeof(struct ata_host_set) + |
1da177e4 LT |
4831 | (ent->n_ports * sizeof(void *)), GFP_KERNEL); |
4832 | if (!host_set) | |
4833 | return 0; | |
1da177e4 LT |
4834 | spin_lock_init(&host_set->lock); |
4835 | ||
4836 | host_set->dev = dev; | |
4837 | host_set->n_ports = ent->n_ports; | |
4838 | host_set->irq = ent->irq; | |
4839 | host_set->mmio_base = ent->mmio_base; | |
4840 | host_set->private_data = ent->private_data; | |
4841 | host_set->ops = ent->port_ops; | |
5444a6f4 | 4842 | host_set->flags = ent->host_set_flags; |
1da177e4 LT |
4843 | |
4844 | /* register each port bound to this device */ | |
4845 | for (i = 0; i < ent->n_ports; i++) { | |
4846 | struct ata_port *ap; | |
4847 | unsigned long xfer_mode_mask; | |
4848 | ||
4849 | ap = ata_host_add(ent, host_set, i); | |
4850 | if (!ap) | |
4851 | goto err_out; | |
4852 | ||
4853 | host_set->ports[i] = ap; | |
4854 | xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) | | |
4855 | (ap->mwdma_mask << ATA_SHIFT_MWDMA) | | |
4856 | (ap->pio_mask << ATA_SHIFT_PIO); | |
4857 | ||
4858 | /* print per-port info to dmesg */ | |
f15a1daf TH |
4859 | ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%lX " |
4860 | "ctl 0x%lX bmdma 0x%lX irq %lu\n", | |
4861 | ap->flags & ATA_FLAG_SATA ? 'S' : 'P', | |
4862 | ata_mode_string(xfer_mode_mask), | |
4863 | ap->ioaddr.cmd_addr, | |
4864 | ap->ioaddr.ctl_addr, | |
4865 | ap->ioaddr.bmdma_addr, | |
4866 | ent->irq); | |
1da177e4 LT |
4867 | |
4868 | ata_chk_status(ap); | |
4869 | host_set->ops->irq_clear(ap); | |
4870 | count++; | |
4871 | } | |
4872 | ||
57f3bda8 RD |
4873 | if (!count) |
4874 | goto err_free_ret; | |
1da177e4 LT |
4875 | |
4876 | /* obtain irq, that is shared between channels */ | |
4877 | if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags, | |
4878 | DRV_NAME, host_set)) | |
4879 | goto err_out; | |
4880 | ||
4881 | /* perform each probe synchronously */ | |
4882 | DPRINTK("probe begin\n"); | |
4883 | for (i = 0; i < count; i++) { | |
4884 | struct ata_port *ap; | |
4885 | int rc; | |
4886 | ||
4887 | ap = host_set->ports[i]; | |
4888 | ||
c893a3ae | 4889 | DPRINTK("ata%u: bus probe begin\n", ap->id); |
1da177e4 | 4890 | rc = ata_bus_probe(ap); |
c893a3ae | 4891 | DPRINTK("ata%u: bus probe end\n", ap->id); |
1da177e4 LT |
4892 | |
4893 | if (rc) { | |
4894 | /* FIXME: do something useful here? | |
4895 | * Current libata behavior will | |
4896 | * tear down everything when | |
4897 | * the module is removed | |
4898 | * or the h/w is unplugged. | |
4899 | */ | |
4900 | } | |
4901 | ||
4902 | rc = scsi_add_host(ap->host, dev); | |
4903 | if (rc) { | |
f15a1daf | 4904 | ata_port_printk(ap, KERN_ERR, "scsi_add_host failed\n"); |
1da177e4 LT |
4905 | /* FIXME: do something useful here */ |
4906 | /* FIXME: handle unconditional calls to | |
4907 | * scsi_scan_host and ata_host_remove, below, | |
4908 | * at the very least | |
4909 | */ | |
4910 | } | |
4911 | } | |
4912 | ||
4913 | /* probes are done, now scan each port's disk(s) */ | |
c893a3ae | 4914 | DPRINTK("host probe begin\n"); |
1da177e4 LT |
4915 | for (i = 0; i < count; i++) { |
4916 | struct ata_port *ap = host_set->ports[i]; | |
4917 | ||
644dd0cc | 4918 | ata_scsi_scan_host(ap); |
1da177e4 LT |
4919 | } |
4920 | ||
4921 | dev_set_drvdata(dev, host_set); | |
4922 | ||
4923 | VPRINTK("EXIT, returning %u\n", ent->n_ports); | |
4924 | return ent->n_ports; /* success */ | |
4925 | ||
4926 | err_out: | |
4927 | for (i = 0; i < count; i++) { | |
4928 | ata_host_remove(host_set->ports[i], 1); | |
4929 | scsi_host_put(host_set->ports[i]->host); | |
4930 | } | |
57f3bda8 | 4931 | err_free_ret: |
1da177e4 LT |
4932 | kfree(host_set); |
4933 | VPRINTK("EXIT, returning 0\n"); | |
4934 | return 0; | |
4935 | } | |
4936 | ||
17b14451 AC |
4937 | /** |
4938 | * ata_host_set_remove - PCI layer callback for device removal | |
4939 | * @host_set: ATA host set that was removed | |
4940 | * | |
2e9edbf8 | 4941 | * Unregister all objects associated with this host set. Free those |
17b14451 AC |
4942 | * objects. |
4943 | * | |
4944 | * LOCKING: | |
4945 | * Inherited from calling layer (may sleep). | |
4946 | */ | |
4947 | ||
17b14451 AC |
4948 | void ata_host_set_remove(struct ata_host_set *host_set) |
4949 | { | |
4950 | struct ata_port *ap; | |
4951 | unsigned int i; | |
4952 | ||
4953 | for (i = 0; i < host_set->n_ports; i++) { | |
4954 | ap = host_set->ports[i]; | |
4955 | scsi_remove_host(ap->host); | |
4956 | } | |
4957 | ||
4958 | free_irq(host_set->irq, host_set); | |
4959 | ||
4960 | for (i = 0; i < host_set->n_ports; i++) { | |
4961 | ap = host_set->ports[i]; | |
4962 | ||
4963 | ata_scsi_release(ap->host); | |
4964 | ||
4965 | if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) { | |
4966 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
4967 | ||
4968 | if (ioaddr->cmd_addr == 0x1f0) | |
4969 | release_region(0x1f0, 8); | |
4970 | else if (ioaddr->cmd_addr == 0x170) | |
4971 | release_region(0x170, 8); | |
4972 | } | |
4973 | ||
4974 | scsi_host_put(ap->host); | |
4975 | } | |
4976 | ||
4977 | if (host_set->ops->host_stop) | |
4978 | host_set->ops->host_stop(host_set); | |
4979 | ||
4980 | kfree(host_set); | |
4981 | } | |
4982 | ||
1da177e4 LT |
4983 | /** |
4984 | * ata_scsi_release - SCSI layer callback hook for host unload | |
4985 | * @host: libata host to be unloaded | |
4986 | * | |
4987 | * Performs all duties necessary to shut down a libata port... | |
4988 | * Kill port kthread, disable port, and release resources. | |
4989 | * | |
4990 | * LOCKING: | |
4991 | * Inherited from SCSI layer. | |
4992 | * | |
4993 | * RETURNS: | |
4994 | * One. | |
4995 | */ | |
4996 | ||
4997 | int ata_scsi_release(struct Scsi_Host *host) | |
4998 | { | |
35bb94b1 | 4999 | struct ata_port *ap = ata_shost_to_port(host); |
1da177e4 LT |
5000 | |
5001 | DPRINTK("ENTER\n"); | |
5002 | ||
5003 | ap->ops->port_disable(ap); | |
5004 | ata_host_remove(ap, 0); | |
5005 | ||
5006 | DPRINTK("EXIT\n"); | |
5007 | return 1; | |
5008 | } | |
5009 | ||
5010 | /** | |
5011 | * ata_std_ports - initialize ioaddr with standard port offsets. | |
5012 | * @ioaddr: IO address structure to be initialized | |
0baab86b EF |
5013 | * |
5014 | * Utility function which initializes data_addr, error_addr, | |
5015 | * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr, | |
5016 | * device_addr, status_addr, and command_addr to standard offsets | |
5017 | * relative to cmd_addr. | |
5018 | * | |
5019 | * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr. | |
1da177e4 | 5020 | */ |
0baab86b | 5021 | |
1da177e4 LT |
5022 | void ata_std_ports(struct ata_ioports *ioaddr) |
5023 | { | |
5024 | ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA; | |
5025 | ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR; | |
5026 | ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE; | |
5027 | ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT; | |
5028 | ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL; | |
5029 | ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM; | |
5030 | ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH; | |
5031 | ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE; | |
5032 | ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS; | |
5033 | ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD; | |
5034 | } | |
5035 | ||
0baab86b | 5036 | |
374b1873 JG |
5037 | #ifdef CONFIG_PCI |
5038 | ||
5039 | void ata_pci_host_stop (struct ata_host_set *host_set) | |
5040 | { | |
5041 | struct pci_dev *pdev = to_pci_dev(host_set->dev); | |
5042 | ||
5043 | pci_iounmap(pdev, host_set->mmio_base); | |
5044 | } | |
5045 | ||
1da177e4 LT |
5046 | /** |
5047 | * ata_pci_remove_one - PCI layer callback for device removal | |
5048 | * @pdev: PCI device that was removed | |
5049 | * | |
5050 | * PCI layer indicates to libata via this hook that | |
6f0ef4fa | 5051 | * hot-unplug or module unload event has occurred. |
1da177e4 LT |
5052 | * Handle this by unregistering all objects associated |
5053 | * with this PCI device. Free those objects. Then finally | |
5054 | * release PCI resources and disable device. | |
5055 | * | |
5056 | * LOCKING: | |
5057 | * Inherited from PCI layer (may sleep). | |
5058 | */ | |
5059 | ||
5060 | void ata_pci_remove_one (struct pci_dev *pdev) | |
5061 | { | |
5062 | struct device *dev = pci_dev_to_dev(pdev); | |
5063 | struct ata_host_set *host_set = dev_get_drvdata(dev); | |
1da177e4 | 5064 | |
17b14451 | 5065 | ata_host_set_remove(host_set); |
1da177e4 LT |
5066 | pci_release_regions(pdev); |
5067 | pci_disable_device(pdev); | |
5068 | dev_set_drvdata(dev, NULL); | |
5069 | } | |
5070 | ||
5071 | /* move to PCI subsystem */ | |
057ace5e | 5072 | int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits) |
1da177e4 LT |
5073 | { |
5074 | unsigned long tmp = 0; | |
5075 | ||
5076 | switch (bits->width) { | |
5077 | case 1: { | |
5078 | u8 tmp8 = 0; | |
5079 | pci_read_config_byte(pdev, bits->reg, &tmp8); | |
5080 | tmp = tmp8; | |
5081 | break; | |
5082 | } | |
5083 | case 2: { | |
5084 | u16 tmp16 = 0; | |
5085 | pci_read_config_word(pdev, bits->reg, &tmp16); | |
5086 | tmp = tmp16; | |
5087 | break; | |
5088 | } | |
5089 | case 4: { | |
5090 | u32 tmp32 = 0; | |
5091 | pci_read_config_dword(pdev, bits->reg, &tmp32); | |
5092 | tmp = tmp32; | |
5093 | break; | |
5094 | } | |
5095 | ||
5096 | default: | |
5097 | return -EINVAL; | |
5098 | } | |
5099 | ||
5100 | tmp &= bits->mask; | |
5101 | ||
5102 | return (tmp == bits->val) ? 1 : 0; | |
5103 | } | |
9b847548 JA |
5104 | |
5105 | int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state) | |
5106 | { | |
5107 | pci_save_state(pdev); | |
5108 | pci_disable_device(pdev); | |
5109 | pci_set_power_state(pdev, PCI_D3hot); | |
5110 | return 0; | |
5111 | } | |
5112 | ||
5113 | int ata_pci_device_resume(struct pci_dev *pdev) | |
5114 | { | |
5115 | pci_set_power_state(pdev, PCI_D0); | |
5116 | pci_restore_state(pdev); | |
5117 | pci_enable_device(pdev); | |
5118 | pci_set_master(pdev); | |
5119 | return 0; | |
5120 | } | |
1da177e4 LT |
5121 | #endif /* CONFIG_PCI */ |
5122 | ||
5123 | ||
1da177e4 LT |
5124 | static int __init ata_init(void) |
5125 | { | |
5126 | ata_wq = create_workqueue("ata"); | |
5127 | if (!ata_wq) | |
5128 | return -ENOMEM; | |
5129 | ||
5130 | printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n"); | |
5131 | return 0; | |
5132 | } | |
5133 | ||
5134 | static void __exit ata_exit(void) | |
5135 | { | |
5136 | destroy_workqueue(ata_wq); | |
5137 | } | |
5138 | ||
5139 | module_init(ata_init); | |
5140 | module_exit(ata_exit); | |
5141 | ||
67846b30 JG |
5142 | static unsigned long ratelimit_time; |
5143 | static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED; | |
5144 | ||
5145 | int ata_ratelimit(void) | |
5146 | { | |
5147 | int rc; | |
5148 | unsigned long flags; | |
5149 | ||
5150 | spin_lock_irqsave(&ata_ratelimit_lock, flags); | |
5151 | ||
5152 | if (time_after(jiffies, ratelimit_time)) { | |
5153 | rc = 1; | |
5154 | ratelimit_time = jiffies + (HZ/5); | |
5155 | } else | |
5156 | rc = 0; | |
5157 | ||
5158 | spin_unlock_irqrestore(&ata_ratelimit_lock, flags); | |
5159 | ||
5160 | return rc; | |
5161 | } | |
5162 | ||
c22daff4 TH |
5163 | /** |
5164 | * ata_wait_register - wait until register value changes | |
5165 | * @reg: IO-mapped register | |
5166 | * @mask: Mask to apply to read register value | |
5167 | * @val: Wait condition | |
5168 | * @interval_msec: polling interval in milliseconds | |
5169 | * @timeout_msec: timeout in milliseconds | |
5170 | * | |
5171 | * Waiting for some bits of register to change is a common | |
5172 | * operation for ATA controllers. This function reads 32bit LE | |
5173 | * IO-mapped register @reg and tests for the following condition. | |
5174 | * | |
5175 | * (*@reg & mask) != val | |
5176 | * | |
5177 | * If the condition is met, it returns; otherwise, the process is | |
5178 | * repeated after @interval_msec until timeout. | |
5179 | * | |
5180 | * LOCKING: | |
5181 | * Kernel thread context (may sleep) | |
5182 | * | |
5183 | * RETURNS: | |
5184 | * The final register value. | |
5185 | */ | |
5186 | u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val, | |
5187 | unsigned long interval_msec, | |
5188 | unsigned long timeout_msec) | |
5189 | { | |
5190 | unsigned long timeout; | |
5191 | u32 tmp; | |
5192 | ||
5193 | tmp = ioread32(reg); | |
5194 | ||
5195 | /* Calculate timeout _after_ the first read to make sure | |
5196 | * preceding writes reach the controller before starting to | |
5197 | * eat away the timeout. | |
5198 | */ | |
5199 | timeout = jiffies + (timeout_msec * HZ) / 1000; | |
5200 | ||
5201 | while ((tmp & mask) == val && time_before(jiffies, timeout)) { | |
5202 | msleep(interval_msec); | |
5203 | tmp = ioread32(reg); | |
5204 | } | |
5205 | ||
5206 | return tmp; | |
5207 | } | |
5208 | ||
1da177e4 LT |
5209 | /* |
5210 | * libata is essentially a library of internal helper functions for | |
5211 | * low-level ATA host controller drivers. As such, the API/ABI is | |
5212 | * likely to change as new drivers are added and updated. | |
5213 | * Do not depend on ABI/API stability. | |
5214 | */ | |
5215 | ||
5216 | EXPORT_SYMBOL_GPL(ata_std_bios_param); | |
5217 | EXPORT_SYMBOL_GPL(ata_std_ports); | |
5218 | EXPORT_SYMBOL_GPL(ata_device_add); | |
17b14451 | 5219 | EXPORT_SYMBOL_GPL(ata_host_set_remove); |
1da177e4 LT |
5220 | EXPORT_SYMBOL_GPL(ata_sg_init); |
5221 | EXPORT_SYMBOL_GPL(ata_sg_init_one); | |
76014427 | 5222 | EXPORT_SYMBOL_GPL(__ata_qc_complete); |
1da177e4 | 5223 | EXPORT_SYMBOL_GPL(ata_qc_issue_prot); |
1da177e4 LT |
5224 | EXPORT_SYMBOL_GPL(ata_tf_load); |
5225 | EXPORT_SYMBOL_GPL(ata_tf_read); | |
5226 | EXPORT_SYMBOL_GPL(ata_noop_dev_select); | |
5227 | EXPORT_SYMBOL_GPL(ata_std_dev_select); | |
5228 | EXPORT_SYMBOL_GPL(ata_tf_to_fis); | |
5229 | EXPORT_SYMBOL_GPL(ata_tf_from_fis); | |
5230 | EXPORT_SYMBOL_GPL(ata_check_status); | |
5231 | EXPORT_SYMBOL_GPL(ata_altstatus); | |
1da177e4 LT |
5232 | EXPORT_SYMBOL_GPL(ata_exec_command); |
5233 | EXPORT_SYMBOL_GPL(ata_port_start); | |
5234 | EXPORT_SYMBOL_GPL(ata_port_stop); | |
aa8f0dc6 | 5235 | EXPORT_SYMBOL_GPL(ata_host_stop); |
1da177e4 LT |
5236 | EXPORT_SYMBOL_GPL(ata_interrupt); |
5237 | EXPORT_SYMBOL_GPL(ata_qc_prep); | |
e46834cd | 5238 | EXPORT_SYMBOL_GPL(ata_noop_qc_prep); |
1da177e4 LT |
5239 | EXPORT_SYMBOL_GPL(ata_bmdma_setup); |
5240 | EXPORT_SYMBOL_GPL(ata_bmdma_start); | |
5241 | EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear); | |
5242 | EXPORT_SYMBOL_GPL(ata_bmdma_status); | |
5243 | EXPORT_SYMBOL_GPL(ata_bmdma_stop); | |
5244 | EXPORT_SYMBOL_GPL(ata_port_probe); | |
3c567b7d | 5245 | EXPORT_SYMBOL_GPL(sata_set_spd); |
1da177e4 LT |
5246 | EXPORT_SYMBOL_GPL(sata_phy_reset); |
5247 | EXPORT_SYMBOL_GPL(__sata_phy_reset); | |
5248 | EXPORT_SYMBOL_GPL(ata_bus_reset); | |
8a19ac89 | 5249 | EXPORT_SYMBOL_GPL(ata_std_probeinit); |
c2bd5804 TH |
5250 | EXPORT_SYMBOL_GPL(ata_std_softreset); |
5251 | EXPORT_SYMBOL_GPL(sata_std_hardreset); | |
5252 | EXPORT_SYMBOL_GPL(ata_std_postreset); | |
5253 | EXPORT_SYMBOL_GPL(ata_std_probe_reset); | |
a62c0fc5 | 5254 | EXPORT_SYMBOL_GPL(ata_drive_probe_reset); |
623a3128 | 5255 | EXPORT_SYMBOL_GPL(ata_dev_revalidate); |
2e9edbf8 JG |
5256 | EXPORT_SYMBOL_GPL(ata_dev_classify); |
5257 | EXPORT_SYMBOL_GPL(ata_dev_pair); | |
1da177e4 | 5258 | EXPORT_SYMBOL_GPL(ata_port_disable); |
67846b30 | 5259 | EXPORT_SYMBOL_GPL(ata_ratelimit); |
c22daff4 | 5260 | EXPORT_SYMBOL_GPL(ata_wait_register); |
6f8b9958 | 5261 | EXPORT_SYMBOL_GPL(ata_busy_sleep); |
86e45b6b | 5262 | EXPORT_SYMBOL_GPL(ata_port_queue_task); |
1da177e4 LT |
5263 | EXPORT_SYMBOL_GPL(ata_scsi_ioctl); |
5264 | EXPORT_SYMBOL_GPL(ata_scsi_queuecmd); | |
1da177e4 LT |
5265 | EXPORT_SYMBOL_GPL(ata_scsi_slave_config); |
5266 | EXPORT_SYMBOL_GPL(ata_scsi_release); | |
5267 | EXPORT_SYMBOL_GPL(ata_host_intr); | |
34bf2170 TH |
5268 | EXPORT_SYMBOL_GPL(sata_scr_valid); |
5269 | EXPORT_SYMBOL_GPL(sata_scr_read); | |
5270 | EXPORT_SYMBOL_GPL(sata_scr_write); | |
5271 | EXPORT_SYMBOL_GPL(sata_scr_write_flush); | |
5272 | EXPORT_SYMBOL_GPL(ata_port_online); | |
5273 | EXPORT_SYMBOL_GPL(ata_port_offline); | |
6a62a04d TH |
5274 | EXPORT_SYMBOL_GPL(ata_id_string); |
5275 | EXPORT_SYMBOL_GPL(ata_id_c_string); | |
1da177e4 LT |
5276 | EXPORT_SYMBOL_GPL(ata_scsi_simulate); |
5277 | ||
1bc4ccff | 5278 | EXPORT_SYMBOL_GPL(ata_pio_need_iordy); |
452503f9 AC |
5279 | EXPORT_SYMBOL_GPL(ata_timing_compute); |
5280 | EXPORT_SYMBOL_GPL(ata_timing_merge); | |
5281 | ||
1da177e4 LT |
5282 | #ifdef CONFIG_PCI |
5283 | EXPORT_SYMBOL_GPL(pci_test_config_bits); | |
374b1873 | 5284 | EXPORT_SYMBOL_GPL(ata_pci_host_stop); |
1da177e4 LT |
5285 | EXPORT_SYMBOL_GPL(ata_pci_init_native_mode); |
5286 | EXPORT_SYMBOL_GPL(ata_pci_init_one); | |
5287 | EXPORT_SYMBOL_GPL(ata_pci_remove_one); | |
9b847548 JA |
5288 | EXPORT_SYMBOL_GPL(ata_pci_device_suspend); |
5289 | EXPORT_SYMBOL_GPL(ata_pci_device_resume); | |
67951ade AC |
5290 | EXPORT_SYMBOL_GPL(ata_pci_default_filter); |
5291 | EXPORT_SYMBOL_GPL(ata_pci_clear_simplex); | |
1da177e4 | 5292 | #endif /* CONFIG_PCI */ |
9b847548 JA |
5293 | |
5294 | EXPORT_SYMBOL_GPL(ata_device_suspend); | |
5295 | EXPORT_SYMBOL_GPL(ata_device_resume); | |
5296 | EXPORT_SYMBOL_GPL(ata_scsi_device_suspend); | |
5297 | EXPORT_SYMBOL_GPL(ata_scsi_device_resume); | |
ece1d636 | 5298 | |
ece1d636 TH |
5299 | EXPORT_SYMBOL_GPL(ata_eng_timeout); |
5300 | EXPORT_SYMBOL_GPL(ata_eh_qc_complete); | |
5301 | EXPORT_SYMBOL_GPL(ata_eh_qc_retry); |