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1da177e4 1/*
af36d7f0
JG		 2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
1da177e4
LT		 33 */
34
35#include <linux/config.h>
36#include <linux/kernel.h>
37#include <linux/module.h>
38#include <linux/pci.h>
39#include <linux/init.h>
40#include <linux/list.h>
41#include <linux/mm.h>
42#include <linux/highmem.h>
43#include <linux/spinlock.h>
44#include <linux/blkdev.h>
45#include <linux/delay.h>
46#include <linux/timer.h>
47#include <linux/interrupt.h>
48#include <linux/completion.h>
49#include <linux/suspend.h>
50#include <linux/workqueue.h>
67846b30 51#include <linux/jiffies.h>
378f058c 52#include <linux/scatterlist.h>
1da177e4 53#include <scsi/scsi.h>
1da177e4 54#include "scsi_priv.h"
193515d5 55#include <scsi/scsi_cmnd.h>
1da177e4
LT		 56#include <scsi/scsi_host.h>
57#include <linux/libata.h>
58#include <asm/io.h>
59#include <asm/semaphore.h>
60#include <asm/byteorder.h>
61
62#include "libata.h"
63
6aff8f1f 64static unsigned int ata_dev_init_params(struct ata_port *ap,
00b6f5e9
AL		 65 struct ata_device *dev,
66 u16 heads,
67 u16 sectors);
83206a29
TH		 68static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
69 struct ata_device *dev);
acf356b1 70static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev);
1da177e4
LT		 71
72static unsigned int ata_unique_id = 1;
73static struct workqueue_struct *ata_wq;
74
418dc1f5 75int atapi_enabled = 1;
1623c81e
JG		 76module_param(atapi_enabled, int, 0444);
77MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
78
c3c013a2
JG		 79int libata_fua = 0;
80module_param_named(fua, libata_fua, int, 0444);
81MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
82
1da177e4
LT		 83MODULE_AUTHOR("Jeff Garzik");
84MODULE_DESCRIPTION("Library module for ATA devices");
85MODULE_LICENSE("GPL");
86MODULE_VERSION(DRV_VERSION);
87
0baab86b 88
1da177e4
LT		 89/**
90 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
91 * @tf: Taskfile to convert
92 * @fis: Buffer into which data will output
93 * @pmp: Port multiplier port
94 *
95 * Converts a standard ATA taskfile to a Serial ATA
96 * FIS structure (Register - Host to Device).
97 *
98 * LOCKING:
99 * Inherited from caller.
100 */
101
057ace5e 102void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
1da177e4
LT		 103{
104 fis[0] = 0x27; /* Register - Host to Device FIS */
105 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
106 bit 7 indicates Command FIS */
107 fis[2] = tf->command;
108 fis[3] = tf->feature;
109
110 fis[4] = tf->lbal;
111 fis[5] = tf->lbam;
112 fis[6] = tf->lbah;
113 fis[7] = tf->device;
114
115 fis[8] = tf->hob_lbal;
116 fis[9] = tf->hob_lbam;
117 fis[10] = tf->hob_lbah;
118 fis[11] = tf->hob_feature;
119
120 fis[12] = tf->nsect;
121 fis[13] = tf->hob_nsect;
122 fis[14] = 0;
123 fis[15] = tf->ctl;
124
125 fis[16] = 0;
126 fis[17] = 0;
127 fis[18] = 0;
128 fis[19] = 0;
129}
130
131/**
132 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
133 * @fis: Buffer from which data will be input
134 * @tf: Taskfile to output
135 *
e12a1be6 136 * Converts a serial ATA FIS structure to a standard ATA taskfile.
1da177e4
LT		 137 *
138 * LOCKING:
139 * Inherited from caller.
140 */
141
057ace5e 142void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
1da177e4
LT		 143{
144 tf->command = fis[2]; /* status */
145 tf->feature = fis[3]; /* error */
146
147 tf->lbal = fis[4];
148 tf->lbam = fis[5];
149 tf->lbah = fis[6];
150 tf->device = fis[7];
151
152 tf->hob_lbal = fis[8];
153 tf->hob_lbam = fis[9];
154 tf->hob_lbah = fis[10];
155
156 tf->nsect = fis[12];
157 tf->hob_nsect = fis[13];
158}
159
8cbd6df1
AL		 160static const u8 ata_rw_cmds[] = {
161 /* pio multi */
162 ATA_CMD_READ_MULTI,
163 ATA_CMD_WRITE_MULTI,
164 ATA_CMD_READ_MULTI_EXT,
165 ATA_CMD_WRITE_MULTI_EXT,
9a3dccc4
TH		 166 0,
167 0,
168 0,
169 ATA_CMD_WRITE_MULTI_FUA_EXT,
8cbd6df1
AL		 170 /* pio */
171 ATA_CMD_PIO_READ,
172 ATA_CMD_PIO_WRITE,
173 ATA_CMD_PIO_READ_EXT,
174 ATA_CMD_PIO_WRITE_EXT,
9a3dccc4
TH		 175 0,
176 0,
177 0,
178 0,
8cbd6df1
AL		 179 /* dma */
180 ATA_CMD_READ,
181 ATA_CMD_WRITE,
182 ATA_CMD_READ_EXT,
9a3dccc4
TH		 183 ATA_CMD_WRITE_EXT,
184 0,
185 0,
186 0,
187 ATA_CMD_WRITE_FUA_EXT
8cbd6df1 188};
1da177e4
LT		 189
190/**
8cbd6df1
AL		 191 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
192 * @qc: command to examine and configure
1da177e4 193 *
2e9edbf8 194 * Examine the device configuration and tf->flags to calculate
8cbd6df1 195 * the proper read/write commands and protocol to use.
1da177e4
LT		 196 *
197 * LOCKING:
198 * caller.
199 */
9a3dccc4 200int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
1da177e4 201{
8cbd6df1
AL		 202 struct ata_taskfile *tf = &qc->tf;
203 struct ata_device *dev = qc->dev;
9a3dccc4 204 u8 cmd;
1da177e4 205
9a3dccc4 206 int index, fua, lba48, write;
2e9edbf8 207
9a3dccc4 208 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
8cbd6df1
AL		 209 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
210 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
1da177e4 211
8cbd6df1
AL		 212 if (dev->flags & ATA_DFLAG_PIO) {
213 tf->protocol = ATA_PROT_PIO;
9a3dccc4 214 index = dev->multi_count ? 0 : 8;
8d238e01
AC		 215 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
216 /* Unable to use DMA due to host limitation */
217 tf->protocol = ATA_PROT_PIO;
0565c26d 218 index = dev->multi_count ? 0 : 8;
8cbd6df1
AL		 219 } else {
220 tf->protocol = ATA_PROT_DMA;
9a3dccc4 221 index = 16;
8cbd6df1 222 }
1da177e4 223
9a3dccc4
TH		 224 cmd = ata_rw_cmds[index + fua + lba48 + write];
225 if (cmd) {
226 tf->command = cmd;
227 return 0;
228 }
229 return -1;
1da177e4
LT		 230}
231
cb95d562
TH		 232/**
233 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
234 * @pio_mask: pio_mask
235 * @mwdma_mask: mwdma_mask
236 * @udma_mask: udma_mask
237 *
238 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
239 * unsigned int xfer_mask.
240 *
241 * LOCKING:
242 * None.
243 *
244 * RETURNS:
245 * Packed xfer_mask.
246 */
247static unsigned int ata_pack_xfermask(unsigned int pio_mask,
248 unsigned int mwdma_mask,
249 unsigned int udma_mask)
250{
251 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
252 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
253 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
254}
255
c0489e4e
TH		 256/**
257 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
258 * @xfer_mask: xfer_mask to unpack
259 * @pio_mask: resulting pio_mask
260 * @mwdma_mask: resulting mwdma_mask
261 * @udma_mask: resulting udma_mask
262 *
263 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
264 * Any NULL distination masks will be ignored.
265 */
266static void ata_unpack_xfermask(unsigned int xfer_mask,
267 unsigned int *pio_mask,
268 unsigned int *mwdma_mask,
269 unsigned int *udma_mask)
270{
271 if (pio_mask)
272 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
273 if (mwdma_mask)
274 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
275 if (udma_mask)
276 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
277}
278
cb95d562 279static const struct ata_xfer_ent {
be9a50c8 280 int shift, bits;
cb95d562
TH		 281 u8 base;
282} ata_xfer_tbl[] = {
283 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
284 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
285 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
286 { -1, },
287};
288
289/**
290 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
291 * @xfer_mask: xfer_mask of interest
292 *
293 * Return matching XFER_* value for @xfer_mask. Only the highest
294 * bit of @xfer_mask is considered.
295 *
296 * LOCKING:
297 * None.
298 *
299 * RETURNS:
300 * Matching XFER_* value, 0 if no match found.
301 */
302static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
303{
304 int highbit = fls(xfer_mask) - 1;
305 const struct ata_xfer_ent *ent;
306
307 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
308 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
309 return ent->base + highbit - ent->shift;
310 return 0;
311}
312
313/**
314 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
315 * @xfer_mode: XFER_* of interest
316 *
317 * Return matching xfer_mask for @xfer_mode.
318 *
319 * LOCKING:
320 * None.
321 *
322 * RETURNS:
323 * Matching xfer_mask, 0 if no match found.
324 */
325static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
326{
327 const struct ata_xfer_ent *ent;
328
329 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
330 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
331 return 1 << (ent->shift + xfer_mode - ent->base);
332 return 0;
333}
334
335/**
336 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
337 * @xfer_mode: XFER_* of interest
338 *
339 * Return matching xfer_shift for @xfer_mode.
340 *
341 * LOCKING:
342 * None.
343 *
344 * RETURNS:
345 * Matching xfer_shift, -1 if no match found.
346 */
347static int ata_xfer_mode2shift(unsigned int xfer_mode)
348{
349 const struct ata_xfer_ent *ent;
350
351 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
352 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
353 return ent->shift;
354 return -1;
355}
356
1da177e4 357/**
1da7b0d0
TH		 358 * ata_mode_string - convert xfer_mask to string
359 * @xfer_mask: mask of bits supported; only highest bit counts.
1da177e4
LT		 360 *
361 * Determine string which represents the highest speed
1da7b0d0 362 * (highest bit in @modemask).
1da177e4
LT		 363 *
364 * LOCKING:
365 * None.
366 *
367 * RETURNS:
368 * Constant C string representing highest speed listed in
1da7b0d0 369 * @mode_mask, or the constant C string "<n/a>".
1da177e4 370 */
1da7b0d0 371static const char *ata_mode_string(unsigned int xfer_mask)
1da177e4 372{
75f554bc
TH		 373 static const char * const xfer_mode_str[] = {
374 "PIO0",
375 "PIO1",
376 "PIO2",
377 "PIO3",
378 "PIO4",
379 "MWDMA0",
380 "MWDMA1",
381 "MWDMA2",
382 "UDMA/16",
383 "UDMA/25",
384 "UDMA/33",
385 "UDMA/44",
386 "UDMA/66",
387 "UDMA/100",
388 "UDMA/133",
389 "UDMA7",
390 };
1da7b0d0 391 int highbit;
1da177e4 392
1da7b0d0
TH		 393 highbit = fls(xfer_mask) - 1;
394 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
395 return xfer_mode_str[highbit];
1da177e4 396 return "<n/a>";
1da177e4
LT		 397}
398
4c360c81
TH		 399static const char *sata_spd_string(unsigned int spd)
400{
401 static const char * const spd_str[] = {
402 "1.5 Gbps",
403 "3.0 Gbps",
404 };
405
406 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
407 return "<unknown>";
408 return spd_str[spd - 1];
409}
410
1ad8e7f9 411void ata_dev_disable(struct ata_port *ap, struct ata_device *dev)
0b8efb0a 412{
e1211e3f 413 if (ata_dev_enabled(dev)) {
0b8efb0a
TH		 414 printk(KERN_WARNING "ata%u: dev %u disabled\n",
415 ap->id, dev->devno);
416 dev->class++;
417 }
418}
419
1da177e4
LT		 420/**
421 * ata_pio_devchk - PATA device presence detection
422 * @ap: ATA channel to examine
423 * @device: Device to examine (starting at zero)
424 *
425 * This technique was originally described in
426 * Hale Landis's ATADRVR (www.ata-atapi.com), and
427 * later found its way into the ATA/ATAPI spec.
428 *
429 * Write a pattern to the ATA shadow registers,
430 * and if a device is present, it will respond by
431 * correctly storing and echoing back the
432 * ATA shadow register contents.
433 *
434 * LOCKING:
435 * caller.
436 */
437
438static unsigned int ata_pio_devchk(struct ata_port *ap,
439 unsigned int device)
440{
441 struct ata_ioports *ioaddr = &ap->ioaddr;
442 u8 nsect, lbal;
443
444 ap->ops->dev_select(ap, device);
445
446 outb(0x55, ioaddr->nsect_addr);
447 outb(0xaa, ioaddr->lbal_addr);
448
449 outb(0xaa, ioaddr->nsect_addr);
450 outb(0x55, ioaddr->lbal_addr);
451
452 outb(0x55, ioaddr->nsect_addr);
453 outb(0xaa, ioaddr->lbal_addr);
454
455 nsect = inb(ioaddr->nsect_addr);
456 lbal = inb(ioaddr->lbal_addr);
457
458 if ((nsect == 0x55) && (lbal == 0xaa))
459 return 1; /* we found a device */
460
461 return 0; /* nothing found */
462}
463
464/**
465 * ata_mmio_devchk - PATA device presence detection
466 * @ap: ATA channel to examine
467 * @device: Device to examine (starting at zero)
468 *
469 * This technique was originally described in
470 * Hale Landis's ATADRVR (www.ata-atapi.com), and
471 * later found its way into the ATA/ATAPI spec.
472 *
473 * Write a pattern to the ATA shadow registers,
474 * and if a device is present, it will respond by
475 * correctly storing and echoing back the
476 * ATA shadow register contents.
477 *
478 * LOCKING:
479 * caller.
480 */
481
482static unsigned int ata_mmio_devchk(struct ata_port *ap,
483 unsigned int device)
484{
485 struct ata_ioports *ioaddr = &ap->ioaddr;
486 u8 nsect, lbal;
487
488 ap->ops->dev_select(ap, device);
489
490 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
491 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
492
493 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
494 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
495
496 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
497 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
498
499 nsect = readb((void __iomem *) ioaddr->nsect_addr);
500 lbal = readb((void __iomem *) ioaddr->lbal_addr);
501
502 if ((nsect == 0x55) && (lbal == 0xaa))
503 return 1; /* we found a device */
504
505 return 0; /* nothing found */
506}
507
508/**
509 * ata_devchk - PATA device presence detection
510 * @ap: ATA channel to examine
511 * @device: Device to examine (starting at zero)
512 *
513 * Dispatch ATA device presence detection, depending
514 * on whether we are using PIO or MMIO to talk to the
515 * ATA shadow registers.
516 *
517 * LOCKING:
518 * caller.
519 */
520
521static unsigned int ata_devchk(struct ata_port *ap,
522 unsigned int device)
523{
524 if (ap->flags & ATA_FLAG_MMIO)
525 return ata_mmio_devchk(ap, device);
526 return ata_pio_devchk(ap, device);
527}
528
529/**
530 * ata_dev_classify - determine device type based on ATA-spec signature
531 * @tf: ATA taskfile register set for device to be identified
532 *
533 * Determine from taskfile register contents whether a device is
534 * ATA or ATAPI, as per "Signature and persistence" section
535 * of ATA/PI spec (volume 1, sect 5.14).
536 *
537 * LOCKING:
538 * None.
539 *
540 * RETURNS:
541 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
542 * the event of failure.
543 */
544
057ace5e 545unsigned int ata_dev_classify(const struct ata_taskfile *tf)
1da177e4
LT		 546{
547 /* Apple's open source Darwin code hints that some devices only
548 * put a proper signature into the LBA mid/high registers,
549 * So, we only check those. It's sufficient for uniqueness.
550 */
551
552 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
553 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
554 DPRINTK("found ATA device by sig\n");
555 return ATA_DEV_ATA;
556 }
557
558 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
559 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
560 DPRINTK("found ATAPI device by sig\n");
561 return ATA_DEV_ATAPI;
562 }
563
564 DPRINTK("unknown device\n");
565 return ATA_DEV_UNKNOWN;
566}
567
568/**
569 * ata_dev_try_classify - Parse returned ATA device signature
570 * @ap: ATA channel to examine
571 * @device: Device to examine (starting at zero)
b4dc7623 572 * @r_err: Value of error register on completion
1da177e4
LT		 573 *
574 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
575 * an ATA/ATAPI-defined set of values is placed in the ATA
576 * shadow registers, indicating the results of device detection
577 * and diagnostics.
578 *
579 * Select the ATA device, and read the values from the ATA shadow
580 * registers. Then parse according to the Error register value,
581 * and the spec-defined values examined by ata_dev_classify().
582 *
583 * LOCKING:
584 * caller.
b4dc7623
TH		 585 *
586 * RETURNS:
587 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
1da177e4
LT		 588 */
589
b4dc7623
TH		 590static unsigned int
591ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
1da177e4 592{
1da177e4
LT		 593 struct ata_taskfile tf;
594 unsigned int class;
595 u8 err;
596
597 ap->ops->dev_select(ap, device);
598
599 memset(&tf, 0, sizeof(tf));
600
1da177e4 601 ap->ops->tf_read(ap, &tf);
0169e284 602 err = tf.feature;
b4dc7623
TH		 603 if (r_err)
604 *r_err = err;
1da177e4
LT		 605
606 /* see if device passed diags */
607 if (err == 1)
608 /* do nothing */ ;
609 else if ((device == 0) && (err == 0x81))
610 /* do nothing */ ;
611 else
b4dc7623 612 return ATA_DEV_NONE;
1da177e4 613
b4dc7623 614 /* determine if device is ATA or ATAPI */
1da177e4 615 class = ata_dev_classify(&tf);
b4dc7623 616
1da177e4 617 if (class == ATA_DEV_UNKNOWN)
b4dc7623 618 return ATA_DEV_NONE;
1da177e4 619 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
b4dc7623
TH		 620 return ATA_DEV_NONE;
621 return class;
1da177e4
LT		 622}
623
624/**
6a62a04d 625 * ata_id_string - Convert IDENTIFY DEVICE page into string
1da177e4
LT		 626 * @id: IDENTIFY DEVICE results we will examine
627 * @s: string into which data is output
628 * @ofs: offset into identify device page
629 * @len: length of string to return. must be an even number.
630 *
631 * The strings in the IDENTIFY DEVICE page are broken up into
632 * 16-bit chunks. Run through the string, and output each
633 * 8-bit chunk linearly, regardless of platform.
634 *
635 * LOCKING:
636 * caller.
637 */
638
6a62a04d
TH		 639void ata_id_string(const u16 *id, unsigned char *s,
640 unsigned int ofs, unsigned int len)
1da177e4
LT		 641{
642 unsigned int c;
643
644 while (len > 0) {
645 c = id[ofs] >> 8;
646 *s = c;
647 s++;
648
649 c = id[ofs] & 0xff;
650 *s = c;
651 s++;
652
653 ofs++;
654 len -= 2;
655 }
656}
657
0e949ff3 658/**
6a62a04d 659 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
0e949ff3
TH		 660 * @id: IDENTIFY DEVICE results we will examine
661 * @s: string into which data is output
662 * @ofs: offset into identify device page
663 * @len: length of string to return. must be an odd number.
664 *
6a62a04d 665 * This function is identical to ata_id_string except that it
0e949ff3
TH		 666 * trims trailing spaces and terminates the resulting string with
667 * null. @len must be actual maximum length (even number) + 1.
668 *
669 * LOCKING:
670 * caller.
671 */
6a62a04d
TH		 672void ata_id_c_string(const u16 *id, unsigned char *s,
673 unsigned int ofs, unsigned int len)
0e949ff3
TH		 674{
675 unsigned char *p;
676
677 WARN_ON(!(len & 1));
678
6a62a04d 679 ata_id_string(id, s, ofs, len - 1);
0e949ff3
TH		 680
681 p = s + strnlen(s, len - 1);
682 while (p > s && p[-1] == ' ')
683 p--;
684 *p = '\0';
685}
0baab86b 686
2940740b
TH		 687static u64 ata_id_n_sectors(const u16 *id)
688{
689 if (ata_id_has_lba(id)) {
690 if (ata_id_has_lba48(id))
691 return ata_id_u64(id, 100);
692 else
693 return ata_id_u32(id, 60);
694 } else {
695 if (ata_id_current_chs_valid(id))
696 return ata_id_u32(id, 57);
697 else
698 return id[1] * id[3] * id[6];
699 }
700}
701
0baab86b
EF		 702/**
703 * ata_noop_dev_select - Select device 0/1 on ATA bus
704 * @ap: ATA channel to manipulate
705 * @device: ATA device (numbered from zero) to select
706 *
707 * This function performs no actual function.
708 *
709 * May be used as the dev_select() entry in ata_port_operations.
710 *
711 * LOCKING:
712 * caller.
713 */
1da177e4
LT		 714void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
715{
716}
717
0baab86b 718
1da177e4
LT		 719/**
720 * ata_std_dev_select - Select device 0/1 on ATA bus
721 * @ap: ATA channel to manipulate
722 * @device: ATA device (numbered from zero) to select
723 *
724 * Use the method defined in the ATA specification to
725 * make either device 0, or device 1, active on the
0baab86b
EF		 726 * ATA channel. Works with both PIO and MMIO.
727 *
728 * May be used as the dev_select() entry in ata_port_operations.
1da177e4
LT		 729 *
730 * LOCKING:
731 * caller.
732 */
733
734void ata_std_dev_select (struct ata_port *ap, unsigned int device)
735{
736 u8 tmp;
737
738 if (device == 0)
739 tmp = ATA_DEVICE_OBS;
740 else
741 tmp = ATA_DEVICE_OBS | ATA_DEV1;
742
743 if (ap->flags & ATA_FLAG_MMIO) {
744 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
745 } else {
746 outb(tmp, ap->ioaddr.device_addr);
747 }
748 ata_pause(ap); /* needed; also flushes, for mmio */
749}
750
751/**
752 * ata_dev_select - Select device 0/1 on ATA bus
753 * @ap: ATA channel to manipulate
754 * @device: ATA device (numbered from zero) to select
755 * @wait: non-zero to wait for Status register BSY bit to clear
756 * @can_sleep: non-zero if context allows sleeping
757 *
758 * Use the method defined in the ATA specification to
759 * make either device 0, or device 1, active on the
760 * ATA channel.
761 *
762 * This is a high-level version of ata_std_dev_select(),
763 * which additionally provides the services of inserting
764 * the proper pauses and status polling, where needed.
765 *
766 * LOCKING:
767 * caller.
768 */
769
770void ata_dev_select(struct ata_port *ap, unsigned int device,
771 unsigned int wait, unsigned int can_sleep)
772{
773 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
774 ap->id, device, wait);
775
776 if (wait)
777 ata_wait_idle(ap);
778
779 ap->ops->dev_select(ap, device);
780
781 if (wait) {
782 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
783 msleep(150);
784 ata_wait_idle(ap);
785 }
786}
787
788/**
789 * ata_dump_id - IDENTIFY DEVICE info debugging output
0bd3300a 790 * @id: IDENTIFY DEVICE page to dump
1da177e4 791 *
0bd3300a
TH		 792 * Dump selected 16-bit words from the given IDENTIFY DEVICE
793 * page.
1da177e4
LT		 794 *
795 * LOCKING:
796 * caller.
797 */
798
0bd3300a 799static inline void ata_dump_id(const u16 *id)
1da177e4
LT		 800{
801 DPRINTK("49==0x%04x "
802 "53==0x%04x "
803 "63==0x%04x "
804 "64==0x%04x "
805 "75==0x%04x \n",
0bd3300a
TH		 806 id[49],
807 id[53],
808 id[63],
809 id[64],
810 id[75]);
1da177e4
LT		 811 DPRINTK("80==0x%04x "
812 "81==0x%04x "
813 "82==0x%04x "
814 "83==0x%04x "
815 "84==0x%04x \n",
0bd3300a
TH		 816 id[80],
817 id[81],
818 id[82],
819 id[83],
820 id[84]);
1da177e4
LT		 821 DPRINTK("88==0x%04x "
822 "93==0x%04x\n",
0bd3300a
TH		 823 id[88],
824 id[93]);
1da177e4
LT		 825}
826
cb95d562
TH		 827/**
828 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
829 * @id: IDENTIFY data to compute xfer mask from
830 *
831 * Compute the xfermask for this device. This is not as trivial
832 * as it seems if we must consider early devices correctly.
833 *
834 * FIXME: pre IDE drive timing (do we care ?).
835 *
836 * LOCKING:
837 * None.
838 *
839 * RETURNS:
840 * Computed xfermask
841 */
842static unsigned int ata_id_xfermask(const u16 *id)
843{
844 unsigned int pio_mask, mwdma_mask, udma_mask;
845
846 /* Usual case. Word 53 indicates word 64 is valid */
847 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
848 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
849 pio_mask <<= 3;
850 pio_mask |= 0x7;
851 } else {
852 /* If word 64 isn't valid then Word 51 high byte holds
853 * the PIO timing number for the maximum. Turn it into
854 * a mask.
855 */
856 pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
857
858 /* But wait.. there's more. Design your standards by
859 * committee and you too can get a free iordy field to
860 * process. However its the speeds not the modes that
861 * are supported... Note drivers using the timing API
862 * will get this right anyway
863 */
864 }
865
866 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
fb21f0d0
TH		 867
868 udma_mask = 0;
869 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
870 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
cb95d562
TH		 871
872 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
873}
874
86e45b6b
TH		 875/**
876 * ata_port_queue_task - Queue port_task
877 * @ap: The ata_port to queue port_task for
878 *
879 * Schedule @fn(@data) for execution after @delay jiffies using
880 * port_task. There is one port_task per port and it's the
881 * user(low level driver)'s responsibility to make sure that only
882 * one task is active at any given time.
883 *
884 * libata core layer takes care of synchronization between
885 * port_task and EH. ata_port_queue_task() may be ignored for EH
886 * synchronization.
887 *
888 * LOCKING:
889 * Inherited from caller.
890 */
891void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
892 unsigned long delay)
893{
894 int rc;
895
2e755f68 896 if (ap->flags & ATA_FLAG_FLUSH_PORT_TASK)
86e45b6b
TH		 897 return;
898
899 PREPARE_WORK(&ap->port_task, fn, data);
900
901 if (!delay)
902 rc = queue_work(ata_wq, &ap->port_task);
903 else
904 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
905
906 /* rc == 0 means that another user is using port task */
907 WARN_ON(rc == 0);
908}
909
910/**
911 * ata_port_flush_task - Flush port_task
912 * @ap: The ata_port to flush port_task for
913 *
914 * After this function completes, port_task is guranteed not to
915 * be running or scheduled.
916 *
917 * LOCKING:
918 * Kernel thread context (may sleep)
919 */
920void ata_port_flush_task(struct ata_port *ap)
921{
922 unsigned long flags;
923
924 DPRINTK("ENTER\n");
925
926 spin_lock_irqsave(&ap->host_set->lock, flags);
2e755f68 927 ap->flags |= ATA_FLAG_FLUSH_PORT_TASK;
86e45b6b
TH		 928 spin_unlock_irqrestore(&ap->host_set->lock, flags);
929
930 DPRINTK("flush #1\n");
931 flush_workqueue(ata_wq);
932
933 /*
934 * At this point, if a task is running, it's guaranteed to see
935 * the FLUSH flag; thus, it will never queue pio tasks again.
936 * Cancel and flush.
937 */
938 if (!cancel_delayed_work(&ap->port_task)) {
939 DPRINTK("flush #2\n");
940 flush_workqueue(ata_wq);
941 }
942
943 spin_lock_irqsave(&ap->host_set->lock, flags);
2e755f68 944 ap->flags &= ~ATA_FLAG_FLUSH_PORT_TASK;
86e45b6b
TH		 945 spin_unlock_irqrestore(&ap->host_set->lock, flags);
946
947 DPRINTK("EXIT\n");
948}
949
77853bf2 950void ata_qc_complete_internal(struct ata_queued_cmd *qc)
a2a7a662 951{
77853bf2 952 struct completion *waiting = qc->private_data;
a2a7a662 953
77853bf2 954 qc->ap->ops->tf_read(qc->ap, &qc->tf);
a2a7a662 955 complete(waiting);
a2a7a662
TH		 956}
957
958/**
959 * ata_exec_internal - execute libata internal command
960 * @ap: Port to which the command is sent
961 * @dev: Device to which the command is sent
962 * @tf: Taskfile registers for the command and the result
d69cf37d 963 * @cdb: CDB for packet command
a2a7a662
TH		 964 * @dma_dir: Data tranfer direction of the command
965 * @buf: Data buffer of the command
966 * @buflen: Length of data buffer
967 *
968 * Executes libata internal command with timeout. @tf contains
969 * command on entry and result on return. Timeout and error
970 * conditions are reported via return value. No recovery action
971 * is taken after a command times out. It's caller's duty to
972 * clean up after timeout.
973 *
974 * LOCKING:
975 * None. Should be called with kernel context, might sleep.
976 */
977
1ad8e7f9
TH		 978unsigned ata_exec_internal(struct ata_port *ap, struct ata_device *dev,
979 struct ata_taskfile *tf, const u8 *cdb,
980 int dma_dir, void *buf, unsigned int buflen)
a2a7a662
TH		 981{
982 u8 command = tf->command;
983 struct ata_queued_cmd *qc;
984 DECLARE_COMPLETION(wait);
985 unsigned long flags;
77853bf2 986 unsigned int err_mask;
a2a7a662
TH		 987
988 spin_lock_irqsave(&ap->host_set->lock, flags);
989
990 qc = ata_qc_new_init(ap, dev);
991 BUG_ON(qc == NULL);
992
993 qc->tf = *tf;
d69cf37d
TH		 994 if (cdb)
995 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
a2a7a662
TH		 996 qc->dma_dir = dma_dir;
997 if (dma_dir != DMA_NONE) {
998 ata_sg_init_one(qc, buf, buflen);
999 qc->nsect = buflen / ATA_SECT_SIZE;
1000 }
1001
77853bf2 1002 qc->private_data = &wait;
a2a7a662
TH		 1003 qc->complete_fn = ata_qc_complete_internal;
1004
8e0e694a 1005 ata_qc_issue(qc);
a2a7a662
TH		 1006
1007 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1008
1009 if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
41ade50c
AL		 1010 ata_port_flush_task(ap);
1011
a2a7a662
TH		 1012 spin_lock_irqsave(&ap->host_set->lock, flags);
1013
1014 /* We're racing with irq here. If we lose, the
1015 * following test prevents us from completing the qc
1016 * again. If completion irq occurs after here but
1017 * before the caller cleans up, it will result in a
1018 * spurious interrupt. We can live with that.
1019 */
77853bf2 1020 if (qc->flags & ATA_QCFLAG_ACTIVE) {
11a56d24 1021 qc->err_mask = AC_ERR_TIMEOUT;
a2a7a662
TH		 1022 ata_qc_complete(qc);
1023 printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n",
1024 ap->id, command);
1025 }
1026
1027 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1028 }
1029
77853bf2
TH		 1030 *tf = qc->tf;
1031 err_mask = qc->err_mask;
1032
1033 ata_qc_free(qc);
1034
1f7dd3e9
TH		 1035 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1036 * Until those drivers are fixed, we detect the condition
1037 * here, fail the command with AC_ERR_SYSTEM and reenable the
1038 * port.
1039 *
1040 * Note that this doesn't change any behavior as internal
1041 * command failure results in disabling the device in the
1042 * higher layer for LLDDs without new reset/EH callbacks.
1043 *
1044 * Kill the following code as soon as those drivers are fixed.
1045 */
198e0fed 1046 if (ap->flags & ATA_FLAG_DISABLED) {
1f7dd3e9
TH		 1047 err_mask |= AC_ERR_SYSTEM;
1048 ata_port_probe(ap);
1049 }
1050
77853bf2 1051 return err_mask;
a2a7a662
TH		 1052}
1053
1bc4ccff
AC		 1054/**
1055 * ata_pio_need_iordy - check if iordy needed
1056 * @adev: ATA device
1057 *
1058 * Check if the current speed of the device requires IORDY. Used
1059 * by various controllers for chip configuration.
1060 */
1061
1062unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1063{
1064 int pio;
1065 int speed = adev->pio_mode - XFER_PIO_0;
1066
1067 if (speed < 2)
1068 return 0;
1069 if (speed > 2)
1070 return 1;
2e9edbf8 1071
1bc4ccff
AC		 1072 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1073
1074 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1075 pio = adev->id[ATA_ID_EIDE_PIO];
1076 /* Is the speed faster than the drive allows non IORDY ? */
1077 if (pio) {
1078 /* This is cycle times not frequency - watch the logic! */
1079 if (pio > 240) /* PIO2 is 240nS per cycle */
1080 return 1;
1081 return 0;
1082 }
1083 }
1084 return 0;
1085}
1086
1da177e4 1087/**
49016aca
TH		 1088 * ata_dev_read_id - Read ID data from the specified device
1089 * @ap: port on which target device resides
1090 * @dev: target device
1091 * @p_class: pointer to class of the target device (may be changed)
1092 * @post_reset: is this read ID post-reset?
d9572b1d 1093 * @p_id: read IDENTIFY page (newly allocated)
1da177e4 1094 *
49016aca
TH		 1095 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1096 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
aec5c3c1
TH		 1097 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1098 * for pre-ATA4 drives.
1da177e4
LT		 1099 *
1100 * LOCKING:
49016aca
TH		 1101 * Kernel thread context (may sleep)
1102 *
1103 * RETURNS:
1104 * 0 on success, -errno otherwise.
1da177e4 1105 */
49016aca 1106static int ata_dev_read_id(struct ata_port *ap, struct ata_device *dev,
d9572b1d 1107 unsigned int *p_class, int post_reset, u16 **p_id)
1da177e4 1108{
49016aca 1109 unsigned int class = *p_class;
a0123703 1110 struct ata_taskfile tf;
49016aca 1111 unsigned int err_mask = 0;
d9572b1d 1112 u16 *id;
49016aca
TH		 1113 const char *reason;
1114 int rc;
1da177e4 1115
49016aca 1116 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1da177e4 1117
49016aca 1118 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1da177e4 1119
d9572b1d
TH		 1120 id = kmalloc(sizeof(id[0]) * ATA_ID_WORDS, GFP_KERNEL);
1121 if (id == NULL) {
1122 rc = -ENOMEM;
1123 reason = "out of memory";
1124 goto err_out;
1125 }
1126
49016aca
TH		 1127 retry:
1128 ata_tf_init(ap, &tf, dev->devno);
a0123703 1129
49016aca
TH		 1130 switch (class) {
1131 case ATA_DEV_ATA:
a0123703 1132 tf.command = ATA_CMD_ID_ATA;
49016aca
TH		 1133 break;
1134 case ATA_DEV_ATAPI:
a0123703 1135 tf.command = ATA_CMD_ID_ATAPI;
49016aca
TH		 1136 break;
1137 default:
1138 rc = -ENODEV;
1139 reason = "unsupported class";
1140 goto err_out;
1da177e4
LT		 1141 }
1142
a0123703 1143 tf.protocol = ATA_PROT_PIO;
1da177e4 1144
d69cf37d 1145 err_mask = ata_exec_internal(ap, dev, &tf, NULL, DMA_FROM_DEVICE,
49016aca 1146 id, sizeof(id[0]) * ATA_ID_WORDS);
a0123703 1147 if (err_mask) {
49016aca
TH		 1148 rc = -EIO;
1149 reason = "I/O error";
1da177e4
LT		 1150 goto err_out;
1151 }
1152
49016aca 1153 swap_buf_le16(id, ATA_ID_WORDS);
1da177e4 1154
49016aca 1155 /* sanity check */
692785e7 1156 if ((class == ATA_DEV_ATA) != (ata_id_is_ata(id) | ata_id_is_cfa(id))) {
49016aca
TH		 1157 rc = -EINVAL;
1158 reason = "device reports illegal type";
1159 goto err_out;
1160 }
1161
1162 if (post_reset && class == ATA_DEV_ATA) {
1163 /*
1164 * The exact sequence expected by certain pre-ATA4 drives is:
1165 * SRST RESET
1166 * IDENTIFY
1167 * INITIALIZE DEVICE PARAMETERS
1168 * anything else..
1169 * Some drives were very specific about that exact sequence.
1170 */
1171 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
00b6f5e9 1172 err_mask = ata_dev_init_params(ap, dev, id[3], id[6]);
49016aca
TH		 1173 if (err_mask) {
1174 rc = -EIO;
1175 reason = "INIT_DEV_PARAMS failed";
1176 goto err_out;
1177 }
1178
1179 /* current CHS translation info (id[53-58]) might be
1180 * changed. reread the identify device info.
1181 */
1182 post_reset = 0;
1183 goto retry;
1184 }
1185 }
1186
1187 *p_class = class;
d9572b1d 1188 *p_id = id;
49016aca
TH		 1189 return 0;
1190
1191 err_out:
1192 printk(KERN_WARNING "ata%u: dev %u failed to IDENTIFY (%s)\n",
1193 ap->id, dev->devno, reason);
d9572b1d 1194 kfree(id);
49016aca
TH		 1195 return rc;
1196}
1197
4b2f3ede
TH		 1198static inline u8 ata_dev_knobble(const struct ata_port *ap,
1199 struct ata_device *dev)
1200{
1201 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1202}
1203
49016aca 1204/**
ffeae418
TH		 1205 * ata_dev_configure - Configure the specified ATA/ATAPI device
1206 * @ap: Port on which target device resides
1207 * @dev: Target device to configure
4c2d721a 1208 * @print_info: Enable device info printout
ffeae418
TH		 1209 *
1210 * Configure @dev according to @dev->id. Generic and low-level
1211 * driver specific fixups are also applied.
49016aca
TH		 1212 *
1213 * LOCKING:
ffeae418
TH		 1214 * Kernel thread context (may sleep)
1215 *
1216 * RETURNS:
1217 * 0 on success, -errno otherwise
49016aca 1218 */
4c2d721a
TH		 1219static int ata_dev_configure(struct ata_port *ap, struct ata_device *dev,
1220 int print_info)
49016aca 1221{
1148c3a7 1222 const u16 *id = dev->id;
ff8854b2 1223 unsigned int xfer_mask;
49016aca
TH		 1224 int i, rc;
1225
e1211e3f 1226 if (!ata_dev_enabled(dev)) {
49016aca 1227 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
ffeae418
TH		 1228 ap->id, dev->devno);
1229 return 0;
49016aca
TH		 1230 }
1231
ffeae418 1232 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1da177e4 1233
c39f5ebe
TH		 1234 /* print device capabilities */
1235 if (print_info)
1236 printk(KERN_DEBUG "ata%u: dev %u cfg 49:%04x 82:%04x 83:%04x "
1237 "84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1238 ap->id, dev->devno, id[49], id[82], id[83],
1239 id[84], id[85], id[86], id[87], id[88]);
1240
208a9933 1241 /* initialize to-be-configured parameters */
ea1dd4e1 1242 dev->flags &= ~ATA_DFLAG_CFG_MASK;
208a9933
TH		 1243 dev->max_sectors = 0;
1244 dev->cdb_len = 0;
1245 dev->n_sectors = 0;
1246 dev->cylinders = 0;
1247 dev->heads = 0;
1248 dev->sectors = 0;
1249
1da177e4
LT		 1250 /*
1251 * common ATA, ATAPI feature tests
1252 */
1253
ff8854b2 1254 /* find max transfer mode; for printk only */
1148c3a7 1255 xfer_mask = ata_id_xfermask(id);
1da177e4 1256
1148c3a7 1257 ata_dump_id(id);
1da177e4
LT		 1258
1259 /* ATA-specific feature tests */
1260 if (dev->class == ATA_DEV_ATA) {
1148c3a7 1261 dev->n_sectors = ata_id_n_sectors(id);
2940740b 1262
1148c3a7 1263 if (ata_id_has_lba(id)) {
4c2d721a 1264 const char *lba_desc;
8bf62ece 1265
4c2d721a
TH		 1266 lba_desc = "LBA";
1267 dev->flags |= ATA_DFLAG_LBA;
1148c3a7 1268 if (ata_id_has_lba48(id)) {
8bf62ece 1269 dev->flags |= ATA_DFLAG_LBA48;
4c2d721a
TH		 1270 lba_desc = "LBA48";
1271 }
8bf62ece
AL		 1272
1273 /* print device info to dmesg */
4c2d721a
TH		 1274 if (print_info)
1275 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1276 "max %s, %Lu sectors: %s\n",
1277 ap->id, dev->devno,
1148c3a7 1278 ata_id_major_version(id),
ff8854b2 1279 ata_mode_string(xfer_mask),
4c2d721a
TH		 1280 (unsigned long long)dev->n_sectors,
1281 lba_desc);
ffeae418 1282 } else {
8bf62ece
AL		 1283 /* CHS */
1284
1285 /* Default translation */
1148c3a7
TH		 1286 dev->cylinders = id[1];
1287 dev->heads = id[3];
1288 dev->sectors = id[6];
8bf62ece 1289
1148c3a7 1290 if (ata_id_current_chs_valid(id)) {
8bf62ece 1291 /* Current CHS translation is valid. */
1148c3a7
TH		 1292 dev->cylinders = id[54];
1293 dev->heads = id[55];
1294 dev->sectors = id[56];
8bf62ece
AL		 1295 }
1296
1297 /* print device info to dmesg */
4c2d721a
TH		 1298 if (print_info)
1299 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1300 "max %s, %Lu sectors: CHS %u/%u/%u\n",
1301 ap->id, dev->devno,
1148c3a7 1302 ata_id_major_version(id),
ff8854b2 1303 ata_mode_string(xfer_mask),
4c2d721a
TH		 1304 (unsigned long long)dev->n_sectors,
1305 dev->cylinders, dev->heads, dev->sectors);
1da177e4
LT		 1306 }
1307
6e7846e9 1308 dev->cdb_len = 16;
1da177e4
LT		 1309 }
1310
1311 /* ATAPI-specific feature tests */
2c13b7ce 1312 else if (dev->class == ATA_DEV_ATAPI) {
1148c3a7 1313 rc = atapi_cdb_len(id);
1da177e4
LT		 1314 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1315 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
ffeae418 1316 rc = -EINVAL;
1da177e4
LT		 1317 goto err_out_nosup;
1318 }
6e7846e9 1319 dev->cdb_len = (unsigned int) rc;
1da177e4
LT		 1320
1321 /* print device info to dmesg */
4c2d721a
TH		 1322 if (print_info)
1323 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
ff8854b2 1324 ap->id, dev->devno, ata_mode_string(xfer_mask));
1da177e4
LT		 1325 }
1326
6e7846e9
TH		 1327 ap->host->max_cmd_len = 0;
1328 for (i = 0; i < ATA_MAX_DEVICES; i++)
1329 ap->host->max_cmd_len = max_t(unsigned int,
1330 ap->host->max_cmd_len,
1331 ap->device[i].cdb_len);
1332
4b2f3ede
TH		 1333 /* limit bridge transfers to udma5, 200 sectors */
1334 if (ata_dev_knobble(ap, dev)) {
4c2d721a
TH		 1335 if (print_info)
1336 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1337 ap->id, dev->devno);
5a529139 1338 dev->udma_mask &= ATA_UDMA5;
4b2f3ede
TH		 1339 dev->max_sectors = ATA_MAX_SECTORS;
1340 }
1341
1342 if (ap->ops->dev_config)
1343 ap->ops->dev_config(ap, dev);
1344
1da177e4 1345 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
ffeae418 1346 return 0;
1da177e4
LT		 1347
1348err_out_nosup:
1da177e4 1349 DPRINTK("EXIT, err\n");
ffeae418 1350 return rc;
1da177e4
LT		 1351}
1352
1353/**
1354 * ata_bus_probe - Reset and probe ATA bus
1355 * @ap: Bus to probe
1356 *
0cba632b
JG		 1357 * Master ATA bus probing function. Initiates a hardware-dependent
1358 * bus reset, then attempts to identify any devices found on
1359 * the bus.
1360 *
1da177e4 1361 * LOCKING:
0cba632b 1362 * PCI/etc. bus probe sem.
1da177e4
LT		 1363 *
1364 * RETURNS:
96072e69 1365 * Zero on success, negative errno otherwise.
1da177e4
LT		 1366 */
1367
1368static int ata_bus_probe(struct ata_port *ap)
1369{
28ca5c57 1370 unsigned int classes[ATA_MAX_DEVICES];
14d2bac1
TH		 1371 int tries[ATA_MAX_DEVICES];
1372 int i, rc, down_xfermask;
e82cbdb9 1373 struct ata_device *dev;
1da177e4 1374
28ca5c57 1375 ata_port_probe(ap);
c19ba8af 1376
14d2bac1
TH		 1377 for (i = 0; i < ATA_MAX_DEVICES; i++)
1378 tries[i] = ATA_PROBE_MAX_TRIES;
1379
1380 retry:
1381 down_xfermask = 0;
1382
2044470c
TH		 1383 /* reset and determine device classes */
1384 for (i = 0; i < ATA_MAX_DEVICES; i++)
1385 classes[i] = ATA_DEV_UNKNOWN;
2061a47a 1386
2044470c 1387 if (ap->ops->probe_reset) {
c19ba8af 1388 rc = ap->ops->probe_reset(ap, classes);
28ca5c57
TH		 1389 if (rc) {
1390 printk("ata%u: reset failed (errno=%d)\n", ap->id, rc);
1391 return rc;
c19ba8af 1392 }
28ca5c57 1393 } else {
c19ba8af
TH		 1394 ap->ops->phy_reset(ap);
1395
198e0fed 1396 if (!(ap->flags & ATA_FLAG_DISABLED))
2044470c 1397 for (i = 0; i < ATA_MAX_DEVICES; i++)
28ca5c57 1398 classes[i] = ap->device[i].class;
2044470c 1399
28ca5c57
TH		 1400 ata_port_probe(ap);
1401 }
1da177e4 1402
2044470c
TH		 1403 for (i = 0; i < ATA_MAX_DEVICES; i++)
1404 if (classes[i] == ATA_DEV_UNKNOWN)
1405 classes[i] = ATA_DEV_NONE;
1406
28ca5c57 1407 /* read IDENTIFY page and configure devices */
1da177e4 1408 for (i = 0; i < ATA_MAX_DEVICES; i++) {
e82cbdb9 1409 dev = &ap->device[i];
28ca5c57
TH		 1410 dev->class = classes[i];
1411
14d2bac1
TH		 1412 if (!tries[i]) {
1413 ata_down_xfermask_limit(ap, dev, 1);
1414 ata_dev_disable(ap, dev);
ffeae418
TH		 1415 }
1416
14d2bac1 1417 if (!ata_dev_enabled(dev))
ffeae418 1418 continue;
ffeae418 1419
14d2bac1
TH		 1420 kfree(dev->id);
1421 dev->id = NULL;
1422 rc = ata_dev_read_id(ap, dev, &dev->class, 1, &dev->id);
1423 if (rc)
1424 goto fail;
1425
1426 rc = ata_dev_configure(ap, dev, 1);
1427 if (rc)
1428 goto fail;
1da177e4
LT		 1429 }
1430
e82cbdb9
TH		 1431 /* configure transfer mode */
1432 if (ap->ops->set_mode) {
1433 /* FIXME: make ->set_mode handle no device case and
1434 * return error code and failing device on failure as
1435 * ata_set_mode() does.
1436 */
14d2bac1
TH		 1437 for (i = 0; i < ATA_MAX_DEVICES; i++)
1438 if (ata_dev_enabled(&ap->device[i])) {
1439 ap->ops->set_mode(ap);
1440 break;
1441 }
e82cbdb9
TH		 1442 rc = 0;
1443 } else {
14d2bac1
TH		 1444 rc = ata_set_mode(ap, &dev);
1445 if (rc) {
1446 down_xfermask = 1;
1447 goto fail;
1448 }
e82cbdb9 1449 }
1da177e4 1450
e82cbdb9
TH		 1451 for (i = 0; i < ATA_MAX_DEVICES; i++)
1452 if (ata_dev_enabled(&ap->device[i]))
1453 return 0;
1da177e4 1454
e82cbdb9
TH		 1455 /* no device present, disable port */
1456 ata_port_disable(ap);
1da177e4 1457 ap->ops->port_disable(ap);
96072e69 1458 return -ENODEV;
14d2bac1
TH		 1459
1460 fail:
1461 switch (rc) {
1462 case -EINVAL:
1463 case -ENODEV:
1464 tries[dev->devno] = 0;
1465 break;
1466 case -EIO:
1467 ata_down_sata_spd_limit(ap);
1468 /* fall through */
1469 default:
1470 tries[dev->devno]--;
1471 if (down_xfermask &&
1472 ata_down_xfermask_limit(ap, dev, tries[dev->devno] == 1))
1473 tries[dev->devno] = 0;
1474 }
1475
1476 goto retry;
1da177e4
LT		 1477}
1478
1479/**
0cba632b
JG		 1480 * ata_port_probe - Mark port as enabled
1481 * @ap: Port for which we indicate enablement
1da177e4 1482 *
0cba632b
JG		 1483 * Modify @ap data structure such that the system
1484 * thinks that the entire port is enabled.
1485 *
1486 * LOCKING: host_set lock, or some other form of
1487 * serialization.
1da177e4
LT		 1488 */
1489
1490void ata_port_probe(struct ata_port *ap)
1491{
198e0fed 1492 ap->flags &= ~ATA_FLAG_DISABLED;
1da177e4
LT		 1493}
1494
3be680b7
TH		 1495/**
1496 * sata_print_link_status - Print SATA link status
1497 * @ap: SATA port to printk link status about
1498 *
1499 * This function prints link speed and status of a SATA link.
1500 *
1501 * LOCKING:
1502 * None.
1503 */
1504static void sata_print_link_status(struct ata_port *ap)
1505{
6d5f9732 1506 u32 sstatus, scontrol, tmp;
3be680b7
TH		 1507
1508 if (!ap->ops->scr_read)
1509 return;
1510
1511 sstatus = scr_read(ap, SCR_STATUS);
6d5f9732 1512 scontrol = scr_read(ap, SCR_CONTROL);
3be680b7
TH		 1513
1514 if (sata_dev_present(ap)) {
1515 tmp = (sstatus >> 4) & 0xf;
6d5f9732
TH		 1516 printk(KERN_INFO
1517 "ata%u: SATA link up %s (SStatus %X SControl %X)\n",
1518 ap->id, sata_spd_string(tmp), sstatus, scontrol);
3be680b7 1519 } else {
6d5f9732
TH		 1520 printk(KERN_INFO
1521 "ata%u: SATA link down (SStatus %X SControl %X)\n",
1522 ap->id, sstatus, scontrol);
3be680b7
TH		 1523 }
1524}
1525
1da177e4 1526/**
780a87f7
JG		 1527 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1528 * @ap: SATA port associated with target SATA PHY.
1da177e4 1529 *
780a87f7
JG		 1530 * This function issues commands to standard SATA Sxxx
1531 * PHY registers, to wake up the phy (and device), and
1532 * clear any reset condition.
1da177e4
LT		 1533 *
1534 * LOCKING:
0cba632b 1535 * PCI/etc. bus probe sem.
1da177e4
LT		 1536 *
1537 */
1538void __sata_phy_reset(struct ata_port *ap)
1539{
1540 u32 sstatus;
1541 unsigned long timeout = jiffies + (HZ * 5);
1542
1543 if (ap->flags & ATA_FLAG_SATA_RESET) {
cdcca89e
BR		 1544 /* issue phy wake/reset */
1545 scr_write_flush(ap, SCR_CONTROL, 0x301);
62ba2841
TH		 1546 /* Couldn't find anything in SATA I/II specs, but
1547 * AHCI-1.1 10.4.2 says at least 1 ms. */
1548 mdelay(1);
1da177e4 1549 }
cdcca89e 1550 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1da177e4
LT		 1551
1552 /* wait for phy to become ready, if necessary */
1553 do {
1554 msleep(200);
1555 sstatus = scr_read(ap, SCR_STATUS);
1556 if ((sstatus & 0xf) != 1)
1557 break;
1558 } while (time_before(jiffies, timeout));
1559
3be680b7
TH		 1560 /* print link status */
1561 sata_print_link_status(ap);
656563e3 1562
3be680b7
TH		 1563 /* TODO: phy layer with polling, timeouts, etc. */
1564 if (sata_dev_present(ap))
1da177e4 1565 ata_port_probe(ap);
3be680b7 1566 else
1da177e4 1567 ata_port_disable(ap);
1da177e4 1568
198e0fed 1569 if (ap->flags & ATA_FLAG_DISABLED)
1da177e4
LT		 1570 return;
1571
1572 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1573 ata_port_disable(ap);
1574 return;
1575 }
1576
1577 ap->cbl = ATA_CBL_SATA;
1578}
1579
1580/**
780a87f7
JG		 1581 * sata_phy_reset - Reset SATA bus.
1582 * @ap: SATA port associated with target SATA PHY.
1da177e4 1583 *
780a87f7
JG		 1584 * This function resets the SATA bus, and then probes
1585 * the bus for devices.
1da177e4
LT		 1586 *
1587 * LOCKING:
0cba632b 1588 * PCI/etc. bus probe sem.
1da177e4
LT		 1589 *
1590 */
1591void sata_phy_reset(struct ata_port *ap)
1592{
1593 __sata_phy_reset(ap);
198e0fed 1594 if (ap->flags & ATA_FLAG_DISABLED)
1da177e4
LT		 1595 return;
1596 ata_bus_reset(ap);
1597}
1598
ebdfca6e
AC		 1599/**
1600 * ata_dev_pair - return other device on cable
1601 * @ap: port
1602 * @adev: device
1603 *
1604 * Obtain the other device on the same cable, or if none is
1605 * present NULL is returned
1606 */
2e9edbf8 1607
ebdfca6e
AC		 1608struct ata_device *ata_dev_pair(struct ata_port *ap, struct ata_device *adev)
1609{
1610 struct ata_device *pair = &ap->device[1 - adev->devno];
e1211e3f 1611 if (!ata_dev_enabled(pair))
ebdfca6e
AC		 1612 return NULL;
1613 return pair;
1614}
1615
1da177e4 1616/**
780a87f7
JG		 1617 * ata_port_disable - Disable port.
1618 * @ap: Port to be disabled.
1da177e4 1619 *
780a87f7
JG		 1620 * Modify @ap data structure such that the system
1621 * thinks that the entire port is disabled, and should
1622 * never attempt to probe or communicate with devices
1623 * on this port.
1624 *
1625 * LOCKING: host_set lock, or some other form of
1626 * serialization.
1da177e4
LT		 1627 */
1628
1629void ata_port_disable(struct ata_port *ap)
1630{
1631 ap->device[0].class = ATA_DEV_NONE;
1632 ap->device[1].class = ATA_DEV_NONE;
198e0fed 1633 ap->flags |= ATA_FLAG_DISABLED;
1da177e4
LT		 1634}
1635
1c3fae4d
TH		 1636/**
1637 * ata_down_sata_spd_limit - adjust SATA spd limit downward
1638 * @ap: Port to adjust SATA spd limit for
1639 *
1640 * Adjust SATA spd limit of @ap downward. Note that this
1641 * function only adjusts the limit. The change must be applied
1642 * using ata_set_sata_spd().
1643 *
1644 * LOCKING:
1645 * Inherited from caller.
1646 *
1647 * RETURNS:
1648 * 0 on success, negative errno on failure
1649 */
1ad8e7f9 1650int ata_down_sata_spd_limit(struct ata_port *ap)
1c3fae4d
TH		 1651{
1652 u32 spd, mask;
1653 int highbit;
1654
1655 if (ap->cbl != ATA_CBL_SATA || !ap->ops->scr_read)
1656 return -EOPNOTSUPP;
1657
1658 mask = ap->sata_spd_limit;
1659 if (mask <= 1)
1660 return -EINVAL;
1661 highbit = fls(mask) - 1;
1662 mask &= ~(1 << highbit);
1663
1664 spd = (scr_read(ap, SCR_STATUS) >> 4) & 0xf;
1665 if (spd <= 1)
1666 return -EINVAL;
1667 spd--;
1668 mask &= (1 << spd) - 1;
1669 if (!mask)
1670 return -EINVAL;
1671
1672 ap->sata_spd_limit = mask;
1673
1674 printk(KERN_WARNING "ata%u: limiting SATA link speed to %s\n",
1675 ap->id, sata_spd_string(fls(mask)));
1676
1677 return 0;
1678}
1679
1680static int __ata_set_sata_spd_needed(struct ata_port *ap, u32 *scontrol)
1681{
1682 u32 spd, limit;
1683
1684 if (ap->sata_spd_limit == UINT_MAX)
1685 limit = 0;
1686 else
1687 limit = fls(ap->sata_spd_limit);
1688
1689 spd = (*scontrol >> 4) & 0xf;
1690 *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
1691
1692 return spd != limit;
1693}
1694
1695/**
1696 * ata_set_sata_spd_needed - is SATA spd configuration needed
1697 * @ap: Port in question
1698 *
1699 * Test whether the spd limit in SControl matches
1700 * @ap->sata_spd_limit. This function is used to determine
1701 * whether hardreset is necessary to apply SATA spd
1702 * configuration.
1703 *
1704 * LOCKING:
1705 * Inherited from caller.
1706 *
1707 * RETURNS:
1708 * 1 if SATA spd configuration is needed, 0 otherwise.
1709 */
1ad8e7f9 1710int ata_set_sata_spd_needed(struct ata_port *ap)
1c3fae4d
TH		 1711{
1712 u32 scontrol;
1713
1714 if (ap->cbl != ATA_CBL_SATA || !ap->ops->scr_read)
1715 return 0;
1716
1717 scontrol = scr_read(ap, SCR_CONTROL);
1718
1719 return __ata_set_sata_spd_needed(ap, &scontrol);
1720}
1721
1722/**
1723 * ata_set_sata_spd - set SATA spd according to spd limit
1724 * @ap: Port to set SATA spd for
1725 *
1726 * Set SATA spd of @ap according to sata_spd_limit.
1727 *
1728 * LOCKING:
1729 * Inherited from caller.
1730 *
1731 * RETURNS:
1732 * 0 if spd doesn't need to be changed, 1 if spd has been
1733 * changed. -EOPNOTSUPP if SCR registers are inaccessible.
1734 */
1735static int ata_set_sata_spd(struct ata_port *ap)
1736{
1737 u32 scontrol;
1738
1739 if (ap->cbl != ATA_CBL_SATA || !ap->ops->scr_read)
1740 return -EOPNOTSUPP;
1741
1742 scontrol = scr_read(ap, SCR_CONTROL);
1743 if (!__ata_set_sata_spd_needed(ap, &scontrol))
1744 return 0;
1745
1746 scr_write(ap, SCR_CONTROL, scontrol);
1747 return 1;
1748}
1749
452503f9
AC		 1750/*
1751 * This mode timing computation functionality is ported over from
1752 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1753 */
1754/*
1755 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1756 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1757 * for PIO 5, which is a nonstandard extension and UDMA6, which
2e9edbf8 1758 * is currently supported only by Maxtor drives.
452503f9
AC		 1759 */
1760
1761static const struct ata_timing ata_timing[] = {
1762
1763 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1764 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1765 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1766 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1767
1768 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1769 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1770 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1771
1772/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
2e9edbf8 1773
452503f9
AC		 1774 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1775 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1776 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
2e9edbf8 1777
452503f9
AC		 1778 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1779 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1780 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1781
1782/* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1783 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1784 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1785
1786 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1787 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1788 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1789
1790/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1791
1792 { 0xFF }
1793};
1794
1795#define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1796#define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1797
1798static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1799{
1800 q->setup = EZ(t->setup * 1000, T);
1801 q->act8b = EZ(t->act8b * 1000, T);
1802 q->rec8b = EZ(t->rec8b * 1000, T);
1803 q->cyc8b = EZ(t->cyc8b * 1000, T);
1804 q->active = EZ(t->active * 1000, T);
1805 q->recover = EZ(t->recover * 1000, T);
1806 q->cycle = EZ(t->cycle * 1000, T);
1807 q->udma = EZ(t->udma * 1000, UT);
1808}
1809
1810void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1811 struct ata_timing *m, unsigned int what)
1812{
1813 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1814 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1815 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1816 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1817 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1818 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1819 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1820 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1821}
1822
1823static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1824{
1825 const struct ata_timing *t;
1826
1827 for (t = ata_timing; t->mode != speed; t++)
91190758 1828 if (t->mode == 0xFF)
452503f9 1829 return NULL;
2e9edbf8 1830 return t;
452503f9
AC		 1831}
1832
1833int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1834 struct ata_timing *t, int T, int UT)
1835{
1836 const struct ata_timing *s;
1837 struct ata_timing p;
1838
1839 /*
2e9edbf8 1840 * Find the mode.
75b1f2f8 1841 */
452503f9
AC		 1842
1843 if (!(s = ata_timing_find_mode(speed)))
1844 return -EINVAL;
1845
75b1f2f8
AL		 1846 memcpy(t, s, sizeof(*s));
1847
452503f9
AC		 1848 /*
1849 * If the drive is an EIDE drive, it can tell us it needs extended
1850 * PIO/MW_DMA cycle timing.
1851 */
1852
1853 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1854 memset(&p, 0, sizeof(p));
1855 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1856 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1857 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1858 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1859 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1860 }
1861 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1862 }
1863
1864 /*
1865 * Convert the timing to bus clock counts.
1866 */
1867
75b1f2f8 1868 ata_timing_quantize(t, t, T, UT);
452503f9
AC		 1869
1870 /*
c893a3ae
RD		 1871 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
1872 * S.M.A.R.T * and some other commands. We have to ensure that the
1873 * DMA cycle timing is slower/equal than the fastest PIO timing.
452503f9
AC		 1874 */
1875
1876 if (speed > XFER_PIO_4) {
1877 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1878 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1879 }
1880
1881 /*
c893a3ae 1882 * Lengthen active & recovery time so that cycle time is correct.
452503f9
AC		 1883 */
1884
1885 if (t->act8b + t->rec8b < t->cyc8b) {
1886 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1887 t->rec8b = t->cyc8b - t->act8b;
1888 }
1889
1890 if (t->active + t->recover < t->cycle) {
1891 t->active += (t->cycle - (t->active + t->recover)) / 2;
1892 t->recover = t->cycle - t->active;
1893 }
1894
1895 return 0;
1896}
1897
cf176e1a
TH		 1898/**
1899 * ata_down_xfermask_limit - adjust dev xfer masks downward
1900 * @ap: Port associated with device @dev
1901 * @dev: Device to adjust xfer masks
1902 * @force_pio0: Force PIO0
1903 *
1904 * Adjust xfer masks of @dev downward. Note that this function
1905 * does not apply the change. Invoking ata_set_mode() afterwards
1906 * will apply the limit.
1907 *
1908 * LOCKING:
1909 * Inherited from caller.
1910 *
1911 * RETURNS:
1912 * 0 on success, negative errno on failure
1913 */
1ad8e7f9
TH		 1914int ata_down_xfermask_limit(struct ata_port *ap, struct ata_device *dev,
1915 int force_pio0)
cf176e1a
TH		 1916{
1917 unsigned long xfer_mask;
1918 int highbit;
1919
1920 xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask,
1921 dev->udma_mask);
1922
1923 if (!xfer_mask)
1924 goto fail;
1925 /* don't gear down to MWDMA from UDMA, go directly to PIO */
1926 if (xfer_mask & ATA_MASK_UDMA)
1927 xfer_mask &= ~ATA_MASK_MWDMA;
1928
1929 highbit = fls(xfer_mask) - 1;
1930 xfer_mask &= ~(1 << highbit);
1931 if (force_pio0)
1932 xfer_mask &= 1 << ATA_SHIFT_PIO;
1933 if (!xfer_mask)
1934 goto fail;
1935
1936 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
1937 &dev->udma_mask);
1938
1939 printk(KERN_WARNING "ata%u: dev %u limiting speed to %s\n",
1940 ap->id, dev->devno, ata_mode_string(xfer_mask));
1941
1942 return 0;
1943
1944 fail:
1945 return -EINVAL;
1946}
1947
83206a29 1948static int ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1da177e4 1949{
83206a29
TH		 1950 unsigned int err_mask;
1951 int rc;
1da177e4 1952
e8384607 1953 dev->flags &= ~ATA_DFLAG_PIO;
1da177e4
LT		 1954 if (dev->xfer_shift == ATA_SHIFT_PIO)
1955 dev->flags |= ATA_DFLAG_PIO;
1956
83206a29
TH		 1957 err_mask = ata_dev_set_xfermode(ap, dev);
1958 if (err_mask) {
1959 printk(KERN_ERR
1960 "ata%u: failed to set xfermode (err_mask=0x%x)\n",
1961 ap->id, err_mask);
1962 return -EIO;
1963 }
1da177e4 1964
83206a29 1965 rc = ata_dev_revalidate(ap, dev, 0);
5eb45c02 1966 if (rc)
83206a29 1967 return rc;
48a8a14f 1968
23e71c3d
TH		 1969 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
1970 dev->xfer_shift, (int)dev->xfer_mode);
1da177e4
LT		 1971
1972 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
23e71c3d
TH		 1973 ap->id, dev->devno,
1974 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
83206a29 1975 return 0;
1da177e4
LT		 1976}
1977
1da177e4
LT		 1978/**
1979 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1980 * @ap: port on which timings will be programmed
e82cbdb9 1981 * @r_failed_dev: out paramter for failed device
1da177e4 1982 *
e82cbdb9
TH		 1983 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
1984 * ata_set_mode() fails, pointer to the failing device is
1985 * returned in @r_failed_dev.
780a87f7 1986 *
1da177e4 1987 * LOCKING:
0cba632b 1988 * PCI/etc. bus probe sem.
e82cbdb9
TH		 1989 *
1990 * RETURNS:
1991 * 0 on success, negative errno otherwise
1da177e4 1992 */
1ad8e7f9 1993int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
1da177e4 1994{
e8e0619f 1995 struct ata_device *dev;
e82cbdb9 1996 int i, rc = 0, used_dma = 0, found = 0;
1da177e4 1997
a6d5a51c
TH		 1998 /* step 1: calculate xfer_mask */
1999 for (i = 0; i < ATA_MAX_DEVICES; i++) {
acf356b1 2000 unsigned int pio_mask, dma_mask;
a6d5a51c 2001
e8e0619f
TH		 2002 dev = &ap->device[i];
2003
e1211e3f 2004 if (!ata_dev_enabled(dev))
a6d5a51c
TH		 2005 continue;
2006
acf356b1 2007 ata_dev_xfermask(ap, dev);
1da177e4 2008
acf356b1
TH		 2009 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
2010 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
2011 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
2012 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
5444a6f4 2013
4f65977d 2014 found = 1;
5444a6f4
AC		 2015 if (dev->dma_mode)
2016 used_dma = 1;
a6d5a51c 2017 }
4f65977d 2018 if (!found)
e82cbdb9 2019 goto out;
a6d5a51c
TH		 2020
2021 /* step 2: always set host PIO timings */
e8e0619f
TH		 2022 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2023 dev = &ap->device[i];
2024 if (!ata_dev_enabled(dev))
2025 continue;
2026
2027 if (!dev->pio_mode) {
2028 printk(KERN_WARNING "ata%u: dev %u no PIO support\n",
2029 ap->id, dev->devno);
2030 rc = -EINVAL;
e82cbdb9 2031 goto out;
e8e0619f
TH		 2032 }
2033
2034 dev->xfer_mode = dev->pio_mode;
2035 dev->xfer_shift = ATA_SHIFT_PIO;
2036 if (ap->ops->set_piomode)
2037 ap->ops->set_piomode(ap, dev);
2038 }
1da177e4 2039
a6d5a51c 2040 /* step 3: set host DMA timings */
e8e0619f
TH		 2041 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2042 dev = &ap->device[i];
2043
2044 if (!ata_dev_enabled(dev) || !dev->dma_mode)
2045 continue;
2046
2047 dev->xfer_mode = dev->dma_mode;
2048 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
2049 if (ap->ops->set_dmamode)
2050 ap->ops->set_dmamode(ap, dev);
2051 }
1da177e4
LT		 2052
2053 /* step 4: update devices' xfer mode */
83206a29 2054 for (i = 0; i < ATA_MAX_DEVICES; i++) {
e8e0619f 2055 dev = &ap->device[i];
1da177e4 2056
e1211e3f 2057 if (!ata_dev_enabled(dev))
83206a29
TH		 2058 continue;
2059
5bbc53f4
TH		 2060 rc = ata_dev_set_mode(ap, dev);
2061 if (rc)
e82cbdb9 2062 goto out;
83206a29 2063 }
1da177e4 2064
e8e0619f
TH		 2065 /* Record simplex status. If we selected DMA then the other
2066 * host channels are not permitted to do so.
5444a6f4 2067 */
5444a6f4
AC		 2068 if (used_dma && (ap->host_set->flags & ATA_HOST_SIMPLEX))
2069 ap->host_set->simplex_claimed = 1;
2070
e8e0619f 2071 /* step5: chip specific finalisation */
1da177e4
LT		 2072 if (ap->ops->post_set_mode)
2073 ap->ops->post_set_mode(ap);
2074
e82cbdb9
TH		 2075 out:
2076 if (rc)
2077 *r_failed_dev = dev;
2078 return rc;
1da177e4
LT		 2079}
2080
1fdffbce
JG		 2081/**
2082 * ata_tf_to_host - issue ATA taskfile to host controller
2083 * @ap: port to which command is being issued
2084 * @tf: ATA taskfile register set
2085 *
2086 * Issues ATA taskfile register set to ATA host controller,
2087 * with proper synchronization with interrupt handler and
2088 * other threads.
2089 *
2090 * LOCKING:
2091 * spin_lock_irqsave(host_set lock)
2092 */
2093
2094static inline void ata_tf_to_host(struct ata_port *ap,
2095 const struct ata_taskfile *tf)
2096{
2097 ap->ops->tf_load(ap, tf);
2098 ap->ops->exec_command(ap, tf);
2099}
2100
1da177e4
LT		 2101/**
2102 * ata_busy_sleep - sleep until BSY clears, or timeout
2103 * @ap: port containing status register to be polled
2104 * @tmout_pat: impatience timeout
2105 * @tmout: overall timeout
2106 *
780a87f7
JG		 2107 * Sleep until ATA Status register bit BSY clears,
2108 * or a timeout occurs.
2109 *
2110 * LOCKING: None.
1da177e4
LT		 2111 */
2112
6f8b9958
TH		 2113unsigned int ata_busy_sleep (struct ata_port *ap,
2114 unsigned long tmout_pat, unsigned long tmout)
1da177e4
LT		 2115{
2116 unsigned long timer_start, timeout;
2117 u8 status;
2118
2119 status = ata_busy_wait(ap, ATA_BUSY, 300);
2120 timer_start = jiffies;
2121 timeout = timer_start + tmout_pat;
2122 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2123 msleep(50);
2124 status = ata_busy_wait(ap, ATA_BUSY, 3);
2125 }
2126
2127 if (status & ATA_BUSY)
2128 printk(KERN_WARNING "ata%u is slow to respond, "
2129 "please be patient\n", ap->id);
2130
2131 timeout = timer_start + tmout;
2132 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2133 msleep(50);
2134 status = ata_chk_status(ap);
2135 }
2136
2137 if (status & ATA_BUSY) {
2138 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
2139 ap->id, tmout / HZ);
2140 return 1;
2141 }
2142
2143 return 0;
2144}
2145
2146static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
2147{
2148 struct ata_ioports *ioaddr = &ap->ioaddr;
2149 unsigned int dev0 = devmask & (1 << 0);
2150 unsigned int dev1 = devmask & (1 << 1);
2151 unsigned long timeout;
2152
2153 /* if device 0 was found in ata_devchk, wait for its
2154 * BSY bit to clear
2155 */
2156 if (dev0)
2157 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2158
2159 /* if device 1 was found in ata_devchk, wait for
2160 * register access, then wait for BSY to clear
2161 */
2162 timeout = jiffies + ATA_TMOUT_BOOT;
2163 while (dev1) {
2164 u8 nsect, lbal;
2165
2166 ap->ops->dev_select(ap, 1);
2167 if (ap->flags & ATA_FLAG_MMIO) {
2168 nsect = readb((void __iomem *) ioaddr->nsect_addr);
2169 lbal = readb((void __iomem *) ioaddr->lbal_addr);
2170 } else {
2171 nsect = inb(ioaddr->nsect_addr);
2172 lbal = inb(ioaddr->lbal_addr);
2173 }
2174 if ((nsect == 1) && (lbal == 1))
2175 break;
2176 if (time_after(jiffies, timeout)) {
2177 dev1 = 0;
2178 break;
2179 }
2180 msleep(50); /* give drive a breather */
2181 }
2182 if (dev1)
2183 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2184
2185 /* is all this really necessary? */
2186 ap->ops->dev_select(ap, 0);
2187 if (dev1)
2188 ap->ops->dev_select(ap, 1);
2189 if (dev0)
2190 ap->ops->dev_select(ap, 0);
2191}
2192
1da177e4
LT		 2193static unsigned int ata_bus_softreset(struct ata_port *ap,
2194 unsigned int devmask)
2195{
2196 struct ata_ioports *ioaddr = &ap->ioaddr;
2197
2198 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
2199
2200 /* software reset. causes dev0 to be selected */
2201 if (ap->flags & ATA_FLAG_MMIO) {
2202 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2203 udelay(20); /* FIXME: flush */
2204 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
2205 udelay(20); /* FIXME: flush */
2206 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2207 } else {
2208 outb(ap->ctl, ioaddr->ctl_addr);
2209 udelay(10);
2210 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2211 udelay(10);
2212 outb(ap->ctl, ioaddr->ctl_addr);
2213 }
2214
2215 /* spec mandates ">= 2ms" before checking status.
2216 * We wait 150ms, because that was the magic delay used for
2217 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2218 * between when the ATA command register is written, and then
2219 * status is checked. Because waiting for "a while" before
2220 * checking status is fine, post SRST, we perform this magic
2221 * delay here as well.
09c7ad79
AC		 2222 *
2223 * Old drivers/ide uses the 2mS rule and then waits for ready
1da177e4
LT		 2224 */
2225 msleep(150);
2226
2e9edbf8 2227 /* Before we perform post reset processing we want to see if
298a41ca
TH		 2228 * the bus shows 0xFF because the odd clown forgets the D7
2229 * pulldown resistor.
2230 */
09c7ad79 2231 if (ata_check_status(ap) == 0xFF)
298a41ca 2232 return AC_ERR_OTHER;
09c7ad79 2233
1da177e4
LT		 2234 ata_bus_post_reset(ap, devmask);
2235
2236 return 0;
2237}
2238
2239/**
2240 * ata_bus_reset - reset host port and associated ATA channel
2241 * @ap: port to reset
2242 *
2243 * This is typically the first time we actually start issuing
2244 * commands to the ATA channel. We wait for BSY to clear, then
2245 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2246 * result. Determine what devices, if any, are on the channel
2247 * by looking at the device 0/1 error register. Look at the signature
2248 * stored in each device's taskfile registers, to determine if
2249 * the device is ATA or ATAPI.
2250 *
2251 * LOCKING:
0cba632b
JG		 2252 * PCI/etc. bus probe sem.
2253 * Obtains host_set lock.
1da177e4
LT		 2254 *
2255 * SIDE EFFECTS:
198e0fed 2256 * Sets ATA_FLAG_DISABLED if bus reset fails.
1da177e4
LT		 2257 */
2258
2259void ata_bus_reset(struct ata_port *ap)
2260{
2261 struct ata_ioports *ioaddr = &ap->ioaddr;
2262 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2263 u8 err;
aec5c3c1 2264 unsigned int dev0, dev1 = 0, devmask = 0;
1da177e4
LT		 2265
2266 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2267
2268 /* determine if device 0/1 are present */
2269 if (ap->flags & ATA_FLAG_SATA_RESET)
2270 dev0 = 1;
2271 else {
2272 dev0 = ata_devchk(ap, 0);
2273 if (slave_possible)
2274 dev1 = ata_devchk(ap, 1);
2275 }
2276
2277 if (dev0)
2278 devmask |= (1 << 0);
2279 if (dev1)
2280 devmask |= (1 << 1);
2281
2282 /* select device 0 again */
2283 ap->ops->dev_select(ap, 0);
2284
2285 /* issue bus reset */
2286 if (ap->flags & ATA_FLAG_SRST)
aec5c3c1
TH		 2287 if (ata_bus_softreset(ap, devmask))
2288 goto err_out;
1da177e4
LT		 2289
2290 /*
2291 * determine by signature whether we have ATA or ATAPI devices
2292 */
b4dc7623 2293 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
1da177e4 2294 if ((slave_possible) && (err != 0x81))
b4dc7623 2295 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
1da177e4
LT		 2296
2297 /* re-enable interrupts */
2298 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2299 ata_irq_on(ap);
2300
2301 /* is double-select really necessary? */
2302 if (ap->device[1].class != ATA_DEV_NONE)
2303 ap->ops->dev_select(ap, 1);
2304 if (ap->device[0].class != ATA_DEV_NONE)
2305 ap->ops->dev_select(ap, 0);
2306
2307 /* if no devices were detected, disable this port */
2308 if ((ap->device[0].class == ATA_DEV_NONE) &&
2309 (ap->device[1].class == ATA_DEV_NONE))
2310 goto err_out;
2311
2312 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2313 /* set up device control for ATA_FLAG_SATA_RESET */
2314 if (ap->flags & ATA_FLAG_MMIO)
2315 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2316 else
2317 outb(ap->ctl, ioaddr->ctl_addr);
2318 }
2319
2320 DPRINTK("EXIT\n");
2321 return;
2322
2323err_out:
2324 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
2325 ap->ops->port_disable(ap);
2326
2327 DPRINTK("EXIT\n");
2328}
2329
7a7921e8
TH		 2330static int sata_phy_resume(struct ata_port *ap)
2331{
2332 unsigned long timeout = jiffies + (HZ * 5);
852ee16a 2333 u32 scontrol, sstatus;
7a7921e8 2334
852ee16a
TH		 2335 scontrol = scr_read(ap, SCR_CONTROL);
2336 scontrol = (scontrol & 0x0f0) | 0x300;
2337 scr_write_flush(ap, SCR_CONTROL, scontrol);
7a7921e8
TH		 2338
2339 /* Wait for phy to become ready, if necessary. */
2340 do {
2341 msleep(200);
2342 sstatus = scr_read(ap, SCR_STATUS);
2343 if ((sstatus & 0xf) != 1)
2344 return 0;
2345 } while (time_before(jiffies, timeout));
2346
2347 return -1;
2348}
2349
8a19ac89
TH		 2350/**
2351 * ata_std_probeinit - initialize probing
2352 * @ap: port to be probed
2353 *
2354 * @ap is about to be probed. Initialize it. This function is
2355 * to be used as standard callback for ata_drive_probe_reset().
3a39746a
TH		 2356 *
2357 * NOTE!!! Do not use this function as probeinit if a low level
2358 * driver implements only hardreset. Just pass NULL as probeinit
2359 * in that case. Using this function is probably okay but doing
2360 * so makes reset sequence different from the original
2361 * ->phy_reset implementation and Jeff nervous. :-P
8a19ac89 2362 */
17efc5f7 2363void ata_std_probeinit(struct ata_port *ap)
8a19ac89 2364{
17efc5f7 2365 if ((ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read) {
1c3fae4d
TH		 2366 u32 spd;
2367
8a19ac89 2368 sata_phy_resume(ap);
1c3fae4d
TH		 2369
2370 spd = (scr_read(ap, SCR_CONTROL) & 0xf0) >> 4;
2371 if (spd)
2372 ap->sata_spd_limit &= (1 << spd) - 1;
2373
3a39746a
TH		 2374 if (sata_dev_present(ap))
2375 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2376 }
8a19ac89
TH		 2377}
2378
c2bd5804
TH		 2379/**
2380 * ata_std_softreset - reset host port via ATA SRST
2381 * @ap: port to reset
2382 * @verbose: fail verbosely
2383 * @classes: resulting classes of attached devices
2384 *
2385 * Reset host port using ATA SRST. This function is to be used
2386 * as standard callback for ata_drive_*_reset() functions.
2387 *
2388 * LOCKING:
2389 * Kernel thread context (may sleep)
2390 *
2391 * RETURNS:
2392 * 0 on success, -errno otherwise.
2393 */
2394int ata_std_softreset(struct ata_port *ap, int verbose, unsigned int *classes)
2395{
2396 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2397 unsigned int devmask = 0, err_mask;
2398 u8 err;
2399
2400 DPRINTK("ENTER\n");
2401
3a39746a
TH		 2402 if (ap->ops->scr_read && !sata_dev_present(ap)) {
2403 classes[0] = ATA_DEV_NONE;
2404 goto out;
2405 }
2406
c2bd5804
TH		 2407 /* determine if device 0/1 are present */
2408 if (ata_devchk(ap, 0))
2409 devmask |= (1 << 0);
2410 if (slave_possible && ata_devchk(ap, 1))
2411 devmask |= (1 << 1);
2412
c2bd5804
TH		 2413 /* select device 0 again */
2414 ap->ops->dev_select(ap, 0);
2415
2416 /* issue bus reset */
2417 DPRINTK("about to softreset, devmask=%x\n", devmask);
2418 err_mask = ata_bus_softreset(ap, devmask);
2419 if (err_mask) {
2420 if (verbose)
2421 printk(KERN_ERR "ata%u: SRST failed (err_mask=0x%x)\n",
2422 ap->id, err_mask);
2423 else
2424 DPRINTK("EXIT, softreset failed (err_mask=0x%x)\n",
2425 err_mask);
2426 return -EIO;
2427 }
2428
2429 /* determine by signature whether we have ATA or ATAPI devices */
2430 classes[0] = ata_dev_try_classify(ap, 0, &err);
2431 if (slave_possible && err != 0x81)
2432 classes[1] = ata_dev_try_classify(ap, 1, &err);
2433
3a39746a 2434 out:
c2bd5804
TH		 2435 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2436 return 0;
2437}
2438
2439/**
2440 * sata_std_hardreset - reset host port via SATA phy reset
2441 * @ap: port to reset
2442 * @verbose: fail verbosely
2443 * @class: resulting class of attached device
2444 *
2445 * SATA phy-reset host port using DET bits of SControl register.
2446 * This function is to be used as standard callback for
2447 * ata_drive_*_reset().
2448 *
2449 * LOCKING:
2450 * Kernel thread context (may sleep)
2451 *
2452 * RETURNS:
2453 * 0 on success, -errno otherwise.
2454 */
2455int sata_std_hardreset(struct ata_port *ap, int verbose, unsigned int *class)
2456{
852ee16a
TH		 2457 u32 scontrol;
2458
c2bd5804
TH		 2459 DPRINTK("ENTER\n");
2460
1c3fae4d
TH		 2461 if (ata_set_sata_spd_needed(ap)) {
2462 /* SATA spec says nothing about how to reconfigure
2463 * spd. To be on the safe side, turn off phy during
2464 * reconfiguration. This works for at least ICH7 AHCI
2465 * and Sil3124.
2466 */
2467 scontrol = scr_read(ap, SCR_CONTROL);
2468 scontrol = (scontrol & 0x0f0) | 0x302;
2469 scr_write_flush(ap, SCR_CONTROL, scontrol);
2470
2471 ata_set_sata_spd(ap);
2472 }
2473
2474 /* issue phy wake/reset */
852ee16a
TH		 2475 scontrol = scr_read(ap, SCR_CONTROL);
2476 scontrol = (scontrol & 0x0f0) | 0x301;
2477 scr_write_flush(ap, SCR_CONTROL, scontrol);
c2bd5804 2478
1c3fae4d 2479 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
c2bd5804
TH		 2480 * 10.4.2 says at least 1 ms.
2481 */
2482 msleep(1);
2483
1c3fae4d 2484 /* bring phy back */
7a7921e8 2485 sata_phy_resume(ap);
c2bd5804 2486
c2bd5804
TH		 2487 /* TODO: phy layer with polling, timeouts, etc. */
2488 if (!sata_dev_present(ap)) {
2489 *class = ATA_DEV_NONE;
2490 DPRINTK("EXIT, link offline\n");
2491 return 0;
2492 }
2493
2494 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2495 if (verbose)
2496 printk(KERN_ERR "ata%u: COMRESET failed "
2497 "(device not ready)\n", ap->id);
2498 else
2499 DPRINTK("EXIT, device not ready\n");
2500 return -EIO;
2501 }
2502
3a39746a
TH		 2503 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2504
c2bd5804
TH		 2505 *class = ata_dev_try_classify(ap, 0, NULL);
2506
2507 DPRINTK("EXIT, class=%u\n", *class);
2508 return 0;
2509}
2510
2511/**
2512 * ata_std_postreset - standard postreset callback
2513 * @ap: the target ata_port
2514 * @classes: classes of attached devices
2515 *
2516 * This function is invoked after a successful reset. Note that
2517 * the device might have been reset more than once using
2518 * different reset methods before postreset is invoked.
c2bd5804
TH		 2519 *
2520 * This function is to be used as standard callback for
2521 * ata_drive_*_reset().
2522 *
2523 * LOCKING:
2524 * Kernel thread context (may sleep)
2525 */
2526void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2527{
2528 DPRINTK("ENTER\n");
2529
56497bd5 2530 /* set cable type if it isn't already set */
c2bd5804
TH		 2531 if (ap->cbl == ATA_CBL_NONE && ap->flags & ATA_FLAG_SATA)
2532 ap->cbl = ATA_CBL_SATA;
2533
2534 /* print link status */
2535 if (ap->cbl == ATA_CBL_SATA)
2536 sata_print_link_status(ap);
2537
3a39746a
TH		 2538 /* re-enable interrupts */
2539 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2540 ata_irq_on(ap);
c2bd5804
TH		 2541
2542 /* is double-select really necessary? */
2543 if (classes[0] != ATA_DEV_NONE)
2544 ap->ops->dev_select(ap, 1);
2545 if (classes[1] != ATA_DEV_NONE)
2546 ap->ops->dev_select(ap, 0);
2547
3a39746a
TH		 2548 /* bail out if no device is present */
2549 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2550 DPRINTK("EXIT, no device\n");
2551 return;
2552 }
2553
2554 /* set up device control */
2555 if (ap->ioaddr.ctl_addr) {
2556 if (ap->flags & ATA_FLAG_MMIO)
2557 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2558 else
2559 outb(ap->ctl, ap->ioaddr.ctl_addr);
2560 }
c2bd5804
TH		 2561
2562 DPRINTK("EXIT\n");
2563}
2564
2565/**
2566 * ata_std_probe_reset - standard probe reset method
2567 * @ap: prot to perform probe-reset
2568 * @classes: resulting classes of attached devices
2569 *
2570 * The stock off-the-shelf ->probe_reset method.
2571 *
2572 * LOCKING:
2573 * Kernel thread context (may sleep)
2574 *
2575 * RETURNS:
2576 * 0 on success, -errno otherwise.
2577 */
2578int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes)
2579{
2580 ata_reset_fn_t hardreset;
2581
2582 hardreset = NULL;
b911fc3a 2583 if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read)
c2bd5804
TH		 2584 hardreset = sata_std_hardreset;
2585
8a19ac89 2586 return ata_drive_probe_reset(ap, ata_std_probeinit,
7944ea95 2587 ata_std_softreset, hardreset,
c2bd5804
TH		 2588 ata_std_postreset, classes);
2589}
2590
1ad8e7f9
TH		 2591int ata_do_reset(struct ata_port *ap,
2592 ata_reset_fn_t reset, ata_postreset_fn_t postreset,
2593 int verbose, unsigned int *classes)
a62c0fc5
TH		 2594{
2595 int i, rc;
2596
2597 for (i = 0; i < ATA_MAX_DEVICES; i++)
2598 classes[i] = ATA_DEV_UNKNOWN;
2599
9974e7cc 2600 rc = reset(ap, verbose, classes);
a62c0fc5
TH		 2601 if (rc)
2602 return rc;
2603
2604 /* If any class isn't ATA_DEV_UNKNOWN, consider classification
2605 * is complete and convert all ATA_DEV_UNKNOWN to
2606 * ATA_DEV_NONE.
2607 */
2608 for (i = 0; i < ATA_MAX_DEVICES; i++)
2609 if (classes[i] != ATA_DEV_UNKNOWN)
2610 break;
2611
2612 if (i < ATA_MAX_DEVICES)
2613 for (i = 0; i < ATA_MAX_DEVICES; i++)
2614 if (classes[i] == ATA_DEV_UNKNOWN)
2615 classes[i] = ATA_DEV_NONE;
2616
2617 if (postreset)
2618 postreset(ap, classes);
2619
9974e7cc 2620 return 0;
a62c0fc5
TH		 2621}
2622
2623/**
2624 * ata_drive_probe_reset - Perform probe reset with given methods
2625 * @ap: port to reset
7944ea95 2626 * @probeinit: probeinit method (can be NULL)
a62c0fc5
TH		 2627 * @softreset: softreset method (can be NULL)
2628 * @hardreset: hardreset method (can be NULL)
2629 * @postreset: postreset method (can be NULL)
2630 * @classes: resulting classes of attached devices
2631 *
2632 * Reset the specified port and classify attached devices using
2633 * given methods. This function prefers softreset but tries all
2634 * possible reset sequences to reset and classify devices. This
2635 * function is intended to be used for constructing ->probe_reset
2636 * callback by low level drivers.
2637 *
2638 * Reset methods should follow the following rules.
2639 *
2640 * - Return 0 on sucess, -errno on failure.
2641 * - If classification is supported, fill classes[] with
2642 * recognized class codes.
2643 * - If classification is not supported, leave classes[] alone.
2644 * - If verbose is non-zero, print error message on failure;
2645 * otherwise, shut up.
2646 *
2647 * LOCKING:
2648 * Kernel thread context (may sleep)
2649 *
2650 * RETURNS:
2651 * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV
2652 * if classification fails, and any error code from reset
2653 * methods.
2654 */
7944ea95 2655int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit,
a62c0fc5
TH		 2656 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
2657 ata_postreset_fn_t postreset, unsigned int *classes)
2658{
2659 int rc = -EINVAL;
2660
7944ea95
TH		 2661 if (probeinit)
2662 probeinit(ap);
2663
90dac02c 2664 if (softreset && !ata_set_sata_spd_needed(ap)) {
9974e7cc
TH		 2665 rc = ata_do_reset(ap, softreset, postreset, 0, classes);
2666 if (rc == 0 && classes[0] != ATA_DEV_UNKNOWN)
2667 goto done;
edbabd86
TH		 2668 printk(KERN_INFO "ata%u: softreset failed, will try "
2669 "hardreset in 5 secs\n", ap->id);
2670 ssleep(5);
a62c0fc5
TH		 2671 }
2672
2673 if (!hardreset)
9974e7cc 2674 goto done;
a62c0fc5 2675
90dac02c
TH		 2676 while (1) {
2677 rc = ata_do_reset(ap, hardreset, postreset, 0, classes);
2678 if (rc == 0) {
2679 if (classes[0] != ATA_DEV_UNKNOWN)
2680 goto done;
2681 break;
2682 }
2683
2684 if (ata_down_sata_spd_limit(ap))
2685 goto done;
edbabd86
TH		 2686
2687 printk(KERN_INFO "ata%u: hardreset failed, will retry "
2688 "in 5 secs\n", ap->id);
2689 ssleep(5);
90dac02c 2690 }
a62c0fc5 2691
edbabd86
TH		 2692 if (softreset) {
2693 printk(KERN_INFO "ata%u: hardreset succeeded without "
2694 "classification, will retry softreset in 5 secs\n",
2695 ap->id);
2696 ssleep(5);
2697
9974e7cc 2698 rc = ata_do_reset(ap, softreset, postreset, 0, classes);
edbabd86 2699 }
a62c0fc5 2700
9974e7cc
TH		 2701 done:
2702 if (rc == 0 && classes[0] == ATA_DEV_UNKNOWN)
2703 rc = -ENODEV;
a62c0fc5
TH		 2704 return rc;
2705}
2706
623a3128
TH		 2707/**
2708 * ata_dev_same_device - Determine whether new ID matches configured device
2709 * @ap: port on which the device to compare against resides
2710 * @dev: device to compare against
2711 * @new_class: class of the new device
2712 * @new_id: IDENTIFY page of the new device
2713 *
2714 * Compare @new_class and @new_id against @dev and determine
2715 * whether @dev is the device indicated by @new_class and
2716 * @new_id.
2717 *
2718 * LOCKING:
2719 * None.
2720 *
2721 * RETURNS:
2722 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
2723 */
2724static int ata_dev_same_device(struct ata_port *ap, struct ata_device *dev,
2725 unsigned int new_class, const u16 *new_id)
2726{
2727 const u16 *old_id = dev->id;
2728 unsigned char model[2][41], serial[2][21];
2729 u64 new_n_sectors;
2730
2731 if (dev->class != new_class) {
2732 printk(KERN_INFO
2733 "ata%u: dev %u class mismatch %d != %d\n",
2734 ap->id, dev->devno, dev->class, new_class);
2735 return 0;
2736 }
2737
2738 ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
2739 ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
2740 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
2741 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
2742 new_n_sectors = ata_id_n_sectors(new_id);
2743
2744 if (strcmp(model[0], model[1])) {
2745 printk(KERN_INFO
2746 "ata%u: dev %u model number mismatch '%s' != '%s'\n",
2747 ap->id, dev->devno, model[0], model[1]);
2748 return 0;
2749 }
2750
2751 if (strcmp(serial[0], serial[1])) {
2752 printk(KERN_INFO
2753 "ata%u: dev %u serial number mismatch '%s' != '%s'\n",
2754 ap->id, dev->devno, serial[0], serial[1]);
2755 return 0;
2756 }
2757
2758 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
2759 printk(KERN_INFO
2760 "ata%u: dev %u n_sectors mismatch %llu != %llu\n",
2761 ap->id, dev->devno, (unsigned long long)dev->n_sectors,
2762 (unsigned long long)new_n_sectors);
2763 return 0;
2764 }
2765
2766 return 1;
2767}
2768
2769/**
2770 * ata_dev_revalidate - Revalidate ATA device
2771 * @ap: port on which the device to revalidate resides
2772 * @dev: device to revalidate
2773 * @post_reset: is this revalidation after reset?
2774 *
2775 * Re-read IDENTIFY page and make sure @dev is still attached to
2776 * the port.
2777 *
2778 * LOCKING:
2779 * Kernel thread context (may sleep)
2780 *
2781 * RETURNS:
2782 * 0 on success, negative errno otherwise
2783 */
2784int ata_dev_revalidate(struct ata_port *ap, struct ata_device *dev,
2785 int post_reset)
2786{
5eb45c02
TH		 2787 unsigned int class = dev->class;
2788 u16 *id = NULL;
623a3128
TH		 2789 int rc;
2790
5eb45c02
TH		 2791 if (!ata_dev_enabled(dev)) {
2792 rc = -ENODEV;
2793 goto fail;
2794 }
623a3128
TH		 2795
2796 /* allocate & read ID data */
2797 rc = ata_dev_read_id(ap, dev, &class, post_reset, &id);
2798 if (rc)
2799 goto fail;
2800
2801 /* is the device still there? */
2802 if (!ata_dev_same_device(ap, dev, class, id)) {
2803 rc = -ENODEV;
2804 goto fail;
2805 }
2806
2807 kfree(dev->id);
2808 dev->id = id;
2809
2810 /* configure device according to the new ID */
5eb45c02
TH		 2811 rc = ata_dev_configure(ap, dev, 0);
2812 if (rc == 0)
2813 return 0;
623a3128
TH		 2814
2815 fail:
2816 printk(KERN_ERR "ata%u: dev %u revalidation failed (errno=%d)\n",
2817 ap->id, dev->devno, rc);
2818 kfree(id);
2819 return rc;
2820}
2821
98ac62de 2822static const char * const ata_dma_blacklist [] = {
f4b15fef
AC		 2823 "WDC AC11000H", NULL,
2824 "WDC AC22100H", NULL,
2825 "WDC AC32500H", NULL,
2826 "WDC AC33100H", NULL,
2827 "WDC AC31600H", NULL,
2828 "WDC AC32100H", "24.09P07",
2829 "WDC AC23200L", "21.10N21",
2830 "Compaq CRD-8241B", NULL,
2831 "CRD-8400B", NULL,
2832 "CRD-8480B", NULL,
2833 "CRD-8482B", NULL,
2834 "CRD-84", NULL,
2835 "SanDisk SDP3B", NULL,
2836 "SanDisk SDP3B-64", NULL,
2837 "SANYO CD-ROM CRD", NULL,
2838 "HITACHI CDR-8", NULL,
2e9edbf8 2839 "HITACHI CDR-8335", NULL,
f4b15fef 2840 "HITACHI CDR-8435", NULL,
2e9edbf8
JG		 2841 "Toshiba CD-ROM XM-6202B", NULL,
2842 "TOSHIBA CD-ROM XM-1702BC", NULL,
2843 "CD-532E-A", NULL,
2844 "E-IDE CD-ROM CR-840", NULL,
2845 "CD-ROM Drive/F5A", NULL,
2846 "WPI CDD-820", NULL,
f4b15fef 2847 "SAMSUNG CD-ROM SC-148C", NULL,
2e9edbf8 2848 "SAMSUNG CD-ROM SC", NULL,
f4b15fef
AC		 2849 "SanDisk SDP3B-64", NULL,
2850 "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,
2851 "_NEC DV5800A", NULL,
2852 "SAMSUNG CD-ROM SN-124", "N001"
1da177e4 2853};
2e9edbf8 2854
f4b15fef
AC		 2855static int ata_strim(char *s, size_t len)
2856{
2857 len = strnlen(s, len);
2858
2859 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2860 while ((len > 0) && (s[len - 1] == ' ')) {
2861 len--;
2862 s[len] = 0;
2863 }
2864 return len;
2865}
1da177e4 2866
057ace5e 2867static int ata_dma_blacklisted(const struct ata_device *dev)
1da177e4 2868{
f4b15fef
AC		 2869 unsigned char model_num[40];
2870 unsigned char model_rev[16];
2871 unsigned int nlen, rlen;
1da177e4
LT		 2872 int i;
2873
f4b15fef
AC		 2874 ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
2875 sizeof(model_num));
2876 ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS,
2877 sizeof(model_rev));
2878 nlen = ata_strim(model_num, sizeof(model_num));
2879 rlen = ata_strim(model_rev, sizeof(model_rev));
1da177e4 2880
f4b15fef
AC		 2881 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i += 2) {
2882 if (!strncmp(ata_dma_blacklist[i], model_num, nlen)) {
2883 if (ata_dma_blacklist[i+1] == NULL)
2884 return 1;
2885 if (!strncmp(ata_dma_blacklist[i], model_rev, rlen))
2886 return 1;
2887 }
2888 }
1da177e4
LT		 2889 return 0;
2890}
2891
a6d5a51c
TH		 2892/**
2893 * ata_dev_xfermask - Compute supported xfermask of the given device
2894 * @ap: Port on which the device to compute xfermask for resides
2895 * @dev: Device to compute xfermask for
2896 *
acf356b1
TH		 2897 * Compute supported xfermask of @dev and store it in
2898 * dev->*_mask. This function is responsible for applying all
2899 * known limits including host controller limits, device
2900 * blacklist, etc...
a6d5a51c 2901 *
600511e8
TH		 2902 * FIXME: The current implementation limits all transfer modes to
2903 * the fastest of the lowested device on the port. This is not
05c8e0ac 2904 * required on most controllers.
600511e8 2905 *
a6d5a51c
TH		 2906 * LOCKING:
2907 * None.
a6d5a51c 2908 */
acf356b1 2909static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev)
1da177e4 2910{
5444a6f4 2911 struct ata_host_set *hs = ap->host_set;
a6d5a51c
TH		 2912 unsigned long xfer_mask;
2913 int i;
1da177e4 2914
565083e1
TH		 2915 xfer_mask = ata_pack_xfermask(ap->pio_mask,
2916 ap->mwdma_mask, ap->udma_mask);
2917
2918 /* Apply cable rule here. Don't apply it early because when
2919 * we handle hot plug the cable type can itself change.
2920 */
2921 if (ap->cbl == ATA_CBL_PATA40)
2922 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
1da177e4 2923
5444a6f4 2924 /* FIXME: Use port-wide xfermask for now */
a6d5a51c
TH		 2925 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2926 struct ata_device *d = &ap->device[i];
565083e1
TH		 2927
2928 if (ata_dev_absent(d))
2929 continue;
2930
2931 if (ata_dev_disabled(d)) {
2932 /* to avoid violating device selection timing */
2933 xfer_mask &= ata_pack_xfermask(d->pio_mask,
2934 UINT_MAX, UINT_MAX);
a6d5a51c 2935 continue;
565083e1
TH		 2936 }
2937
2938 xfer_mask &= ata_pack_xfermask(d->pio_mask,
2939 d->mwdma_mask, d->udma_mask);
a6d5a51c
TH		 2940 xfer_mask &= ata_id_xfermask(d->id);
2941 if (ata_dma_blacklisted(d))
2942 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
1da177e4
LT		 2943 }
2944
a6d5a51c
TH		 2945 if (ata_dma_blacklisted(dev))
2946 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, "
2947 "disabling DMA\n", ap->id, dev->devno);
2948
5444a6f4
AC		 2949 if (hs->flags & ATA_HOST_SIMPLEX) {
2950 if (hs->simplex_claimed)
2951 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
2952 }
565083e1 2953
5444a6f4
AC		 2954 if (ap->ops->mode_filter)
2955 xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
2956
565083e1
TH		 2957 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
2958 &dev->mwdma_mask, &dev->udma_mask);
1da177e4
LT		 2959}
2960
1da177e4
LT		 2961/**
2962 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2963 * @ap: Port associated with device @dev
2964 * @dev: Device to which command will be sent
2965 *
780a87f7
JG		 2966 * Issue SET FEATURES - XFER MODE command to device @dev
2967 * on port @ap.
2968 *
1da177e4 2969 * LOCKING:
0cba632b 2970 * PCI/etc. bus probe sem.
83206a29
TH		 2971 *
2972 * RETURNS:
2973 * 0 on success, AC_ERR_* mask otherwise.
1da177e4
LT		 2974 */
2975
83206a29
TH		 2976static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
2977 struct ata_device *dev)
1da177e4 2978{
a0123703 2979 struct ata_taskfile tf;
83206a29 2980 unsigned int err_mask;
1da177e4
LT		 2981
2982 /* set up set-features taskfile */
2983 DPRINTK("set features - xfer mode\n");
2984
a0123703
TH		 2985 ata_tf_init(ap, &tf, dev->devno);
2986 tf.command = ATA_CMD_SET_FEATURES;
2987 tf.feature = SETFEATURES_XFER;
2988 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2989 tf.protocol = ATA_PROT_NODATA;
2990 tf.nsect = dev->xfer_mode;
1da177e4 2991
d69cf37d 2992 err_mask = ata_exec_internal(ap, dev, &tf, NULL, DMA_NONE, NULL, 0);
1da177e4 2993
83206a29
TH		 2994 DPRINTK("EXIT, err_mask=%x\n", err_mask);
2995 return err_mask;
1da177e4
LT		 2996}
2997
8bf62ece
AL		 2998/**
2999 * ata_dev_init_params - Issue INIT DEV PARAMS command
3000 * @ap: Port associated with device @dev
3001 * @dev: Device to which command will be sent
3002 *
3003 * LOCKING:
6aff8f1f
TH		 3004 * Kernel thread context (may sleep)
3005 *
3006 * RETURNS:
3007 * 0 on success, AC_ERR_* mask otherwise.
8bf62ece
AL		 3008 */
3009
6aff8f1f 3010static unsigned int ata_dev_init_params(struct ata_port *ap,
00b6f5e9
AL		 3011 struct ata_device *dev,
3012 u16 heads,
3013 u16 sectors)
8bf62ece 3014{
a0123703 3015 struct ata_taskfile tf;
6aff8f1f 3016 unsigned int err_mask;
8bf62ece
AL		 3017
3018 /* Number of sectors per track 1-255. Number of heads 1-16 */
3019 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
00b6f5e9 3020 return AC_ERR_INVALID;
8bf62ece
AL		 3021
3022 /* set up init dev params taskfile */
3023 DPRINTK("init dev params \n");
3024
a0123703
TH		 3025 ata_tf_init(ap, &tf, dev->devno);
3026 tf.command = ATA_CMD_INIT_DEV_PARAMS;
3027 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3028 tf.protocol = ATA_PROT_NODATA;
3029 tf.nsect = sectors;
3030 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
8bf62ece 3031
d69cf37d 3032 err_mask = ata_exec_internal(ap, dev, &tf, NULL, DMA_NONE, NULL, 0);
8bf62ece 3033
6aff8f1f
TH		 3034 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3035 return err_mask;
8bf62ece
AL		 3036}
3037
1da177e4 3038/**
0cba632b
JG		 3039 * ata_sg_clean - Unmap DMA memory associated with command
3040 * @qc: Command containing DMA memory to be released
3041 *
3042 * Unmap all mapped DMA memory associated with this command.
1da177e4
LT		 3043 *
3044 * LOCKING:
0cba632b 3045 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 3046 */
3047
3048static void ata_sg_clean(struct ata_queued_cmd *qc)
3049{
3050 struct ata_port *ap = qc->ap;
cedc9a47 3051 struct scatterlist *sg = qc->__sg;
1da177e4 3052 int dir = qc->dma_dir;
cedc9a47 3053 void *pad_buf = NULL;
1da177e4 3054
a4631474
TH		 3055 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
3056 WARN_ON(sg == NULL);
1da177e4
LT		 3057
3058 if (qc->flags & ATA_QCFLAG_SINGLE)
f131883e 3059 WARN_ON(qc->n_elem > 1);
1da177e4 3060
2c13b7ce 3061 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
1da177e4 3062
cedc9a47
JG		 3063 /* if we padded the buffer out to 32-bit bound, and data
3064 * xfer direction is from-device, we must copy from the
3065 * pad buffer back into the supplied buffer
3066 */
3067 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
3068 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3069
3070 if (qc->flags & ATA_QCFLAG_SG) {
e1410f2d 3071 if (qc->n_elem)
2f1f610b 3072 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
cedc9a47
JG		 3073 /* restore last sg */
3074 sg[qc->orig_n_elem - 1].length += qc->pad_len;
3075 if (pad_buf) {
3076 struct scatterlist *psg = &qc->pad_sgent;
3077 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3078 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
dfa15988 3079 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 3080 }
3081 } else {
2e242fa9 3082 if (qc->n_elem)
2f1f610b 3083 dma_unmap_single(ap->dev,
e1410f2d
JG		 3084 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
3085 dir);
cedc9a47
JG		 3086 /* restore sg */
3087 sg->length += qc->pad_len;
3088 if (pad_buf)
3089 memcpy(qc->buf_virt + sg->length - qc->pad_len,
3090 pad_buf, qc->pad_len);
3091 }
1da177e4
LT		 3092
3093 qc->flags &= ~ATA_QCFLAG_DMAMAP;
cedc9a47 3094 qc->__sg = NULL;
1da177e4
LT		 3095}
3096
3097/**
3098 * ata_fill_sg - Fill PCI IDE PRD table
3099 * @qc: Metadata associated with taskfile to be transferred
3100 *
780a87f7
JG		 3101 * Fill PCI IDE PRD (scatter-gather) table with segments
3102 * associated with the current disk command.
3103 *
1da177e4 3104 * LOCKING:
780a87f7 3105 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 3106 *
3107 */
3108static void ata_fill_sg(struct ata_queued_cmd *qc)
3109{
1da177e4 3110 struct ata_port *ap = qc->ap;
cedc9a47
JG		 3111 struct scatterlist *sg;
3112 unsigned int idx;
1da177e4 3113
a4631474 3114 WARN_ON(qc->__sg == NULL);
f131883e 3115 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
1da177e4
LT		 3116
3117 idx = 0;
cedc9a47 3118 ata_for_each_sg(sg, qc) {
1da177e4
LT		 3119 u32 addr, offset;
3120 u32 sg_len, len;
3121
3122 /* determine if physical DMA addr spans 64K boundary.
3123 * Note h/w doesn't support 64-bit, so we unconditionally
3124 * truncate dma_addr_t to u32.
3125 */
3126 addr = (u32) sg_dma_address(sg);
3127 sg_len = sg_dma_len(sg);
3128
3129 while (sg_len) {
3130 offset = addr & 0xffff;
3131 len = sg_len;
3132 if ((offset + sg_len) > 0x10000)
3133 len = 0x10000 - offset;
3134
3135 ap->prd[idx].addr = cpu_to_le32(addr);
3136 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
3137 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
3138
3139 idx++;
3140 sg_len -= len;
3141 addr += len;
3142 }
3143 }
3144
3145 if (idx)
3146 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
3147}
3148/**
3149 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
3150 * @qc: Metadata associated with taskfile to check
3151 *
780a87f7
JG		 3152 * Allow low-level driver to filter ATA PACKET commands, returning
3153 * a status indicating whether or not it is OK to use DMA for the
3154 * supplied PACKET command.
3155 *
1da177e4 3156 * LOCKING:
0cba632b
JG		 3157 * spin_lock_irqsave(host_set lock)
3158 *
1da177e4
LT		 3159 * RETURNS: 0 when ATAPI DMA can be used
3160 * nonzero otherwise
3161 */
3162int ata_check_atapi_dma(struct ata_queued_cmd *qc)
3163{
3164 struct ata_port *ap = qc->ap;
3165 int rc = 0; /* Assume ATAPI DMA is OK by default */
3166
3167 if (ap->ops->check_atapi_dma)
3168 rc = ap->ops->check_atapi_dma(qc);
3169
3170 return rc;
3171}
3172/**
3173 * ata_qc_prep - Prepare taskfile for submission
3174 * @qc: Metadata associated with taskfile to be prepared
3175 *
780a87f7
JG		 3176 * Prepare ATA taskfile for submission.
3177 *
1da177e4
LT		 3178 * LOCKING:
3179 * spin_lock_irqsave(host_set lock)
3180 */
3181void ata_qc_prep(struct ata_queued_cmd *qc)
3182{
3183 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
3184 return;
3185
3186 ata_fill_sg(qc);
3187}
3188
e46834cd
BK		 3189void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
3190
0cba632b
JG		 3191/**
3192 * ata_sg_init_one - Associate command with memory buffer
3193 * @qc: Command to be associated
3194 * @buf: Memory buffer
3195 * @buflen: Length of memory buffer, in bytes.
3196 *
3197 * Initialize the data-related elements of queued_cmd @qc
3198 * to point to a single memory buffer, @buf of byte length @buflen.
3199 *
3200 * LOCKING:
3201 * spin_lock_irqsave(host_set lock)
3202 */
3203
1da177e4
LT		 3204void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
3205{
3206 struct scatterlist *sg;
3207
3208 qc->flags |= ATA_QCFLAG_SINGLE;
3209
3210 memset(&qc->sgent, 0, sizeof(qc->sgent));
cedc9a47 3211 qc->__sg = &qc->sgent;
1da177e4 3212 qc->n_elem = 1;
cedc9a47 3213 qc->orig_n_elem = 1;
1da177e4
LT		 3214 qc->buf_virt = buf;
3215
cedc9a47 3216 sg = qc->__sg;
f0612bbc 3217 sg_init_one(sg, buf, buflen);
1da177e4
LT		 3218}
3219
0cba632b
JG		 3220/**
3221 * ata_sg_init - Associate command with scatter-gather table.
3222 * @qc: Command to be associated
3223 * @sg: Scatter-gather table.
3224 * @n_elem: Number of elements in s/g table.
3225 *
3226 * Initialize the data-related elements of queued_cmd @qc
3227 * to point to a scatter-gather table @sg, containing @n_elem
3228 * elements.
3229 *
3230 * LOCKING:
3231 * spin_lock_irqsave(host_set lock)
3232 */
3233
1da177e4
LT		 3234void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
3235 unsigned int n_elem)
3236{
3237 qc->flags |= ATA_QCFLAG_SG;
cedc9a47 3238 qc->__sg = sg;
1da177e4 3239 qc->n_elem = n_elem;
cedc9a47 3240 qc->orig_n_elem = n_elem;
1da177e4
LT		 3241}
3242
3243/**
0cba632b
JG		 3244 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
3245 * @qc: Command with memory buffer to be mapped.
3246 *
3247 * DMA-map the memory buffer associated with queued_cmd @qc.
1da177e4
LT		 3248 *
3249 * LOCKING:
3250 * spin_lock_irqsave(host_set lock)
3251 *
3252 * RETURNS:
0cba632b 3253 * Zero on success, negative on error.
1da177e4
LT		 3254 */
3255
3256static int ata_sg_setup_one(struct ata_queued_cmd *qc)
3257{
3258 struct ata_port *ap = qc->ap;
3259 int dir = qc->dma_dir;
cedc9a47 3260 struct scatterlist *sg = qc->__sg;
1da177e4 3261 dma_addr_t dma_address;
2e242fa9 3262 int trim_sg = 0;
1da177e4 3263
cedc9a47
JG		 3264 /* we must lengthen transfers to end on a 32-bit boundary */
3265 qc->pad_len = sg->length & 3;
3266 if (qc->pad_len) {
3267 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3268 struct scatterlist *psg = &qc->pad_sgent;
3269
a4631474 3270 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 3271
3272 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3273
3274 if (qc->tf.flags & ATA_TFLAG_WRITE)
3275 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
3276 qc->pad_len);
3277
3278 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3279 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3280 /* trim sg */
3281 sg->length -= qc->pad_len;
2e242fa9
TH		 3282 if (sg->length == 0)
3283 trim_sg = 1;
cedc9a47
JG		 3284
3285 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3286 sg->length, qc->pad_len);
3287 }
3288
2e242fa9
TH		 3289 if (trim_sg) {
3290 qc->n_elem--;
e1410f2d
JG		 3291 goto skip_map;
3292 }
3293
2f1f610b 3294 dma_address = dma_map_single(ap->dev, qc->buf_virt,
32529e01 3295 sg->length, dir);
537a95d9
TH		 3296 if (dma_mapping_error(dma_address)) {
3297 /* restore sg */
3298 sg->length += qc->pad_len;
1da177e4 3299 return -1;
537a95d9 3300 }
1da177e4
LT		 3301
3302 sg_dma_address(sg) = dma_address;
32529e01 3303 sg_dma_len(sg) = sg->length;
1da177e4 3304
2e242fa9 3305skip_map:
1da177e4
LT		 3306 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3307 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3308
3309 return 0;
3310}
3311
3312/**
0cba632b
JG		 3313 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3314 * @qc: Command with scatter-gather table to be mapped.
3315 *
3316 * DMA-map the scatter-gather table associated with queued_cmd @qc.
1da177e4
LT		 3317 *
3318 * LOCKING:
3319 * spin_lock_irqsave(host_set lock)
3320 *
3321 * RETURNS:
0cba632b 3322 * Zero on success, negative on error.
1da177e4
LT		 3323 *
3324 */
3325
3326static int ata_sg_setup(struct ata_queued_cmd *qc)
3327{
3328 struct ata_port *ap = qc->ap;
cedc9a47
JG		 3329 struct scatterlist *sg = qc->__sg;
3330 struct scatterlist *lsg = &sg[qc->n_elem - 1];
e1410f2d 3331 int n_elem, pre_n_elem, dir, trim_sg = 0;
1da177e4
LT		 3332
3333 VPRINTK("ENTER, ata%u\n", ap->id);
a4631474 3334 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
1da177e4 3335
cedc9a47
JG		 3336 /* we must lengthen transfers to end on a 32-bit boundary */
3337 qc->pad_len = lsg->length & 3;
3338 if (qc->pad_len) {
3339 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3340 struct scatterlist *psg = &qc->pad_sgent;
3341 unsigned int offset;
3342
a4631474 3343 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 3344
3345 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3346
3347 /*
3348 * psg->page/offset are used to copy to-be-written
3349 * data in this function or read data in ata_sg_clean.
3350 */
3351 offset = lsg->offset + lsg->length - qc->pad_len;
3352 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3353 psg->offset = offset_in_page(offset);
3354
3355 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3356 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3357 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
dfa15988 3358 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 3359 }
3360
3361 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3362 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3363 /* trim last sg */
3364 lsg->length -= qc->pad_len;
e1410f2d
JG		 3365 if (lsg->length == 0)
3366 trim_sg = 1;
cedc9a47
JG		 3367
3368 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3369 qc->n_elem - 1, lsg->length, qc->pad_len);
3370 }
3371
e1410f2d
JG		 3372 pre_n_elem = qc->n_elem;
3373 if (trim_sg && pre_n_elem)
3374 pre_n_elem--;
3375
3376 if (!pre_n_elem) {
3377 n_elem = 0;
3378 goto skip_map;
3379 }
3380
1da177e4 3381 dir = qc->dma_dir;
2f1f610b 3382 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
537a95d9
TH		 3383 if (n_elem < 1) {
3384 /* restore last sg */
3385 lsg->length += qc->pad_len;
1da177e4 3386 return -1;
537a95d9 3387 }
1da177e4
LT		 3388
3389 DPRINTK("%d sg elements mapped\n", n_elem);
3390
e1410f2d 3391skip_map:
1da177e4
LT		 3392 qc->n_elem = n_elem;
3393
3394 return 0;
3395}
3396
40e8c82c
TH		 3397/**
3398 * ata_poll_qc_complete - turn irq back on and finish qc
3399 * @qc: Command to complete
8e8b77dd 3400 * @err_mask: ATA status register content
40e8c82c
TH		 3401 *
3402 * LOCKING:
3403 * None. (grabs host lock)
3404 */
3405
a22e2eb0 3406void ata_poll_qc_complete(struct ata_queued_cmd *qc)
40e8c82c
TH		 3407{
3408 struct ata_port *ap = qc->ap;
b8f6153e 3409 unsigned long flags;
40e8c82c 3410
b8f6153e 3411 spin_lock_irqsave(&ap->host_set->lock, flags);
40e8c82c
TH		 3412 ap->flags &= ~ATA_FLAG_NOINTR;
3413 ata_irq_on(ap);
a22e2eb0 3414 ata_qc_complete(qc);
b8f6153e 3415 spin_unlock_irqrestore(&ap->host_set->lock, flags);
40e8c82c
TH		 3416}
3417
1da177e4 3418/**
c893a3ae 3419 * ata_pio_poll - poll using PIO, depending on current state
c91af2c8 3420 * @qc: qc in progress
1da177e4
LT		 3421 *
3422 * LOCKING:
0cba632b 3423 * None. (executing in kernel thread context)
1da177e4
LT		 3424 *
3425 * RETURNS:
6f0ef4fa 3426 * timeout value to use
1da177e4 3427 */
c91af2c8 3428static unsigned long ata_pio_poll(struct ata_queued_cmd *qc)
1da177e4 3429{
c91af2c8 3430 struct ata_port *ap = qc->ap;
1da177e4 3431 u8 status;
14be71f4
AL		 3432 unsigned int poll_state = HSM_ST_UNKNOWN;
3433 unsigned int reg_state = HSM_ST_UNKNOWN;
14be71f4
AL		 3434
3435 switch (ap->hsm_task_state) {
3436 case HSM_ST:
3437 case HSM_ST_POLL:
3438 poll_state = HSM_ST_POLL;
3439 reg_state = HSM_ST;
1da177e4 3440 break;
14be71f4
AL		 3441 case HSM_ST_LAST:
3442 case HSM_ST_LAST_POLL:
3443 poll_state = HSM_ST_LAST_POLL;
3444 reg_state = HSM_ST_LAST;
1da177e4
LT		 3445 break;
3446 default:
3447 BUG();
3448 break;
3449 }
3450
3451 status = ata_chk_status(ap);
3452 if (status & ATA_BUSY) {
3453 if (time_after(jiffies, ap->pio_task_timeout)) {
11a56d24 3454 qc->err_mask |= AC_ERR_TIMEOUT;
7c398335 3455 ap->hsm_task_state = HSM_ST_TMOUT;
1da177e4
LT		 3456 return 0;
3457 }
14be71f4 3458 ap->hsm_task_state = poll_state;
1da177e4
LT		 3459 return ATA_SHORT_PAUSE;
3460 }
3461
14be71f4 3462 ap->hsm_task_state = reg_state;
1da177e4
LT		 3463 return 0;
3464}
3465
3466/**
6f0ef4fa 3467 * ata_pio_complete - check if drive is busy or idle
c91af2c8 3468 * @qc: qc to complete
1da177e4
LT		 3469 *
3470 * LOCKING:
0cba632b 3471 * None. (executing in kernel thread context)
7fb6ec28
JG		 3472 *
3473 * RETURNS:
3474 * Non-zero if qc completed, zero otherwise.
1da177e4 3475 */
c91af2c8 3476static int ata_pio_complete(struct ata_queued_cmd *qc)
1da177e4 3477{
c91af2c8 3478 struct ata_port *ap = qc->ap;
1da177e4
LT		 3479 u8 drv_stat;
3480
3481 /*
31433ea3
AC		 3482 * This is purely heuristic. This is a fast path. Sometimes when
3483 * we enter, BSY will be cleared in a chk-status or two. If not,
3484 * the drive is probably seeking or something. Snooze for a couple
3485 * msecs, then chk-status again. If still busy, fall back to
14be71f4 3486 * HSM_ST_POLL state.
1da177e4 3487 */
fe79e683
AL		 3488 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3489 if (drv_stat & ATA_BUSY) {
1da177e4 3490 msleep(2);
fe79e683
AL		 3491 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3492 if (drv_stat & ATA_BUSY) {
14be71f4 3493 ap->hsm_task_state = HSM_ST_LAST_POLL;
1da177e4 3494 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
7fb6ec28 3495 return 0;
1da177e4
LT		 3496 }
3497 }
3498
3499 drv_stat = ata_wait_idle(ap);
3500 if (!ata_ok(drv_stat)) {
1c848984 3501 qc->err_mask |= __ac_err_mask(drv_stat);
14be71f4 3502 ap->hsm_task_state = HSM_ST_ERR;
7fb6ec28 3503 return 0;
1da177e4
LT		 3504 }
3505
14be71f4 3506 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3507
a4631474 3508 WARN_ON(qc->err_mask);
a22e2eb0 3509 ata_poll_qc_complete(qc);
7fb6ec28
JG		 3510
3511 /* another command may start at this point */
3512
3513 return 1;
1da177e4
LT		 3514}
3515
0baab86b
EF		 3516
3517/**
c893a3ae 3518 * swap_buf_le16 - swap halves of 16-bit words in place
0baab86b
EF		 3519 * @buf: Buffer to swap
3520 * @buf_words: Number of 16-bit words in buffer.
3521 *
3522 * Swap halves of 16-bit words if needed to convert from
3523 * little-endian byte order to native cpu byte order, or
3524 * vice-versa.
3525 *
3526 * LOCKING:
6f0ef4fa 3527 * Inherited from caller.
0baab86b 3528 */
1da177e4
LT		 3529void swap_buf_le16(u16 *buf, unsigned int buf_words)
3530{
3531#ifdef __BIG_ENDIAN
3532 unsigned int i;
3533
3534 for (i = 0; i < buf_words; i++)
3535 buf[i] = le16_to_cpu(buf[i]);
3536#endif /* __BIG_ENDIAN */
3537}
3538
6ae4cfb5
AL		 3539/**
3540 * ata_mmio_data_xfer - Transfer data by MMIO
3541 * @ap: port to read/write
3542 * @buf: data buffer
3543 * @buflen: buffer length
344babaa 3544 * @write_data: read/write
6ae4cfb5
AL		 3545 *
3546 * Transfer data from/to the device data register by MMIO.
3547 *
3548 * LOCKING:
3549 * Inherited from caller.
6ae4cfb5
AL		 3550 */
3551
1da177e4
LT		 3552static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
3553 unsigned int buflen, int write_data)
3554{
3555 unsigned int i;
3556 unsigned int words = buflen >> 1;
3557 u16 *buf16 = (u16 *) buf;
3558 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3559
6ae4cfb5 3560 /* Transfer multiple of 2 bytes */
1da177e4
LT		 3561 if (write_data) {
3562 for (i = 0; i < words; i++)
3563 writew(le16_to_cpu(buf16[i]), mmio);
3564 } else {
3565 for (i = 0; i < words; i++)
3566 buf16[i] = cpu_to_le16(readw(mmio));
3567 }
6ae4cfb5
AL		 3568
3569 /* Transfer trailing 1 byte, if any. */
3570 if (unlikely(buflen & 0x01)) {
3571 u16 align_buf[1] = { 0 };
3572 unsigned char *trailing_buf = buf + buflen - 1;
3573
3574 if (write_data) {
3575 memcpy(align_buf, trailing_buf, 1);
3576 writew(le16_to_cpu(align_buf[0]), mmio);
3577 } else {
3578 align_buf[0] = cpu_to_le16(readw(mmio));
3579 memcpy(trailing_buf, align_buf, 1);
3580 }
3581 }
1da177e4
LT		 3582}
3583
6ae4cfb5
AL		 3584/**
3585 * ata_pio_data_xfer - Transfer data by PIO
3586 * @ap: port to read/write
3587 * @buf: data buffer
3588 * @buflen: buffer length
344babaa 3589 * @write_data: read/write
6ae4cfb5
AL		 3590 *
3591 * Transfer data from/to the device data register by PIO.
3592 *
3593 * LOCKING:
3594 * Inherited from caller.
6ae4cfb5
AL		 3595 */
3596
1da177e4
LT		 3597static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
3598 unsigned int buflen, int write_data)
3599{
6ae4cfb5 3600 unsigned int words = buflen >> 1;
1da177e4 3601
6ae4cfb5 3602 /* Transfer multiple of 2 bytes */
1da177e4 3603 if (write_data)
6ae4cfb5 3604 outsw(ap->ioaddr.data_addr, buf, words);
1da177e4 3605 else
6ae4cfb5
AL		 3606 insw(ap->ioaddr.data_addr, buf, words);
3607
3608 /* Transfer trailing 1 byte, if any. */
3609 if (unlikely(buflen & 0x01)) {
3610 u16 align_buf[1] = { 0 };
3611 unsigned char *trailing_buf = buf + buflen - 1;
3612
3613 if (write_data) {
3614 memcpy(align_buf, trailing_buf, 1);
3615 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3616 } else {
3617 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3618 memcpy(trailing_buf, align_buf, 1);
3619 }
3620 }
1da177e4
LT		 3621}
3622
6ae4cfb5
AL		 3623/**
3624 * ata_data_xfer - Transfer data from/to the data register.
3625 * @ap: port to read/write
3626 * @buf: data buffer
3627 * @buflen: buffer length
3628 * @do_write: read/write
3629 *
3630 * Transfer data from/to the device data register.
3631 *
3632 * LOCKING:
3633 * Inherited from caller.
6ae4cfb5
AL		 3634 */
3635
1da177e4
LT		 3636static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
3637 unsigned int buflen, int do_write)
3638{
a1bd9e68
AC		 3639 /* Make the crap hardware pay the costs not the good stuff */
3640 if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
3641 unsigned long flags;
3642 local_irq_save(flags);
3643 if (ap->flags & ATA_FLAG_MMIO)
3644 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3645 else
3646 ata_pio_data_xfer(ap, buf, buflen, do_write);
3647 local_irq_restore(flags);
3648 } else {
3649 if (ap->flags & ATA_FLAG_MMIO)
3650 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3651 else
3652 ata_pio_data_xfer(ap, buf, buflen, do_write);
3653 }
1da177e4
LT		 3654}
3655
6ae4cfb5
AL		 3656/**
3657 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3658 * @qc: Command on going
3659 *
3660 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3661 *
3662 * LOCKING:
3663 * Inherited from caller.
3664 */
3665
1da177e4
LT		 3666static void ata_pio_sector(struct ata_queued_cmd *qc)
3667{
3668 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3669 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3670 struct ata_port *ap = qc->ap;
3671 struct page *page;
3672 unsigned int offset;
3673 unsigned char *buf;
3674
3675 if (qc->cursect == (qc->nsect - 1))
14be71f4 3676 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3677
3678 page = sg[qc->cursg].page;
3679 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3680
3681 /* get the current page and offset */
3682 page = nth_page(page, (offset >> PAGE_SHIFT));
3683 offset %= PAGE_SIZE;
3684
3685 buf = kmap(page) + offset;
3686
3687 qc->cursect++;
3688 qc->cursg_ofs++;
3689
32529e01 3690 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
1da177e4
LT		 3691 qc->cursg++;
3692 qc->cursg_ofs = 0;
3693 }
3694
3695 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3696
3697 /* do the actual data transfer */
3698 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3699 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
3700
3701 kunmap(page);
3702}
3703
6ae4cfb5
AL		 3704/**
3705 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3706 * @qc: Command on going
3707 * @bytes: number of bytes
3708 *
3709 * Transfer Transfer data from/to the ATAPI device.
3710 *
3711 * LOCKING:
3712 * Inherited from caller.
3713 *
3714 */
3715
1da177e4
LT		 3716static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3717{
3718 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3719 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3720 struct ata_port *ap = qc->ap;
3721 struct page *page;
3722 unsigned char *buf;
3723 unsigned int offset, count;
3724
563a6e1f 3725 if (qc->curbytes + bytes >= qc->nbytes)
14be71f4 3726 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3727
3728next_sg:
563a6e1f 3729 if (unlikely(qc->cursg >= qc->n_elem)) {
7fb6ec28 3730 /*
563a6e1f
AL		 3731 * The end of qc->sg is reached and the device expects
3732 * more data to transfer. In order not to overrun qc->sg
3733 * and fulfill length specified in the byte count register,
3734 * - for read case, discard trailing data from the device
3735 * - for write case, padding zero data to the device
3736 */
3737 u16 pad_buf[1] = { 0 };
3738 unsigned int words = bytes >> 1;
3739 unsigned int i;
3740
3741 if (words) /* warning if bytes > 1 */
7fb6ec28 3742 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
563a6e1f
AL		 3743 ap->id, bytes);
3744
3745 for (i = 0; i < words; i++)
3746 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3747
14be71f4 3748 ap->hsm_task_state = HSM_ST_LAST;
563a6e1f
AL		 3749 return;
3750 }
3751
cedc9a47 3752 sg = &qc->__sg[qc->cursg];
1da177e4 3753
1da177e4
LT		 3754 page = sg->page;
3755 offset = sg->offset + qc->cursg_ofs;
3756
3757 /* get the current page and offset */
3758 page = nth_page(page, (offset >> PAGE_SHIFT));
3759 offset %= PAGE_SIZE;
3760
6952df03 3761 /* don't overrun current sg */
32529e01 3762 count = min(sg->length - qc->cursg_ofs, bytes);
1da177e4
LT		 3763
3764 /* don't cross page boundaries */
3765 count = min(count, (unsigned int)PAGE_SIZE - offset);
3766
3767 buf = kmap(page) + offset;
3768
3769 bytes -= count;
3770 qc->curbytes += count;
3771 qc->cursg_ofs += count;
3772
32529e01 3773 if (qc->cursg_ofs == sg->length) {
1da177e4
LT		 3774 qc->cursg++;
3775 qc->cursg_ofs = 0;
3776 }
3777
3778 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3779
3780 /* do the actual data transfer */
3781 ata_data_xfer(ap, buf, count, do_write);
3782
3783 kunmap(page);
3784
563a6e1f 3785 if (bytes)
1da177e4 3786 goto next_sg;
1da177e4
LT		 3787}
3788
6ae4cfb5
AL		 3789/**
3790 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3791 * @qc: Command on going
3792 *
3793 * Transfer Transfer data from/to the ATAPI device.
3794 *
3795 * LOCKING:
3796 * Inherited from caller.
6ae4cfb5
AL		 3797 */
3798
1da177e4
LT		 3799static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3800{
3801 struct ata_port *ap = qc->ap;
3802 struct ata_device *dev = qc->dev;
3803 unsigned int ireason, bc_lo, bc_hi, bytes;
3804 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3805
3806 ap->ops->tf_read(ap, &qc->tf);
3807 ireason = qc->tf.nsect;
3808 bc_lo = qc->tf.lbam;
3809 bc_hi = qc->tf.lbah;
3810 bytes = (bc_hi << 8) | bc_lo;
3811
3812 /* shall be cleared to zero, indicating xfer of data */
3813 if (ireason & (1 << 0))
3814 goto err_out;
3815
3816 /* make sure transfer direction matches expected */
3817 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3818 if (do_write != i_write)
3819 goto err_out;
3820
3821 __atapi_pio_bytes(qc, bytes);
3822
3823 return;
3824
3825err_out:
3826 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3827 ap->id, dev->devno);
11a56d24 3828 qc->err_mask |= AC_ERR_HSM;
14be71f4 3829 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3830}
3831
3832/**
6f0ef4fa 3833 * ata_pio_block - start PIO on a block
c91af2c8 3834 * @qc: qc to transfer block for
1da177e4
LT		 3835 *
3836 * LOCKING:
0cba632b 3837 * None. (executing in kernel thread context)
1da177e4 3838 */
c91af2c8 3839static void ata_pio_block(struct ata_queued_cmd *qc)
1da177e4 3840{
c91af2c8 3841 struct ata_port *ap = qc->ap;
1da177e4
LT		 3842 u8 status;
3843
3844 /*
6f0ef4fa 3845 * This is purely heuristic. This is a fast path.
1da177e4
LT		 3846 * Sometimes when we enter, BSY will be cleared in
3847 * a chk-status or two. If not, the drive is probably seeking
3848 * or something. Snooze for a couple msecs, then
3849 * chk-status again. If still busy, fall back to
14be71f4 3850 * HSM_ST_POLL state.
1da177e4
LT		 3851 */
3852 status = ata_busy_wait(ap, ATA_BUSY, 5);
3853 if (status & ATA_BUSY) {
3854 msleep(2);
3855 status = ata_busy_wait(ap, ATA_BUSY, 10);
3856 if (status & ATA_BUSY) {
14be71f4 3857 ap->hsm_task_state = HSM_ST_POLL;
1da177e4
LT		 3858 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3859 return;
3860 }
3861 }
3862
fe79e683
AL		 3863 /* check error */
3864 if (status & (ATA_ERR | ATA_DF)) {
3865 qc->err_mask |= AC_ERR_DEV;
3866 ap->hsm_task_state = HSM_ST_ERR;
3867 return;
3868 }
3869
3870 /* transfer data if any */
1da177e4 3871 if (is_atapi_taskfile(&qc->tf)) {
fe79e683 3872 /* DRQ=0 means no more data to transfer */
1da177e4 3873 if ((status & ATA_DRQ) == 0) {
14be71f4 3874 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3875 return;
3876 }
3877
3878 atapi_pio_bytes(qc);
3879 } else {
3880 /* handle BSY=0, DRQ=0 as error */
3881 if ((status & ATA_DRQ) == 0) {
11a56d24 3882 qc->err_mask |= AC_ERR_HSM;
14be71f4 3883 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3884 return;
3885 }
3886
3887 ata_pio_sector(qc);
3888 }
3889}
3890
c91af2c8 3891static void ata_pio_error(struct ata_queued_cmd *qc)
1da177e4 3892{
c91af2c8 3893 struct ata_port *ap = qc->ap;
1da177e4 3894
0565c26d 3895 if (qc->tf.command != ATA_CMD_PACKET)
d63cb4a6
TH		 3896 printk(KERN_WARNING "ata%u: dev %u PIO error\n",
3897 ap->id, qc->dev->devno);
0565c26d 3898
2e9edbf8 3899 /* make sure qc->err_mask is available to
1c848984
AL		 3900 * know what's wrong and recover
3901 */
a4631474 3902 WARN_ON(qc->err_mask == 0);
1c848984 3903
14be71f4 3904 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3905
a22e2eb0 3906 ata_poll_qc_complete(qc);
1da177e4
LT		 3907}
3908
3909static void ata_pio_task(void *_data)
3910{
c91af2c8
TH		 3911 struct ata_queued_cmd *qc = _data;
3912 struct ata_port *ap = qc->ap;
7fb6ec28
JG		 3913 unsigned long timeout;
3914 int qc_completed;
3915
3916fsm_start:
3917 timeout = 0;
3918 qc_completed = 0;
1da177e4 3919
14be71f4
AL		 3920 switch (ap->hsm_task_state) {
3921 case HSM_ST_IDLE:
1da177e4
LT		 3922 return;
3923
14be71f4 3924 case HSM_ST:
c91af2c8 3925 ata_pio_block(qc);
1da177e4
LT		 3926 break;
3927
14be71f4 3928 case HSM_ST_LAST:
c91af2c8 3929 qc_completed = ata_pio_complete(qc);
1da177e4
LT		 3930 break;
3931
14be71f4
AL		 3932 case HSM_ST_POLL:
3933 case HSM_ST_LAST_POLL:
c91af2c8 3934 timeout = ata_pio_poll(qc);
1da177e4
LT		 3935 break;
3936
14be71f4
AL		 3937 case HSM_ST_TMOUT:
3938 case HSM_ST_ERR:
c91af2c8 3939 ata_pio_error(qc);
1da177e4
LT		 3940 return;
3941 }
3942
3943 if (timeout)
c91af2c8 3944 ata_port_queue_task(ap, ata_pio_task, qc, timeout);
7fb6ec28
JG		 3945 else if (!qc_completed)
3946 goto fsm_start;
1da177e4
LT		 3947}
3948
8061f5f0
TH		 3949/**
3950 * atapi_packet_task - Write CDB bytes to hardware
c91af2c8 3951 * @_data: qc in progress
8061f5f0
TH		 3952 *
3953 * When device has indicated its readiness to accept
3954 * a CDB, this function is called. Send the CDB.
3955 * If DMA is to be performed, exit immediately.
3956 * Otherwise, we are in polling mode, so poll
3957 * status under operation succeeds or fails.
3958 *
3959 * LOCKING:
3960 * Kernel thread context (may sleep)
3961 */
8061f5f0
TH		 3962static void atapi_packet_task(void *_data)
3963{
c91af2c8
TH		 3964 struct ata_queued_cmd *qc = _data;
3965 struct ata_port *ap = qc->ap;
8061f5f0
TH		 3966 u8 status;
3967
8061f5f0
TH		 3968 /* sleep-wait for BSY to clear */
3969 DPRINTK("busy wait\n");
3970 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB)) {
3971 qc->err_mask |= AC_ERR_TIMEOUT;
3972 goto err_out;
3973 }
3974
3975 /* make sure DRQ is set */
3976 status = ata_chk_status(ap);
3977 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) {
3978 qc->err_mask |= AC_ERR_HSM;
3979 goto err_out;
3980 }
3981
3982 /* send SCSI cdb */
3983 DPRINTK("send cdb\n");
3984 WARN_ON(qc->dev->cdb_len < 12);
3985
3986 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
3987 qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
3988 unsigned long flags;
3989
3990 /* Once we're done issuing command and kicking bmdma,
3991 * irq handler takes over. To not lose irq, we need
3992 * to clear NOINTR flag before sending cdb, but
3993 * interrupt handler shouldn't be invoked before we're
3994 * finished. Hence, the following locking.
3995 */
3996 spin_lock_irqsave(&ap->host_set->lock, flags);
3997 ap->flags &= ~ATA_FLAG_NOINTR;
3998 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
3999 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
4000 ap->ops->bmdma_start(qc); /* initiate bmdma */
4001 spin_unlock_irqrestore(&ap->host_set->lock, flags);
4002 } else {
4003 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
4004
4005 /* PIO commands are handled by polling */
4006 ap->hsm_task_state = HSM_ST;
c91af2c8 4007 ata_port_queue_task(ap, ata_pio_task, qc, 0);
8061f5f0
TH		 4008 }
4009
4010 return;
4011
4012err_out:
4013 ata_poll_qc_complete(qc);
4014}
4015
1da177e4
LT		 4016/**
4017 * ata_qc_new - Request an available ATA command, for queueing
4018 * @ap: Port associated with device @dev
4019 * @dev: Device from whom we request an available command structure
4020 *
4021 * LOCKING:
0cba632b 4022 * None.
1da177e4
LT		 4023 */
4024
4025static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4026{
4027 struct ata_queued_cmd *qc = NULL;
4028 unsigned int i;
4029
4030 for (i = 0; i < ATA_MAX_QUEUE; i++)
4031 if (!test_and_set_bit(i, &ap->qactive)) {
4032 qc = ata_qc_from_tag(ap, i);
4033 break;
4034 }
4035
4036 if (qc)
4037 qc->tag = i;
4038
4039 return qc;
4040}
4041
4042/**
4043 * ata_qc_new_init - Request an available ATA command, and initialize it
4044 * @ap: Port associated with device @dev
4045 * @dev: Device from whom we request an available command structure
4046 *
4047 * LOCKING:
0cba632b 4048 * None.
1da177e4
LT		 4049 */
4050
4051struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
4052 struct ata_device *dev)
4053{
4054 struct ata_queued_cmd *qc;
4055
4056 qc = ata_qc_new(ap);
4057 if (qc) {
1da177e4
LT		 4058 qc->scsicmd = NULL;
4059 qc->ap = ap;
4060 qc->dev = dev;
1da177e4 4061
2c13b7ce 4062 ata_qc_reinit(qc);
1da177e4
LT		 4063 }
4064
4065 return qc;
4066}
4067
1da177e4
LT		 4068/**
4069 * ata_qc_free - free unused ata_queued_cmd
4070 * @qc: Command to complete
4071 *
4072 * Designed to free unused ata_queued_cmd object
4073 * in case something prevents using it.
4074 *
4075 * LOCKING:
0cba632b 4076 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 4077 */
4078void ata_qc_free(struct ata_queued_cmd *qc)
4079{
4ba946e9
TH		 4080 struct ata_port *ap = qc->ap;
4081 unsigned int tag;
4082
a4631474 4083 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
1da177e4 4084
4ba946e9
TH		 4085 qc->flags = 0;
4086 tag = qc->tag;
4087 if (likely(ata_tag_valid(tag))) {
4088 if (tag == ap->active_tag)
4089 ap->active_tag = ATA_TAG_POISON;
4090 qc->tag = ATA_TAG_POISON;
4091 clear_bit(tag, &ap->qactive);
4092 }
1da177e4
LT		 4093}
4094
76014427 4095void __ata_qc_complete(struct ata_queued_cmd *qc)
1da177e4 4096{
a4631474
TH		 4097 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4098 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
1da177e4
LT		 4099
4100 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4101 ata_sg_clean(qc);
4102
3f3791d3
AL		 4103 /* atapi: mark qc as inactive to prevent the interrupt handler
4104 * from completing the command twice later, before the error handler
4105 * is called. (when rc != 0 and atapi request sense is needed)
4106 */
4107 qc->flags &= ~ATA_QCFLAG_ACTIVE;
4108
1da177e4 4109 /* call completion callback */
77853bf2 4110 qc->complete_fn(qc);
1da177e4
LT		 4111}
4112
4113static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
4114{
4115 struct ata_port *ap = qc->ap;
4116
4117 switch (qc->tf.protocol) {
4118 case ATA_PROT_DMA:
4119 case ATA_PROT_ATAPI_DMA:
4120 return 1;
4121
4122 case ATA_PROT_ATAPI:
4123 case ATA_PROT_PIO:
1da177e4
LT		 4124 if (ap->flags & ATA_FLAG_PIO_DMA)
4125 return 1;
4126
4127 /* fall through */
4128
4129 default:
4130 return 0;
4131 }
4132
4133 /* never reached */
4134}
4135
4136/**
4137 * ata_qc_issue - issue taskfile to device
4138 * @qc: command to issue to device
4139 *
4140 * Prepare an ATA command to submission to device.
4141 * This includes mapping the data into a DMA-able
4142 * area, filling in the S/G table, and finally
4143 * writing the taskfile to hardware, starting the command.
4144 *
4145 * LOCKING:
4146 * spin_lock_irqsave(host_set lock)
1da177e4 4147 */
8e0e694a 4148void ata_qc_issue(struct ata_queued_cmd *qc)
1da177e4
LT		 4149{
4150 struct ata_port *ap = qc->ap;
4151
e4a70e76
TH		 4152 qc->ap->active_tag = qc->tag;
4153 qc->flags |= ATA_QCFLAG_ACTIVE;
4154
1da177e4
LT		 4155 if (ata_should_dma_map(qc)) {
4156 if (qc->flags & ATA_QCFLAG_SG) {
4157 if (ata_sg_setup(qc))
8e436af9 4158 goto sg_err;
1da177e4
LT		 4159 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
4160 if (ata_sg_setup_one(qc))
8e436af9 4161 goto sg_err;
1da177e4
LT		 4162 }
4163 } else {
4164 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4165 }
4166
4167 ap->ops->qc_prep(qc);
4168
8e0e694a
TH		 4169 qc->err_mask |= ap->ops->qc_issue(qc);
4170 if (unlikely(qc->err_mask))
4171 goto err;
4172 return;
1da177e4 4173
8e436af9
TH		 4174sg_err:
4175 qc->flags &= ~ATA_QCFLAG_DMAMAP;
8e0e694a
TH		 4176 qc->err_mask |= AC_ERR_SYSTEM;
4177err:
4178 ata_qc_complete(qc);
1da177e4
LT		 4179}
4180
4181/**
4182 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4183 * @qc: command to issue to device
4184 *
4185 * Using various libata functions and hooks, this function
4186 * starts an ATA command. ATA commands are grouped into
4187 * classes called "protocols", and issuing each type of protocol
4188 * is slightly different.
4189 *
0baab86b
EF		 4190 * May be used as the qc_issue() entry in ata_port_operations.
4191 *
1da177e4
LT		 4192 * LOCKING:
4193 * spin_lock_irqsave(host_set lock)
4194 *
4195 * RETURNS:
9a3d9eb0 4196 * Zero on success, AC_ERR_* mask on failure
1da177e4
LT		 4197 */
4198
9a3d9eb0 4199unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
1da177e4
LT		 4200{
4201 struct ata_port *ap = qc->ap;
4202
4203 ata_dev_select(ap, qc->dev->devno, 1, 0);
4204
4205 switch (qc->tf.protocol) {
4206 case ATA_PROT_NODATA:
e5338254 4207 ata_tf_to_host(ap, &qc->tf);
1da177e4
LT		 4208 break;
4209
4210 case ATA_PROT_DMA:
4211 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4212 ap->ops->bmdma_setup(qc); /* set up bmdma */
4213 ap->ops->bmdma_start(qc); /* initiate bmdma */
4214 break;
4215
4216 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
4217 ata_qc_set_polling(qc);
e5338254 4218 ata_tf_to_host(ap, &qc->tf);
14be71f4 4219 ap->hsm_task_state = HSM_ST;
c91af2c8 4220 ata_port_queue_task(ap, ata_pio_task, qc, 0);
1da177e4
LT		 4221 break;
4222
4223 case ATA_PROT_ATAPI:
4224 ata_qc_set_polling(qc);
e5338254 4225 ata_tf_to_host(ap, &qc->tf);
c91af2c8 4226 ata_port_queue_task(ap, atapi_packet_task, qc, 0);
1da177e4
LT		 4227 break;
4228
4229 case ATA_PROT_ATAPI_NODATA:
c1389503 4230 ap->flags |= ATA_FLAG_NOINTR;
e5338254 4231 ata_tf_to_host(ap, &qc->tf);
c91af2c8 4232 ata_port_queue_task(ap, atapi_packet_task, qc, 0);
1da177e4
LT		 4233 break;
4234
4235 case ATA_PROT_ATAPI_DMA:
c1389503 4236 ap->flags |= ATA_FLAG_NOINTR;
1da177e4
LT		 4237 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4238 ap->ops->bmdma_setup(qc); /* set up bmdma */
c91af2c8 4239 ata_port_queue_task(ap, atapi_packet_task, qc, 0);
1da177e4
LT		 4240 break;
4241
4242 default:
4243 WARN_ON(1);
9a3d9eb0 4244 return AC_ERR_SYSTEM;
1da177e4
LT		 4245 }
4246
4247 return 0;
4248}
4249
1da177e4
LT		 4250/**
4251 * ata_host_intr - Handle host interrupt for given (port, task)
4252 * @ap: Port on which interrupt arrived (possibly...)
4253 * @qc: Taskfile currently active in engine
4254 *
4255 * Handle host interrupt for given queued command. Currently,
4256 * only DMA interrupts are handled. All other commands are
4257 * handled via polling with interrupts disabled (nIEN bit).
4258 *
4259 * LOCKING:
4260 * spin_lock_irqsave(host_set lock)
4261 *
4262 * RETURNS:
4263 * One if interrupt was handled, zero if not (shared irq).
4264 */
4265
4266inline unsigned int ata_host_intr (struct ata_port *ap,
4267 struct ata_queued_cmd *qc)
4268{
4269 u8 status, host_stat;
4270
4271 switch (qc->tf.protocol) {
4272
4273 case ATA_PROT_DMA:
4274 case ATA_PROT_ATAPI_DMA:
4275 case ATA_PROT_ATAPI:
4276 /* check status of DMA engine */
4277 host_stat = ap->ops->bmdma_status(ap);
4278 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4279
4280 /* if it's not our irq... */
4281 if (!(host_stat & ATA_DMA_INTR))
4282 goto idle_irq;
4283
4284 /* before we do anything else, clear DMA-Start bit */
b73fc89f 4285 ap->ops->bmdma_stop(qc);
1da177e4
LT		 4286
4287 /* fall through */
4288
4289 case ATA_PROT_ATAPI_NODATA:
4290 case ATA_PROT_NODATA:
4291 /* check altstatus */
4292 status = ata_altstatus(ap);
4293 if (status & ATA_BUSY)
4294 goto idle_irq;
4295
4296 /* check main status, clearing INTRQ */
4297 status = ata_chk_status(ap);
4298 if (unlikely(status & ATA_BUSY))
4299 goto idle_irq;
4300 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
4301 ap->id, qc->tf.protocol, status);
4302
4303 /* ack bmdma irq events */
4304 ap->ops->irq_clear(ap);
4305
4306 /* complete taskfile transaction */
a22e2eb0
AL		 4307 qc->err_mask |= ac_err_mask(status);
4308 ata_qc_complete(qc);
1da177e4
LT		 4309 break;
4310
4311 default:
4312 goto idle_irq;
4313 }
4314
4315 return 1; /* irq handled */
4316
4317idle_irq:
4318 ap->stats.idle_irq++;
4319
4320#ifdef ATA_IRQ_TRAP
4321 if ((ap->stats.idle_irq % 1000) == 0) {
1da177e4
LT		 4322 ata_irq_ack(ap, 0); /* debug trap */
4323 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
23cfce89 4324 return 1;
1da177e4
LT		 4325 }
4326#endif
4327 return 0; /* irq not handled */
4328}
4329
4330/**
4331 * ata_interrupt - Default ATA host interrupt handler
0cba632b
JG		 4332 * @irq: irq line (unused)
4333 * @dev_instance: pointer to our ata_host_set information structure
1da177e4
LT		 4334 * @regs: unused
4335 *
0cba632b
JG		 4336 * Default interrupt handler for PCI IDE devices. Calls
4337 * ata_host_intr() for each port that is not disabled.
4338 *
1da177e4 4339 * LOCKING:
0cba632b 4340 * Obtains host_set lock during operation.
1da177e4
LT		 4341 *
4342 * RETURNS:
0cba632b 4343 * IRQ_NONE or IRQ_HANDLED.
1da177e4
LT		 4344 */
4345
4346irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4347{
4348 struct ata_host_set *host_set = dev_instance;
4349 unsigned int i;
4350 unsigned int handled = 0;
4351 unsigned long flags;
4352
4353 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4354 spin_lock_irqsave(&host_set->lock, flags);
4355
4356 for (i = 0; i < host_set->n_ports; i++) {
4357 struct ata_port *ap;
4358
4359 ap = host_set->ports[i];
c1389503 4360 if (ap &&
198e0fed 4361 !(ap->flags & (ATA_FLAG_DISABLED | ATA_FLAG_NOINTR))) {
1da177e4
LT		 4362 struct ata_queued_cmd *qc;
4363
4364 qc = ata_qc_from_tag(ap, ap->active_tag);
21b1ed74
AL		 4365 if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
4366 (qc->flags & ATA_QCFLAG_ACTIVE))
1da177e4
LT		 4367 handled |= ata_host_intr(ap, qc);
4368 }
4369 }
4370
4371 spin_unlock_irqrestore(&host_set->lock, flags);
4372
4373 return IRQ_RETVAL(handled);
4374}
4375
0baab86b 4376
9b847548
JA		 4377/*
4378 * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
4379 * without filling any other registers
4380 */
4381static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev,
4382 u8 cmd)
4383{
4384 struct ata_taskfile tf;
4385 int err;
4386
4387 ata_tf_init(ap, &tf, dev->devno);
4388
4389 tf.command = cmd;
4390 tf.flags |= ATA_TFLAG_DEVICE;
4391 tf.protocol = ATA_PROT_NODATA;
4392
d69cf37d 4393 err = ata_exec_internal(ap, dev, &tf, NULL, DMA_NONE, NULL, 0);
9b847548
JA		 4394 if (err)
4395 printk(KERN_ERR "%s: ata command failed: %d\n",
4396 __FUNCTION__, err);
4397
4398 return err;
4399}
4400
4401static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev)
4402{
4403 u8 cmd;
4404
4405 if (!ata_try_flush_cache(dev))
4406 return 0;
4407
4408 if (ata_id_has_flush_ext(dev->id))
4409 cmd = ATA_CMD_FLUSH_EXT;
4410 else
4411 cmd = ATA_CMD_FLUSH;
4412
4413 return ata_do_simple_cmd(ap, dev, cmd);
4414}
4415
4416static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev)
4417{
4418 return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1);
4419}
4420
4421static int ata_start_drive(struct ata_port *ap, struct ata_device *dev)
4422{
4423 return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE);
4424}
4425
4426/**
4427 * ata_device_resume - wakeup a previously suspended devices
c893a3ae
RD		 4428 * @ap: port the device is connected to
4429 * @dev: the device to resume
9b847548
JA		 4430 *
4431 * Kick the drive back into action, by sending it an idle immediate
4432 * command and making sure its transfer mode matches between drive
4433 * and host.
4434 *
4435 */
4436int ata_device_resume(struct ata_port *ap, struct ata_device *dev)
4437{
4438 if (ap->flags & ATA_FLAG_SUSPENDED) {
e82cbdb9 4439 struct ata_device *failed_dev;
9b847548 4440 ap->flags &= ~ATA_FLAG_SUSPENDED;
e82cbdb9
TH		 4441 while (ata_set_mode(ap, &failed_dev))
4442 ata_dev_disable(ap, failed_dev);
9b847548 4443 }
e1211e3f 4444 if (!ata_dev_enabled(dev))
9b847548
JA		 4445 return 0;
4446 if (dev->class == ATA_DEV_ATA)
4447 ata_start_drive(ap, dev);
4448
4449 return 0;
4450}
4451
4452/**
4453 * ata_device_suspend - prepare a device for suspend
c893a3ae
RD		 4454 * @ap: port the device is connected to
4455 * @dev: the device to suspend
9b847548
JA		 4456 *
4457 * Flush the cache on the drive, if appropriate, then issue a
4458 * standbynow command.
9b847548 4459 */
082776e4 4460int ata_device_suspend(struct ata_port *ap, struct ata_device *dev, pm_message_t state)
9b847548 4461{
e1211e3f 4462 if (!ata_dev_enabled(dev))
9b847548
JA		 4463 return 0;
4464 if (dev->class == ATA_DEV_ATA)
4465 ata_flush_cache(ap, dev);
4466
082776e4
NC		 4467 if (state.event != PM_EVENT_FREEZE)
4468 ata_standby_drive(ap, dev);
9b847548
JA		 4469 ap->flags |= ATA_FLAG_SUSPENDED;
4470 return 0;
4471}
4472
c893a3ae
RD		 4473/**
4474 * ata_port_start - Set port up for dma.
4475 * @ap: Port to initialize
4476 *
4477 * Called just after data structures for each port are
4478 * initialized. Allocates space for PRD table.
4479 *
4480 * May be used as the port_start() entry in ata_port_operations.
4481 *
4482 * LOCKING:
4483 * Inherited from caller.
4484 */
4485
1da177e4
LT		 4486int ata_port_start (struct ata_port *ap)
4487{
2f1f610b 4488 struct device *dev = ap->dev;
6037d6bb 4489 int rc;
1da177e4
LT		 4490
4491 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4492 if (!ap->prd)
4493 return -ENOMEM;
4494
6037d6bb
JG		 4495 rc = ata_pad_alloc(ap, dev);
4496 if (rc) {
cedc9a47 4497 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4498 return rc;
cedc9a47
JG		 4499 }
4500
1da177e4
LT		 4501 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4502
4503 return 0;
4504}
4505
0baab86b
EF		 4506
4507/**
4508 * ata_port_stop - Undo ata_port_start()
4509 * @ap: Port to shut down
4510 *
4511 * Frees the PRD table.
4512 *
4513 * May be used as the port_stop() entry in ata_port_operations.
4514 *
4515 * LOCKING:
6f0ef4fa 4516 * Inherited from caller.
0baab86b
EF		 4517 */
4518
1da177e4
LT		 4519void ata_port_stop (struct ata_port *ap)
4520{
2f1f610b 4521 struct device *dev = ap->dev;
1da177e4
LT		 4522
4523 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4524 ata_pad_free(ap, dev);
1da177e4
LT		 4525}
4526
aa8f0dc6
JG		 4527void ata_host_stop (struct ata_host_set *host_set)
4528{
4529 if (host_set->mmio_base)
4530 iounmap(host_set->mmio_base);
4531}
4532
4533
1da177e4
LT		 4534/**
4535 * ata_host_remove - Unregister SCSI host structure with upper layers
4536 * @ap: Port to unregister
4537 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4538 *
4539 * LOCKING:
6f0ef4fa 4540 * Inherited from caller.
1da177e4
LT		 4541 */
4542
4543static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4544{
4545 struct Scsi_Host *sh = ap->host;
4546
4547 DPRINTK("ENTER\n");
4548
4549 if (do_unregister)
4550 scsi_remove_host(sh);
4551
4552 ap->ops->port_stop(ap);
4553}
4554
4555/**
4556 * ata_host_init - Initialize an ata_port structure
4557 * @ap: Structure to initialize
4558 * @host: associated SCSI mid-layer structure
4559 * @host_set: Collection of hosts to which @ap belongs
4560 * @ent: Probe information provided by low-level driver
4561 * @port_no: Port number associated with this ata_port
4562 *
0cba632b
JG		 4563 * Initialize a new ata_port structure, and its associated
4564 * scsi_host.
4565 *
1da177e4 4566 * LOCKING:
0cba632b 4567 * Inherited from caller.
1da177e4
LT		 4568 */
4569
4570static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4571 struct ata_host_set *host_set,
057ace5e 4572 const struct ata_probe_ent *ent, unsigned int port_no)
1da177e4
LT		 4573{
4574 unsigned int i;
4575
4576 host->max_id = 16;
4577 host->max_lun = 1;
4578 host->max_channel = 1;
4579 host->unique_id = ata_unique_id++;
4580 host->max_cmd_len = 12;
12413197 4581
198e0fed 4582 ap->flags = ATA_FLAG_DISABLED;
1da177e4
LT		 4583 ap->id = host->unique_id;
4584 ap->host = host;
4585 ap->ctl = ATA_DEVCTL_OBS;
4586 ap->host_set = host_set;
2f1f610b 4587 ap->dev = ent->dev;
1da177e4
LT		 4588 ap->port_no = port_no;
4589 ap->hard_port_no =
4590 ent->legacy_mode ? ent->hard_port_no : port_no;
4591 ap->pio_mask = ent->pio_mask;
4592 ap->mwdma_mask = ent->mwdma_mask;
4593 ap->udma_mask = ent->udma_mask;
4594 ap->flags |= ent->host_flags;
4595 ap->ops = ent->port_ops;
4596 ap->cbl = ATA_CBL_NONE;
1c3fae4d 4597 ap->sata_spd_limit = UINT_MAX;
1da177e4
LT		 4598 ap->active_tag = ATA_TAG_POISON;
4599 ap->last_ctl = 0xFF;
4600
86e45b6b 4601 INIT_WORK(&ap->port_task, NULL, NULL);
a72ec4ce 4602 INIT_LIST_HEAD(&ap->eh_done_q);
1da177e4 4603
acf356b1
TH		 4604 for (i = 0; i < ATA_MAX_DEVICES; i++) {
4605 struct ata_device *dev = &ap->device[i];
4606 dev->devno = i;
4607 dev->pio_mask = UINT_MAX;
4608 dev->mwdma_mask = UINT_MAX;
4609 dev->udma_mask = UINT_MAX;
4610 }
1da177e4
LT		 4611
4612#ifdef ATA_IRQ_TRAP
4613 ap->stats.unhandled_irq = 1;
4614 ap->stats.idle_irq = 1;
4615#endif
4616
4617 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4618}
4619
4620/**
4621 * ata_host_add - Attach low-level ATA driver to system
4622 * @ent: Information provided by low-level driver
4623 * @host_set: Collections of ports to which we add
4624 * @port_no: Port number associated with this host
4625 *
0cba632b
JG		 4626 * Attach low-level ATA driver to system.
4627 *
1da177e4 4628 * LOCKING:
0cba632b 4629 * PCI/etc. bus probe sem.
1da177e4
LT		 4630 *
4631 * RETURNS:
0cba632b 4632 * New ata_port on success, for NULL on error.
1da177e4
LT		 4633 */
4634
057ace5e 4635static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
1da177e4
LT		 4636 struct ata_host_set *host_set,
4637 unsigned int port_no)
4638{
4639 struct Scsi_Host *host;
4640 struct ata_port *ap;
4641 int rc;
4642
4643 DPRINTK("ENTER\n");
aec5c3c1
TH		 4644
4645 if (!ent->port_ops->probe_reset &&
4646 !(ent->host_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
4647 printk(KERN_ERR "ata%u: no reset mechanism available\n",
4648 port_no);
4649 return NULL;
4650 }
4651
1da177e4
LT		 4652 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4653 if (!host)
4654 return NULL;
4655
30afc84c
TH		 4656 host->transportt = &ata_scsi_transport_template;
4657
1da177e4
LT		 4658 ap = (struct ata_port *) &host->hostdata[0];
4659
4660 ata_host_init(ap, host, host_set, ent, port_no);
4661
4662 rc = ap->ops->port_start(ap);
4663 if (rc)
4664 goto err_out;
4665
4666 return ap;
4667
4668err_out:
4669 scsi_host_put(host);
4670 return NULL;
4671}
4672
4673/**
0cba632b
JG		 4674 * ata_device_add - Register hardware device with ATA and SCSI layers
4675 * @ent: Probe information describing hardware device to be registered
4676 *
4677 * This function processes the information provided in the probe
4678 * information struct @ent, allocates the necessary ATA and SCSI
4679 * host information structures, initializes them, and registers
4680 * everything with requisite kernel subsystems.
4681 *
4682 * This function requests irqs, probes the ATA bus, and probes
4683 * the SCSI bus.
1da177e4
LT		 4684 *
4685 * LOCKING:
0cba632b 4686 * PCI/etc. bus probe sem.
1da177e4
LT		 4687 *
4688 * RETURNS:
0cba632b 4689 * Number of ports registered. Zero on error (no ports registered).
1da177e4
LT		 4690 */
4691
057ace5e 4692int ata_device_add(const struct ata_probe_ent *ent)
1da177e4
LT		 4693{
4694 unsigned int count = 0, i;
4695 struct device *dev = ent->dev;
4696 struct ata_host_set *host_set;
4697
4698 DPRINTK("ENTER\n");
4699 /* alloc a container for our list of ATA ports (buses) */
57f3bda8 4700 host_set = kzalloc(sizeof(struct ata_host_set) +
1da177e4
LT		 4701 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4702 if (!host_set)
4703 return 0;
1da177e4
LT		 4704 spin_lock_init(&host_set->lock);
4705
4706 host_set->dev = dev;
4707 host_set->n_ports = ent->n_ports;
4708 host_set->irq = ent->irq;
4709 host_set->mmio_base = ent->mmio_base;
4710 host_set->private_data = ent->private_data;
4711 host_set->ops = ent->port_ops;
5444a6f4 4712 host_set->flags = ent->host_set_flags;
1da177e4
LT		 4713
4714 /* register each port bound to this device */
4715 for (i = 0; i < ent->n_ports; i++) {
4716 struct ata_port *ap;
4717 unsigned long xfer_mode_mask;
4718
4719 ap = ata_host_add(ent, host_set, i);
4720 if (!ap)
4721 goto err_out;
4722
4723 host_set->ports[i] = ap;
4724 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4725 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4726 (ap->pio_mask << ATA_SHIFT_PIO);
4727
4728 /* print per-port info to dmesg */
4729 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4730 "bmdma 0x%lX irq %lu\n",
4731 ap->id,
4732 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4733 ata_mode_string(xfer_mode_mask),
4734 ap->ioaddr.cmd_addr,
4735 ap->ioaddr.ctl_addr,
4736 ap->ioaddr.bmdma_addr,
4737 ent->irq);
4738
4739 ata_chk_status(ap);
4740 host_set->ops->irq_clear(ap);
4741 count++;
4742 }
4743
57f3bda8
RD		 4744 if (!count)
4745 goto err_free_ret;
1da177e4
LT		 4746
4747 /* obtain irq, that is shared between channels */
4748 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4749 DRV_NAME, host_set))
4750 goto err_out;
4751
4752 /* perform each probe synchronously */
4753 DPRINTK("probe begin\n");
4754 for (i = 0; i < count; i++) {
4755 struct ata_port *ap;
4756 int rc;
4757
4758 ap = host_set->ports[i];
4759
c893a3ae 4760 DPRINTK("ata%u: bus probe begin\n", ap->id);
1da177e4 4761 rc = ata_bus_probe(ap);
c893a3ae 4762 DPRINTK("ata%u: bus probe end\n", ap->id);
1da177e4
LT		 4763
4764 if (rc) {
4765 /* FIXME: do something useful here?
4766 * Current libata behavior will
4767 * tear down everything when
4768 * the module is removed
4769 * or the h/w is unplugged.
4770 */
4771 }
4772
4773 rc = scsi_add_host(ap->host, dev);
4774 if (rc) {
4775 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4776 ap->id);
4777 /* FIXME: do something useful here */
4778 /* FIXME: handle unconditional calls to
4779 * scsi_scan_host and ata_host_remove, below,
4780 * at the very least
4781 */
4782 }
4783 }
4784
4785 /* probes are done, now scan each port's disk(s) */
c893a3ae 4786 DPRINTK("host probe begin\n");
1da177e4
LT		 4787 for (i = 0; i < count; i++) {
4788 struct ata_port *ap = host_set->ports[i];
4789
644dd0cc 4790 ata_scsi_scan_host(ap);
1da177e4
LT		 4791 }
4792
4793 dev_set_drvdata(dev, host_set);
4794
4795 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4796 return ent->n_ports; /* success */
4797
4798err_out:
4799 for (i = 0; i < count; i++) {
4800 ata_host_remove(host_set->ports[i], 1);
4801 scsi_host_put(host_set->ports[i]->host);
4802 }
57f3bda8 4803err_free_ret:
1da177e4
LT		 4804 kfree(host_set);
4805 VPRINTK("EXIT, returning 0\n");
4806 return 0;
4807}
4808
17b14451
AC		 4809/**
4810 * ata_host_set_remove - PCI layer callback for device removal
4811 * @host_set: ATA host set that was removed
4812 *
2e9edbf8 4813 * Unregister all objects associated with this host set. Free those
17b14451
AC		 4814 * objects.
4815 *
4816 * LOCKING:
4817 * Inherited from calling layer (may sleep).
4818 */
4819
17b14451
AC		 4820void ata_host_set_remove(struct ata_host_set *host_set)
4821{
4822 struct ata_port *ap;
4823 unsigned int i;
4824
4825 for (i = 0; i < host_set->n_ports; i++) {
4826 ap = host_set->ports[i];
4827 scsi_remove_host(ap->host);
4828 }
4829
4830 free_irq(host_set->irq, host_set);
4831
4832 for (i = 0; i < host_set->n_ports; i++) {
4833 ap = host_set->ports[i];
4834
4835 ata_scsi_release(ap->host);
4836
4837 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4838 struct ata_ioports *ioaddr = &ap->ioaddr;
4839
4840 if (ioaddr->cmd_addr == 0x1f0)
4841 release_region(0x1f0, 8);
4842 else if (ioaddr->cmd_addr == 0x170)
4843 release_region(0x170, 8);
4844 }
4845
4846 scsi_host_put(ap->host);
4847 }
4848
4849 if (host_set->ops->host_stop)
4850 host_set->ops->host_stop(host_set);
4851
4852 kfree(host_set);
4853}
4854
1da177e4
LT		 4855/**
4856 * ata_scsi_release - SCSI layer callback hook for host unload
4857 * @host: libata host to be unloaded
4858 *
4859 * Performs all duties necessary to shut down a libata port...
4860 * Kill port kthread, disable port, and release resources.
4861 *
4862 * LOCKING:
4863 * Inherited from SCSI layer.
4864 *
4865 * RETURNS:
4866 * One.
4867 */
4868
4869int ata_scsi_release(struct Scsi_Host *host)
4870{
4871 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
d9572b1d 4872 int i;
1da177e4
LT		 4873
4874 DPRINTK("ENTER\n");
4875
4876 ap->ops->port_disable(ap);
4877 ata_host_remove(ap, 0);
d9572b1d
TH		 4878 for (i = 0; i < ATA_MAX_DEVICES; i++)
4879 kfree(ap->device[i].id);
1da177e4
LT		 4880
4881 DPRINTK("EXIT\n");
4882 return 1;
4883}
4884
4885/**
4886 * ata_std_ports - initialize ioaddr with standard port offsets.
4887 * @ioaddr: IO address structure to be initialized
0baab86b
EF		 4888 *
4889 * Utility function which initializes data_addr, error_addr,
4890 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4891 * device_addr, status_addr, and command_addr to standard offsets
4892 * relative to cmd_addr.
4893 *
4894 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
1da177e4 4895 */
0baab86b 4896
1da177e4
LT		 4897void ata_std_ports(struct ata_ioports *ioaddr)
4898{
4899 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
4900 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
4901 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
4902 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
4903 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
4904 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
4905 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
4906 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
4907 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
4908 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
4909}
4910
0baab86b 4911
374b1873
JG		 4912#ifdef CONFIG_PCI
4913
4914void ata_pci_host_stop (struct ata_host_set *host_set)
4915{
4916 struct pci_dev *pdev = to_pci_dev(host_set->dev);
4917
4918 pci_iounmap(pdev, host_set->mmio_base);
4919}
4920
1da177e4
LT		 4921/**
4922 * ata_pci_remove_one - PCI layer callback for device removal
4923 * @pdev: PCI device that was removed
4924 *
4925 * PCI layer indicates to libata via this hook that
6f0ef4fa 4926 * hot-unplug or module unload event has occurred.
1da177e4
LT		 4927 * Handle this by unregistering all objects associated
4928 * with this PCI device. Free those objects. Then finally
4929 * release PCI resources and disable device.
4930 *
4931 * LOCKING:
4932 * Inherited from PCI layer (may sleep).
4933 */
4934
4935void ata_pci_remove_one (struct pci_dev *pdev)
4936{
4937 struct device *dev = pci_dev_to_dev(pdev);
4938 struct ata_host_set *host_set = dev_get_drvdata(dev);
1da177e4 4939
17b14451 4940 ata_host_set_remove(host_set);
1da177e4
LT		 4941 pci_release_regions(pdev);
4942 pci_disable_device(pdev);
4943 dev_set_drvdata(dev, NULL);
4944}
4945
4946/* move to PCI subsystem */
057ace5e 4947int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
1da177e4
LT		 4948{
4949 unsigned long tmp = 0;
4950
4951 switch (bits->width) {
4952 case 1: {
4953 u8 tmp8 = 0;
4954 pci_read_config_byte(pdev, bits->reg, &tmp8);
4955 tmp = tmp8;
4956 break;
4957 }
4958 case 2: {
4959 u16 tmp16 = 0;
4960 pci_read_config_word(pdev, bits->reg, &tmp16);
4961 tmp = tmp16;
4962 break;
4963 }
4964 case 4: {
4965 u32 tmp32 = 0;
4966 pci_read_config_dword(pdev, bits->reg, &tmp32);
4967 tmp = tmp32;
4968 break;
4969 }
4970
4971 default:
4972 return -EINVAL;
4973 }
4974
4975 tmp &= bits->mask;
4976
4977 return (tmp == bits->val) ? 1 : 0;
4978}
9b847548
JA		 4979
4980int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
4981{
4982 pci_save_state(pdev);
4983 pci_disable_device(pdev);
4984 pci_set_power_state(pdev, PCI_D3hot);
4985 return 0;
4986}
4987
4988int ata_pci_device_resume(struct pci_dev *pdev)
4989{
4990 pci_set_power_state(pdev, PCI_D0);
4991 pci_restore_state(pdev);
4992 pci_enable_device(pdev);
4993 pci_set_master(pdev);
4994 return 0;
4995}
1da177e4
LT		 4996#endif /* CONFIG_PCI */
4997
4998
1da177e4
LT		 4999static int __init ata_init(void)
5000{
5001 ata_wq = create_workqueue("ata");
5002 if (!ata_wq)
5003 return -ENOMEM;
5004
5005 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
5006 return 0;
5007}
5008
5009static void __exit ata_exit(void)
5010{
5011 destroy_workqueue(ata_wq);
5012}
5013
5014module_init(ata_init);
5015module_exit(ata_exit);
5016
67846b30
JG		 5017static unsigned long ratelimit_time;
5018static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
5019
5020int ata_ratelimit(void)
5021{
5022 int rc;
5023 unsigned long flags;
5024
5025 spin_lock_irqsave(&ata_ratelimit_lock, flags);
5026
5027 if (time_after(jiffies, ratelimit_time)) {
5028 rc = 1;
5029 ratelimit_time = jiffies + (HZ/5);
5030 } else
5031 rc = 0;
5032
5033 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
5034
5035 return rc;
5036}
5037
1da177e4
LT		 5038/*
5039 * libata is essentially a library of internal helper functions for
5040 * low-level ATA host controller drivers. As such, the API/ABI is
5041 * likely to change as new drivers are added and updated.
5042 * Do not depend on ABI/API stability.
5043 */
5044
5045EXPORT_SYMBOL_GPL(ata_std_bios_param);
5046EXPORT_SYMBOL_GPL(ata_std_ports);
5047EXPORT_SYMBOL_GPL(ata_device_add);
17b14451 5048EXPORT_SYMBOL_GPL(ata_host_set_remove);
1da177e4
LT		 5049EXPORT_SYMBOL_GPL(ata_sg_init);
5050EXPORT_SYMBOL_GPL(ata_sg_init_one);
76014427 5051EXPORT_SYMBOL_GPL(__ata_qc_complete);
1da177e4 5052EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
1da177e4
LT		 5053EXPORT_SYMBOL_GPL(ata_tf_load);
5054EXPORT_SYMBOL_GPL(ata_tf_read);
5055EXPORT_SYMBOL_GPL(ata_noop_dev_select);
5056EXPORT_SYMBOL_GPL(ata_std_dev_select);
5057EXPORT_SYMBOL_GPL(ata_tf_to_fis);
5058EXPORT_SYMBOL_GPL(ata_tf_from_fis);
5059EXPORT_SYMBOL_GPL(ata_check_status);
5060EXPORT_SYMBOL_GPL(ata_altstatus);
1da177e4
LT		 5061EXPORT_SYMBOL_GPL(ata_exec_command);
5062EXPORT_SYMBOL_GPL(ata_port_start);
5063EXPORT_SYMBOL_GPL(ata_port_stop);
aa8f0dc6 5064EXPORT_SYMBOL_GPL(ata_host_stop);
1da177e4
LT		 5065EXPORT_SYMBOL_GPL(ata_interrupt);
5066EXPORT_SYMBOL_GPL(ata_qc_prep);
e46834cd 5067EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
1da177e4
LT		 5068EXPORT_SYMBOL_GPL(ata_bmdma_setup);
5069EXPORT_SYMBOL_GPL(ata_bmdma_start);
5070EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
5071EXPORT_SYMBOL_GPL(ata_bmdma_status);
5072EXPORT_SYMBOL_GPL(ata_bmdma_stop);
5073EXPORT_SYMBOL_GPL(ata_port_probe);
5074EXPORT_SYMBOL_GPL(sata_phy_reset);
5075EXPORT_SYMBOL_GPL(__sata_phy_reset);
5076EXPORT_SYMBOL_GPL(ata_bus_reset);
8a19ac89 5077EXPORT_SYMBOL_GPL(ata_std_probeinit);
c2bd5804
TH		 5078EXPORT_SYMBOL_GPL(ata_std_softreset);
5079EXPORT_SYMBOL_GPL(sata_std_hardreset);
5080EXPORT_SYMBOL_GPL(ata_std_postreset);
5081EXPORT_SYMBOL_GPL(ata_std_probe_reset);
a62c0fc5 5082EXPORT_SYMBOL_GPL(ata_drive_probe_reset);
623a3128 5083EXPORT_SYMBOL_GPL(ata_dev_revalidate);
2e9edbf8
JG		 5084EXPORT_SYMBOL_GPL(ata_dev_classify);
5085EXPORT_SYMBOL_GPL(ata_dev_pair);
1da177e4 5086EXPORT_SYMBOL_GPL(ata_port_disable);
67846b30 5087EXPORT_SYMBOL_GPL(ata_ratelimit);
6f8b9958 5088EXPORT_SYMBOL_GPL(ata_busy_sleep);
86e45b6b 5089EXPORT_SYMBOL_GPL(ata_port_queue_task);
1da177e4
LT		 5090EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
5091EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
1da177e4
LT		 5092EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
5093EXPORT_SYMBOL_GPL(ata_scsi_release);
5094EXPORT_SYMBOL_GPL(ata_host_intr);
6a62a04d
TH		 5095EXPORT_SYMBOL_GPL(ata_id_string);
5096EXPORT_SYMBOL_GPL(ata_id_c_string);
1da177e4
LT		 5097EXPORT_SYMBOL_GPL(ata_scsi_simulate);
5098
1bc4ccff 5099EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
452503f9
AC		 5100EXPORT_SYMBOL_GPL(ata_timing_compute);
5101EXPORT_SYMBOL_GPL(ata_timing_merge);
5102
1da177e4
LT		 5103#ifdef CONFIG_PCI
5104EXPORT_SYMBOL_GPL(pci_test_config_bits);
374b1873 5105EXPORT_SYMBOL_GPL(ata_pci_host_stop);
1da177e4
LT		 5106EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
5107EXPORT_SYMBOL_GPL(ata_pci_init_one);
5108EXPORT_SYMBOL_GPL(ata_pci_remove_one);
9b847548
JA		 5109EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
5110EXPORT_SYMBOL_GPL(ata_pci_device_resume);
67951ade
AC		 5111EXPORT_SYMBOL_GPL(ata_pci_default_filter);
5112EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
1da177e4 5113#endif /* CONFIG_PCI */
9b847548
JA		 5114
5115EXPORT_SYMBOL_GPL(ata_device_suspend);
5116EXPORT_SYMBOL_GPL(ata_device_resume);
5117EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
5118EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
ece1d636
TH		 5119
5120EXPORT_SYMBOL_GPL(ata_scsi_error);
5121EXPORT_SYMBOL_GPL(ata_eng_timeout);
5122EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
5123EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
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