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edd16368
SC		 1/*
2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
12 * NON INFRINGEMENT. See the GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 *
18 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/interrupt.h>
24#include <linux/types.h>
25#include <linux/pci.h>
26#include <linux/kernel.h>
27#include <linux/slab.h>
28#include <linux/delay.h>
29#include <linux/fs.h>
30#include <linux/timer.h>
31#include <linux/seq_file.h>
32#include <linux/init.h>
33#include <linux/spinlock.h>
34#include <linux/smp_lock.h>
35#include <linux/compat.h>
36#include <linux/blktrace_api.h>
37#include <linux/uaccess.h>
38#include <linux/io.h>
39#include <linux/dma-mapping.h>
40#include <linux/completion.h>
41#include <linux/moduleparam.h>
42#include <scsi/scsi.h>
43#include <scsi/scsi_cmnd.h>
44#include <scsi/scsi_device.h>
45#include <scsi/scsi_host.h>
667e23d4 46#include <scsi/scsi_tcq.h>
edd16368
SC		 47#include <linux/cciss_ioctl.h>
48#include <linux/string.h>
49#include <linux/bitmap.h>
50#include <asm/atomic.h>
51#include <linux/kthread.h>
52#include "hpsa_cmd.h"
53#include "hpsa.h"
54
55/* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
31468401 56#define HPSA_DRIVER_VERSION "2.0.2-1"
edd16368
SC		 57#define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
58
59/* How long to wait (in milliseconds) for board to go into simple mode */
60#define MAX_CONFIG_WAIT 30000
61#define MAX_IOCTL_CONFIG_WAIT 1000
62
63/*define how many times we will try a command because of bus resets */
64#define MAX_CMD_RETRIES 3
65
66/* Embedded module documentation macros - see modules.h */
67MODULE_AUTHOR("Hewlett-Packard Company");
68MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
69 HPSA_DRIVER_VERSION);
70MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
71MODULE_VERSION(HPSA_DRIVER_VERSION);
72MODULE_LICENSE("GPL");
73
74static int hpsa_allow_any;
75module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
76MODULE_PARM_DESC(hpsa_allow_any,
77 "Allow hpsa driver to access unknown HP Smart Array hardware");
78
79/* define the PCI info for the cards we can control */
80static const struct pci_device_id hpsa_pci_device_id[] = {
edd16368
SC		 81 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
82 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
83 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
84 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
85 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
86 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
f8b01eb9 88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
2e931f31
SC		 89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3250},
90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3251},
91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3252},
92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3253},
93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3254},
f8b01eb9
MM		 94#define PCI_DEVICE_ID_HP_CISSF 0x333f
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x333F},
edd16368
SC		 96 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
97 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
6798cc0a
SC		 98 {PCI_VENDOR_ID_COMPAQ, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
99 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
edd16368
SC		 100 {0,}
101};
102
103MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
104
105/* board_id = Subsystem Device ID & Vendor ID
106 * product = Marketing Name for the board
107 * access = Address of the struct of function pointers
108 */
109static struct board_type products[] = {
edd16368
SC		 110 {0x3241103C, "Smart Array P212", &SA5_access},
111 {0x3243103C, "Smart Array P410", &SA5_access},
112 {0x3245103C, "Smart Array P410i", &SA5_access},
113 {0x3247103C, "Smart Array P411", &SA5_access},
114 {0x3249103C, "Smart Array P812", &SA5_access},
115 {0x324a103C, "Smart Array P712m", &SA5_access},
116 {0x324b103C, "Smart Array P711m", &SA5_access},
f8b01eb9
MM		 117 {0x3233103C, "StorageWorks P1210m", &SA5_access},
118 {0x333F103C, "StorageWorks P1210m", &SA5_access},
2e931f31
SC		 119 {0x3250103C, "Smart Array", &SA5_access},
120 {0x3250113C, "Smart Array", &SA5_access},
121 {0x3250123C, "Smart Array", &SA5_access},
122 {0x3250133C, "Smart Array", &SA5_access},
123 {0x3250143C, "Smart Array", &SA5_access},
edd16368
SC		 124 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
125};
126
127static int number_of_controllers;
128
10f66018
SC		 129static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
130static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
edd16368
SC		 131static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
132static void start_io(struct ctlr_info *h);
133
134#ifdef CONFIG_COMPAT
135static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
136#endif
137
138static void cmd_free(struct ctlr_info *h, struct CommandList *c);
139static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
140static struct CommandList *cmd_alloc(struct ctlr_info *h);
141static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
01a02ffc
SC		 142static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
143 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
edd16368
SC		 144 int cmd_type);
145
146static int hpsa_scsi_queue_command(struct scsi_cmnd *cmd,
147 void (*done)(struct scsi_cmnd *));
a08a8471
SC		 148static void hpsa_scan_start(struct Scsi_Host *);
149static int hpsa_scan_finished(struct Scsi_Host *sh,
150 unsigned long elapsed_time);
667e23d4
SC		 151static int hpsa_change_queue_depth(struct scsi_device *sdev,
152 int qdepth, int reason);
edd16368
SC		 153
154static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
155static int hpsa_slave_alloc(struct scsi_device *sdev);
156static void hpsa_slave_destroy(struct scsi_device *sdev);
157
158static ssize_t raid_level_show(struct device *dev,
159 struct device_attribute *attr, char *buf);
160static ssize_t lunid_show(struct device *dev,
161 struct device_attribute *attr, char *buf);
162static ssize_t unique_id_show(struct device *dev,
163 struct device_attribute *attr, char *buf);
d28ce020
SC		 164static ssize_t host_show_firmware_revision(struct device *dev,
165 struct device_attribute *attr, char *buf);
edd16368
SC		 166static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
167static ssize_t host_store_rescan(struct device *dev,
168 struct device_attribute *attr, const char *buf, size_t count);
169static int check_for_unit_attention(struct ctlr_info *h,
170 struct CommandList *c);
171static void check_ioctl_unit_attention(struct ctlr_info *h,
172 struct CommandList *c);
303932fd
DB		 173/* performant mode helper functions */
174static void calc_bucket_map(int *bucket, int num_buckets,
175 int nsgs, int *bucket_map);
7136f9a7 176static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
303932fd 177static inline u32 next_command(struct ctlr_info *h);
1df8552a
SC		 178static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
179 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
180 u64 *cfg_offset);
181static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
182 unsigned long *memory_bar);
18867659 183static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
edd16368
SC		 184
185static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
186static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
187static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
188static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
d28ce020
SC		 189static DEVICE_ATTR(firmware_revision, S_IRUGO,
190 host_show_firmware_revision, NULL);
edd16368
SC		 191
192static struct device_attribute *hpsa_sdev_attrs[] = {
193 &dev_attr_raid_level,
194 &dev_attr_lunid,
195 &dev_attr_unique_id,
196 NULL,
197};
198
199static struct device_attribute *hpsa_shost_attrs[] = {
200 &dev_attr_rescan,
d28ce020 201 &dev_attr_firmware_revision,
edd16368
SC		 202 NULL,
203};
204
205static struct scsi_host_template hpsa_driver_template = {
206 .module = THIS_MODULE,
207 .name = "hpsa",
208 .proc_name = "hpsa",
209 .queuecommand = hpsa_scsi_queue_command,
a08a8471
SC		 210 .scan_start = hpsa_scan_start,
211 .scan_finished = hpsa_scan_finished,
667e23d4 212 .change_queue_depth = hpsa_change_queue_depth,
edd16368 213 .this_id = -1,
edd16368
SC		 214 .use_clustering = ENABLE_CLUSTERING,
215 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
216 .ioctl = hpsa_ioctl,
217 .slave_alloc = hpsa_slave_alloc,
218 .slave_destroy = hpsa_slave_destroy,
219#ifdef CONFIG_COMPAT
220 .compat_ioctl = hpsa_compat_ioctl,
221#endif
222 .sdev_attrs = hpsa_sdev_attrs,
223 .shost_attrs = hpsa_shost_attrs,
224};
225
226static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
227{
228 unsigned long *priv = shost_priv(sdev->host);
229 return (struct ctlr_info *) *priv;
230}
231
a23513e8
SC		 232static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
233{
234 unsigned long *priv = shost_priv(sh);
235 return (struct ctlr_info *) *priv;
236}
237
edd16368
SC		 238static int check_for_unit_attention(struct ctlr_info *h,
239 struct CommandList *c)
240{
241 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
242 return 0;
243
244 switch (c->err_info->SenseInfo[12]) {
245 case STATE_CHANGED:
246 dev_warn(&h->pdev->dev, "hpsa%d: a state change "
247 "detected, command retried\n", h->ctlr);
248 break;
249 case LUN_FAILED:
250 dev_warn(&h->pdev->dev, "hpsa%d: LUN failure "
251 "detected, action required\n", h->ctlr);
252 break;
253 case REPORT_LUNS_CHANGED:
254 dev_warn(&h->pdev->dev, "hpsa%d: report LUN data "
31468401 255 "changed, action required\n", h->ctlr);
edd16368 256 /*
edd16368
SC		 257 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
258 */
259 break;
260 case POWER_OR_RESET:
261 dev_warn(&h->pdev->dev, "hpsa%d: a power on "
262 "or device reset detected\n", h->ctlr);
263 break;
264 case UNIT_ATTENTION_CLEARED:
265 dev_warn(&h->pdev->dev, "hpsa%d: unit attention "
266 "cleared by another initiator\n", h->ctlr);
267 break;
268 default:
269 dev_warn(&h->pdev->dev, "hpsa%d: unknown "
270 "unit attention detected\n", h->ctlr);
271 break;
272 }
273 return 1;
274}
275
276static ssize_t host_store_rescan(struct device *dev,
277 struct device_attribute *attr,
278 const char *buf, size_t count)
279{
280 struct ctlr_info *h;
281 struct Scsi_Host *shost = class_to_shost(dev);
a23513e8 282 h = shost_to_hba(shost);
31468401 283 hpsa_scan_start(h->scsi_host);
edd16368
SC		 284 return count;
285}
286
d28ce020
SC		 287static ssize_t host_show_firmware_revision(struct device *dev,
288 struct device_attribute *attr, char *buf)
289{
290 struct ctlr_info *h;
291 struct Scsi_Host *shost = class_to_shost(dev);
292 unsigned char *fwrev;
293
294 h = shost_to_hba(shost);
295 if (!h->hba_inquiry_data)
296 return 0;
297 fwrev = &h->hba_inquiry_data[32];
298 return snprintf(buf, 20, "%c%c%c%c\n",
299 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
300}
301
edd16368
SC		 302/* Enqueuing and dequeuing functions for cmdlists. */
303static inline void addQ(struct hlist_head *list, struct CommandList *c)
304{
305 hlist_add_head(&c->list, list);
306}
307
303932fd
DB		 308static inline u32 next_command(struct ctlr_info *h)
309{
310 u32 a;
311
312 if (unlikely(h->transMethod != CFGTBL_Trans_Performant))
313 return h->access.command_completed(h);
314
315 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
316 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
317 (h->reply_pool_head)++;
318 h->commands_outstanding--;
319 } else {
320 a = FIFO_EMPTY;
321 }
322 /* Check for wraparound */
323 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
324 h->reply_pool_head = h->reply_pool;
325 h->reply_pool_wraparound ^= 1;
326 }
327 return a;
328}
329
330/* set_performant_mode: Modify the tag for cciss performant
331 * set bit 0 for pull model, bits 3-1 for block fetch
332 * register number
333 */
334static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
335{
336 if (likely(h->transMethod == CFGTBL_Trans_Performant))
337 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
338}
339
edd16368
SC		 340static void enqueue_cmd_and_start_io(struct ctlr_info *h,
341 struct CommandList *c)
342{
343 unsigned long flags;
303932fd
DB		 344
345 set_performant_mode(h, c);
edd16368
SC		 346 spin_lock_irqsave(&h->lock, flags);
347 addQ(&h->reqQ, c);
348 h->Qdepth++;
349 start_io(h);
350 spin_unlock_irqrestore(&h->lock, flags);
351}
352
353static inline void removeQ(struct CommandList *c)
354{
355 if (WARN_ON(hlist_unhashed(&c->list)))
356 return;
357 hlist_del_init(&c->list);
358}
359
360static inline int is_hba_lunid(unsigned char scsi3addr[])
361{
362 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
363}
364
365static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
366{
367 return (scsi3addr[3] & 0xC0) == 0x40;
368}
369
339b2b14
SC		 370static inline int is_scsi_rev_5(struct ctlr_info *h)
371{
372 if (!h->hba_inquiry_data)
373 return 0;
374 if ((h->hba_inquiry_data[2] & 0x07) == 5)
375 return 1;
376 return 0;
377}
378
edd16368
SC		 379static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
380 "UNKNOWN"
381};
382#define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
383
384static ssize_t raid_level_show(struct device *dev,
385 struct device_attribute *attr, char *buf)
386{
387 ssize_t l = 0;
82a72c0a 388 unsigned char rlevel;
edd16368
SC		 389 struct ctlr_info *h;
390 struct scsi_device *sdev;
391 struct hpsa_scsi_dev_t *hdev;
392 unsigned long flags;
393
394 sdev = to_scsi_device(dev);
395 h = sdev_to_hba(sdev);
396 spin_lock_irqsave(&h->lock, flags);
397 hdev = sdev->hostdata;
398 if (!hdev) {
399 spin_unlock_irqrestore(&h->lock, flags);
400 return -ENODEV;
401 }
402
403 /* Is this even a logical drive? */
404 if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
405 spin_unlock_irqrestore(&h->lock, flags);
406 l = snprintf(buf, PAGE_SIZE, "N/A\n");
407 return l;
408 }
409
410 rlevel = hdev->raid_level;
411 spin_unlock_irqrestore(&h->lock, flags);
82a72c0a 412 if (rlevel > RAID_UNKNOWN)
edd16368
SC		 413 rlevel = RAID_UNKNOWN;
414 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
415 return l;
416}
417
418static ssize_t lunid_show(struct device *dev,
419 struct device_attribute *attr, char *buf)
420{
421 struct ctlr_info *h;
422 struct scsi_device *sdev;
423 struct hpsa_scsi_dev_t *hdev;
424 unsigned long flags;
425 unsigned char lunid[8];
426
427 sdev = to_scsi_device(dev);
428 h = sdev_to_hba(sdev);
429 spin_lock_irqsave(&h->lock, flags);
430 hdev = sdev->hostdata;
431 if (!hdev) {
432 spin_unlock_irqrestore(&h->lock, flags);
433 return -ENODEV;
434 }
435 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
436 spin_unlock_irqrestore(&h->lock, flags);
437 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
438 lunid[0], lunid[1], lunid[2], lunid[3],
439 lunid[4], lunid[5], lunid[6], lunid[7]);
440}
441
442static ssize_t unique_id_show(struct device *dev,
443 struct device_attribute *attr, char *buf)
444{
445 struct ctlr_info *h;
446 struct scsi_device *sdev;
447 struct hpsa_scsi_dev_t *hdev;
448 unsigned long flags;
449 unsigned char sn[16];
450
451 sdev = to_scsi_device(dev);
452 h = sdev_to_hba(sdev);
453 spin_lock_irqsave(&h->lock, flags);
454 hdev = sdev->hostdata;
455 if (!hdev) {
456 spin_unlock_irqrestore(&h->lock, flags);
457 return -ENODEV;
458 }
459 memcpy(sn, hdev->device_id, sizeof(sn));
460 spin_unlock_irqrestore(&h->lock, flags);
461 return snprintf(buf, 16 * 2 + 2,
462 "%02X%02X%02X%02X%02X%02X%02X%02X"
463 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
464 sn[0], sn[1], sn[2], sn[3],
465 sn[4], sn[5], sn[6], sn[7],
466 sn[8], sn[9], sn[10], sn[11],
467 sn[12], sn[13], sn[14], sn[15]);
468}
469
470static int hpsa_find_target_lun(struct ctlr_info *h,
471 unsigned char scsi3addr[], int bus, int *target, int *lun)
472{
473 /* finds an unused bus, target, lun for a new physical device
474 * assumes h->devlock is held
475 */
476 int i, found = 0;
477 DECLARE_BITMAP(lun_taken, HPSA_MAX_SCSI_DEVS_PER_HBA);
478
479 memset(&lun_taken[0], 0, HPSA_MAX_SCSI_DEVS_PER_HBA >> 3);
480
481 for (i = 0; i < h->ndevices; i++) {
482 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
483 set_bit(h->dev[i]->target, lun_taken);
484 }
485
486 for (i = 0; i < HPSA_MAX_SCSI_DEVS_PER_HBA; i++) {
487 if (!test_bit(i, lun_taken)) {
488 /* *bus = 1; */
489 *target = i;
490 *lun = 0;
491 found = 1;
492 break;
493 }
494 }
495 return !found;
496}
497
498/* Add an entry into h->dev[] array. */
499static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
500 struct hpsa_scsi_dev_t *device,
501 struct hpsa_scsi_dev_t *added[], int *nadded)
502{
503 /* assumes h->devlock is held */
504 int n = h->ndevices;
505 int i;
506 unsigned char addr1[8], addr2[8];
507 struct hpsa_scsi_dev_t *sd;
508
509 if (n >= HPSA_MAX_SCSI_DEVS_PER_HBA) {
510 dev_err(&h->pdev->dev, "too many devices, some will be "
511 "inaccessible.\n");
512 return -1;
513 }
514
515 /* physical devices do not have lun or target assigned until now. */
516 if (device->lun != -1)
517 /* Logical device, lun is already assigned. */
518 goto lun_assigned;
519
520 /* If this device a non-zero lun of a multi-lun device
521 * byte 4 of the 8-byte LUN addr will contain the logical
522 * unit no, zero otherise.
523 */
524 if (device->scsi3addr[4] == 0) {
525 /* This is not a non-zero lun of a multi-lun device */
526 if (hpsa_find_target_lun(h, device->scsi3addr,
527 device->bus, &device->target, &device->lun) != 0)
528 return -1;
529 goto lun_assigned;
530 }
531
532 /* This is a non-zero lun of a multi-lun device.
533 * Search through our list and find the device which
534 * has the same 8 byte LUN address, excepting byte 4.
535 * Assign the same bus and target for this new LUN.
536 * Use the logical unit number from the firmware.
537 */
538 memcpy(addr1, device->scsi3addr, 8);
539 addr1[4] = 0;
540 for (i = 0; i < n; i++) {
541 sd = h->dev[i];
542 memcpy(addr2, sd->scsi3addr, 8);
543 addr2[4] = 0;
544 /* differ only in byte 4? */
545 if (memcmp(addr1, addr2, 8) == 0) {
546 device->bus = sd->bus;
547 device->target = sd->target;
548 device->lun = device->scsi3addr[4];
549 break;
550 }
551 }
552 if (device->lun == -1) {
553 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
554 " suspect firmware bug or unsupported hardware "
555 "configuration.\n");
556 return -1;
557 }
558
559lun_assigned:
560
561 h->dev[n] = device;
562 h->ndevices++;
563 added[*nadded] = device;
564 (*nadded)++;
565
566 /* initially, (before registering with scsi layer) we don't
567 * know our hostno and we don't want to print anything first
568 * time anyway (the scsi layer's inquiries will show that info)
569 */
570 /* if (hostno != -1) */
571 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
572 scsi_device_type(device->devtype), hostno,
573 device->bus, device->target, device->lun);
574 return 0;
575}
576
2a8ccf31
SC		 577/* Replace an entry from h->dev[] array. */
578static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
579 int entry, struct hpsa_scsi_dev_t *new_entry,
580 struct hpsa_scsi_dev_t *added[], int *nadded,
581 struct hpsa_scsi_dev_t *removed[], int *nremoved)
582{
583 /* assumes h->devlock is held */
584 BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
585 removed[*nremoved] = h->dev[entry];
586 (*nremoved)++;
587 h->dev[entry] = new_entry;
588 added[*nadded] = new_entry;
589 (*nadded)++;
590 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
591 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
592 new_entry->target, new_entry->lun);
593}
594
edd16368
SC		 595/* Remove an entry from h->dev[] array. */
596static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
597 struct hpsa_scsi_dev_t *removed[], int *nremoved)
598{
599 /* assumes h->devlock is held */
600 int i;
601 struct hpsa_scsi_dev_t *sd;
602
b2ed4f79 603 BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
edd16368
SC		 604
605 sd = h->dev[entry];
606 removed[*nremoved] = h->dev[entry];
607 (*nremoved)++;
608
609 for (i = entry; i < h->ndevices-1; i++)
610 h->dev[i] = h->dev[i+1];
611 h->ndevices--;
612 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
613 scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
614 sd->lun);
615}
616
617#define SCSI3ADDR_EQ(a, b) ( \
618 (a)[7] == (b)[7] && \
619 (a)[6] == (b)[6] && \
620 (a)[5] == (b)[5] && \
621 (a)[4] == (b)[4] && \
622 (a)[3] == (b)[3] && \
623 (a)[2] == (b)[2] && \
624 (a)[1] == (b)[1] && \
625 (a)[0] == (b)[0])
626
627static void fixup_botched_add(struct ctlr_info *h,
628 struct hpsa_scsi_dev_t *added)
629{
630 /* called when scsi_add_device fails in order to re-adjust
631 * h->dev[] to match the mid layer's view.
632 */
633 unsigned long flags;
634 int i, j;
635
636 spin_lock_irqsave(&h->lock, flags);
637 for (i = 0; i < h->ndevices; i++) {
638 if (h->dev[i] == added) {
639 for (j = i; j < h->ndevices-1; j++)
640 h->dev[j] = h->dev[j+1];
641 h->ndevices--;
642 break;
643 }
644 }
645 spin_unlock_irqrestore(&h->lock, flags);
646 kfree(added);
647}
648
649static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
650 struct hpsa_scsi_dev_t *dev2)
651{
652 if ((is_logical_dev_addr_mode(dev1->scsi3addr) ||
653 (dev1->lun != -1 && dev2->lun != -1)) &&
654 dev1->devtype != 0x0C)
655 return (memcmp(dev1, dev2, sizeof(*dev1)) == 0);
656
657 /* we compare everything except lun and target as these
658 * are not yet assigned. Compare parts likely
659 * to differ first
660 */
661 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
662 sizeof(dev1->scsi3addr)) != 0)
663 return 0;
664 if (memcmp(dev1->device_id, dev2->device_id,
665 sizeof(dev1->device_id)) != 0)
666 return 0;
667 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
668 return 0;
669 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
670 return 0;
671 if (memcmp(dev1->revision, dev2->revision, sizeof(dev1->revision)) != 0)
672 return 0;
673 if (dev1->devtype != dev2->devtype)
674 return 0;
675 if (dev1->raid_level != dev2->raid_level)
676 return 0;
677 if (dev1->bus != dev2->bus)
678 return 0;
679 return 1;
680}
681
682/* Find needle in haystack. If exact match found, return DEVICE_SAME,
683 * and return needle location in *index. If scsi3addr matches, but not
684 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
685 * location in *index. If needle not found, return DEVICE_NOT_FOUND.
686 */
687static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
688 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
689 int *index)
690{
691 int i;
692#define DEVICE_NOT_FOUND 0
693#define DEVICE_CHANGED 1
694#define DEVICE_SAME 2
695 for (i = 0; i < haystack_size; i++) {
23231048
SC		 696 if (haystack[i] == NULL) /* previously removed. */
697 continue;
edd16368
SC		 698 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
699 *index = i;
700 if (device_is_the_same(needle, haystack[i]))
701 return DEVICE_SAME;
702 else
703 return DEVICE_CHANGED;
704 }
705 }
706 *index = -1;
707 return DEVICE_NOT_FOUND;
708}
709
4967bd3e 710static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
edd16368
SC		 711 struct hpsa_scsi_dev_t *sd[], int nsds)
712{
713 /* sd contains scsi3 addresses and devtypes, and inquiry
714 * data. This function takes what's in sd to be the current
715 * reality and updates h->dev[] to reflect that reality.
716 */
717 int i, entry, device_change, changes = 0;
718 struct hpsa_scsi_dev_t *csd;
719 unsigned long flags;
720 struct hpsa_scsi_dev_t **added, **removed;
721 int nadded, nremoved;
722 struct Scsi_Host *sh = NULL;
723
724 added = kzalloc(sizeof(*added) * HPSA_MAX_SCSI_DEVS_PER_HBA,
725 GFP_KERNEL);
726 removed = kzalloc(sizeof(*removed) * HPSA_MAX_SCSI_DEVS_PER_HBA,
727 GFP_KERNEL);
728
729 if (!added || !removed) {
730 dev_warn(&h->pdev->dev, "out of memory in "
731 "adjust_hpsa_scsi_table\n");
732 goto free_and_out;
733 }
734
735 spin_lock_irqsave(&h->devlock, flags);
736
737 /* find any devices in h->dev[] that are not in
738 * sd[] and remove them from h->dev[], and for any
739 * devices which have changed, remove the old device
740 * info and add the new device info.
741 */
742 i = 0;
743 nremoved = 0;
744 nadded = 0;
745 while (i < h->ndevices) {
746 csd = h->dev[i];
747 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
748 if (device_change == DEVICE_NOT_FOUND) {
749 changes++;
750 hpsa_scsi_remove_entry(h, hostno, i,
751 removed, &nremoved);
752 continue; /* remove ^^^, hence i not incremented */
753 } else if (device_change == DEVICE_CHANGED) {
754 changes++;
2a8ccf31
SC		 755 hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
756 added, &nadded, removed, &nremoved);
c7f172dc
SC		 757 /* Set it to NULL to prevent it from being freed
758 * at the bottom of hpsa_update_scsi_devices()
759 */
760 sd[entry] = NULL;
edd16368
SC		 761 }
762 i++;
763 }
764
765 /* Now, make sure every device listed in sd[] is also
766 * listed in h->dev[], adding them if they aren't found
767 */
768
769 for (i = 0; i < nsds; i++) {
770 if (!sd[i]) /* if already added above. */
771 continue;
772 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
773 h->ndevices, &entry);
774 if (device_change == DEVICE_NOT_FOUND) {
775 changes++;
776 if (hpsa_scsi_add_entry(h, hostno, sd[i],
777 added, &nadded) != 0)
778 break;
779 sd[i] = NULL; /* prevent from being freed later. */
780 } else if (device_change == DEVICE_CHANGED) {
781 /* should never happen... */
782 changes++;
783 dev_warn(&h->pdev->dev,
784 "device unexpectedly changed.\n");
785 /* but if it does happen, we just ignore that device */
786 }
787 }
788 spin_unlock_irqrestore(&h->devlock, flags);
789
790 /* Don't notify scsi mid layer of any changes the first time through
791 * (or if there are no changes) scsi_scan_host will do it later the
792 * first time through.
793 */
794 if (hostno == -1 || !changes)
795 goto free_and_out;
796
797 sh = h->scsi_host;
798 /* Notify scsi mid layer of any removed devices */
799 for (i = 0; i < nremoved; i++) {
800 struct scsi_device *sdev =
801 scsi_device_lookup(sh, removed[i]->bus,
802 removed[i]->target, removed[i]->lun);
803 if (sdev != NULL) {
804 scsi_remove_device(sdev);
805 scsi_device_put(sdev);
806 } else {
807 /* We don't expect to get here.
808 * future cmds to this device will get selection
809 * timeout as if the device was gone.
810 */
811 dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
812 " for removal.", hostno, removed[i]->bus,
813 removed[i]->target, removed[i]->lun);
814 }
815 kfree(removed[i]);
816 removed[i] = NULL;
817 }
818
819 /* Notify scsi mid layer of any added devices */
820 for (i = 0; i < nadded; i++) {
821 if (scsi_add_device(sh, added[i]->bus,
822 added[i]->target, added[i]->lun) == 0)
823 continue;
824 dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
825 "device not added.\n", hostno, added[i]->bus,
826 added[i]->target, added[i]->lun);
827 /* now we have to remove it from h->dev,
828 * since it didn't get added to scsi mid layer
829 */
830 fixup_botched_add(h, added[i]);
831 }
832
833free_and_out:
834 kfree(added);
835 kfree(removed);
edd16368
SC		 836}
837
838/*
839 * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
840 * Assume's h->devlock is held.
841 */
842static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
843 int bus, int target, int lun)
844{
845 int i;
846 struct hpsa_scsi_dev_t *sd;
847
848 for (i = 0; i < h->ndevices; i++) {
849 sd = h->dev[i];
850 if (sd->bus == bus && sd->target == target && sd->lun == lun)
851 return sd;
852 }
853 return NULL;
854}
855
856/* link sdev->hostdata to our per-device structure. */
857static int hpsa_slave_alloc(struct scsi_device *sdev)
858{
859 struct hpsa_scsi_dev_t *sd;
860 unsigned long flags;
861 struct ctlr_info *h;
862
863 h = sdev_to_hba(sdev);
864 spin_lock_irqsave(&h->devlock, flags);
865 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
866 sdev_id(sdev), sdev->lun);
867 if (sd != NULL)
868 sdev->hostdata = sd;
869 spin_unlock_irqrestore(&h->devlock, flags);
870 return 0;
871}
872
873static void hpsa_slave_destroy(struct scsi_device *sdev)
874{
bcc44255 875 /* nothing to do. */
edd16368
SC		 876}
877
878static void hpsa_scsi_setup(struct ctlr_info *h)
879{
880 h->ndevices = 0;
881 h->scsi_host = NULL;
882 spin_lock_init(&h->devlock);
edd16368
SC		 883}
884
33a2ffce
SC		 885static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
886{
887 int i;
888
889 if (!h->cmd_sg_list)
890 return;
891 for (i = 0; i < h->nr_cmds; i++) {
892 kfree(h->cmd_sg_list[i]);
893 h->cmd_sg_list[i] = NULL;
894 }
895 kfree(h->cmd_sg_list);
896 h->cmd_sg_list = NULL;
897}
898
899static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
900{
901 int i;
902
903 if (h->chainsize <= 0)
904 return 0;
905
906 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
907 GFP_KERNEL);
908 if (!h->cmd_sg_list)
909 return -ENOMEM;
910 for (i = 0; i < h->nr_cmds; i++) {
911 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
912 h->chainsize, GFP_KERNEL);
913 if (!h->cmd_sg_list[i])
914 goto clean;
915 }
916 return 0;
917
918clean:
919 hpsa_free_sg_chain_blocks(h);
920 return -ENOMEM;
921}
922
923static void hpsa_map_sg_chain_block(struct ctlr_info *h,
924 struct CommandList *c)
925{
926 struct SGDescriptor *chain_sg, *chain_block;
927 u64 temp64;
928
929 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
930 chain_block = h->cmd_sg_list[c->cmdindex];
931 chain_sg->Ext = HPSA_SG_CHAIN;
932 chain_sg->Len = sizeof(*chain_sg) *
933 (c->Header.SGTotal - h->max_cmd_sg_entries);
934 temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
935 PCI_DMA_TODEVICE);
936 chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
937 chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
938}
939
940static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
941 struct CommandList *c)
942{
943 struct SGDescriptor *chain_sg;
944 union u64bit temp64;
945
946 if (c->Header.SGTotal <= h->max_cmd_sg_entries)
947 return;
948
949 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
950 temp64.val32.lower = chain_sg->Addr.lower;
951 temp64.val32.upper = chain_sg->Addr.upper;
952 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
953}
954
edd16368 955static void complete_scsi_command(struct CommandList *cp,
01a02ffc 956 int timeout, u32 tag)
edd16368
SC		 957{
958 struct scsi_cmnd *cmd;
959 struct ctlr_info *h;
960 struct ErrorInfo *ei;
961
962 unsigned char sense_key;
963 unsigned char asc; /* additional sense code */
964 unsigned char ascq; /* additional sense code qualifier */
965
966 ei = cp->err_info;
967 cmd = (struct scsi_cmnd *) cp->scsi_cmd;
968 h = cp->h;
969
970 scsi_dma_unmap(cmd); /* undo the DMA mappings */
33a2ffce
SC		 971 if (cp->Header.SGTotal > h->max_cmd_sg_entries)
972 hpsa_unmap_sg_chain_block(h, cp);
edd16368
SC		 973
974 cmd->result = (DID_OK << 16); /* host byte */
975 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
5512672f 976 cmd->result |= ei->ScsiStatus;
edd16368
SC		 977
978 /* copy the sense data whether we need to or not. */
979 memcpy(cmd->sense_buffer, ei->SenseInfo,
980 ei->SenseLen > SCSI_SENSE_BUFFERSIZE ?
981 SCSI_SENSE_BUFFERSIZE :
982 ei->SenseLen);
983 scsi_set_resid(cmd, ei->ResidualCnt);
984
985 if (ei->CommandStatus == 0) {
986 cmd->scsi_done(cmd);
987 cmd_free(h, cp);
988 return;
989 }
990
991 /* an error has occurred */
992 switch (ei->CommandStatus) {
993
994 case CMD_TARGET_STATUS:
995 if (ei->ScsiStatus) {
996 /* Get sense key */
997 sense_key = 0xf & ei->SenseInfo[2];
998 /* Get additional sense code */
999 asc = ei->SenseInfo[12];
1000 /* Get addition sense code qualifier */
1001 ascq = ei->SenseInfo[13];
1002 }
1003
1004 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
1005 if (check_for_unit_attention(h, cp)) {
1006 cmd->result = DID_SOFT_ERROR << 16;
1007 break;
1008 }
1009 if (sense_key == ILLEGAL_REQUEST) {
1010 /*
1011 * SCSI REPORT_LUNS is commonly unsupported on
1012 * Smart Array. Suppress noisy complaint.
1013 */
1014 if (cp->Request.CDB[0] == REPORT_LUNS)
1015 break;
1016
1017 /* If ASC/ASCQ indicate Logical Unit
1018 * Not Supported condition,
1019 */
1020 if ((asc == 0x25) && (ascq == 0x0)) {
1021 dev_warn(&h->pdev->dev, "cp %p "
1022 "has check condition\n", cp);
1023 break;
1024 }
1025 }
1026
1027 if (sense_key == NOT_READY) {
1028 /* If Sense is Not Ready, Logical Unit
1029 * Not ready, Manual Intervention
1030 * required
1031 */
1032 if ((asc == 0x04) && (ascq == 0x03)) {
edd16368
SC		 1033 dev_warn(&h->pdev->dev, "cp %p "
1034 "has check condition: unit "
1035 "not ready, manual "
1036 "intervention required\n", cp);
1037 break;
1038 }
1039 }
1d3b3609
MG		 1040 if (sense_key == ABORTED_COMMAND) {
1041 /* Aborted command is retryable */
1042 dev_warn(&h->pdev->dev, "cp %p "
1043 "has check condition: aborted command: "
1044 "ASC: 0x%x, ASCQ: 0x%x\n",
1045 cp, asc, ascq);
1046 cmd->result = DID_SOFT_ERROR << 16;
1047 break;
1048 }
edd16368
SC		 1049 /* Must be some other type of check condition */
1050 dev_warn(&h->pdev->dev, "cp %p has check condition: "
1051 "unknown type: "
1052 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1053 "Returning result: 0x%x, "
1054 "cmd=[%02x %02x %02x %02x %02x "
807be732 1055 "%02x %02x %02x %02x %02x %02x "
edd16368
SC		 1056 "%02x %02x %02x %02x %02x]\n",
1057 cp, sense_key, asc, ascq,
1058 cmd->result,
1059 cmd->cmnd[0], cmd->cmnd[1],
1060 cmd->cmnd[2], cmd->cmnd[3],
1061 cmd->cmnd[4], cmd->cmnd[5],
1062 cmd->cmnd[6], cmd->cmnd[7],
807be732
MM		 1063 cmd->cmnd[8], cmd->cmnd[9],
1064 cmd->cmnd[10], cmd->cmnd[11],
1065 cmd->cmnd[12], cmd->cmnd[13],
1066 cmd->cmnd[14], cmd->cmnd[15]);
edd16368
SC		 1067 break;
1068 }
1069
1070
1071 /* Problem was not a check condition
1072 * Pass it up to the upper layers...
1073 */
1074 if (ei->ScsiStatus) {
1075 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
1076 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1077 "Returning result: 0x%x\n",
1078 cp, ei->ScsiStatus,
1079 sense_key, asc, ascq,
1080 cmd->result);
1081 } else { /* scsi status is zero??? How??? */
1082 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
1083 "Returning no connection.\n", cp),
1084
1085 /* Ordinarily, this case should never happen,
1086 * but there is a bug in some released firmware
1087 * revisions that allows it to happen if, for
1088 * example, a 4100 backplane loses power and
1089 * the tape drive is in it. We assume that
1090 * it's a fatal error of some kind because we
1091 * can't show that it wasn't. We will make it
1092 * look like selection timeout since that is
1093 * the most common reason for this to occur,
1094 * and it's severe enough.
1095 */
1096
1097 cmd->result = DID_NO_CONNECT << 16;
1098 }
1099 break;
1100
1101 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1102 break;
1103 case CMD_DATA_OVERRUN:
1104 dev_warn(&h->pdev->dev, "cp %p has"
1105 " completed with data overrun "
1106 "reported\n", cp);
1107 break;
1108 case CMD_INVALID: {
1109 /* print_bytes(cp, sizeof(*cp), 1, 0);
1110 print_cmd(cp); */
1111 /* We get CMD_INVALID if you address a non-existent device
1112 * instead of a selection timeout (no response). You will
1113 * see this if you yank out a drive, then try to access it.
1114 * This is kind of a shame because it means that any other
1115 * CMD_INVALID (e.g. driver bug) will get interpreted as a
1116 * missing target. */
1117 cmd->result = DID_NO_CONNECT << 16;
1118 }
1119 break;
1120 case CMD_PROTOCOL_ERR:
1121 dev_warn(&h->pdev->dev, "cp %p has "
1122 "protocol error \n", cp);
1123 break;
1124 case CMD_HARDWARE_ERR:
1125 cmd->result = DID_ERROR << 16;
1126 dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
1127 break;
1128 case CMD_CONNECTION_LOST:
1129 cmd->result = DID_ERROR << 16;
1130 dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
1131 break;
1132 case CMD_ABORTED:
1133 cmd->result = DID_ABORT << 16;
1134 dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
1135 cp, ei->ScsiStatus);
1136 break;
1137 case CMD_ABORT_FAILED:
1138 cmd->result = DID_ERROR << 16;
1139 dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
1140 break;
1141 case CMD_UNSOLICITED_ABORT:
5f0325ab 1142 cmd->result = DID_RESET << 16;
edd16368
SC		 1143 dev_warn(&h->pdev->dev, "cp %p aborted do to an unsolicited "
1144 "abort\n", cp);
1145 break;
1146 case CMD_TIMEOUT:
1147 cmd->result = DID_TIME_OUT << 16;
1148 dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
1149 break;
1150 default:
1151 cmd->result = DID_ERROR << 16;
1152 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
1153 cp, ei->CommandStatus);
1154 }
1155 cmd->scsi_done(cmd);
1156 cmd_free(h, cp);
1157}
1158
1159static int hpsa_scsi_detect(struct ctlr_info *h)
1160{
1161 struct Scsi_Host *sh;
1162 int error;
1163
1164 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
1165 if (sh == NULL)
1166 goto fail;
1167
1168 sh->io_port = 0;
1169 sh->n_io_port = 0;
1170 sh->this_id = -1;
1171 sh->max_channel = 3;
1172 sh->max_cmd_len = MAX_COMMAND_SIZE;
1173 sh->max_lun = HPSA_MAX_LUN;
1174 sh->max_id = HPSA_MAX_LUN;
303932fd
DB		 1175 sh->can_queue = h->nr_cmds;
1176 sh->cmd_per_lun = h->nr_cmds;
33a2ffce 1177 sh->sg_tablesize = h->maxsgentries;
edd16368
SC		 1178 h->scsi_host = sh;
1179 sh->hostdata[0] = (unsigned long) h;
303932fd 1180 sh->irq = h->intr[PERF_MODE_INT];
edd16368
SC		 1181 sh->unique_id = sh->irq;
1182 error = scsi_add_host(sh, &h->pdev->dev);
1183 if (error)
1184 goto fail_host_put;
1185 scsi_scan_host(sh);
1186 return 0;
1187
1188 fail_host_put:
1189 dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_add_host"
1190 " failed for controller %d\n", h->ctlr);
1191 scsi_host_put(sh);
ecd9aad4 1192 return error;
edd16368
SC		 1193 fail:
1194 dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_host_alloc"
1195 " failed for controller %d\n", h->ctlr);
ecd9aad4 1196 return -ENOMEM;
edd16368
SC		 1197}
1198
1199static void hpsa_pci_unmap(struct pci_dev *pdev,
1200 struct CommandList *c, int sg_used, int data_direction)
1201{
1202 int i;
1203 union u64bit addr64;
1204
1205 for (i = 0; i < sg_used; i++) {
1206 addr64.val32.lower = c->SG[i].Addr.lower;
1207 addr64.val32.upper = c->SG[i].Addr.upper;
1208 pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
1209 data_direction);
1210 }
1211}
1212
1213static void hpsa_map_one(struct pci_dev *pdev,
1214 struct CommandList *cp,
1215 unsigned char *buf,
1216 size_t buflen,
1217 int data_direction)
1218{
01a02ffc 1219 u64 addr64;
edd16368
SC		 1220
1221 if (buflen == 0 || data_direction == PCI_DMA_NONE) {
1222 cp->Header.SGList = 0;
1223 cp->Header.SGTotal = 0;
1224 return;
1225 }
1226
01a02ffc 1227 addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
edd16368 1228 cp->SG[0].Addr.lower =
01a02ffc 1229 (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
edd16368 1230 cp->SG[0].Addr.upper =
01a02ffc 1231 (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
edd16368 1232 cp->SG[0].Len = buflen;
01a02ffc
SC		 1233 cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
1234 cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
edd16368
SC		 1235}
1236
1237static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
1238 struct CommandList *c)
1239{
1240 DECLARE_COMPLETION_ONSTACK(wait);
1241
1242 c->waiting = &wait;
1243 enqueue_cmd_and_start_io(h, c);
1244 wait_for_completion(&wait);
1245}
1246
1247static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
1248 struct CommandList *c, int data_direction)
1249{
1250 int retry_count = 0;
1251
1252 do {
1253 memset(c->err_info, 0, sizeof(c->err_info));
1254 hpsa_scsi_do_simple_cmd_core(h, c);
1255 retry_count++;
1256 } while (check_for_unit_attention(h, c) && retry_count <= 3);
1257 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
1258}
1259
1260static void hpsa_scsi_interpret_error(struct CommandList *cp)
1261{
1262 struct ErrorInfo *ei;
1263 struct device *d = &cp->h->pdev->dev;
1264
1265 ei = cp->err_info;
1266 switch (ei->CommandStatus) {
1267 case CMD_TARGET_STATUS:
1268 dev_warn(d, "cmd %p has completed with errors\n", cp);
1269 dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
1270 ei->ScsiStatus);
1271 if (ei->ScsiStatus == 0)
1272 dev_warn(d, "SCSI status is abnormally zero. "
1273 "(probably indicates selection timeout "
1274 "reported incorrectly due to a known "
1275 "firmware bug, circa July, 2001.)\n");
1276 break;
1277 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1278 dev_info(d, "UNDERRUN\n");
1279 break;
1280 case CMD_DATA_OVERRUN:
1281 dev_warn(d, "cp %p has completed with data overrun\n", cp);
1282 break;
1283 case CMD_INVALID: {
1284 /* controller unfortunately reports SCSI passthru's
1285 * to non-existent targets as invalid commands.
1286 */
1287 dev_warn(d, "cp %p is reported invalid (probably means "
1288 "target device no longer present)\n", cp);
1289 /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
1290 print_cmd(cp); */
1291 }
1292 break;
1293 case CMD_PROTOCOL_ERR:
1294 dev_warn(d, "cp %p has protocol error \n", cp);
1295 break;
1296 case CMD_HARDWARE_ERR:
1297 /* cmd->result = DID_ERROR << 16; */
1298 dev_warn(d, "cp %p had hardware error\n", cp);
1299 break;
1300 case CMD_CONNECTION_LOST:
1301 dev_warn(d, "cp %p had connection lost\n", cp);
1302 break;
1303 case CMD_ABORTED:
1304 dev_warn(d, "cp %p was aborted\n", cp);
1305 break;
1306 case CMD_ABORT_FAILED:
1307 dev_warn(d, "cp %p reports abort failed\n", cp);
1308 break;
1309 case CMD_UNSOLICITED_ABORT:
1310 dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
1311 break;
1312 case CMD_TIMEOUT:
1313 dev_warn(d, "cp %p timed out\n", cp);
1314 break;
1315 default:
1316 dev_warn(d, "cp %p returned unknown status %x\n", cp,
1317 ei->CommandStatus);
1318 }
1319}
1320
1321static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
1322 unsigned char page, unsigned char *buf,
1323 unsigned char bufsize)
1324{
1325 int rc = IO_OK;
1326 struct CommandList *c;
1327 struct ErrorInfo *ei;
1328
1329 c = cmd_special_alloc(h);
1330
1331 if (c == NULL) { /* trouble... */
1332 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
ecd9aad4 1333 return -ENOMEM;
edd16368
SC		 1334 }
1335
1336 fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
1337 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1338 ei = c->err_info;
1339 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
1340 hpsa_scsi_interpret_error(c);
1341 rc = -1;
1342 }
1343 cmd_special_free(h, c);
1344 return rc;
1345}
1346
1347static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
1348{
1349 int rc = IO_OK;
1350 struct CommandList *c;
1351 struct ErrorInfo *ei;
1352
1353 c = cmd_special_alloc(h);
1354
1355 if (c == NULL) { /* trouble... */
1356 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
e9ea04a6 1357 return -ENOMEM;
edd16368
SC		 1358 }
1359
1360 fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
1361 hpsa_scsi_do_simple_cmd_core(h, c);
1362 /* no unmap needed here because no data xfer. */
1363
1364 ei = c->err_info;
1365 if (ei->CommandStatus != 0) {
1366 hpsa_scsi_interpret_error(c);
1367 rc = -1;
1368 }
1369 cmd_special_free(h, c);
1370 return rc;
1371}
1372
1373static void hpsa_get_raid_level(struct ctlr_info *h,
1374 unsigned char *scsi3addr, unsigned char *raid_level)
1375{
1376 int rc;
1377 unsigned char *buf;
1378
1379 *raid_level = RAID_UNKNOWN;
1380 buf = kzalloc(64, GFP_KERNEL);
1381 if (!buf)
1382 return;
1383 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
1384 if (rc == 0)
1385 *raid_level = buf[8];
1386 if (*raid_level > RAID_UNKNOWN)
1387 *raid_level = RAID_UNKNOWN;
1388 kfree(buf);
1389 return;
1390}
1391
1392/* Get the device id from inquiry page 0x83 */
1393static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
1394 unsigned char *device_id, int buflen)
1395{
1396 int rc;
1397 unsigned char *buf;
1398
1399 if (buflen > 16)
1400 buflen = 16;
1401 buf = kzalloc(64, GFP_KERNEL);
1402 if (!buf)
1403 return -1;
1404 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
1405 if (rc == 0)
1406 memcpy(device_id, &buf[8], buflen);
1407 kfree(buf);
1408 return rc != 0;
1409}
1410
1411static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
1412 struct ReportLUNdata *buf, int bufsize,
1413 int extended_response)
1414{
1415 int rc = IO_OK;
1416 struct CommandList *c;
1417 unsigned char scsi3addr[8];
1418 struct ErrorInfo *ei;
1419
1420 c = cmd_special_alloc(h);
1421 if (c == NULL) { /* trouble... */
1422 dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1423 return -1;
1424 }
e89c0ae7
SC		 1425 /* address the controller */
1426 memset(scsi3addr, 0, sizeof(scsi3addr));
edd16368
SC		 1427 fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
1428 buf, bufsize, 0, scsi3addr, TYPE_CMD);
1429 if (extended_response)
1430 c->Request.CDB[1] = extended_response;
1431 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1432 ei = c->err_info;
1433 if (ei->CommandStatus != 0 &&
1434 ei->CommandStatus != CMD_DATA_UNDERRUN) {
1435 hpsa_scsi_interpret_error(c);
1436 rc = -1;
1437 }
1438 cmd_special_free(h, c);
1439 return rc;
1440}
1441
1442static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
1443 struct ReportLUNdata *buf,
1444 int bufsize, int extended_response)
1445{
1446 return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
1447}
1448
1449static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
1450 struct ReportLUNdata *buf, int bufsize)
1451{
1452 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
1453}
1454
1455static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
1456 int bus, int target, int lun)
1457{
1458 device->bus = bus;
1459 device->target = target;
1460 device->lun = lun;
1461}
1462
1463static int hpsa_update_device_info(struct ctlr_info *h,
1464 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device)
1465{
1466#define OBDR_TAPE_INQ_SIZE 49
ea6d3bc3 1467 unsigned char *inq_buff;
edd16368 1468
ea6d3bc3 1469 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
edd16368
SC		 1470 if (!inq_buff)
1471 goto bail_out;
1472
edd16368
SC		 1473 /* Do an inquiry to the device to see what it is. */
1474 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
1475 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
1476 /* Inquiry failed (msg printed already) */
1477 dev_err(&h->pdev->dev,
1478 "hpsa_update_device_info: inquiry failed\n");
1479 goto bail_out;
1480 }
1481
edd16368
SC		 1482 this_device->devtype = (inq_buff[0] & 0x1f);
1483 memcpy(this_device->scsi3addr, scsi3addr, 8);
1484 memcpy(this_device->vendor, &inq_buff[8],
1485 sizeof(this_device->vendor));
1486 memcpy(this_device->model, &inq_buff[16],
1487 sizeof(this_device->model));
1488 memcpy(this_device->revision, &inq_buff[32],
1489 sizeof(this_device->revision));
1490 memset(this_device->device_id, 0,
1491 sizeof(this_device->device_id));
1492 hpsa_get_device_id(h, scsi3addr, this_device->device_id,
1493 sizeof(this_device->device_id));
1494
1495 if (this_device->devtype == TYPE_DISK &&
1496 is_logical_dev_addr_mode(scsi3addr))
1497 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
1498 else
1499 this_device->raid_level = RAID_UNKNOWN;
1500
1501 kfree(inq_buff);
1502 return 0;
1503
1504bail_out:
1505 kfree(inq_buff);
1506 return 1;
1507}
1508
1509static unsigned char *msa2xxx_model[] = {
1510 "MSA2012",
1511 "MSA2024",
1512 "MSA2312",
1513 "MSA2324",
1514 NULL,
1515};
1516
1517static int is_msa2xxx(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1518{
1519 int i;
1520
1521 for (i = 0; msa2xxx_model[i]; i++)
1522 if (strncmp(device->model, msa2xxx_model[i],
1523 strlen(msa2xxx_model[i])) == 0)
1524 return 1;
1525 return 0;
1526}
1527
1528/* Helper function to assign bus, target, lun mapping of devices.
1529 * Puts non-msa2xxx logical volumes on bus 0, msa2xxx logical
1530 * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
1531 * Logical drive target and lun are assigned at this time, but
1532 * physical device lun and target assignment are deferred (assigned
1533 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
1534 */
1535static void figure_bus_target_lun(struct ctlr_info *h,
01a02ffc 1536 u8 *lunaddrbytes, int *bus, int *target, int *lun,
edd16368
SC		 1537 struct hpsa_scsi_dev_t *device)
1538{
01a02ffc 1539 u32 lunid;
edd16368
SC		 1540
1541 if (is_logical_dev_addr_mode(lunaddrbytes)) {
1542 /* logical device */
339b2b14
SC		 1543 if (unlikely(is_scsi_rev_5(h))) {
1544 /* p1210m, logical drives lun assignments
1545 * match SCSI REPORT LUNS data.
1546 */
1547 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
edd16368 1548 *bus = 0;
339b2b14
SC		 1549 *target = 0;
1550 *lun = (lunid & 0x3fff) + 1;
1551 } else {
1552 /* not p1210m... */
1553 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
1554 if (is_msa2xxx(h, device)) {
1555 /* msa2xxx way, put logicals on bus 1
1556 * and match target/lun numbers box
1557 * reports.
1558 */
1559 *bus = 1;
1560 *target = (lunid >> 16) & 0x3fff;
1561 *lun = lunid & 0x00ff;
1562 } else {
1563 /* Traditional smart array way. */
1564 *bus = 0;
1565 *lun = 0;
1566 *target = lunid & 0x3fff;
1567 }
edd16368
SC		 1568 }
1569 } else {
1570 /* physical device */
1571 if (is_hba_lunid(lunaddrbytes))
339b2b14
SC		 1572 if (unlikely(is_scsi_rev_5(h))) {
1573 *bus = 0; /* put p1210m ctlr at 0,0,0 */
1574 *target = 0;
1575 *lun = 0;
1576 return;
1577 } else
1578 *bus = 3; /* traditional smartarray */
edd16368 1579 else
339b2b14 1580 *bus = 2; /* physical disk */
edd16368
SC		 1581 *target = -1;
1582 *lun = -1; /* we will fill these in later. */
1583 }
1584}
1585
1586/*
1587 * If there is no lun 0 on a target, linux won't find any devices.
1588 * For the MSA2xxx boxes, we have to manually detect the enclosure
1589 * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
1590 * it for some reason. *tmpdevice is the target we're adding,
1591 * this_device is a pointer into the current element of currentsd[]
1592 * that we're building up in update_scsi_devices(), below.
1593 * lunzerobits is a bitmap that tracks which targets already have a
1594 * lun 0 assigned.
1595 * Returns 1 if an enclosure was added, 0 if not.
1596 */
1597static int add_msa2xxx_enclosure_device(struct ctlr_info *h,
1598 struct hpsa_scsi_dev_t *tmpdevice,
01a02ffc 1599 struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
edd16368
SC		 1600 int bus, int target, int lun, unsigned long lunzerobits[],
1601 int *nmsa2xxx_enclosures)
1602{
1603 unsigned char scsi3addr[8];
1604
1605 if (test_bit(target, lunzerobits))
1606 return 0; /* There is already a lun 0 on this target. */
1607
1608 if (!is_logical_dev_addr_mode(lunaddrbytes))
1609 return 0; /* It's the logical targets that may lack lun 0. */
1610
1611 if (!is_msa2xxx(h, tmpdevice))
1612 return 0; /* It's only the MSA2xxx that have this problem. */
1613
1614 if (lun == 0) /* if lun is 0, then obviously we have a lun 0. */
1615 return 0;
1616
1617 if (is_hba_lunid(scsi3addr))
1618 return 0; /* Don't add the RAID controller here. */
1619
339b2b14
SC		 1620 if (is_scsi_rev_5(h))
1621 return 0; /* p1210m doesn't need to do this. */
1622
edd16368
SC		 1623#define MAX_MSA2XXX_ENCLOSURES 32
1624 if (*nmsa2xxx_enclosures >= MAX_MSA2XXX_ENCLOSURES) {
1625 dev_warn(&h->pdev->dev, "Maximum number of MSA2XXX "
1626 "enclosures exceeded. Check your hardware "
1627 "configuration.");
1628 return 0;
1629 }
1630
1631 memset(scsi3addr, 0, 8);
1632 scsi3addr[3] = target;
1633 if (hpsa_update_device_info(h, scsi3addr, this_device))
1634 return 0;
1635 (*nmsa2xxx_enclosures)++;
1636 hpsa_set_bus_target_lun(this_device, bus, target, 0);
1637 set_bit(target, lunzerobits);
1638 return 1;
1639}
1640
1641/*
1642 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
1643 * logdev. The number of luns in physdev and logdev are returned in
1644 * *nphysicals and *nlogicals, respectively.
1645 * Returns 0 on success, -1 otherwise.
1646 */
1647static int hpsa_gather_lun_info(struct ctlr_info *h,
1648 int reportlunsize,
01a02ffc
SC		 1649 struct ReportLUNdata *physdev, u32 *nphysicals,
1650 struct ReportLUNdata *logdev, u32 *nlogicals)
edd16368
SC		 1651{
1652 if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
1653 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
1654 return -1;
1655 }
6df1e954 1656 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
edd16368
SC		 1657 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
1658 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
1659 " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1660 *nphysicals - HPSA_MAX_PHYS_LUN);
1661 *nphysicals = HPSA_MAX_PHYS_LUN;
1662 }
1663 if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
1664 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
1665 return -1;
1666 }
6df1e954 1667 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
edd16368
SC		 1668 /* Reject Logicals in excess of our max capability. */
1669 if (*nlogicals > HPSA_MAX_LUN) {
1670 dev_warn(&h->pdev->dev,
1671 "maximum logical LUNs (%d) exceeded. "
1672 "%d LUNs ignored.\n", HPSA_MAX_LUN,
1673 *nlogicals - HPSA_MAX_LUN);
1674 *nlogicals = HPSA_MAX_LUN;
1675 }
1676 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
1677 dev_warn(&h->pdev->dev,
1678 "maximum logical + physical LUNs (%d) exceeded. "
1679 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1680 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
1681 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
1682 }
1683 return 0;
1684}
1685
339b2b14
SC		 1686u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
1687 int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
1688 struct ReportLUNdata *logdev_list)
1689{
1690 /* Helper function, figure out where the LUN ID info is coming from
1691 * given index i, lists of physical and logical devices, where in
1692 * the list the raid controller is supposed to appear (first or last)
1693 */
1694
1695 int logicals_start = nphysicals + (raid_ctlr_position == 0);
1696 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
1697
1698 if (i == raid_ctlr_position)
1699 return RAID_CTLR_LUNID;
1700
1701 if (i < logicals_start)
1702 return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
1703
1704 if (i < last_device)
1705 return &logdev_list->LUN[i - nphysicals -
1706 (raid_ctlr_position == 0)][0];
1707 BUG();
1708 return NULL;
1709}
1710
edd16368
SC		 1711static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
1712{
1713 /* the idea here is we could get notified
1714 * that some devices have changed, so we do a report
1715 * physical luns and report logical luns cmd, and adjust
1716 * our list of devices accordingly.
1717 *
1718 * The scsi3addr's of devices won't change so long as the
1719 * adapter is not reset. That means we can rescan and
1720 * tell which devices we already know about, vs. new
1721 * devices, vs. disappearing devices.
1722 */
1723 struct ReportLUNdata *physdev_list = NULL;
1724 struct ReportLUNdata *logdev_list = NULL;
1725 unsigned char *inq_buff = NULL;
01a02ffc
SC		 1726 u32 nphysicals = 0;
1727 u32 nlogicals = 0;
1728 u32 ndev_allocated = 0;
edd16368
SC		 1729 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
1730 int ncurrent = 0;
1731 int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
1732 int i, nmsa2xxx_enclosures, ndevs_to_allocate;
1733 int bus, target, lun;
339b2b14 1734 int raid_ctlr_position;
edd16368
SC		 1735 DECLARE_BITMAP(lunzerobits, HPSA_MAX_TARGETS_PER_CTLR);
1736
1737 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_SCSI_DEVS_PER_HBA,
1738 GFP_KERNEL);
1739 physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
1740 logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
1741 inq_buff = kmalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
1742 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
1743
1744 if (!currentsd || !physdev_list || !logdev_list ||
1745 !inq_buff || !tmpdevice) {
1746 dev_err(&h->pdev->dev, "out of memory\n");
1747 goto out;
1748 }
1749 memset(lunzerobits, 0, sizeof(lunzerobits));
1750
1751 if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
1752 logdev_list, &nlogicals))
1753 goto out;
1754
1755 /* We might see up to 32 MSA2xxx enclosures, actually 8 of them
1756 * but each of them 4 times through different paths. The plus 1
1757 * is for the RAID controller.
1758 */
1759 ndevs_to_allocate = nphysicals + nlogicals + MAX_MSA2XXX_ENCLOSURES + 1;
1760
1761 /* Allocate the per device structures */
1762 for (i = 0; i < ndevs_to_allocate; i++) {
1763 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
1764 if (!currentsd[i]) {
1765 dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
1766 __FILE__, __LINE__);
1767 goto out;
1768 }
1769 ndev_allocated++;
1770 }
1771
339b2b14
SC		 1772 if (unlikely(is_scsi_rev_5(h)))
1773 raid_ctlr_position = 0;
1774 else
1775 raid_ctlr_position = nphysicals + nlogicals;
1776
edd16368
SC		 1777 /* adjust our table of devices */
1778 nmsa2xxx_enclosures = 0;
1779 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
01a02ffc 1780 u8 *lunaddrbytes;
edd16368
SC		 1781
1782 /* Figure out where the LUN ID info is coming from */
339b2b14
SC		 1783 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
1784 i, nphysicals, nlogicals, physdev_list, logdev_list);
edd16368 1785 /* skip masked physical devices. */
339b2b14
SC		 1786 if (lunaddrbytes[3] & 0xC0 &&
1787 i < nphysicals + (raid_ctlr_position == 0))
edd16368
SC		 1788 continue;
1789
1790 /* Get device type, vendor, model, device id */
1791 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice))
1792 continue; /* skip it if we can't talk to it. */
1793 figure_bus_target_lun(h, lunaddrbytes, &bus, &target, &lun,
1794 tmpdevice);
1795 this_device = currentsd[ncurrent];
1796
1797 /*
1798 * For the msa2xxx boxes, we have to insert a LUN 0 which
1799 * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
1800 * is nonetheless an enclosure device there. We have to
1801 * present that otherwise linux won't find anything if
1802 * there is no lun 0.
1803 */
1804 if (add_msa2xxx_enclosure_device(h, tmpdevice, this_device,
1805 lunaddrbytes, bus, target, lun, lunzerobits,
1806 &nmsa2xxx_enclosures)) {
1807 ncurrent++;
1808 this_device = currentsd[ncurrent];
1809 }
1810
1811 *this_device = *tmpdevice;
1812 hpsa_set_bus_target_lun(this_device, bus, target, lun);
1813
1814 switch (this_device->devtype) {
1815 case TYPE_ROM: {
1816 /* We don't *really* support actual CD-ROM devices,
1817 * just "One Button Disaster Recovery" tape drive
1818 * which temporarily pretends to be a CD-ROM drive.
1819 * So we check that the device is really an OBDR tape
1820 * device by checking for "$DR-10" in bytes 43-48 of
1821 * the inquiry data.
1822 */
1823 char obdr_sig[7];
1824#define OBDR_TAPE_SIG "$DR-10"
1825 strncpy(obdr_sig, &inq_buff[43], 6);
1826 obdr_sig[6] = '\0';
1827 if (strncmp(obdr_sig, OBDR_TAPE_SIG, 6) != 0)
1828 /* Not OBDR device, ignore it. */
1829 break;
1830 }
1831 ncurrent++;
1832 break;
1833 case TYPE_DISK:
1834 if (i < nphysicals)
1835 break;
1836 ncurrent++;
1837 break;
1838 case TYPE_TAPE:
1839 case TYPE_MEDIUM_CHANGER:
1840 ncurrent++;
1841 break;
1842 case TYPE_RAID:
1843 /* Only present the Smartarray HBA as a RAID controller.
1844 * If it's a RAID controller other than the HBA itself
1845 * (an external RAID controller, MSA500 or similar)
1846 * don't present it.
1847 */
1848 if (!is_hba_lunid(lunaddrbytes))
1849 break;
1850 ncurrent++;
1851 break;
1852 default:
1853 break;
1854 }
1855 if (ncurrent >= HPSA_MAX_SCSI_DEVS_PER_HBA)
1856 break;
1857 }
1858 adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
1859out:
1860 kfree(tmpdevice);
1861 for (i = 0; i < ndev_allocated; i++)
1862 kfree(currentsd[i]);
1863 kfree(currentsd);
1864 kfree(inq_buff);
1865 kfree(physdev_list);
1866 kfree(logdev_list);
edd16368
SC		 1867}
1868
1869/* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
1870 * dma mapping and fills in the scatter gather entries of the
1871 * hpsa command, cp.
1872 */
33a2ffce 1873static int hpsa_scatter_gather(struct ctlr_info *h,
edd16368
SC		 1874 struct CommandList *cp,
1875 struct scsi_cmnd *cmd)
1876{
1877 unsigned int len;
1878 struct scatterlist *sg;
01a02ffc 1879 u64 addr64;
33a2ffce
SC		 1880 int use_sg, i, sg_index, chained;
1881 struct SGDescriptor *curr_sg;
edd16368 1882
33a2ffce 1883 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
edd16368
SC		 1884
1885 use_sg = scsi_dma_map(cmd);
1886 if (use_sg < 0)
1887 return use_sg;
1888
1889 if (!use_sg)
1890 goto sglist_finished;
1891
33a2ffce
SC		 1892 curr_sg = cp->SG;
1893 chained = 0;
1894 sg_index = 0;
edd16368 1895 scsi_for_each_sg(cmd, sg, use_sg, i) {
33a2ffce
SC		 1896 if (i == h->max_cmd_sg_entries - 1 &&
1897 use_sg > h->max_cmd_sg_entries) {
1898 chained = 1;
1899 curr_sg = h->cmd_sg_list[cp->cmdindex];
1900 sg_index = 0;
1901 }
01a02ffc 1902 addr64 = (u64) sg_dma_address(sg);
edd16368 1903 len = sg_dma_len(sg);
33a2ffce
SC		 1904 curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
1905 curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
1906 curr_sg->Len = len;
1907 curr_sg->Ext = 0; /* we are not chaining */
1908 curr_sg++;
1909 }
1910
1911 if (use_sg + chained > h->maxSG)
1912 h->maxSG = use_sg + chained;
1913
1914 if (chained) {
1915 cp->Header.SGList = h->max_cmd_sg_entries;
1916 cp->Header.SGTotal = (u16) (use_sg + 1);
1917 hpsa_map_sg_chain_block(h, cp);
1918 return 0;
edd16368
SC		 1919 }
1920
1921sglist_finished:
1922
01a02ffc
SC		 1923 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
1924 cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
edd16368
SC		 1925 return 0;
1926}
1927
1928
1929static int hpsa_scsi_queue_command(struct scsi_cmnd *cmd,
1930 void (*done)(struct scsi_cmnd *))
1931{
1932 struct ctlr_info *h;
1933 struct hpsa_scsi_dev_t *dev;
1934 unsigned char scsi3addr[8];
1935 struct CommandList *c;
1936 unsigned long flags;
1937
1938 /* Get the ptr to our adapter structure out of cmd->host. */
1939 h = sdev_to_hba(cmd->device);
1940 dev = cmd->device->hostdata;
1941 if (!dev) {
1942 cmd->result = DID_NO_CONNECT << 16;
1943 done(cmd);
1944 return 0;
1945 }
1946 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
1947
1948 /* Need a lock as this is being allocated from the pool */
1949 spin_lock_irqsave(&h->lock, flags);
1950 c = cmd_alloc(h);
1951 spin_unlock_irqrestore(&h->lock, flags);
1952 if (c == NULL) { /* trouble... */
1953 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
1954 return SCSI_MLQUEUE_HOST_BUSY;
1955 }
1956
1957 /* Fill in the command list header */
1958
1959 cmd->scsi_done = done; /* save this for use by completion code */
1960
1961 /* save c in case we have to abort it */
1962 cmd->host_scribble = (unsigned char *) c;
1963
1964 c->cmd_type = CMD_SCSI;
1965 c->scsi_cmd = cmd;
1966 c->Header.ReplyQueue = 0; /* unused in simple mode */
1967 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
303932fd
DB		 1968 c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
1969 c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
edd16368
SC		 1970
1971 /* Fill in the request block... */
1972
1973 c->Request.Timeout = 0;
1974 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
1975 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
1976 c->Request.CDBLen = cmd->cmd_len;
1977 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
1978 c->Request.Type.Type = TYPE_CMD;
1979 c->Request.Type.Attribute = ATTR_SIMPLE;
1980 switch (cmd->sc_data_direction) {
1981 case DMA_TO_DEVICE:
1982 c->Request.Type.Direction = XFER_WRITE;
1983 break;
1984 case DMA_FROM_DEVICE:
1985 c->Request.Type.Direction = XFER_READ;
1986 break;
1987 case DMA_NONE:
1988 c->Request.Type.Direction = XFER_NONE;
1989 break;
1990 case DMA_BIDIRECTIONAL:
1991 /* This can happen if a buggy application does a scsi passthru
1992 * and sets both inlen and outlen to non-zero. ( see
1993 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
1994 */
1995
1996 c->Request.Type.Direction = XFER_RSVD;
1997 /* This is technically wrong, and hpsa controllers should
1998 * reject it with CMD_INVALID, which is the most correct
1999 * response, but non-fibre backends appear to let it
2000 * slide by, and give the same results as if this field
2001 * were set correctly. Either way is acceptable for
2002 * our purposes here.
2003 */
2004
2005 break;
2006
2007 default:
2008 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
2009 cmd->sc_data_direction);
2010 BUG();
2011 break;
2012 }
2013
33a2ffce 2014 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
edd16368
SC		 2015 cmd_free(h, c);
2016 return SCSI_MLQUEUE_HOST_BUSY;
2017 }
2018 enqueue_cmd_and_start_io(h, c);
2019 /* the cmd'll come back via intr handler in complete_scsi_command() */
2020 return 0;
2021}
2022
a08a8471
SC		 2023static void hpsa_scan_start(struct Scsi_Host *sh)
2024{
2025 struct ctlr_info *h = shost_to_hba(sh);
2026 unsigned long flags;
2027
2028 /* wait until any scan already in progress is finished. */
2029 while (1) {
2030 spin_lock_irqsave(&h->scan_lock, flags);
2031 if (h->scan_finished)
2032 break;
2033 spin_unlock_irqrestore(&h->scan_lock, flags);
2034 wait_event(h->scan_wait_queue, h->scan_finished);
2035 /* Note: We don't need to worry about a race between this
2036 * thread and driver unload because the midlayer will
2037 * have incremented the reference count, so unload won't
2038 * happen if we're in here.
2039 */
2040 }
2041 h->scan_finished = 0; /* mark scan as in progress */
2042 spin_unlock_irqrestore(&h->scan_lock, flags);
2043
2044 hpsa_update_scsi_devices(h, h->scsi_host->host_no);
2045
2046 spin_lock_irqsave(&h->scan_lock, flags);
2047 h->scan_finished = 1; /* mark scan as finished. */
2048 wake_up_all(&h->scan_wait_queue);
2049 spin_unlock_irqrestore(&h->scan_lock, flags);
2050}
2051
2052static int hpsa_scan_finished(struct Scsi_Host *sh,
2053 unsigned long elapsed_time)
2054{
2055 struct ctlr_info *h = shost_to_hba(sh);
2056 unsigned long flags;
2057 int finished;
2058
2059 spin_lock_irqsave(&h->scan_lock, flags);
2060 finished = h->scan_finished;
2061 spin_unlock_irqrestore(&h->scan_lock, flags);
2062 return finished;
2063}
2064
667e23d4
SC		 2065static int hpsa_change_queue_depth(struct scsi_device *sdev,
2066 int qdepth, int reason)
2067{
2068 struct ctlr_info *h = sdev_to_hba(sdev);
2069
2070 if (reason != SCSI_QDEPTH_DEFAULT)
2071 return -ENOTSUPP;
2072
2073 if (qdepth < 1)
2074 qdepth = 1;
2075 else
2076 if (qdepth > h->nr_cmds)
2077 qdepth = h->nr_cmds;
2078 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
2079 return sdev->queue_depth;
2080}
2081
edd16368
SC		 2082static void hpsa_unregister_scsi(struct ctlr_info *h)
2083{
2084 /* we are being forcibly unloaded, and may not refuse. */
2085 scsi_remove_host(h->scsi_host);
2086 scsi_host_put(h->scsi_host);
2087 h->scsi_host = NULL;
2088}
2089
2090static int hpsa_register_scsi(struct ctlr_info *h)
2091{
2092 int rc;
2093
edd16368
SC		 2094 rc = hpsa_scsi_detect(h);
2095 if (rc != 0)
2096 dev_err(&h->pdev->dev, "hpsa_register_scsi: failed"
2097 " hpsa_scsi_detect(), rc is %d\n", rc);
2098 return rc;
2099}
2100
2101static int wait_for_device_to_become_ready(struct ctlr_info *h,
2102 unsigned char lunaddr[])
2103{
2104 int rc = 0;
2105 int count = 0;
2106 int waittime = 1; /* seconds */
2107 struct CommandList *c;
2108
2109 c = cmd_special_alloc(h);
2110 if (!c) {
2111 dev_warn(&h->pdev->dev, "out of memory in "
2112 "wait_for_device_to_become_ready.\n");
2113 return IO_ERROR;
2114 }
2115
2116 /* Send test unit ready until device ready, or give up. */
2117 while (count < HPSA_TUR_RETRY_LIMIT) {
2118
2119 /* Wait for a bit. do this first, because if we send
2120 * the TUR right away, the reset will just abort it.
2121 */
2122 msleep(1000 * waittime);
2123 count++;
2124
2125 /* Increase wait time with each try, up to a point. */
2126 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
2127 waittime = waittime * 2;
2128
2129 /* Send the Test Unit Ready */
2130 fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
2131 hpsa_scsi_do_simple_cmd_core(h, c);
2132 /* no unmap needed here because no data xfer. */
2133
2134 if (c->err_info->CommandStatus == CMD_SUCCESS)
2135 break;
2136
2137 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
2138 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
2139 (c->err_info->SenseInfo[2] == NO_SENSE ||
2140 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
2141 break;
2142
2143 dev_warn(&h->pdev->dev, "waiting %d secs "
2144 "for device to become ready.\n", waittime);
2145 rc = 1; /* device not ready. */
2146 }
2147
2148 if (rc)
2149 dev_warn(&h->pdev->dev, "giving up on device.\n");
2150 else
2151 dev_warn(&h->pdev->dev, "device is ready.\n");
2152
2153 cmd_special_free(h, c);
2154 return rc;
2155}
2156
2157/* Need at least one of these error handlers to keep ../scsi/hosts.c from
2158 * complaining. Doing a host- or bus-reset can't do anything good here.
2159 */
2160static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
2161{
2162 int rc;
2163 struct ctlr_info *h;
2164 struct hpsa_scsi_dev_t *dev;
2165
2166 /* find the controller to which the command to be aborted was sent */
2167 h = sdev_to_hba(scsicmd->device);
2168 if (h == NULL) /* paranoia */
2169 return FAILED;
edd16368
SC		 2170 dev = scsicmd->device->hostdata;
2171 if (!dev) {
2172 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
2173 "device lookup failed.\n");
2174 return FAILED;
2175 }
d416b0c7
SC		 2176 dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
2177 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
edd16368
SC		 2178 /* send a reset to the SCSI LUN which the command was sent to */
2179 rc = hpsa_send_reset(h, dev->scsi3addr);
2180 if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
2181 return SUCCESS;
2182
2183 dev_warn(&h->pdev->dev, "resetting device failed.\n");
2184 return FAILED;
2185}
2186
2187/*
2188 * For operations that cannot sleep, a command block is allocated at init,
2189 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
2190 * which ones are free or in use. Lock must be held when calling this.
2191 * cmd_free() is the complement.
2192 */
2193static struct CommandList *cmd_alloc(struct ctlr_info *h)
2194{
2195 struct CommandList *c;
2196 int i;
2197 union u64bit temp64;
2198 dma_addr_t cmd_dma_handle, err_dma_handle;
2199
2200 do {
2201 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
2202 if (i == h->nr_cmds)
2203 return NULL;
2204 } while (test_and_set_bit
2205 (i & (BITS_PER_LONG - 1),
2206 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
2207 c = h->cmd_pool + i;
2208 memset(c, 0, sizeof(*c));
2209 cmd_dma_handle = h->cmd_pool_dhandle
2210 + i * sizeof(*c);
2211 c->err_info = h->errinfo_pool + i;
2212 memset(c->err_info, 0, sizeof(*c->err_info));
2213 err_dma_handle = h->errinfo_pool_dhandle
2214 + i * sizeof(*c->err_info);
2215 h->nr_allocs++;
2216
2217 c->cmdindex = i;
2218
2219 INIT_HLIST_NODE(&c->list);
01a02ffc
SC		 2220 c->busaddr = (u32) cmd_dma_handle;
2221 temp64.val = (u64) err_dma_handle;
edd16368
SC		 2222 c->ErrDesc.Addr.lower = temp64.val32.lower;
2223 c->ErrDesc.Addr.upper = temp64.val32.upper;
2224 c->ErrDesc.Len = sizeof(*c->err_info);
2225
2226 c->h = h;
2227 return c;
2228}
2229
2230/* For operations that can wait for kmalloc to possibly sleep,
2231 * this routine can be called. Lock need not be held to call
2232 * cmd_special_alloc. cmd_special_free() is the complement.
2233 */
2234static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
2235{
2236 struct CommandList *c;
2237 union u64bit temp64;
2238 dma_addr_t cmd_dma_handle, err_dma_handle;
2239
2240 c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
2241 if (c == NULL)
2242 return NULL;
2243 memset(c, 0, sizeof(*c));
2244
2245 c->cmdindex = -1;
2246
2247 c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
2248 &err_dma_handle);
2249
2250 if (c->err_info == NULL) {
2251 pci_free_consistent(h->pdev,
2252 sizeof(*c), c, cmd_dma_handle);
2253 return NULL;
2254 }
2255 memset(c->err_info, 0, sizeof(*c->err_info));
2256
2257 INIT_HLIST_NODE(&c->list);
01a02ffc
SC		 2258 c->busaddr = (u32) cmd_dma_handle;
2259 temp64.val = (u64) err_dma_handle;
edd16368
SC		 2260 c->ErrDesc.Addr.lower = temp64.val32.lower;
2261 c->ErrDesc.Addr.upper = temp64.val32.upper;
2262 c->ErrDesc.Len = sizeof(*c->err_info);
2263
2264 c->h = h;
2265 return c;
2266}
2267
2268static void cmd_free(struct ctlr_info *h, struct CommandList *c)
2269{
2270 int i;
2271
2272 i = c - h->cmd_pool;
2273 clear_bit(i & (BITS_PER_LONG - 1),
2274 h->cmd_pool_bits + (i / BITS_PER_LONG));
2275 h->nr_frees++;
2276}
2277
2278static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
2279{
2280 union u64bit temp64;
2281
2282 temp64.val32.lower = c->ErrDesc.Addr.lower;
2283 temp64.val32.upper = c->ErrDesc.Addr.upper;
2284 pci_free_consistent(h->pdev, sizeof(*c->err_info),
2285 c->err_info, (dma_addr_t) temp64.val);
2286 pci_free_consistent(h->pdev, sizeof(*c),
2287 c, (dma_addr_t) c->busaddr);
2288}
2289
2290#ifdef CONFIG_COMPAT
2291
edd16368
SC		 2292static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
2293{
2294 IOCTL32_Command_struct __user *arg32 =
2295 (IOCTL32_Command_struct __user *) arg;
2296 IOCTL_Command_struct arg64;
2297 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
2298 int err;
2299 u32 cp;
2300
2301 err = 0;
2302 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2303 sizeof(arg64.LUN_info));
2304 err |= copy_from_user(&arg64.Request, &arg32->Request,
2305 sizeof(arg64.Request));
2306 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2307 sizeof(arg64.error_info));
2308 err |= get_user(arg64.buf_size, &arg32->buf_size);
2309 err |= get_user(cp, &arg32->buf);
2310 arg64.buf = compat_ptr(cp);
2311 err |= copy_to_user(p, &arg64, sizeof(arg64));
2312
2313 if (err)
2314 return -EFAULT;
2315
e39eeaed 2316 err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
edd16368
SC		 2317 if (err)
2318 return err;
2319 err |= copy_in_user(&arg32->error_info, &p->error_info,
2320 sizeof(arg32->error_info));
2321 if (err)
2322 return -EFAULT;
2323 return err;
2324}
2325
2326static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
2327 int cmd, void *arg)
2328{
2329 BIG_IOCTL32_Command_struct __user *arg32 =
2330 (BIG_IOCTL32_Command_struct __user *) arg;
2331 BIG_IOCTL_Command_struct arg64;
2332 BIG_IOCTL_Command_struct __user *p =
2333 compat_alloc_user_space(sizeof(arg64));
2334 int err;
2335 u32 cp;
2336
2337 err = 0;
2338 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2339 sizeof(arg64.LUN_info));
2340 err |= copy_from_user(&arg64.Request, &arg32->Request,
2341 sizeof(arg64.Request));
2342 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2343 sizeof(arg64.error_info));
2344 err |= get_user(arg64.buf_size, &arg32->buf_size);
2345 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
2346 err |= get_user(cp, &arg32->buf);
2347 arg64.buf = compat_ptr(cp);
2348 err |= copy_to_user(p, &arg64, sizeof(arg64));
2349
2350 if (err)
2351 return -EFAULT;
2352
e39eeaed 2353 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
edd16368
SC		 2354 if (err)
2355 return err;
2356 err |= copy_in_user(&arg32->error_info, &p->error_info,
2357 sizeof(arg32->error_info));
2358 if (err)
2359 return -EFAULT;
2360 return err;
2361}
71fe75a7
SC		 2362
2363static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
2364{
2365 switch (cmd) {
2366 case CCISS_GETPCIINFO:
2367 case CCISS_GETINTINFO:
2368 case CCISS_SETINTINFO:
2369 case CCISS_GETNODENAME:
2370 case CCISS_SETNODENAME:
2371 case CCISS_GETHEARTBEAT:
2372 case CCISS_GETBUSTYPES:
2373 case CCISS_GETFIRMVER:
2374 case CCISS_GETDRIVVER:
2375 case CCISS_REVALIDVOLS:
2376 case CCISS_DEREGDISK:
2377 case CCISS_REGNEWDISK:
2378 case CCISS_REGNEWD:
2379 case CCISS_RESCANDISK:
2380 case CCISS_GETLUNINFO:
2381 return hpsa_ioctl(dev, cmd, arg);
2382
2383 case CCISS_PASSTHRU32:
2384 return hpsa_ioctl32_passthru(dev, cmd, arg);
2385 case CCISS_BIG_PASSTHRU32:
2386 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
2387
2388 default:
2389 return -ENOIOCTLCMD;
2390 }
2391}
edd16368
SC		 2392#endif
2393
2394static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
2395{
2396 struct hpsa_pci_info pciinfo;
2397
2398 if (!argp)
2399 return -EINVAL;
2400 pciinfo.domain = pci_domain_nr(h->pdev->bus);
2401 pciinfo.bus = h->pdev->bus->number;
2402 pciinfo.dev_fn = h->pdev->devfn;
2403 pciinfo.board_id = h->board_id;
2404 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
2405 return -EFAULT;
2406 return 0;
2407}
2408
2409static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
2410{
2411 DriverVer_type DriverVer;
2412 unsigned char vmaj, vmin, vsubmin;
2413 int rc;
2414
2415 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
2416 &vmaj, &vmin, &vsubmin);
2417 if (rc != 3) {
2418 dev_info(&h->pdev->dev, "driver version string '%s' "
2419 "unrecognized.", HPSA_DRIVER_VERSION);
2420 vmaj = 0;
2421 vmin = 0;
2422 vsubmin = 0;
2423 }
2424 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
2425 if (!argp)
2426 return -EINVAL;
2427 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
2428 return -EFAULT;
2429 return 0;
2430}
2431
2432static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2433{
2434 IOCTL_Command_struct iocommand;
2435 struct CommandList *c;
2436 char *buff = NULL;
2437 union u64bit temp64;
2438
2439 if (!argp)
2440 return -EINVAL;
2441 if (!capable(CAP_SYS_RAWIO))
2442 return -EPERM;
2443 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
2444 return -EFAULT;
2445 if ((iocommand.buf_size < 1) &&
2446 (iocommand.Request.Type.Direction != XFER_NONE)) {
2447 return -EINVAL;
2448 }
2449 if (iocommand.buf_size > 0) {
2450 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
2451 if (buff == NULL)
2452 return -EFAULT;
2453 }
2454 if (iocommand.Request.Type.Direction == XFER_WRITE) {
2455 /* Copy the data into the buffer we created */
2456 if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) {
2457 kfree(buff);
2458 return -EFAULT;
2459 }
2460 } else
2461 memset(buff, 0, iocommand.buf_size);
2462 c = cmd_special_alloc(h);
2463 if (c == NULL) {
2464 kfree(buff);
2465 return -ENOMEM;
2466 }
2467 /* Fill in the command type */
2468 c->cmd_type = CMD_IOCTL_PEND;
2469 /* Fill in Command Header */
2470 c->Header.ReplyQueue = 0; /* unused in simple mode */
2471 if (iocommand.buf_size > 0) { /* buffer to fill */
2472 c->Header.SGList = 1;
2473 c->Header.SGTotal = 1;
2474 } else { /* no buffers to fill */
2475 c->Header.SGList = 0;
2476 c->Header.SGTotal = 0;
2477 }
2478 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
2479 /* use the kernel address the cmd block for tag */
2480 c->Header.Tag.lower = c->busaddr;
2481
2482 /* Fill in Request block */
2483 memcpy(&c->Request, &iocommand.Request,
2484 sizeof(c->Request));
2485
2486 /* Fill in the scatter gather information */
2487 if (iocommand.buf_size > 0) {
2488 temp64.val = pci_map_single(h->pdev, buff,
2489 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
2490 c->SG[0].Addr.lower = temp64.val32.lower;
2491 c->SG[0].Addr.upper = temp64.val32.upper;
2492 c->SG[0].Len = iocommand.buf_size;
2493 c->SG[0].Ext = 0; /* we are not chaining*/
2494 }
2495 hpsa_scsi_do_simple_cmd_core(h, c);
2496 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
2497 check_ioctl_unit_attention(h, c);
2498
2499 /* Copy the error information out */
2500 memcpy(&iocommand.error_info, c->err_info,
2501 sizeof(iocommand.error_info));
2502 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
2503 kfree(buff);
2504 cmd_special_free(h, c);
2505 return -EFAULT;
2506 }
2507
2508 if (iocommand.Request.Type.Direction == XFER_READ) {
2509 /* Copy the data out of the buffer we created */
2510 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
2511 kfree(buff);
2512 cmd_special_free(h, c);
2513 return -EFAULT;
2514 }
2515 }
2516 kfree(buff);
2517 cmd_special_free(h, c);
2518 return 0;
2519}
2520
2521static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2522{
2523 BIG_IOCTL_Command_struct *ioc;
2524 struct CommandList *c;
2525 unsigned char **buff = NULL;
2526 int *buff_size = NULL;
2527 union u64bit temp64;
2528 BYTE sg_used = 0;
2529 int status = 0;
2530 int i;
01a02ffc
SC		 2531 u32 left;
2532 u32 sz;
edd16368
SC		 2533 BYTE __user *data_ptr;
2534
2535 if (!argp)
2536 return -EINVAL;
2537 if (!capable(CAP_SYS_RAWIO))
2538 return -EPERM;
2539 ioc = (BIG_IOCTL_Command_struct *)
2540 kmalloc(sizeof(*ioc), GFP_KERNEL);
2541 if (!ioc) {
2542 status = -ENOMEM;
2543 goto cleanup1;
2544 }
2545 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
2546 status = -EFAULT;
2547 goto cleanup1;
2548 }
2549 if ((ioc->buf_size < 1) &&
2550 (ioc->Request.Type.Direction != XFER_NONE)) {
2551 status = -EINVAL;
2552 goto cleanup1;
2553 }
2554 /* Check kmalloc limits using all SGs */
2555 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
2556 status = -EINVAL;
2557 goto cleanup1;
2558 }
2559 if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
2560 status = -EINVAL;
2561 goto cleanup1;
2562 }
2563 buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
2564 if (!buff) {
2565 status = -ENOMEM;
2566 goto cleanup1;
2567 }
2568 buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
2569 if (!buff_size) {
2570 status = -ENOMEM;
2571 goto cleanup1;
2572 }
2573 left = ioc->buf_size;
2574 data_ptr = ioc->buf;
2575 while (left) {
2576 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
2577 buff_size[sg_used] = sz;
2578 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
2579 if (buff[sg_used] == NULL) {
2580 status = -ENOMEM;
2581 goto cleanup1;
2582 }
2583 if (ioc->Request.Type.Direction == XFER_WRITE) {
2584 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
2585 status = -ENOMEM;
2586 goto cleanup1;
2587 }
2588 } else
2589 memset(buff[sg_used], 0, sz);
2590 left -= sz;
2591 data_ptr += sz;
2592 sg_used++;
2593 }
2594 c = cmd_special_alloc(h);
2595 if (c == NULL) {
2596 status = -ENOMEM;
2597 goto cleanup1;
2598 }
2599 c->cmd_type = CMD_IOCTL_PEND;
2600 c->Header.ReplyQueue = 0;
2601
2602 if (ioc->buf_size > 0) {
2603 c->Header.SGList = sg_used;
2604 c->Header.SGTotal = sg_used;
2605 } else {
2606 c->Header.SGList = 0;
2607 c->Header.SGTotal = 0;
2608 }
2609 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
2610 c->Header.Tag.lower = c->busaddr;
2611 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
2612 if (ioc->buf_size > 0) {
2613 int i;
2614 for (i = 0; i < sg_used; i++) {
2615 temp64.val = pci_map_single(h->pdev, buff[i],
2616 buff_size[i], PCI_DMA_BIDIRECTIONAL);
2617 c->SG[i].Addr.lower = temp64.val32.lower;
2618 c->SG[i].Addr.upper = temp64.val32.upper;
2619 c->SG[i].Len = buff_size[i];
2620 /* we are not chaining */
2621 c->SG[i].Ext = 0;
2622 }
2623 }
2624 hpsa_scsi_do_simple_cmd_core(h, c);
2625 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
2626 check_ioctl_unit_attention(h, c);
2627 /* Copy the error information out */
2628 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
2629 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
2630 cmd_special_free(h, c);
2631 status = -EFAULT;
2632 goto cleanup1;
2633 }
2634 if (ioc->Request.Type.Direction == XFER_READ) {
2635 /* Copy the data out of the buffer we created */
2636 BYTE __user *ptr = ioc->buf;
2637 for (i = 0; i < sg_used; i++) {
2638 if (copy_to_user(ptr, buff[i], buff_size[i])) {
2639 cmd_special_free(h, c);
2640 status = -EFAULT;
2641 goto cleanup1;
2642 }
2643 ptr += buff_size[i];
2644 }
2645 }
2646 cmd_special_free(h, c);
2647 status = 0;
2648cleanup1:
2649 if (buff) {
2650 for (i = 0; i < sg_used; i++)
2651 kfree(buff[i]);
2652 kfree(buff);
2653 }
2654 kfree(buff_size);
2655 kfree(ioc);
2656 return status;
2657}
2658
2659static void check_ioctl_unit_attention(struct ctlr_info *h,
2660 struct CommandList *c)
2661{
2662 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
2663 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
2664 (void) check_for_unit_attention(h, c);
2665}
2666/*
2667 * ioctl
2668 */
2669static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
2670{
2671 struct ctlr_info *h;
2672 void __user *argp = (void __user *)arg;
2673
2674 h = sdev_to_hba(dev);
2675
2676 switch (cmd) {
2677 case CCISS_DEREGDISK:
2678 case CCISS_REGNEWDISK:
2679 case CCISS_REGNEWD:
a08a8471 2680 hpsa_scan_start(h->scsi_host);
edd16368
SC		 2681 return 0;
2682 case CCISS_GETPCIINFO:
2683 return hpsa_getpciinfo_ioctl(h, argp);
2684 case CCISS_GETDRIVVER:
2685 return hpsa_getdrivver_ioctl(h, argp);
2686 case CCISS_PASSTHRU:
2687 return hpsa_passthru_ioctl(h, argp);
2688 case CCISS_BIG_PASSTHRU:
2689 return hpsa_big_passthru_ioctl(h, argp);
2690 default:
2691 return -ENOTTY;
2692 }
2693}
2694
01a02ffc
SC		 2695static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
2696 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
edd16368
SC		 2697 int cmd_type)
2698{
2699 int pci_dir = XFER_NONE;
2700
2701 c->cmd_type = CMD_IOCTL_PEND;
2702 c->Header.ReplyQueue = 0;
2703 if (buff != NULL && size > 0) {
2704 c->Header.SGList = 1;
2705 c->Header.SGTotal = 1;
2706 } else {
2707 c->Header.SGList = 0;
2708 c->Header.SGTotal = 0;
2709 }
2710 c->Header.Tag.lower = c->busaddr;
2711 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
2712
2713 c->Request.Type.Type = cmd_type;
2714 if (cmd_type == TYPE_CMD) {
2715 switch (cmd) {
2716 case HPSA_INQUIRY:
2717 /* are we trying to read a vital product page */
2718 if (page_code != 0) {
2719 c->Request.CDB[1] = 0x01;
2720 c->Request.CDB[2] = page_code;
2721 }
2722 c->Request.CDBLen = 6;
2723 c->Request.Type.Attribute = ATTR_SIMPLE;
2724 c->Request.Type.Direction = XFER_READ;
2725 c->Request.Timeout = 0;
2726 c->Request.CDB[0] = HPSA_INQUIRY;
2727 c->Request.CDB[4] = size & 0xFF;
2728 break;
2729 case HPSA_REPORT_LOG:
2730 case HPSA_REPORT_PHYS:
2731 /* Talking to controller so It's a physical command
2732 mode = 00 target = 0. Nothing to write.
2733 */
2734 c->Request.CDBLen = 12;
2735 c->Request.Type.Attribute = ATTR_SIMPLE;
2736 c->Request.Type.Direction = XFER_READ;
2737 c->Request.Timeout = 0;
2738 c->Request.CDB[0] = cmd;
2739 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
2740 c->Request.CDB[7] = (size >> 16) & 0xFF;
2741 c->Request.CDB[8] = (size >> 8) & 0xFF;
2742 c->Request.CDB[9] = size & 0xFF;
2743 break;
edd16368
SC		 2744 case HPSA_CACHE_FLUSH:
2745 c->Request.CDBLen = 12;
2746 c->Request.Type.Attribute = ATTR_SIMPLE;
2747 c->Request.Type.Direction = XFER_WRITE;
2748 c->Request.Timeout = 0;
2749 c->Request.CDB[0] = BMIC_WRITE;
2750 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
2751 break;
2752 case TEST_UNIT_READY:
2753 c->Request.CDBLen = 6;
2754 c->Request.Type.Attribute = ATTR_SIMPLE;
2755 c->Request.Type.Direction = XFER_NONE;
2756 c->Request.Timeout = 0;
2757 break;
2758 default:
2759 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
2760 BUG();
2761 return;
2762 }
2763 } else if (cmd_type == TYPE_MSG) {
2764 switch (cmd) {
2765
2766 case HPSA_DEVICE_RESET_MSG:
2767 c->Request.CDBLen = 16;
2768 c->Request.Type.Type = 1; /* It is a MSG not a CMD */
2769 c->Request.Type.Attribute = ATTR_SIMPLE;
2770 c->Request.Type.Direction = XFER_NONE;
2771 c->Request.Timeout = 0; /* Don't time out */
2772 c->Request.CDB[0] = 0x01; /* RESET_MSG is 0x01 */
2773 c->Request.CDB[1] = 0x03; /* Reset target above */
2774 /* If bytes 4-7 are zero, it means reset the */
2775 /* LunID device */
2776 c->Request.CDB[4] = 0x00;
2777 c->Request.CDB[5] = 0x00;
2778 c->Request.CDB[6] = 0x00;
2779 c->Request.CDB[7] = 0x00;
2780 break;
2781
2782 default:
2783 dev_warn(&h->pdev->dev, "unknown message type %d\n",
2784 cmd);
2785 BUG();
2786 }
2787 } else {
2788 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
2789 BUG();
2790 }
2791
2792 switch (c->Request.Type.Direction) {
2793 case XFER_READ:
2794 pci_dir = PCI_DMA_FROMDEVICE;
2795 break;
2796 case XFER_WRITE:
2797 pci_dir = PCI_DMA_TODEVICE;
2798 break;
2799 case XFER_NONE:
2800 pci_dir = PCI_DMA_NONE;
2801 break;
2802 default:
2803 pci_dir = PCI_DMA_BIDIRECTIONAL;
2804 }
2805
2806 hpsa_map_one(h->pdev, c, buff, size, pci_dir);
2807
2808 return;
2809}
2810
2811/*
2812 * Map (physical) PCI mem into (virtual) kernel space
2813 */
2814static void __iomem *remap_pci_mem(ulong base, ulong size)
2815{
2816 ulong page_base = ((ulong) base) & PAGE_MASK;
2817 ulong page_offs = ((ulong) base) - page_base;
2818 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
2819
2820 return page_remapped ? (page_remapped + page_offs) : NULL;
2821}
2822
2823/* Takes cmds off the submission queue and sends them to the hardware,
2824 * then puts them on the queue of cmds waiting for completion.
2825 */
2826static void start_io(struct ctlr_info *h)
2827{
2828 struct CommandList *c;
2829
2830 while (!hlist_empty(&h->reqQ)) {
2831 c = hlist_entry(h->reqQ.first, struct CommandList, list);
2832 /* can't do anything if fifo is full */
2833 if ((h->access.fifo_full(h))) {
2834 dev_warn(&h->pdev->dev, "fifo full\n");
2835 break;
2836 }
2837
2838 /* Get the first entry from the Request Q */
2839 removeQ(c);
2840 h->Qdepth--;
2841
2842 /* Tell the controller execute command */
2843 h->access.submit_command(h, c);
2844
2845 /* Put job onto the completed Q */
2846 addQ(&h->cmpQ, c);
2847 }
2848}
2849
2850static inline unsigned long get_next_completion(struct ctlr_info *h)
2851{
2852 return h->access.command_completed(h);
2853}
2854
900c5440 2855static inline bool interrupt_pending(struct ctlr_info *h)
edd16368
SC		 2856{
2857 return h->access.intr_pending(h);
2858}
2859
2860static inline long interrupt_not_for_us(struct ctlr_info *h)
2861{
10f66018
SC		 2862 return (h->access.intr_pending(h) == 0) ||
2863 (h->interrupts_enabled == 0);
edd16368
SC		 2864}
2865
01a02ffc
SC		 2866static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
2867 u32 raw_tag)
edd16368
SC		 2868{
2869 if (unlikely(tag_index >= h->nr_cmds)) {
2870 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
2871 return 1;
2872 }
2873 return 0;
2874}
2875
01a02ffc 2876static inline void finish_cmd(struct CommandList *c, u32 raw_tag)
edd16368
SC		 2877{
2878 removeQ(c);
2879 if (likely(c->cmd_type == CMD_SCSI))
2880 complete_scsi_command(c, 0, raw_tag);
2881 else if (c->cmd_type == CMD_IOCTL_PEND)
2882 complete(c->waiting);
2883}
2884
a104c99f
SC		 2885static inline u32 hpsa_tag_contains_index(u32 tag)
2886{
303932fd 2887#define DIRECT_LOOKUP_BIT 0x10
a104c99f
SC		 2888 return tag & DIRECT_LOOKUP_BIT;
2889}
2890
2891static inline u32 hpsa_tag_to_index(u32 tag)
2892{
303932fd 2893#define DIRECT_LOOKUP_SHIFT 5
a104c99f
SC		 2894 return tag >> DIRECT_LOOKUP_SHIFT;
2895}
2896
2897static inline u32 hpsa_tag_discard_error_bits(u32 tag)
2898{
2899#define HPSA_ERROR_BITS 0x03
2900 return tag & ~HPSA_ERROR_BITS;
2901}
2902
303932fd
DB		 2903/* process completion of an indexed ("direct lookup") command */
2904static inline u32 process_indexed_cmd(struct ctlr_info *h,
2905 u32 raw_tag)
2906{
2907 u32 tag_index;
2908 struct CommandList *c;
2909
2910 tag_index = hpsa_tag_to_index(raw_tag);
2911 if (bad_tag(h, tag_index, raw_tag))
2912 return next_command(h);
2913 c = h->cmd_pool + tag_index;
2914 finish_cmd(c, raw_tag);
2915 return next_command(h);
2916}
2917
2918/* process completion of a non-indexed command */
2919static inline u32 process_nonindexed_cmd(struct ctlr_info *h,
2920 u32 raw_tag)
2921{
2922 u32 tag;
2923 struct CommandList *c = NULL;
2924 struct hlist_node *tmp;
2925
2926 tag = hpsa_tag_discard_error_bits(raw_tag);
2927 hlist_for_each_entry(c, tmp, &h->cmpQ, list) {
2928 if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
2929 finish_cmd(c, raw_tag);
2930 return next_command(h);
2931 }
2932 }
2933 bad_tag(h, h->nr_cmds + 1, raw_tag);
2934 return next_command(h);
2935}
2936
10f66018 2937static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id)
edd16368
SC		 2938{
2939 struct ctlr_info *h = dev_id;
edd16368 2940 unsigned long flags;
303932fd 2941 u32 raw_tag;
edd16368
SC		 2942
2943 if (interrupt_not_for_us(h))
2944 return IRQ_NONE;
10f66018
SC		 2945 spin_lock_irqsave(&h->lock, flags);
2946 while (interrupt_pending(h)) {
2947 raw_tag = get_next_completion(h);
2948 while (raw_tag != FIFO_EMPTY) {
2949 if (hpsa_tag_contains_index(raw_tag))
2950 raw_tag = process_indexed_cmd(h, raw_tag);
2951 else
2952 raw_tag = process_nonindexed_cmd(h, raw_tag);
2953 }
2954 }
2955 spin_unlock_irqrestore(&h->lock, flags);
2956 return IRQ_HANDLED;
2957}
2958
2959static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id)
2960{
2961 struct ctlr_info *h = dev_id;
2962 unsigned long flags;
2963 u32 raw_tag;
2964
edd16368 2965 spin_lock_irqsave(&h->lock, flags);
303932fd
DB		 2966 raw_tag = get_next_completion(h);
2967 while (raw_tag != FIFO_EMPTY) {
2968 if (hpsa_tag_contains_index(raw_tag))
2969 raw_tag = process_indexed_cmd(h, raw_tag);
2970 else
2971 raw_tag = process_nonindexed_cmd(h, raw_tag);
edd16368
SC		 2972 }
2973 spin_unlock_irqrestore(&h->lock, flags);
2974 return IRQ_HANDLED;
2975}
2976
f0edafc6 2977/* Send a message CDB to the firmware. */
edd16368
SC		 2978static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
2979 unsigned char type)
2980{
2981 struct Command {
2982 struct CommandListHeader CommandHeader;
2983 struct RequestBlock Request;
2984 struct ErrDescriptor ErrorDescriptor;
2985 };
2986 struct Command *cmd;
2987 static const size_t cmd_sz = sizeof(*cmd) +
2988 sizeof(cmd->ErrorDescriptor);
2989 dma_addr_t paddr64;
2990 uint32_t paddr32, tag;
2991 void __iomem *vaddr;
2992 int i, err;
2993
2994 vaddr = pci_ioremap_bar(pdev, 0);
2995 if (vaddr == NULL)
2996 return -ENOMEM;
2997
2998 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
2999 * CCISS commands, so they must be allocated from the lower 4GiB of
3000 * memory.
3001 */
3002 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3003 if (err) {
3004 iounmap(vaddr);
3005 return -ENOMEM;
3006 }
3007
3008 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
3009 if (cmd == NULL) {
3010 iounmap(vaddr);
3011 return -ENOMEM;
3012 }
3013
3014 /* This must fit, because of the 32-bit consistent DMA mask. Also,
3015 * although there's no guarantee, we assume that the address is at
3016 * least 4-byte aligned (most likely, it's page-aligned).
3017 */
3018 paddr32 = paddr64;
3019
3020 cmd->CommandHeader.ReplyQueue = 0;
3021 cmd->CommandHeader.SGList = 0;
3022 cmd->CommandHeader.SGTotal = 0;
3023 cmd->CommandHeader.Tag.lower = paddr32;
3024 cmd->CommandHeader.Tag.upper = 0;
3025 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
3026
3027 cmd->Request.CDBLen = 16;
3028 cmd->Request.Type.Type = TYPE_MSG;
3029 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
3030 cmd->Request.Type.Direction = XFER_NONE;
3031 cmd->Request.Timeout = 0; /* Don't time out */
3032 cmd->Request.CDB[0] = opcode;
3033 cmd->Request.CDB[1] = type;
3034 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
3035 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
3036 cmd->ErrorDescriptor.Addr.upper = 0;
3037 cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
3038
3039 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
3040
3041 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
3042 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
a104c99f 3043 if (hpsa_tag_discard_error_bits(tag) == paddr32)
edd16368
SC		 3044 break;
3045 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
3046 }
3047
3048 iounmap(vaddr);
3049
3050 /* we leak the DMA buffer here ... no choice since the controller could
3051 * still complete the command.
3052 */
3053 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
3054 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
3055 opcode, type);
3056 return -ETIMEDOUT;
3057 }
3058
3059 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
3060
3061 if (tag & HPSA_ERROR_BIT) {
3062 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
3063 opcode, type);
3064 return -EIO;
3065 }
3066
3067 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
3068 opcode, type);
3069 return 0;
3070}
3071
3072#define hpsa_soft_reset_controller(p) hpsa_message(p, 1, 0)
3073#define hpsa_noop(p) hpsa_message(p, 3, 0)
3074
3075static __devinit int hpsa_reset_msi(struct pci_dev *pdev)
3076{
3077/* the #defines are stolen from drivers/pci/msi.h. */
3078#define msi_control_reg(base) (base + PCI_MSI_FLAGS)
3079#define PCI_MSIX_FLAGS_ENABLE (1 << 15)
3080
3081 int pos;
3082 u16 control = 0;
3083
3084 pos = pci_find_capability(pdev, PCI_CAP_ID_MSI);
3085 if (pos) {
3086 pci_read_config_word(pdev, msi_control_reg(pos), &control);
3087 if (control & PCI_MSI_FLAGS_ENABLE) {
3088 dev_info(&pdev->dev, "resetting MSI\n");
3089 pci_write_config_word(pdev, msi_control_reg(pos),
3090 control & ~PCI_MSI_FLAGS_ENABLE);
3091 }
3092 }
3093
3094 pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
3095 if (pos) {
3096 pci_read_config_word(pdev, msi_control_reg(pos), &control);
3097 if (control & PCI_MSIX_FLAGS_ENABLE) {
3098 dev_info(&pdev->dev, "resetting MSI-X\n");
3099 pci_write_config_word(pdev, msi_control_reg(pos),
3100 control & ~PCI_MSIX_FLAGS_ENABLE);
3101 }
3102 }
3103
3104 return 0;
3105}
3106
1df8552a
SC		 3107static int hpsa_controller_hard_reset(struct pci_dev *pdev,
3108 void * __iomem vaddr, bool use_doorbell)
3109{
3110 u16 pmcsr;
3111 int pos;
3112
3113 if (use_doorbell) {
3114 /* For everything after the P600, the PCI power state method
3115 * of resetting the controller doesn't work, so we have this
3116 * other way using the doorbell register.
3117 */
3118 dev_info(&pdev->dev, "using doorbell to reset controller\n");
3119 writel(DOORBELL_CTLR_RESET, vaddr + SA5_DOORBELL);
3120 msleep(1000);
3121 } else { /* Try to do it the PCI power state way */
3122
3123 /* Quoting from the Open CISS Specification: "The Power
3124 * Management Control/Status Register (CSR) controls the power
3125 * state of the device. The normal operating state is D0,
3126 * CSR=00h. The software off state is D3, CSR=03h. To reset
3127 * the controller, place the interface device in D3 then to D0,
3128 * this causes a secondary PCI reset which will reset the
3129 * controller." */
3130
3131 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
3132 if (pos == 0) {
3133 dev_err(&pdev->dev,
3134 "hpsa_reset_controller: "
3135 "PCI PM not supported\n");
3136 return -ENODEV;
3137 }
3138 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
3139 /* enter the D3hot power management state */
3140 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
3141 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3142 pmcsr |= PCI_D3hot;
3143 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
3144
3145 msleep(500);
3146
3147 /* enter the D0 power management state */
3148 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3149 pmcsr |= PCI_D0;
3150 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
3151
3152 msleep(500);
3153 }
3154 return 0;
3155}
3156
edd16368 3157/* This does a hard reset of the controller using PCI power management
1df8552a 3158 * states or the using the doorbell register.
edd16368 3159 */
1df8552a 3160static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
edd16368 3161{
1df8552a
SC		 3162 u16 saved_config_space[32];
3163 u64 cfg_offset;
3164 u32 cfg_base_addr;
3165 u64 cfg_base_addr_index;
3166 void __iomem *vaddr;
3167 unsigned long paddr;
3168 u32 misc_fw_support, active_transport;
3169 int rc, i;
3170 struct CfgTable __iomem *cfgtable;
3171 bool use_doorbell;
18867659 3172 u32 board_id;
edd16368 3173
1df8552a
SC		 3174 /* For controllers as old as the P600, this is very nearly
3175 * the same thing as
edd16368
SC		 3176 *
3177 * pci_save_state(pci_dev);
3178 * pci_set_power_state(pci_dev, PCI_D3hot);
3179 * pci_set_power_state(pci_dev, PCI_D0);
3180 * pci_restore_state(pci_dev);
3181 *
3182 * but we can't use these nice canned kernel routines on
3183 * kexec, because they also check the MSI/MSI-X state in PCI
3184 * configuration space and do the wrong thing when it is
3185 * set/cleared. Also, the pci_save/restore_state functions
3186 * violate the ordering requirements for restoring the
3187 * configuration space from the CCISS document (see the
3188 * comment below). So we roll our own ....
1df8552a
SC		 3189 *
3190 * For controllers newer than the P600, the pci power state
3191 * method of resetting doesn't work so we have another way
3192 * using the doorbell register.
edd16368 3193 */
18867659
SC		 3194
3195 /* Exclude 640x boards. These are two pci devices in one slot
3196 * which share a battery backed cache module. One controls the
3197 * cache, the other accesses the cache through the one that controls
3198 * it. If we reset the one controlling the cache, the other will
3199 * likely not be happy. Just forbid resetting this conjoined mess.
3200 * The 640x isn't really supported by hpsa anyway.
3201 */
3202 hpsa_lookup_board_id(pdev, &board_id);
3203 if (board_id == 0x409C0E11 || board_id == 0x409D0E11)
3204 return -ENOTSUPP;
3205
edd16368
SC		 3206 for (i = 0; i < 32; i++)
3207 pci_read_config_word(pdev, 2*i, &saved_config_space[i]);
3208
edd16368 3209
1df8552a
SC		 3210 /* find the first memory BAR, so we can find the cfg table */
3211 rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
3212 if (rc)
3213 return rc;
3214 vaddr = remap_pci_mem(paddr, 0x250);
3215 if (!vaddr)
3216 return -ENOMEM;
edd16368 3217
1df8552a
SC		 3218 /* find cfgtable in order to check if reset via doorbell is supported */
3219 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
3220 &cfg_base_addr_index, &cfg_offset);
3221 if (rc)
3222 goto unmap_vaddr;
3223 cfgtable = remap_pci_mem(pci_resource_start(pdev,
3224 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
3225 if (!cfgtable) {
3226 rc = -ENOMEM;
3227 goto unmap_vaddr;
3228 }
edd16368 3229
1df8552a
SC		 3230 /* If reset via doorbell register is supported, use that. */
3231 misc_fw_support = readl(&cfgtable->misc_fw_support);
3232 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
edd16368 3233
36ed2176
SC		 3234 /* The doorbell reset seems to cause lockups on some Smart
3235 * Arrays (e.g. P410, P410i, maybe others). Until this is
3236 * fixed or at least isolated, avoid the doorbell reset.
3237 */
3238 use_doorbell = 0;
3239
1df8552a
SC		 3240 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
3241 if (rc)
3242 goto unmap_cfgtable;
edd16368
SC		 3243
3244 /* Restore the PCI configuration space. The Open CISS
3245 * Specification says, "Restore the PCI Configuration
3246 * Registers, offsets 00h through 60h. It is important to
3247 * restore the command register, 16-bits at offset 04h,
3248 * last. Do not restore the configuration status register,
3249 * 16-bits at offset 06h." Note that the offset is 2*i.
3250 */
3251 for (i = 0; i < 32; i++) {
3252 if (i == 2 || i == 3)
3253 continue;
3254 pci_write_config_word(pdev, 2*i, saved_config_space[i]);
3255 }
3256 wmb();
3257 pci_write_config_word(pdev, 4, saved_config_space[2]);
3258
1df8552a
SC		 3259 /* Some devices (notably the HP Smart Array 5i Controller)
3260 need a little pause here */
3261 msleep(HPSA_POST_RESET_PAUSE_MSECS);
3262
3263 /* Controller should be in simple mode at this point. If it's not,
3264 * It means we're on one of those controllers which doesn't support
3265 * the doorbell reset method and on which the PCI power management reset
3266 * method doesn't work (P800, for example.)
3267 * In those cases, pretend the reset worked and hope for the best.
3268 */
3269 active_transport = readl(&cfgtable->TransportActive);
3270 if (active_transport & PERFORMANT_MODE) {
3271 dev_warn(&pdev->dev, "Unable to successfully reset controller,"
3272 " proceeding anyway.\n");
3273 rc = -ENOTSUPP;
3274 }
3275
3276unmap_cfgtable:
3277 iounmap(cfgtable);
3278
3279unmap_vaddr:
3280 iounmap(vaddr);
3281 return rc;
edd16368
SC		 3282}
3283
3284/*
3285 * We cannot read the structure directly, for portability we must use
3286 * the io functions.
3287 * This is for debug only.
3288 */
edd16368
SC		 3289static void print_cfg_table(struct device *dev, struct CfgTable *tb)
3290{
58f8665c 3291#ifdef HPSA_DEBUG
edd16368
SC		 3292 int i;
3293 char temp_name[17];
3294
3295 dev_info(dev, "Controller Configuration information\n");
3296 dev_info(dev, "------------------------------------\n");
3297 for (i = 0; i < 4; i++)
3298 temp_name[i] = readb(&(tb->Signature[i]));
3299 temp_name[4] = '\0';
3300 dev_info(dev, " Signature = %s\n", temp_name);
3301 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
3302 dev_info(dev, " Transport methods supported = 0x%x\n",
3303 readl(&(tb->TransportSupport)));
3304 dev_info(dev, " Transport methods active = 0x%x\n",
3305 readl(&(tb->TransportActive)));
3306 dev_info(dev, " Requested transport Method = 0x%x\n",
3307 readl(&(tb->HostWrite.TransportRequest)));
3308 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
3309 readl(&(tb->HostWrite.CoalIntDelay)));
3310 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
3311 readl(&(tb->HostWrite.CoalIntCount)));
3312 dev_info(dev, " Max outstanding commands = 0x%d\n",
3313 readl(&(tb->CmdsOutMax)));
3314 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
3315 for (i = 0; i < 16; i++)
3316 temp_name[i] = readb(&(tb->ServerName[i]));
3317 temp_name[16] = '\0';
3318 dev_info(dev, " Server Name = %s\n", temp_name);
3319 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
3320 readl(&(tb->HeartBeat)));
edd16368 3321#endif /* HPSA_DEBUG */
58f8665c 3322}
edd16368
SC		 3323
3324static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
3325{
3326 int i, offset, mem_type, bar_type;
3327
3328 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
3329 return 0;
3330 offset = 0;
3331 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3332 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
3333 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3334 offset += 4;
3335 else {
3336 mem_type = pci_resource_flags(pdev, i) &
3337 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
3338 switch (mem_type) {
3339 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3340 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3341 offset += 4; /* 32 bit */
3342 break;
3343 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3344 offset += 8;
3345 break;
3346 default: /* reserved in PCI 2.2 */
3347 dev_warn(&pdev->dev,
3348 "base address is invalid\n");
3349 return -1;
3350 break;
3351 }
3352 }
3353 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3354 return i + 1;
3355 }
3356 return -1;
3357}
3358
3359/* If MSI/MSI-X is supported by the kernel we will try to enable it on
3360 * controllers that are capable. If not, we use IO-APIC mode.
3361 */
3362
6b3f4c52 3363static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
edd16368
SC		 3364{
3365#ifdef CONFIG_PCI_MSI
3366 int err;
3367 struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1},
3368 {0, 2}, {0, 3}
3369 };
3370
3371 /* Some boards advertise MSI but don't really support it */
6b3f4c52
SC		 3372 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
3373 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
edd16368 3374 goto default_int_mode;
55c06c71
SC		 3375 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
3376 dev_info(&h->pdev->dev, "MSIX\n");
3377 err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4);
edd16368
SC		 3378 if (!err) {
3379 h->intr[0] = hpsa_msix_entries[0].vector;
3380 h->intr[1] = hpsa_msix_entries[1].vector;
3381 h->intr[2] = hpsa_msix_entries[2].vector;
3382 h->intr[3] = hpsa_msix_entries[3].vector;
3383 h->msix_vector = 1;
3384 return;
3385 }
3386 if (err > 0) {
55c06c71 3387 dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
edd16368
SC		 3388 "available\n", err);
3389 goto default_int_mode;
3390 } else {
55c06c71 3391 dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
edd16368
SC		 3392 err);
3393 goto default_int_mode;
3394 }
3395 }
55c06c71
SC		 3396 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
3397 dev_info(&h->pdev->dev, "MSI\n");
3398 if (!pci_enable_msi(h->pdev))
edd16368
SC		 3399 h->msi_vector = 1;
3400 else
55c06c71 3401 dev_warn(&h->pdev->dev, "MSI init failed\n");
edd16368
SC		 3402 }
3403default_int_mode:
3404#endif /* CONFIG_PCI_MSI */
3405 /* if we get here we're going to use the default interrupt mode */
55c06c71 3406 h->intr[PERF_MODE_INT] = h->pdev->irq;
edd16368
SC		 3407}
3408
e5c880d1
SC		 3409static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
3410{
3411 int i;
3412 u32 subsystem_vendor_id, subsystem_device_id;
3413
3414 subsystem_vendor_id = pdev->subsystem_vendor;
3415 subsystem_device_id = pdev->subsystem_device;
3416 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
3417 subsystem_vendor_id;
3418
3419 for (i = 0; i < ARRAY_SIZE(products); i++)
3420 if (*board_id == products[i].board_id)
3421 return i;
3422
6798cc0a
SC		 3423 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
3424 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
3425 !hpsa_allow_any) {
e5c880d1
SC		 3426 dev_warn(&pdev->dev, "unrecognized board ID: "
3427 "0x%08x, ignoring.\n", *board_id);
3428 return -ENODEV;
3429 }
3430 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
3431}
3432
85bdbabb
SC		 3433static inline bool hpsa_board_disabled(struct pci_dev *pdev)
3434{
3435 u16 command;
3436
3437 (void) pci_read_config_word(pdev, PCI_COMMAND, &command);
3438 return ((command & PCI_COMMAND_MEMORY) == 0);
3439}
3440
12d2cd47 3441static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
3a7774ce
SC		 3442 unsigned long *memory_bar)
3443{
3444 int i;
3445
3446 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
12d2cd47 3447 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
3a7774ce 3448 /* addressing mode bits already removed */
12d2cd47
SC		 3449 *memory_bar = pci_resource_start(pdev, i);
3450 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
3a7774ce
SC		 3451 *memory_bar);
3452 return 0;
3453 }
12d2cd47 3454 dev_warn(&pdev->dev, "no memory BAR found\n");
3a7774ce
SC		 3455 return -ENODEV;
3456}
3457
2c4c8c8b
SC		 3458static int __devinit hpsa_wait_for_board_ready(struct ctlr_info *h)
3459{
3460 int i;
3461 u32 scratchpad;
3462
3463 for (i = 0; i < HPSA_BOARD_READY_ITERATIONS; i++) {
3464 scratchpad = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
3465 if (scratchpad == HPSA_FIRMWARE_READY)
3466 return 0;
3467 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
3468 }
3469 dev_warn(&h->pdev->dev, "board not ready, timed out.\n");
3470 return -ENODEV;
3471}
3472
a51fd47f
SC		 3473static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
3474 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
3475 u64 *cfg_offset)
3476{
3477 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
3478 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
3479 *cfg_base_addr &= (u32) 0x0000ffff;
3480 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
3481 if (*cfg_base_addr_index == -1) {
3482 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
3483 return -ENODEV;
3484 }
3485 return 0;
3486}
3487
77c4495c 3488static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
edd16368 3489{
01a02ffc
SC		 3490 u64 cfg_offset;
3491 u32 cfg_base_addr;
3492 u64 cfg_base_addr_index;
303932fd 3493 u32 trans_offset;
a51fd47f 3494 int rc;
77c4495c 3495
a51fd47f
SC		 3496 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
3497 &cfg_base_addr_index, &cfg_offset);
3498 if (rc)
3499 return rc;
77c4495c 3500 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
a51fd47f 3501 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
77c4495c
SC		 3502 if (!h->cfgtable)
3503 return -ENOMEM;
3504 /* Find performant mode table. */
a51fd47f 3505 trans_offset = readl(&h->cfgtable->TransMethodOffset);
77c4495c
SC		 3506 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
3507 cfg_base_addr_index)+cfg_offset+trans_offset,
3508 sizeof(*h->transtable));
3509 if (!h->transtable)
3510 return -ENOMEM;
3511 return 0;
3512}
3513
cba3d38b
SC		 3514static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
3515{
3516 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
3517 if (h->max_commands < 16) {
3518 dev_warn(&h->pdev->dev, "Controller reports "
3519 "max supported commands of %d, an obvious lie. "
3520 "Using 16. Ensure that firmware is up to date.\n",
3521 h->max_commands);
3522 h->max_commands = 16;
3523 }
3524}
3525
b93d7536
SC		 3526/* Interrogate the hardware for some limits:
3527 * max commands, max SG elements without chaining, and with chaining,
3528 * SG chain block size, etc.
3529 */
3530static void __devinit hpsa_find_board_params(struct ctlr_info *h)
3531{
cba3d38b 3532 hpsa_get_max_perf_mode_cmds(h);
b93d7536
SC		 3533 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
3534 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
3535 /*
3536 * Limit in-command s/g elements to 32 save dma'able memory.
3537 * Howvever spec says if 0, use 31
3538 */
3539 h->max_cmd_sg_entries = 31;
3540 if (h->maxsgentries > 512) {
3541 h->max_cmd_sg_entries = 32;
3542 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
3543 h->maxsgentries--; /* save one for chain pointer */
3544 } else {
3545 h->maxsgentries = 31; /* default to traditional values */
3546 h->chainsize = 0;
3547 }
3548}
3549
76c46e49
SC		 3550static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
3551{
3552 if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
3553 (readb(&h->cfgtable->Signature[1]) != 'I') ||
3554 (readb(&h->cfgtable->Signature[2]) != 'S') ||
3555 (readb(&h->cfgtable->Signature[3]) != 'S')) {
3556 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
3557 return false;
3558 }
3559 return true;
3560}
3561
f7c39101
SC		 3562/* Need to enable prefetch in the SCSI core for 6400 in x86 */
3563static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
3564{
3565#ifdef CONFIG_X86
3566 u32 prefetch;
3567
3568 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
3569 prefetch |= 0x100;
3570 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
3571#endif
3572}
3573
3d0eab67
SC		 3574/* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
3575 * in a prefetch beyond physical memory.
3576 */
3577static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
3578{
3579 u32 dma_prefetch;
3580
3581 if (h->board_id != 0x3225103C)
3582 return;
3583 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
3584 dma_prefetch |= 0x8000;
3585 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
3586}
3587
3f4336f3 3588static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
eb6b2ae9
SC		 3589{
3590 int i;
eb6b2ae9
SC		 3591
3592 /* under certain very rare conditions, this can take awhile.
3593 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3594 * as we enter this code.)
3595 */
3596 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
3597 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
3598 break;
3599 /* delay and try again */
3600 msleep(10);
3601 }
3f4336f3
SC		 3602}
3603
3604static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
3605{
3606 u32 trans_support;
3607
3608 trans_support = readl(&(h->cfgtable->TransportSupport));
3609 if (!(trans_support & SIMPLE_MODE))
3610 return -ENOTSUPP;
3611
3612 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
3613 /* Update the field, and then ring the doorbell */
3614 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
3615 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3616 hpsa_wait_for_mode_change_ack(h);
eb6b2ae9 3617 print_cfg_table(&h->pdev->dev, h->cfgtable);
eb6b2ae9
SC		 3618 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
3619 dev_warn(&h->pdev->dev,
3620 "unable to get board into simple mode\n");
3621 return -ENODEV;
3622 }
3623 return 0;
3624}
3625
77c4495c
SC		 3626static int __devinit hpsa_pci_init(struct ctlr_info *h)
3627{
eb6b2ae9 3628 int prod_index, err;
edd16368 3629
e5c880d1
SC		 3630 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
3631 if (prod_index < 0)
3632 return -ENODEV;
3633 h->product_name = products[prod_index].product_name;
3634 h->access = *(products[prod_index].access);
edd16368 3635
85bdbabb 3636 if (hpsa_board_disabled(h->pdev)) {
55c06c71 3637 dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
edd16368
SC		 3638 return -ENODEV;
3639 }
55c06c71 3640 err = pci_enable_device(h->pdev);
edd16368 3641 if (err) {
55c06c71 3642 dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
edd16368
SC		 3643 return err;
3644 }
3645
55c06c71 3646 err = pci_request_regions(h->pdev, "hpsa");
edd16368 3647 if (err) {
55c06c71
SC		 3648 dev_err(&h->pdev->dev,
3649 "cannot obtain PCI resources, aborting\n");
edd16368
SC		 3650 return err;
3651 }
6b3f4c52 3652 hpsa_interrupt_mode(h);
12d2cd47 3653 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
3a7774ce 3654 if (err)
edd16368 3655 goto err_out_free_res;
edd16368 3656 h->vaddr = remap_pci_mem(h->paddr, 0x250);
204892e9
SC		 3657 if (!h->vaddr) {
3658 err = -ENOMEM;
3659 goto err_out_free_res;
3660 }
2c4c8c8b
SC		 3661 err = hpsa_wait_for_board_ready(h);
3662 if (err)
edd16368 3663 goto err_out_free_res;
77c4495c
SC		 3664 err = hpsa_find_cfgtables(h);
3665 if (err)
edd16368 3666 goto err_out_free_res;
b93d7536 3667 hpsa_find_board_params(h);
edd16368 3668
76c46e49 3669 if (!hpsa_CISS_signature_present(h)) {
edd16368
SC		 3670 err = -ENODEV;
3671 goto err_out_free_res;
3672 }
f7c39101 3673 hpsa_enable_scsi_prefetch(h);
3d0eab67 3674 hpsa_p600_dma_prefetch_quirk(h);
eb6b2ae9
SC		 3675 err = hpsa_enter_simple_mode(h);
3676 if (err)
edd16368 3677 goto err_out_free_res;
edd16368
SC		 3678 return 0;
3679
3680err_out_free_res:
204892e9
SC		 3681 if (h->transtable)
3682 iounmap(h->transtable);
3683 if (h->cfgtable)
3684 iounmap(h->cfgtable);
3685 if (h->vaddr)
3686 iounmap(h->vaddr);
edd16368
SC		 3687 /*
3688 * Deliberately omit pci_disable_device(): it does something nasty to
3689 * Smart Array controllers that pci_enable_device does not undo
3690 */
55c06c71 3691 pci_release_regions(h->pdev);
edd16368
SC		 3692 return err;
3693}
3694
339b2b14
SC		 3695static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
3696{
3697 int rc;
3698
3699#define HBA_INQUIRY_BYTE_COUNT 64
3700 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
3701 if (!h->hba_inquiry_data)
3702 return;
3703 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
3704 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
3705 if (rc != 0) {
3706 kfree(h->hba_inquiry_data);
3707 h->hba_inquiry_data = NULL;
3708 }
3709}
3710
4c2a8c40
SC		 3711static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev)
3712{
1df8552a 3713 int rc, i;
4c2a8c40
SC		 3714
3715 if (!reset_devices)
3716 return 0;
3717
1df8552a
SC		 3718 /* Reset the controller with a PCI power-cycle or via doorbell */
3719 rc = hpsa_kdump_hard_reset_controller(pdev);
4c2a8c40 3720
1df8552a
SC		 3721 /* -ENOTSUPP here means we cannot reset the controller
3722 * but it's already (and still) up and running in
18867659
SC		 3723 * "performant mode". Or, it might be 640x, which can't reset
3724 * due to concerns about shared bbwc between 6402/6404 pair.
1df8552a
SC		 3725 */
3726 if (rc == -ENOTSUPP)
3727 return 0; /* just try to do the kdump anyhow. */
3728 if (rc)
3729 return -ENODEV;
3730 if (hpsa_reset_msi(pdev))
3731 return -ENODEV;
4c2a8c40
SC		 3732
3733 /* Now try to get the controller to respond to a no-op */
3734 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
3735 if (hpsa_noop(pdev) == 0)
3736 break;
3737 else
3738 dev_warn(&pdev->dev, "no-op failed%s\n",
3739 (i < 11 ? "; re-trying" : ""));
3740 }
3741 return 0;
3742}
3743
edd16368
SC		 3744static int __devinit hpsa_init_one(struct pci_dev *pdev,
3745 const struct pci_device_id *ent)
3746{
4c2a8c40 3747 int dac, rc;
edd16368
SC		 3748 struct ctlr_info *h;
3749
3750 if (number_of_controllers == 0)
3751 printk(KERN_INFO DRIVER_NAME "\n");
edd16368 3752
4c2a8c40
SC		 3753 rc = hpsa_init_reset_devices(pdev);
3754 if (rc)
3755 return rc;
edd16368 3756
303932fd
DB		 3757 /* Command structures must be aligned on a 32-byte boundary because
3758 * the 5 lower bits of the address are used by the hardware. and by
3759 * the driver. See comments in hpsa.h for more info.
3760 */
3761#define COMMANDLIST_ALIGNMENT 32
3762 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
edd16368
SC		 3763 h = kzalloc(sizeof(*h), GFP_KERNEL);
3764 if (!h)
ecd9aad4 3765 return -ENOMEM;
edd16368 3766
55c06c71 3767 h->pdev = pdev;
edd16368
SC		 3768 h->busy_initializing = 1;
3769 INIT_HLIST_HEAD(&h->cmpQ);
3770 INIT_HLIST_HEAD(&h->reqQ);
55c06c71 3771 rc = hpsa_pci_init(h);
ecd9aad4 3772 if (rc != 0)
edd16368
SC		 3773 goto clean1;
3774
3775 sprintf(h->devname, "hpsa%d", number_of_controllers);
3776 h->ctlr = number_of_controllers;
3777 number_of_controllers++;
edd16368
SC		 3778
3779 /* configure PCI DMA stuff */
ecd9aad4
SC		 3780 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
3781 if (rc == 0) {
edd16368 3782 dac = 1;
ecd9aad4
SC		 3783 } else {
3784 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3785 if (rc == 0) {
3786 dac = 0;
3787 } else {
3788 dev_err(&pdev->dev, "no suitable DMA available\n");
3789 goto clean1;
3790 }
edd16368
SC		 3791 }
3792
3793 /* make sure the board interrupts are off */
3794 h->access.set_intr_mask(h, HPSA_INTR_OFF);
10f66018
SC		 3795
3796 if (h->msix_vector || h->msi_vector)
3797 rc = request_irq(h->intr[PERF_MODE_INT], do_hpsa_intr_msi,
3798 IRQF_DISABLED, h->devname, h);
3799 else
3800 rc = request_irq(h->intr[PERF_MODE_INT], do_hpsa_intr_intx,
3801 IRQF_DISABLED, h->devname, h);
ecd9aad4 3802 if (rc) {
edd16368 3803 dev_err(&pdev->dev, "unable to get irq %d for %s\n",
303932fd 3804 h->intr[PERF_MODE_INT], h->devname);
edd16368
SC		 3805 goto clean2;
3806 }
3807
303932fd
DB		 3808 dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
3809 h->devname, pdev->device,
3810 h->intr[PERF_MODE_INT], dac ? "" : " not");
edd16368
SC		 3811
3812 h->cmd_pool_bits =
3813 kmalloc(((h->nr_cmds + BITS_PER_LONG -
3814 1) / BITS_PER_LONG) * sizeof(unsigned long), GFP_KERNEL);
3815 h->cmd_pool = pci_alloc_consistent(h->pdev,
3816 h->nr_cmds * sizeof(*h->cmd_pool),
3817 &(h->cmd_pool_dhandle));
3818 h->errinfo_pool = pci_alloc_consistent(h->pdev,
3819 h->nr_cmds * sizeof(*h->errinfo_pool),
3820 &(h->errinfo_pool_dhandle));
3821 if ((h->cmd_pool_bits == NULL)
3822 || (h->cmd_pool == NULL)
3823 || (h->errinfo_pool == NULL)) {
3824 dev_err(&pdev->dev, "out of memory");
ecd9aad4 3825 rc = -ENOMEM;
edd16368
SC		 3826 goto clean4;
3827 }
33a2ffce
SC		 3828 if (hpsa_allocate_sg_chain_blocks(h))
3829 goto clean4;
edd16368 3830 spin_lock_init(&h->lock);
a08a8471
SC		 3831 spin_lock_init(&h->scan_lock);
3832 init_waitqueue_head(&h->scan_wait_queue);
3833 h->scan_finished = 1; /* no scan currently in progress */
edd16368
SC		 3834
3835 pci_set_drvdata(pdev, h);
3836 memset(h->cmd_pool_bits, 0,
3837 ((h->nr_cmds + BITS_PER_LONG -
3838 1) / BITS_PER_LONG) * sizeof(unsigned long));
3839
3840 hpsa_scsi_setup(h);
3841
3842 /* Turn the interrupts on so we can service requests */
3843 h->access.set_intr_mask(h, HPSA_INTR_ON);
3844
303932fd 3845 hpsa_put_ctlr_into_performant_mode(h);
339b2b14 3846 hpsa_hba_inquiry(h);
edd16368
SC		 3847 hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
3848 h->busy_initializing = 0;
3849 return 1;
3850
3851clean4:
33a2ffce 3852 hpsa_free_sg_chain_blocks(h);
edd16368
SC		 3853 kfree(h->cmd_pool_bits);
3854 if (h->cmd_pool)
3855 pci_free_consistent(h->pdev,
3856 h->nr_cmds * sizeof(struct CommandList),
3857 h->cmd_pool, h->cmd_pool_dhandle);
3858 if (h->errinfo_pool)
3859 pci_free_consistent(h->pdev,
3860 h->nr_cmds * sizeof(struct ErrorInfo),
3861 h->errinfo_pool,
3862 h->errinfo_pool_dhandle);
303932fd 3863 free_irq(h->intr[PERF_MODE_INT], h);
edd16368
SC		 3864clean2:
3865clean1:
3866 h->busy_initializing = 0;
3867 kfree(h);
ecd9aad4 3868 return rc;
edd16368
SC		 3869}
3870
3871static void hpsa_flush_cache(struct ctlr_info *h)
3872{
3873 char *flush_buf;
3874 struct CommandList *c;
3875
3876 flush_buf = kzalloc(4, GFP_KERNEL);
3877 if (!flush_buf)
3878 return;
3879
3880 c = cmd_special_alloc(h);
3881 if (!c) {
3882 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
3883 goto out_of_memory;
3884 }
3885 fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
3886 RAID_CTLR_LUNID, TYPE_CMD);
3887 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
3888 if (c->err_info->CommandStatus != 0)
3889 dev_warn(&h->pdev->dev,
3890 "error flushing cache on controller\n");
3891 cmd_special_free(h, c);
3892out_of_memory:
3893 kfree(flush_buf);
3894}
3895
3896static void hpsa_shutdown(struct pci_dev *pdev)
3897{
3898 struct ctlr_info *h;
3899
3900 h = pci_get_drvdata(pdev);
3901 /* Turn board interrupts off and send the flush cache command
3902 * sendcmd will turn off interrupt, and send the flush...
3903 * To write all data in the battery backed cache to disks
3904 */
3905 hpsa_flush_cache(h);
3906 h->access.set_intr_mask(h, HPSA_INTR_OFF);
303932fd 3907 free_irq(h->intr[PERF_MODE_INT], h);
edd16368
SC		 3908#ifdef CONFIG_PCI_MSI
3909 if (h->msix_vector)
3910 pci_disable_msix(h->pdev);
3911 else if (h->msi_vector)
3912 pci_disable_msi(h->pdev);
3913#endif /* CONFIG_PCI_MSI */
3914}
3915
3916static void __devexit hpsa_remove_one(struct pci_dev *pdev)
3917{
3918 struct ctlr_info *h;
3919
3920 if (pci_get_drvdata(pdev) == NULL) {
3921 dev_err(&pdev->dev, "unable to remove device \n");
3922 return;
3923 }
3924 h = pci_get_drvdata(pdev);
edd16368
SC		 3925 hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
3926 hpsa_shutdown(pdev);
3927 iounmap(h->vaddr);
204892e9
SC		 3928 iounmap(h->transtable);
3929 iounmap(h->cfgtable);
33a2ffce 3930 hpsa_free_sg_chain_blocks(h);
edd16368
SC		 3931 pci_free_consistent(h->pdev,
3932 h->nr_cmds * sizeof(struct CommandList),
3933 h->cmd_pool, h->cmd_pool_dhandle);
3934 pci_free_consistent(h->pdev,
3935 h->nr_cmds * sizeof(struct ErrorInfo),
3936 h->errinfo_pool, h->errinfo_pool_dhandle);
303932fd
DB		 3937 pci_free_consistent(h->pdev, h->reply_pool_size,
3938 h->reply_pool, h->reply_pool_dhandle);
edd16368 3939 kfree(h->cmd_pool_bits);
303932fd 3940 kfree(h->blockFetchTable);
339b2b14 3941 kfree(h->hba_inquiry_data);
edd16368
SC		 3942 /*
3943 * Deliberately omit pci_disable_device(): it does something nasty to
3944 * Smart Array controllers that pci_enable_device does not undo
3945 */
3946 pci_release_regions(pdev);
3947 pci_set_drvdata(pdev, NULL);
edd16368
SC		 3948 kfree(h);
3949}
3950
3951static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
3952 __attribute__((unused)) pm_message_t state)
3953{
3954 return -ENOSYS;
3955}
3956
3957static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
3958{
3959 return -ENOSYS;
3960}
3961
3962static struct pci_driver hpsa_pci_driver = {
3963 .name = "hpsa",
3964 .probe = hpsa_init_one,
3965 .remove = __devexit_p(hpsa_remove_one),
3966 .id_table = hpsa_pci_device_id, /* id_table */
3967 .shutdown = hpsa_shutdown,
3968 .suspend = hpsa_suspend,
3969 .resume = hpsa_resume,
3970};
3971
303932fd
DB		 3972/* Fill in bucket_map[], given nsgs (the max number of
3973 * scatter gather elements supported) and bucket[],
3974 * which is an array of 8 integers. The bucket[] array
3975 * contains 8 different DMA transfer sizes (in 16
3976 * byte increments) which the controller uses to fetch
3977 * commands. This function fills in bucket_map[], which
3978 * maps a given number of scatter gather elements to one of
3979 * the 8 DMA transfer sizes. The point of it is to allow the
3980 * controller to only do as much DMA as needed to fetch the
3981 * command, with the DMA transfer size encoded in the lower
3982 * bits of the command address.
3983 */
3984static void calc_bucket_map(int bucket[], int num_buckets,
3985 int nsgs, int *bucket_map)
3986{
3987 int i, j, b, size;
3988
3989 /* even a command with 0 SGs requires 4 blocks */
3990#define MINIMUM_TRANSFER_BLOCKS 4
3991#define NUM_BUCKETS 8
3992 /* Note, bucket_map must have nsgs+1 entries. */
3993 for (i = 0; i <= nsgs; i++) {
3994 /* Compute size of a command with i SG entries */
3995 size = i + MINIMUM_TRANSFER_BLOCKS;
3996 b = num_buckets; /* Assume the biggest bucket */
3997 /* Find the bucket that is just big enough */
3998 for (j = 0; j < 8; j++) {
3999 if (bucket[j] >= size) {
4000 b = j;
4001 break;
4002 }
4003 }
4004 /* for a command with i SG entries, use bucket b. */
4005 bucket_map[i] = b;
4006 }
4007}
4008
6c311b57 4009static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h)
303932fd 4010{
6c311b57
SC		 4011 int i;
4012 unsigned long register_value;
def342bd
SC		 4013
4014 /* This is a bit complicated. There are 8 registers on
4015 * the controller which we write to to tell it 8 different
4016 * sizes of commands which there may be. It's a way of
4017 * reducing the DMA done to fetch each command. Encoded into
4018 * each command's tag are 3 bits which communicate to the controller
4019 * which of the eight sizes that command fits within. The size of
4020 * each command depends on how many scatter gather entries there are.
4021 * Each SG entry requires 16 bytes. The eight registers are programmed
4022 * with the number of 16-byte blocks a command of that size requires.
4023 * The smallest command possible requires 5 such 16 byte blocks.
4024 * the largest command possible requires MAXSGENTRIES + 4 16-byte
4025 * blocks. Note, this only extends to the SG entries contained
4026 * within the command block, and does not extend to chained blocks
4027 * of SG elements. bft[] contains the eight values we write to
4028 * the registers. They are not evenly distributed, but have more
4029 * sizes for small commands, and fewer sizes for larger commands.
4030 */
4031 int bft[8] = {5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
4032 BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
303932fd
DB		 4033 /* 5 = 1 s/g entry or 4k
4034 * 6 = 2 s/g entry or 8k
4035 * 8 = 4 s/g entry or 16k
4036 * 10 = 6 s/g entry or 24k
4037 */
303932fd
DB		 4038
4039 h->reply_pool_wraparound = 1; /* spec: init to 1 */
4040
4041 /* Controller spec: zero out this buffer. */
4042 memset(h->reply_pool, 0, h->reply_pool_size);
4043 h->reply_pool_head = h->reply_pool;
4044
303932fd
DB		 4045 bft[7] = h->max_sg_entries + 4;
4046 calc_bucket_map(bft, ARRAY_SIZE(bft), 32, h->blockFetchTable);
4047 for (i = 0; i < 8; i++)
4048 writel(bft[i], &h->transtable->BlockFetch[i]);
4049
4050 /* size of controller ring buffer */
4051 writel(h->max_commands, &h->transtable->RepQSize);
4052 writel(1, &h->transtable->RepQCount);
4053 writel(0, &h->transtable->RepQCtrAddrLow32);
4054 writel(0, &h->transtable->RepQCtrAddrHigh32);
4055 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
4056 writel(0, &h->transtable->RepQAddr0High32);
4057 writel(CFGTBL_Trans_Performant,
4058 &(h->cfgtable->HostWrite.TransportRequest));
4059 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3f4336f3 4060 hpsa_wait_for_mode_change_ack(h);
303932fd
DB		 4061 register_value = readl(&(h->cfgtable->TransportActive));
4062 if (!(register_value & CFGTBL_Trans_Performant)) {
4063 dev_warn(&h->pdev->dev, "unable to get board into"
4064 " performant mode\n");
4065 return;
4066 }
6c311b57
SC		 4067}
4068
4069static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
4070{
4071 u32 trans_support;
4072
4073 trans_support = readl(&(h->cfgtable->TransportSupport));
4074 if (!(trans_support & PERFORMANT_MODE))
4075 return;
4076
cba3d38b 4077 hpsa_get_max_perf_mode_cmds(h);
6c311b57
SC		 4078 h->max_sg_entries = 32;
4079 /* Performant mode ring buffer and supporting data structures */
4080 h->reply_pool_size = h->max_commands * sizeof(u64);
4081 h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
4082 &(h->reply_pool_dhandle));
4083
4084 /* Need a block fetch table for performant mode */
4085 h->blockFetchTable = kmalloc(((h->max_sg_entries+1) *
4086 sizeof(u32)), GFP_KERNEL);
4087
4088 if ((h->reply_pool == NULL)
4089 || (h->blockFetchTable == NULL))
4090 goto clean_up;
4091
4092 hpsa_enter_performant_mode(h);
303932fd
DB		 4093
4094 /* Change the access methods to the performant access methods */
4095 h->access = SA5_performant_access;
4096 h->transMethod = CFGTBL_Trans_Performant;
4097
4098 return;
4099
4100clean_up:
4101 if (h->reply_pool)
4102 pci_free_consistent(h->pdev, h->reply_pool_size,
4103 h->reply_pool, h->reply_pool_dhandle);
4104 kfree(h->blockFetchTable);
4105}
4106
edd16368
SC		 4107/*
4108 * This is it. Register the PCI driver information for the cards we control
4109 * the OS will call our registered routines when it finds one of our cards.
4110 */
4111static int __init hpsa_init(void)
4112{
31468401 4113 return pci_register_driver(&hpsa_pci_driver);
edd16368
SC		 4114}
4115
4116static void __exit hpsa_cleanup(void)
4117{
4118 pci_unregister_driver(&hpsa_pci_driver);
edd16368
SC		 4119}
4120
4121module_init(hpsa_init);
4122module_exit(hpsa_cleanup);
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