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CommitLineData
1da177e4
LT
1#include <linux/types.h>
2#include <linux/mm.h>
5a0e3ad6 3#include <linux/slab.h>
1da177e4 4#include <linux/blkdev.h>
1da177e4
LT
5#include <linux/init.h>
6#include <linux/interrupt.h>
7
8#include <asm/setup.h>
9#include <asm/page.h>
10#include <asm/pgtable.h>
11#include <asm/amigaints.h>
12#include <asm/amigahw.h>
13#include <linux/zorro.h>
14#include <asm/irq.h>
15#include <linux/spinlock.h>
16
17#include "scsi.h"
18#include <scsi/scsi_host.h>
19#include "wd33c93.h"
20#include "gvp11.h"
21
bb17b787 22#include <linux/stat.h>
1da177e4 23
1da177e4 24
bb17b787 25#define DMA(ptr) ((gvp11_scsiregs *)((ptr)->base))
bb17b787
GU
26
27static irqreturn_t gvp11_intr(int irq, void *_instance)
1da177e4 28{
bb17b787
GU
29 unsigned long flags;
30 unsigned int status;
31 struct Scsi_Host *instance = (struct Scsi_Host *)_instance;
32
33 status = DMA(instance)->CNTR;
34 if (!(status & GVP11_DMAC_INT_PENDING))
35 return IRQ_NONE;
36
37 spin_lock_irqsave(instance->host_lock, flags);
38 wd33c93_intr(instance);
39 spin_unlock_irqrestore(instance->host_lock, flags);
40 return IRQ_HANDLED;
1da177e4
LT
41}
42
43static int gvp11_xfer_mask = 0;
44
bb17b787 45void gvp11_setup(char *str, int *ints)
1da177e4 46{
bb17b787 47 gvp11_xfer_mask = ints[1];
1da177e4
LT
48}
49
65396410 50static int dma_setup(struct scsi_cmnd *cmd, int dir_in)
1da177e4 51{
52c3d8a6
GU
52 struct Scsi_Host *instance = cmd->device->host;
53 struct WD33C93_hostdata *hdata = shost_priv(instance);
bb17b787
GU
54 unsigned short cntr = GVP11_DMAC_INT_ENABLE;
55 unsigned long addr = virt_to_bus(cmd->SCp.ptr);
56 int bank_mask;
57 static int scsi_alloc_out_of_range = 0;
1da177e4 58
bb17b787 59 /* use bounce buffer if the physical address is bad */
52c3d8a6
GU
60 if (addr & hdata->dma_xfer_mask) {
61 hdata->dma_bounce_len = (cmd->SCp.this_residual + 511) & ~0x1ff;
bb17b787
GU
62
63 if (!scsi_alloc_out_of_range) {
52c3d8a6
GU
64 hdata->dma_bounce_buffer =
65 kmalloc(hdata->dma_bounce_len, GFP_KERNEL);
66 hdata->dma_buffer_pool = BUF_SCSI_ALLOCED;
bb17b787 67 }
1da177e4 68
bb17b787 69 if (scsi_alloc_out_of_range ||
52c3d8a6
GU
70 !hdata->dma_bounce_buffer) {
71 hdata->dma_bounce_buffer =
72 amiga_chip_alloc(hdata->dma_bounce_len,
bb17b787 73 "GVP II SCSI Bounce Buffer");
1da177e4 74
52c3d8a6
GU
75 if (!hdata->dma_bounce_buffer) {
76 hdata->dma_bounce_len = 0;
bb17b787
GU
77 return 1;
78 }
1da177e4 79
52c3d8a6 80 hdata->dma_buffer_pool = BUF_CHIP_ALLOCED;
bb17b787 81 }
1da177e4 82
bb17b787 83 /* check if the address of the bounce buffer is OK */
52c3d8a6 84 addr = virt_to_bus(hdata->dma_bounce_buffer);
bb17b787 85
52c3d8a6 86 if (addr & hdata->dma_xfer_mask) {
bb17b787 87 /* fall back to Chip RAM if address out of range */
52c3d8a6
GU
88 if (hdata->dma_buffer_pool == BUF_SCSI_ALLOCED) {
89 kfree(hdata->dma_bounce_buffer);
bb17b787
GU
90 scsi_alloc_out_of_range = 1;
91 } else {
52c3d8a6 92 amiga_chip_free(hdata->dma_bounce_buffer);
bb17b787
GU
93 }
94
52c3d8a6
GU
95 hdata->dma_bounce_buffer =
96 amiga_chip_alloc(hdata->dma_bounce_len,
bb17b787
GU
97 "GVP II SCSI Bounce Buffer");
98
52c3d8a6
GU
99 if (!hdata->dma_bounce_buffer) {
100 hdata->dma_bounce_len = 0;
bb17b787
GU
101 return 1;
102 }
103
52c3d8a6
GU
104 addr = virt_to_bus(hdata->dma_bounce_buffer);
105 hdata->dma_buffer_pool = BUF_CHIP_ALLOCED;
bb17b787
GU
106 }
107
108 if (!dir_in) {
109 /* copy to bounce buffer for a write */
52c3d8a6
GU
110 memcpy(hdata->dma_bounce_buffer, cmd->SCp.ptr,
111 cmd->SCp.this_residual);
bb17b787 112 }
1da177e4 113 }
1da177e4 114
bb17b787
GU
115 /* setup dma direction */
116 if (!dir_in)
117 cntr |= GVP11_DMAC_DIR_WRITE;
1da177e4 118
52c3d8a6 119 hdata->dma_dir = dir_in;
bb17b787 120 DMA(cmd->device->host)->CNTR = cntr;
1da177e4 121
bb17b787
GU
122 /* setup DMA *physical* address */
123 DMA(cmd->device->host)->ACR = addr;
1da177e4 124
bb17b787
GU
125 if (dir_in) {
126 /* invalidate any cache */
127 cache_clear(addr, cmd->SCp.this_residual);
128 } else {
129 /* push any dirty cache */
130 cache_push(addr, cmd->SCp.this_residual);
131 }
1da177e4 132
52c3d8a6
GU
133 bank_mask = (~hdata->dma_xfer_mask >> 18) & 0x01c0;
134 if (bank_mask)
bb17b787 135 DMA(cmd->device->host)->BANK = bank_mask & (addr >> 18);
1da177e4 136
bb17b787
GU
137 /* start DMA */
138 DMA(cmd->device->host)->ST_DMA = 1;
1da177e4 139
bb17b787
GU
140 /* return success */
141 return 0;
1da177e4
LT
142}
143
65396410
HK
144static void dma_stop(struct Scsi_Host *instance, struct scsi_cmnd *SCpnt,
145 int status)
1da177e4 146{
52c3d8a6
GU
147 struct WD33C93_hostdata *hdata = shost_priv(instance);
148
bb17b787
GU
149 /* stop DMA */
150 DMA(instance)->SP_DMA = 1;
151 /* remove write bit from CONTROL bits */
152 DMA(instance)->CNTR = GVP11_DMAC_INT_ENABLE;
153
154 /* copy from a bounce buffer, if necessary */
52c3d8a6
GU
155 if (status && hdata->dma_bounce_buffer) {
156 if (hdata->dma_dir && SCpnt)
157 memcpy(SCpnt->SCp.ptr, hdata->dma_bounce_buffer,
bb17b787
GU
158 SCpnt->SCp.this_residual);
159
52c3d8a6
GU
160 if (hdata->dma_buffer_pool == BUF_SCSI_ALLOCED)
161 kfree(hdata->dma_bounce_buffer);
bb17b787 162 else
52c3d8a6 163 amiga_chip_free(hdata->dma_bounce_buffer);
bb17b787 164
52c3d8a6
GU
165 hdata->dma_bounce_buffer = NULL;
166 hdata->dma_bounce_len = 0;
bb17b787 167 }
1da177e4
LT
168}
169
170#define CHECK_WD33C93
171
d0be4a7d 172int __init gvp11_detect(struct scsi_host_template *tpnt)
1da177e4 173{
bb17b787
GU
174 static unsigned char called = 0;
175 struct Scsi_Host *instance;
176 unsigned long address;
177 unsigned int epc;
178 struct zorro_dev *z = NULL;
179 unsigned int default_dma_xfer_mask;
52c3d8a6 180 struct WD33C93_hostdata *hdata;
bb17b787
GU
181 wd33c93_regs regs;
182 int num_gvp11 = 0;
1da177e4 183#ifdef CHECK_WD33C93
bb17b787
GU
184 volatile unsigned char *sasr_3393, *scmd_3393;
185 unsigned char save_sasr;
186 unsigned char q, qq;
1da177e4
LT
187#endif
188
bb17b787
GU
189 if (!MACH_IS_AMIGA || called)
190 return 0;
191 called = 1;
192
193 tpnt->proc_name = "GVP11";
194 tpnt->proc_info = &wd33c93_proc_info;
195
196 while ((z = zorro_find_device(ZORRO_WILDCARD, z))) {
197 /*
198 * This should (hopefully) be the correct way to identify
199 * all the different GVP SCSI controllers (except for the
200 * SERIES I though).
201 */
202
203 if (z->id == ZORRO_PROD_GVP_COMBO_030_R3_SCSI ||
204 z->id == ZORRO_PROD_GVP_SERIES_II)
205 default_dma_xfer_mask = ~0x00ffffff;
206 else if (z->id == ZORRO_PROD_GVP_GFORCE_030_SCSI ||
207 z->id == ZORRO_PROD_GVP_A530_SCSI ||
208 z->id == ZORRO_PROD_GVP_COMBO_030_R4_SCSI)
209 default_dma_xfer_mask = ~0x01ffffff;
210 else if (z->id == ZORRO_PROD_GVP_A1291 ||
211 z->id == ZORRO_PROD_GVP_GFORCE_040_SCSI_1)
212 default_dma_xfer_mask = ~0x07ffffff;
213 else
214 continue;
215
216 /*
217 * Rumors state that some GVP ram boards use the same product
218 * code as the SCSI controllers. Therefore if the board-size
219 * is not 64KB we asume it is a ram board and bail out.
220 */
221 if (z->resource.end - z->resource.start != 0xffff)
222 continue;
223
224 address = z->resource.start;
225 if (!request_mem_region(address, 256, "wd33c93"))
226 continue;
1da177e4
LT
227
228#ifdef CHECK_WD33C93
229
bb17b787
GU
230 /*
231 * These darn GVP boards are a problem - it can be tough to tell
232 * whether or not they include a SCSI controller. This is the
233 * ultimate Yet-Another-GVP-Detection-Hack in that it actually
234 * probes for a WD33c93 chip: If we find one, it's extremely
235 * likely that this card supports SCSI, regardless of Product_
236 * Code, Board_Size, etc.
237 */
238
239 /* Get pointers to the presumed register locations and save contents */
240
241 sasr_3393 = &(((gvp11_scsiregs *)(ZTWO_VADDR(address)))->SASR);
242 scmd_3393 = &(((gvp11_scsiregs *)(ZTWO_VADDR(address)))->SCMD);
243 save_sasr = *sasr_3393;
244
245 /* First test the AuxStatus Reg */
246
247 q = *sasr_3393; /* read it */
248 if (q & 0x08) /* bit 3 should always be clear */
249 goto release;
250 *sasr_3393 = WD_AUXILIARY_STATUS; /* setup indirect address */
251 if (*sasr_3393 == WD_AUXILIARY_STATUS) { /* shouldn't retain the write */
252 *sasr_3393 = save_sasr; /* Oops - restore this byte */
253 goto release;
1da177e4 254 }
bb17b787
GU
255 if (*sasr_3393 != q) { /* should still read the same */
256 *sasr_3393 = save_sasr; /* Oops - restore this byte */
257 goto release;
1da177e4 258 }
bb17b787
GU
259 if (*scmd_3393 != q) /* and so should the image at 0x1f */
260 goto release;
261
262 /*
263 * Ok, we probably have a wd33c93, but let's check a few other places
264 * for good measure. Make sure that this works for both 'A and 'B
265 * chip versions.
266 */
267
268 *sasr_3393 = WD_SCSI_STATUS;
269 q = *scmd_3393;
270 *sasr_3393 = WD_SCSI_STATUS;
271 *scmd_3393 = ~q;
272 *sasr_3393 = WD_SCSI_STATUS;
273 qq = *scmd_3393;
274 *sasr_3393 = WD_SCSI_STATUS;
275 *scmd_3393 = q;
276 if (qq != q) /* should be read only */
277 goto release;
278 *sasr_3393 = 0x1e; /* this register is unimplemented */
279 q = *scmd_3393;
280 *sasr_3393 = 0x1e;
281 *scmd_3393 = ~q;
282 *sasr_3393 = 0x1e;
283 qq = *scmd_3393;
284 *sasr_3393 = 0x1e;
285 *scmd_3393 = q;
286 if (qq != q || qq != 0xff) /* should be read only, all 1's */
287 goto release;
288 *sasr_3393 = WD_TIMEOUT_PERIOD;
289 q = *scmd_3393;
290 *sasr_3393 = WD_TIMEOUT_PERIOD;
291 *scmd_3393 = ~q;
292 *sasr_3393 = WD_TIMEOUT_PERIOD;
293 qq = *scmd_3393;
294 *sasr_3393 = WD_TIMEOUT_PERIOD;
295 *scmd_3393 = q;
296 if (qq != (~q & 0xff)) /* should be read/write */
297 goto release;
1da177e4
LT
298#endif
299
bb17b787
GU
300 instance = scsi_register(tpnt, sizeof(struct WD33C93_hostdata));
301 if (instance == NULL)
302 goto release;
303 instance->base = ZTWO_VADDR(address);
304 instance->irq = IRQ_AMIGA_PORTS;
305 instance->unique_id = z->slotaddr;
306
52c3d8a6 307 hdata = shost_priv(instance);
bb17b787 308 if (gvp11_xfer_mask)
52c3d8a6 309 hdata->dma_xfer_mask = gvp11_xfer_mask;
bb17b787 310 else
52c3d8a6 311 hdata->dma_xfer_mask = default_dma_xfer_mask;
bb17b787
GU
312
313 DMA(instance)->secret2 = 1;
314 DMA(instance)->secret1 = 0;
315 DMA(instance)->secret3 = 15;
316 while (DMA(instance)->CNTR & GVP11_DMAC_BUSY)
317 ;
318 DMA(instance)->CNTR = 0;
319
320 DMA(instance)->BANK = 0;
321
322 epc = *(unsigned short *)(ZTWO_VADDR(address) + 0x8000);
323
324 /*
325 * Check for 14MHz SCSI clock
326 */
327 regs.SASR = &(DMA(instance)->SASR);
328 regs.SCMD = &(DMA(instance)->SCMD);
52c3d8a6
GU
329 hdata->no_sync = 0xff;
330 hdata->fast = 0;
331 hdata->dma_mode = CTRL_DMA;
bb17b787
GU
332 wd33c93_init(instance, regs, dma_setup, dma_stop,
333 (epc & GVP_SCSICLKMASK) ? WD33C93_FS_8_10
334 : WD33C93_FS_12_15);
335
336 if (request_irq(IRQ_AMIGA_PORTS, gvp11_intr, IRQF_SHARED,
337 "GVP11 SCSI", instance))
338 goto unregister;
339 DMA(instance)->CNTR = GVP11_DMAC_INT_ENABLE;
340 num_gvp11++;
341 continue;
1da177e4 342
d38f47a9 343unregister:
bb17b787 344 scsi_unregister(instance);
1da177e4 345release:
bb17b787
GU
346 release_mem_region(address, 256);
347 }
1da177e4 348
bb17b787 349 return num_gvp11;
1da177e4
LT
350}
351
65396410 352static int gvp11_bus_reset(struct scsi_cmnd *cmd)
1da177e4
LT
353{
354 /* FIXME perform bus-specific reset */
68b3aa7c 355
df0ae249
JG
356 /* FIXME 2: shouldn't we no-op this function (return
357 FAILED), and fall back to host reset function,
358 wd33c93_host_reset ? */
359
68b3aa7c 360 spin_lock_irq(cmd->device->host->host_lock);
1da177e4 361 wd33c93_host_reset(cmd);
68b3aa7c
JG
362 spin_unlock_irq(cmd->device->host->host_lock);
363
1da177e4
LT
364 return SUCCESS;
365}
366
367
368#define HOSTS_C
369
370#include "gvp11.h"
371
d0be4a7d 372static struct scsi_host_template driver_template = {
1da177e4
LT
373 .proc_name = "GVP11",
374 .name = "GVP Series II SCSI",
375 .detect = gvp11_detect,
376 .release = gvp11_release,
377 .queuecommand = wd33c93_queuecommand,
378 .eh_abort_handler = wd33c93_abort,
379 .eh_bus_reset_handler = gvp11_bus_reset,
380 .eh_host_reset_handler = wd33c93_host_reset,
381 .can_queue = CAN_QUEUE,
382 .this_id = 7,
383 .sg_tablesize = SG_ALL,
384 .cmd_per_lun = CMD_PER_LUN,
385 .use_clustering = DISABLE_CLUSTERING
386};
387
388
389#include "scsi_module.c"
390
391int gvp11_release(struct Scsi_Host *instance)
392{
393#ifdef MODULE
bb17b787
GU
394 DMA(instance)->CNTR = 0;
395 release_mem_region(ZTWO_PADDR(instance->base), 256);
396 free_irq(IRQ_AMIGA_PORTS, instance);
1da177e4 397#endif
bb17b787 398 return 1;
1da177e4
LT
399}
400
401MODULE_LICENSE("GPL");