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qeth: do not spin for SETIP ip assist command
[net-next-2.6.git] / drivers / s390 / net / qeth_core_main.c
CommitLineData
4a71df50
FB		 1/*
2 * drivers/s390/net/qeth_core_main.c
3 *
4 * Copyright IBM Corp. 2007
5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
6 * Frank Pavlic <fpavlic@de.ibm.com>,
7 * Thomas Spatzier <tspat@de.ibm.com>,
8 * Frank Blaschka <frank.blaschka@de.ibm.com>
9 */
10
74eacdb9
FB		 11#define KMSG_COMPONENT "qeth"
12#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
13
4a71df50
FB		 14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/string.h>
17#include <linux/errno.h>
18#include <linux/kernel.h>
19#include <linux/ip.h>
20#include <linux/ipv6.h>
21#include <linux/tcp.h>
22#include <linux/mii.h>
23#include <linux/kthread.h>
24
ab4227cb
MS		 25#include <asm/ebcdic.h>
26#include <asm/io.h>
4a71df50
FB		 27#include <asm/s390_rdev.h>
28
29#include "qeth_core.h"
30#include "qeth_core_offl.h"
31
d11ba0c4
PT		 32struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
33 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
34 /* N P A M L V H */
35 [QETH_DBF_SETUP] = {"qeth_setup",
36 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
37 [QETH_DBF_QERR] = {"qeth_qerr",
38 2, 1, 8, 2, &debug_hex_ascii_view, NULL},
39 [QETH_DBF_TRACE] = {"qeth_trace",
40 4, 1, 8, 3, &debug_hex_ascii_view, NULL},
41 [QETH_DBF_MSG] = {"qeth_msg",
42 8, 1, 128, 3, &debug_sprintf_view, NULL},
43 [QETH_DBF_SENSE] = {"qeth_sense",
44 2, 1, 64, 2, &debug_hex_ascii_view, NULL},
45 [QETH_DBF_MISC] = {"qeth_misc",
46 2, 1, 256, 2, &debug_hex_ascii_view, NULL},
47 [QETH_DBF_CTRL] = {"qeth_control",
48 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
49};
50EXPORT_SYMBOL_GPL(qeth_dbf);
4a71df50
FB		 51
52struct qeth_card_list_struct qeth_core_card_list;
53EXPORT_SYMBOL_GPL(qeth_core_card_list);
683d718a
FB		 54struct kmem_cache *qeth_core_header_cache;
55EXPORT_SYMBOL_GPL(qeth_core_header_cache);
4a71df50
FB		 56
57static struct device *qeth_core_root_dev;
58static unsigned int known_devices[][10] = QETH_MODELLIST_ARRAY;
59static struct lock_class_key qdio_out_skb_queue_key;
4a71df50
FB		 60
61static void qeth_send_control_data_cb(struct qeth_channel *,
62 struct qeth_cmd_buffer *);
63static int qeth_issue_next_read(struct qeth_card *);
64static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
65static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
66static void qeth_free_buffer_pool(struct qeth_card *);
67static int qeth_qdio_establish(struct qeth_card *);
68
69
70static inline void __qeth_fill_buffer_frag(struct sk_buff *skb,
71 struct qdio_buffer *buffer, int is_tso,
72 int *next_element_to_fill)
73{
74 struct skb_frag_struct *frag;
75 int fragno;
76 unsigned long addr;
77 int element, cnt, dlen;
78
79 fragno = skb_shinfo(skb)->nr_frags;
80 element = *next_element_to_fill;
81 dlen = 0;
82
83 if (is_tso)
84 buffer->element[element].flags =
85 SBAL_FLAGS_MIDDLE_FRAG;
86 else
87 buffer->element[element].flags =
88 SBAL_FLAGS_FIRST_FRAG;
89 dlen = skb->len - skb->data_len;
90 if (dlen) {
91 buffer->element[element].addr = skb->data;
92 buffer->element[element].length = dlen;
93 element++;
94 }
95 for (cnt = 0; cnt < fragno; cnt++) {
96 frag = &skb_shinfo(skb)->frags[cnt];
97 addr = (page_to_pfn(frag->page) << PAGE_SHIFT) +
98 frag->page_offset;
99 buffer->element[element].addr = (char *)addr;
100 buffer->element[element].length = frag->size;
101 if (cnt < (fragno - 1))
102 buffer->element[element].flags =
103 SBAL_FLAGS_MIDDLE_FRAG;
104 else
105 buffer->element[element].flags =
106 SBAL_FLAGS_LAST_FRAG;
107 element++;
108 }
109 *next_element_to_fill = element;
110}
111
112static inline const char *qeth_get_cardname(struct qeth_card *card)
113{
114 if (card->info.guestlan) {
115 switch (card->info.type) {
116 case QETH_CARD_TYPE_OSAE:
117 return " Guest LAN QDIO";
118 case QETH_CARD_TYPE_IQD:
119 return " Guest LAN Hiper";
120 default:
121 return " unknown";
122 }
123 } else {
124 switch (card->info.type) {
125 case QETH_CARD_TYPE_OSAE:
126 return " OSD Express";
127 case QETH_CARD_TYPE_IQD:
128 return " HiperSockets";
129 case QETH_CARD_TYPE_OSN:
130 return " OSN QDIO";
131 default:
132 return " unknown";
133 }
134 }
135 return " n/a";
136}
137
138/* max length to be returned: 14 */
139const char *qeth_get_cardname_short(struct qeth_card *card)
140{
141 if (card->info.guestlan) {
142 switch (card->info.type) {
143 case QETH_CARD_TYPE_OSAE:
144 return "GuestLAN QDIO";
145 case QETH_CARD_TYPE_IQD:
146 return "GuestLAN Hiper";
147 default:
148 return "unknown";
149 }
150 } else {
151 switch (card->info.type) {
152 case QETH_CARD_TYPE_OSAE:
153 switch (card->info.link_type) {
154 case QETH_LINK_TYPE_FAST_ETH:
155 return "OSD_100";
156 case QETH_LINK_TYPE_HSTR:
157 return "HSTR";
158 case QETH_LINK_TYPE_GBIT_ETH:
159 return "OSD_1000";
160 case QETH_LINK_TYPE_10GBIT_ETH:
161 return "OSD_10GIG";
162 case QETH_LINK_TYPE_LANE_ETH100:
163 return "OSD_FE_LANE";
164 case QETH_LINK_TYPE_LANE_TR:
165 return "OSD_TR_LANE";
166 case QETH_LINK_TYPE_LANE_ETH1000:
167 return "OSD_GbE_LANE";
168 case QETH_LINK_TYPE_LANE:
169 return "OSD_ATM_LANE";
170 default:
171 return "OSD_Express";
172 }
173 case QETH_CARD_TYPE_IQD:
174 return "HiperSockets";
175 case QETH_CARD_TYPE_OSN:
176 return "OSN";
177 default:
178 return "unknown";
179 }
180 }
181 return "n/a";
182}
183
184void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
185 int clear_start_mask)
186{
187 unsigned long flags;
188
189 spin_lock_irqsave(&card->thread_mask_lock, flags);
190 card->thread_allowed_mask = threads;
191 if (clear_start_mask)
192 card->thread_start_mask &= threads;
193 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
194 wake_up(&card->wait_q);
195}
196EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
197
198int qeth_threads_running(struct qeth_card *card, unsigned long threads)
199{
200 unsigned long flags;
201 int rc = 0;
202
203 spin_lock_irqsave(&card->thread_mask_lock, flags);
204 rc = (card->thread_running_mask & threads);
205 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
206 return rc;
207}
208EXPORT_SYMBOL_GPL(qeth_threads_running);
209
210int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
211{
212 return wait_event_interruptible(card->wait_q,
213 qeth_threads_running(card, threads) == 0);
214}
215EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
216
217void qeth_clear_working_pool_list(struct qeth_card *card)
218{
219 struct qeth_buffer_pool_entry *pool_entry, *tmp;
220
d11ba0c4 221 QETH_DBF_TEXT(TRACE, 5, "clwrklst");
4a71df50
FB		 222 list_for_each_entry_safe(pool_entry, tmp,
223 &card->qdio.in_buf_pool.entry_list, list){
224 list_del(&pool_entry->list);
225 }
226}
227EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
228
229static int qeth_alloc_buffer_pool(struct qeth_card *card)
230{
231 struct qeth_buffer_pool_entry *pool_entry;
232 void *ptr;
233 int i, j;
234
d11ba0c4 235 QETH_DBF_TEXT(TRACE, 5, "alocpool");
4a71df50
FB		 236 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
237 pool_entry = kmalloc(sizeof(*pool_entry), GFP_KERNEL);
238 if (!pool_entry) {
239 qeth_free_buffer_pool(card);
240 return -ENOMEM;
241 }
242 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
508b3c4f 243 ptr = (void *) __get_free_page(GFP_KERNEL);
4a71df50
FB		 244 if (!ptr) {
245 while (j > 0)
246 free_page((unsigned long)
247 pool_entry->elements[--j]);
248 kfree(pool_entry);
249 qeth_free_buffer_pool(card);
250 return -ENOMEM;
251 }
252 pool_entry->elements[j] = ptr;
253 }
254 list_add(&pool_entry->init_list,
255 &card->qdio.init_pool.entry_list);
256 }
257 return 0;
258}
259
260int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
261{
d11ba0c4 262 QETH_DBF_TEXT(TRACE, 2, "realcbp");
4a71df50
FB		 263
264 if ((card->state != CARD_STATE_DOWN) &&
265 (card->state != CARD_STATE_RECOVER))
266 return -EPERM;
267
268 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
269 qeth_clear_working_pool_list(card);
270 qeth_free_buffer_pool(card);
271 card->qdio.in_buf_pool.buf_count = bufcnt;
272 card->qdio.init_pool.buf_count = bufcnt;
273 return qeth_alloc_buffer_pool(card);
274}
275
276int qeth_set_large_send(struct qeth_card *card,
277 enum qeth_large_send_types type)
278{
279 int rc = 0;
280
281 if (card->dev == NULL) {
282 card->options.large_send = type;
283 return 0;
284 }
285 if (card->state == CARD_STATE_UP)
286 netif_tx_disable(card->dev);
287 card->options.large_send = type;
288 switch (card->options.large_send) {
289 case QETH_LARGE_SEND_EDDP:
290 card->dev->features |= NETIF_F_TSO | NETIF_F_SG |
291 NETIF_F_HW_CSUM;
292 break;
293 case QETH_LARGE_SEND_TSO:
294 if (qeth_is_supported(card, IPA_OUTBOUND_TSO)) {
295 card->dev->features |= NETIF_F_TSO | NETIF_F_SG |
296 NETIF_F_HW_CSUM;
297 } else {
4a71df50
FB		 298 card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG |
299 NETIF_F_HW_CSUM);
300 card->options.large_send = QETH_LARGE_SEND_NO;
301 rc = -EOPNOTSUPP;
302 }
303 break;
304 default: /* includes QETH_LARGE_SEND_NO */
305 card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG |
306 NETIF_F_HW_CSUM);
307 break;
308 }
309 if (card->state == CARD_STATE_UP)
310 netif_wake_queue(card->dev);
311 return rc;
312}
313EXPORT_SYMBOL_GPL(qeth_set_large_send);
314
315static int qeth_issue_next_read(struct qeth_card *card)
316{
317 int rc;
318 struct qeth_cmd_buffer *iob;
319
d11ba0c4 320 QETH_DBF_TEXT(TRACE, 5, "issnxrd");
4a71df50
FB		 321 if (card->read.state != CH_STATE_UP)
322 return -EIO;
323 iob = qeth_get_buffer(&card->read);
324 if (!iob) {
74eacdb9
FB		 325 dev_warn(&card->gdev->dev, "The qeth device driver "
326 "failed to recover an error on the device\n");
327 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
328 "available\n", dev_name(&card->gdev->dev));
4a71df50
FB		 329 return -ENOMEM;
330 }
331 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
d11ba0c4 332 QETH_DBF_TEXT(TRACE, 6, "noirqpnd");
4a71df50
FB		 333 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
334 (addr_t) iob, 0, 0);
335 if (rc) {
74eacdb9
FB		 336 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
337 "rc=%i\n", dev_name(&card->gdev->dev), rc);
4a71df50
FB		 338 atomic_set(&card->read.irq_pending, 0);
339 qeth_schedule_recovery(card);
340 wake_up(&card->wait_q);
341 }
342 return rc;
343}
344
345static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
346{
347 struct qeth_reply *reply;
348
349 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
350 if (reply) {
351 atomic_set(&reply->refcnt, 1);
352 atomic_set(&reply->received, 0);
353 reply->card = card;
354 };
355 return reply;
356}
357
358static void qeth_get_reply(struct qeth_reply *reply)
359{
360 WARN_ON(atomic_read(&reply->refcnt) <= 0);
361 atomic_inc(&reply->refcnt);
362}
363
364static void qeth_put_reply(struct qeth_reply *reply)
365{
366 WARN_ON(atomic_read(&reply->refcnt) <= 0);
367 if (atomic_dec_and_test(&reply->refcnt))
368 kfree(reply);
369}
370
d11ba0c4 371static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
4a71df50
FB		 372 struct qeth_card *card)
373{
4a71df50 374 char *ipa_name;
d11ba0c4 375 int com = cmd->hdr.command;
4a71df50 376 ipa_name = qeth_get_ipa_cmd_name(com);
d11ba0c4
PT		 377 if (rc)
378 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s returned x%X \"%s\"\n",
379 ipa_name, com, QETH_CARD_IFNAME(card),
380 rc, qeth_get_ipa_msg(rc));
381 else
382 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s succeeded\n",
383 ipa_name, com, QETH_CARD_IFNAME(card));
4a71df50
FB		 384}
385
386static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
387 struct qeth_cmd_buffer *iob)
388{
389 struct qeth_ipa_cmd *cmd = NULL;
390
d11ba0c4 391 QETH_DBF_TEXT(TRACE, 5, "chkipad");
4a71df50
FB		 392 if (IS_IPA(iob->data)) {
393 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
394 if (IS_IPA_REPLY(cmd)) {
d11ba0c4
PT		 395 if (cmd->hdr.command < IPA_CMD_SETCCID ||
396 cmd->hdr.command > IPA_CMD_MODCCID)
397 qeth_issue_ipa_msg(cmd,
398 cmd->hdr.return_code, card);
4a71df50
FB		 399 return cmd;
400 } else {
401 switch (cmd->hdr.command) {
402 case IPA_CMD_STOPLAN:
74eacdb9
FB		 403 dev_warn(&card->gdev->dev,
404 "The link for interface %s on CHPID"
405 " 0x%X failed\n",
4a71df50
FB		 406 QETH_CARD_IFNAME(card),
407 card->info.chpid);
408 card->lan_online = 0;
409 if (card->dev && netif_carrier_ok(card->dev))
410 netif_carrier_off(card->dev);
411 return NULL;
412 case IPA_CMD_STARTLAN:
74eacdb9
FB		 413 dev_info(&card->gdev->dev,
414 "The link for %s on CHPID 0x%X has"
415 " been restored\n",
4a71df50
FB		 416 QETH_CARD_IFNAME(card),
417 card->info.chpid);
418 netif_carrier_on(card->dev);
922dc062 419 card->lan_online = 1;
4a71df50
FB		 420 qeth_schedule_recovery(card);
421 return NULL;
422 case IPA_CMD_MODCCID:
423 return cmd;
424 case IPA_CMD_REGISTER_LOCAL_ADDR:
d11ba0c4 425 QETH_DBF_TEXT(TRACE, 3, "irla");
4a71df50
FB		 426 break;
427 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
d11ba0c4 428 QETH_DBF_TEXT(TRACE, 3, "urla");
4a71df50
FB		 429 break;
430 default:
c4cef07c 431 QETH_DBF_MESSAGE(2, "Received data is IPA "
4a71df50
FB		 432 "but not a reply!\n");
433 break;
434 }
435 }
436 }
437 return cmd;
438}
439
440void qeth_clear_ipacmd_list(struct qeth_card *card)
441{
442 struct qeth_reply *reply, *r;
443 unsigned long flags;
444
d11ba0c4 445 QETH_DBF_TEXT(TRACE, 4, "clipalst");
4a71df50
FB		 446
447 spin_lock_irqsave(&card->lock, flags);
448 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
449 qeth_get_reply(reply);
450 reply->rc = -EIO;
451 atomic_inc(&reply->received);
452 list_del_init(&reply->list);
453 wake_up(&reply->wait_q);
454 qeth_put_reply(reply);
455 }
456 spin_unlock_irqrestore(&card->lock, flags);
457}
458EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
459
460static int qeth_check_idx_response(unsigned char *buffer)
461{
462 if (!buffer)
463 return 0;
464
d11ba0c4 465 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
4a71df50 466 if ((buffer[2] & 0xc0) == 0xc0) {
74eacdb9 467 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
4a71df50
FB		 468 "with cause code 0x%02x%s\n",
469 buffer[4],
470 ((buffer[4] == 0x22) ?
471 " -- try another portname" : ""));
d11ba0c4
PT		 472 QETH_DBF_TEXT(TRACE, 2, "ckidxres");
473 QETH_DBF_TEXT(TRACE, 2, " idxterm");
474 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO);
4a71df50
FB		 475 return -EIO;
476 }
477 return 0;
478}
479
480static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
481 __u32 len)
482{
483 struct qeth_card *card;
484
d11ba0c4 485 QETH_DBF_TEXT(TRACE, 4, "setupccw");
4a71df50
FB		 486 card = CARD_FROM_CDEV(channel->ccwdev);
487 if (channel == &card->read)
488 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
489 else
490 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
491 channel->ccw.count = len;
492 channel->ccw.cda = (__u32) __pa(iob);
493}
494
495static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
496{
497 __u8 index;
498
d11ba0c4 499 QETH_DBF_TEXT(TRACE, 6, "getbuff");
4a71df50
FB		 500 index = channel->io_buf_no;
501 do {
502 if (channel->iob[index].state == BUF_STATE_FREE) {
503 channel->iob[index].state = BUF_STATE_LOCKED;
504 channel->io_buf_no = (channel->io_buf_no + 1) %
505 QETH_CMD_BUFFER_NO;
506 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
507 return channel->iob + index;
508 }
509 index = (index + 1) % QETH_CMD_BUFFER_NO;
510 } while (index != channel->io_buf_no);
511
512 return NULL;
513}
514
515void qeth_release_buffer(struct qeth_channel *channel,
516 struct qeth_cmd_buffer *iob)
517{
518 unsigned long flags;
519
d11ba0c4 520 QETH_DBF_TEXT(TRACE, 6, "relbuff");
4a71df50
FB		 521 spin_lock_irqsave(&channel->iob_lock, flags);
522 memset(iob->data, 0, QETH_BUFSIZE);
523 iob->state = BUF_STATE_FREE;
524 iob->callback = qeth_send_control_data_cb;
525 iob->rc = 0;
526 spin_unlock_irqrestore(&channel->iob_lock, flags);
527}
528EXPORT_SYMBOL_GPL(qeth_release_buffer);
529
530static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
531{
532 struct qeth_cmd_buffer *buffer = NULL;
533 unsigned long flags;
534
535 spin_lock_irqsave(&channel->iob_lock, flags);
536 buffer = __qeth_get_buffer(channel);
537 spin_unlock_irqrestore(&channel->iob_lock, flags);
538 return buffer;
539}
540
541struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
542{
543 struct qeth_cmd_buffer *buffer;
544 wait_event(channel->wait_q,
545 ((buffer = qeth_get_buffer(channel)) != NULL));
546 return buffer;
547}
548EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
549
550void qeth_clear_cmd_buffers(struct qeth_channel *channel)
551{
552 int cnt;
553
554 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
555 qeth_release_buffer(channel, &channel->iob[cnt]);
556 channel->buf_no = 0;
557 channel->io_buf_no = 0;
558}
559EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
560
561static void qeth_send_control_data_cb(struct qeth_channel *channel,
562 struct qeth_cmd_buffer *iob)
563{
564 struct qeth_card *card;
565 struct qeth_reply *reply, *r;
566 struct qeth_ipa_cmd *cmd;
567 unsigned long flags;
568 int keep_reply;
569
d11ba0c4 570 QETH_DBF_TEXT(TRACE, 4, "sndctlcb");
4a71df50
FB		 571
572 card = CARD_FROM_CDEV(channel->ccwdev);
573 if (qeth_check_idx_response(iob->data)) {
574 qeth_clear_ipacmd_list(card);
fc9c2460
UB		 575 if (((iob->data[2] & 0xc0) == 0xc0) && iob->data[4] == 0xf6)
576 dev_err(&card->gdev->dev,
577 "The qeth device is not configured "
578 "for the OSI layer required by z/VM\n");
4a71df50
FB		 579 qeth_schedule_recovery(card);
580 goto out;
581 }
582
583 cmd = qeth_check_ipa_data(card, iob);
584 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
585 goto out;
586 /*in case of OSN : check if cmd is set */
587 if (card->info.type == QETH_CARD_TYPE_OSN &&
588 cmd &&
589 cmd->hdr.command != IPA_CMD_STARTLAN &&
590 card->osn_info.assist_cb != NULL) {
591 card->osn_info.assist_cb(card->dev, cmd);
592 goto out;
593 }
594
595 spin_lock_irqsave(&card->lock, flags);
596 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
597 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
598 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
599 qeth_get_reply(reply);
600 list_del_init(&reply->list);
601 spin_unlock_irqrestore(&card->lock, flags);
602 keep_reply = 0;
603 if (reply->callback != NULL) {
604 if (cmd) {
605 reply->offset = (__u16)((char *)cmd -
606 (char *)iob->data);
607 keep_reply = reply->callback(card,
608 reply,
609 (unsigned long)cmd);
610 } else
611 keep_reply = reply->callback(card,
612 reply,
613 (unsigned long)iob);
614 }
615 if (cmd)
616 reply->rc = (u16) cmd->hdr.return_code;
617 else if (iob->rc)
618 reply->rc = iob->rc;
619 if (keep_reply) {
620 spin_lock_irqsave(&card->lock, flags);
621 list_add_tail(&reply->list,
622 &card->cmd_waiter_list);
623 spin_unlock_irqrestore(&card->lock, flags);
624 } else {
625 atomic_inc(&reply->received);
626 wake_up(&reply->wait_q);
627 }
628 qeth_put_reply(reply);
629 goto out;
630 }
631 }
632 spin_unlock_irqrestore(&card->lock, flags);
633out:
634 memcpy(&card->seqno.pdu_hdr_ack,
635 QETH_PDU_HEADER_SEQ_NO(iob->data),
636 QETH_SEQ_NO_LENGTH);
637 qeth_release_buffer(channel, iob);
638}
639
640static int qeth_setup_channel(struct qeth_channel *channel)
641{
642 int cnt;
643
d11ba0c4 644 QETH_DBF_TEXT(SETUP, 2, "setupch");
4a71df50
FB		 645 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
646 channel->iob[cnt].data = (char *)
647 kmalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
648 if (channel->iob[cnt].data == NULL)
649 break;
650 channel->iob[cnt].state = BUF_STATE_FREE;
651 channel->iob[cnt].channel = channel;
652 channel->iob[cnt].callback = qeth_send_control_data_cb;
653 channel->iob[cnt].rc = 0;
654 }
655 if (cnt < QETH_CMD_BUFFER_NO) {
656 while (cnt-- > 0)
657 kfree(channel->iob[cnt].data);
658 return -ENOMEM;
659 }
660 channel->buf_no = 0;
661 channel->io_buf_no = 0;
662 atomic_set(&channel->irq_pending, 0);
663 spin_lock_init(&channel->iob_lock);
664
665 init_waitqueue_head(&channel->wait_q);
666 return 0;
667}
668
669static int qeth_set_thread_start_bit(struct qeth_card *card,
670 unsigned long thread)
671{
672 unsigned long flags;
673
674 spin_lock_irqsave(&card->thread_mask_lock, flags);
675 if (!(card->thread_allowed_mask & thread) ||
676 (card->thread_start_mask & thread)) {
677 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
678 return -EPERM;
679 }
680 card->thread_start_mask |= thread;
681 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
682 return 0;
683}
684
685void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
686{
687 unsigned long flags;
688
689 spin_lock_irqsave(&card->thread_mask_lock, flags);
690 card->thread_start_mask &= ~thread;
691 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
692 wake_up(&card->wait_q);
693}
694EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
695
696void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
697{
698 unsigned long flags;
699
700 spin_lock_irqsave(&card->thread_mask_lock, flags);
701 card->thread_running_mask &= ~thread;
702 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
703 wake_up(&card->wait_q);
704}
705EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
706
707static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
708{
709 unsigned long flags;
710 int rc = 0;
711
712 spin_lock_irqsave(&card->thread_mask_lock, flags);
713 if (card->thread_start_mask & thread) {
714 if ((card->thread_allowed_mask & thread) &&
715 !(card->thread_running_mask & thread)) {
716 rc = 1;
717 card->thread_start_mask &= ~thread;
718 card->thread_running_mask |= thread;
719 } else
720 rc = -EPERM;
721 }
722 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
723 return rc;
724}
725
726int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
727{
728 int rc = 0;
729
730 wait_event(card->wait_q,
731 (rc = __qeth_do_run_thread(card, thread)) >= 0);
732 return rc;
733}
734EXPORT_SYMBOL_GPL(qeth_do_run_thread);
735
736void qeth_schedule_recovery(struct qeth_card *card)
737{
d11ba0c4 738 QETH_DBF_TEXT(TRACE, 2, "startrec");
4a71df50
FB		 739 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
740 schedule_work(&card->kernel_thread_starter);
741}
742EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
743
744static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
745{
746 int dstat, cstat;
747 char *sense;
748
749 sense = (char *) irb->ecw;
23d805b6
PO		 750 cstat = irb->scsw.cmd.cstat;
751 dstat = irb->scsw.cmd.dstat;
4a71df50
FB		 752
753 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
754 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
755 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
d11ba0c4 756 QETH_DBF_TEXT(TRACE, 2, "CGENCHK");
74eacdb9
FB		 757 dev_warn(&cdev->dev, "The qeth device driver "
758 "failed to recover an error on the device\n");
759 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x ",
760 dev_name(&cdev->dev), dstat, cstat);
4a71df50
FB		 761 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
762 16, 1, irb, 64, 1);
763 return 1;
764 }
765
766 if (dstat & DEV_STAT_UNIT_CHECK) {
767 if (sense[SENSE_RESETTING_EVENT_BYTE] &
768 SENSE_RESETTING_EVENT_FLAG) {
d11ba0c4 769 QETH_DBF_TEXT(TRACE, 2, "REVIND");
4a71df50
FB		 770 return 1;
771 }
772 if (sense[SENSE_COMMAND_REJECT_BYTE] &
773 SENSE_COMMAND_REJECT_FLAG) {
d11ba0c4 774 QETH_DBF_TEXT(TRACE, 2, "CMDREJi");
28a7e4c9 775 return 1;
4a71df50
FB		 776 }
777 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
d11ba0c4 778 QETH_DBF_TEXT(TRACE, 2, "AFFE");
4a71df50
FB		 779 return 1;
780 }
781 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
d11ba0c4 782 QETH_DBF_TEXT(TRACE, 2, "ZEROSEN");
4a71df50
FB		 783 return 0;
784 }
d11ba0c4 785 QETH_DBF_TEXT(TRACE, 2, "DGENCHK");
4a71df50
FB		 786 return 1;
787 }
788 return 0;
789}
790
791static long __qeth_check_irb_error(struct ccw_device *cdev,
792 unsigned long intparm, struct irb *irb)
793{
794 if (!IS_ERR(irb))
795 return 0;
796
797 switch (PTR_ERR(irb)) {
798 case -EIO:
74eacdb9
FB		 799 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
800 dev_name(&cdev->dev));
d11ba0c4
PT		 801 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
802 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO);
4a71df50
FB		 803 break;
804 case -ETIMEDOUT:
74eacdb9
FB		 805 dev_warn(&cdev->dev, "A hardware operation timed out"
806 " on the device\n");
d11ba0c4
PT		 807 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
808 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -ETIMEDOUT);
4a71df50
FB		 809 if (intparm == QETH_RCD_PARM) {
810 struct qeth_card *card = CARD_FROM_CDEV(cdev);
811
812 if (card && (card->data.ccwdev == cdev)) {
813 card->data.state = CH_STATE_DOWN;
814 wake_up(&card->wait_q);
815 }
816 }
817 break;
818 default:
74eacdb9
FB		 819 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
820 dev_name(&cdev->dev), PTR_ERR(irb));
d11ba0c4
PT		 821 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
822 QETH_DBF_TEXT(TRACE, 2, " rc???");
4a71df50
FB		 823 }
824 return PTR_ERR(irb);
825}
826
827static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
828 struct irb *irb)
829{
830 int rc;
831 int cstat, dstat;
832 struct qeth_cmd_buffer *buffer;
833 struct qeth_channel *channel;
834 struct qeth_card *card;
835 struct qeth_cmd_buffer *iob;
836 __u8 index;
837
d11ba0c4 838 QETH_DBF_TEXT(TRACE, 5, "irq");
4a71df50
FB		 839
840 if (__qeth_check_irb_error(cdev, intparm, irb))
841 return;
23d805b6
PO		 842 cstat = irb->scsw.cmd.cstat;
843 dstat = irb->scsw.cmd.dstat;
4a71df50
FB		 844
845 card = CARD_FROM_CDEV(cdev);
846 if (!card)
847 return;
848
849 if (card->read.ccwdev == cdev) {
850 channel = &card->read;
d11ba0c4 851 QETH_DBF_TEXT(TRACE, 5, "read");
4a71df50
FB		 852 } else if (card->write.ccwdev == cdev) {
853 channel = &card->write;
d11ba0c4 854 QETH_DBF_TEXT(TRACE, 5, "write");
4a71df50
FB		 855 } else {
856 channel = &card->data;
d11ba0c4 857 QETH_DBF_TEXT(TRACE, 5, "data");
4a71df50
FB		 858 }
859 atomic_set(&channel->irq_pending, 0);
860
23d805b6 861 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
4a71df50
FB		 862 channel->state = CH_STATE_STOPPED;
863
23d805b6 864 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
4a71df50
FB		 865 channel->state = CH_STATE_HALTED;
866
867 /*let's wake up immediately on data channel*/
868 if ((channel == &card->data) && (intparm != 0) &&
869 (intparm != QETH_RCD_PARM))
870 goto out;
871
872 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
d11ba0c4 873 QETH_DBF_TEXT(TRACE, 6, "clrchpar");
4a71df50
FB		 874 /* we don't have to handle this further */
875 intparm = 0;
876 }
877 if (intparm == QETH_HALT_CHANNEL_PARM) {
d11ba0c4 878 QETH_DBF_TEXT(TRACE, 6, "hltchpar");
4a71df50
FB		 879 /* we don't have to handle this further */
880 intparm = 0;
881 }
882 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
883 (dstat & DEV_STAT_UNIT_CHECK) ||
884 (cstat)) {
885 if (irb->esw.esw0.erw.cons) {
74eacdb9
FB		 886 dev_warn(&channel->ccwdev->dev,
887 "The qeth device driver failed to recover "
888 "an error on the device\n");
889 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
890 "0x%X dstat 0x%X\n",
891 dev_name(&channel->ccwdev->dev), cstat, dstat);
4a71df50
FB		 892 print_hex_dump(KERN_WARNING, "qeth: irb ",
893 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
894 print_hex_dump(KERN_WARNING, "qeth: sense data ",
895 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
896 }
897 if (intparm == QETH_RCD_PARM) {
898 channel->state = CH_STATE_DOWN;
899 goto out;
900 }
901 rc = qeth_get_problem(cdev, irb);
902 if (rc) {
28a7e4c9 903 qeth_clear_ipacmd_list(card);
4a71df50
FB		 904 qeth_schedule_recovery(card);
905 goto out;
906 }
907 }
908
909 if (intparm == QETH_RCD_PARM) {
910 channel->state = CH_STATE_RCD_DONE;
911 goto out;
912 }
913 if (intparm) {
914 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
915 buffer->state = BUF_STATE_PROCESSED;
916 }
917 if (channel == &card->data)
918 return;
919 if (channel == &card->read &&
920 channel->state == CH_STATE_UP)
921 qeth_issue_next_read(card);
922
923 iob = channel->iob;
924 index = channel->buf_no;
925 while (iob[index].state == BUF_STATE_PROCESSED) {
926 if (iob[index].callback != NULL)
927 iob[index].callback(channel, iob + index);
928
929 index = (index + 1) % QETH_CMD_BUFFER_NO;
930 }
931 channel->buf_no = index;
932out:
933 wake_up(&card->wait_q);
934 return;
935}
936
937static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
938 struct qeth_qdio_out_buffer *buf)
939{
940 int i;
941 struct sk_buff *skb;
942
943 /* is PCI flag set on buffer? */
944 if (buf->buffer->element[0].flags & 0x40)
945 atomic_dec(&queue->set_pci_flags_count);
946
947 skb = skb_dequeue(&buf->skb_list);
948 while (skb) {
949 atomic_dec(&skb->users);
950 dev_kfree_skb_any(skb);
951 skb = skb_dequeue(&buf->skb_list);
952 }
953 qeth_eddp_buf_release_contexts(buf);
954 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
683d718a
FB		 955 if (buf->buffer->element[i].addr && buf->is_header[i])
956 kmem_cache_free(qeth_core_header_cache,
957 buf->buffer->element[i].addr);
958 buf->is_header[i] = 0;
4a71df50
FB		 959 buf->buffer->element[i].length = 0;
960 buf->buffer->element[i].addr = NULL;
961 buf->buffer->element[i].flags = 0;
962 }
963 buf->next_element_to_fill = 0;
964 atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY);
965}
966
967void qeth_clear_qdio_buffers(struct qeth_card *card)
968{
969 int i, j;
970
d11ba0c4 971 QETH_DBF_TEXT(TRACE, 2, "clearqdbf");
4a71df50
FB		 972 /* clear outbound buffers to free skbs */
973 for (i = 0; i < card->qdio.no_out_queues; ++i)
974 if (card->qdio.out_qs[i]) {
975 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
976 qeth_clear_output_buffer(card->qdio.out_qs[i],
977 &card->qdio.out_qs[i]->bufs[j]);
978 }
979}
980EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
981
982static void qeth_free_buffer_pool(struct qeth_card *card)
983{
984 struct qeth_buffer_pool_entry *pool_entry, *tmp;
985 int i = 0;
d11ba0c4 986 QETH_DBF_TEXT(TRACE, 5, "freepool");
4a71df50
FB		 987 list_for_each_entry_safe(pool_entry, tmp,
988 &card->qdio.init_pool.entry_list, init_list){
989 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
990 free_page((unsigned long)pool_entry->elements[i]);
991 list_del(&pool_entry->init_list);
992 kfree(pool_entry);
993 }
994}
995
996static void qeth_free_qdio_buffers(struct qeth_card *card)
997{
998 int i, j;
999
d11ba0c4 1000 QETH_DBF_TEXT(TRACE, 2, "freeqdbf");
4a71df50
FB		 1001 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
1002 QETH_QDIO_UNINITIALIZED)
1003 return;
1004 kfree(card->qdio.in_q);
1005 card->qdio.in_q = NULL;
1006 /* inbound buffer pool */
1007 qeth_free_buffer_pool(card);
1008 /* free outbound qdio_qs */
1009 if (card->qdio.out_qs) {
1010 for (i = 0; i < card->qdio.no_out_queues; ++i) {
1011 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
1012 qeth_clear_output_buffer(card->qdio.out_qs[i],
1013 &card->qdio.out_qs[i]->bufs[j]);
1014 kfree(card->qdio.out_qs[i]);
1015 }
1016 kfree(card->qdio.out_qs);
1017 card->qdio.out_qs = NULL;
1018 }
1019}
1020
1021static void qeth_clean_channel(struct qeth_channel *channel)
1022{
1023 int cnt;
1024
d11ba0c4 1025 QETH_DBF_TEXT(SETUP, 2, "freech");
4a71df50
FB		 1026 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1027 kfree(channel->iob[cnt].data);
1028}
1029
1030static int qeth_is_1920_device(struct qeth_card *card)
1031{
1032 int single_queue = 0;
1033 struct ccw_device *ccwdev;
1034 struct channelPath_dsc {
1035 u8 flags;
1036 u8 lsn;
1037 u8 desc;
1038 u8 chpid;
1039 u8 swla;
1040 u8 zeroes;
1041 u8 chla;
1042 u8 chpp;
1043 } *chp_dsc;
1044
d11ba0c4 1045 QETH_DBF_TEXT(SETUP, 2, "chk_1920");
4a71df50
FB		 1046
1047 ccwdev = card->data.ccwdev;
1048 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0);
1049 if (chp_dsc != NULL) {
1050 /* CHPP field bit 6 == 1 -> single queue */
1051 single_queue = ((chp_dsc->chpp & 0x02) == 0x02);
1052 kfree(chp_dsc);
1053 }
d11ba0c4 1054 QETH_DBF_TEXT_(SETUP, 2, "rc:%x", single_queue);
4a71df50
FB		 1055 return single_queue;
1056}
1057
1058static void qeth_init_qdio_info(struct qeth_card *card)
1059{
d11ba0c4 1060 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
4a71df50
FB		 1061 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1062 /* inbound */
1063 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1064 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
1065 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1066 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1067 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1068}
1069
1070static void qeth_set_intial_options(struct qeth_card *card)
1071{
1072 card->options.route4.type = NO_ROUTER;
1073 card->options.route6.type = NO_ROUTER;
1074 card->options.checksum_type = QETH_CHECKSUM_DEFAULT;
1075 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS;
1076 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL;
1077 card->options.fake_broadcast = 0;
1078 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
4a71df50
FB		 1079 card->options.performance_stats = 0;
1080 card->options.rx_sg_cb = QETH_RX_SG_CB;
1081}
1082
1083static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1084{
1085 unsigned long flags;
1086 int rc = 0;
1087
1088 spin_lock_irqsave(&card->thread_mask_lock, flags);
d11ba0c4 1089 QETH_DBF_TEXT_(TRACE, 4, " %02x%02x%02x",
4a71df50
FB		 1090 (u8) card->thread_start_mask,
1091 (u8) card->thread_allowed_mask,
1092 (u8) card->thread_running_mask);
1093 rc = (card->thread_start_mask & thread);
1094 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1095 return rc;
1096}
1097
1098static void qeth_start_kernel_thread(struct work_struct *work)
1099{
1100 struct qeth_card *card = container_of(work, struct qeth_card,
1101 kernel_thread_starter);
d11ba0c4 1102 QETH_DBF_TEXT(TRACE , 2, "strthrd");
4a71df50
FB		 1103
1104 if (card->read.state != CH_STATE_UP &&
1105 card->write.state != CH_STATE_UP)
1106 return;
1107 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD))
1108 kthread_run(card->discipline.recover, (void *) card,
1109 "qeth_recover");
1110}
1111
1112static int qeth_setup_card(struct qeth_card *card)
1113{
1114
d11ba0c4
PT		 1115 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1116 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 1117
1118 card->read.state = CH_STATE_DOWN;
1119 card->write.state = CH_STATE_DOWN;
1120 card->data.state = CH_STATE_DOWN;
1121 card->state = CARD_STATE_DOWN;
1122 card->lan_online = 0;
1123 card->use_hard_stop = 0;
1124 card->dev = NULL;
1125 spin_lock_init(&card->vlanlock);
1126 spin_lock_init(&card->mclock);
1127 card->vlangrp = NULL;
1128 spin_lock_init(&card->lock);
1129 spin_lock_init(&card->ip_lock);
1130 spin_lock_init(&card->thread_mask_lock);
1131 card->thread_start_mask = 0;
1132 card->thread_allowed_mask = 0;
1133 card->thread_running_mask = 0;
1134 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1135 INIT_LIST_HEAD(&card->ip_list);
1136 card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_KERNEL);
1137 if (!card->ip_tbd_list) {
d11ba0c4 1138 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
4a71df50
FB		 1139 return -ENOMEM;
1140 }
1141 INIT_LIST_HEAD(card->ip_tbd_list);
1142 INIT_LIST_HEAD(&card->cmd_waiter_list);
1143 init_waitqueue_head(&card->wait_q);
1144 /* intial options */
1145 qeth_set_intial_options(card);
1146 /* IP address takeover */
1147 INIT_LIST_HEAD(&card->ipato.entries);
1148 card->ipato.enabled = 0;
1149 card->ipato.invert4 = 0;
1150 card->ipato.invert6 = 0;
1151 /* init QDIO stuff */
1152 qeth_init_qdio_info(card);
1153 return 0;
1154}
1155
6bcac508
MS		 1156static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1157{
1158 struct qeth_card *card = container_of(slr, struct qeth_card,
1159 qeth_service_level);
1160 seq_printf(m, "qeth: %s firmware level %s\n", CARD_BUS_ID(card),
1161 card->info.mcl_level);
1162}
1163
4a71df50
FB		 1164static struct qeth_card *qeth_alloc_card(void)
1165{
1166 struct qeth_card *card;
1167
d11ba0c4 1168 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
4a71df50
FB		 1169 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1170 if (!card)
1171 return NULL;
d11ba0c4 1172 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 1173 if (qeth_setup_channel(&card->read)) {
1174 kfree(card);
1175 return NULL;
1176 }
1177 if (qeth_setup_channel(&card->write)) {
1178 qeth_clean_channel(&card->read);
1179 kfree(card);
1180 return NULL;
1181 }
1182 card->options.layer2 = -1;
6bcac508
MS		 1183 card->qeth_service_level.seq_print = qeth_core_sl_print;
1184 register_service_level(&card->qeth_service_level);
4a71df50
FB		 1185 return card;
1186}
1187
1188static int qeth_determine_card_type(struct qeth_card *card)
1189{
1190 int i = 0;
1191
d11ba0c4 1192 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
4a71df50
FB		 1193
1194 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1195 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1196 while (known_devices[i][4]) {
1197 if ((CARD_RDEV(card)->id.dev_type == known_devices[i][2]) &&
1198 (CARD_RDEV(card)->id.dev_model == known_devices[i][3])) {
1199 card->info.type = known_devices[i][4];
1200 card->qdio.no_out_queues = known_devices[i][8];
1201 card->info.is_multicast_different = known_devices[i][9];
1202 if (qeth_is_1920_device(card)) {
74eacdb9
FB		 1203 dev_info(&card->gdev->dev,
1204 "Priority Queueing not supported\n");
4a71df50
FB		 1205 card->qdio.no_out_queues = 1;
1206 card->qdio.default_out_queue = 0;
1207 }
1208 return 0;
1209 }
1210 i++;
1211 }
1212 card->info.type = QETH_CARD_TYPE_UNKNOWN;
74eacdb9
FB		 1213 dev_err(&card->gdev->dev, "The adapter hardware is of an "
1214 "unknown type\n");
4a71df50
FB		 1215 return -ENOENT;
1216}
1217
1218static int qeth_clear_channel(struct qeth_channel *channel)
1219{
1220 unsigned long flags;
1221 struct qeth_card *card;
1222 int rc;
1223
d11ba0c4 1224 QETH_DBF_TEXT(TRACE, 3, "clearch");
4a71df50
FB		 1225 card = CARD_FROM_CDEV(channel->ccwdev);
1226 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1227 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1228 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1229
1230 if (rc)
1231 return rc;
1232 rc = wait_event_interruptible_timeout(card->wait_q,
1233 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1234 if (rc == -ERESTARTSYS)
1235 return rc;
1236 if (channel->state != CH_STATE_STOPPED)
1237 return -ETIME;
1238 channel->state = CH_STATE_DOWN;
1239 return 0;
1240}
1241
1242static int qeth_halt_channel(struct qeth_channel *channel)
1243{
1244 unsigned long flags;
1245 struct qeth_card *card;
1246 int rc;
1247
d11ba0c4 1248 QETH_DBF_TEXT(TRACE, 3, "haltch");
4a71df50
FB		 1249 card = CARD_FROM_CDEV(channel->ccwdev);
1250 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1251 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1252 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1253
1254 if (rc)
1255 return rc;
1256 rc = wait_event_interruptible_timeout(card->wait_q,
1257 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1258 if (rc == -ERESTARTSYS)
1259 return rc;
1260 if (channel->state != CH_STATE_HALTED)
1261 return -ETIME;
1262 return 0;
1263}
1264
1265static int qeth_halt_channels(struct qeth_card *card)
1266{
1267 int rc1 = 0, rc2 = 0, rc3 = 0;
1268
d11ba0c4 1269 QETH_DBF_TEXT(TRACE, 3, "haltchs");
4a71df50
FB		 1270 rc1 = qeth_halt_channel(&card->read);
1271 rc2 = qeth_halt_channel(&card->write);
1272 rc3 = qeth_halt_channel(&card->data);
1273 if (rc1)
1274 return rc1;
1275 if (rc2)
1276 return rc2;
1277 return rc3;
1278}
1279
1280static int qeth_clear_channels(struct qeth_card *card)
1281{
1282 int rc1 = 0, rc2 = 0, rc3 = 0;
1283
d11ba0c4 1284 QETH_DBF_TEXT(TRACE, 3, "clearchs");
4a71df50
FB		 1285 rc1 = qeth_clear_channel(&card->read);
1286 rc2 = qeth_clear_channel(&card->write);
1287 rc3 = qeth_clear_channel(&card->data);
1288 if (rc1)
1289 return rc1;
1290 if (rc2)
1291 return rc2;
1292 return rc3;
1293}
1294
1295static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1296{
1297 int rc = 0;
1298
d11ba0c4
PT		 1299 QETH_DBF_TEXT(TRACE, 3, "clhacrd");
1300 QETH_DBF_HEX(TRACE, 3, &card, sizeof(void *));
4a71df50
FB		 1301
1302 if (halt)
1303 rc = qeth_halt_channels(card);
1304 if (rc)
1305 return rc;
1306 return qeth_clear_channels(card);
1307}
1308
1309int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1310{
1311 int rc = 0;
1312
d11ba0c4 1313 QETH_DBF_TEXT(TRACE, 3, "qdioclr");
4a71df50
FB		 1314 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1315 QETH_QDIO_CLEANING)) {
1316 case QETH_QDIO_ESTABLISHED:
1317 if (card->info.type == QETH_CARD_TYPE_IQD)
1318 rc = qdio_cleanup(CARD_DDEV(card),
1319 QDIO_FLAG_CLEANUP_USING_HALT);
1320 else
1321 rc = qdio_cleanup(CARD_DDEV(card),
1322 QDIO_FLAG_CLEANUP_USING_CLEAR);
1323 if (rc)
d11ba0c4 1324 QETH_DBF_TEXT_(TRACE, 3, "1err%d", rc);
4a71df50
FB		 1325 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1326 break;
1327 case QETH_QDIO_CLEANING:
1328 return rc;
1329 default:
1330 break;
1331 }
1332 rc = qeth_clear_halt_card(card, use_halt);
1333 if (rc)
d11ba0c4 1334 QETH_DBF_TEXT_(TRACE, 3, "2err%d", rc);
4a71df50
FB		 1335 card->state = CARD_STATE_DOWN;
1336 return rc;
1337}
1338EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1339
1340static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1341 int *length)
1342{
1343 struct ciw *ciw;
1344 char *rcd_buf;
1345 int ret;
1346 struct qeth_channel *channel = &card->data;
1347 unsigned long flags;
1348
1349 /*
1350 * scan for RCD command in extended SenseID data
1351 */
1352 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1353 if (!ciw || ciw->cmd == 0)
1354 return -EOPNOTSUPP;
1355 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1356 if (!rcd_buf)
1357 return -ENOMEM;
1358
1359 channel->ccw.cmd_code = ciw->cmd;
1360 channel->ccw.cda = (__u32) __pa(rcd_buf);
1361 channel->ccw.count = ciw->count;
1362 channel->ccw.flags = CCW_FLAG_SLI;
1363 channel->state = CH_STATE_RCD;
1364 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1365 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1366 QETH_RCD_PARM, LPM_ANYPATH, 0,
1367 QETH_RCD_TIMEOUT);
1368 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1369 if (!ret)
1370 wait_event(card->wait_q,
1371 (channel->state == CH_STATE_RCD_DONE ||
1372 channel->state == CH_STATE_DOWN));
1373 if (channel->state == CH_STATE_DOWN)
1374 ret = -EIO;
1375 else
1376 channel->state = CH_STATE_DOWN;
1377 if (ret) {
1378 kfree(rcd_buf);
1379 *buffer = NULL;
1380 *length = 0;
1381 } else {
1382 *length = ciw->count;
1383 *buffer = rcd_buf;
1384 }
1385 return ret;
1386}
1387
1388static int qeth_get_unitaddr(struct qeth_card *card)
1389{
1390 int length;
1391 char *prcd;
1392 int rc;
1393
d11ba0c4 1394 QETH_DBF_TEXT(SETUP, 2, "getunit");
4a71df50
FB		 1395 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
1396 if (rc) {
74eacdb9
FB		 1397 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
1398 dev_name(&card->gdev->dev), rc);
4a71df50
FB		 1399 return rc;
1400 }
1401 card->info.chpid = prcd[30];
1402 card->info.unit_addr2 = prcd[31];
1403 card->info.cula = prcd[63];
1404 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1405 (prcd[0x11] == _ascebc['M']));
1406 kfree(prcd);
1407 return 0;
1408}
1409
1410static void qeth_init_tokens(struct qeth_card *card)
1411{
1412 card->token.issuer_rm_w = 0x00010103UL;
1413 card->token.cm_filter_w = 0x00010108UL;
1414 card->token.cm_connection_w = 0x0001010aUL;
1415 card->token.ulp_filter_w = 0x0001010bUL;
1416 card->token.ulp_connection_w = 0x0001010dUL;
1417}
1418
1419static void qeth_init_func_level(struct qeth_card *card)
1420{
1421 if (card->ipato.enabled) {
1422 if (card->info.type == QETH_CARD_TYPE_IQD)
1423 card->info.func_level =
1424 QETH_IDX_FUNC_LEVEL_IQD_ENA_IPAT;
1425 else
1426 card->info.func_level =
1427 QETH_IDX_FUNC_LEVEL_OSAE_ENA_IPAT;
1428 } else {
1429 if (card->info.type == QETH_CARD_TYPE_IQD)
1430 /*FIXME:why do we have same values for dis and ena for
1431 osae??? */
1432 card->info.func_level =
1433 QETH_IDX_FUNC_LEVEL_IQD_DIS_IPAT;
1434 else
1435 card->info.func_level =
1436 QETH_IDX_FUNC_LEVEL_OSAE_DIS_IPAT;
1437 }
1438}
1439
4a71df50
FB		 1440static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1441 void (*idx_reply_cb)(struct qeth_channel *,
1442 struct qeth_cmd_buffer *))
1443{
1444 struct qeth_cmd_buffer *iob;
1445 unsigned long flags;
1446 int rc;
1447 struct qeth_card *card;
1448
d11ba0c4 1449 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
4a71df50
FB		 1450 card = CARD_FROM_CDEV(channel->ccwdev);
1451 iob = qeth_get_buffer(channel);
1452 iob->callback = idx_reply_cb;
1453 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1454 channel->ccw.count = QETH_BUFSIZE;
1455 channel->ccw.cda = (__u32) __pa(iob->data);
1456
1457 wait_event(card->wait_q,
1458 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1459 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1460 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1461 rc = ccw_device_start(channel->ccwdev,
1462 &channel->ccw, (addr_t) iob, 0, 0);
1463 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1464
1465 if (rc) {
14cc21b6 1466 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
d11ba0c4 1467 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 1468 atomic_set(&channel->irq_pending, 0);
1469 wake_up(&card->wait_q);
1470 return rc;
1471 }
1472 rc = wait_event_interruptible_timeout(card->wait_q,
1473 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1474 if (rc == -ERESTARTSYS)
1475 return rc;
1476 if (channel->state != CH_STATE_UP) {
1477 rc = -ETIME;
d11ba0c4 1478 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 1479 qeth_clear_cmd_buffers(channel);
1480 } else
1481 rc = 0;
1482 return rc;
1483}
1484
1485static int qeth_idx_activate_channel(struct qeth_channel *channel,
1486 void (*idx_reply_cb)(struct qeth_channel *,
1487 struct qeth_cmd_buffer *))
1488{
1489 struct qeth_card *card;
1490 struct qeth_cmd_buffer *iob;
1491 unsigned long flags;
1492 __u16 temp;
1493 __u8 tmp;
1494 int rc;
f06f6f32 1495 struct ccw_dev_id temp_devid;
4a71df50
FB		 1496
1497 card = CARD_FROM_CDEV(channel->ccwdev);
1498
d11ba0c4 1499 QETH_DBF_TEXT(SETUP, 2, "idxactch");
4a71df50
FB		 1500
1501 iob = qeth_get_buffer(channel);
1502 iob->callback = idx_reply_cb;
1503 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1504 channel->ccw.count = IDX_ACTIVATE_SIZE;
1505 channel->ccw.cda = (__u32) __pa(iob->data);
1506 if (channel == &card->write) {
1507 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1508 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1509 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1510 card->seqno.trans_hdr++;
1511 } else {
1512 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1513 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1514 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1515 }
1516 tmp = ((__u8)card->info.portno) | 0x80;
1517 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1518 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1519 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1520 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1521 &card->info.func_level, sizeof(__u16));
f06f6f32
CH		 1522 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1523 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
4a71df50
FB		 1524 temp = (card->info.cula << 8) + card->info.unit_addr2;
1525 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1526
1527 wait_event(card->wait_q,
1528 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1529 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1530 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1531 rc = ccw_device_start(channel->ccwdev,
1532 &channel->ccw, (addr_t) iob, 0, 0);
1533 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1534
1535 if (rc) {
14cc21b6
FB		 1536 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1537 rc);
d11ba0c4 1538 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 1539 atomic_set(&channel->irq_pending, 0);
1540 wake_up(&card->wait_q);
1541 return rc;
1542 }
1543 rc = wait_event_interruptible_timeout(card->wait_q,
1544 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1545 if (rc == -ERESTARTSYS)
1546 return rc;
1547 if (channel->state != CH_STATE_ACTIVATING) {
74eacdb9
FB		 1548 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1549 " failed to recover an error on the device\n");
1550 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1551 dev_name(&channel->ccwdev->dev));
d11ba0c4 1552 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
4a71df50
FB		 1553 qeth_clear_cmd_buffers(channel);
1554 return -ETIME;
1555 }
1556 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1557}
1558
1559static int qeth_peer_func_level(int level)
1560{
1561 if ((level & 0xff) == 8)
1562 return (level & 0xff) + 0x400;
1563 if (((level >> 8) & 3) == 1)
1564 return (level & 0xff) + 0x200;
1565 return level;
1566}
1567
1568static void qeth_idx_write_cb(struct qeth_channel *channel,
1569 struct qeth_cmd_buffer *iob)
1570{
1571 struct qeth_card *card;
1572 __u16 temp;
1573
d11ba0c4 1574 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
4a71df50
FB		 1575
1576 if (channel->state == CH_STATE_DOWN) {
1577 channel->state = CH_STATE_ACTIVATING;
1578 goto out;
1579 }
1580 card = CARD_FROM_CDEV(channel->ccwdev);
1581
1582 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1583 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
74eacdb9
FB		 1584 dev_err(&card->write.ccwdev->dev,
1585 "The adapter is used exclusively by another "
1586 "host\n");
4a71df50 1587 else
74eacdb9
FB		 1588 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1589 " negative reply\n",
1590 dev_name(&card->write.ccwdev->dev));
4a71df50
FB		 1591 goto out;
1592 }
1593 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1594 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1595 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1596 "function level mismatch (sent: 0x%x, received: "
1597 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1598 card->info.func_level, temp);
4a71df50
FB		 1599 goto out;
1600 }
1601 channel->state = CH_STATE_UP;
1602out:
1603 qeth_release_buffer(channel, iob);
1604}
1605
1606static void qeth_idx_read_cb(struct qeth_channel *channel,
1607 struct qeth_cmd_buffer *iob)
1608{
1609 struct qeth_card *card;
1610 __u16 temp;
1611
d11ba0c4 1612 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
4a71df50
FB		 1613 if (channel->state == CH_STATE_DOWN) {
1614 channel->state = CH_STATE_ACTIVATING;
1615 goto out;
1616 }
1617
1618 card = CARD_FROM_CDEV(channel->ccwdev);
1619 if (qeth_check_idx_response(iob->data))
1620 goto out;
1621
1622 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1623 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
74eacdb9
FB		 1624 dev_err(&card->write.ccwdev->dev,
1625 "The adapter is used exclusively by another "
1626 "host\n");
4a71df50 1627 else
74eacdb9
FB		 1628 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1629 " negative reply\n",
1630 dev_name(&card->read.ccwdev->dev));
4a71df50
FB		 1631 goto out;
1632 }
1633
1634/**
1635 * temporary fix for microcode bug
1636 * to revert it,replace OR by AND
1637 */
1638 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
1639 (card->info.type == QETH_CARD_TYPE_OSAE))
1640 card->info.portname_required = 1;
1641
1642 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1643 if (temp != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1644 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1645 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1646 dev_name(&card->read.ccwdev->dev),
1647 card->info.func_level, temp);
4a71df50
FB		 1648 goto out;
1649 }
1650 memcpy(&card->token.issuer_rm_r,
1651 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1652 QETH_MPC_TOKEN_LENGTH);
1653 memcpy(&card->info.mcl_level[0],
1654 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1655 channel->state = CH_STATE_UP;
1656out:
1657 qeth_release_buffer(channel, iob);
1658}
1659
1660void qeth_prepare_control_data(struct qeth_card *card, int len,
1661 struct qeth_cmd_buffer *iob)
1662{
1663 qeth_setup_ccw(&card->write, iob->data, len);
1664 iob->callback = qeth_release_buffer;
1665
1666 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1667 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1668 card->seqno.trans_hdr++;
1669 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1670 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1671 card->seqno.pdu_hdr++;
1672 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1673 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
d11ba0c4 1674 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 1675}
1676EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
1677
1678int qeth_send_control_data(struct qeth_card *card, int len,
1679 struct qeth_cmd_buffer *iob,
1680 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
1681 unsigned long),
1682 void *reply_param)
1683{
1684 int rc;
1685 unsigned long flags;
1686 struct qeth_reply *reply = NULL;
1687 unsigned long timeout;
5b54e16f 1688 struct qeth_ipa_cmd *cmd;
4a71df50 1689
d11ba0c4 1690 QETH_DBF_TEXT(TRACE, 2, "sendctl");
4a71df50
FB		 1691
1692 reply = qeth_alloc_reply(card);
1693 if (!reply) {
4a71df50
FB		 1694 return -ENOMEM;
1695 }
1696 reply->callback = reply_cb;
1697 reply->param = reply_param;
1698 if (card->state == CARD_STATE_DOWN)
1699 reply->seqno = QETH_IDX_COMMAND_SEQNO;
1700 else
1701 reply->seqno = card->seqno.ipa++;
1702 init_waitqueue_head(&reply->wait_q);
1703 spin_lock_irqsave(&card->lock, flags);
1704 list_add_tail(&reply->list, &card->cmd_waiter_list);
1705 spin_unlock_irqrestore(&card->lock, flags);
d11ba0c4 1706 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 1707
1708 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
1709 qeth_prepare_control_data(card, len, iob);
1710
1711 if (IS_IPA(iob->data))
1712 timeout = jiffies + QETH_IPA_TIMEOUT;
1713 else
1714 timeout = jiffies + QETH_TIMEOUT;
1715
d11ba0c4 1716 QETH_DBF_TEXT(TRACE, 6, "noirqpnd");
4a71df50
FB		 1717 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
1718 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
1719 (addr_t) iob, 0, 0);
1720 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
1721 if (rc) {
74eacdb9
FB		 1722 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
1723 "ccw_device_start rc = %i\n",
1724 dev_name(&card->write.ccwdev->dev), rc);
d11ba0c4 1725 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
4a71df50
FB		 1726 spin_lock_irqsave(&card->lock, flags);
1727 list_del_init(&reply->list);
1728 qeth_put_reply(reply);
1729 spin_unlock_irqrestore(&card->lock, flags);
1730 qeth_release_buffer(iob->channel, iob);
1731 atomic_set(&card->write.irq_pending, 0);
1732 wake_up(&card->wait_q);
1733 return rc;
1734 }
5b54e16f
FB		 1735
1736 /* we have only one long running ipassist, since we can ensure
1737 process context of this command we can sleep */
1738 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
1739 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
1740 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
1741 if (!wait_event_timeout(reply->wait_q,
1742 atomic_read(&reply->received), timeout))
1743 goto time_err;
1744 } else {
1745 while (!atomic_read(&reply->received)) {
1746 if (time_after(jiffies, timeout))
1747 goto time_err;
1748 cpu_relax();
1749 };
1750 }
1751
1752 rc = reply->rc;
1753 qeth_put_reply(reply);
1754 return rc;
1755
1756time_err:
1757 spin_lock_irqsave(&reply->card->lock, flags);
1758 list_del_init(&reply->list);
1759 spin_unlock_irqrestore(&reply->card->lock, flags);
1760 reply->rc = -ETIME;
1761 atomic_inc(&reply->received);
1762 wake_up(&reply->wait_q);
4a71df50
FB		 1763 rc = reply->rc;
1764 qeth_put_reply(reply);
1765 return rc;
1766}
1767EXPORT_SYMBOL_GPL(qeth_send_control_data);
1768
1769static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1770 unsigned long data)
1771{
1772 struct qeth_cmd_buffer *iob;
1773
d11ba0c4 1774 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
4a71df50
FB		 1775
1776 iob = (struct qeth_cmd_buffer *) data;
1777 memcpy(&card->token.cm_filter_r,
1778 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
1779 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 1780 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 1781 return 0;
1782}
1783
1784static int qeth_cm_enable(struct qeth_card *card)
1785{
1786 int rc;
1787 struct qeth_cmd_buffer *iob;
1788
d11ba0c4 1789 QETH_DBF_TEXT(SETUP, 2, "cmenable");
4a71df50
FB		 1790
1791 iob = qeth_wait_for_buffer(&card->write);
1792 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
1793 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
1794 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1795 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
1796 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
1797
1798 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
1799 qeth_cm_enable_cb, NULL);
1800 return rc;
1801}
1802
1803static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1804 unsigned long data)
1805{
1806
1807 struct qeth_cmd_buffer *iob;
1808
d11ba0c4 1809 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
4a71df50
FB		 1810
1811 iob = (struct qeth_cmd_buffer *) data;
1812 memcpy(&card->token.cm_connection_r,
1813 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
1814 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 1815 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 1816 return 0;
1817}
1818
1819static int qeth_cm_setup(struct qeth_card *card)
1820{
1821 int rc;
1822 struct qeth_cmd_buffer *iob;
1823
d11ba0c4 1824 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
4a71df50
FB		 1825
1826 iob = qeth_wait_for_buffer(&card->write);
1827 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
1828 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
1829 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1830 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
1831 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
1832 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
1833 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
1834 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
1835 qeth_cm_setup_cb, NULL);
1836 return rc;
1837
1838}
1839
1840static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
1841{
1842 switch (card->info.type) {
1843 case QETH_CARD_TYPE_UNKNOWN:
1844 return 1500;
1845 case QETH_CARD_TYPE_IQD:
1846 return card->info.max_mtu;
1847 case QETH_CARD_TYPE_OSAE:
1848 switch (card->info.link_type) {
1849 case QETH_LINK_TYPE_HSTR:
1850 case QETH_LINK_TYPE_LANE_TR:
1851 return 2000;
1852 default:
1853 return 1492;
1854 }
1855 default:
1856 return 1500;
1857 }
1858}
1859
1860static inline int qeth_get_max_mtu_for_card(int cardtype)
1861{
1862 switch (cardtype) {
1863
1864 case QETH_CARD_TYPE_UNKNOWN:
1865 case QETH_CARD_TYPE_OSAE:
1866 case QETH_CARD_TYPE_OSN:
1867 return 61440;
1868 case QETH_CARD_TYPE_IQD:
1869 return 57344;
1870 default:
1871 return 1500;
1872 }
1873}
1874
1875static inline int qeth_get_mtu_out_of_mpc(int cardtype)
1876{
1877 switch (cardtype) {
1878 case QETH_CARD_TYPE_IQD:
1879 return 1;
1880 default:
1881 return 0;
1882 }
1883}
1884
1885static inline int qeth_get_mtu_outof_framesize(int framesize)
1886{
1887 switch (framesize) {
1888 case 0x4000:
1889 return 8192;
1890 case 0x6000:
1891 return 16384;
1892 case 0xa000:
1893 return 32768;
1894 case 0xffff:
1895 return 57344;
1896 default:
1897 return 0;
1898 }
1899}
1900
1901static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
1902{
1903 switch (card->info.type) {
1904 case QETH_CARD_TYPE_OSAE:
1905 return ((mtu >= 576) && (mtu <= 61440));
1906 case QETH_CARD_TYPE_IQD:
1907 return ((mtu >= 576) &&
1908 (mtu <= card->info.max_mtu + 4096 - 32));
1909 case QETH_CARD_TYPE_OSN:
1910 case QETH_CARD_TYPE_UNKNOWN:
1911 default:
1912 return 1;
1913 }
1914}
1915
1916static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1917 unsigned long data)
1918{
1919
1920 __u16 mtu, framesize;
1921 __u16 len;
1922 __u8 link_type;
1923 struct qeth_cmd_buffer *iob;
1924
d11ba0c4 1925 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
4a71df50
FB		 1926
1927 iob = (struct qeth_cmd_buffer *) data;
1928 memcpy(&card->token.ulp_filter_r,
1929 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
1930 QETH_MPC_TOKEN_LENGTH);
1931 if (qeth_get_mtu_out_of_mpc(card->info.type)) {
1932 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
1933 mtu = qeth_get_mtu_outof_framesize(framesize);
1934 if (!mtu) {
1935 iob->rc = -EINVAL;
d11ba0c4 1936 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 1937 return 0;
1938 }
1939 card->info.max_mtu = mtu;
1940 card->info.initial_mtu = mtu;
1941 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
1942 } else {
1943 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
1944 card->info.max_mtu = qeth_get_max_mtu_for_card(card->info.type);
1945 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1946 }
1947
1948 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
1949 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
1950 memcpy(&link_type,
1951 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
1952 card->info.link_type = link_type;
1953 } else
1954 card->info.link_type = 0;
d11ba0c4 1955 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 1956 return 0;
1957}
1958
1959static int qeth_ulp_enable(struct qeth_card *card)
1960{
1961 int rc;
1962 char prot_type;
1963 struct qeth_cmd_buffer *iob;
1964
1965 /*FIXME: trace view callbacks*/
d11ba0c4 1966 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
4a71df50
FB		 1967
1968 iob = qeth_wait_for_buffer(&card->write);
1969 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
1970
1971 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
1972 (__u8) card->info.portno;
1973 if (card->options.layer2)
1974 if (card->info.type == QETH_CARD_TYPE_OSN)
1975 prot_type = QETH_PROT_OSN2;
1976 else
1977 prot_type = QETH_PROT_LAYER2;
1978 else
1979 prot_type = QETH_PROT_TCPIP;
1980
1981 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
1982 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
1983 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
1984 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
1985 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
1986 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
1987 card->info.portname, 9);
1988 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
1989 qeth_ulp_enable_cb, NULL);
1990 return rc;
1991
1992}
1993
1994static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1995 unsigned long data)
1996{
1997 struct qeth_cmd_buffer *iob;
1998
d11ba0c4 1999 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
4a71df50
FB		 2000
2001 iob = (struct qeth_cmd_buffer *) data;
2002 memcpy(&card->token.ulp_connection_r,
2003 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2004 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 2005 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2006 return 0;
2007}
2008
2009static int qeth_ulp_setup(struct qeth_card *card)
2010{
2011 int rc;
2012 __u16 temp;
2013 struct qeth_cmd_buffer *iob;
2014 struct ccw_dev_id dev_id;
2015
d11ba0c4 2016 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
4a71df50
FB		 2017
2018 iob = qeth_wait_for_buffer(&card->write);
2019 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2020
2021 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2022 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2023 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2024 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2025 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2026 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2027
2028 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2029 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2030 temp = (card->info.cula << 8) + card->info.unit_addr2;
2031 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2032 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2033 qeth_ulp_setup_cb, NULL);
2034 return rc;
2035}
2036
2037static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2038{
2039 int i, j;
2040
d11ba0c4 2041 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
4a71df50
FB		 2042
2043 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2044 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2045 return 0;
2046
2047 card->qdio.in_q = kmalloc(sizeof(struct qeth_qdio_q),
508b3c4f 2048 GFP_KERNEL);
4a71df50
FB		 2049 if (!card->qdio.in_q)
2050 goto out_nomem;
d11ba0c4
PT		 2051 QETH_DBF_TEXT(SETUP, 2, "inq");
2052 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
4a71df50
FB		 2053 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2054 /* give inbound qeth_qdio_buffers their qdio_buffers */
2055 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
2056 card->qdio.in_q->bufs[i].buffer =
2057 &card->qdio.in_q->qdio_bufs[i];
2058 /* inbound buffer pool */
2059 if (qeth_alloc_buffer_pool(card))
2060 goto out_freeinq;
2061 /* outbound */
2062 card->qdio.out_qs =
2063 kmalloc(card->qdio.no_out_queues *
2064 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2065 if (!card->qdio.out_qs)
2066 goto out_freepool;
2067 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2068 card->qdio.out_qs[i] = kmalloc(sizeof(struct qeth_qdio_out_q),
508b3c4f 2069 GFP_KERNEL);
4a71df50
FB		 2070 if (!card->qdio.out_qs[i])
2071 goto out_freeoutq;
d11ba0c4
PT		 2072 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2073 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
4a71df50
FB		 2074 memset(card->qdio.out_qs[i], 0, sizeof(struct qeth_qdio_out_q));
2075 card->qdio.out_qs[i]->queue_no = i;
2076 /* give outbound qeth_qdio_buffers their qdio_buffers */
2077 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2078 card->qdio.out_qs[i]->bufs[j].buffer =
2079 &card->qdio.out_qs[i]->qdio_bufs[j];
2080 skb_queue_head_init(&card->qdio.out_qs[i]->bufs[j].
2081 skb_list);
2082 lockdep_set_class(
2083 &card->qdio.out_qs[i]->bufs[j].skb_list.lock,
2084 &qdio_out_skb_queue_key);
2085 INIT_LIST_HEAD(&card->qdio.out_qs[i]->bufs[j].ctx_list);
2086 }
2087 }
2088 return 0;
2089
2090out_freeoutq:
2091 while (i > 0)
2092 kfree(card->qdio.out_qs[--i]);
2093 kfree(card->qdio.out_qs);
2094 card->qdio.out_qs = NULL;
2095out_freepool:
2096 qeth_free_buffer_pool(card);
2097out_freeinq:
2098 kfree(card->qdio.in_q);
2099 card->qdio.in_q = NULL;
2100out_nomem:
2101 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2102 return -ENOMEM;
2103}
2104
2105static void qeth_create_qib_param_field(struct qeth_card *card,
2106 char *param_field)
2107{
2108
2109 param_field[0] = _ascebc['P'];
2110 param_field[1] = _ascebc['C'];
2111 param_field[2] = _ascebc['I'];
2112 param_field[3] = _ascebc['T'];
2113 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2114 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2115 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2116}
2117
2118static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2119 char *param_field)
2120{
2121 param_field[16] = _ascebc['B'];
2122 param_field[17] = _ascebc['L'];
2123 param_field[18] = _ascebc['K'];
2124 param_field[19] = _ascebc['T'];
2125 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2126 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2127 *((unsigned int *) (&param_field[28])) =
2128 card->info.blkt.inter_packet_jumbo;
2129}
2130
2131static int qeth_qdio_activate(struct qeth_card *card)
2132{
d11ba0c4 2133 QETH_DBF_TEXT(SETUP, 3, "qdioact");
779e6e1c 2134 return qdio_activate(CARD_DDEV(card));
4a71df50
FB		 2135}
2136
2137static int qeth_dm_act(struct qeth_card *card)
2138{
2139 int rc;
2140 struct qeth_cmd_buffer *iob;
2141
d11ba0c4 2142 QETH_DBF_TEXT(SETUP, 2, "dmact");
4a71df50
FB		 2143
2144 iob = qeth_wait_for_buffer(&card->write);
2145 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2146
2147 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2148 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2149 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2150 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2151 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2152 return rc;
2153}
2154
2155static int qeth_mpc_initialize(struct qeth_card *card)
2156{
2157 int rc;
2158
d11ba0c4 2159 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
4a71df50
FB		 2160
2161 rc = qeth_issue_next_read(card);
2162 if (rc) {
d11ba0c4 2163 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2164 return rc;
2165 }
2166 rc = qeth_cm_enable(card);
2167 if (rc) {
d11ba0c4 2168 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 2169 goto out_qdio;
2170 }
2171 rc = qeth_cm_setup(card);
2172 if (rc) {
d11ba0c4 2173 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 2174 goto out_qdio;
2175 }
2176 rc = qeth_ulp_enable(card);
2177 if (rc) {
d11ba0c4 2178 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 2179 goto out_qdio;
2180 }
2181 rc = qeth_ulp_setup(card);
2182 if (rc) {
d11ba0c4 2183 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2184 goto out_qdio;
2185 }
2186 rc = qeth_alloc_qdio_buffers(card);
2187 if (rc) {
d11ba0c4 2188 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2189 goto out_qdio;
2190 }
2191 rc = qeth_qdio_establish(card);
2192 if (rc) {
d11ba0c4 2193 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4a71df50
FB		 2194 qeth_free_qdio_buffers(card);
2195 goto out_qdio;
2196 }
2197 rc = qeth_qdio_activate(card);
2198 if (rc) {
d11ba0c4 2199 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
4a71df50
FB		 2200 goto out_qdio;
2201 }
2202 rc = qeth_dm_act(card);
2203 if (rc) {
d11ba0c4 2204 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
4a71df50
FB		 2205 goto out_qdio;
2206 }
2207
2208 return 0;
2209out_qdio:
2210 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2211 return rc;
2212}
2213
2214static void qeth_print_status_with_portname(struct qeth_card *card)
2215{
2216 char dbf_text[15];
2217 int i;
2218
2219 sprintf(dbf_text, "%s", card->info.portname + 1);
2220 for (i = 0; i < 8; i++)
2221 dbf_text[i] =
2222 (char) _ebcasc[(__u8) dbf_text[i]];
2223 dbf_text[8] = 0;
74eacdb9 2224 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
4a71df50 2225 "with link type %s (portname: %s)\n",
4a71df50
FB		 2226 qeth_get_cardname(card),
2227 (card->info.mcl_level[0]) ? " (level: " : "",
2228 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2229 (card->info.mcl_level[0]) ? ")" : "",
2230 qeth_get_cardname_short(card),
2231 dbf_text);
2232
2233}
2234
2235static void qeth_print_status_no_portname(struct qeth_card *card)
2236{
2237 if (card->info.portname[0])
74eacdb9 2238 dev_info(&card->gdev->dev, "Device is a%s "
4a71df50
FB		 2239 "card%s%s%s\nwith link type %s "
2240 "(no portname needed by interface).\n",
4a71df50
FB		 2241 qeth_get_cardname(card),
2242 (card->info.mcl_level[0]) ? " (level: " : "",
2243 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2244 (card->info.mcl_level[0]) ? ")" : "",
2245 qeth_get_cardname_short(card));
2246 else
74eacdb9 2247 dev_info(&card->gdev->dev, "Device is a%s "
4a71df50 2248 "card%s%s%s\nwith link type %s.\n",
4a71df50
FB		 2249 qeth_get_cardname(card),
2250 (card->info.mcl_level[0]) ? " (level: " : "",
2251 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2252 (card->info.mcl_level[0]) ? ")" : "",
2253 qeth_get_cardname_short(card));
2254}
2255
2256void qeth_print_status_message(struct qeth_card *card)
2257{
2258 switch (card->info.type) {
2259 case QETH_CARD_TYPE_OSAE:
2260 /* VM will use a non-zero first character
2261 * to indicate a HiperSockets like reporting
2262 * of the level OSA sets the first character to zero
2263 * */
2264 if (!card->info.mcl_level[0]) {
2265 sprintf(card->info.mcl_level, "%02x%02x",
2266 card->info.mcl_level[2],
2267 card->info.mcl_level[3]);
2268
2269 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2270 break;
2271 }
2272 /* fallthrough */
2273 case QETH_CARD_TYPE_IQD:
906f1f07
KDW		 2274 if ((card->info.guestlan) ||
2275 (card->info.mcl_level[0] & 0x80)) {
4a71df50
FB		 2276 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2277 card->info.mcl_level[0]];
2278 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2279 card->info.mcl_level[1]];
2280 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2281 card->info.mcl_level[2]];
2282 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2283 card->info.mcl_level[3]];
2284 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2285 }
2286 break;
2287 default:
2288 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2289 }
2290 if (card->info.portname_required)
2291 qeth_print_status_with_portname(card);
2292 else
2293 qeth_print_status_no_portname(card);
2294}
2295EXPORT_SYMBOL_GPL(qeth_print_status_message);
2296
4a71df50
FB		 2297static void qeth_initialize_working_pool_list(struct qeth_card *card)
2298{
2299 struct qeth_buffer_pool_entry *entry;
2300
d11ba0c4 2301 QETH_DBF_TEXT(TRACE, 5, "inwrklst");
4a71df50
FB		 2302
2303 list_for_each_entry(entry,
2304 &card->qdio.init_pool.entry_list, init_list) {
2305 qeth_put_buffer_pool_entry(card, entry);
2306 }
2307}
2308
2309static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2310 struct qeth_card *card)
2311{
2312 struct list_head *plh;
2313 struct qeth_buffer_pool_entry *entry;
2314 int i, free;
2315 struct page *page;
2316
2317 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2318 return NULL;
2319
2320 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2321 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2322 free = 1;
2323 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2324 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2325 free = 0;
2326 break;
2327 }
2328 }
2329 if (free) {
2330 list_del_init(&entry->list);
2331 return entry;
2332 }
2333 }
2334
2335 /* no free buffer in pool so take first one and swap pages */
2336 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2337 struct qeth_buffer_pool_entry, list);
2338 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2339 if (page_count(virt_to_page(entry->elements[i])) > 1) {
508b3c4f 2340 page = alloc_page(GFP_ATOMIC);
4a71df50
FB		 2341 if (!page) {
2342 return NULL;
2343 } else {
2344 free_page((unsigned long)entry->elements[i]);
2345 entry->elements[i] = page_address(page);
2346 if (card->options.performance_stats)
2347 card->perf_stats.sg_alloc_page_rx++;
2348 }
2349 }
2350 }
2351 list_del_init(&entry->list);
2352 return entry;
2353}
2354
2355static int qeth_init_input_buffer(struct qeth_card *card,
2356 struct qeth_qdio_buffer *buf)
2357{
2358 struct qeth_buffer_pool_entry *pool_entry;
2359 int i;
2360
2361 pool_entry = qeth_find_free_buffer_pool_entry(card);
2362 if (!pool_entry)
2363 return 1;
2364
2365 /*
2366 * since the buffer is accessed only from the input_tasklet
2367 * there shouldn't be a need to synchronize; also, since we use
2368 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2369 * buffers
2370 */
4a71df50
FB		 2371
2372 buf->pool_entry = pool_entry;
2373 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2374 buf->buffer->element[i].length = PAGE_SIZE;
2375 buf->buffer->element[i].addr = pool_entry->elements[i];
2376 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
2377 buf->buffer->element[i].flags = SBAL_FLAGS_LAST_ENTRY;
2378 else
2379 buf->buffer->element[i].flags = 0;
2380 }
2381 return 0;
2382}
2383
2384int qeth_init_qdio_queues(struct qeth_card *card)
2385{
2386 int i, j;
2387 int rc;
2388
d11ba0c4 2389 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
4a71df50
FB		 2390
2391 /* inbound queue */
2392 memset(card->qdio.in_q->qdio_bufs, 0,
2393 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2394 qeth_initialize_working_pool_list(card);
2395 /*give only as many buffers to hardware as we have buffer pool entries*/
2396 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2397 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2398 card->qdio.in_q->next_buf_to_init =
2399 card->qdio.in_buf_pool.buf_count - 1;
2400 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
779e6e1c 2401 card->qdio.in_buf_pool.buf_count - 1);
4a71df50 2402 if (rc) {
d11ba0c4 2403 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2404 return rc;
2405 }
4a71df50
FB		 2406 /* outbound queue */
2407 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2408 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2409 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2410 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2411 qeth_clear_output_buffer(card->qdio.out_qs[i],
2412 &card->qdio.out_qs[i]->bufs[j]);
2413 }
2414 card->qdio.out_qs[i]->card = card;
2415 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2416 card->qdio.out_qs[i]->do_pack = 0;
2417 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2418 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2419 atomic_set(&card->qdio.out_qs[i]->state,
2420 QETH_OUT_Q_UNLOCKED);
2421 }
2422 return 0;
2423}
2424EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2425
2426static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2427{
2428 switch (link_type) {
2429 case QETH_LINK_TYPE_HSTR:
2430 return 2;
2431 default:
2432 return 1;
2433 }
2434}
2435
2436static void qeth_fill_ipacmd_header(struct qeth_card *card,
2437 struct qeth_ipa_cmd *cmd, __u8 command,
2438 enum qeth_prot_versions prot)
2439{
2440 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2441 cmd->hdr.command = command;
2442 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2443 cmd->hdr.seqno = card->seqno.ipa;
2444 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2445 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2446 if (card->options.layer2)
2447 cmd->hdr.prim_version_no = 2;
2448 else
2449 cmd->hdr.prim_version_no = 1;
2450 cmd->hdr.param_count = 1;
2451 cmd->hdr.prot_version = prot;
2452 cmd->hdr.ipa_supported = 0;
2453 cmd->hdr.ipa_enabled = 0;
2454}
2455
2456struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2457 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2458{
2459 struct qeth_cmd_buffer *iob;
2460 struct qeth_ipa_cmd *cmd;
2461
2462 iob = qeth_wait_for_buffer(&card->write);
2463 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2464 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2465
2466 return iob;
2467}
2468EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2469
2470void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2471 char prot_type)
2472{
2473 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2474 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2475 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2476 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2477}
2478EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2479
2480int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2481 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2482 unsigned long),
2483 void *reply_param)
2484{
2485 int rc;
2486 char prot_type;
4a71df50 2487
d11ba0c4 2488 QETH_DBF_TEXT(TRACE, 4, "sendipa");
4a71df50
FB		 2489
2490 if (card->options.layer2)
2491 if (card->info.type == QETH_CARD_TYPE_OSN)
2492 prot_type = QETH_PROT_OSN2;
2493 else
2494 prot_type = QETH_PROT_LAYER2;
2495 else
2496 prot_type = QETH_PROT_TCPIP;
2497 qeth_prepare_ipa_cmd(card, iob, prot_type);
d11ba0c4
PT		 2498 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2499 iob, reply_cb, reply_param);
4a71df50
FB		 2500 return rc;
2501}
2502EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2503
2504static int qeth_send_startstoplan(struct qeth_card *card,
2505 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2506{
2507 int rc;
2508 struct qeth_cmd_buffer *iob;
2509
2510 iob = qeth_get_ipacmd_buffer(card, ipacmd, prot);
2511 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
2512
2513 return rc;
2514}
2515
2516int qeth_send_startlan(struct qeth_card *card)
2517{
2518 int rc;
2519
d11ba0c4 2520 QETH_DBF_TEXT(SETUP, 2, "strtlan");
4a71df50
FB		 2521
2522 rc = qeth_send_startstoplan(card, IPA_CMD_STARTLAN, 0);
2523 return rc;
2524}
2525EXPORT_SYMBOL_GPL(qeth_send_startlan);
2526
2527int qeth_send_stoplan(struct qeth_card *card)
2528{
2529 int rc = 0;
2530
2531 /*
2532 * TODO: according to the IPA format document page 14,
2533 * TCP/IP (we!) never issue a STOPLAN
2534 * is this right ?!?
2535 */
d11ba0c4 2536 QETH_DBF_TEXT(SETUP, 2, "stoplan");
4a71df50
FB		 2537
2538 rc = qeth_send_startstoplan(card, IPA_CMD_STOPLAN, 0);
2539 return rc;
2540}
2541EXPORT_SYMBOL_GPL(qeth_send_stoplan);
2542
2543int qeth_default_setadapterparms_cb(struct qeth_card *card,
2544 struct qeth_reply *reply, unsigned long data)
2545{
2546 struct qeth_ipa_cmd *cmd;
2547
d11ba0c4 2548 QETH_DBF_TEXT(TRACE, 4, "defadpcb");
4a71df50
FB		 2549
2550 cmd = (struct qeth_ipa_cmd *) data;
2551 if (cmd->hdr.return_code == 0)
2552 cmd->hdr.return_code =
2553 cmd->data.setadapterparms.hdr.return_code;
2554 return 0;
2555}
2556EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb);
2557
2558static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2559 struct qeth_reply *reply, unsigned long data)
2560{
2561 struct qeth_ipa_cmd *cmd;
2562
d11ba0c4 2563 QETH_DBF_TEXT(TRACE, 3, "quyadpcb");
4a71df50
FB		 2564
2565 cmd = (struct qeth_ipa_cmd *) data;
2566 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f)
2567 card->info.link_type =
2568 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
2569 card->options.adp.supported_funcs =
2570 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2571 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2572}
2573
2574struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
2575 __u32 command, __u32 cmdlen)
2576{
2577 struct qeth_cmd_buffer *iob;
2578 struct qeth_ipa_cmd *cmd;
2579
2580 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2581 QETH_PROT_IPV4);
2582 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2583 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2584 cmd->data.setadapterparms.hdr.command_code = command;
2585 cmd->data.setadapterparms.hdr.used_total = 1;
2586 cmd->data.setadapterparms.hdr.seq_no = 1;
2587
2588 return iob;
2589}
2590EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd);
2591
2592int qeth_query_setadapterparms(struct qeth_card *card)
2593{
2594 int rc;
2595 struct qeth_cmd_buffer *iob;
2596
d11ba0c4 2597 QETH_DBF_TEXT(TRACE, 3, "queryadp");
4a71df50
FB		 2598 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2599 sizeof(struct qeth_ipacmd_setadpparms));
2600 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2601 return rc;
2602}
2603EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2604
2605int qeth_check_qdio_errors(struct qdio_buffer *buf, unsigned int qdio_error,
779e6e1c 2606 const char *dbftext)
4a71df50 2607{
779e6e1c 2608 if (qdio_error) {
d11ba0c4
PT		 2609 QETH_DBF_TEXT(TRACE, 2, dbftext);
2610 QETH_DBF_TEXT(QERR, 2, dbftext);
2611 QETH_DBF_TEXT_(QERR, 2, " F15=%02X",
4a71df50 2612 buf->element[15].flags & 0xff);
d11ba0c4 2613 QETH_DBF_TEXT_(QERR, 2, " F14=%02X",
4a71df50 2614 buf->element[14].flags & 0xff);
d11ba0c4 2615 QETH_DBF_TEXT_(QERR, 2, " qerr=%X", qdio_error);
4a71df50
FB		 2616 return 1;
2617 }
2618 return 0;
2619}
2620EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
2621
2622void qeth_queue_input_buffer(struct qeth_card *card, int index)
2623{
2624 struct qeth_qdio_q *queue = card->qdio.in_q;
2625 int count;
2626 int i;
2627 int rc;
2628 int newcount = 0;
2629
4a71df50
FB		 2630 count = (index < queue->next_buf_to_init)?
2631 card->qdio.in_buf_pool.buf_count -
2632 (queue->next_buf_to_init - index) :
2633 card->qdio.in_buf_pool.buf_count -
2634 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
2635 /* only requeue at a certain threshold to avoid SIGAs */
2636 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
2637 for (i = queue->next_buf_to_init;
2638 i < queue->next_buf_to_init + count; ++i) {
2639 if (qeth_init_input_buffer(card,
2640 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
2641 break;
2642 } else {
2643 newcount++;
2644 }
2645 }
2646
2647 if (newcount < count) {
2648 /* we are in memory shortage so we switch back to
2649 traditional skb allocation and drop packages */
4a71df50
FB		 2650 atomic_set(&card->force_alloc_skb, 3);
2651 count = newcount;
2652 } else {
4a71df50
FB		 2653 atomic_add_unless(&card->force_alloc_skb, -1, 0);
2654 }
2655
2656 /*
2657 * according to old code it should be avoided to requeue all
2658 * 128 buffers in order to benefit from PCI avoidance.
2659 * this function keeps at least one buffer (the buffer at
2660 * 'index') un-requeued -> this buffer is the first buffer that
2661 * will be requeued the next time
2662 */
2663 if (card->options.performance_stats) {
2664 card->perf_stats.inbound_do_qdio_cnt++;
2665 card->perf_stats.inbound_do_qdio_start_time =
2666 qeth_get_micros();
2667 }
779e6e1c
JG		 2668 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
2669 queue->next_buf_to_init, count);
4a71df50
FB		 2670 if (card->options.performance_stats)
2671 card->perf_stats.inbound_do_qdio_time +=
2672 qeth_get_micros() -
2673 card->perf_stats.inbound_do_qdio_start_time;
2674 if (rc) {
74eacdb9
FB		 2675 dev_warn(&card->gdev->dev,
2676 "QDIO reported an error, rc=%i\n", rc);
d11ba0c4
PT		 2677 QETH_DBF_TEXT(TRACE, 2, "qinberr");
2678 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
4a71df50
FB		 2679 }
2680 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
2681 QDIO_MAX_BUFFERS_PER_Q;
2682 }
2683}
2684EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
2685
2686static int qeth_handle_send_error(struct qeth_card *card,
779e6e1c 2687 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
4a71df50
FB		 2688{
2689 int sbalf15 = buffer->buffer->element[15].flags & 0xff;
779e6e1c 2690 int cc = qdio_err & 3;
4a71df50 2691
d11ba0c4 2692 QETH_DBF_TEXT(TRACE, 6, "hdsnderr");
779e6e1c 2693 qeth_check_qdio_errors(buffer->buffer, qdio_err, "qouterr");
4a71df50
FB		 2694 switch (cc) {
2695 case 0:
2696 if (qdio_err) {
d11ba0c4
PT		 2697 QETH_DBF_TEXT(TRACE, 1, "lnkfail");
2698 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
2699 QETH_DBF_TEXT_(TRACE, 1, "%04x %02x",
4a71df50
FB		 2700 (u16)qdio_err, (u8)sbalf15);
2701 return QETH_SEND_ERROR_LINK_FAILURE;
2702 }
2703 return QETH_SEND_ERROR_NONE;
2704 case 2:
779e6e1c 2705 if (qdio_err & QDIO_ERROR_SIGA_BUSY) {
d11ba0c4
PT		 2706 QETH_DBF_TEXT(TRACE, 1, "SIGAcc2B");
2707 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
4a71df50
FB		 2708 return QETH_SEND_ERROR_KICK_IT;
2709 }
2710 if ((sbalf15 >= 15) && (sbalf15 <= 31))
2711 return QETH_SEND_ERROR_RETRY;
2712 return QETH_SEND_ERROR_LINK_FAILURE;
2713 /* look at qdio_error and sbalf 15 */
2714 case 1:
d11ba0c4
PT		 2715 QETH_DBF_TEXT(TRACE, 1, "SIGAcc1");
2716 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
4a71df50
FB		 2717 return QETH_SEND_ERROR_LINK_FAILURE;
2718 case 3:
2719 default:
d11ba0c4
PT		 2720 QETH_DBF_TEXT(TRACE, 1, "SIGAcc3");
2721 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
4a71df50
FB		 2722 return QETH_SEND_ERROR_KICK_IT;
2723 }
2724}
2725
2726/*
2727 * Switched to packing state if the number of used buffers on a queue
2728 * reaches a certain limit.
2729 */
2730static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
2731{
2732 if (!queue->do_pack) {
2733 if (atomic_read(&queue->used_buffers)
2734 >= QETH_HIGH_WATERMARK_PACK){
2735 /* switch non-PACKING -> PACKING */
d11ba0c4 2736 QETH_DBF_TEXT(TRACE, 6, "np->pack");
4a71df50
FB		 2737 if (queue->card->options.performance_stats)
2738 queue->card->perf_stats.sc_dp_p++;
2739 queue->do_pack = 1;
2740 }
2741 }
2742}
2743
2744/*
2745 * Switches from packing to non-packing mode. If there is a packing
2746 * buffer on the queue this buffer will be prepared to be flushed.
2747 * In that case 1 is returned to inform the caller. If no buffer
2748 * has to be flushed, zero is returned.
2749 */
2750static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
2751{
2752 struct qeth_qdio_out_buffer *buffer;
2753 int flush_count = 0;
2754
2755 if (queue->do_pack) {
2756 if (atomic_read(&queue->used_buffers)
2757 <= QETH_LOW_WATERMARK_PACK) {
2758 /* switch PACKING -> non-PACKING */
d11ba0c4 2759 QETH_DBF_TEXT(TRACE, 6, "pack->np");
4a71df50
FB		 2760 if (queue->card->options.performance_stats)
2761 queue->card->perf_stats.sc_p_dp++;
2762 queue->do_pack = 0;
2763 /* flush packing buffers */
2764 buffer = &queue->bufs[queue->next_buf_to_fill];
2765 if ((atomic_read(&buffer->state) ==
2766 QETH_QDIO_BUF_EMPTY) &&
2767 (buffer->next_element_to_fill > 0)) {
2768 atomic_set(&buffer->state,
2769 QETH_QDIO_BUF_PRIMED);
2770 flush_count++;
2771 queue->next_buf_to_fill =
2772 (queue->next_buf_to_fill + 1) %
2773 QDIO_MAX_BUFFERS_PER_Q;
2774 }
2775 }
2776 }
2777 return flush_count;
2778}
2779
2780/*
2781 * Called to flush a packing buffer if no more pci flags are on the queue.
2782 * Checks if there is a packing buffer and prepares it to be flushed.
2783 * In that case returns 1, otherwise zero.
2784 */
2785static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
2786{
2787 struct qeth_qdio_out_buffer *buffer;
2788
2789 buffer = &queue->bufs[queue->next_buf_to_fill];
2790 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
2791 (buffer->next_element_to_fill > 0)) {
2792 /* it's a packing buffer */
2793 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
2794 queue->next_buf_to_fill =
2795 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
2796 return 1;
2797 }
2798 return 0;
2799}
2800
779e6e1c
JG		 2801static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
2802 int count)
4a71df50
FB		 2803{
2804 struct qeth_qdio_out_buffer *buf;
2805 int rc;
2806 int i;
2807 unsigned int qdio_flags;
2808
4a71df50
FB		 2809 for (i = index; i < index + count; ++i) {
2810 buf = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2811 buf->buffer->element[buf->next_element_to_fill - 1].flags |=
2812 SBAL_FLAGS_LAST_ENTRY;
2813
2814 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
2815 continue;
2816
2817 if (!queue->do_pack) {
2818 if ((atomic_read(&queue->used_buffers) >=
2819 (QETH_HIGH_WATERMARK_PACK -
2820 QETH_WATERMARK_PACK_FUZZ)) &&
2821 !atomic_read(&queue->set_pci_flags_count)) {
2822 /* it's likely that we'll go to packing
2823 * mode soon */
2824 atomic_inc(&queue->set_pci_flags_count);
2825 buf->buffer->element[0].flags |= 0x40;
2826 }
2827 } else {
2828 if (!atomic_read(&queue->set_pci_flags_count)) {
2829 /*
2830 * there's no outstanding PCI any more, so we
2831 * have to request a PCI to be sure the the PCI
2832 * will wake at some time in the future then we
2833 * can flush packed buffers that might still be
2834 * hanging around, which can happen if no
2835 * further send was requested by the stack
2836 */
2837 atomic_inc(&queue->set_pci_flags_count);
2838 buf->buffer->element[0].flags |= 0x40;
2839 }
2840 }
2841 }
2842
2843 queue->card->dev->trans_start = jiffies;
2844 if (queue->card->options.performance_stats) {
2845 queue->card->perf_stats.outbound_do_qdio_cnt++;
2846 queue->card->perf_stats.outbound_do_qdio_start_time =
2847 qeth_get_micros();
2848 }
2849 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
4a71df50
FB		 2850 if (atomic_read(&queue->set_pci_flags_count))
2851 qdio_flags |= QDIO_FLAG_PCI_OUT;
2852 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
779e6e1c 2853 queue->queue_no, index, count);
4a71df50
FB		 2854 if (queue->card->options.performance_stats)
2855 queue->card->perf_stats.outbound_do_qdio_time +=
2856 qeth_get_micros() -
2857 queue->card->perf_stats.outbound_do_qdio_start_time;
2858 if (rc) {
d11ba0c4
PT		 2859 QETH_DBF_TEXT(TRACE, 2, "flushbuf");
2860 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
2861 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_DDEV_ID(queue->card));
4a71df50
FB		 2862 queue->card->stats.tx_errors += count;
2863 /* this must not happen under normal circumstances. if it
2864 * happens something is really wrong -> recover */
2865 qeth_schedule_recovery(queue->card);
2866 return;
2867 }
2868 atomic_add(count, &queue->used_buffers);
2869 if (queue->card->options.performance_stats)
2870 queue->card->perf_stats.bufs_sent += count;
2871}
2872
2873static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
2874{
2875 int index;
2876 int flush_cnt = 0;
2877 int q_was_packing = 0;
2878
2879 /*
2880 * check if weed have to switch to non-packing mode or if
2881 * we have to get a pci flag out on the queue
2882 */
2883 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
2884 !atomic_read(&queue->set_pci_flags_count)) {
2885 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
2886 QETH_OUT_Q_UNLOCKED) {
2887 /*
2888 * If we get in here, there was no action in
2889 * do_send_packet. So, we check if there is a
2890 * packing buffer to be flushed here.
2891 */
2892 netif_stop_queue(queue->card->dev);
2893 index = queue->next_buf_to_fill;
2894 q_was_packing = queue->do_pack;
2895 /* queue->do_pack may change */
2896 barrier();
2897 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
2898 if (!flush_cnt &&
2899 !atomic_read(&queue->set_pci_flags_count))
2900 flush_cnt +=
2901 qeth_flush_buffers_on_no_pci(queue);
2902 if (queue->card->options.performance_stats &&
2903 q_was_packing)
2904 queue->card->perf_stats.bufs_sent_pack +=
2905 flush_cnt;
2906 if (flush_cnt)
779e6e1c 2907 qeth_flush_buffers(queue, index, flush_cnt);
4a71df50
FB		 2908 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
2909 }
2910 }
2911}
2912
779e6e1c
JG		 2913void qeth_qdio_output_handler(struct ccw_device *ccwdev,
2914 unsigned int qdio_error, int __queue, int first_element,
2915 int count, unsigned long card_ptr)
4a71df50
FB		 2916{
2917 struct qeth_card *card = (struct qeth_card *) card_ptr;
2918 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
2919 struct qeth_qdio_out_buffer *buffer;
2920 int i;
2921
d11ba0c4 2922 QETH_DBF_TEXT(TRACE, 6, "qdouhdl");
779e6e1c
JG		 2923 if (qdio_error & QDIO_ERROR_ACTIVATE_CHECK_CONDITION) {
2924 QETH_DBF_TEXT(TRACE, 2, "achkcond");
2925 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
2926 netif_stop_queue(card->dev);
2927 qeth_schedule_recovery(card);
2928 return;
4a71df50
FB		 2929 }
2930 if (card->options.performance_stats) {
2931 card->perf_stats.outbound_handler_cnt++;
2932 card->perf_stats.outbound_handler_start_time =
2933 qeth_get_micros();
2934 }
2935 for (i = first_element; i < (first_element + count); ++i) {
2936 buffer = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2937 /*we only handle the KICK_IT error by doing a recovery */
779e6e1c 2938 if (qeth_handle_send_error(card, buffer, qdio_error)
4a71df50
FB		 2939 == QETH_SEND_ERROR_KICK_IT){
2940 netif_stop_queue(card->dev);
2941 qeth_schedule_recovery(card);
2942 return;
2943 }
2944 qeth_clear_output_buffer(queue, buffer);
2945 }
2946 atomic_sub(count, &queue->used_buffers);
2947 /* check if we need to do something on this outbound queue */
2948 if (card->info.type != QETH_CARD_TYPE_IQD)
2949 qeth_check_outbound_queue(queue);
2950
2951 netif_wake_queue(queue->card->dev);
2952 if (card->options.performance_stats)
2953 card->perf_stats.outbound_handler_time += qeth_get_micros() -
2954 card->perf_stats.outbound_handler_start_time;
2955}
2956EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
2957
2958int qeth_get_cast_type(struct qeth_card *card, struct sk_buff *skb)
2959{
2960 int cast_type = RTN_UNSPEC;
2961
2962 if (card->info.type == QETH_CARD_TYPE_OSN)
2963 return cast_type;
2964
2965 if (skb->dst && skb->dst->neighbour) {
2966 cast_type = skb->dst->neighbour->type;
2967 if ((cast_type == RTN_BROADCAST) ||
2968 (cast_type == RTN_MULTICAST) ||
2969 (cast_type == RTN_ANYCAST))
2970 return cast_type;
2971 else
2972 return RTN_UNSPEC;
2973 }
2974 /* try something else */
2975 if (skb->protocol == ETH_P_IPV6)
2976 return (skb_network_header(skb)[24] == 0xff) ?
2977 RTN_MULTICAST : 0;
2978 else if (skb->protocol == ETH_P_IP)
2979 return ((skb_network_header(skb)[16] & 0xf0) == 0xe0) ?
2980 RTN_MULTICAST : 0;
2981 /* ... */
2982 if (!memcmp(skb->data, skb->dev->broadcast, 6))
2983 return RTN_BROADCAST;
2984 else {
2985 u16 hdr_mac;
2986
2987 hdr_mac = *((u16 *)skb->data);
2988 /* tr multicast? */
2989 switch (card->info.link_type) {
2990 case QETH_LINK_TYPE_HSTR:
2991 case QETH_LINK_TYPE_LANE_TR:
2992 if ((hdr_mac == QETH_TR_MAC_NC) ||
2993 (hdr_mac == QETH_TR_MAC_C))
2994 return RTN_MULTICAST;
2995 break;
2996 /* eth or so multicast? */
2997 default:
2998 if ((hdr_mac == QETH_ETH_MAC_V4) ||
2999 (hdr_mac == QETH_ETH_MAC_V6))
3000 return RTN_MULTICAST;
3001 }
3002 }
3003 return cast_type;
3004}
3005EXPORT_SYMBOL_GPL(qeth_get_cast_type);
3006
3007int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
3008 int ipv, int cast_type)
3009{
3010 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSAE))
3011 return card->qdio.default_out_queue;
3012 switch (card->qdio.no_out_queues) {
3013 case 4:
3014 if (cast_type && card->info.is_multicast_different)
3015 return card->info.is_multicast_different &
3016 (card->qdio.no_out_queues - 1);
3017 if (card->qdio.do_prio_queueing && (ipv == 4)) {
3018 const u8 tos = ip_hdr(skb)->tos;
3019
3020 if (card->qdio.do_prio_queueing ==
3021 QETH_PRIO_Q_ING_TOS) {
3022 if (tos & IP_TOS_NOTIMPORTANT)
3023 return 3;
3024 if (tos & IP_TOS_HIGHRELIABILITY)
3025 return 2;
3026 if (tos & IP_TOS_HIGHTHROUGHPUT)
3027 return 1;
3028 if (tos & IP_TOS_LOWDELAY)
3029 return 0;
3030 }
3031 if (card->qdio.do_prio_queueing ==
3032 QETH_PRIO_Q_ING_PREC)
3033 return 3 - (tos >> 6);
3034 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
3035 /* TODO: IPv6!!! */
3036 }
3037 return card->qdio.default_out_queue;
3038 case 1: /* fallthrough for single-out-queue 1920-device */
3039 default:
3040 return card->qdio.default_out_queue;
3041 }
3042}
3043EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3044
4a71df50
FB		 3045int qeth_get_elements_no(struct qeth_card *card, void *hdr,
3046 struct sk_buff *skb, int elems)
3047{
3048 int elements_needed = 0;
3049
3050 if (skb_shinfo(skb)->nr_frags > 0)
3051 elements_needed = (skb_shinfo(skb)->nr_frags + 1);
3052 if (elements_needed == 0)
683d718a
FB		 3053 elements_needed = 1 + (((((unsigned long) skb->data) %
3054 PAGE_SIZE) + skb->len) >> PAGE_SHIFT);
4a71df50 3055 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
14cc21b6 3056 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
4a71df50
FB		 3057 "(Number=%d / Length=%d). Discarded.\n",
3058 (elements_needed+elems), skb->len);
3059 return 0;
3060 }
3061 return elements_needed;
3062}
3063EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3064
f90b744e 3065static inline void __qeth_fill_buffer(struct sk_buff *skb,
683d718a
FB		 3066 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
3067 int offset)
4a71df50 3068{
e1f03ae8 3069 int length = skb->len;
4a71df50
FB		 3070 int length_here;
3071 int element;
3072 char *data;
3073 int first_lap ;
3074
3075 element = *next_element_to_fill;
3076 data = skb->data;
3077 first_lap = (is_tso == 0 ? 1 : 0);
3078
683d718a
FB		 3079 if (offset >= 0) {
3080 data = skb->data + offset;
e1f03ae8 3081 length -= offset;
683d718a
FB		 3082 first_lap = 0;
3083 }
3084
4a71df50
FB		 3085 while (length > 0) {
3086 /* length_here is the remaining amount of data in this page */
3087 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3088 if (length < length_here)
3089 length_here = length;
3090
3091 buffer->element[element].addr = data;
3092 buffer->element[element].length = length_here;
3093 length -= length_here;
3094 if (!length) {
3095 if (first_lap)
3096 buffer->element[element].flags = 0;
3097 else
3098 buffer->element[element].flags =
3099 SBAL_FLAGS_LAST_FRAG;
3100 } else {
3101 if (first_lap)
3102 buffer->element[element].flags =
3103 SBAL_FLAGS_FIRST_FRAG;
3104 else
3105 buffer->element[element].flags =
3106 SBAL_FLAGS_MIDDLE_FRAG;
3107 }
3108 data += length_here;
3109 element++;
3110 first_lap = 0;
3111 }
3112 *next_element_to_fill = element;
3113}
3114
f90b744e 3115static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
683d718a
FB		 3116 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3117 struct qeth_hdr *hdr, int offset, int hd_len)
4a71df50
FB		 3118{
3119 struct qdio_buffer *buffer;
4a71df50
FB		 3120 int flush_cnt = 0, hdr_len, large_send = 0;
3121
4a71df50
FB		 3122 buffer = buf->buffer;
3123 atomic_inc(&skb->users);
3124 skb_queue_tail(&buf->skb_list, skb);
3125
4a71df50 3126 /*check first on TSO ....*/
683d718a 3127 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
4a71df50
FB		 3128 int element = buf->next_element_to_fill;
3129
683d718a
FB		 3130 hdr_len = sizeof(struct qeth_hdr_tso) +
3131 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
4a71df50
FB		 3132 /*fill first buffer entry only with header information */
3133 buffer->element[element].addr = skb->data;
3134 buffer->element[element].length = hdr_len;
3135 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3136 buf->next_element_to_fill++;
3137 skb->data += hdr_len;
3138 skb->len -= hdr_len;
3139 large_send = 1;
3140 }
683d718a
FB		 3141
3142 if (offset >= 0) {
3143 int element = buf->next_element_to_fill;
3144 buffer->element[element].addr = hdr;
3145 buffer->element[element].length = sizeof(struct qeth_hdr) +
3146 hd_len;
3147 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3148 buf->is_header[element] = 1;
3149 buf->next_element_to_fill++;
3150 }
3151
4a71df50
FB		 3152 if (skb_shinfo(skb)->nr_frags == 0)
3153 __qeth_fill_buffer(skb, buffer, large_send,
683d718a 3154 (int *)&buf->next_element_to_fill, offset);
4a71df50
FB		 3155 else
3156 __qeth_fill_buffer_frag(skb, buffer, large_send,
3157 (int *)&buf->next_element_to_fill);
3158
3159 if (!queue->do_pack) {
d11ba0c4 3160 QETH_DBF_TEXT(TRACE, 6, "fillbfnp");
4a71df50
FB		 3161 /* set state to PRIMED -> will be flushed */
3162 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3163 flush_cnt = 1;
3164 } else {
d11ba0c4 3165 QETH_DBF_TEXT(TRACE, 6, "fillbfpa");
4a71df50
FB		 3166 if (queue->card->options.performance_stats)
3167 queue->card->perf_stats.skbs_sent_pack++;
3168 if (buf->next_element_to_fill >=
3169 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3170 /*
3171 * packed buffer if full -> set state PRIMED
3172 * -> will be flushed
3173 */
3174 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3175 flush_cnt = 1;
3176 }
3177 }
3178 return flush_cnt;
3179}
3180
3181int qeth_do_send_packet_fast(struct qeth_card *card,
3182 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3183 struct qeth_hdr *hdr, int elements_needed,
683d718a 3184 struct qeth_eddp_context *ctx, int offset, int hd_len)
4a71df50
FB		 3185{
3186 struct qeth_qdio_out_buffer *buffer;
3187 int buffers_needed = 0;
3188 int flush_cnt = 0;
3189 int index;
3190
4a71df50
FB		 3191 /* spin until we get the queue ... */
3192 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3193 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3194 /* ... now we've got the queue */
3195 index = queue->next_buf_to_fill;
3196 buffer = &queue->bufs[queue->next_buf_to_fill];
3197 /*
3198 * check if buffer is empty to make sure that we do not 'overtake'
3199 * ourselves and try to fill a buffer that is already primed
3200 */
3201 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3202 goto out;
3203 if (ctx == NULL)
3204 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
3205 QDIO_MAX_BUFFERS_PER_Q;
3206 else {
3207 buffers_needed = qeth_eddp_check_buffers_for_context(queue,
3208 ctx);
3209 if (buffers_needed < 0)
3210 goto out;
3211 queue->next_buf_to_fill =
3212 (queue->next_buf_to_fill + buffers_needed) %
3213 QDIO_MAX_BUFFERS_PER_Q;
3214 }
3215 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3216 if (ctx == NULL) {
683d718a 3217 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
779e6e1c 3218 qeth_flush_buffers(queue, index, 1);
4a71df50
FB		 3219 } else {
3220 flush_cnt = qeth_eddp_fill_buffer(queue, ctx, index);
3221 WARN_ON(buffers_needed != flush_cnt);
779e6e1c 3222 qeth_flush_buffers(queue, index, flush_cnt);
4a71df50
FB		 3223 }
3224 return 0;
3225out:
3226 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3227 return -EBUSY;
3228}
3229EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3230
3231int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3232 struct sk_buff *skb, struct qeth_hdr *hdr,
3233 int elements_needed, struct qeth_eddp_context *ctx)
3234{
3235 struct qeth_qdio_out_buffer *buffer;
3236 int start_index;
3237 int flush_count = 0;
3238 int do_pack = 0;
3239 int tmp;
3240 int rc = 0;
3241
4a71df50
FB		 3242 /* spin until we get the queue ... */
3243 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3244 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3245 start_index = queue->next_buf_to_fill;
3246 buffer = &queue->bufs[queue->next_buf_to_fill];
3247 /*
3248 * check if buffer is empty to make sure that we do not 'overtake'
3249 * ourselves and try to fill a buffer that is already primed
3250 */
3251 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3252 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3253 return -EBUSY;
3254 }
3255 /* check if we need to switch packing state of this queue */
3256 qeth_switch_to_packing_if_needed(queue);
3257 if (queue->do_pack) {
3258 do_pack = 1;
3259 if (ctx == NULL) {
3260 /* does packet fit in current buffer? */
3261 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3262 buffer->next_element_to_fill) < elements_needed) {
3263 /* ... no -> set state PRIMED */
3264 atomic_set(&buffer->state,
3265 QETH_QDIO_BUF_PRIMED);
3266 flush_count++;
3267 queue->next_buf_to_fill =
3268 (queue->next_buf_to_fill + 1) %
3269 QDIO_MAX_BUFFERS_PER_Q;
3270 buffer = &queue->bufs[queue->next_buf_to_fill];
3271 /* we did a step forward, so check buffer state
3272 * again */
3273 if (atomic_read(&buffer->state) !=
3274 QETH_QDIO_BUF_EMPTY){
779e6e1c
JG		 3275 qeth_flush_buffers(queue, start_index,
3276 flush_count);
4a71df50
FB		 3277 atomic_set(&queue->state,
3278 QETH_OUT_Q_UNLOCKED);
3279 return -EBUSY;
3280 }
3281 }
3282 } else {
3283 /* check if we have enough elements (including following
3284 * free buffers) to handle eddp context */
3285 if (qeth_eddp_check_buffers_for_context(queue, ctx)
3286 < 0) {
4a71df50
FB		 3287 rc = -EBUSY;
3288 goto out;
3289 }
3290 }
3291 }
3292 if (ctx == NULL)
683d718a 3293 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
4a71df50
FB		 3294 else {
3295 tmp = qeth_eddp_fill_buffer(queue, ctx,
3296 queue->next_buf_to_fill);
3297 if (tmp < 0) {
4a71df50
FB		 3298 rc = -EBUSY;
3299 goto out;
3300 }
3301 }
3302 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3303 QDIO_MAX_BUFFERS_PER_Q;
3304 flush_count += tmp;
3305out:
3306 if (flush_count)
779e6e1c 3307 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 3308 else if (!atomic_read(&queue->set_pci_flags_count))
3309 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3310 /*
3311 * queue->state will go from LOCKED -> UNLOCKED or from
3312 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
3313 * (switch packing state or flush buffer to get another pci flag out).
3314 * In that case we will enter this loop
3315 */
3316 while (atomic_dec_return(&queue->state)) {
3317 flush_count = 0;
3318 start_index = queue->next_buf_to_fill;
3319 /* check if we can go back to non-packing state */
3320 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
3321 /*
3322 * check if we need to flush a packing buffer to get a pci
3323 * flag out on the queue
3324 */
3325 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
3326 flush_count += qeth_flush_buffers_on_no_pci(queue);
3327 if (flush_count)
779e6e1c 3328 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 3329 }
3330 /* at this point the queue is UNLOCKED again */
3331 if (queue->card->options.performance_stats && do_pack)
3332 queue->card->perf_stats.bufs_sent_pack += flush_count;
3333
3334 return rc;
3335}
3336EXPORT_SYMBOL_GPL(qeth_do_send_packet);
3337
3338static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
3339 struct qeth_reply *reply, unsigned long data)
3340{
3341 struct qeth_ipa_cmd *cmd;
3342 struct qeth_ipacmd_setadpparms *setparms;
3343
d11ba0c4 3344 QETH_DBF_TEXT(TRACE, 4, "prmadpcb");
4a71df50
FB		 3345
3346 cmd = (struct qeth_ipa_cmd *) data;
3347 setparms = &(cmd->data.setadapterparms);
3348
3349 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3350 if (cmd->hdr.return_code) {
d11ba0c4 3351 QETH_DBF_TEXT_(TRACE, 4, "prmrc%2.2x", cmd->hdr.return_code);
4a71df50
FB		 3352 setparms->data.mode = SET_PROMISC_MODE_OFF;
3353 }
3354 card->info.promisc_mode = setparms->data.mode;
3355 return 0;
3356}
3357
3358void qeth_setadp_promisc_mode(struct qeth_card *card)
3359{
3360 enum qeth_ipa_promisc_modes mode;
3361 struct net_device *dev = card->dev;
3362 struct qeth_cmd_buffer *iob;
3363 struct qeth_ipa_cmd *cmd;
3364
d11ba0c4 3365 QETH_DBF_TEXT(TRACE, 4, "setprom");
4a71df50
FB		 3366
3367 if (((dev->flags & IFF_PROMISC) &&
3368 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
3369 (!(dev->flags & IFF_PROMISC) &&
3370 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
3371 return;
3372 mode = SET_PROMISC_MODE_OFF;
3373 if (dev->flags & IFF_PROMISC)
3374 mode = SET_PROMISC_MODE_ON;
d11ba0c4 3375 QETH_DBF_TEXT_(TRACE, 4, "mode:%x", mode);
4a71df50
FB		 3376
3377 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
3378 sizeof(struct qeth_ipacmd_setadpparms));
3379 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
3380 cmd->data.setadapterparms.data.mode = mode;
3381 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
3382}
3383EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
3384
3385int qeth_change_mtu(struct net_device *dev, int new_mtu)
3386{
3387 struct qeth_card *card;
3388 char dbf_text[15];
3389
509e2562 3390 card = dev->ml_priv;
4a71df50 3391
d11ba0c4 3392 QETH_DBF_TEXT(TRACE, 4, "chgmtu");
4a71df50 3393 sprintf(dbf_text, "%8x", new_mtu);
d11ba0c4 3394 QETH_DBF_TEXT(TRACE, 4, dbf_text);
4a71df50
FB		 3395
3396 if (new_mtu < 64)
3397 return -EINVAL;
3398 if (new_mtu > 65535)
3399 return -EINVAL;
3400 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
3401 (!qeth_mtu_is_valid(card, new_mtu)))
3402 return -EINVAL;
3403 dev->mtu = new_mtu;
3404 return 0;
3405}
3406EXPORT_SYMBOL_GPL(qeth_change_mtu);
3407
3408struct net_device_stats *qeth_get_stats(struct net_device *dev)
3409{
3410 struct qeth_card *card;
3411
509e2562 3412 card = dev->ml_priv;
4a71df50 3413
d11ba0c4 3414 QETH_DBF_TEXT(TRACE, 5, "getstat");
4a71df50
FB		 3415
3416 return &card->stats;
3417}
3418EXPORT_SYMBOL_GPL(qeth_get_stats);
3419
3420static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
3421 struct qeth_reply *reply, unsigned long data)
3422{
3423 struct qeth_ipa_cmd *cmd;
3424
d11ba0c4 3425 QETH_DBF_TEXT(TRACE, 4, "chgmaccb");
4a71df50
FB		 3426
3427 cmd = (struct qeth_ipa_cmd *) data;
3428 if (!card->options.layer2 ||
3429 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
3430 memcpy(card->dev->dev_addr,
3431 &cmd->data.setadapterparms.data.change_addr.addr,
3432 OSA_ADDR_LEN);
3433 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
3434 }
3435 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3436 return 0;
3437}
3438
3439int qeth_setadpparms_change_macaddr(struct qeth_card *card)
3440{
3441 int rc;
3442 struct qeth_cmd_buffer *iob;
3443 struct qeth_ipa_cmd *cmd;
3444
d11ba0c4 3445 QETH_DBF_TEXT(TRACE, 4, "chgmac");
4a71df50
FB		 3446
3447 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
3448 sizeof(struct qeth_ipacmd_setadpparms));
3449 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3450 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
3451 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
3452 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
3453 card->dev->dev_addr, OSA_ADDR_LEN);
3454 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
3455 NULL);
3456 return rc;
3457}
3458EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
3459
3460void qeth_tx_timeout(struct net_device *dev)
3461{
3462 struct qeth_card *card;
3463
509e2562 3464 card = dev->ml_priv;
4a71df50
FB		 3465 card->stats.tx_errors++;
3466 qeth_schedule_recovery(card);
3467}
3468EXPORT_SYMBOL_GPL(qeth_tx_timeout);
3469
3470int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
3471{
509e2562 3472 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 3473 int rc = 0;
3474
3475 switch (regnum) {
3476 case MII_BMCR: /* Basic mode control register */
3477 rc = BMCR_FULLDPLX;
3478 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
3479 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
3480 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
3481 rc |= BMCR_SPEED100;
3482 break;
3483 case MII_BMSR: /* Basic mode status register */
3484 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
3485 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
3486 BMSR_100BASE4;
3487 break;
3488 case MII_PHYSID1: /* PHYS ID 1 */
3489 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
3490 dev->dev_addr[2];
3491 rc = (rc >> 5) & 0xFFFF;
3492 break;
3493 case MII_PHYSID2: /* PHYS ID 2 */
3494 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
3495 break;
3496 case MII_ADVERTISE: /* Advertisement control reg */
3497 rc = ADVERTISE_ALL;
3498 break;
3499 case MII_LPA: /* Link partner ability reg */
3500 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
3501 LPA_100BASE4 | LPA_LPACK;
3502 break;
3503 case MII_EXPANSION: /* Expansion register */
3504 break;
3505 case MII_DCOUNTER: /* disconnect counter */
3506 break;
3507 case MII_FCSCOUNTER: /* false carrier counter */
3508 break;
3509 case MII_NWAYTEST: /* N-way auto-neg test register */
3510 break;
3511 case MII_RERRCOUNTER: /* rx error counter */
3512 rc = card->stats.rx_errors;
3513 break;
3514 case MII_SREVISION: /* silicon revision */
3515 break;
3516 case MII_RESV1: /* reserved 1 */
3517 break;
3518 case MII_LBRERROR: /* loopback, rx, bypass error */
3519 break;
3520 case MII_PHYADDR: /* physical address */
3521 break;
3522 case MII_RESV2: /* reserved 2 */
3523 break;
3524 case MII_TPISTATUS: /* TPI status for 10mbps */
3525 break;
3526 case MII_NCONFIG: /* network interface config */
3527 break;
3528 default:
3529 break;
3530 }
3531 return rc;
3532}
3533EXPORT_SYMBOL_GPL(qeth_mdio_read);
3534
3535static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
3536 struct qeth_cmd_buffer *iob, int len,
3537 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
3538 unsigned long),
3539 void *reply_param)
3540{
3541 u16 s1, s2;
3542
d11ba0c4 3543 QETH_DBF_TEXT(TRACE, 4, "sendsnmp");
4a71df50
FB		 3544
3545 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
3546 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
3547 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
3548 /* adjust PDU length fields in IPA_PDU_HEADER */
3549 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
3550 s2 = (u32) len;
3551 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
3552 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
3553 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
3554 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
3555 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
3556 reply_cb, reply_param);
3557}
3558
3559static int qeth_snmp_command_cb(struct qeth_card *card,
3560 struct qeth_reply *reply, unsigned long sdata)
3561{
3562 struct qeth_ipa_cmd *cmd;
3563 struct qeth_arp_query_info *qinfo;
3564 struct qeth_snmp_cmd *snmp;
3565 unsigned char *data;
3566 __u16 data_len;
3567
d11ba0c4 3568 QETH_DBF_TEXT(TRACE, 3, "snpcmdcb");
4a71df50
FB		 3569
3570 cmd = (struct qeth_ipa_cmd *) sdata;
3571 data = (unsigned char *)((char *)cmd - reply->offset);
3572 qinfo = (struct qeth_arp_query_info *) reply->param;
3573 snmp = &cmd->data.setadapterparms.data.snmp;
3574
3575 if (cmd->hdr.return_code) {
d11ba0c4 3576 QETH_DBF_TEXT_(TRACE, 4, "scer1%i", cmd->hdr.return_code);
4a71df50
FB		 3577 return 0;
3578 }
3579 if (cmd->data.setadapterparms.hdr.return_code) {
3580 cmd->hdr.return_code =
3581 cmd->data.setadapterparms.hdr.return_code;
d11ba0c4 3582 QETH_DBF_TEXT_(TRACE, 4, "scer2%i", cmd->hdr.return_code);
4a71df50
FB		 3583 return 0;
3584 }
3585 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
3586 if (cmd->data.setadapterparms.hdr.seq_no == 1)
3587 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
3588 else
3589 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
3590
3591 /* check if there is enough room in userspace */
3592 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
d11ba0c4 3593 QETH_DBF_TEXT_(TRACE, 4, "scer3%i", -ENOMEM);
4a71df50
FB		 3594 cmd->hdr.return_code = -ENOMEM;
3595 return 0;
3596 }
d11ba0c4 3597 QETH_DBF_TEXT_(TRACE, 4, "snore%i",
4a71df50 3598 cmd->data.setadapterparms.hdr.used_total);
d11ba0c4 3599 QETH_DBF_TEXT_(TRACE, 4, "sseqn%i",
4a71df50
FB		 3600 cmd->data.setadapterparms.hdr.seq_no);
3601 /*copy entries to user buffer*/
3602 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
3603 memcpy(qinfo->udata + qinfo->udata_offset,
3604 (char *)snmp,
3605 data_len + offsetof(struct qeth_snmp_cmd, data));
3606 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
3607 } else {
3608 memcpy(qinfo->udata + qinfo->udata_offset,
3609 (char *)&snmp->request, data_len);
3610 }
3611 qinfo->udata_offset += data_len;
3612 /* check if all replies received ... */
d11ba0c4 3613 QETH_DBF_TEXT_(TRACE, 4, "srtot%i",
4a71df50 3614 cmd->data.setadapterparms.hdr.used_total);
d11ba0c4 3615 QETH_DBF_TEXT_(TRACE, 4, "srseq%i",
4a71df50
FB		 3616 cmd->data.setadapterparms.hdr.seq_no);
3617 if (cmd->data.setadapterparms.hdr.seq_no <
3618 cmd->data.setadapterparms.hdr.used_total)
3619 return 1;
3620 return 0;
3621}
3622
3623int qeth_snmp_command(struct qeth_card *card, char __user *udata)
3624{
3625 struct qeth_cmd_buffer *iob;
3626 struct qeth_ipa_cmd *cmd;
3627 struct qeth_snmp_ureq *ureq;
3628 int req_len;
3629 struct qeth_arp_query_info qinfo = {0, };
3630 int rc = 0;
3631
d11ba0c4 3632 QETH_DBF_TEXT(TRACE, 3, "snmpcmd");
4a71df50
FB		 3633
3634 if (card->info.guestlan)
3635 return -EOPNOTSUPP;
3636
3637 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
3638 (!card->options.layer2)) {
4a71df50
FB		 3639 return -EOPNOTSUPP;
3640 }
3641 /* skip 4 bytes (data_len struct member) to get req_len */
3642 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
3643 return -EFAULT;
3644 ureq = kmalloc(req_len+sizeof(struct qeth_snmp_ureq_hdr), GFP_KERNEL);
3645 if (!ureq) {
d11ba0c4 3646 QETH_DBF_TEXT(TRACE, 2, "snmpnome");
4a71df50
FB		 3647 return -ENOMEM;
3648 }
3649 if (copy_from_user(ureq, udata,
3650 req_len + sizeof(struct qeth_snmp_ureq_hdr))) {
3651 kfree(ureq);
3652 return -EFAULT;
3653 }
3654 qinfo.udata_len = ureq->hdr.data_len;
3655 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
3656 if (!qinfo.udata) {
3657 kfree(ureq);
3658 return -ENOMEM;
3659 }
3660 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
3661
3662 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
3663 QETH_SNMP_SETADP_CMDLENGTH + req_len);
3664 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3665 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
3666 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
3667 qeth_snmp_command_cb, (void *)&qinfo);
3668 if (rc)
14cc21b6 3669 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
4a71df50
FB		 3670 QETH_CARD_IFNAME(card), rc);
3671 else {
3672 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
3673 rc = -EFAULT;
3674 }
3675
3676 kfree(ureq);
3677 kfree(qinfo.udata);
3678 return rc;
3679}
3680EXPORT_SYMBOL_GPL(qeth_snmp_command);
3681
3682static inline int qeth_get_qdio_q_format(struct qeth_card *card)
3683{
3684 switch (card->info.type) {
3685 case QETH_CARD_TYPE_IQD:
3686 return 2;
3687 default:
3688 return 0;
3689 }
3690}
3691
3692static int qeth_qdio_establish(struct qeth_card *card)
3693{
3694 struct qdio_initialize init_data;
3695 char *qib_param_field;
3696 struct qdio_buffer **in_sbal_ptrs;
3697 struct qdio_buffer **out_sbal_ptrs;
3698 int i, j, k;
3699 int rc = 0;
3700
d11ba0c4 3701 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4a71df50
FB		 3702
3703 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
3704 GFP_KERNEL);
3705 if (!qib_param_field)
3706 return -ENOMEM;
3707
3708 qeth_create_qib_param_field(card, qib_param_field);
3709 qeth_create_qib_param_field_blkt(card, qib_param_field);
3710
3711 in_sbal_ptrs = kmalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
3712 GFP_KERNEL);
3713 if (!in_sbal_ptrs) {
3714 kfree(qib_param_field);
3715 return -ENOMEM;
3716 }
3717 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
3718 in_sbal_ptrs[i] = (struct qdio_buffer *)
3719 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
3720
3721 out_sbal_ptrs =
3722 kmalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
3723 sizeof(void *), GFP_KERNEL);
3724 if (!out_sbal_ptrs) {
3725 kfree(in_sbal_ptrs);
3726 kfree(qib_param_field);
3727 return -ENOMEM;
3728 }
3729 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
3730 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
3731 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
3732 card->qdio.out_qs[i]->bufs[j].buffer);
3733 }
3734
3735 memset(&init_data, 0, sizeof(struct qdio_initialize));
3736 init_data.cdev = CARD_DDEV(card);
3737 init_data.q_format = qeth_get_qdio_q_format(card);
3738 init_data.qib_param_field_format = 0;
3739 init_data.qib_param_field = qib_param_field;
4a71df50
FB		 3740 init_data.no_input_qs = 1;
3741 init_data.no_output_qs = card->qdio.no_out_queues;
3742 init_data.input_handler = card->discipline.input_handler;
3743 init_data.output_handler = card->discipline.output_handler;
3744 init_data.int_parm = (unsigned long) card;
3745 init_data.flags = QDIO_INBOUND_0COPY_SBALS |
3746 QDIO_OUTBOUND_0COPY_SBALS |
3747 QDIO_USE_OUTBOUND_PCIS;
3748 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
3749 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
3750
3751 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
3752 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
3753 rc = qdio_initialize(&init_data);
3754 if (rc)
3755 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
3756 }
3757 kfree(out_sbal_ptrs);
3758 kfree(in_sbal_ptrs);
3759 kfree(qib_param_field);
3760 return rc;
3761}
3762
3763static void qeth_core_free_card(struct qeth_card *card)
3764{
3765
d11ba0c4
PT		 3766 QETH_DBF_TEXT(SETUP, 2, "freecrd");
3767 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 3768 qeth_clean_channel(&card->read);
3769 qeth_clean_channel(&card->write);
3770 if (card->dev)
3771 free_netdev(card->dev);
3772 kfree(card->ip_tbd_list);
3773 qeth_free_qdio_buffers(card);
6bcac508 3774 unregister_service_level(&card->qeth_service_level);
4a71df50
FB		 3775 kfree(card);
3776}
3777
3778static struct ccw_device_id qeth_ids[] = {
3779 {CCW_DEVICE(0x1731, 0x01), .driver_info = QETH_CARD_TYPE_OSAE},
3780 {CCW_DEVICE(0x1731, 0x05), .driver_info = QETH_CARD_TYPE_IQD},
3781 {CCW_DEVICE(0x1731, 0x06), .driver_info = QETH_CARD_TYPE_OSN},
3782 {},
3783};
3784MODULE_DEVICE_TABLE(ccw, qeth_ids);
3785
3786static struct ccw_driver qeth_ccw_driver = {
3787 .name = "qeth",
3788 .ids = qeth_ids,
3789 .probe = ccwgroup_probe_ccwdev,
3790 .remove = ccwgroup_remove_ccwdev,
3791};
3792
3793static int qeth_core_driver_group(const char *buf, struct device *root_dev,
3794 unsigned long driver_id)
3795{
022b660a
UB		 3796 return ccwgroup_create_from_string(root_dev, driver_id,
3797 &qeth_ccw_driver, 3, buf);
4a71df50
FB		 3798}
3799
3800int qeth_core_hardsetup_card(struct qeth_card *card)
3801{
bbd50e17 3802 struct qdio_ssqd_desc *ssqd;
4a71df50 3803 int retries = 3;
779e6e1c 3804 int mpno = 0;
4a71df50
FB		 3805 int rc;
3806
d11ba0c4 3807 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4a71df50
FB		 3808 atomic_set(&card->force_alloc_skb, 0);
3809retry:
3810 if (retries < 3) {
74eacdb9
FB		 3811 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
3812 dev_name(&card->gdev->dev));
4a71df50
FB		 3813 ccw_device_set_offline(CARD_DDEV(card));
3814 ccw_device_set_offline(CARD_WDEV(card));
3815 ccw_device_set_offline(CARD_RDEV(card));
3816 ccw_device_set_online(CARD_RDEV(card));
3817 ccw_device_set_online(CARD_WDEV(card));
3818 ccw_device_set_online(CARD_DDEV(card));
3819 }
3820 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
3821 if (rc == -ERESTARTSYS) {
d11ba0c4 3822 QETH_DBF_TEXT(SETUP, 2, "break1");
4a71df50
FB		 3823 return rc;
3824 } else if (rc) {
d11ba0c4 3825 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 3826 if (--retries < 0)
3827 goto out;
3828 else
3829 goto retry;
3830 }
3831
3832 rc = qeth_get_unitaddr(card);
3833 if (rc) {
d11ba0c4 3834 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 3835 return rc;
3836 }
779e6e1c 3837
bbd50e17
JG		 3838 ssqd = kmalloc(sizeof(struct qdio_ssqd_desc), GFP_KERNEL);
3839 if (!ssqd) {
3840 rc = -ENOMEM;
3841 goto out;
3842 }
3843 rc = qdio_get_ssqd_desc(CARD_DDEV(card), ssqd);
3844 if (rc == 0)
3845 mpno = ssqd->pcnt;
3846 kfree(ssqd);
3847
a74b08c7
UB		 3848 if (mpno)
3849 mpno = min(mpno - 1, QETH_MAX_PORTNO);
4a71df50 3850 if (card->info.portno > mpno) {
14cc21b6
FB		 3851 QETH_DBF_MESSAGE(2, "Device %s does not offer port number %d"
3852 "\n.", CARD_BUS_ID(card), card->info.portno);
4a71df50
FB		 3853 rc = -ENODEV;
3854 goto out;
3855 }
3856 qeth_init_tokens(card);
3857 qeth_init_func_level(card);
3858 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
3859 if (rc == -ERESTARTSYS) {
d11ba0c4 3860 QETH_DBF_TEXT(SETUP, 2, "break2");
4a71df50
FB		 3861 return rc;
3862 } else if (rc) {
d11ba0c4 3863 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 3864 if (--retries < 0)
3865 goto out;
3866 else
3867 goto retry;
3868 }
3869 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
3870 if (rc == -ERESTARTSYS) {
d11ba0c4 3871 QETH_DBF_TEXT(SETUP, 2, "break3");
4a71df50
FB		 3872 return rc;
3873 } else if (rc) {
d11ba0c4 3874 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 3875 if (--retries < 0)
3876 goto out;
3877 else
3878 goto retry;
3879 }
3880 rc = qeth_mpc_initialize(card);
3881 if (rc) {
d11ba0c4 3882 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 3883 goto out;
3884 }
3885 return 0;
3886out:
74eacdb9
FB		 3887 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
3888 "an error on the device\n");
3889 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
3890 dev_name(&card->gdev->dev), rc);
4a71df50
FB		 3891 return rc;
3892}
3893EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
3894
3895static inline int qeth_create_skb_frag(struct qdio_buffer_element *element,
3896 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
3897{
3898 struct page *page = virt_to_page(element->addr);
3899 if (*pskb == NULL) {
3900 /* the upper protocol layers assume that there is data in the
3901 * skb itself. Copy a small amount (64 bytes) to make them
3902 * happy. */
3903 *pskb = dev_alloc_skb(64 + ETH_HLEN);
3904 if (!(*pskb))
3905 return -ENOMEM;
3906 skb_reserve(*pskb, ETH_HLEN);
3907 if (data_len <= 64) {
3908 memcpy(skb_put(*pskb, data_len), element->addr + offset,
3909 data_len);
3910 } else {
3911 get_page(page);
3912 memcpy(skb_put(*pskb, 64), element->addr + offset, 64);
3913 skb_fill_page_desc(*pskb, *pfrag, page, offset + 64,
3914 data_len - 64);
3915 (*pskb)->data_len += data_len - 64;
3916 (*pskb)->len += data_len - 64;
3917 (*pskb)->truesize += data_len - 64;
3918 (*pfrag)++;
3919 }
3920 } else {
3921 get_page(page);
3922 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
3923 (*pskb)->data_len += data_len;
3924 (*pskb)->len += data_len;
3925 (*pskb)->truesize += data_len;
3926 (*pfrag)++;
3927 }
3928 return 0;
3929}
3930
3931struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
3932 struct qdio_buffer *buffer,
3933 struct qdio_buffer_element **__element, int *__offset,
3934 struct qeth_hdr **hdr)
3935{
3936 struct qdio_buffer_element *element = *__element;
3937 int offset = *__offset;
3938 struct sk_buff *skb = NULL;
3939 int skb_len;
3940 void *data_ptr;
3941 int data_len;
3942 int headroom = 0;
3943 int use_rx_sg = 0;
3944 int frag = 0;
3945
4a71df50
FB		 3946 /* qeth_hdr must not cross element boundaries */
3947 if (element->length < offset + sizeof(struct qeth_hdr)) {
3948 if (qeth_is_last_sbale(element))
3949 return NULL;
3950 element++;
3951 offset = 0;
3952 if (element->length < sizeof(struct qeth_hdr))
3953 return NULL;
3954 }
3955 *hdr = element->addr + offset;
3956
3957 offset += sizeof(struct qeth_hdr);
3958 if (card->options.layer2) {
3959 if (card->info.type == QETH_CARD_TYPE_OSN) {
3960 skb_len = (*hdr)->hdr.osn.pdu_length;
3961 headroom = sizeof(struct qeth_hdr);
3962 } else {
3963 skb_len = (*hdr)->hdr.l2.pkt_length;
3964 }
3965 } else {
3966 skb_len = (*hdr)->hdr.l3.length;
b403e685
FB		 3967 if ((card->info.link_type == QETH_LINK_TYPE_LANE_TR) ||
3968 (card->info.link_type == QETH_LINK_TYPE_HSTR))
3969 headroom = TR_HLEN;
3970 else
3971 headroom = ETH_HLEN;
4a71df50
FB		 3972 }
3973
3974 if (!skb_len)
3975 return NULL;
3976
3977 if ((skb_len >= card->options.rx_sg_cb) &&
3978 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
3979 (!atomic_read(&card->force_alloc_skb))) {
3980 use_rx_sg = 1;
3981 } else {
3982 skb = dev_alloc_skb(skb_len + headroom);
3983 if (!skb)
3984 goto no_mem;
3985 if (headroom)
3986 skb_reserve(skb, headroom);
3987 }
3988
3989 data_ptr = element->addr + offset;
3990 while (skb_len) {
3991 data_len = min(skb_len, (int)(element->length - offset));
3992 if (data_len) {
3993 if (use_rx_sg) {
3994 if (qeth_create_skb_frag(element, &skb, offset,
3995 &frag, data_len))
3996 goto no_mem;
3997 } else {
3998 memcpy(skb_put(skb, data_len), data_ptr,
3999 data_len);
4000 }
4001 }
4002 skb_len -= data_len;
4003 if (skb_len) {
4004 if (qeth_is_last_sbale(element)) {
d11ba0c4
PT		 4005 QETH_DBF_TEXT(TRACE, 4, "unexeob");
4006 QETH_DBF_TEXT_(TRACE, 4, "%s",
4a71df50 4007 CARD_BUS_ID(card));
d11ba0c4
PT		 4008 QETH_DBF_TEXT(QERR, 2, "unexeob");
4009 QETH_DBF_TEXT_(QERR, 2, "%s",
4a71df50 4010 CARD_BUS_ID(card));
d11ba0c4 4011 QETH_DBF_HEX(MISC, 4, buffer, sizeof(*buffer));
4a71df50
FB		 4012 dev_kfree_skb_any(skb);
4013 card->stats.rx_errors++;
4014 return NULL;
4015 }
4016 element++;
4017 offset = 0;
4018 data_ptr = element->addr;
4019 } else {
4020 offset += data_len;
4021 }
4022 }
4023 *__element = element;
4024 *__offset = offset;
4025 if (use_rx_sg && card->options.performance_stats) {
4026 card->perf_stats.sg_skbs_rx++;
4027 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
4028 }
4029 return skb;
4030no_mem:
4031 if (net_ratelimit()) {
d11ba0c4
PT		 4032 QETH_DBF_TEXT(TRACE, 2, "noskbmem");
4033 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
4a71df50
FB		 4034 }
4035 card->stats.rx_dropped++;
4036 return NULL;
4037}
4038EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
4039
4040static void qeth_unregister_dbf_views(void)
4041{
d11ba0c4
PT		 4042 int x;
4043 for (x = 0; x < QETH_DBF_INFOS; x++) {
4044 debug_unregister(qeth_dbf[x].id);
4045 qeth_dbf[x].id = NULL;
4046 }
4a71df50
FB		 4047}
4048
345aa66e 4049void qeth_dbf_longtext(enum qeth_dbf_names dbf_nix, int level, char *fmt, ...)
cd023216
PT		 4050{
4051 char dbf_txt_buf[32];
345aa66e 4052 va_list args;
cd023216
PT		 4053
4054 if (level > (qeth_dbf[dbf_nix].id)->level)
4055 return;
345aa66e
PT		 4056 va_start(args, fmt);
4057 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
4058 va_end(args);
cd023216 4059 debug_text_event(qeth_dbf[dbf_nix].id, level, dbf_txt_buf);
cd023216
PT		 4060}
4061EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
4062
4a71df50
FB		 4063static int qeth_register_dbf_views(void)
4064{
d11ba0c4
PT		 4065 int ret;
4066 int x;
4067
4068 for (x = 0; x < QETH_DBF_INFOS; x++) {
4069 /* register the areas */
4070 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
4071 qeth_dbf[x].pages,
4072 qeth_dbf[x].areas,
4073 qeth_dbf[x].len);
4074 if (qeth_dbf[x].id == NULL) {
4075 qeth_unregister_dbf_views();
4076 return -ENOMEM;
4077 }
4a71df50 4078
d11ba0c4
PT		 4079 /* register a view */
4080 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
4081 if (ret) {
4082 qeth_unregister_dbf_views();
4083 return ret;
4084 }
4a71df50 4085
d11ba0c4
PT		 4086 /* set a passing level */
4087 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
4088 }
4a71df50
FB		 4089
4090 return 0;
4091}
4092
4093int qeth_core_load_discipline(struct qeth_card *card,
4094 enum qeth_discipline_id discipline)
4095{
4096 int rc = 0;
4097 switch (discipline) {
4098 case QETH_DISCIPLINE_LAYER3:
4099 card->discipline.ccwgdriver = try_then_request_module(
4100 symbol_get(qeth_l3_ccwgroup_driver),
4101 "qeth_l3");
4102 break;
4103 case QETH_DISCIPLINE_LAYER2:
4104 card->discipline.ccwgdriver = try_then_request_module(
4105 symbol_get(qeth_l2_ccwgroup_driver),
4106 "qeth_l2");
4107 break;
4108 }
4109 if (!card->discipline.ccwgdriver) {
74eacdb9
FB		 4110 dev_err(&card->gdev->dev, "There is no kernel module to "
4111 "support discipline %d\n", discipline);
4a71df50
FB		 4112 rc = -EINVAL;
4113 }
4114 return rc;
4115}
4116
4117void qeth_core_free_discipline(struct qeth_card *card)
4118{
4119 if (card->options.layer2)
4120 symbol_put(qeth_l2_ccwgroup_driver);
4121 else
4122 symbol_put(qeth_l3_ccwgroup_driver);
4123 card->discipline.ccwgdriver = NULL;
4124}
4125
4126static int qeth_core_probe_device(struct ccwgroup_device *gdev)
4127{
4128 struct qeth_card *card;
4129 struct device *dev;
4130 int rc;
4131 unsigned long flags;
4132
d11ba0c4 4133 QETH_DBF_TEXT(SETUP, 2, "probedev");
4a71df50
FB		 4134
4135 dev = &gdev->dev;
4136 if (!get_device(dev))
4137 return -ENODEV;
4138
2a0217d5 4139 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4a71df50
FB		 4140
4141 card = qeth_alloc_card();
4142 if (!card) {
d11ba0c4 4143 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4a71df50
FB		 4144 rc = -ENOMEM;
4145 goto err_dev;
4146 }
4147 card->read.ccwdev = gdev->cdev[0];
4148 card->write.ccwdev = gdev->cdev[1];
4149 card->data.ccwdev = gdev->cdev[2];
4150 dev_set_drvdata(&gdev->dev, card);
4151 card->gdev = gdev;
4152 gdev->cdev[0]->handler = qeth_irq;
4153 gdev->cdev[1]->handler = qeth_irq;
4154 gdev->cdev[2]->handler = qeth_irq;
4155
4156 rc = qeth_determine_card_type(card);
4157 if (rc) {
d11ba0c4 4158 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 4159 goto err_card;
4160 }
4161 rc = qeth_setup_card(card);
4162 if (rc) {
d11ba0c4 4163 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 4164 goto err_card;
4165 }
4166
4167 if (card->info.type == QETH_CARD_TYPE_OSN) {
4168 rc = qeth_core_create_osn_attributes(dev);
4169 if (rc)
4170 goto err_card;
4171 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
4172 if (rc) {
4173 qeth_core_remove_osn_attributes(dev);
4174 goto err_card;
4175 }
4176 rc = card->discipline.ccwgdriver->probe(card->gdev);
4177 if (rc) {
4178 qeth_core_free_discipline(card);
4179 qeth_core_remove_osn_attributes(dev);
4180 goto err_card;
4181 }
4182 } else {
4183 rc = qeth_core_create_device_attributes(dev);
4184 if (rc)
4185 goto err_card;
4186 }
4187
4188 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4189 list_add_tail(&card->list, &qeth_core_card_list.list);
4190 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4191 return 0;
4192
4193err_card:
4194 qeth_core_free_card(card);
4195err_dev:
4196 put_device(dev);
4197 return rc;
4198}
4199
4200static void qeth_core_remove_device(struct ccwgroup_device *gdev)
4201{
4202 unsigned long flags;
4203 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4204
28a7e4c9 4205 QETH_DBF_TEXT(SETUP, 2, "removedv");
4a71df50
FB		 4206 if (card->discipline.ccwgdriver) {
4207 card->discipline.ccwgdriver->remove(gdev);
4208 qeth_core_free_discipline(card);
4209 }
4210
4211 if (card->info.type == QETH_CARD_TYPE_OSN) {
4212 qeth_core_remove_osn_attributes(&gdev->dev);
4213 } else {
4214 qeth_core_remove_device_attributes(&gdev->dev);
4215 }
4216 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4217 list_del(&card->list);
4218 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4219 qeth_core_free_card(card);
4220 dev_set_drvdata(&gdev->dev, NULL);
4221 put_device(&gdev->dev);
4222 return;
4223}
4224
4225static int qeth_core_set_online(struct ccwgroup_device *gdev)
4226{
4227 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4228 int rc = 0;
4229 int def_discipline;
4230
4231 if (!card->discipline.ccwgdriver) {
4232 if (card->info.type == QETH_CARD_TYPE_IQD)
4233 def_discipline = QETH_DISCIPLINE_LAYER3;
4234 else
4235 def_discipline = QETH_DISCIPLINE_LAYER2;
4236 rc = qeth_core_load_discipline(card, def_discipline);
4237 if (rc)
4238 goto err;
4239 rc = card->discipline.ccwgdriver->probe(card->gdev);
4240 if (rc)
4241 goto err;
4242 }
4243 rc = card->discipline.ccwgdriver->set_online(gdev);
4244err:
4245 return rc;
4246}
4247
4248static int qeth_core_set_offline(struct ccwgroup_device *gdev)
4249{
4250 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4251 return card->discipline.ccwgdriver->set_offline(gdev);
4252}
4253
4254static void qeth_core_shutdown(struct ccwgroup_device *gdev)
4255{
4256 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4257 if (card->discipline.ccwgdriver &&
4258 card->discipline.ccwgdriver->shutdown)
4259 card->discipline.ccwgdriver->shutdown(gdev);
4260}
4261
4262static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
4263 .owner = THIS_MODULE,
4264 .name = "qeth",
4265 .driver_id = 0xD8C5E3C8,
4266 .probe = qeth_core_probe_device,
4267 .remove = qeth_core_remove_device,
4268 .set_online = qeth_core_set_online,
4269 .set_offline = qeth_core_set_offline,
4270 .shutdown = qeth_core_shutdown,
4271};
4272
4273static ssize_t
4274qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf,
4275 size_t count)
4276{
4277 int err;
4278 err = qeth_core_driver_group(buf, qeth_core_root_dev,
4279 qeth_core_ccwgroup_driver.driver_id);
4280 if (err)
4281 return err;
4282 else
4283 return count;
4284}
4285
4286static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
4287
4288static struct {
4289 const char str[ETH_GSTRING_LEN];
4290} qeth_ethtool_stats_keys[] = {
4291/* 0 */{"rx skbs"},
4292 {"rx buffers"},
4293 {"tx skbs"},
4294 {"tx buffers"},
4295 {"tx skbs no packing"},
4296 {"tx buffers no packing"},
4297 {"tx skbs packing"},
4298 {"tx buffers packing"},
4299 {"tx sg skbs"},
4300 {"tx sg frags"},
4301/* 10 */{"rx sg skbs"},
4302 {"rx sg frags"},
4303 {"rx sg page allocs"},
4304 {"tx large kbytes"},
4305 {"tx large count"},
4306 {"tx pk state ch n->p"},
4307 {"tx pk state ch p->n"},
4308 {"tx pk watermark low"},
4309 {"tx pk watermark high"},
4310 {"queue 0 buffer usage"},
4311/* 20 */{"queue 1 buffer usage"},
4312 {"queue 2 buffer usage"},
4313 {"queue 3 buffer usage"},
4314 {"rx handler time"},
4315 {"rx handler count"},
4316 {"rx do_QDIO time"},
4317 {"rx do_QDIO count"},
4318 {"tx handler time"},
4319 {"tx handler count"},
4320 {"tx time"},
4321/* 30 */{"tx count"},
4322 {"tx do_QDIO time"},
4323 {"tx do_QDIO count"},
4324};
4325
4326int qeth_core_get_stats_count(struct net_device *dev)
4327{
4328 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
4329}
4330EXPORT_SYMBOL_GPL(qeth_core_get_stats_count);
4331
4332void qeth_core_get_ethtool_stats(struct net_device *dev,
4333 struct ethtool_stats *stats, u64 *data)
4334{
509e2562 4335 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 4336 data[0] = card->stats.rx_packets -
4337 card->perf_stats.initial_rx_packets;
4338 data[1] = card->perf_stats.bufs_rec;
4339 data[2] = card->stats.tx_packets -
4340 card->perf_stats.initial_tx_packets;
4341 data[3] = card->perf_stats.bufs_sent;
4342 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
4343 - card->perf_stats.skbs_sent_pack;
4344 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
4345 data[6] = card->perf_stats.skbs_sent_pack;
4346 data[7] = card->perf_stats.bufs_sent_pack;
4347 data[8] = card->perf_stats.sg_skbs_sent;
4348 data[9] = card->perf_stats.sg_frags_sent;
4349 data[10] = card->perf_stats.sg_skbs_rx;
4350 data[11] = card->perf_stats.sg_frags_rx;
4351 data[12] = card->perf_stats.sg_alloc_page_rx;
4352 data[13] = (card->perf_stats.large_send_bytes >> 10);
4353 data[14] = card->perf_stats.large_send_cnt;
4354 data[15] = card->perf_stats.sc_dp_p;
4355 data[16] = card->perf_stats.sc_p_dp;
4356 data[17] = QETH_LOW_WATERMARK_PACK;
4357 data[18] = QETH_HIGH_WATERMARK_PACK;
4358 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
4359 data[20] = (card->qdio.no_out_queues > 1) ?
4360 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
4361 data[21] = (card->qdio.no_out_queues > 2) ?
4362 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
4363 data[22] = (card->qdio.no_out_queues > 3) ?
4364 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
4365 data[23] = card->perf_stats.inbound_time;
4366 data[24] = card->perf_stats.inbound_cnt;
4367 data[25] = card->perf_stats.inbound_do_qdio_time;
4368 data[26] = card->perf_stats.inbound_do_qdio_cnt;
4369 data[27] = card->perf_stats.outbound_handler_time;
4370 data[28] = card->perf_stats.outbound_handler_cnt;
4371 data[29] = card->perf_stats.outbound_time;
4372 data[30] = card->perf_stats.outbound_cnt;
4373 data[31] = card->perf_stats.outbound_do_qdio_time;
4374 data[32] = card->perf_stats.outbound_do_qdio_cnt;
4375}
4376EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
4377
4378void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
4379{
4380 switch (stringset) {
4381 case ETH_SS_STATS:
4382 memcpy(data, &qeth_ethtool_stats_keys,
4383 sizeof(qeth_ethtool_stats_keys));
4384 break;
4385 default:
4386 WARN_ON(1);
4387 break;
4388 }
4389}
4390EXPORT_SYMBOL_GPL(qeth_core_get_strings);
4391
4392void qeth_core_get_drvinfo(struct net_device *dev,
4393 struct ethtool_drvinfo *info)
4394{
509e2562 4395 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 4396 if (card->options.layer2)
4397 strcpy(info->driver, "qeth_l2");
4398 else
4399 strcpy(info->driver, "qeth_l3");
4400
4401 strcpy(info->version, "1.0");
4402 strcpy(info->fw_version, card->info.mcl_level);
4403 sprintf(info->bus_info, "%s/%s/%s",
4404 CARD_RDEV_ID(card),
4405 CARD_WDEV_ID(card),
4406 CARD_DDEV_ID(card));
4407}
4408EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
4409
3f9975aa
FB		 4410int qeth_core_ethtool_get_settings(struct net_device *netdev,
4411 struct ethtool_cmd *ecmd)
4412{
509e2562 4413 struct qeth_card *card = netdev->ml_priv;
3f9975aa
FB		 4414 enum qeth_link_types link_type;
4415
4416 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
4417 link_type = QETH_LINK_TYPE_10GBIT_ETH;
4418 else
4419 link_type = card->info.link_type;
4420
4421 ecmd->transceiver = XCVR_INTERNAL;
4422 ecmd->supported = SUPPORTED_Autoneg;
4423 ecmd->advertising = ADVERTISED_Autoneg;
4424 ecmd->duplex = DUPLEX_FULL;
4425 ecmd->autoneg = AUTONEG_ENABLE;
4426
4427 switch (link_type) {
4428 case QETH_LINK_TYPE_FAST_ETH:
4429 case QETH_LINK_TYPE_LANE_ETH100:
4430 ecmd->supported |= SUPPORTED_10baseT_Half |
4431 SUPPORTED_10baseT_Full |
4432 SUPPORTED_100baseT_Half |
4433 SUPPORTED_100baseT_Full |
4434 SUPPORTED_TP;
4435 ecmd->advertising |= ADVERTISED_10baseT_Half |
4436 ADVERTISED_10baseT_Full |
4437 ADVERTISED_100baseT_Half |
4438 ADVERTISED_100baseT_Full |
4439 ADVERTISED_TP;
4440 ecmd->speed = SPEED_100;
4441 ecmd->port = PORT_TP;
4442 break;
4443
4444 case QETH_LINK_TYPE_GBIT_ETH:
4445 case QETH_LINK_TYPE_LANE_ETH1000:
4446 ecmd->supported |= SUPPORTED_10baseT_Half |
4447 SUPPORTED_10baseT_Full |
4448 SUPPORTED_100baseT_Half |
4449 SUPPORTED_100baseT_Full |
4450 SUPPORTED_1000baseT_Half |
4451 SUPPORTED_1000baseT_Full |
4452 SUPPORTED_FIBRE;
4453 ecmd->advertising |= ADVERTISED_10baseT_Half |
4454 ADVERTISED_10baseT_Full |
4455 ADVERTISED_100baseT_Half |
4456 ADVERTISED_100baseT_Full |
4457 ADVERTISED_1000baseT_Half |
4458 ADVERTISED_1000baseT_Full |
4459 ADVERTISED_FIBRE;
4460 ecmd->speed = SPEED_1000;
4461 ecmd->port = PORT_FIBRE;
4462 break;
4463
4464 case QETH_LINK_TYPE_10GBIT_ETH:
4465 ecmd->supported |= SUPPORTED_10baseT_Half |
4466 SUPPORTED_10baseT_Full |
4467 SUPPORTED_100baseT_Half |
4468 SUPPORTED_100baseT_Full |
4469 SUPPORTED_1000baseT_Half |
4470 SUPPORTED_1000baseT_Full |
4471 SUPPORTED_10000baseT_Full |
4472 SUPPORTED_FIBRE;
4473 ecmd->advertising |= ADVERTISED_10baseT_Half |
4474 ADVERTISED_10baseT_Full |
4475 ADVERTISED_100baseT_Half |
4476 ADVERTISED_100baseT_Full |
4477 ADVERTISED_1000baseT_Half |
4478 ADVERTISED_1000baseT_Full |
4479 ADVERTISED_10000baseT_Full |
4480 ADVERTISED_FIBRE;
4481 ecmd->speed = SPEED_10000;
4482 ecmd->port = PORT_FIBRE;
4483 break;
4484
4485 default:
4486 ecmd->supported |= SUPPORTED_10baseT_Half |
4487 SUPPORTED_10baseT_Full |
4488 SUPPORTED_TP;
4489 ecmd->advertising |= ADVERTISED_10baseT_Half |
4490 ADVERTISED_10baseT_Full |
4491 ADVERTISED_TP;
4492 ecmd->speed = SPEED_10;
4493 ecmd->port = PORT_TP;
4494 }
4495
4496 return 0;
4497}
4498EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
4499
4a71df50
FB		 4500static int __init qeth_core_init(void)
4501{
4502 int rc;
4503
74eacdb9 4504 pr_info("loading core functions\n");
4a71df50
FB		 4505 INIT_LIST_HEAD(&qeth_core_card_list.list);
4506 rwlock_init(&qeth_core_card_list.rwlock);
4507
4508 rc = qeth_register_dbf_views();
4509 if (rc)
4510 goto out_err;
4511 rc = ccw_driver_register(&qeth_ccw_driver);
4512 if (rc)
4513 goto ccw_err;
4514 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
4515 if (rc)
4516 goto ccwgroup_err;
4517 rc = driver_create_file(&qeth_core_ccwgroup_driver.driver,
4518 &driver_attr_group);
4519 if (rc)
4520 goto driver_err;
4521 qeth_core_root_dev = s390_root_dev_register("qeth");
4522 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
4523 if (rc)
4524 goto register_err;
4a71df50 4525
683d718a
FB		 4526 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
4527 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
4528 if (!qeth_core_header_cache) {
4529 rc = -ENOMEM;
4530 goto slab_err;
4531 }
4532
4533 return 0;
4534slab_err:
4535 s390_root_dev_unregister(qeth_core_root_dev);
4a71df50
FB		 4536register_err:
4537 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4538 &driver_attr_group);
4539driver_err:
4540 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4541ccwgroup_err:
4542 ccw_driver_unregister(&qeth_ccw_driver);
4543ccw_err:
74eacdb9 4544 QETH_DBF_MESSAGE(2, "Initialization failed with code %d\n", rc);
4a71df50
FB		 4545 qeth_unregister_dbf_views();
4546out_err:
74eacdb9 4547 pr_err("Initializing the qeth device driver failed\n");
4a71df50
FB		 4548 return rc;
4549}
4550
4551static void __exit qeth_core_exit(void)
4552{
4553 s390_root_dev_unregister(qeth_core_root_dev);
4554 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4555 &driver_attr_group);
4556 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4557 ccw_driver_unregister(&qeth_ccw_driver);
683d718a 4558 kmem_cache_destroy(qeth_core_header_cache);
4a71df50 4559 qeth_unregister_dbf_views();
74eacdb9 4560 pr_info("core functions removed\n");
4a71df50
FB		 4561}
4562
4563module_init(qeth_core_init);
4564module_exit(qeth_core_exit);
4565MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
4566MODULE_DESCRIPTION("qeth core functions");
4567MODULE_LICENSE("GPL");
Clone of davem's net-next-2.6 tree