]> bbs.cooldavid.org Git - net-next-2.6.git/blame - drivers/s390/net/qeth_core.h
smsgiucv: guarantee single iucv connect in thaw
[net-next-2.6.git] / drivers / s390 / net / qeth_core.h
CommitLineData
4a71df50
FB
1/*
2 * drivers/s390/net/qeth_core.h
3 *
4 * Copyright IBM Corp. 2007
5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
6 * Frank Pavlic <fpavlic@de.ibm.com>,
7 * Thomas Spatzier <tspat@de.ibm.com>,
8 * Frank Blaschka <frank.blaschka@de.ibm.com>
9 */
10
11#ifndef __QETH_CORE_H__
12#define __QETH_CORE_H__
13
14#include <linux/if.h>
15#include <linux/if_arp.h>
16#include <linux/if_tr.h>
17#include <linux/trdevice.h>
18#include <linux/etherdevice.h>
19#include <linux/if_vlan.h>
20#include <linux/ctype.h>
21#include <linux/in6.h>
22#include <linux/bitops.h>
23#include <linux/seq_file.h>
24#include <linux/ethtool.h>
25
26#include <net/ipv6.h>
27#include <net/if_inet6.h>
28#include <net/addrconf.h>
29
30#include <asm/debug.h>
31#include <asm/qdio.h>
32#include <asm/ccwdev.h>
33#include <asm/ccwgroup.h>
6bcac508 34#include <asm/sysinfo.h>
4a71df50
FB
35
36#include "qeth_core_mpc.h"
37
38/**
39 * Debug Facility stuff
40 */
d11ba0c4
PT
41enum qeth_dbf_names {
42 QETH_DBF_SETUP,
43 QETH_DBF_QERR,
44 QETH_DBF_TRACE,
45 QETH_DBF_MSG,
46 QETH_DBF_SENSE,
47 QETH_DBF_MISC,
48 QETH_DBF_CTRL,
49 QETH_DBF_INFOS /* must be last element */
50};
51
52struct qeth_dbf_info {
53 char name[DEBUG_MAX_NAME_LEN];
54 int pages;
55 int areas;
56 int len;
57 int level;
58 struct debug_view *view;
59 debug_info_t *id;
60};
61
62#define QETH_DBF_CTRL_LEN 256
4a71df50
FB
63
64#define QETH_DBF_TEXT(name, level, text) \
d11ba0c4 65 debug_text_event(qeth_dbf[QETH_DBF_##name].id, level, text)
4a71df50
FB
66
67#define QETH_DBF_HEX(name, level, addr, len) \
d11ba0c4
PT
68 debug_event(qeth_dbf[QETH_DBF_##name].id, level, (void *)(addr), len)
69
70#define QETH_DBF_MESSAGE(level, text...) \
71 debug_sprintf_event(qeth_dbf[QETH_DBF_MSG].id, level, text)
72
73#define QETH_DBF_TEXT_(name, level, text...) \
cd023216 74 qeth_dbf_longtext(QETH_DBF_##name, level, text)
4a71df50 75
4a71df50
FB
76#define SENSE_COMMAND_REJECT_BYTE 0
77#define SENSE_COMMAND_REJECT_FLAG 0x80
78#define SENSE_RESETTING_EVENT_BYTE 1
79#define SENSE_RESETTING_EVENT_FLAG 0x80
80
81/*
82 * Common IO related definitions
83 */
84#define CARD_RDEV(card) card->read.ccwdev
85#define CARD_WDEV(card) card->write.ccwdev
86#define CARD_DDEV(card) card->data.ccwdev
2a0217d5
KS
87#define CARD_BUS_ID(card) dev_name(&card->gdev->dev)
88#define CARD_RDEV_ID(card) dev_name(&card->read.ccwdev->dev)
89#define CARD_WDEV_ID(card) dev_name(&card->write.ccwdev->dev)
90#define CARD_DDEV_ID(card) dev_name(&card->data.ccwdev->dev)
91#define CHANNEL_ID(channel) dev_name(&channel->ccwdev->dev)
4a71df50
FB
92
93/**
94 * card stuff
95 */
96struct qeth_perf_stats {
97 unsigned int bufs_rec;
98 unsigned int bufs_sent;
99
100 unsigned int skbs_sent_pack;
101 unsigned int bufs_sent_pack;
102
103 unsigned int sc_dp_p;
104 unsigned int sc_p_dp;
105 /* qdio_input_handler: number of times called, time spent in */
106 __u64 inbound_start_time;
107 unsigned int inbound_cnt;
108 unsigned int inbound_time;
109 /* qeth_send_packet: number of times called, time spent in */
110 __u64 outbound_start_time;
111 unsigned int outbound_cnt;
112 unsigned int outbound_time;
113 /* qdio_output_handler: number of times called, time spent in */
114 __u64 outbound_handler_start_time;
115 unsigned int outbound_handler_cnt;
116 unsigned int outbound_handler_time;
117 /* number of calls to and time spent in do_QDIO for inbound queue */
118 __u64 inbound_do_qdio_start_time;
119 unsigned int inbound_do_qdio_cnt;
120 unsigned int inbound_do_qdio_time;
121 /* number of calls to and time spent in do_QDIO for outbound queues */
122 __u64 outbound_do_qdio_start_time;
123 unsigned int outbound_do_qdio_cnt;
124 unsigned int outbound_do_qdio_time;
4a71df50
FB
125 unsigned int large_send_bytes;
126 unsigned int large_send_cnt;
127 unsigned int sg_skbs_sent;
128 unsigned int sg_frags_sent;
129 /* initial values when measuring starts */
130 unsigned long initial_rx_packets;
131 unsigned long initial_tx_packets;
132 /* inbound scatter gather data */
133 unsigned int sg_skbs_rx;
134 unsigned int sg_frags_rx;
135 unsigned int sg_alloc_page_rx;
f61a0d05 136 unsigned int tx_csum;
c3b4a740 137 unsigned int tx_lin;
4a71df50
FB
138};
139
140/* Routing stuff */
141struct qeth_routing_info {
142 enum qeth_routing_types type;
143};
144
145/* IPA stuff */
146struct qeth_ipa_info {
147 __u32 supported_funcs;
148 __u32 enabled_funcs;
149};
150
151static inline int qeth_is_ipa_supported(struct qeth_ipa_info *ipa,
152 enum qeth_ipa_funcs func)
153{
154 return (ipa->supported_funcs & func);
155}
156
157static inline int qeth_is_ipa_enabled(struct qeth_ipa_info *ipa,
158 enum qeth_ipa_funcs func)
159{
160 return (ipa->supported_funcs & ipa->enabled_funcs & func);
161}
162
163#define qeth_adp_supported(c, f) \
164 qeth_is_ipa_supported(&c->options.adp, f)
165#define qeth_adp_enabled(c, f) \
166 qeth_is_ipa_enabled(&c->options.adp, f)
167#define qeth_is_supported(c, f) \
168 qeth_is_ipa_supported(&c->options.ipa4, f)
169#define qeth_is_enabled(c, f) \
170 qeth_is_ipa_enabled(&c->options.ipa4, f)
171#define qeth_is_supported6(c, f) \
172 qeth_is_ipa_supported(&c->options.ipa6, f)
173#define qeth_is_enabled6(c, f) \
174 qeth_is_ipa_enabled(&c->options.ipa6, f)
175#define qeth_is_ipafunc_supported(c, prot, f) \
176 ((prot == QETH_PROT_IPV6) ? \
177 qeth_is_supported6(c, f) : qeth_is_supported(c, f))
178#define qeth_is_ipafunc_enabled(c, prot, f) \
179 ((prot == QETH_PROT_IPV6) ? \
180 qeth_is_enabled6(c, f) : qeth_is_enabled(c, f))
181
5113fec0 182#define QETH_IDX_FUNC_LEVEL_OSD 0x0101
4a71df50
FB
183#define QETH_IDX_FUNC_LEVEL_IQD_ENA_IPAT 0x4108
184#define QETH_IDX_FUNC_LEVEL_IQD_DIS_IPAT 0x5108
185
186#define QETH_MODELLIST_ARRAY \
5113fec0
UB
187 {{0x1731, 0x01, 0x1732, QETH_CARD_TYPE_OSD, QETH_MAX_QUEUES, 0}, \
188 {0x1731, 0x05, 0x1732, QETH_CARD_TYPE_IQD, QETH_MAX_QUEUES, 0x103}, \
189 {0x1731, 0x06, 0x1732, QETH_CARD_TYPE_OSN, QETH_MAX_QUEUES, 0}, \
190 {0x1731, 0x02, 0x1732, QETH_CARD_TYPE_OSM, QETH_MAX_QUEUES, 0}, \
191 {0x1731, 0x02, 0x1732, QETH_CARD_TYPE_OSX, QETH_MAX_QUEUES, 0}, \
192 {0, 0, 0, 0, 0, 0} }
193#define QETH_CU_TYPE_IND 0
194#define QETH_CU_MODEL_IND 1
195#define QETH_DEV_TYPE_IND 2
196#define QETH_DEV_MODEL_IND 3
197#define QETH_QUEUE_NO_IND 4
198#define QETH_MULTICAST_IND 5
4a71df50
FB
199
200#define QETH_REAL_CARD 1
201#define QETH_VLAN_CARD 2
202#define QETH_BUFSIZE 4096
203
204/**
205 * some more defs
206 */
207#define QETH_TX_TIMEOUT 100 * HZ
208#define QETH_RCD_TIMEOUT 60 * HZ
209#define QETH_HEADER_SIZE 32
210#define QETH_MAX_PORTNO 15
211
212/*IPv6 address autoconfiguration stuff*/
213#define UNIQUE_ID_IF_CREATE_ADDR_FAILED 0xfffe
214#define UNIQUE_ID_NOT_BY_CARD 0x10000
215
216/*****************************************************************************/
217/* QDIO queue and buffer handling */
218/*****************************************************************************/
219#define QETH_MAX_QUEUES 4
220#define QETH_IN_BUF_SIZE_DEFAULT 65536
221#define QETH_IN_BUF_COUNT_DEFAULT 16
222#define QETH_IN_BUF_COUNT_MIN 8
223#define QETH_IN_BUF_COUNT_MAX 128
224#define QETH_MAX_BUFFER_ELEMENTS(card) ((card)->qdio.in_buf_size >> 12)
225#define QETH_IN_BUF_REQUEUE_THRESHOLD(card) \
226 ((card)->qdio.in_buf_pool.buf_count / 2)
227
228/* buffers we have to be behind before we get a PCI */
229#define QETH_PCI_THRESHOLD_A(card) ((card)->qdio.in_buf_pool.buf_count+1)
230/*enqueued free buffers left before we get a PCI*/
231#define QETH_PCI_THRESHOLD_B(card) 0
232/*not used unless the microcode gets patched*/
233#define QETH_PCI_TIMER_VALUE(card) 3
234
4a71df50
FB
235/* priority queing */
236#define QETH_PRIOQ_DEFAULT QETH_NO_PRIO_QUEUEING
237#define QETH_DEFAULT_QUEUE 2
238#define QETH_NO_PRIO_QUEUEING 0
239#define QETH_PRIO_Q_ING_PREC 1
240#define QETH_PRIO_Q_ING_TOS 2
241#define IP_TOS_LOWDELAY 0x10
242#define IP_TOS_HIGHTHROUGHPUT 0x08
243#define IP_TOS_HIGHRELIABILITY 0x04
244#define IP_TOS_NOTIMPORTANT 0x02
245
246/* Packing */
247#define QETH_LOW_WATERMARK_PACK 2
248#define QETH_HIGH_WATERMARK_PACK 5
249#define QETH_WATERMARK_PACK_FUZZ 1
250
251#define QETH_IP_HEADER_SIZE 40
252
253/* large receive scatter gather copy break */
254#define QETH_RX_SG_CB (PAGE_SIZE >> 1)
255
256struct qeth_hdr_layer3 {
257 __u8 id;
258 __u8 flags;
259 __u16 inbound_checksum; /*TSO:__u16 seqno */
260 __u32 token; /*TSO: __u32 reserved */
261 __u16 length;
262 __u8 vlan_prio;
263 __u8 ext_flags;
264 __u16 vlan_id;
265 __u16 frame_offset;
266 __u8 dest_addr[16];
267} __attribute__ ((packed));
268
269struct qeth_hdr_layer2 {
270 __u8 id;
271 __u8 flags[3];
272 __u8 port_no;
273 __u8 hdr_length;
274 __u16 pkt_length;
275 __u16 seq_no;
276 __u16 vlan_id;
277 __u32 reserved;
278 __u8 reserved2[16];
279} __attribute__ ((packed));
280
281struct qeth_hdr_osn {
282 __u8 id;
283 __u8 reserved;
284 __u16 seq_no;
285 __u16 reserved2;
286 __u16 control_flags;
287 __u16 pdu_length;
288 __u8 reserved3[18];
289 __u32 ccid;
290} __attribute__ ((packed));
291
292struct qeth_hdr {
293 union {
294 struct qeth_hdr_layer2 l2;
295 struct qeth_hdr_layer3 l3;
296 struct qeth_hdr_osn osn;
297 } hdr;
298} __attribute__ ((packed));
299
300/*TCP Segmentation Offload header*/
301struct qeth_hdr_ext_tso {
302 __u16 hdr_tot_len;
303 __u8 imb_hdr_no;
304 __u8 reserved;
305 __u8 hdr_type;
306 __u8 hdr_version;
307 __u16 hdr_len;
308 __u32 payload_len;
309 __u16 mss;
310 __u16 dg_hdr_len;
311 __u8 padding[16];
312} __attribute__ ((packed));
313
314struct qeth_hdr_tso {
315 struct qeth_hdr hdr; /*hdr->hdr.l3.xxx*/
316 struct qeth_hdr_ext_tso ext;
317} __attribute__ ((packed));
318
319
320/* flags for qeth_hdr.flags */
321#define QETH_HDR_PASSTHRU 0x10
322#define QETH_HDR_IPV6 0x80
323#define QETH_HDR_CAST_MASK 0x07
324enum qeth_cast_flags {
325 QETH_CAST_UNICAST = 0x06,
326 QETH_CAST_MULTICAST = 0x04,
327 QETH_CAST_BROADCAST = 0x05,
328 QETH_CAST_ANYCAST = 0x07,
329 QETH_CAST_NOCAST = 0x00,
330};
331
332enum qeth_layer2_frame_flags {
333 QETH_LAYER2_FLAG_MULTICAST = 0x01,
334 QETH_LAYER2_FLAG_BROADCAST = 0x02,
335 QETH_LAYER2_FLAG_UNICAST = 0x04,
336 QETH_LAYER2_FLAG_VLAN = 0x10,
337};
338
339enum qeth_header_ids {
340 QETH_HEADER_TYPE_LAYER3 = 0x01,
341 QETH_HEADER_TYPE_LAYER2 = 0x02,
342 QETH_HEADER_TYPE_TSO = 0x03,
343 QETH_HEADER_TYPE_OSN = 0x04,
344};
345/* flags for qeth_hdr.ext_flags */
346#define QETH_HDR_EXT_VLAN_FRAME 0x01
347#define QETH_HDR_EXT_TOKEN_ID 0x02
348#define QETH_HDR_EXT_INCLUDE_VLAN_TAG 0x04
349#define QETH_HDR_EXT_SRC_MAC_ADDR 0x08
350#define QETH_HDR_EXT_CSUM_HDR_REQ 0x10
351#define QETH_HDR_EXT_CSUM_TRANSP_REQ 0x20
f6b85b6c 352#define QETH_HDR_EXT_UDP 0x40 /*bit off for TCP*/
4a71df50
FB
353
354static inline int qeth_is_last_sbale(struct qdio_buffer_element *sbale)
355{
356 return (sbale->flags & SBAL_FLAGS_LAST_ENTRY);
357}
358
359enum qeth_qdio_buffer_states {
360 /*
361 * inbound: read out by driver; owned by hardware in order to be filled
362 * outbound: owned by driver in order to be filled
363 */
364 QETH_QDIO_BUF_EMPTY,
365 /*
366 * inbound: filled by hardware; owned by driver in order to be read out
367 * outbound: filled by driver; owned by hardware in order to be sent
368 */
369 QETH_QDIO_BUF_PRIMED,
370};
371
372enum qeth_qdio_info_states {
373 QETH_QDIO_UNINITIALIZED,
374 QETH_QDIO_ALLOCATED,
375 QETH_QDIO_ESTABLISHED,
376 QETH_QDIO_CLEANING
377};
378
379struct qeth_buffer_pool_entry {
380 struct list_head list;
381 struct list_head init_list;
382 void *elements[QDIO_MAX_ELEMENTS_PER_BUFFER];
383};
384
385struct qeth_qdio_buffer_pool {
386 struct list_head entry_list;
387 int buf_count;
388};
389
390struct qeth_qdio_buffer {
391 struct qdio_buffer *buffer;
392 /* the buffer pool entry currently associated to this buffer */
393 struct qeth_buffer_pool_entry *pool_entry;
394};
395
396struct qeth_qdio_q {
397 struct qdio_buffer qdio_bufs[QDIO_MAX_BUFFERS_PER_Q];
398 struct qeth_qdio_buffer bufs[QDIO_MAX_BUFFERS_PER_Q];
399 int next_buf_to_init;
400} __attribute__ ((aligned(256)));
401
402/* possible types of qeth large_send support */
403enum qeth_large_send_types {
404 QETH_LARGE_SEND_NO,
4a71df50
FB
405 QETH_LARGE_SEND_TSO,
406};
407
408struct qeth_qdio_out_buffer {
409 struct qdio_buffer *buffer;
410 atomic_t state;
411 int next_element_to_fill;
412 struct sk_buff_head skb_list;
413 struct list_head ctx_list;
683d718a 414 int is_header[16];
4a71df50
FB
415};
416
417struct qeth_card;
418
419enum qeth_out_q_states {
420 QETH_OUT_Q_UNLOCKED,
421 QETH_OUT_Q_LOCKED,
422 QETH_OUT_Q_LOCKED_FLUSH,
423};
424
425struct qeth_qdio_out_q {
426 struct qdio_buffer qdio_bufs[QDIO_MAX_BUFFERS_PER_Q];
427 struct qeth_qdio_out_buffer bufs[QDIO_MAX_BUFFERS_PER_Q];
428 int queue_no;
429 struct qeth_card *card;
430 atomic_t state;
431 int do_pack;
432 /*
433 * index of buffer to be filled by driver; state EMPTY or PACKING
434 */
435 int next_buf_to_fill;
58490f18 436 int sync_iqdio_error;
4a71df50
FB
437 /*
438 * number of buffers that are currently filled (PRIMED)
439 * -> these buffers are hardware-owned
440 */
441 atomic_t used_buffers;
442 /* indicates whether PCI flag must be set (or if one is outstanding) */
443 atomic_t set_pci_flags_count;
444} __attribute__ ((aligned(256)));
445
446struct qeth_qdio_info {
447 atomic_t state;
448 /* input */
449 struct qeth_qdio_q *in_q;
450 struct qeth_qdio_buffer_pool in_buf_pool;
451 struct qeth_qdio_buffer_pool init_pool;
452 int in_buf_size;
453
454 /* output */
455 int no_out_queues;
456 struct qeth_qdio_out_q **out_qs;
457
458 /* priority queueing */
459 int do_prio_queueing;
460 int default_out_queue;
461};
462
463enum qeth_send_errors {
464 QETH_SEND_ERROR_NONE,
465 QETH_SEND_ERROR_LINK_FAILURE,
466 QETH_SEND_ERROR_RETRY,
467 QETH_SEND_ERROR_KICK_IT,
468};
469
470#define QETH_ETH_MAC_V4 0x0100 /* like v4 */
471#define QETH_ETH_MAC_V6 0x3333 /* like v6 */
472/* tr mc mac is longer, but that will be enough to detect mc frames */
473#define QETH_TR_MAC_NC 0xc000 /* non-canonical */
474#define QETH_TR_MAC_C 0x0300 /* canonical */
475
476#define DEFAULT_ADD_HHLEN 0
477#define MAX_ADD_HHLEN 1024
478
479/**
480 * buffer stuff for read channel
481 */
482#define QETH_CMD_BUFFER_NO 8
483
484/**
485 * channel state machine
486 */
487enum qeth_channel_states {
488 CH_STATE_UP,
489 CH_STATE_DOWN,
490 CH_STATE_ACTIVATING,
491 CH_STATE_HALTED,
492 CH_STATE_STOPPED,
493 CH_STATE_RCD,
494 CH_STATE_RCD_DONE,
495};
496/**
497 * card state machine
498 */
499enum qeth_card_states {
500 CARD_STATE_DOWN,
501 CARD_STATE_HARDSETUP,
502 CARD_STATE_SOFTSETUP,
503 CARD_STATE_UP,
504 CARD_STATE_RECOVER,
505};
506
507/**
508 * Protocol versions
509 */
510enum qeth_prot_versions {
511 QETH_PROT_IPV4 = 0x0004,
512 QETH_PROT_IPV6 = 0x0006,
513};
514
515enum qeth_ip_types {
516 QETH_IP_TYPE_NORMAL,
517 QETH_IP_TYPE_VIPA,
518 QETH_IP_TYPE_RXIP,
519 QETH_IP_TYPE_DEL_ALL_MC,
520};
521
522enum qeth_cmd_buffer_state {
523 BUF_STATE_FREE,
524 BUF_STATE_LOCKED,
525 BUF_STATE_PROCESSED,
526};
527
528struct qeth_ipato {
529 int enabled;
530 int invert4;
531 int invert6;
532 struct list_head entries;
533};
534
535struct qeth_channel;
536
537struct qeth_cmd_buffer {
538 enum qeth_cmd_buffer_state state;
539 struct qeth_channel *channel;
540 unsigned char *data;
541 int rc;
542 void (*callback) (struct qeth_channel *, struct qeth_cmd_buffer *);
543};
544
545/**
546 * definition of a qeth channel, used for read and write
547 */
548struct qeth_channel {
549 enum qeth_channel_states state;
550 struct ccw1 ccw;
551 spinlock_t iob_lock;
552 wait_queue_head_t wait_q;
553 struct tasklet_struct irq_tasklet;
554 struct ccw_device *ccwdev;
555/*command buffer for control data*/
556 struct qeth_cmd_buffer iob[QETH_CMD_BUFFER_NO];
557 atomic_t irq_pending;
558 int io_buf_no;
559 int buf_no;
560};
561
562/**
563 * OSA card related definitions
564 */
565struct qeth_token {
566 __u32 issuer_rm_w;
567 __u32 issuer_rm_r;
568 __u32 cm_filter_w;
569 __u32 cm_filter_r;
570 __u32 cm_connection_w;
571 __u32 cm_connection_r;
572 __u32 ulp_filter_w;
573 __u32 ulp_filter_r;
574 __u32 ulp_connection_w;
575 __u32 ulp_connection_r;
576};
577
578struct qeth_seqno {
579 __u32 trans_hdr;
580 __u32 pdu_hdr;
581 __u32 pdu_hdr_ack;
582 __u16 ipa;
583 __u32 pkt_seqno;
584};
585
586struct qeth_reply {
587 struct list_head list;
588 wait_queue_head_t wait_q;
589 int (*callback)(struct qeth_card *, struct qeth_reply *,
590 unsigned long);
591 u32 seqno;
592 unsigned long offset;
593 atomic_t received;
594 int rc;
595 void *param;
596 struct qeth_card *card;
597 atomic_t refcnt;
598};
599
600
601struct qeth_card_blkt {
602 int time_total;
603 int inter_packet;
604 int inter_packet_jumbo;
605};
606
607#define QETH_BROADCAST_WITH_ECHO 0x01
608#define QETH_BROADCAST_WITHOUT_ECHO 0x02
609#define QETH_LAYER2_MAC_READ 0x01
610#define QETH_LAYER2_MAC_REGISTERED 0x02
611struct qeth_card_info {
612 unsigned short unit_addr2;
613 unsigned short cula;
614 unsigned short chpid;
615 __u16 func_level;
616 char mcl_level[QETH_MCL_LENGTH + 1];
617 int guestlan;
618 int mac_bits;
619 int portname_required;
620 int portno;
621 char portname[9];
622 enum qeth_card_types type;
623 enum qeth_link_types link_type;
624 int is_multicast_different;
625 int initial_mtu;
626 int max_mtu;
627 int broadcast_capable;
628 int unique_id;
629 struct qeth_card_blkt blkt;
630 __u32 csum_mask;
f6b85b6c 631 __u32 tx_csum_mask;
4a71df50
FB
632 enum qeth_ipa_promisc_modes promisc_mode;
633};
634
635struct qeth_card_options {
636 struct qeth_routing_info route4;
637 struct qeth_ipa_info ipa4;
638 struct qeth_ipa_info adp; /*Adapter parameters*/
639 struct qeth_routing_info route6;
640 struct qeth_ipa_info ipa6;
641 enum qeth_checksum_types checksum_type;
642 int broadcast_mode;
643 int macaddr_mode;
644 int fake_broadcast;
645 int add_hhlen;
4a71df50
FB
646 int layer2;
647 enum qeth_large_send_types large_send;
648 int performance_stats;
649 int rx_sg_cb;
d64ecc22 650 enum qeth_ipa_isolation_modes isolation;
76b11f8e 651 int sniffer;
4a71df50
FB
652};
653
654/*
655 * thread bits for qeth_card thread masks
656 */
657enum qeth_threads {
658 QETH_RECOVER_THREAD = 1,
659};
660
661struct qeth_osn_info {
662 int (*assist_cb)(struct net_device *dev, void *data);
663 int (*data_cb)(struct sk_buff *skb);
664};
665
666enum qeth_discipline_id {
667 QETH_DISCIPLINE_LAYER3 = 0,
668 QETH_DISCIPLINE_LAYER2 = 1,
669};
670
671struct qeth_discipline {
672 qdio_handler_t *input_handler;
673 qdio_handler_t *output_handler;
674 int (*recover)(void *ptr);
675 struct ccwgroup_driver *ccwgdriver;
676};
677
678struct qeth_vlan_vid {
679 struct list_head list;
680 unsigned short vid;
681};
682
683struct qeth_mc_mac {
684 struct list_head list;
685 __u8 mc_addr[MAX_ADDR_LEN];
686 unsigned char mc_addrlen;
7db2266a 687 int is_vmac;
4a71df50
FB
688};
689
58490f18
KDW
690struct qeth_skb_data {
691 __u32 magic;
692 int count;
693};
694
695#define QETH_SKB_MAGIC 0x71657468
696#define QETH_SIGA_CC2_RETRIES 3
697
4a71df50
FB
698struct qeth_card {
699 struct list_head list;
700 enum qeth_card_states state;
701 int lan_online;
702 spinlock_t lock;
703 struct ccwgroup_device *gdev;
704 struct qeth_channel read;
705 struct qeth_channel write;
706 struct qeth_channel data;
707
708 struct net_device *dev;
709 struct net_device_stats stats;
710
711 struct qeth_card_info info;
712 struct qeth_token token;
713 struct qeth_seqno seqno;
714 struct qeth_card_options options;
715
716 wait_queue_head_t wait_q;
717 spinlock_t vlanlock;
718 spinlock_t mclock;
719 struct vlan_group *vlangrp;
720 struct list_head vid_list;
721 struct list_head mc_list;
722 struct work_struct kernel_thread_starter;
723 spinlock_t thread_mask_lock;
724 unsigned long thread_start_mask;
725 unsigned long thread_allowed_mask;
726 unsigned long thread_running_mask;
727 spinlock_t ip_lock;
728 struct list_head ip_list;
729 struct list_head *ip_tbd_list;
730 struct qeth_ipato ipato;
731 struct list_head cmd_waiter_list;
732 /* QDIO buffer handling */
733 struct qeth_qdio_info qdio;
734 struct qeth_perf_stats perf_stats;
735 int use_hard_stop;
736 struct qeth_osn_info osn_info;
737 struct qeth_discipline discipline;
738 atomic_t force_alloc_skb;
6bcac508 739 struct service_level qeth_service_level;
76b11f8e 740 struct qdio_ssqd_desc ssqd;
c4949f07 741 struct mutex conf_mutex;
4a71df50
FB
742};
743
744struct qeth_card_list_struct {
745 struct list_head list;
746 rwlock_t rwlock;
747};
748
749/*some helper functions*/
750#define QETH_CARD_IFNAME(card) (((card)->dev)? (card)->dev->name : "")
751
752static inline struct qeth_card *CARD_FROM_CDEV(struct ccw_device *cdev)
753{
754 struct qeth_card *card = dev_get_drvdata(&((struct ccwgroup_device *)
755 dev_get_drvdata(&cdev->dev))->dev);
756 return card;
757}
758
759static inline int qeth_get_micros(void)
760{
761 return (int) (get_clock() >> 12);
762}
763
4a71df50
FB
764static inline int qeth_get_ip_version(struct sk_buff *skb)
765{
21fde749
FB
766 struct ethhdr *ehdr = (struct ethhdr *)skb->data;
767 switch (ehdr->h_proto) {
4a71df50
FB
768 case ETH_P_IPV6:
769 return 6;
770 case ETH_P_IP:
771 return 4;
772 default:
773 return 0;
774 }
775}
776
f90b744e
FB
777static inline void qeth_put_buffer_pool_entry(struct qeth_card *card,
778 struct qeth_buffer_pool_entry *entry)
779{
780 list_add_tail(&entry->list, &card->qdio.in_buf_pool.entry_list);
781}
782
4a71df50
FB
783extern struct ccwgroup_driver qeth_l2_ccwgroup_driver;
784extern struct ccwgroup_driver qeth_l3_ccwgroup_driver;
785const char *qeth_get_cardname_short(struct qeth_card *);
786int qeth_realloc_buffer_pool(struct qeth_card *, int);
787int qeth_core_load_discipline(struct qeth_card *, enum qeth_discipline_id);
788void qeth_core_free_discipline(struct qeth_card *);
789int qeth_core_create_device_attributes(struct device *);
790void qeth_core_remove_device_attributes(struct device *);
791int qeth_core_create_osn_attributes(struct device *);
792void qeth_core_remove_osn_attributes(struct device *);
793
794/* exports for qeth discipline device drivers */
795extern struct qeth_card_list_struct qeth_core_card_list;
683d718a 796extern struct kmem_cache *qeth_core_header_cache;
d11ba0c4 797extern struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS];
4a71df50
FB
798
799void qeth_set_allowed_threads(struct qeth_card *, unsigned long , int);
800int qeth_threads_running(struct qeth_card *, unsigned long);
801int qeth_wait_for_threads(struct qeth_card *, unsigned long);
802int qeth_do_run_thread(struct qeth_card *, unsigned long);
803void qeth_clear_thread_start_bit(struct qeth_card *, unsigned long);
804void qeth_clear_thread_running_bit(struct qeth_card *, unsigned long);
805int qeth_core_hardsetup_card(struct qeth_card *);
806void qeth_print_status_message(struct qeth_card *);
807int qeth_init_qdio_queues(struct qeth_card *);
808int qeth_send_startlan(struct qeth_card *);
809int qeth_send_stoplan(struct qeth_card *);
810int qeth_send_ipa_cmd(struct qeth_card *, struct qeth_cmd_buffer *,
811 int (*reply_cb)
812 (struct qeth_card *, struct qeth_reply *, unsigned long),
813 void *);
814struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *,
815 enum qeth_ipa_cmds, enum qeth_prot_versions);
816int qeth_query_setadapterparms(struct qeth_card *);
76b11f8e
UB
817int qeth_check_qdio_errors(struct qeth_card *, struct qdio_buffer *,
818 unsigned int, const char *);
4a71df50
FB
819void qeth_queue_input_buffer(struct qeth_card *, int);
820struct sk_buff *qeth_core_get_next_skb(struct qeth_card *,
821 struct qdio_buffer *, struct qdio_buffer_element **, int *,
822 struct qeth_hdr **);
823void qeth_schedule_recovery(struct qeth_card *);
824void qeth_qdio_output_handler(struct ccw_device *, unsigned int,
779e6e1c 825 int, int, int, unsigned long);
4a71df50
FB
826void qeth_clear_ipacmd_list(struct qeth_card *);
827int qeth_qdio_clear_card(struct qeth_card *, int);
828void qeth_clear_working_pool_list(struct qeth_card *);
829void qeth_clear_cmd_buffers(struct qeth_channel *);
830void qeth_clear_qdio_buffers(struct qeth_card *);
831void qeth_setadp_promisc_mode(struct qeth_card *);
832struct net_device_stats *qeth_get_stats(struct net_device *);
833int qeth_change_mtu(struct net_device *, int);
834int qeth_setadpparms_change_macaddr(struct qeth_card *);
835void qeth_tx_timeout(struct net_device *);
836void qeth_prepare_control_data(struct qeth_card *, int,
837 struct qeth_cmd_buffer *);
838void qeth_release_buffer(struct qeth_channel *, struct qeth_cmd_buffer *);
839void qeth_prepare_ipa_cmd(struct qeth_card *, struct qeth_cmd_buffer *, char);
840struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *);
841int qeth_mdio_read(struct net_device *, int, int);
842int qeth_snmp_command(struct qeth_card *, char __user *);
4a71df50
FB
843struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *, __u32, __u32);
844int qeth_default_setadapterparms_cb(struct qeth_card *, struct qeth_reply *,
845 unsigned long);
846int qeth_send_control_data(struct qeth_card *, int, struct qeth_cmd_buffer *,
847 int (*reply_cb)(struct qeth_card *, struct qeth_reply*, unsigned long),
848 void *reply_param);
4a71df50 849int qeth_get_priority_queue(struct qeth_card *, struct sk_buff *, int, int);
4a71df50
FB
850int qeth_get_elements_no(struct qeth_card *, void *, struct sk_buff *, int);
851int qeth_do_send_packet_fast(struct qeth_card *, struct qeth_qdio_out_q *,
64ef8957 852 struct sk_buff *, struct qeth_hdr *, int, int, int);
4a71df50 853int qeth_do_send_packet(struct qeth_card *, struct qeth_qdio_out_q *,
64ef8957 854 struct sk_buff *, struct qeth_hdr *, int);
df8b4ec8 855int qeth_core_get_sset_count(struct net_device *, int);
4a71df50
FB
856void qeth_core_get_ethtool_stats(struct net_device *,
857 struct ethtool_stats *, u64 *);
858void qeth_core_get_strings(struct net_device *, u32, u8 *);
859void qeth_core_get_drvinfo(struct net_device *, struct ethtool_drvinfo *);
cd023216 860void qeth_dbf_longtext(enum qeth_dbf_names dbf_nix, int level, char *text, ...);
3f9975aa 861int qeth_core_ethtool_get_settings(struct net_device *, struct ethtool_cmd *);
d64ecc22 862int qeth_set_access_ctrl_online(struct qeth_card *card);
4a71df50
FB
863
864/* exports for OSN */
865int qeth_osn_assist(struct net_device *, void *, int);
866int qeth_osn_register(unsigned char *read_dev_no, struct net_device **,
867 int (*assist_cb)(struct net_device *, void *),
868 int (*data_cb)(struct sk_buff *));
869void qeth_osn_deregister(struct net_device *);
870
871#endif /* __QETH_CORE_H__ */