[net-next-2.6.git] / drivers / rtc / rtc-omap.c

/*
 * TI OMAP1 Real Time Clock interface for Linux
 *
 * Copyright (C) 2003 MontaVista Software, Inc.
 * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
 *
 * Copyright (C) 2006 David Brownell (new RTC framework)
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/ioport.h>
#include <linux/delay.h>
#include <linux/rtc.h>
#include <linux/bcd.h>
#include <linux/platform_device.h>

#include <asm/io.h>


/* The OMAP1 RTC is a year/month/day/hours/minutes/seconds BCD clock
 * with century-range alarm matching, driven by the 32kHz clock.
 *
 * The main user-visible ways it differs from PC RTCs are by omitting
 * "don't care" alarm fields and sub-second periodic IRQs, and having
 * an autoadjust mechanism to calibrate to the true oscillator rate.
 *
 * Board-specific wiring options include using split power mode with
 * RTC_OFF_NOFF used as the reset signal (so the RTC won't be reset),
 * and wiring RTC_WAKE_INT (so the RTC alarm can wake the system from
 * low power modes).  See the BOARD-SPECIFIC CUSTOMIZATION comment.
 */

#define OMAP_RTC_BASE			0xfffb4800

/* RTC registers */
#define OMAP_RTC_SECONDS_REG		0x00
#define OMAP_RTC_MINUTES_REG		0x04
#define OMAP_RTC_HOURS_REG		0x08
#define OMAP_RTC_DAYS_REG		0x0C
#define OMAP_RTC_MONTHS_REG		0x10
#define OMAP_RTC_YEARS_REG		0x14
#define OMAP_RTC_WEEKS_REG		0x18

#define OMAP_RTC_ALARM_SECONDS_REG	0x20
#define OMAP_RTC_ALARM_MINUTES_REG	0x24
#define OMAP_RTC_ALARM_HOURS_REG	0x28
#define OMAP_RTC_ALARM_DAYS_REG		0x2c
#define OMAP_RTC_ALARM_MONTHS_REG	0x30
#define OMAP_RTC_ALARM_YEARS_REG	0x34

#define OMAP_RTC_CTRL_REG		0x40
#define OMAP_RTC_STATUS_REG		0x44
#define OMAP_RTC_INTERRUPTS_REG		0x48

#define OMAP_RTC_COMP_LSB_REG		0x4c
#define OMAP_RTC_COMP_MSB_REG		0x50
#define OMAP_RTC_OSC_REG		0x54

/* OMAP_RTC_CTRL_REG bit fields: */
#define OMAP_RTC_CTRL_SPLIT		(1<<7)
#define OMAP_RTC_CTRL_DISABLE		(1<<6)
#define OMAP_RTC_CTRL_SET_32_COUNTER	(1<<5)
#define OMAP_RTC_CTRL_TEST		(1<<4)
#define OMAP_RTC_CTRL_MODE_12_24	(1<<3)
#define OMAP_RTC_CTRL_AUTO_COMP		(1<<2)
#define OMAP_RTC_CTRL_ROUND_30S		(1<<1)
#define OMAP_RTC_CTRL_STOP		(1<<0)

/* OMAP_RTC_STATUS_REG bit fields: */
#define OMAP_RTC_STATUS_POWER_UP        (1<<7)
#define OMAP_RTC_STATUS_ALARM           (1<<6)
#define OMAP_RTC_STATUS_1D_EVENT        (1<<5)
#define OMAP_RTC_STATUS_1H_EVENT        (1<<4)
#define OMAP_RTC_STATUS_1M_EVENT        (1<<3)
#define OMAP_RTC_STATUS_1S_EVENT        (1<<2)
#define OMAP_RTC_STATUS_RUN             (1<<1)
#define OMAP_RTC_STATUS_BUSY            (1<<0)

/* OMAP_RTC_INTERRUPTS_REG bit fields: */
#define OMAP_RTC_INTERRUPTS_IT_ALARM    (1<<3)
#define OMAP_RTC_INTERRUPTS_IT_TIMER    (1<<2)

static void __iomem	*rtc_base;

#define rtc_read(addr)		__raw_readb(rtc_base + (addr))
#define rtc_write(val, addr)	__raw_writeb(val, rtc_base + (addr))


/* we rely on the rtc framework to handle locking (rtc->ops_lock),
 * so the only other requirement is that register accesses which
 * require BUSY to be clear are made with IRQs locally disabled
 */
static void rtc_wait_not_busy(void)
{
	int	count = 0;
	u8	status;

	/* BUSY may stay active for 1/32768 second (~30 usec) */
	for (count = 0; count < 50; count++) {
		status = rtc_read(OMAP_RTC_STATUS_REG);
		if ((status & (u8)OMAP_RTC_STATUS_BUSY) == 0)
			break;
		udelay(1);
	}
	/* now we have ~15 usec to read/write various registers */
}

static irqreturn_t rtc_irq(int irq, void *rtc)
{
	unsigned long		events = 0;
	u8			irq_data;

	irq_data = rtc_read(OMAP_RTC_STATUS_REG);

	/* alarm irq? */
	if (irq_data & OMAP_RTC_STATUS_ALARM) {
		rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG);
		events |= RTC_IRQF | RTC_AF;
	}

	/* 1/sec periodic/update irq? */
	if (irq_data & OMAP_RTC_STATUS_1S_EVENT)
		events |= RTC_IRQF | RTC_UF;

	rtc_update_irq(rtc, 1, events);

	return IRQ_HANDLED;
}

#ifdef	CONFIG_RTC_INTF_DEV

static int
omap_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
{
	u8 reg;

	switch (cmd) {
	case RTC_AIE_OFF:
	case RTC_AIE_ON:
	case RTC_UIE_OFF:
	case RTC_UIE_ON:
		break;
	default:
		return -ENOIOCTLCMD;
	}

	local_irq_disable();
	rtc_wait_not_busy();
	reg = rtc_read(OMAP_RTC_INTERRUPTS_REG);
	switch (cmd) {
	/* AIE = Alarm Interrupt Enable */
	case RTC_AIE_OFF:
		reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
		break;
	case RTC_AIE_ON:
		reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
		break;
	/* UIE = Update Interrupt Enable (1/second) */
	case RTC_UIE_OFF:
		reg &= ~OMAP_RTC_INTERRUPTS_IT_TIMER;
		break;
	case RTC_UIE_ON:
		reg |= OMAP_RTC_INTERRUPTS_IT_TIMER;
		break;
	}
	rtc_wait_not_busy();
	rtc_write(reg, OMAP_RTC_INTERRUPTS_REG);
	local_irq_enable();

	return 0;
}

#else
#define	omap_rtc_ioctl	NULL
#endif

/* this hardware doesn't support "don't care" alarm fields */
static int tm2bcd(struct rtc_time *tm)
{
	if (rtc_valid_tm(tm) != 0)
		return -EINVAL;

	tm->tm_sec = bin2bcd(tm->tm_sec);
	tm->tm_min = bin2bcd(tm->tm_min);
	tm->tm_hour = bin2bcd(tm->tm_hour);
	tm->tm_mday = bin2bcd(tm->tm_mday);

	tm->tm_mon = bin2bcd(tm->tm_mon + 1);

	/* epoch == 1900 */
	if (tm->tm_year < 100 || tm->tm_year > 199)
		return -EINVAL;
	tm->tm_year = bin2bcd(tm->tm_year - 100);

	return 0;
}

static void bcd2tm(struct rtc_time *tm)
{
	tm->tm_sec = bcd2bin(tm->tm_sec);
	tm->tm_min = bcd2bin(tm->tm_min);
	tm->tm_hour = bcd2bin(tm->tm_hour);
	tm->tm_mday = bcd2bin(tm->tm_mday);
	tm->tm_mon = bcd2bin(tm->tm_mon) - 1;
	/* epoch == 1900 */
	tm->tm_year = bcd2bin(tm->tm_year) + 100;
}


static int omap_rtc_read_time(struct device *dev, struct rtc_time *tm)
{
	/* we don't report wday/yday/isdst ... */
	local_irq_disable();
	rtc_wait_not_busy();

	tm->tm_sec = rtc_read(OMAP_RTC_SECONDS_REG);
	tm->tm_min = rtc_read(OMAP_RTC_MINUTES_REG);
	tm->tm_hour = rtc_read(OMAP_RTC_HOURS_REG);
	tm->tm_mday = rtc_read(OMAP_RTC_DAYS_REG);
	tm->tm_mon = rtc_read(OMAP_RTC_MONTHS_REG);
	tm->tm_year = rtc_read(OMAP_RTC_YEARS_REG);

	local_irq_enable();

	bcd2tm(tm);
	return 0;
}

static int omap_rtc_set_time(struct device *dev, struct rtc_time *tm)
{
	if (tm2bcd(tm) < 0)
		return -EINVAL;
	local_irq_disable();
	rtc_wait_not_busy();

	rtc_write(tm->tm_year, OMAP_RTC_YEARS_REG);
	rtc_write(tm->tm_mon, OMAP_RTC_MONTHS_REG);
	rtc_write(tm->tm_mday, OMAP_RTC_DAYS_REG);
	rtc_write(tm->tm_hour, OMAP_RTC_HOURS_REG);
	rtc_write(tm->tm_min, OMAP_RTC_MINUTES_REG);
	rtc_write(tm->tm_sec, OMAP_RTC_SECONDS_REG);

	local_irq_enable();

	return 0;
}

static int omap_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
{
	local_irq_disable();
	rtc_wait_not_busy();

	alm->time.tm_sec = rtc_read(OMAP_RTC_ALARM_SECONDS_REG);
	alm->time.tm_min = rtc_read(OMAP_RTC_ALARM_MINUTES_REG);
	alm->time.tm_hour = rtc_read(OMAP_RTC_ALARM_HOURS_REG);
	alm->time.tm_mday = rtc_read(OMAP_RTC_ALARM_DAYS_REG);
	alm->time.tm_mon = rtc_read(OMAP_RTC_ALARM_MONTHS_REG);
	alm->time.tm_year = rtc_read(OMAP_RTC_ALARM_YEARS_REG);

	local_irq_enable();

	bcd2tm(&alm->time);
	alm->enabled = !!(rtc_read(OMAP_RTC_INTERRUPTS_REG)
			& OMAP_RTC_INTERRUPTS_IT_ALARM);

	return 0;
}

static int omap_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
{
	u8 reg;

	if (tm2bcd(&alm->time) < 0)
		return -EINVAL;

	local_irq_disable();
	rtc_wait_not_busy();

	rtc_write(alm->time.tm_year, OMAP_RTC_ALARM_YEARS_REG);
	rtc_write(alm->time.tm_mon, OMAP_RTC_ALARM_MONTHS_REG);
	rtc_write(alm->time.tm_mday, OMAP_RTC_ALARM_DAYS_REG);
	rtc_write(alm->time.tm_hour, OMAP_RTC_ALARM_HOURS_REG);
	rtc_write(alm->time.tm_min, OMAP_RTC_ALARM_MINUTES_REG);
	rtc_write(alm->time.tm_sec, OMAP_RTC_ALARM_SECONDS_REG);

	reg = rtc_read(OMAP_RTC_INTERRUPTS_REG);
	if (alm->enabled)
		reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
	else
		reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
	rtc_write(reg, OMAP_RTC_INTERRUPTS_REG);

	local_irq_enable();

	return 0;
}

static struct rtc_class_ops omap_rtc_ops = {
	.ioctl		= omap_rtc_ioctl,
	.read_time	= omap_rtc_read_time,
	.set_time	= omap_rtc_set_time,
	.read_alarm	= omap_rtc_read_alarm,
	.set_alarm	= omap_rtc_set_alarm,
};

static int omap_rtc_alarm;
static int omap_rtc_timer;

static int __init omap_rtc_probe(struct platform_device *pdev)
{
	struct resource		*res, *mem;
	struct rtc_device	*rtc;
	u8			reg, new_ctrl;

	omap_rtc_timer = platform_get_irq(pdev, 0);
	if (omap_rtc_timer <= 0) {
		pr_debug("%s: no update irq?\n", pdev->name);
		return -ENOENT;
	}

	omap_rtc_alarm = platform_get_irq(pdev, 1);
	if (omap_rtc_alarm <= 0) {
		pr_debug("%s: no alarm irq?\n", pdev->name);
		return -ENOENT;
	}

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!res) {
		pr_debug("%s: RTC resource data missing\n", pdev->name);
		return -ENOENT;
	}

	mem = request_mem_region(res->start, resource_size(res), pdev->name);
	if (!mem) {
		pr_debug("%s: RTC registers at %08x are not free\n",
			pdev->name, res->start);
		return -EBUSY;
	}

	rtc_base = ioremap(res->start, resource_size(res));
	if (!rtc_base) {
		pr_debug("%s: RTC registers can't be mapped\n", pdev->name);
		goto fail;
	}

	rtc = rtc_device_register(pdev->name, &pdev->dev,
			&omap_rtc_ops, THIS_MODULE);
	if (IS_ERR(rtc)) {
		pr_debug("%s: can't register RTC device, err %ld\n",
			pdev->name, PTR_ERR(rtc));
		goto fail0;
	}
	platform_set_drvdata(pdev, rtc);
	dev_set_drvdata(&rtc->dev, mem);

	/* clear pending irqs, and set 1/second periodic,
	 * which we'll use instead of update irqs
	 */
	rtc_write(0, OMAP_RTC_INTERRUPTS_REG);

	/* clear old status */
	reg = rtc_read(OMAP_RTC_STATUS_REG);
	if (reg & (u8) OMAP_RTC_STATUS_POWER_UP) {
		pr_info("%s: RTC power up reset detected\n",
			pdev->name);
		rtc_write(OMAP_RTC_STATUS_POWER_UP, OMAP_RTC_STATUS_REG);
	}
	if (reg & (u8) OMAP_RTC_STATUS_ALARM)
		rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG);

	/* handle periodic and alarm irqs */
	if (request_irq(omap_rtc_timer, rtc_irq, IRQF_DISABLED,
			dev_name(&rtc->dev), rtc)) {
		pr_debug("%s: RTC timer interrupt IRQ%d already claimed\n",
			pdev->name, omap_rtc_timer);
		goto fail1;
	}
	if ((omap_rtc_timer != omap_rtc_alarm) &&
		(request_irq(omap_rtc_alarm, rtc_irq, IRQF_DISABLED,
			dev_name(&rtc->dev), rtc))) {
		pr_debug("%s: RTC alarm interrupt IRQ%d already claimed\n",
			pdev->name, omap_rtc_alarm);
		goto fail2;
	}

	/* On boards with split power, RTC_ON_NOFF won't reset the RTC */
	reg = rtc_read(OMAP_RTC_CTRL_REG);
	if (reg & (u8) OMAP_RTC_CTRL_STOP)
		pr_info("%s: already running\n", pdev->name);

	/* force to 24 hour mode */
	new_ctrl = reg & ~(OMAP_RTC_CTRL_SPLIT|OMAP_RTC_CTRL_AUTO_COMP);
	new_ctrl |= OMAP_RTC_CTRL_STOP;

	/* BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE:
	 *
	 *  - Boards wired so that RTC_WAKE_INT does something, and muxed
	 *    right (W13_1610_RTC_WAKE_INT is the default after chip reset),
	 *    should initialize the device wakeup flag appropriately.
	 *
	 *  - Boards wired so RTC_ON_nOFF is used as the reset signal,
	 *    rather than nPWRON_RESET, should forcibly enable split
	 *    power mode.  (Some chip errata report that RTC_CTRL_SPLIT
	 *    is write-only, and always reads as zero...)
	 */
	device_init_wakeup(&pdev->dev, 0);

	if (new_ctrl & (u8) OMAP_RTC_CTRL_SPLIT)
		pr_info("%s: split power mode\n", pdev->name);

	if (reg != new_ctrl)
		rtc_write(new_ctrl, OMAP_RTC_CTRL_REG);

	return 0;

fail2:
	free_irq(omap_rtc_timer, NULL);
fail1:
	rtc_device_unregister(rtc);
fail0:
	iounmap(rtc_base);
fail:
	release_resource(mem);
	return -EIO;
}

static int __exit omap_rtc_remove(struct platform_device *pdev)
{
	struct rtc_device	*rtc = platform_get_drvdata(pdev);

	device_init_wakeup(&pdev->dev, 0);

	/* leave rtc running, but disable irqs */
	rtc_write(0, OMAP_RTC_INTERRUPTS_REG);

	free_irq(omap_rtc_timer, rtc);

	if (omap_rtc_timer != omap_rtc_alarm)
		free_irq(omap_rtc_alarm, rtc);

	release_resource(dev_get_drvdata(&rtc->dev));
	rtc_device_unregister(rtc);
	return 0;
}

#ifdef CONFIG_PM

static u8 irqstat;

static int omap_rtc_suspend(struct platform_device *pdev, pm_message_t state)
{
	irqstat = rtc_read(OMAP_RTC_INTERRUPTS_REG);

	/* FIXME the RTC alarm is not currently acting as a wakeup event
	 * source, and in fact this enable() call is just saving a flag
	 * that's never used...
	 */
	if (device_may_wakeup(&pdev->dev))
		enable_irq_wake(omap_rtc_alarm);
	else
		rtc_write(0, OMAP_RTC_INTERRUPTS_REG);

	return 0;
}

static int omap_rtc_resume(struct platform_device *pdev)
{
	if (device_may_wakeup(&pdev->dev))
		disable_irq_wake(omap_rtc_alarm);
	else
		rtc_write(irqstat, OMAP_RTC_INTERRUPTS_REG);
	return 0;
}

#else
#define omap_rtc_suspend NULL
#define omap_rtc_resume  NULL
#endif

static void omap_rtc_shutdown(struct platform_device *pdev)
{
	rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
}

MODULE_ALIAS("platform:omap_rtc");
static struct platform_driver omap_rtc_driver = {
	.remove		= __exit_p(omap_rtc_remove),
	.suspend	= omap_rtc_suspend,
	.resume		= omap_rtc_resume,
	.shutdown	= omap_rtc_shutdown,
	.driver		= {
		.name	= "omap_rtc",
		.owner	= THIS_MODULE,
	},
};

static int __init rtc_init(void)
{
	return platform_driver_probe(&omap_rtc_driver, omap_rtc_probe);
}
module_init(rtc_init);

static void __exit rtc_exit(void)
{
	platform_driver_unregister(&omap_rtc_driver);
}
module_exit(rtc_exit);

MODULE_AUTHOR("George G. Davis (and others)");
MODULE_LICENSE("GPL");
Commit	Line	Data
db68b189 DB	1	/*
	2	* TI OMAP1 Real Time Clock interface for Linux
	3	*
	4	* Copyright (C) 2003 MontaVista Software, Inc.
	5	* Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
	6	*
	7	* Copyright (C) 2006 David Brownell (new RTC framework)
	8	*
	9	* This program is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License
	11	* as published by the Free Software Foundation; either version
	12	* 2 of the License, or (at your option) any later version.
	13	*/
	14
	15	#include <linux/kernel.h>
	16	#include <linux/init.h>
	17	#include <linux/module.h>
	18	#include <linux/ioport.h>
	19	#include <linux/delay.h>
	20	#include <linux/rtc.h>
	21	#include <linux/bcd.h>
	22	#include <linux/platform_device.h>
	23
	24	#include <asm/io.h>
db68b189 DB	25
	26
	27	/* The OMAP1 RTC is a year/month/day/hours/minutes/seconds BCD clock
	28	* with century-range alarm matching, driven by the 32kHz clock.
	29	*
	30	* The main user-visible ways it differs from PC RTCs are by omitting
	31	* "don't care" alarm fields and sub-second periodic IRQs, and having
	32	* an autoadjust mechanism to calibrate to the true oscillator rate.
	33	*
	34	* Board-specific wiring options include using split power mode with
	35	* RTC_OFF_NOFF used as the reset signal (so the RTC won't be reset),
	36	* and wiring RTC_WAKE_INT (so the RTC alarm can wake the system from
	37	* low power modes). See the BOARD-SPECIFIC CUSTOMIZATION comment.
	38	*/
	39
	40	#define OMAP_RTC_BASE 0xfffb4800
	41
	42	/* RTC registers */
	43	#define OMAP_RTC_SECONDS_REG 0x00
	44	#define OMAP_RTC_MINUTES_REG 0x04
	45	#define OMAP_RTC_HOURS_REG 0x08
	46	#define OMAP_RTC_DAYS_REG 0x0C
	47	#define OMAP_RTC_MONTHS_REG 0x10
	48	#define OMAP_RTC_YEARS_REG 0x14
	49	#define OMAP_RTC_WEEKS_REG 0x18
	50
	51	#define OMAP_RTC_ALARM_SECONDS_REG 0x20
	52	#define OMAP_RTC_ALARM_MINUTES_REG 0x24
	53	#define OMAP_RTC_ALARM_HOURS_REG 0x28
	54	#define OMAP_RTC_ALARM_DAYS_REG 0x2c
	55	#define OMAP_RTC_ALARM_MONTHS_REG 0x30
	56	#define OMAP_RTC_ALARM_YEARS_REG 0x34
	57
	58	#define OMAP_RTC_CTRL_REG 0x40
	59	#define OMAP_RTC_STATUS_REG 0x44
	60	#define OMAP_RTC_INTERRUPTS_REG 0x48
	61
	62	#define OMAP_RTC_COMP_LSB_REG 0x4c
	63	#define OMAP_RTC_COMP_MSB_REG 0x50
	64	#define OMAP_RTC_OSC_REG 0x54
	65
	66	/* OMAP_RTC_CTRL_REG bit fields: */
	67	#define OMAP_RTC_CTRL_SPLIT (1<<7)
	68	#define OMAP_RTC_CTRL_DISABLE (1<<6)
	69	#define OMAP_RTC_CTRL_SET_32_COUNTER (1<<5)
	70	#define OMAP_RTC_CTRL_TEST (1<<4)
	71	#define OMAP_RTC_CTRL_MODE_12_24 (1<<3)
	72	#define OMAP_RTC_CTRL_AUTO_COMP (1<<2)
	73	#define OMAP_RTC_CTRL_ROUND_30S (1<<1)
	74	#define OMAP_RTC_CTRL_STOP (1<<0)
	75
	76	/* OMAP_RTC_STATUS_REG bit fields: */
	77	#define OMAP_RTC_STATUS_POWER_UP (1<<7)
	78	#define OMAP_RTC_STATUS_ALARM (1<<6)
	79	#define OMAP_RTC_STATUS_1D_EVENT (1<<5)
	80	#define OMAP_RTC_STATUS_1H_EVENT (1<<4)
	81	#define OMAP_RTC_STATUS_1M_EVENT (1<<3)
	82	#define OMAP_RTC_STATUS_1S_EVENT (1<<2)
	83	#define OMAP_RTC_STATUS_RUN (1<<1)
	84	#define OMAP_RTC_STATUS_BUSY (1<<0)
	85
	86	/* OMAP_RTC_INTERRUPTS_REG bit fields: */
	87	#define OMAP_RTC_INTERRUPTS_IT_ALARM (1<<3)
	88	#define OMAP_RTC_INTERRUPTS_IT_TIMER (1<<2)
89
8cfde8c1	90	static void __iomem *rtc_base;
db68b189	91
8cfde8c1 MG	92	#define rtc_read(addr) __raw_readb(rtc_base + (addr))
8cfde8c1 MG	93	#define rtc_write(val, addr) __raw_writeb(val, rtc_base + (addr))
db68b189 DB	94
db68b189 DB	95
db68b189 DB	96	/* we rely on the rtc framework to handle locking (rtc->ops_lock),
	97	* so the only other requirement is that register accesses which
	98	* require BUSY to be clear are made with IRQs locally disabled
	99	*/
	100	static void rtc_wait_not_busy(void)
	101	{
	102	int count = 0;
	103	u8 status;
	104
	105	/* BUSY may stay active for 1/32768 second (~30 usec) */
	106	for (count = 0; count < 50; count++) {
	107	status = rtc_read(OMAP_RTC_STATUS_REG);
	108	if ((status & (u8)OMAP_RTC_STATUS_BUSY) == 0)
	109	break;
	110	udelay(1);
	111	}
	112	/* now we have ~15 usec to read/write various registers */
	113	}
	114
ab6a2d70	115	static irqreturn_t rtc_irq(int irq, void *rtc)
db68b189 DB	116	{
	117	unsigned long events = 0;
	118	u8 irq_data;
	119
	120	irq_data = rtc_read(OMAP_RTC_STATUS_REG);
	121
	122	/* alarm irq? */
	123	if (irq_data & OMAP_RTC_STATUS_ALARM) {
	124	rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG);
	125	events \|= RTC_IRQF \| RTC_AF;
	126	}
	127
	128	/* 1/sec periodic/update irq? */
	129	if (irq_data & OMAP_RTC_STATUS_1S_EVENT)
	130	events \|= RTC_IRQF \| RTC_UF;
	131
ab6a2d70	132	rtc_update_irq(rtc, 1, events);
db68b189 DB	133
	134	return IRQ_HANDLED;
	135	}
	136
	137	#ifdef CONFIG_RTC_INTF_DEV
	138
	139	static int
	140	omap_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
	141	{
	142	u8 reg;
	143
	144	switch (cmd) {
	145	case RTC_AIE_OFF:
	146	case RTC_AIE_ON:
	147	case RTC_UIE_OFF:
	148	case RTC_UIE_ON:
	149	break;
	150	default:
	151	return -ENOIOCTLCMD;
	152	}
	153
	154	local_irq_disable();
	155	rtc_wait_not_busy();
	156	reg = rtc_read(OMAP_RTC_INTERRUPTS_REG);
	157	switch (cmd) {
	158	/* AIE = Alarm Interrupt Enable */
	159	case RTC_AIE_OFF:
	160	reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
	161	break;
	162	case RTC_AIE_ON:
	163	reg \|= OMAP_RTC_INTERRUPTS_IT_ALARM;
	164	break;
	165	/* UIE = Update Interrupt Enable (1/second) */
	166	case RTC_UIE_OFF:
	167	reg &= ~OMAP_RTC_INTERRUPTS_IT_TIMER;
	168	break;
	169	case RTC_UIE_ON:
	170	reg \|= OMAP_RTC_INTERRUPTS_IT_TIMER;
	171	break;
	172	}
	173	rtc_wait_not_busy();
	174	rtc_write(reg, OMAP_RTC_INTERRUPTS_REG);
	175	local_irq_enable();
	176
	177	return 0;
	178	}
	179
	180	#else
	181	#define omap_rtc_ioctl NULL
	182	#endif
	183
	184	/* this hardware doesn't support "don't care" alarm fields */
	185	static int tm2bcd(struct rtc_time *tm)
	186	{
	187	if (rtc_valid_tm(tm) != 0)
	188	return -EINVAL;
	189
fe20ba70 AB	190	tm->tm_sec = bin2bcd(tm->tm_sec);
	191	tm->tm_min = bin2bcd(tm->tm_min);
	192	tm->tm_hour = bin2bcd(tm->tm_hour);
	193	tm->tm_mday = bin2bcd(tm->tm_mday);
db68b189	194
fe20ba70	195	tm->tm_mon = bin2bcd(tm->tm_mon + 1);
db68b189 DB	196
	197	/* epoch == 1900 */
	198	if (tm->tm_year < 100 \|\| tm->tm_year > 199)
	199	return -EINVAL;
fe20ba70	200	tm->tm_year = bin2bcd(tm->tm_year - 100);
db68b189 DB	201
	202	return 0;
	203	}
	204
	205	static void bcd2tm(struct rtc_time *tm)
	206	{
fe20ba70 AB	207	tm->tm_sec = bcd2bin(tm->tm_sec);
	208	tm->tm_min = bcd2bin(tm->tm_min);
	209	tm->tm_hour = bcd2bin(tm->tm_hour);
	210	tm->tm_mday = bcd2bin(tm->tm_mday);
	211	tm->tm_mon = bcd2bin(tm->tm_mon) - 1;
db68b189	212	/* epoch == 1900 */
fe20ba70	213	tm->tm_year = bcd2bin(tm->tm_year) + 100;
db68b189 DB	214	}
	215
	216
	217	static int omap_rtc_read_time(struct device dev, struct rtc_time tm)
	218	{
	219	/* we don't report wday/yday/isdst ... */
	220	local_irq_disable();
	221	rtc_wait_not_busy();
	222
	223	tm->tm_sec = rtc_read(OMAP_RTC_SECONDS_REG);
	224	tm->tm_min = rtc_read(OMAP_RTC_MINUTES_REG);
	225	tm->tm_hour = rtc_read(OMAP_RTC_HOURS_REG);
	226	tm->tm_mday = rtc_read(OMAP_RTC_DAYS_REG);
	227	tm->tm_mon = rtc_read(OMAP_RTC_MONTHS_REG);
	228	tm->tm_year = rtc_read(OMAP_RTC_YEARS_REG);
	229
	230	local_irq_enable();
	231
	232	bcd2tm(tm);
	233	return 0;
	234	}
	235
	236	static int omap_rtc_set_time(struct device dev, struct rtc_time tm)
	237	{
	238	if (tm2bcd(tm) < 0)
	239	return -EINVAL;
	240	local_irq_disable();
	241	rtc_wait_not_busy();
	242
	243	rtc_write(tm->tm_year, OMAP_RTC_YEARS_REG);
	244	rtc_write(tm->tm_mon, OMAP_RTC_MONTHS_REG);
	245	rtc_write(tm->tm_mday, OMAP_RTC_DAYS_REG);
	246	rtc_write(tm->tm_hour, OMAP_RTC_HOURS_REG);
	247	rtc_write(tm->tm_min, OMAP_RTC_MINUTES_REG);
	248	rtc_write(tm->tm_sec, OMAP_RTC_SECONDS_REG);
	249
	250	local_irq_enable();
	251
	252	return 0;
	253	}
	254
	255	static int omap_rtc_read_alarm(struct device dev, struct rtc_wkalrm alm)
	256	{
	257	local_irq_disable();
	258	rtc_wait_not_busy();
	259
	260	alm->time.tm_sec = rtc_read(OMAP_RTC_ALARM_SECONDS_REG);
	261	alm->time.tm_min = rtc_read(OMAP_RTC_ALARM_MINUTES_REG);
	262	alm->time.tm_hour = rtc_read(OMAP_RTC_ALARM_HOURS_REG);
	263	alm->time.tm_mday = rtc_read(OMAP_RTC_ALARM_DAYS_REG);
	264	alm->time.tm_mon = rtc_read(OMAP_RTC_ALARM_MONTHS_REG);
	265	alm->time.tm_year = rtc_read(OMAP_RTC_ALARM_YEARS_REG);
	266
	267	local_irq_enable();
	268
	269	bcd2tm(&alm->time);
a2db8dfc	270	alm->enabled = !!(rtc_read(OMAP_RTC_INTERRUPTS_REG)
db68b189	271	& OMAP_RTC_INTERRUPTS_IT_ALARM);
db68b189 DB	272
	273	return 0;
	274	}
	275
	276	static int omap_rtc_set_alarm(struct device dev, struct rtc_wkalrm alm)
	277	{
	278	u8 reg;
	279
db68b189 DB	280	if (tm2bcd(&alm->time) < 0)
	281	return -EINVAL;
	282
	283	local_irq_disable();
	284	rtc_wait_not_busy();
	285
	286	rtc_write(alm->time.tm_year, OMAP_RTC_ALARM_YEARS_REG);
	287	rtc_write(alm->time.tm_mon, OMAP_RTC_ALARM_MONTHS_REG);
	288	rtc_write(alm->time.tm_mday, OMAP_RTC_ALARM_DAYS_REG);
	289	rtc_write(alm->time.tm_hour, OMAP_RTC_ALARM_HOURS_REG);
	290	rtc_write(alm->time.tm_min, OMAP_RTC_ALARM_MINUTES_REG);
	291	rtc_write(alm->time.tm_sec, OMAP_RTC_ALARM_SECONDS_REG);
	292
	293	reg = rtc_read(OMAP_RTC_INTERRUPTS_REG);
	294	if (alm->enabled)
	295	reg \|= OMAP_RTC_INTERRUPTS_IT_ALARM;
	296	else
	297	reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
	298	rtc_write(reg, OMAP_RTC_INTERRUPTS_REG);
	299
	300	local_irq_enable();
	301
	302	return 0;
	303	}
	304
	305	static struct rtc_class_ops omap_rtc_ops = {
	306	.ioctl = omap_rtc_ioctl,
	307	.read_time = omap_rtc_read_time,
	308	.set_time = omap_rtc_set_time,
	309	.read_alarm = omap_rtc_read_alarm,
	310	.set_alarm = omap_rtc_set_alarm,
	311	};
	312
	313	static int omap_rtc_alarm;
	314	static int omap_rtc_timer;
	315
71fc8224	316	static int __init omap_rtc_probe(struct platform_device *pdev)
db68b189 DB	317	{
	318	struct resource res, mem;
	319	struct rtc_device *rtc;
	320	u8 reg, new_ctrl;
	321
	322	omap_rtc_timer = platform_get_irq(pdev, 0);
	323	if (omap_rtc_timer <= 0) {
	324	pr_debug("%s: no update irq?\n", pdev->name);
	325	return -ENOENT;
	326	}
	327
	328	omap_rtc_alarm = platform_get_irq(pdev, 1);
	329	if (omap_rtc_alarm <= 0) {
	330	pr_debug("%s: no alarm irq?\n", pdev->name);
	331	return -ENOENT;
	332	}
	333
db68b189	334	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
8cfde8c1 MG	335	if (!res) {
8cfde8c1 MG	336	pr_debug("%s: RTC resource data missing\n", pdev->name);
db68b189 DB	337	return -ENOENT;
	338	}
	339
8cfde8c1	340	mem = request_mem_region(res->start, resource_size(res), pdev->name);
db68b189 DB	341	if (!mem) {
db68b189 DB	342	pr_debug("%s: RTC registers at %08x are not free\n",
8cfde8c1	343	pdev->name, res->start);
db68b189 DB	344	return -EBUSY;
	345	}
	346
8cfde8c1 MG	347	rtc_base = ioremap(res->start, resource_size(res));
	348	if (!rtc_base) {
	349	pr_debug("%s: RTC registers can't be mapped\n", pdev->name);
	350	goto fail;
	351	}
	352
db68b189 DB	353	rtc = rtc_device_register(pdev->name, &pdev->dev,
	354	&omap_rtc_ops, THIS_MODULE);
	355	if (IS_ERR(rtc)) {
	356	pr_debug("%s: can't register RTC device, err %ld\n",
	357	pdev->name, PTR_ERR(rtc));
8cfde8c1	358	goto fail0;
db68b189 DB	359	}
db68b189 DB	360	platform_set_drvdata(pdev, rtc);
558a40f7	361	dev_set_drvdata(&rtc->dev, mem);
db68b189 DB	362
	363	/* clear pending irqs, and set 1/second periodic,
	364	* which we'll use instead of update irqs
	365	*/
	366	rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
	367
	368	/* clear old status */
	369	reg = rtc_read(OMAP_RTC_STATUS_REG);
	370	if (reg & (u8) OMAP_RTC_STATUS_POWER_UP) {
	371	pr_info("%s: RTC power up reset detected\n",
	372	pdev->name);
	373	rtc_write(OMAP_RTC_STATUS_POWER_UP, OMAP_RTC_STATUS_REG);
	374	}
	375	if (reg & (u8) OMAP_RTC_STATUS_ALARM)
	376	rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG);
	377
	378	/* handle periodic and alarm irqs */
38515e90	379	if (request_irq(omap_rtc_timer, rtc_irq, IRQF_DISABLED,
744bcb13	380	dev_name(&rtc->dev), rtc)) {
db68b189 DB	381	pr_debug("%s: RTC timer interrupt IRQ%d already claimed\n",
db68b189 DB	382	pdev->name, omap_rtc_timer);
8cfde8c1	383	goto fail1;
db68b189	384	}
8cfde8c1 MG	385	if ((omap_rtc_timer != omap_rtc_alarm) &&
	386	(request_irq(omap_rtc_alarm, rtc_irq, IRQF_DISABLED,
	387	dev_name(&rtc->dev), rtc))) {
db68b189 DB	388	pr_debug("%s: RTC alarm interrupt IRQ%d already claimed\n",
db68b189 DB	389	pdev->name, omap_rtc_alarm);
8cfde8c1	390	goto fail2;
db68b189 DB	391	}
	392
	393	/* On boards with split power, RTC_ON_NOFF won't reset the RTC */
	394	reg = rtc_read(OMAP_RTC_CTRL_REG);
	395	if (reg & (u8) OMAP_RTC_CTRL_STOP)
	396	pr_info("%s: already running\n", pdev->name);
	397
	398	/* force to 24 hour mode */
	399	new_ctrl = reg & ~(OMAP_RTC_CTRL_SPLIT\|OMAP_RTC_CTRL_AUTO_COMP);
	400	new_ctrl \|= OMAP_RTC_CTRL_STOP;
	401
	402	/* BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE:
	403	*
	404	* - Boards wired so that RTC_WAKE_INT does something, and muxed
	405	* right (W13_1610_RTC_WAKE_INT is the default after chip reset),
	406	* should initialize the device wakeup flag appropriately.
	407	*
	408	* - Boards wired so RTC_ON_nOFF is used as the reset signal,
	409	* rather than nPWRON_RESET, should forcibly enable split
	410	* power mode. (Some chip errata report that RTC_CTRL_SPLIT
	411	* is write-only, and always reads as zero...)
	412	*/
	413	device_init_wakeup(&pdev->dev, 0);
	414
	415	if (new_ctrl & (u8) OMAP_RTC_CTRL_SPLIT)
	416	pr_info("%s: split power mode\n", pdev->name);
	417
	418	if (reg != new_ctrl)
	419	rtc_write(new_ctrl, OMAP_RTC_CTRL_REG);
	420
	421	return 0;
	422
8cfde8c1	423	fail2:
db68b189	424	free_irq(omap_rtc_timer, NULL);
8cfde8c1	425	fail1:
db68b189	426	rtc_device_unregister(rtc);
8cfde8c1 MG	427	fail0:
8cfde8c1 MG	428	iounmap(rtc_base);
db68b189 DB	429	fail:
	430	release_resource(mem);
	431	return -EIO;
	432	}
	433
71fc8224	434	static int __exit omap_rtc_remove(struct platform_device *pdev)
db68b189	435	{
a419aef8	436	struct rtc_device *rtc = platform_get_drvdata(pdev);
db68b189 DB	437
	438	device_init_wakeup(&pdev->dev, 0);
	439
	440	/* leave rtc running, but disable irqs */
	441	rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
	442
	443	free_irq(omap_rtc_timer, rtc);
8cfde8c1 MG	444
	445	if (omap_rtc_timer != omap_rtc_alarm)
	446	free_irq(omap_rtc_alarm, rtc);
db68b189	447
558a40f7	448	release_resource(dev_get_drvdata(&rtc->dev));
db68b189 DB	449	rtc_device_unregister(rtc);
	450	return 0;
	451	}
	452
	453	#ifdef CONFIG_PM
	454
db68b189 DB	455	static u8 irqstat;
	456
	457	static int omap_rtc_suspend(struct platform_device *pdev, pm_message_t state)
	458	{
db68b189 DB	459	irqstat = rtc_read(OMAP_RTC_INTERRUPTS_REG);
	460
	461	/* FIXME the RTC alarm is not currently acting as a wakeup event
	462	* source, and in fact this enable() call is just saving a flag
	463	* that's never used...
	464	*/
	465	if (device_may_wakeup(&pdev->dev))
	466	enable_irq_wake(omap_rtc_alarm);
	467	else
	468	rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
	469
	470	return 0;
	471	}
	472
	473	static int omap_rtc_resume(struct platform_device *pdev)
	474	{
db68b189 DB	475	if (device_may_wakeup(&pdev->dev))
	476	disable_irq_wake(omap_rtc_alarm);
	477	else
	478	rtc_write(irqstat, OMAP_RTC_INTERRUPTS_REG);
	479	return 0;
	480	}
	481
	482	#else
	483	#define omap_rtc_suspend NULL
	484	#define omap_rtc_resume NULL
	485	#endif
	486
	487	static void omap_rtc_shutdown(struct platform_device *pdev)
	488	{
	489	rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
	490	}
	491
ad28a07b	492	MODULE_ALIAS("platform:omap_rtc");
db68b189	493	static struct platform_driver omap_rtc_driver = {
71fc8224	494	.remove = __exit_p(omap_rtc_remove),
db68b189 DB	495	.suspend = omap_rtc_suspend,
	496	.resume = omap_rtc_resume,
	497	.shutdown = omap_rtc_shutdown,
	498	.driver = {
	499	.name = "omap_rtc",
	500	.owner = THIS_MODULE,
	501	},
	502	};
	503
	504	static int __init rtc_init(void)
	505	{
71fc8224	506	return platform_driver_probe(&omap_rtc_driver, omap_rtc_probe);
db68b189 DB	507	}
	508	module_init(rtc_init);
	509
	510	static void __exit rtc_exit(void)
	511	{
	512	platform_driver_unregister(&omap_rtc_driver);
	513	}
	514	module_exit(rtc_exit);
	515
	516	MODULE_AUTHOR("George G. Davis (and others)");
	517	MODULE_LICENSE("GPL");