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rtc: remove and clarify unneeded externs
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CommitLineData
7be2c7c9
DB
1/*
2 * RTC class driver for "CMOS RTC": PCs, ACPI, etc
3 *
4 * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
5 * Copyright (C) 2006 David Brownell (convert to new framework)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13/*
14 * The original "cmos clock" chip was an MC146818 chip, now obsolete.
15 * That defined the register interface now provided by all PCs, some
16 * non-PC systems, and incorporated into ACPI. Modern PC chipsets
17 * integrate an MC146818 clone in their southbridge, and boards use
18 * that instead of discrete clones like the DS12887 or M48T86. There
19 * are also clones that connect using the LPC bus.
20 *
21 * That register API is also used directly by various other drivers
22 * (notably for integrated NVRAM), infrastructure (x86 has code to
23 * bypass the RTC framework, directly reading the RTC during boot
24 * and updating minutes/seconds for systems using NTP synch) and
25 * utilities (like userspace 'hwclock', if no /dev node exists).
26 *
27 * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
28 * interrupts disabled, holding the global rtc_lock, to exclude those
29 * other drivers and utilities on correctly configured systems.
30 */
31#include <linux/kernel.h>
32#include <linux/module.h>
33#include <linux/init.h>
34#include <linux/interrupt.h>
35#include <linux/spinlock.h>
36#include <linux/platform_device.h>
37#include <linux/mod_devicetable.h>
38
9d8af78b
BW
39#ifdef CONFIG_HPET_EMULATE_RTC
40#include <asm/hpet.h>
41#endif
42
7be2c7c9
DB
43/* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
44#include <asm-generic/rtc.h>
45
9d8af78b
BW
46#ifndef CONFIG_HPET_EMULATE_RTC
47#define is_hpet_enabled() 0
48#define hpet_set_alarm_time(hrs, min, sec) do { } while (0)
49#define hpet_set_periodic_freq(arg) 0
50#define hpet_mask_rtc_irq_bit(arg) do { } while (0)
51#define hpet_set_rtc_irq_bit(arg) do { } while (0)
52#define hpet_rtc_timer_init() do { } while (0)
53#define hpet_register_irq_handler(h) 0
54#define hpet_unregister_irq_handler(h) do { } while (0)
c68d07b2
CM
55static irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id)
56{
57 return 0;
58}
9d8af78b 59#endif
7be2c7c9
DB
60
61struct cmos_rtc {
62 struct rtc_device *rtc;
63 struct device *dev;
64 int irq;
65 struct resource *iomem;
66
87ac84f4
DB
67 void (*wake_on)(struct device *);
68 void (*wake_off)(struct device *);
69
70 u8 enabled_wake;
7be2c7c9
DB
71 u8 suspend_ctrl;
72
73 /* newer hardware extends the original register set */
74 u8 day_alrm;
75 u8 mon_alrm;
76 u8 century;
77};
78
79/* both platform and pnp busses use negative numbers for invalid irqs */
80#define is_valid_irq(n) ((n) >= 0)
81
82static const char driver_name[] = "rtc_cmos";
83
bcd9b89c
DB
84/* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
85 * always mask it against the irq enable bits in RTC_CONTROL. Bit values
86 * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
87 */
88#define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF)
89
90static inline int is_intr(u8 rtc_intr)
91{
92 if (!(rtc_intr & RTC_IRQF))
93 return 0;
94 return rtc_intr & RTC_IRQMASK;
95}
96
7be2c7c9
DB
97/*----------------------------------------------------------------*/
98
99static int cmos_read_time(struct device *dev, struct rtc_time *t)
100{
101 /* REVISIT: if the clock has a "century" register, use
102 * that instead of the heuristic in get_rtc_time().
103 * That'll make Y3K compatility (year > 2070) easy!
104 */
105 get_rtc_time(t);
106 return 0;
107}
108
109static int cmos_set_time(struct device *dev, struct rtc_time *t)
110{
111 /* REVISIT: set the "century" register if available
112 *
113 * NOTE: this ignores the issue whereby updating the seconds
114 * takes effect exactly 500ms after we write the register.
115 * (Also queueing and other delays before we get this far.)
116 */
117 return set_rtc_time(t);
118}
119
120static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
121{
122 struct cmos_rtc *cmos = dev_get_drvdata(dev);
123 unsigned char rtc_control;
124
125 if (!is_valid_irq(cmos->irq))
126 return -EIO;
127
128 /* Basic alarms only support hour, minute, and seconds fields.
129 * Some also support day and month, for alarms up to a year in
130 * the future.
131 */
132 t->time.tm_mday = -1;
133 t->time.tm_mon = -1;
134
135 spin_lock_irq(&rtc_lock);
136 t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
137 t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM);
138 t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM);
139
140 if (cmos->day_alrm) {
615bb29c
ML
141 /* ignore upper bits on readback per ACPI spec */
142 t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f;
7be2c7c9
DB
143 if (!t->time.tm_mday)
144 t->time.tm_mday = -1;
145
146 if (cmos->mon_alrm) {
147 t->time.tm_mon = CMOS_READ(cmos->mon_alrm);
148 if (!t->time.tm_mon)
149 t->time.tm_mon = -1;
150 }
151 }
152
153 rtc_control = CMOS_READ(RTC_CONTROL);
154 spin_unlock_irq(&rtc_lock);
155
156 /* REVISIT this assumes PC style usage: always BCD */
157
158 if (((unsigned)t->time.tm_sec) < 0x60)
159 t->time.tm_sec = BCD2BIN(t->time.tm_sec);
160 else
161 t->time.tm_sec = -1;
162 if (((unsigned)t->time.tm_min) < 0x60)
163 t->time.tm_min = BCD2BIN(t->time.tm_min);
164 else
165 t->time.tm_min = -1;
166 if (((unsigned)t->time.tm_hour) < 0x24)
167 t->time.tm_hour = BCD2BIN(t->time.tm_hour);
168 else
169 t->time.tm_hour = -1;
170
171 if (cmos->day_alrm) {
172 if (((unsigned)t->time.tm_mday) <= 0x31)
173 t->time.tm_mday = BCD2BIN(t->time.tm_mday);
174 else
175 t->time.tm_mday = -1;
176 if (cmos->mon_alrm) {
177 if (((unsigned)t->time.tm_mon) <= 0x12)
178 t->time.tm_mon = BCD2BIN(t->time.tm_mon) - 1;
179 else
180 t->time.tm_mon = -1;
181 }
182 }
183 t->time.tm_year = -1;
184
185 t->enabled = !!(rtc_control & RTC_AIE);
186 t->pending = 0;
187
188 return 0;
189}
190
191static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
192{
193 struct cmos_rtc *cmos = dev_get_drvdata(dev);
194 unsigned char mon, mday, hrs, min, sec;
195 unsigned char rtc_control, rtc_intr;
196
197 if (!is_valid_irq(cmos->irq))
198 return -EIO;
199
200 /* REVISIT this assumes PC style usage: always BCD */
201
202 /* Writing 0xff means "don't care" or "match all". */
203
2b653e06
ZY
204 mon = t->time.tm_mon + 1;
205 mon = (mon <= 12) ? BIN2BCD(mon) : 0xff;
7be2c7c9
DB
206
207 mday = t->time.tm_mday;
208 mday = (mday >= 1 && mday <= 31) ? BIN2BCD(mday) : 0xff;
209
210 hrs = t->time.tm_hour;
211 hrs = (hrs < 24) ? BIN2BCD(hrs) : 0xff;
212
213 min = t->time.tm_min;
214 min = (min < 60) ? BIN2BCD(min) : 0xff;
215
216 sec = t->time.tm_sec;
217 sec = (sec < 60) ? BIN2BCD(sec) : 0xff;
218
9d8af78b 219 hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min, t->time.tm_sec);
7be2c7c9
DB
220 spin_lock_irq(&rtc_lock);
221
222 /* next rtc irq must not be from previous alarm setting */
223 rtc_control = CMOS_READ(RTC_CONTROL);
224 rtc_control &= ~RTC_AIE;
225 CMOS_WRITE(rtc_control, RTC_CONTROL);
226 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
bcd9b89c
DB
227 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
228 if (is_intr(rtc_intr))
ab6a2d70 229 rtc_update_irq(cmos->rtc, 1, rtc_intr);
7be2c7c9
DB
230
231 /* update alarm */
232 CMOS_WRITE(hrs, RTC_HOURS_ALARM);
233 CMOS_WRITE(min, RTC_MINUTES_ALARM);
234 CMOS_WRITE(sec, RTC_SECONDS_ALARM);
235
236 /* the system may support an "enhanced" alarm */
237 if (cmos->day_alrm) {
238 CMOS_WRITE(mday, cmos->day_alrm);
239 if (cmos->mon_alrm)
240 CMOS_WRITE(mon, cmos->mon_alrm);
241 }
242
243 if (t->enabled) {
244 rtc_control |= RTC_AIE;
245 CMOS_WRITE(rtc_control, RTC_CONTROL);
246 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
bcd9b89c
DB
247 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
248 if (is_intr(rtc_intr))
ab6a2d70 249 rtc_update_irq(cmos->rtc, 1, rtc_intr);
7be2c7c9
DB
250 }
251
252 spin_unlock_irq(&rtc_lock);
253
254 return 0;
255}
256
57deb526 257static int cmos_irq_set_freq(struct device *dev, int freq)
7be2c7c9
DB
258{
259 struct cmos_rtc *cmos = dev_get_drvdata(dev);
260 int f;
261 unsigned long flags;
262
263 if (!is_valid_irq(cmos->irq))
264 return -ENXIO;
265
266 /* 0 = no irqs; 1 = 2^15 Hz ... 15 = 2^0 Hz */
267 f = ffs(freq);
97144c67
DB
268 if (f-- > 16)
269 return -EINVAL;
270 f = 16 - f;
7be2c7c9
DB
271
272 spin_lock_irqsave(&rtc_lock, flags);
9d8af78b
BW
273 if (!hpet_set_periodic_freq(freq))
274 CMOS_WRITE(RTC_REF_CLCK_32KHZ | f, RTC_FREQ_SELECT);
7be2c7c9
DB
275 spin_unlock_irqrestore(&rtc_lock, flags);
276
277 return 0;
278}
279
57deb526
AZ
280static int cmos_irq_set_state(struct device *dev, int enabled)
281{
282 struct cmos_rtc *cmos = dev_get_drvdata(dev);
283 unsigned char rtc_control, rtc_intr;
284 unsigned long flags;
285
286 if (!is_valid_irq(cmos->irq))
287 return -ENXIO;
288
289 spin_lock_irqsave(&rtc_lock, flags);
290 rtc_control = CMOS_READ(RTC_CONTROL);
291
292 if (enabled)
293 rtc_control |= RTC_PIE;
294 else
295 rtc_control &= ~RTC_PIE;
296
297 CMOS_WRITE(rtc_control, RTC_CONTROL);
298
299 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
300 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
301 if (is_intr(rtc_intr))
302 rtc_update_irq(cmos->rtc, 1, rtc_intr);
303
304 spin_unlock_irqrestore(&rtc_lock, flags);
305 return 0;
306}
307
7be2c7c9
DB
308#if defined(CONFIG_RTC_INTF_DEV) || defined(CONFIG_RTC_INTF_DEV_MODULE)
309
310static int
311cmos_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
312{
313 struct cmos_rtc *cmos = dev_get_drvdata(dev);
314 unsigned char rtc_control, rtc_intr;
315 unsigned long flags;
316
317 switch (cmd) {
318 case RTC_AIE_OFF:
319 case RTC_AIE_ON:
320 case RTC_UIE_OFF:
321 case RTC_UIE_ON:
322 case RTC_PIE_OFF:
323 case RTC_PIE_ON:
324 if (!is_valid_irq(cmos->irq))
325 return -EINVAL;
326 break;
327 default:
328 return -ENOIOCTLCMD;
329 }
330
331 spin_lock_irqsave(&rtc_lock, flags);
332 rtc_control = CMOS_READ(RTC_CONTROL);
333 switch (cmd) {
334 case RTC_AIE_OFF: /* alarm off */
335 rtc_control &= ~RTC_AIE;
9d8af78b 336 hpet_mask_rtc_irq_bit(RTC_AIE);
7be2c7c9
DB
337 break;
338 case RTC_AIE_ON: /* alarm on */
339 rtc_control |= RTC_AIE;
9d8af78b 340 hpet_set_rtc_irq_bit(RTC_AIE);
7be2c7c9
DB
341 break;
342 case RTC_UIE_OFF: /* update off */
343 rtc_control &= ~RTC_UIE;
9d8af78b 344 hpet_mask_rtc_irq_bit(RTC_UIE);
7be2c7c9
DB
345 break;
346 case RTC_UIE_ON: /* update on */
347 rtc_control |= RTC_UIE;
9d8af78b 348 hpet_set_rtc_irq_bit(RTC_UIE);
7be2c7c9
DB
349 break;
350 case RTC_PIE_OFF: /* periodic off */
351 rtc_control &= ~RTC_PIE;
9d8af78b 352 hpet_mask_rtc_irq_bit(RTC_PIE);
7be2c7c9
DB
353 break;
354 case RTC_PIE_ON: /* periodic on */
355 rtc_control |= RTC_PIE;
9d8af78b 356 hpet_set_rtc_irq_bit(RTC_PIE);
7be2c7c9
DB
357 break;
358 }
9d8af78b
BW
359 if (!is_hpet_enabled())
360 CMOS_WRITE(rtc_control, RTC_CONTROL);
361
7be2c7c9 362 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
bcd9b89c
DB
363 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
364 if (is_intr(rtc_intr))
ab6a2d70 365 rtc_update_irq(cmos->rtc, 1, rtc_intr);
9d8af78b 366
7be2c7c9
DB
367 spin_unlock_irqrestore(&rtc_lock, flags);
368 return 0;
369}
370
371#else
372#define cmos_rtc_ioctl NULL
373#endif
374
375#if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE)
376
377static int cmos_procfs(struct device *dev, struct seq_file *seq)
378{
379 struct cmos_rtc *cmos = dev_get_drvdata(dev);
380 unsigned char rtc_control, valid;
381
382 spin_lock_irq(&rtc_lock);
383 rtc_control = CMOS_READ(RTC_CONTROL);
384 valid = CMOS_READ(RTC_VALID);
385 spin_unlock_irq(&rtc_lock);
386
387 /* NOTE: at least ICH6 reports battery status using a different
388 * (non-RTC) bit; and SQWE is ignored on many current systems.
389 */
390 return seq_printf(seq,
391 "periodic_IRQ\t: %s\n"
392 "update_IRQ\t: %s\n"
c8626a1d 393 "HPET_emulated\t: %s\n"
7be2c7c9
DB
394 // "square_wave\t: %s\n"
395 // "BCD\t\t: %s\n"
396 "DST_enable\t: %s\n"
397 "periodic_freq\t: %d\n"
398 "batt_status\t: %s\n",
399 (rtc_control & RTC_PIE) ? "yes" : "no",
400 (rtc_control & RTC_UIE) ? "yes" : "no",
c8626a1d 401 is_hpet_enabled() ? "yes" : "no",
7be2c7c9
DB
402 // (rtc_control & RTC_SQWE) ? "yes" : "no",
403 // (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
404 (rtc_control & RTC_DST_EN) ? "yes" : "no",
405 cmos->rtc->irq_freq,
406 (valid & RTC_VRT) ? "okay" : "dead");
407}
408
409#else
410#define cmos_procfs NULL
411#endif
412
413static const struct rtc_class_ops cmos_rtc_ops = {
414 .ioctl = cmos_rtc_ioctl,
415 .read_time = cmos_read_time,
416 .set_time = cmos_set_time,
417 .read_alarm = cmos_read_alarm,
418 .set_alarm = cmos_set_alarm,
419 .proc = cmos_procfs,
57deb526
AZ
420 .irq_set_freq = cmos_irq_set_freq,
421 .irq_set_state = cmos_irq_set_state,
7be2c7c9
DB
422};
423
424/*----------------------------------------------------------------*/
425
e07e232c
DB
426/*
427 * All these chips have at least 64 bytes of address space, shared by
428 * RTC registers and NVRAM. Most of those bytes of NVRAM are used
429 * by boot firmware. Modern chips have 128 or 256 bytes.
430 */
431
432#define NVRAM_OFFSET (RTC_REG_D + 1)
433
434static ssize_t
435cmos_nvram_read(struct kobject *kobj, struct bin_attribute *attr,
436 char *buf, loff_t off, size_t count)
437{
438 int retval;
439
440 if (unlikely(off >= attr->size))
441 return 0;
442 if ((off + count) > attr->size)
443 count = attr->size - off;
444
445 spin_lock_irq(&rtc_lock);
446 for (retval = 0, off += NVRAM_OFFSET; count--; retval++, off++)
447 *buf++ = CMOS_READ(off);
448 spin_unlock_irq(&rtc_lock);
449
450 return retval;
451}
452
453static ssize_t
454cmos_nvram_write(struct kobject *kobj, struct bin_attribute *attr,
455 char *buf, loff_t off, size_t count)
456{
457 struct cmos_rtc *cmos;
458 int retval;
459
460 cmos = dev_get_drvdata(container_of(kobj, struct device, kobj));
461 if (unlikely(off >= attr->size))
462 return -EFBIG;
463 if ((off + count) > attr->size)
464 count = attr->size - off;
465
466 /* NOTE: on at least PCs and Ataris, the boot firmware uses a
467 * checksum on part of the NVRAM data. That's currently ignored
468 * here. If userspace is smart enough to know what fields of
469 * NVRAM to update, updating checksums is also part of its job.
470 */
471 spin_lock_irq(&rtc_lock);
472 for (retval = 0, off += NVRAM_OFFSET; count--; retval++, off++) {
473 /* don't trash RTC registers */
474 if (off == cmos->day_alrm
475 || off == cmos->mon_alrm
476 || off == cmos->century)
477 buf++;
478 else
479 CMOS_WRITE(*buf++, off);
480 }
481 spin_unlock_irq(&rtc_lock);
482
483 return retval;
484}
485
486static struct bin_attribute nvram = {
487 .attr = {
488 .name = "nvram",
489 .mode = S_IRUGO | S_IWUSR,
490 .owner = THIS_MODULE,
491 },
492
493 .read = cmos_nvram_read,
494 .write = cmos_nvram_write,
495 /* size gets set up later */
496};
497
498/*----------------------------------------------------------------*/
499
7be2c7c9
DB
500static struct cmos_rtc cmos_rtc;
501
502static irqreturn_t cmos_interrupt(int irq, void *p)
503{
504 u8 irqstat;
8a0bdfd7 505 u8 rtc_control;
7be2c7c9
DB
506
507 spin_lock(&rtc_lock);
9d8af78b
BW
508 /*
509 * In this case it is HPET RTC interrupt handler
510 * calling us, with the interrupt information
511 * passed as arg1, instead of irq.
512 */
513 if (is_hpet_enabled())
514 irqstat = (unsigned long)irq & 0xF0;
515 else {
516 irqstat = CMOS_READ(RTC_INTR_FLAGS);
517 rtc_control = CMOS_READ(RTC_CONTROL);
518 irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
519 }
8a0bdfd7
DB
520
521 /* All Linux RTC alarms should be treated as if they were oneshot.
522 * Similar code may be needed in system wakeup paths, in case the
523 * alarm woke the system.
524 */
525 if (irqstat & RTC_AIE) {
9d8af78b 526 rtc_control = CMOS_READ(RTC_CONTROL);
8a0bdfd7
DB
527 rtc_control &= ~RTC_AIE;
528 CMOS_WRITE(rtc_control, RTC_CONTROL);
529 CMOS_READ(RTC_INTR_FLAGS);
530 }
7be2c7c9
DB
531 spin_unlock(&rtc_lock);
532
bcd9b89c 533 if (is_intr(irqstat)) {
7be2c7c9
DB
534 rtc_update_irq(p, 1, irqstat);
535 return IRQ_HANDLED;
536 } else
537 return IRQ_NONE;
538}
539
41ac8df9 540#ifdef CONFIG_PNP
7be2c7c9
DB
541#define INITSECTION
542
543#else
7be2c7c9
DB
544#define INITSECTION __init
545#endif
546
547static int INITSECTION
548cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
549{
550 struct cmos_rtc_board_info *info = dev->platform_data;
551 int retval = 0;
552 unsigned char rtc_control;
e07e232c 553 unsigned address_space;
7be2c7c9
DB
554
555 /* there can be only one ... */
556 if (cmos_rtc.dev)
557 return -EBUSY;
558
559 if (!ports)
560 return -ENODEV;
561
05440dfc
DB
562 /* Claim I/O ports ASAP, minimizing conflict with legacy driver.
563 *
564 * REVISIT non-x86 systems may instead use memory space resources
565 * (needing ioremap etc), not i/o space resources like this ...
566 */
567 ports = request_region(ports->start,
568 ports->end + 1 - ports->start,
569 driver_name);
570 if (!ports) {
571 dev_dbg(dev, "i/o registers already in use\n");
572 return -EBUSY;
573 }
574
7be2c7c9
DB
575 cmos_rtc.irq = rtc_irq;
576 cmos_rtc.iomem = ports;
577
e07e232c
DB
578 /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
579 * driver did, but don't reject unknown configs. Old hardware
580 * won't address 128 bytes, and for now we ignore the way newer
581 * chips can address 256 bytes (using two more i/o ports).
582 */
583#if defined(CONFIG_ATARI)
584 address_space = 64;
585#elif defined(__i386__) || defined(__x86_64__) || defined(__arm__)
586 address_space = 128;
587#else
588#warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
589 address_space = 128;
590#endif
591
87ac84f4
DB
592 /* For ACPI systems extension info comes from the FADT. On others,
593 * board specific setup provides it as appropriate. Systems where
594 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
595 * some almost-clones) can provide hooks to make that behave.
e07e232c
DB
596 *
597 * Note that ACPI doesn't preclude putting these registers into
598 * "extended" areas of the chip, including some that we won't yet
599 * expect CMOS_READ and friends to handle.
7be2c7c9
DB
600 */
601 if (info) {
e07e232c
DB
602 if (info->rtc_day_alarm && info->rtc_day_alarm < 128)
603 cmos_rtc.day_alrm = info->rtc_day_alarm;
604 if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128)
605 cmos_rtc.mon_alrm = info->rtc_mon_alarm;
606 if (info->rtc_century && info->rtc_century < 128)
607 cmos_rtc.century = info->rtc_century;
87ac84f4
DB
608
609 if (info->wake_on && info->wake_off) {
610 cmos_rtc.wake_on = info->wake_on;
611 cmos_rtc.wake_off = info->wake_off;
612 }
7be2c7c9
DB
613 }
614
615 cmos_rtc.rtc = rtc_device_register(driver_name, dev,
616 &cmos_rtc_ops, THIS_MODULE);
05440dfc
DB
617 if (IS_ERR(cmos_rtc.rtc)) {
618 retval = PTR_ERR(cmos_rtc.rtc);
619 goto cleanup0;
620 }
7be2c7c9
DB
621
622 cmos_rtc.dev = dev;
623 dev_set_drvdata(dev, &cmos_rtc);
cd966209 624 rename_region(ports, cmos_rtc.rtc->dev.bus_id);
7be2c7c9
DB
625
626 spin_lock_irq(&rtc_lock);
627
628 /* force periodic irq to CMOS reset default of 1024Hz;
629 *
630 * REVISIT it's been reported that at least one x86_64 ALI mobo
631 * doesn't use 32KHz here ... for portability we might need to
632 * do something about other clock frequencies.
633 */
7be2c7c9 634 cmos_rtc.rtc->irq_freq = 1024;
9d8af78b
BW
635 if (!hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq))
636 CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
7be2c7c9
DB
637
638 /* disable irqs.
639 *
640 * NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
641 * allegedly some older rtcs need that to handle irqs properly
642 */
643 rtc_control = CMOS_READ(RTC_CONTROL);
644 rtc_control &= ~(RTC_PIE | RTC_AIE | RTC_UIE);
645 CMOS_WRITE(rtc_control, RTC_CONTROL);
646 CMOS_READ(RTC_INTR_FLAGS);
647
648 spin_unlock_irq(&rtc_lock);
649
650 /* FIXME teach the alarm code how to handle binary mode;
651 * <asm-generic/rtc.h> doesn't know 12-hour mode either.
652 */
653 if (!(rtc_control & RTC_24H) || (rtc_control & (RTC_DM_BINARY))) {
654 dev_dbg(dev, "only 24-hr BCD mode supported\n");
655 retval = -ENXIO;
656 goto cleanup1;
657 }
658
9d8af78b
BW
659 if (is_valid_irq(rtc_irq)) {
660 irq_handler_t rtc_cmos_int_handler;
661
662 if (is_hpet_enabled()) {
663 int err;
664
665 rtc_cmos_int_handler = hpet_rtc_interrupt;
666 err = hpet_register_irq_handler(cmos_interrupt);
667 if (err != 0) {
668 printk(KERN_WARNING "hpet_register_irq_handler "
669 " failed in rtc_init().");
670 goto cleanup1;
671 }
672 } else
673 rtc_cmos_int_handler = cmos_interrupt;
674
675 retval = request_irq(rtc_irq, rtc_cmos_int_handler,
676 IRQF_DISABLED, cmos_rtc.rtc->dev.bus_id,
ab6a2d70 677 cmos_rtc.rtc);
9d8af78b
BW
678 if (retval < 0) {
679 dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
680 goto cleanup1;
681 }
7be2c7c9 682 }
9d8af78b 683 hpet_rtc_timer_init();
7be2c7c9 684
e07e232c
DB
685 /* export at least the first block of NVRAM */
686 nvram.size = address_space - NVRAM_OFFSET;
687 retval = sysfs_create_bin_file(&dev->kobj, &nvram);
688 if (retval < 0) {
689 dev_dbg(dev, "can't create nvram file? %d\n", retval);
690 goto cleanup2;
691 }
7be2c7c9
DB
692
693 pr_info("%s: alarms up to one %s%s\n",
cd966209 694 cmos_rtc.rtc->dev.bus_id,
7be2c7c9
DB
695 is_valid_irq(rtc_irq)
696 ? (cmos_rtc.mon_alrm
697 ? "year"
698 : (cmos_rtc.day_alrm
699 ? "month" : "day"))
700 : "no",
701 cmos_rtc.century ? ", y3k" : ""
702 );
703
704 return 0;
705
e07e232c
DB
706cleanup2:
707 if (is_valid_irq(rtc_irq))
708 free_irq(rtc_irq, cmos_rtc.rtc);
7be2c7c9 709cleanup1:
05440dfc 710 cmos_rtc.dev = NULL;
7be2c7c9 711 rtc_device_unregister(cmos_rtc.rtc);
05440dfc
DB
712cleanup0:
713 release_region(ports->start, ports->end + 1 - ports->start);
7be2c7c9
DB
714 return retval;
715}
716
717static void cmos_do_shutdown(void)
718{
719 unsigned char rtc_control;
720
721 spin_lock_irq(&rtc_lock);
722 rtc_control = CMOS_READ(RTC_CONTROL);
723 rtc_control &= ~(RTC_PIE|RTC_AIE|RTC_UIE);
724 CMOS_WRITE(rtc_control, RTC_CONTROL);
725 CMOS_READ(RTC_INTR_FLAGS);
726 spin_unlock_irq(&rtc_lock);
727}
728
729static void __exit cmos_do_remove(struct device *dev)
730{
731 struct cmos_rtc *cmos = dev_get_drvdata(dev);
05440dfc 732 struct resource *ports;
7be2c7c9
DB
733
734 cmos_do_shutdown();
735
e07e232c
DB
736 sysfs_remove_bin_file(&dev->kobj, &nvram);
737
9d8af78b 738 if (is_valid_irq(cmos->irq)) {
05440dfc 739 free_irq(cmos->irq, cmos->rtc);
9d8af78b
BW
740 hpet_unregister_irq_handler(cmos_interrupt);
741 }
7be2c7c9 742
05440dfc
DB
743 rtc_device_unregister(cmos->rtc);
744 cmos->rtc = NULL;
7be2c7c9 745
05440dfc
DB
746 ports = cmos->iomem;
747 release_region(ports->start, ports->end + 1 - ports->start);
748 cmos->iomem = NULL;
749
750 cmos->dev = NULL;
7be2c7c9
DB
751 dev_set_drvdata(dev, NULL);
752}
753
754#ifdef CONFIG_PM
755
756static int cmos_suspend(struct device *dev, pm_message_t mesg)
757{
758 struct cmos_rtc *cmos = dev_get_drvdata(dev);
759 int do_wake = device_may_wakeup(dev);
bcd9b89c 760 unsigned char tmp;
7be2c7c9
DB
761
762 /* only the alarm might be a wakeup event source */
763 spin_lock_irq(&rtc_lock);
764 cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
765 if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
bcd9b89c
DB
766 unsigned char irqstat;
767
7be2c7c9
DB
768 if (do_wake)
769 tmp &= ~(RTC_PIE|RTC_UIE);
770 else
771 tmp &= ~(RTC_PIE|RTC_AIE|RTC_UIE);
772 CMOS_WRITE(tmp, RTC_CONTROL);
773 irqstat = CMOS_READ(RTC_INTR_FLAGS);
bcd9b89c
DB
774 irqstat &= (tmp & RTC_IRQMASK) | RTC_IRQF;
775 if (is_intr(irqstat))
ab6a2d70 776 rtc_update_irq(cmos->rtc, 1, irqstat);
bcd9b89c 777 }
7be2c7c9
DB
778 spin_unlock_irq(&rtc_lock);
779
87ac84f4
DB
780 if (tmp & RTC_AIE) {
781 cmos->enabled_wake = 1;
782 if (cmos->wake_on)
783 cmos->wake_on(dev);
784 else
785 enable_irq_wake(cmos->irq);
786 }
7be2c7c9
DB
787
788 pr_debug("%s: suspend%s, ctrl %02x\n",
cd966209 789 cmos_rtc.rtc->dev.bus_id,
7be2c7c9
DB
790 (tmp & RTC_AIE) ? ", alarm may wake" : "",
791 tmp);
792
793 return 0;
794}
795
796static int cmos_resume(struct device *dev)
797{
798 struct cmos_rtc *cmos = dev_get_drvdata(dev);
799 unsigned char tmp = cmos->suspend_ctrl;
800
7be2c7c9
DB
801 /* re-enable any irqs previously active */
802 if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
803
87ac84f4
DB
804 if (cmos->enabled_wake) {
805 if (cmos->wake_off)
806 cmos->wake_off(dev);
807 else
808 disable_irq_wake(cmos->irq);
809 cmos->enabled_wake = 0;
810 }
7be2c7c9
DB
811
812 spin_lock_irq(&rtc_lock);
813 CMOS_WRITE(tmp, RTC_CONTROL);
814 tmp = CMOS_READ(RTC_INTR_FLAGS);
bcd9b89c
DB
815 tmp &= (cmos->suspend_ctrl & RTC_IRQMASK) | RTC_IRQF;
816 if (is_intr(tmp))
ab6a2d70 817 rtc_update_irq(cmos->rtc, 1, tmp);
bcd9b89c 818 spin_unlock_irq(&rtc_lock);
7be2c7c9
DB
819 }
820
821 pr_debug("%s: resume, ctrl %02x\n",
cd966209 822 cmos_rtc.rtc->dev.bus_id,
7be2c7c9
DB
823 cmos->suspend_ctrl);
824
825
826 return 0;
827}
828
829#else
830#define cmos_suspend NULL
831#define cmos_resume NULL
832#endif
833
834/*----------------------------------------------------------------*/
835
e07e232c
DB
836/* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
837 * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
838 * probably list them in similar PNPBIOS tables; so PNP is more common.
839 *
840 * We don't use legacy "poke at the hardware" probing. Ancient PCs that
841 * predate even PNPBIOS should set up platform_bus devices.
7be2c7c9
DB
842 */
843
41ac8df9 844#ifdef CONFIG_PNP
7be2c7c9
DB
845
846#include <linux/pnp.h>
847
848static int __devinit
849cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
850{
851 /* REVISIT paranoia argues for a shutdown notifier, since PNP
852 * drivers can't provide shutdown() methods to disable IRQs.
853 * Or better yet, fix PNP to allow those methods...
854 */
6cd8fa87
MG
855 if (pnp_port_start(pnp,0) == 0x70 && !pnp_irq_valid(pnp,0))
856 /* Some machines contain a PNP entry for the RTC, but
857 * don't define the IRQ. It should always be safe to
858 * hardcode it in these cases
859 */
8766ad0c
BH
860 return cmos_do_probe(&pnp->dev,
861 pnp_get_resource(pnp, IORESOURCE_IO, 0), 8);
6cd8fa87
MG
862 else
863 return cmos_do_probe(&pnp->dev,
8766ad0c
BH
864 pnp_get_resource(pnp, IORESOURCE_IO, 0),
865 pnp_irq(pnp, 0));
7be2c7c9
DB
866}
867
868static void __exit cmos_pnp_remove(struct pnp_dev *pnp)
869{
870 cmos_do_remove(&pnp->dev);
871}
872
873#ifdef CONFIG_PM
874
875static int cmos_pnp_suspend(struct pnp_dev *pnp, pm_message_t mesg)
876{
877 return cmos_suspend(&pnp->dev, mesg);
878}
879
880static int cmos_pnp_resume(struct pnp_dev *pnp)
881{
882 return cmos_resume(&pnp->dev);
883}
884
885#else
886#define cmos_pnp_suspend NULL
887#define cmos_pnp_resume NULL
888#endif
889
890
891static const struct pnp_device_id rtc_ids[] = {
892 { .id = "PNP0b00", },
893 { .id = "PNP0b01", },
894 { .id = "PNP0b02", },
895 { },
896};
897MODULE_DEVICE_TABLE(pnp, rtc_ids);
898
899static struct pnp_driver cmos_pnp_driver = {
900 .name = (char *) driver_name,
901 .id_table = rtc_ids,
902 .probe = cmos_pnp_probe,
903 .remove = __exit_p(cmos_pnp_remove),
904
905 /* flag ensures resume() gets called, and stops syslog spam */
906 .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
907 .suspend = cmos_pnp_suspend,
908 .resume = cmos_pnp_resume,
909};
910
1da2e3d6 911#endif /* CONFIG_PNP */
7be2c7c9
DB
912
913/*----------------------------------------------------------------*/
914
41ac8df9 915/* Platform setup should have set up an RTC device, when PNP is
bcd9b89c 916 * unavailable ... this could happen even on (older) PCs.
7be2c7c9
DB
917 */
918
919static int __init cmos_platform_probe(struct platform_device *pdev)
920{
921 return cmos_do_probe(&pdev->dev,
922 platform_get_resource(pdev, IORESOURCE_IO, 0),
923 platform_get_irq(pdev, 0));
924}
925
926static int __exit cmos_platform_remove(struct platform_device *pdev)
927{
928 cmos_do_remove(&pdev->dev);
929 return 0;
930}
931
932static void cmos_platform_shutdown(struct platform_device *pdev)
933{
934 cmos_do_shutdown();
935}
936
ad28a07b
KS
937/* work with hotplug and coldplug */
938MODULE_ALIAS("platform:rtc_cmos");
939
7be2c7c9
DB
940static struct platform_driver cmos_platform_driver = {
941 .remove = __exit_p(cmos_platform_remove),
942 .shutdown = cmos_platform_shutdown,
943 .driver = {
944 .name = (char *) driver_name,
945 .suspend = cmos_suspend,
946 .resume = cmos_resume,
947 }
948};
949
950static int __init cmos_init(void)
951{
1da2e3d6
SS
952#ifdef CONFIG_PNP
953 if (pnp_platform_devices)
954 return pnp_register_driver(&cmos_pnp_driver);
955 else
956 return platform_driver_probe(&cmos_platform_driver,
957 cmos_platform_probe);
958#else
7be2c7c9
DB
959 return platform_driver_probe(&cmos_platform_driver,
960 cmos_platform_probe);
1da2e3d6 961#endif /* CONFIG_PNP */
7be2c7c9
DB
962}
963module_init(cmos_init);
964
965static void __exit cmos_exit(void)
966{
1da2e3d6
SS
967#ifdef CONFIG_PNP
968 if (pnp_platform_devices)
969 pnp_unregister_driver(&cmos_pnp_driver);
970 else
971 platform_driver_unregister(&cmos_platform_driver);
972#else
7be2c7c9 973 platform_driver_unregister(&cmos_platform_driver);
1da2e3d6 974#endif /* CONFIG_PNP */
7be2c7c9
DB
975}
976module_exit(cmos_exit);
977
978
7be2c7c9
DB
979MODULE_AUTHOR("David Brownell");
980MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
981MODULE_LICENSE("GPL");