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PM / PCMCIA: Drop second argument of pcmcia_socket_dev_suspend()
[net-next-2.6.git] / drivers / pcmcia / yenta_socket.c
CommitLineData
1da177e4
LT		 1/*
2 * Regular cardbus driver ("yenta_socket")
3 *
4 * (C) Copyright 1999, 2000 Linus Torvalds
5 *
6 * Changelog:
7 * Aug 2002: Manfred Spraul <manfred@colorfullife.com>
8 * Dynamically adjust the size of the bridge resource
9 *
10 * May 2003: Dominik Brodowski <linux@brodo.de>
11 * Merge pci_socket.c and yenta.c into one file
12 */
13#include <linux/init.h>
14#include <linux/pci.h>
1da177e4
LT		 15#include <linux/workqueue.h>
16#include <linux/interrupt.h>
17#include <linux/delay.h>
18#include <linux/module.h>
19
1da177e4
LT		 20#include <pcmcia/cs_types.h>
21#include <pcmcia/ss.h>
22#include <pcmcia/cs.h>
23
24#include <asm/io.h>
25
26#include "yenta_socket.h"
27#include "i82365.h"
28
29static int disable_clkrun;
30module_param(disable_clkrun, bool, 0444);
31MODULE_PARM_DESC(disable_clkrun, "If PC card doesn't function properly, please try this option");
32
fa912bcb
DR		 33static int isa_probe = 1;
34module_param(isa_probe, bool, 0444);
35MODULE_PARM_DESC(isa_probe, "If set ISA interrupts are probed (default). Set to N to disable probing");
36
37static int pwr_irqs_off;
38module_param(pwr_irqs_off, bool, 0644);
39MODULE_PARM_DESC(pwr_irqs_off, "Force IRQs off during power-on of slot. Use only when seeing IRQ storms!");
40
dd797d81 41#define debug(x, s, args...) dev_dbg(&s->dev->dev, x, ##args)
1da177e4
LT		 42
43/* Don't ask.. */
44#define to_cycles(ns) ((ns)/120)
45#define to_ns(cycles) ((cycles)*120)
46
78187865 47/*
63e7ebd0
DR		 48 * yenta PCI irq probing.
49 * currently only used in the TI/EnE initialization code
50 */
51#ifdef CONFIG_YENTA_TI
1da177e4 52static int yenta_probe_cb_irq(struct yenta_socket *socket);
63e7ebd0 53#endif
1da177e4
LT		 54
55
56static unsigned int override_bios;
57module_param(override_bios, uint, 0000);
58MODULE_PARM_DESC (override_bios, "yenta ignore bios resource allocation");
59
60/*
61 * Generate easy-to-use ways of reading a cardbus sockets
62 * regular memory space ("cb_xxx"), configuration space
63 * ("config_xxx") and compatibility space ("exca_xxxx")
64 */
65static inline u32 cb_readl(struct yenta_socket *socket, unsigned reg)
66{
67 u32 val = readl(socket->base + reg);
dd797d81 68 debug("%04x %08x\n", socket, reg, val);
1da177e4
LT		 69 return val;
70}
71
72static inline void cb_writel(struct yenta_socket *socket, unsigned reg, u32 val)
73{
dd797d81 74 debug("%04x %08x\n", socket, reg, val);
1da177e4 75 writel(val, socket->base + reg);
c8751e4c 76 readl(socket->base + reg); /* avoid problems with PCI write posting */
1da177e4
LT		 77}
78
79static inline u8 config_readb(struct yenta_socket *socket, unsigned offset)
80{
81 u8 val;
82 pci_read_config_byte(socket->dev, offset, &val);
dd797d81 83 debug("%04x %02x\n", socket, offset, val);
1da177e4
LT		 84 return val;
85}
86
87static inline u16 config_readw(struct yenta_socket *socket, unsigned offset)
88{
89 u16 val;
90 pci_read_config_word(socket->dev, offset, &val);
dd797d81 91 debug("%04x %04x\n", socket, offset, val);
1da177e4
LT		 92 return val;
93}
94
95static inline u32 config_readl(struct yenta_socket *socket, unsigned offset)
96{
97 u32 val;
98 pci_read_config_dword(socket->dev, offset, &val);
dd797d81 99 debug("%04x %08x\n", socket, offset, val);
1da177e4
LT		 100 return val;
101}
102
103static inline void config_writeb(struct yenta_socket *socket, unsigned offset, u8 val)
104{
dd797d81 105 debug("%04x %02x\n", socket, offset, val);
1da177e4
LT		 106 pci_write_config_byte(socket->dev, offset, val);
107}
108
109static inline void config_writew(struct yenta_socket *socket, unsigned offset, u16 val)
110{
dd797d81 111 debug("%04x %04x\n", socket, offset, val);
1da177e4
LT		 112 pci_write_config_word(socket->dev, offset, val);
113}
114
115static inline void config_writel(struct yenta_socket *socket, unsigned offset, u32 val)
116{
dd797d81 117 debug("%04x %08x\n", socket, offset, val);
1da177e4
LT		 118 pci_write_config_dword(socket->dev, offset, val);
119}
120
121static inline u8 exca_readb(struct yenta_socket *socket, unsigned reg)
122{
123 u8 val = readb(socket->base + 0x800 + reg);
dd797d81 124 debug("%04x %02x\n", socket, reg, val);
1da177e4
LT		 125 return val;
126}
127
128static inline u8 exca_readw(struct yenta_socket *socket, unsigned reg)
129{
130 u16 val;
131 val = readb(socket->base + 0x800 + reg);
132 val |= readb(socket->base + 0x800 + reg + 1) << 8;
dd797d81 133 debug("%04x %04x\n", socket, reg, val);
1da177e4
LT		 134 return val;
135}
136
137static inline void exca_writeb(struct yenta_socket *socket, unsigned reg, u8 val)
138{
dd797d81 139 debug("%04x %02x\n", socket, reg, val);
1da177e4 140 writeb(val, socket->base + 0x800 + reg);
c8751e4c 141 readb(socket->base + 0x800 + reg); /* PCI write posting... */
1da177e4
LT		 142}
143
144static void exca_writew(struct yenta_socket *socket, unsigned reg, u16 val)
145{
dd797d81 146 debug("%04x %04x\n", socket, reg, val);
1da177e4
LT		 147 writeb(val, socket->base + 0x800 + reg);
148 writeb(val >> 8, socket->base + 0x800 + reg + 1);
c8751e4c
DR		 149
150 /* PCI write posting... */
151 readb(socket->base + 0x800 + reg);
152 readb(socket->base + 0x800 + reg + 1);
1da177e4
LT		 153}
154
030ee39c
LT		 155static ssize_t show_yenta_registers(struct device *yentadev, struct device_attribute *attr, char *buf)
156{
157 struct pci_dev *dev = to_pci_dev(yentadev);
158 struct yenta_socket *socket = pci_get_drvdata(dev);
159 int offset = 0, i;
160
161 offset = snprintf(buf, PAGE_SIZE, "CB registers:");
162 for (i = 0; i < 0x24; i += 4) {
163 unsigned val;
164 if (!(i & 15))
165 offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n%02x:", i);
166 val = cb_readl(socket, i);
167 offset += snprintf(buf + offset, PAGE_SIZE - offset, " %08x", val);
168 }
169
170 offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n\nExCA registers:");
171 for (i = 0; i < 0x45; i++) {
172 unsigned char val;
173 if (!(i & 7)) {
174 if (i & 8) {
175 memcpy(buf + offset, " -", 2);
176 offset += 2;
177 } else
178 offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n%02x:", i);
179 }
180 val = exca_readb(socket, i);
181 offset += snprintf(buf + offset, PAGE_SIZE - offset, " %02x", val);
182 }
183 buf[offset++] = '\n';
184 return offset;
185}
186
187static DEVICE_ATTR(yenta_registers, S_IRUSR, show_yenta_registers, NULL);
188
1da177e4
LT		 189/*
190 * Ugh, mixed-mode cardbus and 16-bit pccard state: things depend
191 * on what kind of card is inserted..
192 */
193static int yenta_get_status(struct pcmcia_socket *sock, unsigned int *value)
194{
195 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
196 unsigned int val;
197 u32 state = cb_readl(socket, CB_SOCKET_STATE);
198
199 val = (state & CB_3VCARD) ? SS_3VCARD : 0;
200 val |= (state & CB_XVCARD) ? SS_XVCARD : 0;
fa912bcb
DR		 201 val |= (state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) ? 0 : SS_PENDING;
202 val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? SS_PENDING : 0;
203
1da177e4
LT		 204
205 if (state & CB_CBCARD) {
dd797d81 206 val |= SS_CARDBUS;
1da177e4
LT		 207 val |= (state & CB_CARDSTS) ? SS_STSCHG : 0;
208 val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? 0 : SS_DETECT;
209 val |= (state & CB_PWRCYCLE) ? SS_POWERON | SS_READY : 0;
fa912bcb 210 } else if (state & CB_16BITCARD) {
1da177e4
LT		 211 u8 status = exca_readb(socket, I365_STATUS);
212 val |= ((status & I365_CS_DETECT) == I365_CS_DETECT) ? SS_DETECT : 0;
213 if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) {
214 val |= (status & I365_CS_STSCHG) ? 0 : SS_STSCHG;
215 } else {
216 val |= (status & I365_CS_BVD1) ? 0 : SS_BATDEAD;
217 val |= (status & I365_CS_BVD2) ? 0 : SS_BATWARN;
218 }
219 val |= (status & I365_CS_WRPROT) ? SS_WRPROT : 0;
220 val |= (status & I365_CS_READY) ? SS_READY : 0;
221 val |= (status & I365_CS_POWERON) ? SS_POWERON : 0;
222 }
223
224 *value = val;
225 return 0;
226}
227
1da177e4
LT		 228static void yenta_set_power(struct yenta_socket *socket, socket_state_t *state)
229{
ea2f1590
DR		 230 /* some birdges require to use the ExCA registers to power 16bit cards */
231 if (!(cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) &&
232 (socket->flags & YENTA_16BIT_POWER_EXCA)) {
233 u8 reg, old;
234 reg = old = exca_readb(socket, I365_POWER);
235 reg &= ~(I365_VCC_MASK | I365_VPP1_MASK | I365_VPP2_MASK);
236
237 /* i82365SL-DF style */
238 if (socket->flags & YENTA_16BIT_POWER_DF) {
239 switch (state->Vcc) {
240 case 33: reg |= I365_VCC_3V; break;
241 case 50: reg |= I365_VCC_5V; break;
242 default: reg = 0; break;
243 }
244 switch (state->Vpp) {
245 case 33:
246 case 50: reg |= I365_VPP1_5V; break;
247 case 120: reg |= I365_VPP1_12V; break;
248 }
249 } else {
250 /* i82365SL-B style */
251 switch (state->Vcc) {
252 case 50: reg |= I365_VCC_5V; break;
253 default: reg = 0; break;
254 }
255 switch (state->Vpp) {
256 case 50: reg |= I365_VPP1_5V | I365_VPP2_5V; break;
257 case 120: reg |= I365_VPP1_12V | I365_VPP2_12V; break;
258 }
259 }
260
261 if (reg != old)
262 exca_writeb(socket, I365_POWER, reg);
263 } else {
264 u32 reg = 0; /* CB_SC_STPCLK? */
265 switch (state->Vcc) {
266 case 33: reg = CB_SC_VCC_3V; break;
267 case 50: reg = CB_SC_VCC_5V; break;
268 default: reg = 0; break;
269 }
270 switch (state->Vpp) {
271 case 33: reg |= CB_SC_VPP_3V; break;
272 case 50: reg |= CB_SC_VPP_5V; break;
273 case 120: reg |= CB_SC_VPP_12V; break;
274 }
275 if (reg != cb_readl(socket, CB_SOCKET_CONTROL))
276 cb_writel(socket, CB_SOCKET_CONTROL, reg);
1da177e4 277 }
1da177e4
LT		 278}
279
280static int yenta_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
281{
282 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
283 u16 bridge;
284
d250a481
DR		 285 /* if powering down: do it immediately */
286 if (state->Vcc == 0)
287 yenta_set_power(socket, state);
288
1da177e4
LT		 289 socket->io_irq = state->io_irq;
290 bridge = config_readw(socket, CB_BRIDGE_CONTROL) & ~(CB_BRIDGE_CRST | CB_BRIDGE_INTR);
291 if (cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) {
292 u8 intr;
293 bridge |= (state->flags & SS_RESET) ? CB_BRIDGE_CRST : 0;
294
295 /* ISA interrupt control? */
296 intr = exca_readb(socket, I365_INTCTL);
297 intr = (intr & ~0xf);
298 if (!socket->cb_irq) {
299 intr |= state->io_irq;
300 bridge |= CB_BRIDGE_INTR;
301 }
302 exca_writeb(socket, I365_INTCTL, intr);
303 } else {
304 u8 reg;
305
306 reg = exca_readb(socket, I365_INTCTL) & (I365_RING_ENA | I365_INTR_ENA);
307 reg |= (state->flags & SS_RESET) ? 0 : I365_PC_RESET;
308 reg |= (state->flags & SS_IOCARD) ? I365_PC_IOCARD : 0;
309 if (state->io_irq != socket->cb_irq) {
310 reg |= state->io_irq;
311 bridge |= CB_BRIDGE_INTR;
312 }
313 exca_writeb(socket, I365_INTCTL, reg);
314
315 reg = exca_readb(socket, I365_POWER) & (I365_VCC_MASK|I365_VPP1_MASK);
316 reg |= I365_PWR_NORESET;
317 if (state->flags & SS_PWR_AUTO) reg |= I365_PWR_AUTO;
318 if (state->flags & SS_OUTPUT_ENA) reg |= I365_PWR_OUT;
319 if (exca_readb(socket, I365_POWER) != reg)
320 exca_writeb(socket, I365_POWER, reg);
321
322 /* CSC interrupt: no ISA irq for CSC */
323 reg = I365_CSC_DETECT;
324 if (state->flags & SS_IOCARD) {
325 if (state->csc_mask & SS_STSCHG) reg |= I365_CSC_STSCHG;
326 } else {
327 if (state->csc_mask & SS_BATDEAD) reg |= I365_CSC_BVD1;
328 if (state->csc_mask & SS_BATWARN) reg |= I365_CSC_BVD2;
329 if (state->csc_mask & SS_READY) reg |= I365_CSC_READY;
330 }
331 exca_writeb(socket, I365_CSCINT, reg);
332 exca_readb(socket, I365_CSC);
333 if(sock->zoom_video)
334 sock->zoom_video(sock, state->flags & SS_ZVCARD);
335 }
336 config_writew(socket, CB_BRIDGE_CONTROL, bridge);
337 /* Socket event mask: get card insert/remove events.. */
338 cb_writel(socket, CB_SOCKET_EVENT, -1);
339 cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK);
d250a481
DR		 340
341 /* if powering up: do it as the last step when the socket is configured */
342 if (state->Vcc != 0)
343 yenta_set_power(socket, state);
1da177e4
LT		 344 return 0;
345}
346
347static int yenta_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io)
348{
349 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
350 int map;
351 unsigned char ioctl, addr, enable;
352
353 map = io->map;
354
355 if (map > 1)
356 return -EINVAL;
357
358 enable = I365_ENA_IO(map);
359 addr = exca_readb(socket, I365_ADDRWIN);
360
361 /* Disable the window before changing it.. */
362 if (addr & enable) {
363 addr &= ~enable;
364 exca_writeb(socket, I365_ADDRWIN, addr);
365 }
366
367 exca_writew(socket, I365_IO(map)+I365_W_START, io->start);
368 exca_writew(socket, I365_IO(map)+I365_W_STOP, io->stop);
369
370 ioctl = exca_readb(socket, I365_IOCTL) & ~I365_IOCTL_MASK(map);
371 if (io->flags & MAP_0WS) ioctl |= I365_IOCTL_0WS(map);
372 if (io->flags & MAP_16BIT) ioctl |= I365_IOCTL_16BIT(map);
373 if (io->flags & MAP_AUTOSZ) ioctl |= I365_IOCTL_IOCS16(map);
374 exca_writeb(socket, I365_IOCTL, ioctl);
375
376 if (io->flags & MAP_ACTIVE)
377 exca_writeb(socket, I365_ADDRWIN, addr | enable);
378 return 0;
379}
380
381static int yenta_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *mem)
382{
383 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
384 struct pci_bus_region region;
385 int map;
386 unsigned char addr, enable;
387 unsigned int start, stop, card_start;
388 unsigned short word;
389
390 pcibios_resource_to_bus(socket->dev, &region, mem->res);
391
392 map = mem->map;
393 start = region.start;
394 stop = region.end;
395 card_start = mem->card_start;
396
397 if (map > 4 || start > stop || ((start ^ stop) >> 24) ||
398 (card_start >> 26) || mem->speed > 1000)
399 return -EINVAL;
400
401 enable = I365_ENA_MEM(map);
402 addr = exca_readb(socket, I365_ADDRWIN);
403 if (addr & enable) {
404 addr &= ~enable;
405 exca_writeb(socket, I365_ADDRWIN, addr);
406 }
407
408 exca_writeb(socket, CB_MEM_PAGE(map), start >> 24);
409
410 word = (start >> 12) & 0x0fff;
411 if (mem->flags & MAP_16BIT)
412 word |= I365_MEM_16BIT;
413 if (mem->flags & MAP_0WS)
414 word |= I365_MEM_0WS;
415 exca_writew(socket, I365_MEM(map) + I365_W_START, word);
416
417 word = (stop >> 12) & 0x0fff;
418 switch (to_cycles(mem->speed)) {
419 case 0: break;
420 case 1: word |= I365_MEM_WS0; break;
421 case 2: word |= I365_MEM_WS1; break;
422 default: word |= I365_MEM_WS1 | I365_MEM_WS0; break;
423 }
424 exca_writew(socket, I365_MEM(map) + I365_W_STOP, word);
425
426 word = ((card_start - start) >> 12) & 0x3fff;
427 if (mem->flags & MAP_WRPROT)
428 word |= I365_MEM_WRPROT;
429 if (mem->flags & MAP_ATTRIB)
430 word |= I365_MEM_REG;
431 exca_writew(socket, I365_MEM(map) + I365_W_OFF, word);
432
433 if (mem->flags & MAP_ACTIVE)
434 exca_writeb(socket, I365_ADDRWIN, addr | enable);
435 return 0;
436}
437
438
fa912bcb 439
7d12e780 440static irqreturn_t yenta_interrupt(int irq, void *dev_id)
1da177e4 441{
fa912bcb
DR		 442 unsigned int events;
443 struct yenta_socket *socket = (struct yenta_socket *) dev_id;
1da177e4
LT		 444 u8 csc;
445 u32 cb_event;
1da177e4
LT		 446
447 /* Clear interrupt status for the event */
448 cb_event = cb_readl(socket, CB_SOCKET_EVENT);
449 cb_writel(socket, CB_SOCKET_EVENT, cb_event);
450
451 csc = exca_readb(socket, I365_CSC);
452
e4115805
DR		 453 if (!(cb_event || csc))
454 return IRQ_NONE;
455
1da177e4
LT		 456 events = (cb_event & (CB_CD1EVENT | CB_CD2EVENT)) ? SS_DETECT : 0 ;
457 events |= (csc & I365_CSC_DETECT) ? SS_DETECT : 0;
458 if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) {
459 events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0;
460 } else {
461 events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0;
462 events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0;
463 events |= (csc & I365_CSC_READY) ? SS_READY : 0;
464 }
1da177e4 465
fa912bcb 466 if (events)
1da177e4 467 pcmcia_parse_events(&socket->socket, events);
fa912bcb 468
e4115805 469 return IRQ_HANDLED;
1da177e4
LT		 470}
471
472static void yenta_interrupt_wrapper(unsigned long data)
473{
474 struct yenta_socket *socket = (struct yenta_socket *) data;
475
7d12e780 476 yenta_interrupt(0, (void *)socket);
1da177e4
LT		 477 socket->poll_timer.expires = jiffies + HZ;
478 add_timer(&socket->poll_timer);
479}
480
481static void yenta_clear_maps(struct yenta_socket *socket)
482{
483 int i;
484 struct resource res = { .start = 0, .end = 0x0fff };
485 pccard_io_map io = { 0, 0, 0, 0, 1 };
486 pccard_mem_map mem = { .res = &res, };
487
488 yenta_set_socket(&socket->socket, &dead_socket);
489 for (i = 0; i < 2; i++) {
490 io.map = i;
491 yenta_set_io_map(&socket->socket, &io);
492 }
493 for (i = 0; i < 5; i++) {
494 mem.map = i;
495 yenta_set_mem_map(&socket->socket, &mem);
496 }
497}
498
fa912bcb
DR		 499/* redoes voltage interrogation if required */
500static void yenta_interrogate(struct yenta_socket *socket)
501{
502 u32 state;
503
504 state = cb_readl(socket, CB_SOCKET_STATE);
505 if (!(state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) ||
506 (state & (CB_CDETECT1 | CB_CDETECT2 | CB_NOTACARD | CB_BADVCCREQ)) ||
507 ((state & (CB_16BITCARD | CB_CBCARD)) == (CB_16BITCARD | CB_CBCARD)))
508 cb_writel(socket, CB_SOCKET_FORCE, CB_CVSTEST);
509}
510
1da177e4
LT		 511/* Called at resume and initialization events */
512static int yenta_sock_init(struct pcmcia_socket *sock)
513{
514 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
1da177e4
LT		 515
516 exca_writeb(socket, I365_GBLCTL, 0x00);
517 exca_writeb(socket, I365_GENCTL, 0x00);
518
519 /* Redo card voltage interrogation */
fa912bcb 520 yenta_interrogate(socket);
1da177e4
LT		 521
522 yenta_clear_maps(socket);
523
524 if (socket->type && socket->type->sock_init)
525 socket->type->sock_init(socket);
526
527 /* Re-enable CSC interrupts */
528 cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK);
529
530 return 0;
531}
532
533static int yenta_sock_suspend(struct pcmcia_socket *sock)
534{
535 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
536
537 /* Disable CSC interrupts */
538 cb_writel(socket, CB_SOCKET_MASK, 0x0);
539
540 return 0;
541}
542
543/*
544 * Use an adaptive allocation for the memory resource,
545 * sometimes the memory behind pci bridges is limited:
546 * 1/8 of the size of the io window of the parent.
eb0a90b4
DB		 547 * max 4 MB, min 16 kB. We try very hard to not get below
548 * the "ACC" values, though.
1da177e4
LT		 549 */
550#define BRIDGE_MEM_MAX 4*1024*1024
eb0a90b4 551#define BRIDGE_MEM_ACC 128*1024
1da177e4
LT		 552#define BRIDGE_MEM_MIN 16*1024
553
eb0a90b4
DB		 554#define BRIDGE_IO_MAX 512
555#define BRIDGE_IO_ACC 256
1da177e4
LT		 556#define BRIDGE_IO_MIN 32
557
558#ifndef PCIBIOS_MIN_CARDBUS_IO
559#define PCIBIOS_MIN_CARDBUS_IO PCIBIOS_MIN_IO
560#endif
561
eb0a90b4
DB		 562static int yenta_search_one_res(struct resource *root, struct resource *res,
563 u32 min)
564{
565 u32 align, size, start, end;
566
567 if (res->flags & IORESOURCE_IO) {
568 align = 1024;
569 size = BRIDGE_IO_MAX;
570 start = PCIBIOS_MIN_CARDBUS_IO;
571 end = ~0U;
572 } else {
573 unsigned long avail = root->end - root->start;
574 int i;
575 size = BRIDGE_MEM_MAX;
576 if (size > avail/8) {
577 size=(avail+1)/8;
578 /* round size down to next power of 2 */
579 i = 0;
580 while ((size /= 2) != 0)
581 i++;
582 size = 1 << i;
583 }
584 if (size < min)
585 size = min;
586 align = size;
587 start = PCIBIOS_MIN_MEM;
588 end = ~0U;
589 }
590
591 do {
592 if (allocate_resource(root, res, size, start, end, align,
593 NULL, NULL)==0) {
594 return 1;
595 }
596 size = size/2;
597 align = size;
598 } while (size >= min);
599
600 return 0;
601}
602
603
604static int yenta_search_res(struct yenta_socket *socket, struct resource *res,
605 u32 min)
606{
607 int i;
608 for (i=0; i<PCI_BUS_NUM_RESOURCES; i++) {
609 struct resource * root = socket->dev->bus->resource[i];
610 if (!root)
611 continue;
612
613 if ((res->flags ^ root->flags) &
614 (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH))
615 continue; /* Wrong type */
616
617 if (yenta_search_one_res(root, res, min))
618 return 1;
619 }
620 return 0;
621}
622
b3743fa4 623static int yenta_allocate_res(struct yenta_socket *socket, int nr, unsigned type, int addr_start, int addr_end)
1da177e4 624{
852710d9
MW		 625 struct pci_dev *dev = socket->dev;
626 struct resource *res;
43c34735 627 struct pci_bus_region region;
1da177e4
LT		 628 unsigned mask;
629
852710d9 630 res = dev->resource + PCI_BRIDGE_RESOURCES + nr;
7925407a
IK		 631 /* Already allocated? */
632 if (res->parent)
b3743fa4 633 return 0;
7925407a 634
1da177e4
LT		 635 /* The granularity of the memory limit is 4kB, on IO it's 4 bytes */
636 mask = ~0xfff;
637 if (type & IORESOURCE_IO)
638 mask = ~3;
639
852710d9 640 res->name = dev->subordinate->name;
1da177e4 641 res->flags = type;
1da177e4 642
43c34735
DB		 643 region.start = config_readl(socket, addr_start) & mask;
644 region.end = config_readl(socket, addr_end) | ~mask;
645 if (region.start && region.end > region.start && !override_bios) {
852710d9
MW		 646 pcibios_bus_to_resource(dev, res, &region);
647 if (pci_claim_resource(dev, PCI_BRIDGE_RESOURCES + nr) == 0)
b3743fa4 648 return 0;
852710d9 649 dev_printk(KERN_INFO, &dev->dev,
dd797d81
DB		 650 "Preassigned resource %d busy or not available, "
651 "reconfiguring...\n",
652 nr);
1da177e4
LT		 653 }
654
655 if (type & IORESOURCE_IO) {
eb0a90b4
DB		 656 if ((yenta_search_res(socket, res, BRIDGE_IO_MAX)) ||
657 (yenta_search_res(socket, res, BRIDGE_IO_ACC)) ||
b3743fa4
DB		 658 (yenta_search_res(socket, res, BRIDGE_IO_MIN)))
659 return 1;
1da177e4 660 } else {
eb0a90b4
DB		 661 if (type & IORESOURCE_PREFETCH) {
662 if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) ||
663 (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) ||
b3743fa4
DB		 664 (yenta_search_res(socket, res, BRIDGE_MEM_MIN)))
665 return 1;
eb0a90b4
DB		 666 /* Approximating prefetchable by non-prefetchable */
667 res->flags = IORESOURCE_MEM;
1da177e4 668 }
eb0a90b4
DB		 669 if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) ||
670 (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) ||
b3743fa4
DB		 671 (yenta_search_res(socket, res, BRIDGE_MEM_MIN)))
672 return 1;
eb0a90b4
DB		 673 }
674
852710d9 675 dev_printk(KERN_INFO, &dev->dev,
dd797d81
DB		 676 "no resource of type %x available, trying to continue...\n",
677 type);
eb0a90b4 678 res->start = res->end = res->flags = 0;
b3743fa4 679 return 0;
1da177e4
LT		 680}
681
682/*
683 * Allocate the bridge mappings for the device..
684 */
685static void yenta_allocate_resources(struct yenta_socket *socket)
686{
b3743fa4
DB		 687 int program = 0;
688 program += yenta_allocate_res(socket, 0, IORESOURCE_IO,
27879835 689 PCI_CB_IO_BASE_0, PCI_CB_IO_LIMIT_0);
b3743fa4 690 program += yenta_allocate_res(socket, 1, IORESOURCE_IO,
27879835 691 PCI_CB_IO_BASE_1, PCI_CB_IO_LIMIT_1);
b3743fa4 692 program += yenta_allocate_res(socket, 2, IORESOURCE_MEM|IORESOURCE_PREFETCH,
27879835 693 PCI_CB_MEMORY_BASE_0, PCI_CB_MEMORY_LIMIT_0);
b3743fa4 694 program += yenta_allocate_res(socket, 3, IORESOURCE_MEM,
27879835 695 PCI_CB_MEMORY_BASE_1, PCI_CB_MEMORY_LIMIT_1);
b3743fa4
DB		 696 if (program)
697 pci_setup_cardbus(socket->dev->subordinate);
1da177e4
LT		 698}
699
700
701/*
702 * Free the bridge mappings for the device..
703 */
704static void yenta_free_resources(struct yenta_socket *socket)
705{
706 int i;
707 for (i=0;i<4;i++) {
708 struct resource *res;
709 res = socket->dev->resource + PCI_BRIDGE_RESOURCES + i;
710 if (res->start != 0 && res->end != 0)
711 release_resource(res);
b3743fa4 712 res->start = res->end = res->flags = 0;
1da177e4
LT		 713 }
714}
715
716
717/*
718 * Close it down - release our resources and go home..
719 */
734f3fa1 720static void __devexit yenta_close(struct pci_dev *dev)
1da177e4
LT		 721{
722 struct yenta_socket *sock = pci_get_drvdata(dev);
723
030ee39c
LT		 724 /* Remove the register attributes */
725 device_remove_file(&dev->dev, &dev_attr_yenta_registers);
726
1da177e4
LT		 727 /* we don't want a dying socket registered */
728 pcmcia_unregister_socket(&sock->socket);
729
730 /* Disable all events so we don't die in an IRQ storm */
731 cb_writel(sock, CB_SOCKET_MASK, 0x0);
732 exca_writeb(sock, I365_CSCINT, 0);
733
734 if (sock->cb_irq)
735 free_irq(sock->cb_irq, sock);
736 else
737 del_timer_sync(&sock->poll_timer);
738
739 if (sock->base)
740 iounmap(sock->base);
741 yenta_free_resources(sock);
742
743 pci_release_regions(dev);
744 pci_disable_device(dev);
745 pci_set_drvdata(dev, NULL);
746}
747
748
749static struct pccard_operations yenta_socket_operations = {
750 .init = yenta_sock_init,
751 .suspend = yenta_sock_suspend,
752 .get_status = yenta_get_status,
1da177e4
LT		 753 .set_socket = yenta_set_socket,
754 .set_io_map = yenta_set_io_map,
755 .set_mem_map = yenta_set_mem_map,
756};
757
758
63e7ebd0 759#ifdef CONFIG_YENTA_TI
1da177e4 760#include "ti113x.h"
63e7ebd0
DR		 761#endif
762#ifdef CONFIG_YENTA_RICOH
1da177e4 763#include "ricoh.h"
63e7ebd0
DR		 764#endif
765#ifdef CONFIG_YENTA_TOSHIBA
1da177e4 766#include "topic.h"
63e7ebd0
DR		 767#endif
768#ifdef CONFIG_YENTA_O2
1da177e4 769#include "o2micro.h"
63e7ebd0 770#endif
1da177e4
LT		 771
772enum {
773 CARDBUS_TYPE_DEFAULT = -1,
774 CARDBUS_TYPE_TI,
775 CARDBUS_TYPE_TI113X,
776 CARDBUS_TYPE_TI12XX,
777 CARDBUS_TYPE_TI1250,
778 CARDBUS_TYPE_RICOH,
ea2f1590 779 CARDBUS_TYPE_TOPIC95,
1da177e4
LT		 780 CARDBUS_TYPE_TOPIC97,
781 CARDBUS_TYPE_O2MICRO,
8c3520d4 782 CARDBUS_TYPE_ENE,
1da177e4
LT		 783};
784
785/*
786 * Different cardbus controllers have slightly different
787 * initialization sequences etc details. List them here..
788 */
789static struct cardbus_type cardbus_type[] = {
63e7ebd0 790#ifdef CONFIG_YENTA_TI
1da177e4
LT		 791 [CARDBUS_TYPE_TI] = {
792 .override = ti_override,
793 .save_state = ti_save_state,
794 .restore_state = ti_restore_state,
795 .sock_init = ti_init,
796 },
797 [CARDBUS_TYPE_TI113X] = {
798 .override = ti113x_override,
799 .save_state = ti_save_state,
800 .restore_state = ti_restore_state,
801 .sock_init = ti_init,
802 },
803 [CARDBUS_TYPE_TI12XX] = {
804 .override = ti12xx_override,
805 .save_state = ti_save_state,
806 .restore_state = ti_restore_state,
807 .sock_init = ti_init,
808 },
809 [CARDBUS_TYPE_TI1250] = {
810 .override = ti1250_override,
811 .save_state = ti_save_state,
812 .restore_state = ti_restore_state,
813 .sock_init = ti_init,
814 },
63e7ebd0
DR		 815#endif
816#ifdef CONFIG_YENTA_RICOH
1da177e4
LT		 817 [CARDBUS_TYPE_RICOH] = {
818 .override = ricoh_override,
819 .save_state = ricoh_save_state,
820 .restore_state = ricoh_restore_state,
821 },
63e7ebd0
DR		 822#endif
823#ifdef CONFIG_YENTA_TOSHIBA
ea2f1590
DR		 824 [CARDBUS_TYPE_TOPIC95] = {
825 .override = topic95_override,
826 },
1da177e4
LT		 827 [CARDBUS_TYPE_TOPIC97] = {
828 .override = topic97_override,
829 },
63e7ebd0
DR		 830#endif
831#ifdef CONFIG_YENTA_O2
1da177e4
LT		 832 [CARDBUS_TYPE_O2MICRO] = {
833 .override = o2micro_override,
834 .restore_state = o2micro_restore_state,
835 },
63e7ebd0
DR		 836#endif
837#ifdef CONFIG_YENTA_TI
8c3520d4
DR		 838 [CARDBUS_TYPE_ENE] = {
839 .override = ene_override,
840 .save_state = ti_save_state,
841 .restore_state = ti_restore_state,
842 .sock_init = ti_init,
843 },
63e7ebd0 844#endif
1da177e4
LT		 845};
846
847
848/*
849 * Only probe "regular" interrupts, don't
850 * touch dangerous spots like the mouse irq,
851 * because there are mice that apparently
852 * get really confused if they get fondled
853 * too intimately.
854 *
855 * Default to 11, 10, 9, 7, 6, 5, 4, 3.
856 */
857static u32 isa_interrupts = 0x0ef8;
858
859static unsigned int yenta_probe_irq(struct yenta_socket *socket, u32 isa_irq_mask)
860{
861 int i;
862 unsigned long val;
1da177e4
LT		 863 u32 mask;
864
1da177e4
LT		 865 /*
866 * Probe for usable interrupts using the force
867 * register to generate bogus card status events.
868 */
869 cb_writel(socket, CB_SOCKET_EVENT, -1);
870 cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
871 exca_writeb(socket, I365_CSCINT, 0);
872 val = probe_irq_on() & isa_irq_mask;
873 for (i = 1; i < 16; i++) {
874 if (!((val >> i) & 1))
875 continue;
876 exca_writeb(socket, I365_CSCINT, I365_CSC_STSCHG | (i << 4));
877 cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS);
878 udelay(100);
879 cb_writel(socket, CB_SOCKET_EVENT, -1);
880 }
881 cb_writel(socket, CB_SOCKET_MASK, 0);
882 exca_writeb(socket, I365_CSCINT, 0);
883
884 mask = probe_irq_mask(val) & 0xffff;
885
1da177e4
LT		 886 return mask;
887}
888
889
78187865 890/*
63e7ebd0
DR		 891 * yenta PCI irq probing.
892 * currently only used in the TI/EnE initialization code
893 */
894#ifdef CONFIG_YENTA_TI
895
1da177e4 896/* interrupt handler, only used during probing */
7d12e780 897static irqreturn_t yenta_probe_handler(int irq, void *dev_id)
1da177e4
LT		 898{
899 struct yenta_socket *socket = (struct yenta_socket *) dev_id;
900 u8 csc;
901 u32 cb_event;
902
903 /* Clear interrupt status for the event */
904 cb_event = cb_readl(socket, CB_SOCKET_EVENT);
905 cb_writel(socket, CB_SOCKET_EVENT, -1);
906 csc = exca_readb(socket, I365_CSC);
907
908 if (cb_event || csc) {
909 socket->probe_status = 1;
910 return IRQ_HANDLED;
911 }
912
913 return IRQ_NONE;
914}
915
916/* probes the PCI interrupt, use only on override functions */
917static int yenta_probe_cb_irq(struct yenta_socket *socket)
918{
1da177e4
LT		 919 if (!socket->cb_irq)
920 return -1;
921
922 socket->probe_status = 0;
923
dace1453 924 if (request_irq(socket->cb_irq, yenta_probe_handler, IRQF_SHARED, "yenta", socket)) {
dd797d81
DB		 925 dev_printk(KERN_WARNING, &socket->dev->dev,
926 "request_irq() in yenta_probe_cb_irq() failed!\n");
1da177e4
LT		 927 return -1;
928 }
929
930 /* generate interrupt, wait */
931 exca_writeb(socket, I365_CSCINT, I365_CSC_STSCHG);
932 cb_writel(socket, CB_SOCKET_EVENT, -1);
933 cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
934 cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS);
a413c090 935
1da177e4
LT		 936 msleep(100);
937
938 /* disable interrupts */
939 cb_writel(socket, CB_SOCKET_MASK, 0);
940 exca_writeb(socket, I365_CSCINT, 0);
941 cb_writel(socket, CB_SOCKET_EVENT, -1);
942 exca_readb(socket, I365_CSC);
943
944 free_irq(socket->cb_irq, socket);
945
946 return (int) socket->probe_status;
947}
948
63e7ebd0 949#endif /* CONFIG_YENTA_TI */
1da177e4
LT		 950
951
952/*
953 * Set static data that doesn't need re-initializing..
954 */
955static void yenta_get_socket_capabilities(struct yenta_socket *socket, u32 isa_irq_mask)
956{
1da177e4 957 socket->socket.pci_irq = socket->cb_irq;
fa912bcb
DR		 958 if (isa_probe)
959 socket->socket.irq_mask = yenta_probe_irq(socket, isa_irq_mask);
960 else
961 socket->socket.irq_mask = 0;
1da177e4 962
dd797d81
DB		 963 dev_printk(KERN_INFO, &socket->dev->dev,
964 "ISA IRQ mask 0x%04x, PCI irq %d\n",
965 socket->socket.irq_mask, socket->cb_irq);
1da177e4
LT		 966}
967
968/*
969 * Initialize the standard cardbus registers
970 */
971static void yenta_config_init(struct yenta_socket *socket)
972{
973 u16 bridge;
974 struct pci_dev *dev = socket->dev;
8e5d17eb 975 struct pci_bus_region region;
1da177e4 976
8e5d17eb 977 pcibios_resource_to_bus(socket->dev, &region, &dev->resource[0]);
1da177e4
LT		 978
979 config_writel(socket, CB_LEGACY_MODE_BASE, 0);
8e5d17eb 980 config_writel(socket, PCI_BASE_ADDRESS_0, region.start);
1da177e4
LT		 981 config_writew(socket, PCI_COMMAND,
982 PCI_COMMAND_IO |
983 PCI_COMMAND_MEMORY |
984 PCI_COMMAND_MASTER |
985 PCI_COMMAND_WAIT);
986
987 /* MAGIC NUMBERS! Fixme */
988 config_writeb(socket, PCI_CACHE_LINE_SIZE, L1_CACHE_BYTES / 4);
989 config_writeb(socket, PCI_LATENCY_TIMER, 168);
990 config_writel(socket, PCI_PRIMARY_BUS,
991 (176 << 24) | /* sec. latency timer */
992 (dev->subordinate->subordinate << 16) | /* subordinate bus */
993 (dev->subordinate->secondary << 8) | /* secondary bus */
994 dev->subordinate->primary); /* primary bus */
995
996 /*
997 * Set up the bridging state:
998 * - enable write posting.
999 * - memory window 0 prefetchable, window 1 non-prefetchable
1000 * - PCI interrupts enabled if a PCI interrupt exists..
1001 */
1002 bridge = config_readw(socket, CB_BRIDGE_CONTROL);
a413c090
DR		 1003 bridge &= ~(CB_BRIDGE_CRST | CB_BRIDGE_PREFETCH1 | CB_BRIDGE_ISAEN | CB_BRIDGE_VGAEN);
1004 bridge |= CB_BRIDGE_PREFETCH0 | CB_BRIDGE_POSTEN;
1da177e4
LT		 1005 config_writew(socket, CB_BRIDGE_CONTROL, bridge);
1006}
1007
b435261b 1008/**
66005216 1009 * yenta_fixup_parent_bridge - Fix subordinate bus# of the parent bridge
b435261b
BK		 1010 * @cardbus_bridge: The PCI bus which the CardBus bridge bridges to
1011 *
1012 * Checks if devices on the bus which the CardBus bridge bridges to would be
1013 * invisible during PCI scans because of a misconfigured subordinate number
1014 * of the parent brige - some BIOSes seem to be too lazy to set it right.
1015 * Does the fixup carefully by checking how far it can go without conflicts.
78187865 1016 * See http\://bugzilla.kernel.org/show_bug.cgi?id=2944 for more information.
b435261b
BK		 1017 */
1018static void yenta_fixup_parent_bridge(struct pci_bus *cardbus_bridge)
1019{
1020 struct list_head *tmp;
1021 unsigned char upper_limit;
1022 /*
1023 * We only check and fix the parent bridge: All systems which need
1024 * this fixup that have been reviewed are laptops and the only bridge
1025 * which needed fixing was the parent bridge of the CardBus bridge:
1026 */
1027 struct pci_bus *bridge_to_fix = cardbus_bridge->parent;
1028
1029 /* Check bus numbers are already set up correctly: */
1030 if (bridge_to_fix->subordinate >= cardbus_bridge->subordinate)
1031 return; /* The subordinate number is ok, nothing to do */
1032
1033 if (!bridge_to_fix->parent)
1034 return; /* Root bridges are ok */
1035
1036 /* stay within the limits of the bus range of the parent: */
1037 upper_limit = bridge_to_fix->parent->subordinate;
1038
1039 /* check the bus ranges of all silbling bridges to prevent overlap */
1040 list_for_each(tmp, &bridge_to_fix->parent->children) {
1041 struct pci_bus * silbling = pci_bus_b(tmp);
1042 /*
1043 * If the silbling has a higher secondary bus number
1044 * and it's secondary is equal or smaller than our
1045 * current upper limit, set the new upper limit to
1046 * the bus number below the silbling's range:
1047 */
1048 if (silbling->secondary > bridge_to_fix->subordinate
1049 && silbling->secondary <= upper_limit)
1050 upper_limit = silbling->secondary - 1;
1051 }
1052
1053 /* Show that the wanted subordinate number is not possible: */
1054 if (cardbus_bridge->subordinate > upper_limit)
dd797d81
DB		 1055 dev_printk(KERN_WARNING, &cardbus_bridge->dev,
1056 "Upper limit for fixing this "
1057 "bridge's parent bridge: #%02x\n", upper_limit);
b435261b
BK		 1058
1059 /* If we have room to increase the bridge's subordinate number, */
1060 if (bridge_to_fix->subordinate < upper_limit) {
1061
1062 /* use the highest number of the hidden bus, within limits */
1063 unsigned char subordinate_to_assign =
1064 min(cardbus_bridge->subordinate, upper_limit);
1065
dd797d81
DB		 1066 dev_printk(KERN_INFO, &bridge_to_fix->dev,
1067 "Raising subordinate bus# of parent "
1068 "bus (#%02x) from #%02x to #%02x\n",
1069 bridge_to_fix->number,
1070 bridge_to_fix->subordinate, subordinate_to_assign);
b435261b
BK		 1071
1072 /* Save the new subordinate in the bus struct of the bridge */
1073 bridge_to_fix->subordinate = subordinate_to_assign;
1074
1075 /* and update the PCI config space with the new subordinate */
1076 pci_write_config_byte(bridge_to_fix->self,
1077 PCI_SUBORDINATE_BUS, bridge_to_fix->subordinate);
1078 }
1079}
1080
1da177e4
LT		 1081/*
1082 * Initialize a cardbus controller. Make sure we have a usable
1083 * interrupt, and that we can map the cardbus area. Fill in the
1084 * socket information structure..
1085 */
1086static int __devinit yenta_probe (struct pci_dev *dev, const struct pci_device_id *id)
1087{
1088 struct yenta_socket *socket;
1089 int ret;
c7fb0b35
IK		 1090
1091 /*
1092 * If we failed to assign proper bus numbers for this cardbus
1093 * controller during PCI probe, its subordinate pci_bus is NULL.
1094 * Bail out if so.
1095 */
1096 if (!dev->subordinate) {
dd797d81
DB		 1097 dev_printk(KERN_ERR, &dev->dev, "no bus associated! "
1098 "(try 'pci=assign-busses')\n");
c7fb0b35
IK		 1099 return -ENODEV;
1100 }
1101
8084b372 1102 socket = kzalloc(sizeof(struct yenta_socket), GFP_KERNEL);
1da177e4
LT		 1103 if (!socket)
1104 return -ENOMEM;
1da177e4
LT		 1105
1106 /* prepare pcmcia_socket */
1107 socket->socket.ops = &yenta_socket_operations;
1108 socket->socket.resource_ops = &pccard_nonstatic_ops;
87373318 1109 socket->socket.dev.parent = &dev->dev;
1da177e4
LT		 1110 socket->socket.driver_data = socket;
1111 socket->socket.owner = THIS_MODULE;
5bc6b68a
RK		 1112 socket->socket.features = SS_CAP_PAGE_REGS | SS_CAP_PCCARD;
1113 socket->socket.map_size = 0x1000;
1114 socket->socket.cb_dev = dev;
1da177e4
LT		 1115
1116 /* prepare struct yenta_socket */
1117 socket->dev = dev;
1118 pci_set_drvdata(dev, socket);
1119
1120 /*
1121 * Do some basic sanity checking..
1122 */
1123 if (pci_enable_device(dev)) {
1124 ret = -EBUSY;
1125 goto free;
1126 }
1127
1128 ret = pci_request_regions(dev, "yenta_socket");
1129 if (ret)
1130 goto disable;
1131
1132 if (!pci_resource_start(dev, 0)) {
dd797d81 1133 dev_printk(KERN_ERR, &dev->dev, "No cardbus resource!\n");
1da177e4
LT		 1134 ret = -ENODEV;
1135 goto release;
1136 }
1137
1138 /*
1139 * Ok, start setup.. Map the cardbus registers,
1140 * and request the IRQ.
1141 */
1142 socket->base = ioremap(pci_resource_start(dev, 0), 0x1000);
1143 if (!socket->base) {
1144 ret = -ENOMEM;
1145 goto release;
1146 }
1147
1148 /*
1149 * report the subsystem vendor and device for help debugging
1150 * the irq stuff...
1151 */
dd797d81
DB		 1152 dev_printk(KERN_INFO, &dev->dev, "CardBus bridge found [%04x:%04x]\n",
1153 dev->subsystem_vendor, dev->subsystem_device);
1da177e4
LT		 1154
1155 yenta_config_init(socket);
1156
1157 /* Disable all events */
1158 cb_writel(socket, CB_SOCKET_MASK, 0x0);
1159
1160 /* Set up the bridge regions.. */
1161 yenta_allocate_resources(socket);
1162
1163 socket->cb_irq = dev->irq;
1164
1165 /* Do we have special options for the device? */
1166 if (id->driver_data != CARDBUS_TYPE_DEFAULT &&
1167 id->driver_data < ARRAY_SIZE(cardbus_type)) {
1168 socket->type = &cardbus_type[id->driver_data];
1169
1170 ret = socket->type->override(socket);
1171 if (ret < 0)
1172 goto unmap;
1173 }
1174
1175 /* We must finish initialization here */
1176
dace1453 1177 if (!socket->cb_irq || request_irq(socket->cb_irq, yenta_interrupt, IRQF_SHARED, "yenta", socket)) {
1da177e4
LT		 1178 /* No IRQ or request_irq failed. Poll */
1179 socket->cb_irq = 0; /* But zero is a valid IRQ number. */
1180 init_timer(&socket->poll_timer);
1181 socket->poll_timer.function = yenta_interrupt_wrapper;
1182 socket->poll_timer.data = (unsigned long)socket;
1183 socket->poll_timer.expires = jiffies + HZ;
1184 add_timer(&socket->poll_timer);
dd797d81
DB		 1185 dev_printk(KERN_INFO, &dev->dev,
1186 "no PCI IRQ, CardBus support disabled for this "
1187 "socket.\n");
1188 dev_printk(KERN_INFO, &dev->dev,
1189 "check your BIOS CardBus, BIOS IRQ or ACPI "
1190 "settings.\n");
5bc6b68a
RK		 1191 } else {
1192 socket->socket.features |= SS_CAP_CARDBUS;
1da177e4
LT		 1193 }
1194
1195 /* Figure out what the dang thing can do for the PCMCIA layer... */
fa912bcb 1196 yenta_interrogate(socket);
1da177e4 1197 yenta_get_socket_capabilities(socket, isa_interrupts);
dd797d81
DB		 1198 dev_printk(KERN_INFO, &dev->dev,
1199 "Socket status: %08x\n", cb_readl(socket, CB_SOCKET_STATE));
1da177e4 1200
b435261b
BK		 1201 yenta_fixup_parent_bridge(dev->subordinate);
1202
1da177e4
LT		 1203 /* Register it with the pcmcia layer.. */
1204 ret = pcmcia_register_socket(&socket->socket);
030ee39c
LT		 1205 if (ret == 0) {
1206 /* Add the yenta register attributes */
4deb7c1e
JG		 1207 ret = device_create_file(&dev->dev, &dev_attr_yenta_registers);
1208 if (ret == 0)
1209 goto out;
1210
1211 /* error path... */
1212 pcmcia_unregister_socket(&socket->socket);
030ee39c 1213 }
1da177e4
LT		 1214
1215 unmap:
1216 iounmap(socket->base);
1217 release:
1218 pci_release_regions(dev);
1219 disable:
1220 pci_disable_device(dev);
1221 free:
1222 kfree(socket);
1223 out:
1224 return ret;
1225}
1226
f237de58 1227#ifdef CONFIG_PM
1da177e4
LT		 1228static int yenta_dev_suspend (struct pci_dev *dev, pm_message_t state)
1229{
1230 struct yenta_socket *socket = pci_get_drvdata(dev);
1231 int ret;
1232
827b4649 1233 ret = pcmcia_socket_dev_suspend(&dev->dev);
1da177e4
LT		 1234
1235 if (socket) {
1236 if (socket->type && socket->type->save_state)
1237 socket->type->save_state(socket);
1238
1239 /* FIXME: pci_save_state needs to have a better interface */
1240 pci_save_state(dev);
1241 pci_read_config_dword(dev, 16*4, &socket->saved_state[0]);
1242 pci_read_config_dword(dev, 17*4, &socket->saved_state[1]);
d58da590 1243 pci_disable_device(dev);
1da177e4
LT		 1244
1245 /*
1246 * Some laptops (IBM T22) do not like us putting the Cardbus
1247 * bridge into D3. At a guess, some other laptop will
1248 * probably require this, so leave it commented out for now.
1249 */
1250 /* pci_set_power_state(dev, 3); */
1251 }
1252
1253 return ret;
1254}
1255
1256
1257static int yenta_dev_resume (struct pci_dev *dev)
1258{
1259 struct yenta_socket *socket = pci_get_drvdata(dev);
1260
1261 if (socket) {
4deb7c1e
JG		 1262 int rc;
1263
1da177e4
LT		 1264 pci_set_power_state(dev, 0);
1265 /* FIXME: pci_restore_state needs to have a better interface */
1266 pci_restore_state(dev);
1267 pci_write_config_dword(dev, 16*4, socket->saved_state[0]);
1268 pci_write_config_dword(dev, 17*4, socket->saved_state[1]);
4deb7c1e
JG		 1269
1270 rc = pci_enable_device(dev);
1271 if (rc)
1272 return rc;
1273
d58da590 1274 pci_set_master(dev);
1da177e4
LT		 1275
1276 if (socket->type && socket->type->restore_state)
1277 socket->type->restore_state(socket);
1278 }
1279
1280 return pcmcia_socket_dev_resume(&dev->dev);
1281}
f237de58 1282#endif
1da177e4
LT		 1283
1284#define CB_ID(vend,dev,type) \
1285 { \
1286 .vendor = vend, \
1287 .device = dev, \
1288 .subvendor = PCI_ANY_ID, \
1289 .subdevice = PCI_ANY_ID, \
1290 .class = PCI_CLASS_BRIDGE_CARDBUS << 8, \
1291 .class_mask = ~0, \
1292 .driver_data = CARDBUS_TYPE_##type, \
1293 }
1294
1295static struct pci_device_id yenta_table [] = {
1296 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1031, TI),
1297
1298 /*
1299 * TBD: Check if these TI variants can use more
1300 * advanced overrides instead. (I can't get the
1301 * data sheets for these devices. --rmk)
1302 */
63e7ebd0 1303#ifdef CONFIG_YENTA_TI
1da177e4
LT		 1304 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1210, TI),
1305
1306 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1130, TI113X),
1307 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1131, TI113X),
1308
1309 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1211, TI12XX),
1310 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1220, TI12XX),
1311 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1221, TI12XX),
1312 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1225, TI12XX),
1313 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251A, TI12XX),
1314 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251B, TI12XX),
1315 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1420, TI12XX),
1316 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1450, TI12XX),
1317 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1451A, TI12XX),
1318 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1510, TI12XX),
1319 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520, TI12XX),
1320 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1620, TI12XX),
1321 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4410, TI12XX),
1322 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4450, TI12XX),
1323 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4451, TI12XX),
1324 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4510, TI12XX),
1325 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4520, TI12XX),
1326
1327 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1250, TI1250),
1328 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1410, TI1250),
1329
6c1a10db
DR		 1330 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XX21_XX11, TI12XX),
1331 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X515, TI12XX),
59e35ba1 1332 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XX12, TI12XX),
6c1a10db
DR		 1333 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X420, TI12XX),
1334 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X620, TI12XX),
1335 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7410, TI12XX),
1336 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7510, TI12XX),
1337 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7610, TI12XX),
1338
f9cb8b71
DR		 1339 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_710, TI12XX),
1340 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_712, TI12XX),
1341 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_720, TI12XX),
1342 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_722, TI12XX),
8c3520d4
DR		 1343 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1211, ENE),
1344 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1225, ENE),
1345 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1410, ENE),
1346 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1420, ENE),
63e7ebd0 1347#endif /* CONFIG_YENTA_TI */
1da177e4 1348
63e7ebd0 1349#ifdef CONFIG_YENTA_RICOH
1da177e4
LT		 1350 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C465, RICOH),
1351 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C466, RICOH),
1352 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C475, RICOH),
1353 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, RICOH),
1354 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C478, RICOH),
63e7ebd0 1355#endif
1da177e4 1356
63e7ebd0 1357#ifdef CONFIG_YENTA_TOSHIBA
ea2f1590 1358 CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC95, TOPIC95),
1da177e4
LT		 1359 CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC97, TOPIC97),
1360 CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC100, TOPIC97),
63e7ebd0 1361#endif
1da177e4 1362
63e7ebd0 1363#ifdef CONFIG_YENTA_O2
1da177e4 1364 CB_ID(PCI_VENDOR_ID_O2, PCI_ANY_ID, O2MICRO),
63e7ebd0 1365#endif
1da177e4
LT		 1366
1367 /* match any cardbus bridge */
1368 CB_ID(PCI_ANY_ID, PCI_ANY_ID, DEFAULT),
1369 { /* all zeroes */ }
1370};
1371MODULE_DEVICE_TABLE(pci, yenta_table);
1372
1373
1374static struct pci_driver yenta_cardbus_driver = {
1375 .name = "yenta_cardbus",
1376 .id_table = yenta_table,
1377 .probe = yenta_probe,
1378 .remove = __devexit_p(yenta_close),
f237de58 1379#ifdef CONFIG_PM
1da177e4
LT		 1380 .suspend = yenta_dev_suspend,
1381 .resume = yenta_dev_resume,
f237de58 1382#endif
1da177e4
LT		 1383};
1384
1385
1386static int __init yenta_socket_init(void)
1387{
1388 return pci_register_driver (&yenta_cardbus_driver);
1389}
1390
1391
1392static void __exit yenta_socket_exit (void)
1393{
1394 pci_unregister_driver (&yenta_cardbus_driver);
1395}
1396
1397
1398module_init(yenta_socket_init);
1399module_exit(yenta_socket_exit);
1400
1401MODULE_LICENSE("GPL");
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