[net-next-2.6.git] / drivers / pci / access.c

#include <linux/pci.h>
#include <linux/module.h>
#include <linux/sched.h>
#include <linux/ioport.h>
#include <linux/wait.h>

#include "pci.h"

/*
 * This interrupt-safe spinlock protects all accesses to PCI
 * configuration space.
 */

static DEFINE_SPINLOCK(pci_lock);

/*
 *  Wrappers for all PCI configuration access functions.  They just check
 *  alignment, do locking and call the low-level functions pointed to
 *  by pci_dev->ops.
 */

#define PCI_byte_BAD 0
#define PCI_word_BAD (pos & 1)
#define PCI_dword_BAD (pos & 3)

#define PCI_OP_READ(size,type,len) \
int pci_bus_read_config_##size \
	(struct pci_bus *bus, unsigned int devfn, int pos, type *value)	\
{									\
	int res;							\
	unsigned long flags;						\
	u32 data = 0;							\
	if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER;	\
	spin_lock_irqsave(&pci_lock, flags);				\
	res = bus->ops->read(bus, devfn, pos, len, &data);		\
	*value = (type)data;						\
	spin_unlock_irqrestore(&pci_lock, flags);			\
	return res;							\
}

#define PCI_OP_WRITE(size,type,len) \
int pci_bus_write_config_##size \
	(struct pci_bus *bus, unsigned int devfn, int pos, type value)	\
{									\
	int res;							\
	unsigned long flags;						\
	if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER;	\
	spin_lock_irqsave(&pci_lock, flags);				\
	res = bus->ops->write(bus, devfn, pos, len, value);		\
	spin_unlock_irqrestore(&pci_lock, flags);			\
	return res;							\
}

PCI_OP_READ(byte, u8, 1)
PCI_OP_READ(word, u16, 2)
PCI_OP_READ(dword, u32, 4)
PCI_OP_WRITE(byte, u8, 1)
PCI_OP_WRITE(word, u16, 2)
PCI_OP_WRITE(dword, u32, 4)

EXPORT_SYMBOL(pci_bus_read_config_byte);
EXPORT_SYMBOL(pci_bus_read_config_word);
EXPORT_SYMBOL(pci_bus_read_config_dword);
EXPORT_SYMBOL(pci_bus_write_config_byte);
EXPORT_SYMBOL(pci_bus_write_config_word);
EXPORT_SYMBOL(pci_bus_write_config_dword);

/*
 * The following routines are to prevent the user from accessing PCI config
 * space when it's unsafe to do so.  Some devices require this during BIST and
 * we're required to prevent it during D-state transitions.
 *
 * We have a bit per device to indicate it's blocked and a global wait queue
 * for callers to sleep on until devices are unblocked.
 */
static DECLARE_WAIT_QUEUE_HEAD(pci_ucfg_wait);

static noinline void pci_wait_ucfg(struct pci_dev *dev)
{
	DECLARE_WAITQUEUE(wait, current);

	__add_wait_queue(&pci_ucfg_wait, &wait);
	do {
		set_current_state(TASK_UNINTERRUPTIBLE);
		spin_unlock_irq(&pci_lock);
		schedule();
		spin_lock_irq(&pci_lock);
	} while (dev->block_ucfg_access);
	__remove_wait_queue(&pci_ucfg_wait, &wait);
}

#define PCI_USER_READ_CONFIG(size,type)					\
int pci_user_read_config_##size						\
	(struct pci_dev *dev, int pos, type *val)			\
{									\
	int ret = 0;							\
	u32 data = -1;							\
	if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER;	\
	spin_lock_irq(&pci_lock);					\
	if (unlikely(dev->block_ucfg_access)) pci_wait_ucfg(dev);	\
	ret = dev->bus->ops->read(dev->bus, dev->devfn,			\
					pos, sizeof(type), &data);	\
	spin_unlock_irq(&pci_lock);					\
	*val = (type)data;						\
	return ret;							\
}

#define PCI_USER_WRITE_CONFIG(size,type)				\
int pci_user_write_config_##size					\
	(struct pci_dev *dev, int pos, type val)			\
{									\
	int ret = -EIO;							\
	if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER;	\
	spin_lock_irq(&pci_lock);					\
	if (unlikely(dev->block_ucfg_access)) pci_wait_ucfg(dev);	\
	ret = dev->bus->ops->write(dev->bus, dev->devfn,		\
					pos, sizeof(type), val);	\
	spin_unlock_irq(&pci_lock);					\
	return ret;							\
}

PCI_USER_READ_CONFIG(byte, u8)
PCI_USER_READ_CONFIG(word, u16)
PCI_USER_READ_CONFIG(dword, u32)
PCI_USER_WRITE_CONFIG(byte, u8)
PCI_USER_WRITE_CONFIG(word, u16)
PCI_USER_WRITE_CONFIG(dword, u32)

/**
 * pci_block_user_cfg_access - Block userspace PCI config reads/writes
 * @dev:	pci device struct
 *
 * When user access is blocked, any reads or writes to config space will
 * sleep until access is unblocked again.  We don't allow nesting of
 * block/unblock calls.
 */
void pci_block_user_cfg_access(struct pci_dev *dev)
{
	unsigned long flags;
	int was_blocked;

	spin_lock_irqsave(&pci_lock, flags);
	was_blocked = dev->block_ucfg_access;
	dev->block_ucfg_access = 1;
	spin_unlock_irqrestore(&pci_lock, flags);

	/* If we BUG() inside the pci_lock, we're guaranteed to hose
	 * the machine */
	BUG_ON(was_blocked);
}
EXPORT_SYMBOL_GPL(pci_block_user_cfg_access);

/**
 * pci_unblock_user_cfg_access - Unblock userspace PCI config reads/writes
 * @dev:	pci device struct
 *
 * This function allows userspace PCI config accesses to resume.
 */
void pci_unblock_user_cfg_access(struct pci_dev *dev)
{
	unsigned long flags;

	spin_lock_irqsave(&pci_lock, flags);

	/* This indicates a problem in the caller, but we don't need
	 * to kill them, unlike a double-block above. */
	WARN_ON(!dev->block_ucfg_access);

	dev->block_ucfg_access = 0;
	wake_up_all(&pci_ucfg_wait);
	spin_unlock_irqrestore(&pci_lock, flags);
}
EXPORT_SYMBOL_GPL(pci_unblock_user_cfg_access);
Commit	Line	Data
1da177e4 LT	1	#include <linux/pci.h>
1da177e4 LT	2	#include <linux/module.h>
f6a57033	3	#include <linux/sched.h>
1da177e4	4	#include <linux/ioport.h>
7ea7e98f	5	#include <linux/wait.h>
1da177e4	6
48b19148 AB	7	#include "pci.h"
48b19148 AB	8
1da177e4 LT	9	/*
	10	* This interrupt-safe spinlock protects all accesses to PCI
	11	* configuration space.
	12	*/
	13
	14	static DEFINE_SPINLOCK(pci_lock);
	15
	16	/*
	17	* Wrappers for all PCI configuration access functions. They just check
	18	* alignment, do locking and call the low-level functions pointed to
	19	* by pci_dev->ops.
	20	*/
	21
	22	#define PCI_byte_BAD 0
	23	#define PCI_word_BAD (pos & 1)
	24	#define PCI_dword_BAD (pos & 3)
	25
	26	#define PCI_OP_READ(size,type,len) \
	27	int pci_bus_read_config_##size \
	28	(struct pci_bus bus, unsigned int devfn, int pos, type value) \
	29	{ \
	30	int res; \
	31	unsigned long flags; \
	32	u32 data = 0; \
	33	if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \
	34	spin_lock_irqsave(&pci_lock, flags); \
	35	res = bus->ops->read(bus, devfn, pos, len, &data); \
	36	*value = (type)data; \
	37	spin_unlock_irqrestore(&pci_lock, flags); \
	38	return res; \
	39	}
	40
	41	#define PCI_OP_WRITE(size,type,len) \
	42	int pci_bus_write_config_##size \
	43	(struct pci_bus *bus, unsigned int devfn, int pos, type value) \
	44	{ \
	45	int res; \
	46	unsigned long flags; \
	47	if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \
	48	spin_lock_irqsave(&pci_lock, flags); \
	49	res = bus->ops->write(bus, devfn, pos, len, value); \
	50	spin_unlock_irqrestore(&pci_lock, flags); \
	51	return res; \
	52	}
	53
	54	PCI_OP_READ(byte, u8, 1)
	55	PCI_OP_READ(word, u16, 2)
	56	PCI_OP_READ(dword, u32, 4)
	57	PCI_OP_WRITE(byte, u8, 1)
	58	PCI_OP_WRITE(word, u16, 2)
	59	PCI_OP_WRITE(dword, u32, 4)
	60
	61	EXPORT_SYMBOL(pci_bus_read_config_byte);
	62	EXPORT_SYMBOL(pci_bus_read_config_word);
	63	EXPORT_SYMBOL(pci_bus_read_config_dword);
	64	EXPORT_SYMBOL(pci_bus_write_config_byte);
	65	EXPORT_SYMBOL(pci_bus_write_config_word);
	66	EXPORT_SYMBOL(pci_bus_write_config_dword);
e04b0ea2	67
7ea7e98f MW	68	/*
	69	* The following routines are to prevent the user from accessing PCI config
	70	* space when it's unsafe to do so. Some devices require this during BIST and
	71	* we're required to prevent it during D-state transitions.
	72	*
	73	* We have a bit per device to indicate it's blocked and a global wait queue
	74	* for callers to sleep on until devices are unblocked.
	75	*/
	76	static DECLARE_WAIT_QUEUE_HEAD(pci_ucfg_wait);
e04b0ea2	77
7ea7e98f MW	78	static noinline void pci_wait_ucfg(struct pci_dev *dev)
	79	{
	80	DECLARE_WAITQUEUE(wait, current);
	81
	82	__add_wait_queue(&pci_ucfg_wait, &wait);
	83	do {
	84	set_current_state(TASK_UNINTERRUPTIBLE);
	85	spin_unlock_irq(&pci_lock);
	86	schedule();
	87	spin_lock_irq(&pci_lock);
	88	} while (dev->block_ucfg_access);
	89	__remove_wait_queue(&pci_ucfg_wait, &wait);
e04b0ea2 BK	90	}
	91
	92	#define PCI_USER_READ_CONFIG(size,type) \
	93	int pci_user_read_config_##size \
	94	(struct pci_dev dev, int pos, type val) \
	95	{ \
e04b0ea2 BK	96	int ret = 0; \
	97	u32 data = -1; \
	98	if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \
7ea7e98f MW	99	spin_lock_irq(&pci_lock); \
	100	if (unlikely(dev->block_ucfg_access)) pci_wait_ucfg(dev); \
	101	ret = dev->bus->ops->read(dev->bus, dev->devfn, \
e04b0ea2	102	pos, sizeof(type), &data); \
7ea7e98f	103	spin_unlock_irq(&pci_lock); \
e04b0ea2 BK	104	*val = (type)data; \
	105	return ret; \
	106	}
	107
	108	#define PCI_USER_WRITE_CONFIG(size,type) \
	109	int pci_user_write_config_##size \
	110	(struct pci_dev *dev, int pos, type val) \
	111	{ \
e04b0ea2 BK	112	int ret = -EIO; \
e04b0ea2 BK	113	if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \
7ea7e98f MW	114	spin_lock_irq(&pci_lock); \
	115	if (unlikely(dev->block_ucfg_access)) pci_wait_ucfg(dev); \
	116	ret = dev->bus->ops->write(dev->bus, dev->devfn, \
e04b0ea2	117	pos, sizeof(type), val); \
7ea7e98f	118	spin_unlock_irq(&pci_lock); \
e04b0ea2 BK	119	return ret; \
	120	}
	121
	122	PCI_USER_READ_CONFIG(byte, u8)
	123	PCI_USER_READ_CONFIG(word, u16)
	124	PCI_USER_READ_CONFIG(dword, u32)
	125	PCI_USER_WRITE_CONFIG(byte, u8)
	126	PCI_USER_WRITE_CONFIG(word, u16)
	127	PCI_USER_WRITE_CONFIG(dword, u32)
	128
	129	/**
	130	* pci_block_user_cfg_access - Block userspace PCI config reads/writes
	131	* @dev: pci device struct
	132	*
7ea7e98f MW	133	* When user access is blocked, any reads or writes to config space will
	134	* sleep until access is unblocked again. We don't allow nesting of
	135	* block/unblock calls.
	136	*/
e04b0ea2 BK	137	void pci_block_user_cfg_access(struct pci_dev *dev)
	138	{
	139	unsigned long flags;
7ea7e98f	140	int was_blocked;
e04b0ea2	141
e04b0ea2	142	spin_lock_irqsave(&pci_lock, flags);
7ea7e98f	143	was_blocked = dev->block_ucfg_access;
e04b0ea2 BK	144	dev->block_ucfg_access = 1;
e04b0ea2 BK	145	spin_unlock_irqrestore(&pci_lock, flags);
7ea7e98f MW	146
	147	/* If we BUG() inside the pci_lock, we're guaranteed to hose
	148	* the machine */
	149	BUG_ON(was_blocked);
e04b0ea2 BK	150	}
	151	EXPORT_SYMBOL_GPL(pci_block_user_cfg_access);
	152
	153	/**
	154	* pci_unblock_user_cfg_access - Unblock userspace PCI config reads/writes
	155	* @dev: pci device struct
	156	*
	157	* This function allows userspace PCI config accesses to resume.
7ea7e98f	158	*/
e04b0ea2 BK	159	void pci_unblock_user_cfg_access(struct pci_dev *dev)
	160	{
	161	unsigned long flags;
	162
e04b0ea2	163	spin_lock_irqsave(&pci_lock, flags);
7ea7e98f MW	164
	165	/* This indicates a problem in the caller, but we don't need
	166	* to kill them, unlike a double-block above. */
	167	WARN_ON(!dev->block_ucfg_access);
	168
e04b0ea2	169	dev->block_ucfg_access = 0;
7ea7e98f	170	wake_up_all(&pci_ucfg_wait);
e04b0ea2 BK	171	spin_unlock_irqrestore(&pci_lock, flags);
	172	}
	173	EXPORT_SYMBOL_GPL(pci_unblock_user_cfg_access);