[net-next-2.6.git] / drivers / net / wireless / rtl818x / rtl8187.h

/*
 * Definitions for RTL8187 hardware
 *
 * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
 * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
 *
 * Based on the r8187 driver, which is:
 * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#ifndef RTL8187_H
#define RTL8187_H

#include "rtl818x.h"

#define RTL8187_EEPROM_TXPWR_BASE	0x05
#define RTL8187_EEPROM_MAC_ADDR		0x07
#define RTL8187_EEPROM_TXPWR_CHAN_1	0x16	/* 3 channels */
#define RTL8187_EEPROM_TXPWR_CHAN_6	0x1B	/* 2 channels */
#define RTL8187_EEPROM_TXPWR_CHAN_4	0x3D	/* 2 channels */

#define RTL8187_REQT_READ	0xC0
#define RTL8187_REQT_WRITE	0x40
#define RTL8187_REQ_GET_REG	0x05
#define RTL8187_REQ_SET_REG	0x05

#define RTL8187_MAX_RX		0x9C4

struct rtl8187_rx_info {
	struct urb *urb;
	struct ieee80211_hw *dev;
};

struct rtl8187_rx_hdr {
	__le32 flags;
	u8 noise;
	u8 signal;
	u8 agc;
	u8 reserved;
	__le64 mac_time;
} __attribute__((packed));

struct rtl8187b_rx_hdr {
	__le32 flags;
	__le64 mac_time;
	u8 sq;
	u8 rssi;
	u8 agc;
	u8 flags2;
	__le16 snr_long2end;
	s8 pwdb_g12;
	u8 fot;
} __attribute__((packed));

/* {rtl8187,rtl8187b}_tx_info is in skb */

struct rtl8187_tx_hdr {
	__le32 flags;
	__le16 rts_duration;
	__le16 len;
	__le32 retry;
} __attribute__((packed));

struct rtl8187b_tx_hdr {
	__le32 flags;
	__le16 rts_duration;
	__le16 len;
	__le32 unused_1;
	__le16 unused_2;
	__le16 tx_duration;
	__le32 unused_3;
	__le32 retry;
	__le32 unused_4[2];
} __attribute__((packed));

enum {
	DEVICE_RTL8187,
	DEVICE_RTL8187B
};

struct rtl8187_priv {
	/* common between rtl818x drivers */
	struct rtl818x_csr *map;
	const struct rtl818x_rf_ops *rf;
	struct ieee80211_vif *vif;
	int mode;
	/* The mutex protects the TX loopback state.
	 * Any attempt to set channels concurrently locks the device.
	 */
	struct mutex conf_mutex;

	/* rtl8187 specific */
	struct ieee80211_channel channels[14];
	struct ieee80211_rate rates[12];
	struct ieee80211_supported_band band;
	struct usb_device *udev;
	u32 rx_conf;
	struct usb_anchor anchored;
	struct delayed_work work;
	struct ieee80211_hw *dev;
	u16 txpwr_base;
	u8 asic_rev;
	u8 is_rtl8187b;
	enum {
		RTL8187BvB,
		RTL8187BvD,
		RTL8187BvE
	} hw_rev;
	struct sk_buff_head rx_queue;
	u8 signal;
	u8 quality;
	u8 noise;
	u8 slot_time;
	u8 aifsn[4];
	struct {
		__le64 buf;
		struct sk_buff_head queue;
	} b_tx_status; /* This queue is used by both -b and non-b devices */
};

void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data);

static inline u8 rtl818x_ioread8_idx(struct rtl8187_priv *priv,
				     u8 *addr, u8 idx)
{
	u8 val;

	usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
			RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
			(unsigned long)addr, idx & 0x03, &val,
			sizeof(val), HZ / 2);

	return val;
}

static inline u8 rtl818x_ioread8(struct rtl8187_priv *priv, u8 *addr)
{
	return rtl818x_ioread8_idx(priv, addr, 0);
}

static inline u16 rtl818x_ioread16_idx(struct rtl8187_priv *priv,
				       __le16 *addr, u8 idx)
{
	__le16 val;

	usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
			RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
			(unsigned long)addr, idx & 0x03, &val,
			sizeof(val), HZ / 2);

	return le16_to_cpu(val);
}

static inline u16 rtl818x_ioread16(struct rtl8187_priv *priv, __le16 *addr)
{
	return rtl818x_ioread16_idx(priv, addr, 0);
}

static inline u32 rtl818x_ioread32_idx(struct rtl8187_priv *priv,
				       __le32 *addr, u8 idx)
{
	__le32 val;

	usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
			RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
			(unsigned long)addr, idx & 0x03, &val,
			sizeof(val), HZ / 2);

	return le32_to_cpu(val);
}

static inline u32 rtl818x_ioread32(struct rtl8187_priv *priv, __le32 *addr)
{
	return rtl818x_ioread32_idx(priv, addr, 0);
}

static inline void rtl818x_iowrite8_idx(struct rtl8187_priv *priv,
					u8 *addr, u8 val, u8 idx)
{
	usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
			RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
			(unsigned long)addr, idx & 0x03, &val,
			sizeof(val), HZ / 2);
}

static inline void rtl818x_iowrite8(struct rtl8187_priv *priv, u8 *addr, u8 val)
{
	rtl818x_iowrite8_idx(priv, addr, val, 0);
}

static inline void rtl818x_iowrite16_idx(struct rtl8187_priv *priv,
					 __le16 *addr, u16 val, u8 idx)
{
	__le16 buf = cpu_to_le16(val);

	usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
			RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
			(unsigned long)addr, idx & 0x03, &buf, sizeof(buf),
			HZ / 2);
}

static inline void rtl818x_iowrite16(struct rtl8187_priv *priv, __le16 *addr,
				     u16 val)
{
	rtl818x_iowrite16_idx(priv, addr, val, 0);
}

static inline void rtl818x_iowrite32_idx(struct rtl8187_priv *priv,
					 __le32 *addr, u32 val, u8 idx)
{
	__le32 buf = cpu_to_le32(val);

	usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
			RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
			(unsigned long)addr, idx & 0x03, &buf, sizeof(buf),
			HZ / 2);
}

static inline void rtl818x_iowrite32(struct rtl8187_priv *priv, __le32 *addr,
				     u32 val)
{
	rtl818x_iowrite32_idx(priv, addr, val, 0);
}

#endif /* RTL8187_H */
Commit	Line	Data
0aec00ae JL	1	/*
	2	* Definitions for RTL8187 hardware
	3	*
	4	* Copyright 2007 Michael Wu <flamingice@sourmilk.net>
	5	* Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
	6	*
	7	* Based on the r8187 driver, which is:
	8	* Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License version 2 as
	12	* published by the Free Software Foundation.
	13	*/
	14
605bebe2 MW	15	#ifndef RTL8187_H
	16	#define RTL8187_H
	17
	18	#include "rtl818x.h"
	19
	20	#define RTL8187_EEPROM_TXPWR_BASE 0x05
	21	#define RTL8187_EEPROM_MAC_ADDR 0x07
	22	#define RTL8187_EEPROM_TXPWR_CHAN_1 0x16 /* 3 channels */
	23	#define RTL8187_EEPROM_TXPWR_CHAN_6 0x1B /* 2 channels */
	24	#define RTL8187_EEPROM_TXPWR_CHAN_4 0x3D /* 2 channels */
	25
	26	#define RTL8187_REQT_READ 0xC0
	27	#define RTL8187_REQT_WRITE 0x40
	28	#define RTL8187_REQ_GET_REG 0x05
	29	#define RTL8187_REQ_SET_REG 0x05
	30
	31	#define RTL8187_MAX_RX 0x9C4
	32
	33	struct rtl8187_rx_info {
	34	struct urb *urb;
	35	struct ieee80211_hw *dev;
	36	};
	37
	38	struct rtl8187_rx_hdr {
4150c572	39	__le32 flags;
605bebe2 MW	40	u8 noise;
	41	u8 signal;
	42	u8 agc;
	43	u8 reserved;
	44	__le64 mac_time;
	45	} __attribute__((packed));
	46
c44ac0b9	47	struct rtl8187b_rx_hdr {
605bebe2	48	__le32 flags;
c44ac0b9	49	__le64 mac_time;
0ccd58fc LF	50	u8 sq;
0ccd58fc LF	51	u8 rssi;
c44ac0b9	52	u8 agc;
0ccd58fc LF	53	u8 flags2;
	54	__le16 snr_long2end;
	55	s8 pwdb_g12;
	56	u8 fot;
c44ac0b9 HTL	57	} __attribute__((packed));
	58
	59	/* {rtl8187,rtl8187b}_tx_info is in skb */
	60
c44ac0b9 HTL	61	struct rtl8187_tx_hdr {
c44ac0b9 HTL	62	__le32 flags;
605bebe2 MW	63	__le16 rts_duration;
	64	__le16 len;
	65	__le32 retry;
	66	} __attribute__((packed));
	67
c44ac0b9 HTL	68	struct rtl8187b_tx_hdr {
	69	__le32 flags;
	70	__le16 rts_duration;
	71	__le16 len;
	72	__le32 unused_1;
	73	__le16 unused_2;
	74	__le16 tx_duration;
	75	__le32 unused_3;
	76	__le32 retry;
	77	__le32 unused_4[2];
	78	} __attribute__((packed));
	79
	80	enum {
	81	DEVICE_RTL8187,
	82	DEVICE_RTL8187B
	83	};
	84
605bebe2 MW	85	struct rtl8187_priv {
	86	/* common between rtl818x drivers */
	87	struct rtl818x_csr *map;
f6532111	88	const struct rtl818x_rf_ops *rf;
32bfd35d	89	struct ieee80211_vif *vif;
605bebe2	90	int mode;
7dcdd073 LF	91	/* The mutex protects the TX loopback state.
	92	* Any attempt to set channels concurrently locks the device.
	93	*/
	94	struct mutex conf_mutex;
605bebe2 MW	95
	96	/* rtl8187 specific */
	97	struct ieee80211_channel channels[14];
	98	struct ieee80211_rate rates[12];
8318d78a	99	struct ieee80211_supported_band band;
605bebe2	100	struct usb_device *udev;
4150c572	101	u32 rx_conf;
c1db52b9	102	struct usb_anchor anchored;
2f47690e LF	103	struct delayed_work work;
2f47690e LF	104	struct ieee80211_hw *dev;
605bebe2 MW	105	u16 txpwr_base;
605bebe2 MW	106	u8 asic_rev;
c44ac0b9 HTL	107	u8 is_rtl8187b;
	108	enum {
	109	RTL8187BvB,
	110	RTL8187BvD,
	111	RTL8187BvE
	112	} hw_rev;
605bebe2	113	struct sk_buff_head rx_queue;
c44ac0b9 HTL	114	u8 signal;
	115	u8 quality;
	116	u8 noise;
b4572a92 HRK	117	u8 slot_time;
b4572a92 HRK	118	u8 aifsn[4];
3517afde HRK	119	struct {
3517afde HRK	120	__le64 buf;
3517afde	121	struct sk_buff_head queue;
2f47690e	122	} b_tx_status; /* This queue is used by both -b and non-b devices */
605bebe2 MW	123	};
	124
	125	void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data);
	126
c44ac0b9 HTL	127	static inline u8 rtl818x_ioread8_idx(struct rtl8187_priv *priv,
c44ac0b9 HTL	128	u8 *addr, u8 idx)
605bebe2 MW	129	{
	130	u8 val;
	131
	132	usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
	133	RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
c44ac0b9 HTL	134	(unsigned long)addr, idx & 0x03, &val,
c44ac0b9 HTL	135	sizeof(val), HZ / 2);
605bebe2 MW	136
	137	return val;
	138	}
	139
c44ac0b9 HTL	140	static inline u8 rtl818x_ioread8(struct rtl8187_priv priv, u8 addr)
	141	{
	142	return rtl818x_ioread8_idx(priv, addr, 0);
	143	}
	144
	145	static inline u16 rtl818x_ioread16_idx(struct rtl8187_priv *priv,
	146	__le16 *addr, u8 idx)
605bebe2 MW	147	{
	148	__le16 val;
	149
	150	usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
	151	RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
c44ac0b9 HTL	152	(unsigned long)addr, idx & 0x03, &val,
c44ac0b9 HTL	153	sizeof(val), HZ / 2);
605bebe2 MW	154
	155	return le16_to_cpu(val);
	156	}
	157
c44ac0b9 HTL	158	static inline u16 rtl818x_ioread16(struct rtl8187_priv priv, __le16 addr)
	159	{
	160	return rtl818x_ioread16_idx(priv, addr, 0);
	161	}
	162
	163	static inline u32 rtl818x_ioread32_idx(struct rtl8187_priv *priv,
	164	__le32 *addr, u8 idx)
605bebe2 MW	165	{
	166	__le32 val;
	167
	168	usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
	169	RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
c44ac0b9 HTL	170	(unsigned long)addr, idx & 0x03, &val,
c44ac0b9 HTL	171	sizeof(val), HZ / 2);
605bebe2 MW	172
	173	return le32_to_cpu(val);
	174	}
	175
c44ac0b9 HTL	176	static inline u32 rtl818x_ioread32(struct rtl8187_priv priv, __le32 addr)
	177	{
	178	return rtl818x_ioread32_idx(priv, addr, 0);
	179	}
	180
	181	static inline void rtl818x_iowrite8_idx(struct rtl8187_priv *priv,
	182	u8 *addr, u8 val, u8 idx)
605bebe2 MW	183	{
	184	usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
	185	RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
c44ac0b9 HTL	186	(unsigned long)addr, idx & 0x03, &val,
	187	sizeof(val), HZ / 2);
	188	}
	189
	190	static inline void rtl818x_iowrite8(struct rtl8187_priv priv, u8 addr, u8 val)
	191	{
	192	rtl818x_iowrite8_idx(priv, addr, val, 0);
605bebe2 MW	193	}
605bebe2 MW	194
c44ac0b9 HTL	195	static inline void rtl818x_iowrite16_idx(struct rtl8187_priv *priv,
c44ac0b9 HTL	196	__le16 *addr, u16 val, u8 idx)
605bebe2 MW	197	{
	198	__le16 buf = cpu_to_le16(val);
	199
	200	usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
	201	RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
c44ac0b9 HTL	202	(unsigned long)addr, idx & 0x03, &buf, sizeof(buf),
c44ac0b9 HTL	203	HZ / 2);
605bebe2 MW	204	}
605bebe2 MW	205
c44ac0b9 HTL	206	static inline void rtl818x_iowrite16(struct rtl8187_priv priv, __le16 addr,
	207	u16 val)
	208	{
	209	rtl818x_iowrite16_idx(priv, addr, val, 0);
	210	}
	211
	212	static inline void rtl818x_iowrite32_idx(struct rtl8187_priv *priv,
	213	__le32 *addr, u32 val, u8 idx)
605bebe2 MW	214	{
	215	__le32 buf = cpu_to_le32(val);
	216
	217	usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
	218	RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
c44ac0b9 HTL	219	(unsigned long)addr, idx & 0x03, &buf, sizeof(buf),
	220	HZ / 2);
	221	}
	222
	223	static inline void rtl818x_iowrite32(struct rtl8187_priv priv, __le32 addr,
	224	u32 val)
	225	{
	226	rtl818x_iowrite32_idx(priv, addr, val, 0);
605bebe2 MW	227	}
	228
	229	#endif /* RTL8187_H */