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drivers/net: Convert unbounded kzalloc calls to kcalloc
[net-next-2.6.git] / drivers / net / wireless / rt2x00 / rt2x00queue.c
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181d6902 1/*
9c9a0d14
GW
2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com>
181d6902
ID
4 <http://rt2x00.serialmonkey.com>
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the
18 Free Software Foundation, Inc.,
19 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 */
21
22/*
23 Module: rt2x00lib
24 Abstract: rt2x00 queue specific routines.
25 */
26
5a0e3ad6 27#include <linux/slab.h>
181d6902
ID
28#include <linux/kernel.h>
29#include <linux/module.h>
c4da0048 30#include <linux/dma-mapping.h>
181d6902
ID
31
32#include "rt2x00.h"
33#include "rt2x00lib.h"
34
c4da0048
GW
35struct sk_buff *rt2x00queue_alloc_rxskb(struct rt2x00_dev *rt2x00dev,
36 struct queue_entry *entry)
239c249d 37{
c4da0048
GW
38 struct sk_buff *skb;
39 struct skb_frame_desc *skbdesc;
2bb057d0
ID
40 unsigned int frame_size;
41 unsigned int head_size = 0;
42 unsigned int tail_size = 0;
239c249d
GW
43
44 /*
45 * The frame size includes descriptor size, because the
46 * hardware directly receive the frame into the skbuffer.
47 */
c4da0048 48 frame_size = entry->queue->data_size + entry->queue->desc_size;
239c249d
GW
49
50 /*
ff352391
ID
51 * The payload should be aligned to a 4-byte boundary,
52 * this means we need at least 3 bytes for moving the frame
53 * into the correct offset.
239c249d 54 */
2bb057d0
ID
55 head_size = 4;
56
57 /*
58 * For IV/EIV/ICV assembly we must make sure there is
59 * at least 8 bytes bytes available in headroom for IV/EIV
9c3444d3 60 * and 8 bytes for ICV data as tailroon.
2bb057d0 61 */
2bb057d0
ID
62 if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) {
63 head_size += 8;
9c3444d3 64 tail_size += 8;
2bb057d0 65 }
239c249d
GW
66
67 /*
68 * Allocate skbuffer.
69 */
2bb057d0 70 skb = dev_alloc_skb(frame_size + head_size + tail_size);
239c249d
GW
71 if (!skb)
72 return NULL;
73
2bb057d0
ID
74 /*
75 * Make sure we not have a frame with the requested bytes
76 * available in the head and tail.
77 */
78 skb_reserve(skb, head_size);
239c249d
GW
79 skb_put(skb, frame_size);
80
c4da0048
GW
81 /*
82 * Populate skbdesc.
83 */
84 skbdesc = get_skb_frame_desc(skb);
85 memset(skbdesc, 0, sizeof(*skbdesc));
86 skbdesc->entry = entry;
87
88 if (test_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags)) {
89 skbdesc->skb_dma = dma_map_single(rt2x00dev->dev,
90 skb->data,
91 skb->len,
92 DMA_FROM_DEVICE);
93 skbdesc->flags |= SKBDESC_DMA_MAPPED_RX;
94 }
95
239c249d
GW
96 return skb;
97}
30caa6e3 98
c4da0048 99void rt2x00queue_map_txskb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
30caa6e3 100{
c4da0048
GW
101 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
102
3ee54a07
ID
103 skbdesc->skb_dma =
104 dma_map_single(rt2x00dev->dev, skb->data, skb->len, DMA_TO_DEVICE);
c4da0048
GW
105 skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
106}
107EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb);
108
109void rt2x00queue_unmap_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
110{
111 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
112
113 if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) {
114 dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma, skb->len,
115 DMA_FROM_DEVICE);
116 skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX;
117 }
118
119 if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) {
0b8004aa 120 dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma, skb->len,
c4da0048
GW
121 DMA_TO_DEVICE);
122 skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
123 }
124}
0b8004aa 125EXPORT_SYMBOL_GPL(rt2x00queue_unmap_skb);
c4da0048
GW
126
127void rt2x00queue_free_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
128{
9a613195
ID
129 if (!skb)
130 return;
131
61243d8e 132 rt2x00queue_unmap_skb(rt2x00dev, skb);
30caa6e3
GW
133 dev_kfree_skb_any(skb);
134}
239c249d 135
daee6c09 136void rt2x00queue_align_frame(struct sk_buff *skb)
9f166171 137{
9f166171 138 unsigned int frame_length = skb->len;
daee6c09 139 unsigned int align = ALIGN_SIZE(skb, 0);
9f166171
ID
140
141 if (!align)
142 return;
143
daee6c09
ID
144 skb_push(skb, align);
145 memmove(skb->data, skb->data + align, frame_length);
146 skb_trim(skb, frame_length);
147}
148
95d69aa0 149void rt2x00queue_align_payload(struct sk_buff *skb, unsigned int header_length)
daee6c09
ID
150{
151 unsigned int frame_length = skb->len;
95d69aa0 152 unsigned int align = ALIGN_SIZE(skb, header_length);
daee6c09
ID
153
154 if (!align)
155 return;
156
157 skb_push(skb, align);
158 memmove(skb->data, skb->data + align, frame_length);
159 skb_trim(skb, frame_length);
160}
161
162void rt2x00queue_insert_l2pad(struct sk_buff *skb, unsigned int header_length)
163{
2e331462 164 unsigned int payload_length = skb->len - header_length;
daee6c09
ID
165 unsigned int header_align = ALIGN_SIZE(skb, 0);
166 unsigned int payload_align = ALIGN_SIZE(skb, header_length);
e54be4e7 167 unsigned int l2pad = payload_length ? L2PAD_SIZE(header_length) : 0;
daee6c09 168
2e331462
GW
169 /*
170 * Adjust the header alignment if the payload needs to be moved more
171 * than the header.
172 */
173 if (payload_align > header_align)
174 header_align += 4;
175
176 /* There is nothing to do if no alignment is needed */
177 if (!header_align)
178 return;
daee6c09 179
2e331462
GW
180 /* Reserve the amount of space needed in front of the frame */
181 skb_push(skb, header_align);
182
183 /*
184 * Move the header.
185 */
186 memmove(skb->data, skb->data + header_align, header_length);
187
188 /* Move the payload, if present and if required */
189 if (payload_length && payload_align)
daee6c09 190 memmove(skb->data + header_length + l2pad,
a5186e99 191 skb->data + header_length + l2pad + payload_align,
2e331462
GW
192 payload_length);
193
194 /* Trim the skb to the correct size */
195 skb_trim(skb, header_length + l2pad + payload_length);
9f166171
ID
196}
197
daee6c09
ID
198void rt2x00queue_remove_l2pad(struct sk_buff *skb, unsigned int header_length)
199{
77e73d18 200 unsigned int l2pad = L2PAD_SIZE(header_length);
daee6c09 201
354e39db 202 if (!l2pad)
daee6c09
ID
203 return;
204
205 memmove(skb->data + l2pad, skb->data, header_length);
206 skb_pull(skb, l2pad);
207}
208
7b40982e
ID
209static void rt2x00queue_create_tx_descriptor_seq(struct queue_entry *entry,
210 struct txentry_desc *txdesc)
211{
212 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
213 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
214 struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif);
215 unsigned long irqflags;
216
217 if (!(tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) ||
218 unlikely(!tx_info->control.vif))
219 return;
220
221 /*
222 * Hardware should insert sequence counter.
223 * FIXME: We insert a software sequence counter first for
224 * hardware that doesn't support hardware sequence counting.
225 *
226 * This is wrong because beacons are not getting sequence
227 * numbers assigned properly.
228 *
229 * A secondary problem exists for drivers that cannot toggle
230 * sequence counting per-frame, since those will override the
231 * sequence counter given by mac80211.
232 */
233 spin_lock_irqsave(&intf->seqlock, irqflags);
234
235 if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
236 intf->seqno += 0x10;
237 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
238 hdr->seq_ctrl |= cpu_to_le16(intf->seqno);
239
240 spin_unlock_irqrestore(&intf->seqlock, irqflags);
241
242 __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
243}
244
245static void rt2x00queue_create_tx_descriptor_plcp(struct queue_entry *entry,
246 struct txentry_desc *txdesc,
247 const struct rt2x00_rate *hwrate)
248{
249 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
250 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
251 struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
252 unsigned int data_length;
253 unsigned int duration;
254 unsigned int residual;
255
256 /* Data length + CRC + Crypto overhead (IV/EIV/ICV/MIC) */
257 data_length = entry->skb->len + 4;
258 data_length += rt2x00crypto_tx_overhead(rt2x00dev, entry->skb);
259
260 /*
261 * PLCP setup
262 * Length calculation depends on OFDM/CCK rate.
263 */
264 txdesc->signal = hwrate->plcp;
265 txdesc->service = 0x04;
266
267 if (hwrate->flags & DEV_RATE_OFDM) {
268 txdesc->length_high = (data_length >> 6) & 0x3f;
269 txdesc->length_low = data_length & 0x3f;
270 } else {
271 /*
272 * Convert length to microseconds.
273 */
274 residual = GET_DURATION_RES(data_length, hwrate->bitrate);
275 duration = GET_DURATION(data_length, hwrate->bitrate);
276
277 if (residual != 0) {
278 duration++;
279
280 /*
281 * Check if we need to set the Length Extension
282 */
283 if (hwrate->bitrate == 110 && residual <= 30)
284 txdesc->service |= 0x80;
285 }
286
287 txdesc->length_high = (duration >> 8) & 0xff;
288 txdesc->length_low = duration & 0xff;
289
290 /*
291 * When preamble is enabled we should set the
292 * preamble bit for the signal.
293 */
294 if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
295 txdesc->signal |= 0x08;
296 }
297}
298
bd88a781
ID
299static void rt2x00queue_create_tx_descriptor(struct queue_entry *entry,
300 struct txentry_desc *txdesc)
7050ec82 301{
2e92e6f2 302 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
e039fa4a 303 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
7050ec82 304 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
2e92e6f2 305 struct ieee80211_rate *rate =
e039fa4a 306 ieee80211_get_tx_rate(rt2x00dev->hw, tx_info);
7050ec82 307 const struct rt2x00_rate *hwrate;
7050ec82
ID
308
309 memset(txdesc, 0, sizeof(*txdesc));
310
311 /*
312 * Initialize information from queue
313 */
314 txdesc->queue = entry->queue->qid;
315 txdesc->cw_min = entry->queue->cw_min;
316 txdesc->cw_max = entry->queue->cw_max;
317 txdesc->aifs = entry->queue->aifs;
318
9f166171 319 /*
df624ca5 320 * Header and frame information.
9f166171 321 */
df624ca5 322 txdesc->length = entry->skb->len;
9f166171 323 txdesc->header_length = ieee80211_get_hdrlen_from_skb(entry->skb);
9f166171 324
7050ec82
ID
325 /*
326 * Check whether this frame is to be acked.
327 */
e039fa4a 328 if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK))
7050ec82
ID
329 __set_bit(ENTRY_TXD_ACK, &txdesc->flags);
330
331 /*
332 * Check if this is a RTS/CTS frame
333 */
ac104462
ID
334 if (ieee80211_is_rts(hdr->frame_control) ||
335 ieee80211_is_cts(hdr->frame_control)) {
7050ec82 336 __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
ac104462 337 if (ieee80211_is_rts(hdr->frame_control))
7050ec82 338 __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags);
e039fa4a 339 else
7050ec82 340 __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags);
e039fa4a 341 if (tx_info->control.rts_cts_rate_idx >= 0)
2e92e6f2 342 rate =
e039fa4a 343 ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info);
7050ec82
ID
344 }
345
346 /*
347 * Determine retry information.
348 */
e6a9854b 349 txdesc->retry_limit = tx_info->control.rates[0].count - 1;
42c82857 350 if (txdesc->retry_limit >= rt2x00dev->long_retry)
7050ec82
ID
351 __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
352
353 /*
354 * Check if more fragments are pending
355 */
2606e422 356 if (ieee80211_has_morefrags(hdr->frame_control)) {
7050ec82
ID
357 __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
358 __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags);
359 }
360
2606e422
HS
361 /*
362 * Check if more frames (!= fragments) are pending
363 */
364 if (tx_info->flags & IEEE80211_TX_CTL_MORE_FRAMES)
365 __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
366
7050ec82
ID
367 /*
368 * Beacons and probe responses require the tsf timestamp
e81e0aef
AB
369 * to be inserted into the frame, except for a frame that has been injected
370 * through a monitor interface. This latter is needed for testing a
371 * monitor interface.
7050ec82 372 */
e81e0aef
AB
373 if ((ieee80211_is_beacon(hdr->frame_control) ||
374 ieee80211_is_probe_resp(hdr->frame_control)) &&
375 (!(tx_info->flags & IEEE80211_TX_CTL_INJECTED)))
7050ec82
ID
376 __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
377
378 /*
379 * Determine with what IFS priority this frame should be send.
380 * Set ifs to IFS_SIFS when the this is not the first fragment,
381 * or this fragment came after RTS/CTS.
382 */
7b40982e
ID
383 if ((tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) &&
384 !test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags)) {
7050ec82
ID
385 __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags);
386 txdesc->ifs = IFS_BACKOFF;
7b40982e 387 } else
7050ec82 388 txdesc->ifs = IFS_SIFS;
7050ec82 389
076f9582
ID
390 /*
391 * Determine rate modulation.
392 */
7050ec82 393 hwrate = rt2x00_get_rate(rate->hw_value);
076f9582 394 txdesc->rate_mode = RATE_MODE_CCK;
7b40982e 395 if (hwrate->flags & DEV_RATE_OFDM)
076f9582 396 txdesc->rate_mode = RATE_MODE_OFDM;
7050ec82 397
7b40982e
ID
398 /*
399 * Apply TX descriptor handling by components
400 */
401 rt2x00crypto_create_tx_descriptor(entry, txdesc);
35f00cfc 402 rt2x00ht_create_tx_descriptor(entry, txdesc, hwrate);
7b40982e
ID
403 rt2x00queue_create_tx_descriptor_seq(entry, txdesc);
404 rt2x00queue_create_tx_descriptor_plcp(entry, txdesc, hwrate);
7050ec82 405}
7050ec82 406
78eea11b
GW
407static int rt2x00queue_write_tx_data(struct queue_entry *entry,
408 struct txentry_desc *txdesc)
409{
410 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
411
412 /*
413 * This should not happen, we already checked the entry
414 * was ours. When the hardware disagrees there has been
415 * a queue corruption!
416 */
417 if (unlikely(rt2x00dev->ops->lib->get_entry_state &&
418 rt2x00dev->ops->lib->get_entry_state(entry))) {
419 ERROR(rt2x00dev,
420 "Corrupt queue %d, accessing entry which is not ours.\n"
421 "Please file bug report to %s.\n",
422 entry->queue->qid, DRV_PROJECT);
423 return -EINVAL;
424 }
425
426 /*
427 * Add the requested extra tx headroom in front of the skb.
428 */
429 skb_push(entry->skb, rt2x00dev->ops->extra_tx_headroom);
430 memset(entry->skb->data, 0, rt2x00dev->ops->extra_tx_headroom);
431
432 /*
76dd5ddf 433 * Call the driver's write_tx_data function, if it exists.
78eea11b 434 */
76dd5ddf
GW
435 if (rt2x00dev->ops->lib->write_tx_data)
436 rt2x00dev->ops->lib->write_tx_data(entry, txdesc);
78eea11b
GW
437
438 /*
439 * Map the skb to DMA.
440 */
441 if (test_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags))
442 rt2x00queue_map_txskb(rt2x00dev, entry->skb);
443
444 return 0;
445}
446
bd88a781
ID
447static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
448 struct txentry_desc *txdesc)
7050ec82 449{
b869767b
ID
450 struct data_queue *queue = entry->queue;
451 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
7050ec82
ID
452
453 rt2x00dev->ops->lib->write_tx_desc(rt2x00dev, entry->skb, txdesc);
454
455 /*
456 * All processing on the frame has been completed, this means
457 * it is now ready to be dumped to userspace through debugfs.
458 */
5c3b685c 459 rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_TX, entry->skb);
6295d815
GW
460}
461
462static void rt2x00queue_kick_tx_queue(struct queue_entry *entry,
463 struct txentry_desc *txdesc)
464{
465 struct data_queue *queue = entry->queue;
466 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
7050ec82
ID
467
468 /*
b869767b 469 * Check if we need to kick the queue, there are however a few rules
6295d815 470 * 1) Don't kick unless this is the last in frame in a burst.
b869767b
ID
471 * When the burst flag is set, this frame is always followed
472 * by another frame which in some way are related to eachother.
473 * This is true for fragments, RTS or CTS-to-self frames.
6295d815 474 * 2) Rule 1 can be broken when the available entries
b869767b 475 * in the queue are less then a certain threshold.
7050ec82 476 */
b869767b
ID
477 if (rt2x00queue_threshold(queue) ||
478 !test_bit(ENTRY_TXD_BURST, &txdesc->flags))
479 rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, queue->qid);
7050ec82 480}
7050ec82 481
7351c6bd
JB
482int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb,
483 bool local)
6db3786a 484{
e6a9854b 485 struct ieee80211_tx_info *tx_info;
6db3786a
ID
486 struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX);
487 struct txentry_desc txdesc;
d74f5ba4 488 struct skb_frame_desc *skbdesc;
e6a9854b 489 u8 rate_idx, rate_flags;
6db3786a
ID
490
491 if (unlikely(rt2x00queue_full(queue)))
0e3de998 492 return -ENOBUFS;
6db3786a 493
0262ab0d 494 if (test_and_set_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags)) {
6db3786a
ID
495 ERROR(queue->rt2x00dev,
496 "Arrived at non-free entry in the non-full queue %d.\n"
497 "Please file bug report to %s.\n",
498 queue->qid, DRV_PROJECT);
499 return -EINVAL;
500 }
501
502 /*
503 * Copy all TX descriptor information into txdesc,
504 * after that we are free to use the skb->cb array
505 * for our information.
506 */
507 entry->skb = skb;
508 rt2x00queue_create_tx_descriptor(entry, &txdesc);
509
d74f5ba4 510 /*
e6a9854b 511 * All information is retrieved from the skb->cb array,
2bb057d0 512 * now we should claim ownership of the driver part of that
e6a9854b 513 * array, preserving the bitrate index and flags.
d74f5ba4 514 */
e6a9854b
JB
515 tx_info = IEEE80211_SKB_CB(skb);
516 rate_idx = tx_info->control.rates[0].idx;
517 rate_flags = tx_info->control.rates[0].flags;
0e3de998 518 skbdesc = get_skb_frame_desc(skb);
d74f5ba4
ID
519 memset(skbdesc, 0, sizeof(*skbdesc));
520 skbdesc->entry = entry;
e6a9854b
JB
521 skbdesc->tx_rate_idx = rate_idx;
522 skbdesc->tx_rate_flags = rate_flags;
d74f5ba4 523
7351c6bd
JB
524 if (local)
525 skbdesc->flags |= SKBDESC_NOT_MAC80211;
526
2bb057d0
ID
527 /*
528 * When hardware encryption is supported, and this frame
529 * is to be encrypted, we should strip the IV/EIV data from
3ad2f3fb 530 * the frame so we can provide it to the driver separately.
2bb057d0
ID
531 */
532 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
dddfb478 533 !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
3f787bd6 534 if (test_bit(DRIVER_REQUIRE_COPY_IV, &queue->rt2x00dev->flags))
9eb4e21e 535 rt2x00crypto_tx_copy_iv(skb, &txdesc);
dddfb478 536 else
9eb4e21e 537 rt2x00crypto_tx_remove_iv(skb, &txdesc);
dddfb478 538 }
2bb057d0 539
93354cbb
ID
540 /*
541 * When DMA allocation is required we should guarentee to the
542 * driver that the DMA is aligned to a 4-byte boundary.
93354cbb
ID
543 * However some drivers require L2 padding to pad the payload
544 * rather then the header. This could be a requirement for
545 * PCI and USB devices, while header alignment only is valid
546 * for PCI devices.
547 */
9f166171 548 if (test_bit(DRIVER_REQUIRE_L2PAD, &queue->rt2x00dev->flags))
daee6c09 549 rt2x00queue_insert_l2pad(entry->skb, txdesc.header_length);
93354cbb 550 else if (test_bit(DRIVER_REQUIRE_DMA, &queue->rt2x00dev->flags))
daee6c09 551 rt2x00queue_align_frame(entry->skb);
9f166171 552
2bb057d0
ID
553 /*
554 * It could be possible that the queue was corrupted and this
0e3de998
ID
555 * call failed. Since we always return NETDEV_TX_OK to mac80211,
556 * this frame will simply be dropped.
2bb057d0 557 */
78eea11b 558 if (unlikely(rt2x00queue_write_tx_data(entry, &txdesc))) {
0262ab0d 559 clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
2bb057d0 560 entry->skb = NULL;
0e3de998 561 return -EIO;
6db3786a
ID
562 }
563
0262ab0d 564 set_bit(ENTRY_DATA_PENDING, &entry->flags);
6db3786a
ID
565
566 rt2x00queue_index_inc(queue, Q_INDEX);
567 rt2x00queue_write_tx_descriptor(entry, &txdesc);
6295d815 568 rt2x00queue_kick_tx_queue(entry, &txdesc);
6db3786a
ID
569
570 return 0;
571}
572
bd88a781 573int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev,
a2c9b652
ID
574 struct ieee80211_vif *vif,
575 const bool enable_beacon)
bd88a781
ID
576{
577 struct rt2x00_intf *intf = vif_to_intf(vif);
578 struct skb_frame_desc *skbdesc;
579 struct txentry_desc txdesc;
bd88a781
ID
580
581 if (unlikely(!intf->beacon))
582 return -ENOBUFS;
583
17512dc3
IP
584 mutex_lock(&intf->beacon_skb_mutex);
585
586 /*
587 * Clean up the beacon skb.
588 */
589 rt2x00queue_free_skb(rt2x00dev, intf->beacon->skb);
590 intf->beacon->skb = NULL;
591
a2c9b652
ID
592 if (!enable_beacon) {
593 rt2x00dev->ops->lib->kill_tx_queue(rt2x00dev, QID_BEACON);
17512dc3 594 mutex_unlock(&intf->beacon_skb_mutex);
a2c9b652
ID
595 return 0;
596 }
597
bd88a781 598 intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif);
17512dc3
IP
599 if (!intf->beacon->skb) {
600 mutex_unlock(&intf->beacon_skb_mutex);
bd88a781 601 return -ENOMEM;
17512dc3 602 }
bd88a781
ID
603
604 /*
605 * Copy all TX descriptor information into txdesc,
606 * after that we are free to use the skb->cb array
607 * for our information.
608 */
609 rt2x00queue_create_tx_descriptor(intf->beacon, &txdesc);
610
bd88a781
ID
611 /*
612 * Fill in skb descriptor
613 */
614 skbdesc = get_skb_frame_desc(intf->beacon->skb);
615 memset(skbdesc, 0, sizeof(*skbdesc));
bd88a781
ID
616 skbdesc->entry = intf->beacon;
617
bd88a781 618 /*
d61cb266 619 * Send beacon to hardware and enable beacon genaration..
bd88a781 620 */
f224f4ef 621 rt2x00dev->ops->lib->write_beacon(intf->beacon, &txdesc);
bd88a781 622
17512dc3
IP
623 mutex_unlock(&intf->beacon_skb_mutex);
624
bd88a781
ID
625 return 0;
626}
627
181d6902 628struct data_queue *rt2x00queue_get_queue(struct rt2x00_dev *rt2x00dev,
e58c6aca 629 const enum data_queue_qid queue)
181d6902
ID
630{
631 int atim = test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
632
a2c9b652
ID
633 if (queue == QID_RX)
634 return rt2x00dev->rx;
635
61448f88 636 if (queue < rt2x00dev->ops->tx_queues && rt2x00dev->tx)
181d6902
ID
637 return &rt2x00dev->tx[queue];
638
639 if (!rt2x00dev->bcn)
640 return NULL;
641
e58c6aca 642 if (queue == QID_BEACON)
181d6902 643 return &rt2x00dev->bcn[0];
e58c6aca 644 else if (queue == QID_ATIM && atim)
181d6902
ID
645 return &rt2x00dev->bcn[1];
646
647 return NULL;
648}
649EXPORT_SYMBOL_GPL(rt2x00queue_get_queue);
650
651struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
652 enum queue_index index)
653{
654 struct queue_entry *entry;
5f46c4d0 655 unsigned long irqflags;
181d6902
ID
656
657 if (unlikely(index >= Q_INDEX_MAX)) {
658 ERROR(queue->rt2x00dev,
659 "Entry requested from invalid index type (%d)\n", index);
660 return NULL;
661 }
662
5f46c4d0 663 spin_lock_irqsave(&queue->lock, irqflags);
181d6902
ID
664
665 entry = &queue->entries[queue->index[index]];
666
5f46c4d0 667 spin_unlock_irqrestore(&queue->lock, irqflags);
181d6902
ID
668
669 return entry;
670}
671EXPORT_SYMBOL_GPL(rt2x00queue_get_entry);
672
673void rt2x00queue_index_inc(struct data_queue *queue, enum queue_index index)
674{
5f46c4d0
ID
675 unsigned long irqflags;
676
181d6902
ID
677 if (unlikely(index >= Q_INDEX_MAX)) {
678 ERROR(queue->rt2x00dev,
679 "Index change on invalid index type (%d)\n", index);
680 return;
681 }
682
5f46c4d0 683 spin_lock_irqsave(&queue->lock, irqflags);
181d6902
ID
684
685 queue->index[index]++;
686 if (queue->index[index] >= queue->limit)
687 queue->index[index] = 0;
688
10b6b801
ID
689 if (index == Q_INDEX) {
690 queue->length++;
c965c74b 691 queue->last_index = jiffies;
10b6b801
ID
692 } else if (index == Q_INDEX_DONE) {
693 queue->length--;
55887511 694 queue->count++;
c965c74b 695 queue->last_index_done = jiffies;
10b6b801 696 }
181d6902 697
5f46c4d0 698 spin_unlock_irqrestore(&queue->lock, irqflags);
181d6902 699}
181d6902
ID
700
701static void rt2x00queue_reset(struct data_queue *queue)
702{
5f46c4d0
ID
703 unsigned long irqflags;
704
705 spin_lock_irqsave(&queue->lock, irqflags);
181d6902
ID
706
707 queue->count = 0;
708 queue->length = 0;
c965c74b
ID
709 queue->last_index = jiffies;
710 queue->last_index_done = jiffies;
181d6902
ID
711 memset(queue->index, 0, sizeof(queue->index));
712
5f46c4d0 713 spin_unlock_irqrestore(&queue->lock, irqflags);
181d6902
ID
714}
715
a2c9b652
ID
716void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev)
717{
718 struct data_queue *queue;
719
720 txall_queue_for_each(rt2x00dev, queue)
721 rt2x00dev->ops->lib->kill_tx_queue(rt2x00dev, queue->qid);
722}
723
798b7adb 724void rt2x00queue_init_queues(struct rt2x00_dev *rt2x00dev)
181d6902
ID
725{
726 struct data_queue *queue;
727 unsigned int i;
728
798b7adb 729 queue_for_each(rt2x00dev, queue) {
181d6902
ID
730 rt2x00queue_reset(queue);
731
9c0ab712
ID
732 for (i = 0; i < queue->limit; i++) {
733 queue->entries[i].flags = 0;
734
798b7adb 735 rt2x00dev->ops->lib->clear_entry(&queue->entries[i]);
9c0ab712 736 }
181d6902
ID
737 }
738}
739
740static int rt2x00queue_alloc_entries(struct data_queue *queue,
741 const struct data_queue_desc *qdesc)
742{
743 struct queue_entry *entries;
744 unsigned int entry_size;
745 unsigned int i;
746
747 rt2x00queue_reset(queue);
748
749 queue->limit = qdesc->entry_num;
b869767b 750 queue->threshold = DIV_ROUND_UP(qdesc->entry_num, 10);
181d6902
ID
751 queue->data_size = qdesc->data_size;
752 queue->desc_size = qdesc->desc_size;
753
754 /*
755 * Allocate all queue entries.
756 */
757 entry_size = sizeof(*entries) + qdesc->priv_size;
baeb2ffa 758 entries = kcalloc(queue->limit, entry_size, GFP_KERNEL);
181d6902
ID
759 if (!entries)
760 return -ENOMEM;
761
762#define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
231be4e9
AB
763 ( ((char *)(__base)) + ((__limit) * (__esize)) + \
764 ((__index) * (__psize)) )
181d6902
ID
765
766 for (i = 0; i < queue->limit; i++) {
767 entries[i].flags = 0;
768 entries[i].queue = queue;
769 entries[i].skb = NULL;
770 entries[i].entry_idx = i;
771 entries[i].priv_data =
772 QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit,
773 sizeof(*entries), qdesc->priv_size);
774 }
775
776#undef QUEUE_ENTRY_PRIV_OFFSET
777
778 queue->entries = entries;
779
780 return 0;
781}
782
c4da0048
GW
783static void rt2x00queue_free_skbs(struct rt2x00_dev *rt2x00dev,
784 struct data_queue *queue)
30caa6e3
GW
785{
786 unsigned int i;
787
788 if (!queue->entries)
789 return;
790
791 for (i = 0; i < queue->limit; i++) {
792 if (queue->entries[i].skb)
c4da0048 793 rt2x00queue_free_skb(rt2x00dev, queue->entries[i].skb);
30caa6e3
GW
794 }
795}
796
c4da0048
GW
797static int rt2x00queue_alloc_rxskbs(struct rt2x00_dev *rt2x00dev,
798 struct data_queue *queue)
30caa6e3
GW
799{
800 unsigned int i;
801 struct sk_buff *skb;
802
803 for (i = 0; i < queue->limit; i++) {
c4da0048 804 skb = rt2x00queue_alloc_rxskb(rt2x00dev, &queue->entries[i]);
30caa6e3 805 if (!skb)
61243d8e 806 return -ENOMEM;
30caa6e3
GW
807 queue->entries[i].skb = skb;
808 }
809
810 return 0;
30caa6e3
GW
811}
812
181d6902
ID
813int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev)
814{
815 struct data_queue *queue;
816 int status;
817
181d6902
ID
818 status = rt2x00queue_alloc_entries(rt2x00dev->rx, rt2x00dev->ops->rx);
819 if (status)
820 goto exit;
821
822 tx_queue_for_each(rt2x00dev, queue) {
823 status = rt2x00queue_alloc_entries(queue, rt2x00dev->ops->tx);
824 if (status)
825 goto exit;
826 }
827
828 status = rt2x00queue_alloc_entries(rt2x00dev->bcn, rt2x00dev->ops->bcn);
829 if (status)
830 goto exit;
831
30caa6e3
GW
832 if (test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags)) {
833 status = rt2x00queue_alloc_entries(&rt2x00dev->bcn[1],
834 rt2x00dev->ops->atim);
835 if (status)
836 goto exit;
837 }
181d6902 838
c4da0048 839 status = rt2x00queue_alloc_rxskbs(rt2x00dev, rt2x00dev->rx);
181d6902
ID
840 if (status)
841 goto exit;
842
843 return 0;
844
845exit:
846 ERROR(rt2x00dev, "Queue entries allocation failed.\n");
847
848 rt2x00queue_uninitialize(rt2x00dev);
849
850 return status;
851}
852
853void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
854{
855 struct data_queue *queue;
856
c4da0048 857 rt2x00queue_free_skbs(rt2x00dev, rt2x00dev->rx);
30caa6e3 858
181d6902
ID
859 queue_for_each(rt2x00dev, queue) {
860 kfree(queue->entries);
861 queue->entries = NULL;
862 }
863}
864
8f539276
ID
865static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
866 struct data_queue *queue, enum data_queue_qid qid)
867{
868 spin_lock_init(&queue->lock);
869
870 queue->rt2x00dev = rt2x00dev;
871 queue->qid = qid;
2af0a570 872 queue->txop = 0;
8f539276
ID
873 queue->aifs = 2;
874 queue->cw_min = 5;
875 queue->cw_max = 10;
876}
877
181d6902
ID
878int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
879{
880 struct data_queue *queue;
881 enum data_queue_qid qid;
882 unsigned int req_atim =
883 !!test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
884
885 /*
886 * We need the following queues:
887 * RX: 1
61448f88 888 * TX: ops->tx_queues
181d6902
ID
889 * Beacon: 1
890 * Atim: 1 (if required)
891 */
61448f88 892 rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim;
181d6902 893
baeb2ffa 894 queue = kcalloc(rt2x00dev->data_queues, sizeof(*queue), GFP_KERNEL);
181d6902
ID
895 if (!queue) {
896 ERROR(rt2x00dev, "Queue allocation failed.\n");
897 return -ENOMEM;
898 }
899
900 /*
901 * Initialize pointers
902 */
903 rt2x00dev->rx = queue;
904 rt2x00dev->tx = &queue[1];
61448f88 905 rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues];
181d6902
ID
906
907 /*
908 * Initialize queue parameters.
909 * RX: qid = QID_RX
910 * TX: qid = QID_AC_BE + index
911 * TX: cw_min: 2^5 = 32.
912 * TX: cw_max: 2^10 = 1024.
565a019a
ID
913 * BCN: qid = QID_BEACON
914 * ATIM: qid = QID_ATIM
181d6902 915 */
8f539276 916 rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
181d6902 917
8f539276
ID
918 qid = QID_AC_BE;
919 tx_queue_for_each(rt2x00dev, queue)
920 rt2x00queue_init(rt2x00dev, queue, qid++);
181d6902 921
565a019a 922 rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[0], QID_BEACON);
181d6902 923 if (req_atim)
565a019a 924 rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[1], QID_ATIM);
181d6902
ID
925
926 return 0;
927}
928
929void rt2x00queue_free(struct rt2x00_dev *rt2x00dev)
930{
931 kfree(rt2x00dev->rx);
932 rt2x00dev->rx = NULL;
933 rt2x00dev->tx = NULL;
934 rt2x00dev->bcn = NULL;
935}