]> bbs.cooldavid.org Git - net-next-2.6.git/blame - drivers/net/wireless/rt2x00/rt2x00queue.c
rt2x00: Add support for L2 padding during TX/RX
[net-next-2.6.git] / drivers / net / wireless / rt2x00 / rt2x00queue.c
CommitLineData
181d6902 1/*
4e54c711 2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project
181d6902
ID
3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21/*
22 Module: rt2x00lib
23 Abstract: rt2x00 queue specific routines.
24 */
25
26#include <linux/kernel.h>
27#include <linux/module.h>
c4da0048 28#include <linux/dma-mapping.h>
181d6902
ID
29
30#include "rt2x00.h"
31#include "rt2x00lib.h"
32
c4da0048
GW
33struct sk_buff *rt2x00queue_alloc_rxskb(struct rt2x00_dev *rt2x00dev,
34 struct queue_entry *entry)
239c249d 35{
c4da0048
GW
36 struct sk_buff *skb;
37 struct skb_frame_desc *skbdesc;
2bb057d0
ID
38 unsigned int frame_size;
39 unsigned int head_size = 0;
40 unsigned int tail_size = 0;
239c249d
GW
41
42 /*
43 * The frame size includes descriptor size, because the
44 * hardware directly receive the frame into the skbuffer.
45 */
c4da0048 46 frame_size = entry->queue->data_size + entry->queue->desc_size;
239c249d
GW
47
48 /*
ff352391
ID
49 * The payload should be aligned to a 4-byte boundary,
50 * this means we need at least 3 bytes for moving the frame
51 * into the correct offset.
239c249d 52 */
2bb057d0
ID
53 head_size = 4;
54
55 /*
56 * For IV/EIV/ICV assembly we must make sure there is
57 * at least 8 bytes bytes available in headroom for IV/EIV
9c3444d3 58 * and 8 bytes for ICV data as tailroon.
2bb057d0 59 */
2bb057d0
ID
60 if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) {
61 head_size += 8;
9c3444d3 62 tail_size += 8;
2bb057d0 63 }
239c249d
GW
64
65 /*
66 * Allocate skbuffer.
67 */
2bb057d0 68 skb = dev_alloc_skb(frame_size + head_size + tail_size);
239c249d
GW
69 if (!skb)
70 return NULL;
71
2bb057d0
ID
72 /*
73 * Make sure we not have a frame with the requested bytes
74 * available in the head and tail.
75 */
76 skb_reserve(skb, head_size);
239c249d
GW
77 skb_put(skb, frame_size);
78
c4da0048
GW
79 /*
80 * Populate skbdesc.
81 */
82 skbdesc = get_skb_frame_desc(skb);
83 memset(skbdesc, 0, sizeof(*skbdesc));
84 skbdesc->entry = entry;
85
86 if (test_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags)) {
87 skbdesc->skb_dma = dma_map_single(rt2x00dev->dev,
88 skb->data,
89 skb->len,
90 DMA_FROM_DEVICE);
91 skbdesc->flags |= SKBDESC_DMA_MAPPED_RX;
92 }
93
239c249d
GW
94 return skb;
95}
30caa6e3 96
c4da0048 97void rt2x00queue_map_txskb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
30caa6e3 98{
c4da0048
GW
99 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
100
3ee54a07
ID
101 /*
102 * If device has requested headroom, we should make sure that
103 * is also mapped to the DMA so it can be used for transfering
104 * additional descriptor information to the hardware.
105 */
106 skb_push(skb, rt2x00dev->hw->extra_tx_headroom);
107
108 skbdesc->skb_dma =
109 dma_map_single(rt2x00dev->dev, skb->data, skb->len, DMA_TO_DEVICE);
110
111 /*
112 * Restore data pointer to original location again.
113 */
114 skb_pull(skb, rt2x00dev->hw->extra_tx_headroom);
115
c4da0048
GW
116 skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
117}
118EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb);
119
120void rt2x00queue_unmap_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
121{
122 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
123
124 if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) {
125 dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma, skb->len,
126 DMA_FROM_DEVICE);
127 skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX;
128 }
129
130 if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) {
3ee54a07
ID
131 /*
132 * Add headroom to the skb length, it has been removed
133 * by the driver, but it was actually mapped to DMA.
134 */
135 dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma,
136 skb->len + rt2x00dev->hw->extra_tx_headroom,
c4da0048
GW
137 DMA_TO_DEVICE);
138 skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
139 }
140}
c4da0048
GW
141
142void rt2x00queue_free_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
143{
9a613195
ID
144 if (!skb)
145 return;
146
61243d8e 147 rt2x00queue_unmap_skb(rt2x00dev, skb);
30caa6e3
GW
148 dev_kfree_skb_any(skb);
149}
239c249d 150
9f166171
ID
151void rt2x00queue_payload_align(struct sk_buff *skb,
152 bool l2pad, unsigned int header_length)
153{
154 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
155 unsigned int frame_length = skb->len;
156 unsigned int align = ALIGN_SIZE(skb, header_length);
157
158 if (!align)
159 return;
160
161 if (l2pad) {
162 if (skbdesc->flags & SKBDESC_L2_PADDED) {
163 /* Remove L2 padding */
164 memmove(skb->data + align, skb->data, header_length);
165 skb_pull(skb, align);
166 skbdesc->flags &= ~SKBDESC_L2_PADDED;
167 } else {
168 /* Add L2 padding */
169 skb_push(skb, align);
170 memmove(skb->data, skb->data + align, header_length);
171 skbdesc->flags |= SKBDESC_L2_PADDED;
172 }
173 } else {
174 /* Generic payload alignment to 4-byte boundary */
175 skb_push(skb, align);
176 memmove(skb->data, skb->data + align, frame_length);
177 }
178}
179
7b40982e
ID
180static void rt2x00queue_create_tx_descriptor_seq(struct queue_entry *entry,
181 struct txentry_desc *txdesc)
182{
183 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
184 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
185 struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif);
186 unsigned long irqflags;
187
188 if (!(tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) ||
189 unlikely(!tx_info->control.vif))
190 return;
191
192 /*
193 * Hardware should insert sequence counter.
194 * FIXME: We insert a software sequence counter first for
195 * hardware that doesn't support hardware sequence counting.
196 *
197 * This is wrong because beacons are not getting sequence
198 * numbers assigned properly.
199 *
200 * A secondary problem exists for drivers that cannot toggle
201 * sequence counting per-frame, since those will override the
202 * sequence counter given by mac80211.
203 */
204 spin_lock_irqsave(&intf->seqlock, irqflags);
205
206 if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
207 intf->seqno += 0x10;
208 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
209 hdr->seq_ctrl |= cpu_to_le16(intf->seqno);
210
211 spin_unlock_irqrestore(&intf->seqlock, irqflags);
212
213 __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
214}
215
216static void rt2x00queue_create_tx_descriptor_plcp(struct queue_entry *entry,
217 struct txentry_desc *txdesc,
218 const struct rt2x00_rate *hwrate)
219{
220 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
221 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
222 struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
223 unsigned int data_length;
224 unsigned int duration;
225 unsigned int residual;
226
227 /* Data length + CRC + Crypto overhead (IV/EIV/ICV/MIC) */
228 data_length = entry->skb->len + 4;
229 data_length += rt2x00crypto_tx_overhead(rt2x00dev, entry->skb);
230
231 /*
232 * PLCP setup
233 * Length calculation depends on OFDM/CCK rate.
234 */
235 txdesc->signal = hwrate->plcp;
236 txdesc->service = 0x04;
237
238 if (hwrate->flags & DEV_RATE_OFDM) {
239 txdesc->length_high = (data_length >> 6) & 0x3f;
240 txdesc->length_low = data_length & 0x3f;
241 } else {
242 /*
243 * Convert length to microseconds.
244 */
245 residual = GET_DURATION_RES(data_length, hwrate->bitrate);
246 duration = GET_DURATION(data_length, hwrate->bitrate);
247
248 if (residual != 0) {
249 duration++;
250
251 /*
252 * Check if we need to set the Length Extension
253 */
254 if (hwrate->bitrate == 110 && residual <= 30)
255 txdesc->service |= 0x80;
256 }
257
258 txdesc->length_high = (duration >> 8) & 0xff;
259 txdesc->length_low = duration & 0xff;
260
261 /*
262 * When preamble is enabled we should set the
263 * preamble bit for the signal.
264 */
265 if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
266 txdesc->signal |= 0x08;
267 }
268}
269
bd88a781
ID
270static void rt2x00queue_create_tx_descriptor(struct queue_entry *entry,
271 struct txentry_desc *txdesc)
7050ec82 272{
2e92e6f2 273 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
e039fa4a 274 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
7050ec82 275 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
2e92e6f2 276 struct ieee80211_rate *rate =
e039fa4a 277 ieee80211_get_tx_rate(rt2x00dev->hw, tx_info);
7050ec82 278 const struct rt2x00_rate *hwrate;
7050ec82
ID
279
280 memset(txdesc, 0, sizeof(*txdesc));
281
282 /*
283 * Initialize information from queue
284 */
285 txdesc->queue = entry->queue->qid;
286 txdesc->cw_min = entry->queue->cw_min;
287 txdesc->cw_max = entry->queue->cw_max;
288 txdesc->aifs = entry->queue->aifs;
289
9f166171
ID
290 /*
291 * Header and alignment information.
292 */
293 txdesc->header_length = ieee80211_get_hdrlen_from_skb(entry->skb);
294 txdesc->l2pad = ALIGN_SIZE(entry->skb, txdesc->header_length);
295
7050ec82
ID
296 /*
297 * Check whether this frame is to be acked.
298 */
e039fa4a 299 if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK))
7050ec82
ID
300 __set_bit(ENTRY_TXD_ACK, &txdesc->flags);
301
302 /*
303 * Check if this is a RTS/CTS frame
304 */
ac104462
ID
305 if (ieee80211_is_rts(hdr->frame_control) ||
306 ieee80211_is_cts(hdr->frame_control)) {
7050ec82 307 __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
ac104462 308 if (ieee80211_is_rts(hdr->frame_control))
7050ec82 309 __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags);
e039fa4a 310 else
7050ec82 311 __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags);
e039fa4a 312 if (tx_info->control.rts_cts_rate_idx >= 0)
2e92e6f2 313 rate =
e039fa4a 314 ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info);
7050ec82
ID
315 }
316
317 /*
318 * Determine retry information.
319 */
e6a9854b 320 txdesc->retry_limit = tx_info->control.rates[0].count - 1;
42c82857 321 if (txdesc->retry_limit >= rt2x00dev->long_retry)
7050ec82
ID
322 __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
323
324 /*
325 * Check if more fragments are pending
326 */
8b7b1e05 327 if (ieee80211_has_morefrags(hdr->frame_control)) {
7050ec82
ID
328 __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
329 __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags);
330 }
331
332 /*
333 * Beacons and probe responses require the tsf timestamp
334 * to be inserted into the frame.
335 */
ac104462
ID
336 if (ieee80211_is_beacon(hdr->frame_control) ||
337 ieee80211_is_probe_resp(hdr->frame_control))
7050ec82
ID
338 __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
339
340 /*
341 * Determine with what IFS priority this frame should be send.
342 * Set ifs to IFS_SIFS when the this is not the first fragment,
343 * or this fragment came after RTS/CTS.
344 */
7b40982e
ID
345 if ((tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) &&
346 !test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags)) {
7050ec82
ID
347 __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags);
348 txdesc->ifs = IFS_BACKOFF;
7b40982e 349 } else
7050ec82 350 txdesc->ifs = IFS_SIFS;
7050ec82 351
076f9582
ID
352 /*
353 * Determine rate modulation.
354 */
7050ec82 355 hwrate = rt2x00_get_rate(rate->hw_value);
076f9582 356 txdesc->rate_mode = RATE_MODE_CCK;
7b40982e 357 if (hwrate->flags & DEV_RATE_OFDM)
076f9582 358 txdesc->rate_mode = RATE_MODE_OFDM;
7050ec82 359
7b40982e
ID
360 /*
361 * Apply TX descriptor handling by components
362 */
363 rt2x00crypto_create_tx_descriptor(entry, txdesc);
364 rt2x00queue_create_tx_descriptor_seq(entry, txdesc);
365 rt2x00queue_create_tx_descriptor_plcp(entry, txdesc, hwrate);
7050ec82 366}
7050ec82 367
bd88a781
ID
368static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
369 struct txentry_desc *txdesc)
7050ec82 370{
b869767b
ID
371 struct data_queue *queue = entry->queue;
372 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
7050ec82
ID
373
374 rt2x00dev->ops->lib->write_tx_desc(rt2x00dev, entry->skb, txdesc);
375
376 /*
377 * All processing on the frame has been completed, this means
378 * it is now ready to be dumped to userspace through debugfs.
379 */
380 rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_TX, entry->skb);
381
382 /*
b869767b
ID
383 * Check if we need to kick the queue, there are however a few rules
384 * 1) Don't kick beacon queue
385 * 2) Don't kick unless this is the last in frame in a burst.
386 * When the burst flag is set, this frame is always followed
387 * by another frame which in some way are related to eachother.
388 * This is true for fragments, RTS or CTS-to-self frames.
389 * 3) Rule 2 can be broken when the available entries
390 * in the queue are less then a certain threshold.
7050ec82 391 */
b869767b
ID
392 if (entry->queue->qid == QID_BEACON)
393 return;
394
395 if (rt2x00queue_threshold(queue) ||
396 !test_bit(ENTRY_TXD_BURST, &txdesc->flags))
397 rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, queue->qid);
7050ec82 398}
7050ec82 399
6db3786a
ID
400int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb)
401{
e6a9854b 402 struct ieee80211_tx_info *tx_info;
6db3786a
ID
403 struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX);
404 struct txentry_desc txdesc;
d74f5ba4 405 struct skb_frame_desc *skbdesc;
e6a9854b 406 u8 rate_idx, rate_flags;
6db3786a
ID
407
408 if (unlikely(rt2x00queue_full(queue)))
0e3de998 409 return -ENOBUFS;
6db3786a 410
0262ab0d 411 if (test_and_set_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags)) {
6db3786a
ID
412 ERROR(queue->rt2x00dev,
413 "Arrived at non-free entry in the non-full queue %d.\n"
414 "Please file bug report to %s.\n",
415 queue->qid, DRV_PROJECT);
416 return -EINVAL;
417 }
418
419 /*
420 * Copy all TX descriptor information into txdesc,
421 * after that we are free to use the skb->cb array
422 * for our information.
423 */
424 entry->skb = skb;
425 rt2x00queue_create_tx_descriptor(entry, &txdesc);
426
d74f5ba4 427 /*
e6a9854b 428 * All information is retrieved from the skb->cb array,
2bb057d0 429 * now we should claim ownership of the driver part of that
e6a9854b 430 * array, preserving the bitrate index and flags.
d74f5ba4 431 */
e6a9854b
JB
432 tx_info = IEEE80211_SKB_CB(skb);
433 rate_idx = tx_info->control.rates[0].idx;
434 rate_flags = tx_info->control.rates[0].flags;
0e3de998 435 skbdesc = get_skb_frame_desc(skb);
d74f5ba4
ID
436 memset(skbdesc, 0, sizeof(*skbdesc));
437 skbdesc->entry = entry;
e6a9854b
JB
438 skbdesc->tx_rate_idx = rate_idx;
439 skbdesc->tx_rate_flags = rate_flags;
d74f5ba4 440
2bb057d0
ID
441 /*
442 * When hardware encryption is supported, and this frame
443 * is to be encrypted, we should strip the IV/EIV data from
444 * the frame so we can provide it to the driver seperately.
445 */
446 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
dddfb478 447 !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
3f787bd6 448 if (test_bit(DRIVER_REQUIRE_COPY_IV, &queue->rt2x00dev->flags))
9eb4e21e 449 rt2x00crypto_tx_copy_iv(skb, &txdesc);
dddfb478 450 else
9eb4e21e 451 rt2x00crypto_tx_remove_iv(skb, &txdesc);
dddfb478 452 }
2bb057d0 453
9f166171
ID
454 if (test_bit(DRIVER_REQUIRE_L2PAD, &queue->rt2x00dev->flags))
455 rt2x00queue_payload_align(entry->skb, true,
456 txdesc.header_length);
457
2bb057d0
ID
458 /*
459 * It could be possible that the queue was corrupted and this
0e3de998
ID
460 * call failed. Since we always return NETDEV_TX_OK to mac80211,
461 * this frame will simply be dropped.
2bb057d0 462 */
6db3786a 463 if (unlikely(queue->rt2x00dev->ops->lib->write_tx_data(entry))) {
0262ab0d 464 clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
2bb057d0 465 entry->skb = NULL;
0e3de998 466 return -EIO;
6db3786a
ID
467 }
468
d74f5ba4
ID
469 if (test_bit(DRIVER_REQUIRE_DMA, &queue->rt2x00dev->flags))
470 rt2x00queue_map_txskb(queue->rt2x00dev, skb);
471
0262ab0d 472 set_bit(ENTRY_DATA_PENDING, &entry->flags);
6db3786a
ID
473
474 rt2x00queue_index_inc(queue, Q_INDEX);
475 rt2x00queue_write_tx_descriptor(entry, &txdesc);
476
477 return 0;
478}
479
bd88a781 480int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev,
a2c9b652
ID
481 struct ieee80211_vif *vif,
482 const bool enable_beacon)
bd88a781
ID
483{
484 struct rt2x00_intf *intf = vif_to_intf(vif);
485 struct skb_frame_desc *skbdesc;
486 struct txentry_desc txdesc;
487 __le32 desc[16];
488
489 if (unlikely(!intf->beacon))
490 return -ENOBUFS;
491
a2c9b652
ID
492 if (!enable_beacon) {
493 rt2x00dev->ops->lib->kill_tx_queue(rt2x00dev, QID_BEACON);
494 return 0;
495 }
496
bd88a781
ID
497 intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif);
498 if (!intf->beacon->skb)
499 return -ENOMEM;
500
501 /*
502 * Copy all TX descriptor information into txdesc,
503 * after that we are free to use the skb->cb array
504 * for our information.
505 */
506 rt2x00queue_create_tx_descriptor(intf->beacon, &txdesc);
507
508 /*
509 * For the descriptor we use a local array from where the
510 * driver can move it to the correct location required for
511 * the hardware.
512 */
513 memset(desc, 0, sizeof(desc));
514
515 /*
516 * Fill in skb descriptor
517 */
518 skbdesc = get_skb_frame_desc(intf->beacon->skb);
519 memset(skbdesc, 0, sizeof(*skbdesc));
520 skbdesc->desc = desc;
521 skbdesc->desc_len = intf->beacon->queue->desc_size;
522 skbdesc->entry = intf->beacon;
523
524 /*
525 * Write TX descriptor into reserved room in front of the beacon.
526 */
527 rt2x00queue_write_tx_descriptor(intf->beacon, &txdesc);
528
529 /*
530 * Send beacon to hardware.
531 * Also enable beacon generation, which might have been disabled
532 * by the driver during the config_beacon() callback function.
533 */
534 rt2x00dev->ops->lib->write_beacon(intf->beacon);
535 rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, QID_BEACON);
536
537 return 0;
538}
539
181d6902 540struct data_queue *rt2x00queue_get_queue(struct rt2x00_dev *rt2x00dev,
e58c6aca 541 const enum data_queue_qid queue)
181d6902
ID
542{
543 int atim = test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
544
a2c9b652
ID
545 if (queue == QID_RX)
546 return rt2x00dev->rx;
547
61448f88 548 if (queue < rt2x00dev->ops->tx_queues && rt2x00dev->tx)
181d6902
ID
549 return &rt2x00dev->tx[queue];
550
551 if (!rt2x00dev->bcn)
552 return NULL;
553
e58c6aca 554 if (queue == QID_BEACON)
181d6902 555 return &rt2x00dev->bcn[0];
e58c6aca 556 else if (queue == QID_ATIM && atim)
181d6902
ID
557 return &rt2x00dev->bcn[1];
558
559 return NULL;
560}
561EXPORT_SYMBOL_GPL(rt2x00queue_get_queue);
562
563struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
564 enum queue_index index)
565{
566 struct queue_entry *entry;
5f46c4d0 567 unsigned long irqflags;
181d6902
ID
568
569 if (unlikely(index >= Q_INDEX_MAX)) {
570 ERROR(queue->rt2x00dev,
571 "Entry requested from invalid index type (%d)\n", index);
572 return NULL;
573 }
574
5f46c4d0 575 spin_lock_irqsave(&queue->lock, irqflags);
181d6902
ID
576
577 entry = &queue->entries[queue->index[index]];
578
5f46c4d0 579 spin_unlock_irqrestore(&queue->lock, irqflags);
181d6902
ID
580
581 return entry;
582}
583EXPORT_SYMBOL_GPL(rt2x00queue_get_entry);
584
585void rt2x00queue_index_inc(struct data_queue *queue, enum queue_index index)
586{
5f46c4d0
ID
587 unsigned long irqflags;
588
181d6902
ID
589 if (unlikely(index >= Q_INDEX_MAX)) {
590 ERROR(queue->rt2x00dev,
591 "Index change on invalid index type (%d)\n", index);
592 return;
593 }
594
5f46c4d0 595 spin_lock_irqsave(&queue->lock, irqflags);
181d6902
ID
596
597 queue->index[index]++;
598 if (queue->index[index] >= queue->limit)
599 queue->index[index] = 0;
600
10b6b801
ID
601 if (index == Q_INDEX) {
602 queue->length++;
603 } else if (index == Q_INDEX_DONE) {
604 queue->length--;
55887511 605 queue->count++;
10b6b801 606 }
181d6902 607
5f46c4d0 608 spin_unlock_irqrestore(&queue->lock, irqflags);
181d6902 609}
181d6902
ID
610
611static void rt2x00queue_reset(struct data_queue *queue)
612{
5f46c4d0
ID
613 unsigned long irqflags;
614
615 spin_lock_irqsave(&queue->lock, irqflags);
181d6902
ID
616
617 queue->count = 0;
618 queue->length = 0;
619 memset(queue->index, 0, sizeof(queue->index));
620
5f46c4d0 621 spin_unlock_irqrestore(&queue->lock, irqflags);
181d6902
ID
622}
623
a2c9b652
ID
624void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev)
625{
626 struct data_queue *queue;
627
628 txall_queue_for_each(rt2x00dev, queue)
629 rt2x00dev->ops->lib->kill_tx_queue(rt2x00dev, queue->qid);
630}
631
798b7adb 632void rt2x00queue_init_queues(struct rt2x00_dev *rt2x00dev)
181d6902
ID
633{
634 struct data_queue *queue;
635 unsigned int i;
636
798b7adb 637 queue_for_each(rt2x00dev, queue) {
181d6902
ID
638 rt2x00queue_reset(queue);
639
9c0ab712
ID
640 for (i = 0; i < queue->limit; i++) {
641 queue->entries[i].flags = 0;
642
798b7adb 643 rt2x00dev->ops->lib->clear_entry(&queue->entries[i]);
9c0ab712 644 }
181d6902
ID
645 }
646}
647
648static int rt2x00queue_alloc_entries(struct data_queue *queue,
649 const struct data_queue_desc *qdesc)
650{
651 struct queue_entry *entries;
652 unsigned int entry_size;
653 unsigned int i;
654
655 rt2x00queue_reset(queue);
656
657 queue->limit = qdesc->entry_num;
b869767b 658 queue->threshold = DIV_ROUND_UP(qdesc->entry_num, 10);
181d6902
ID
659 queue->data_size = qdesc->data_size;
660 queue->desc_size = qdesc->desc_size;
661
662 /*
663 * Allocate all queue entries.
664 */
665 entry_size = sizeof(*entries) + qdesc->priv_size;
666 entries = kzalloc(queue->limit * entry_size, GFP_KERNEL);
667 if (!entries)
668 return -ENOMEM;
669
670#define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
231be4e9
AB
671 ( ((char *)(__base)) + ((__limit) * (__esize)) + \
672 ((__index) * (__psize)) )
181d6902
ID
673
674 for (i = 0; i < queue->limit; i++) {
675 entries[i].flags = 0;
676 entries[i].queue = queue;
677 entries[i].skb = NULL;
678 entries[i].entry_idx = i;
679 entries[i].priv_data =
680 QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit,
681 sizeof(*entries), qdesc->priv_size);
682 }
683
684#undef QUEUE_ENTRY_PRIV_OFFSET
685
686 queue->entries = entries;
687
688 return 0;
689}
690
c4da0048
GW
691static void rt2x00queue_free_skbs(struct rt2x00_dev *rt2x00dev,
692 struct data_queue *queue)
30caa6e3
GW
693{
694 unsigned int i;
695
696 if (!queue->entries)
697 return;
698
699 for (i = 0; i < queue->limit; i++) {
700 if (queue->entries[i].skb)
c4da0048 701 rt2x00queue_free_skb(rt2x00dev, queue->entries[i].skb);
30caa6e3
GW
702 }
703}
704
c4da0048
GW
705static int rt2x00queue_alloc_rxskbs(struct rt2x00_dev *rt2x00dev,
706 struct data_queue *queue)
30caa6e3
GW
707{
708 unsigned int i;
709 struct sk_buff *skb;
710
711 for (i = 0; i < queue->limit; i++) {
c4da0048 712 skb = rt2x00queue_alloc_rxskb(rt2x00dev, &queue->entries[i]);
30caa6e3 713 if (!skb)
61243d8e 714 return -ENOMEM;
30caa6e3
GW
715 queue->entries[i].skb = skb;
716 }
717
718 return 0;
30caa6e3
GW
719}
720
181d6902
ID
721int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev)
722{
723 struct data_queue *queue;
724 int status;
725
181d6902
ID
726 status = rt2x00queue_alloc_entries(rt2x00dev->rx, rt2x00dev->ops->rx);
727 if (status)
728 goto exit;
729
730 tx_queue_for_each(rt2x00dev, queue) {
731 status = rt2x00queue_alloc_entries(queue, rt2x00dev->ops->tx);
732 if (status)
733 goto exit;
734 }
735
736 status = rt2x00queue_alloc_entries(rt2x00dev->bcn, rt2x00dev->ops->bcn);
737 if (status)
738 goto exit;
739
30caa6e3
GW
740 if (test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags)) {
741 status = rt2x00queue_alloc_entries(&rt2x00dev->bcn[1],
742 rt2x00dev->ops->atim);
743 if (status)
744 goto exit;
745 }
181d6902 746
c4da0048 747 status = rt2x00queue_alloc_rxskbs(rt2x00dev, rt2x00dev->rx);
181d6902
ID
748 if (status)
749 goto exit;
750
751 return 0;
752
753exit:
754 ERROR(rt2x00dev, "Queue entries allocation failed.\n");
755
756 rt2x00queue_uninitialize(rt2x00dev);
757
758 return status;
759}
760
761void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
762{
763 struct data_queue *queue;
764
c4da0048 765 rt2x00queue_free_skbs(rt2x00dev, rt2x00dev->rx);
30caa6e3 766
181d6902
ID
767 queue_for_each(rt2x00dev, queue) {
768 kfree(queue->entries);
769 queue->entries = NULL;
770 }
771}
772
8f539276
ID
773static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
774 struct data_queue *queue, enum data_queue_qid qid)
775{
776 spin_lock_init(&queue->lock);
777
778 queue->rt2x00dev = rt2x00dev;
779 queue->qid = qid;
2af0a570 780 queue->txop = 0;
8f539276
ID
781 queue->aifs = 2;
782 queue->cw_min = 5;
783 queue->cw_max = 10;
784}
785
181d6902
ID
786int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
787{
788 struct data_queue *queue;
789 enum data_queue_qid qid;
790 unsigned int req_atim =
791 !!test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
792
793 /*
794 * We need the following queues:
795 * RX: 1
61448f88 796 * TX: ops->tx_queues
181d6902
ID
797 * Beacon: 1
798 * Atim: 1 (if required)
799 */
61448f88 800 rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim;
181d6902
ID
801
802 queue = kzalloc(rt2x00dev->data_queues * sizeof(*queue), GFP_KERNEL);
803 if (!queue) {
804 ERROR(rt2x00dev, "Queue allocation failed.\n");
805 return -ENOMEM;
806 }
807
808 /*
809 * Initialize pointers
810 */
811 rt2x00dev->rx = queue;
812 rt2x00dev->tx = &queue[1];
61448f88 813 rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues];
181d6902
ID
814
815 /*
816 * Initialize queue parameters.
817 * RX: qid = QID_RX
818 * TX: qid = QID_AC_BE + index
819 * TX: cw_min: 2^5 = 32.
820 * TX: cw_max: 2^10 = 1024.
565a019a
ID
821 * BCN: qid = QID_BEACON
822 * ATIM: qid = QID_ATIM
181d6902 823 */
8f539276 824 rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
181d6902 825
8f539276
ID
826 qid = QID_AC_BE;
827 tx_queue_for_each(rt2x00dev, queue)
828 rt2x00queue_init(rt2x00dev, queue, qid++);
181d6902 829
565a019a 830 rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[0], QID_BEACON);
181d6902 831 if (req_atim)
565a019a 832 rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[1], QID_ATIM);
181d6902
ID
833
834 return 0;
835}
836
837void rt2x00queue_free(struct rt2x00_dev *rt2x00dev)
838{
839 kfree(rt2x00dev->rx);
840 rt2x00dev->rx = NULL;
841 rt2x00dev->tx = NULL;
842 rt2x00dev->bcn = NULL;
843}