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Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
[net-next-2.6.git] / drivers / net / wireless / p54 / fwio.c
CommitLineData
76074e16
CL		 1/*
2 * Firmware I/O code for mac80211 Prism54 drivers
3 *
4 * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
5 * Copyright (c) 2007-2009, Christian Lamparter <chunkeey@web.de>
6 * Copyright 2008, Johannes Berg <johannes@sipsolutions.net>
7 *
8 * Based on:
9 * - the islsm (softmac prism54) driver, which is:
10 * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
11 * - stlc45xx driver
12 * Copyright (C) 2008 Nokia Corporation and/or its subsidiary(-ies).
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17 */
18
19#include <linux/init.h>
5a0e3ad6 20#include <linux/slab.h>
76074e16
CL		 21#include <linux/firmware.h>
22#include <linux/etherdevice.h>
23
24#include <net/mac80211.h>
25
26#include "p54.h"
27#include "eeprom.h"
28#include "lmac.h"
29
30int p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw)
31{
32 struct p54_common *priv = dev->priv;
33 struct exp_if *exp_if;
34 struct bootrec *bootrec;
35 u32 *data = (u32 *)fw->data;
36 u32 *end_data = (u32 *)fw->data + (fw->size >> 2);
37 u8 *fw_version = NULL;
38 size_t len;
39 int i;
40 int maxlen;
41
42 if (priv->rx_start)
43 return 0;
44
45 while (data < end_data && *data)
46 data++;
47
48 while (data < end_data && !*data)
49 data++;
50
51 bootrec = (struct bootrec *) data;
52
53 while (bootrec->data <= end_data && (bootrec->data +
54 (len = le32_to_cpu(bootrec->len))) <= end_data) {
55 u32 code = le32_to_cpu(bootrec->code);
56 switch (code) {
57 case BR_CODE_COMPONENT_ID:
58 priv->fw_interface = be32_to_cpup((__be32 *)
59 bootrec->data);
60 switch (priv->fw_interface) {
61 case FW_LM86:
62 case FW_LM20:
63 case FW_LM87: {
64 char *iftype = (char *)bootrec->data;
c96c31e4
JP		 65 wiphy_info(priv->hw->wiphy,
66 "p54 detected a LM%c%c firmware\n",
67 iftype[2], iftype[3]);
76074e16
CL		 68 break;
69 }
70 case FW_FMAC:
71 default:
c96c31e4
JP		 72 wiphy_err(priv->hw->wiphy,
73 "unsupported firmware\n");
76074e16
CL		 74 return -ENODEV;
75 }
76 break;
77 case BR_CODE_COMPONENT_VERSION:
78 /* 24 bytes should be enough for all firmwares */
79 if (strnlen((unsigned char *) bootrec->data, 24) < 24)
80 fw_version = (unsigned char *) bootrec->data;
81 break;
82 case BR_CODE_DESCR: {
83 struct bootrec_desc *desc =
84 (struct bootrec_desc *)bootrec->data;
85 priv->rx_start = le32_to_cpu(desc->rx_start);
86 /* FIXME add sanity checking */
87 priv->rx_end = le32_to_cpu(desc->rx_end) - 0x3500;
88 priv->headroom = desc->headroom;
89 priv->tailroom = desc->tailroom;
90 priv->privacy_caps = desc->privacy_caps;
91 priv->rx_keycache_size = desc->rx_keycache_size;
92 if (le32_to_cpu(bootrec->len) == 11)
93 priv->rx_mtu = le16_to_cpu(desc->rx_mtu);
94 else
95 priv->rx_mtu = (size_t)
96 0x620 - priv->tx_hdr_len;
97 maxlen = priv->tx_hdr_len + /* USB devices */
98 sizeof(struct p54_rx_data) +
99 4 + /* rx alignment */
100 IEEE80211_MAX_FRAG_THRESHOLD;
101 if (priv->rx_mtu > maxlen && PAGE_SIZE == 4096) {
102 printk(KERN_INFO "p54: rx_mtu reduced from %d "
103 "to %d\n", priv->rx_mtu, maxlen);
104 priv->rx_mtu = maxlen;
105 }
106 break;
107 }
108 case BR_CODE_EXPOSED_IF:
109 exp_if = (struct exp_if *) bootrec->data;
110 for (i = 0; i < (len * sizeof(*exp_if) / 4); i++)
111 if (exp_if[i].if_id == cpu_to_le16(IF_ID_LMAC))
112 priv->fw_var = le16_to_cpu(exp_if[i].variant);
113 break;
114 case BR_CODE_DEPENDENT_IF:
115 break;
116 case BR_CODE_END_OF_BRA:
117 case LEGACY_BR_CODE_END_OF_BRA:
118 end_data = NULL;
119 break;
120 default:
121 break;
122 }
123 bootrec = (struct bootrec *)&bootrec->data[len];
124 }
125
37269e80 126 if (fw_version) {
c96c31e4 127 wiphy_info(priv->hw->wiphy,
5db55844 128 "FW rev %s - Softmac protocol %x.%x\n",
c96c31e4 129 fw_version, priv->fw_var >> 8, priv->fw_var & 0xff);
37269e80
JL		 130 snprintf(dev->wiphy->fw_version, sizeof(dev->wiphy->fw_version),
131 "%s - %x.%x", fw_version,
132 priv->fw_var >> 8, priv->fw_var & 0xff);
133 }
76074e16
CL		 134
135 if (priv->fw_var < 0x500)
c96c31e4
JP		 136 wiphy_info(priv->hw->wiphy,
137 "you are using an obsolete firmware. "
138 "visit http://wireless.kernel.org/en/users/Drivers/p54 "
139 "and grab one for \"kernel >= 2.6.28\"!\n");
76074e16
CL		 140
141 if (priv->fw_var >= 0x300) {
142 /* Firmware supports QoS, use it! */
143
144 if (priv->fw_var >= 0x500) {
145 priv->tx_stats[P54_QUEUE_AC_VO].limit = 16;
146 priv->tx_stats[P54_QUEUE_AC_VI].limit = 16;
147 priv->tx_stats[P54_QUEUE_AC_BE].limit = 16;
148 priv->tx_stats[P54_QUEUE_AC_BK].limit = 16;
149 } else {
150 priv->tx_stats[P54_QUEUE_AC_VO].limit = 3;
151 priv->tx_stats[P54_QUEUE_AC_VI].limit = 4;
152 priv->tx_stats[P54_QUEUE_AC_BE].limit = 3;
153 priv->tx_stats[P54_QUEUE_AC_BK].limit = 2;
154 }
155 priv->hw->queues = P54_QUEUE_AC_NUM;
156 }
157
c96c31e4
JP		 158 wiphy_info(priv->hw->wiphy,
159 "cryptographic accelerator WEP:%s, TKIP:%s, CCMP:%s\n",
160 (priv->privacy_caps & BR_DESC_PRIV_CAP_WEP) ? "YES" : "no",
161 (priv->privacy_caps &
162 (BR_DESC_PRIV_CAP_TKIP | BR_DESC_PRIV_CAP_MICHAEL))
163 ? "YES" : "no",
164 (priv->privacy_caps & BR_DESC_PRIV_CAP_AESCCMP)
165 ? "YES" : "no");
76074e16
CL		 166
167 if (priv->rx_keycache_size) {
168 /*
169 * NOTE:
170 *
171 * The firmware provides at most 255 (0 - 254) slots
172 * for keys which are then used to offload decryption.
173 * As a result the 255 entry (aka 0xff) can be used
174 * safely by the driver to mark keys that didn't fit
175 * into the full cache. This trick saves us from
176 * keeping a extra list for uploaded keys.
177 */
178
179 priv->used_rxkeys = kzalloc(BITS_TO_LONGS(
180 priv->rx_keycache_size), GFP_KERNEL);
181
182 if (!priv->used_rxkeys)
183 return -ENOMEM;
184 }
185
186 return 0;
187}
188EXPORT_SYMBOL_GPL(p54_parse_firmware);
189
190static struct sk_buff *p54_alloc_skb(struct p54_common *priv, u16 hdr_flags,
191 u16 payload_len, u16 type, gfp_t memflags)
192{
193 struct p54_hdr *hdr;
194 struct sk_buff *skb;
195 size_t frame_len = sizeof(*hdr) + payload_len;
196
197 if (frame_len > P54_MAX_CTRL_FRAME_LEN)
198 return NULL;
199
200 if (unlikely(skb_queue_len(&priv->tx_pending) > 64))
201 return NULL;
202
203 skb = __dev_alloc_skb(priv->tx_hdr_len + frame_len, memflags);
204 if (!skb)
205 return NULL;
206 skb_reserve(skb, priv->tx_hdr_len);
207
208 hdr = (struct p54_hdr *) skb_put(skb, sizeof(*hdr));
209 hdr->flags = cpu_to_le16(hdr_flags);
210 hdr->len = cpu_to_le16(payload_len);
211 hdr->type = cpu_to_le16(type);
212 hdr->tries = hdr->rts_tries = 0;
213 return skb;
214}
215
216int p54_download_eeprom(struct p54_common *priv, void *buf,
217 u16 offset, u16 len)
218{
219 struct p54_eeprom_lm86 *eeprom_hdr;
220 struct sk_buff *skb;
221 size_t eeprom_hdr_size;
222 int ret = 0;
223
224 if (priv->fw_var >= 0x509)
225 eeprom_hdr_size = sizeof(*eeprom_hdr);
226 else
227 eeprom_hdr_size = 0x4;
228
229 skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL, eeprom_hdr_size +
230 len, P54_CONTROL_TYPE_EEPROM_READBACK,
231 GFP_KERNEL);
232 if (unlikely(!skb))
233 return -ENOMEM;
234
235 mutex_lock(&priv->eeprom_mutex);
236 priv->eeprom = buf;
237 eeprom_hdr = (struct p54_eeprom_lm86 *) skb_put(skb,
238 eeprom_hdr_size + len);
239
240 if (priv->fw_var < 0x509) {
241 eeprom_hdr->v1.offset = cpu_to_le16(offset);
242 eeprom_hdr->v1.len = cpu_to_le16(len);
243 } else {
244 eeprom_hdr->v2.offset = cpu_to_le32(offset);
245 eeprom_hdr->v2.len = cpu_to_le16(len);
246 eeprom_hdr->v2.magic2 = 0xf;
247 memcpy(eeprom_hdr->v2.magic, (const char *)"LOCK", 4);
248 }
249
250 p54_tx(priv, skb);
251
252 if (!wait_for_completion_interruptible_timeout(
253 &priv->eeprom_comp, HZ)) {
c96c31e4 254 wiphy_err(priv->hw->wiphy, "device does not respond!\n");
76074e16
CL		 255 ret = -EBUSY;
256 }
257 priv->eeprom = NULL;
258 mutex_unlock(&priv->eeprom_mutex);
259 return ret;
260}
261
262int p54_update_beacon_tim(struct p54_common *priv, u16 aid, bool set)
263{
264 struct sk_buff *skb;
265 struct p54_tim *tim;
266
267 skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*tim),
268 P54_CONTROL_TYPE_TIM, GFP_ATOMIC);
269 if (unlikely(!skb))
270 return -ENOMEM;
271
272 tim = (struct p54_tim *) skb_put(skb, sizeof(*tim));
273 tim->count = 1;
274 tim->entry[0] = cpu_to_le16(set ? (aid | 0x8000) : aid);
275 p54_tx(priv, skb);
276 return 0;
277}
278
279int p54_sta_unlock(struct p54_common *priv, u8 *addr)
280{
281 struct sk_buff *skb;
282 struct p54_sta_unlock *sta;
283
284 skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*sta),
285 P54_CONTROL_TYPE_PSM_STA_UNLOCK, GFP_ATOMIC);
286 if (unlikely(!skb))
287 return -ENOMEM;
288
289 sta = (struct p54_sta_unlock *)skb_put(skb, sizeof(*sta));
290 memcpy(sta->addr, addr, ETH_ALEN);
291 p54_tx(priv, skb);
292 return 0;
293}
294
295int p54_tx_cancel(struct p54_common *priv, __le32 req_id)
296{
297 struct sk_buff *skb;
298 struct p54_txcancel *cancel;
a7eee06b 299 u32 _req_id = le32_to_cpu(req_id);
76074e16 300
a7eee06b 301 if (unlikely(_req_id < priv->rx_start || _req_id > priv->rx_end))
76074e16
CL		 302 return -EINVAL;
303
304 skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*cancel),
305 P54_CONTROL_TYPE_TXCANCEL, GFP_ATOMIC);
306 if (unlikely(!skb))
307 return -ENOMEM;
308
309 cancel = (struct p54_txcancel *)skb_put(skb, sizeof(*cancel));
310 cancel->req_id = req_id;
311 p54_tx(priv, skb);
312 return 0;
313}
314
315int p54_setup_mac(struct p54_common *priv)
316{
317 struct sk_buff *skb;
318 struct p54_setup_mac *setup;
319 u16 mode;
320
321 skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*setup),
322 P54_CONTROL_TYPE_SETUP, GFP_ATOMIC);
323 if (!skb)
324 return -ENOMEM;
325
326 setup = (struct p54_setup_mac *) skb_put(skb, sizeof(*setup));
6208f8b2 327 if (!(priv->hw->conf.flags & IEEE80211_CONF_IDLE)) {
76074e16
CL		 328 switch (priv->mode) {
329 case NL80211_IFTYPE_STATION:
330 mode = P54_FILTER_TYPE_STATION;
331 break;
332 case NL80211_IFTYPE_AP:
333 mode = P54_FILTER_TYPE_AP;
334 break;
335 case NL80211_IFTYPE_ADHOC:
336 case NL80211_IFTYPE_MESH_POINT:
337 mode = P54_FILTER_TYPE_IBSS;
338 break;
339 case NL80211_IFTYPE_MONITOR:
340 mode = P54_FILTER_TYPE_PROMISCUOUS;
341 break;
342 default:
343 mode = P54_FILTER_TYPE_HIBERNATE;
344 break;
345 }
346
347 /*
348 * "TRANSPARENT and PROMISCUOUS are mutually exclusive"
349 * STSW45X0C LMAC API - page 12
350 */
351 if (((priv->filter_flags & FIF_PROMISC_IN_BSS) ||
352 (priv->filter_flags & FIF_OTHER_BSS)) &&
353 (mode != P54_FILTER_TYPE_PROMISCUOUS))
354 mode |= P54_FILTER_TYPE_TRANSPARENT;
6208f8b2 355 } else {
76074e16 356 mode = P54_FILTER_TYPE_HIBERNATE;
6208f8b2 357 }
76074e16
CL		 358
359 setup->mac_mode = cpu_to_le16(mode);
360 memcpy(setup->mac_addr, priv->mac_addr, ETH_ALEN);
361 memcpy(setup->bssid, priv->bssid, ETH_ALEN);
362 setup->rx_antenna = 2 & priv->rx_diversity_mask; /* automatic */
363 setup->rx_align = 0;
364 if (priv->fw_var < 0x500) {
365 setup->v1.basic_rate_mask = cpu_to_le32(priv->basic_rate_mask);
366 memset(setup->v1.rts_rates, 0, 8);
367 setup->v1.rx_addr = cpu_to_le32(priv->rx_end);
368 setup->v1.max_rx = cpu_to_le16(priv->rx_mtu);
369 setup->v1.rxhw = cpu_to_le16(priv->rxhw);
370 setup->v1.wakeup_timer = cpu_to_le16(priv->wakeup_timer);
371 setup->v1.unalloc0 = cpu_to_le16(0);
372 } else {
373 setup->v2.rx_addr = cpu_to_le32(priv->rx_end);
374 setup->v2.max_rx = cpu_to_le16(priv->rx_mtu);
375 setup->v2.rxhw = cpu_to_le16(priv->rxhw);
376 setup->v2.timer = cpu_to_le16(priv->wakeup_timer);
377 setup->v2.truncate = cpu_to_le16(48896);
378 setup->v2.basic_rate_mask = cpu_to_le32(priv->basic_rate_mask);
379 setup->v2.sbss_offset = 0;
380 setup->v2.mcast_window = 0;
381 setup->v2.rx_rssi_threshold = 0;
382 setup->v2.rx_ed_threshold = 0;
383 setup->v2.ref_clock = cpu_to_le32(644245094);
384 setup->v2.lpf_bandwidth = cpu_to_le16(65535);
385 setup->v2.osc_start_delay = cpu_to_le16(65535);
386 }
387 p54_tx(priv, skb);
388 return 0;
389}
390
391int p54_scan(struct p54_common *priv, u16 mode, u16 dwell)
392{
393 struct sk_buff *skb;
394 struct p54_hdr *hdr;
395 struct p54_scan_head *head;
396 struct p54_iq_autocal_entry *iq_autocal;
397 union p54_scan_body_union *body;
398 struct p54_scan_tail_rate *rate;
399 struct pda_rssi_cal_entry *rssi;
400 unsigned int i;
401 void *entry;
402 int band = priv->hw->conf.channel->band;
403 __le16 freq = cpu_to_le16(priv->hw->conf.channel->center_freq);
404
405 skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*head) +
406 2 + sizeof(*iq_autocal) + sizeof(*body) +
407 sizeof(*rate) + 2 * sizeof(*rssi),
408 P54_CONTROL_TYPE_SCAN, GFP_ATOMIC);
409 if (!skb)
410 return -ENOMEM;
411
412 head = (struct p54_scan_head *) skb_put(skb, sizeof(*head));
413 memset(head->scan_params, 0, sizeof(head->scan_params));
414 head->mode = cpu_to_le16(mode);
415 head->dwell = cpu_to_le16(dwell);
416 head->freq = freq;
417
418 if (priv->rxhw == PDR_SYNTH_FRONTEND_LONGBOW) {
419 __le16 *pa_power_points = (__le16 *) skb_put(skb, 2);
420 *pa_power_points = cpu_to_le16(0x0c);
421 }
422
423 iq_autocal = (void *) skb_put(skb, sizeof(*iq_autocal));
424 for (i = 0; i < priv->iq_autocal_len; i++) {
425 if (priv->iq_autocal[i].freq != freq)
426 continue;
427
428 memcpy(iq_autocal, &priv->iq_autocal[i].params,
429 sizeof(struct p54_iq_autocal_entry));
430 break;
431 }
432 if (i == priv->iq_autocal_len)
433 goto err;
434
435 if (priv->rxhw == PDR_SYNTH_FRONTEND_LONGBOW)
436 body = (void *) skb_put(skb, sizeof(body->longbow));
437 else
438 body = (void *) skb_put(skb, sizeof(body->normal));
439
440 for (i = 0; i < priv->output_limit->entries; i++) {
441 __le16 *entry_freq = (void *) (priv->output_limit->data +
442 priv->output_limit->entry_size * i);
443
444 if (*entry_freq != freq)
445 continue;
446
447 if (priv->rxhw == PDR_SYNTH_FRONTEND_LONGBOW) {
448 memcpy(&body->longbow.power_limits,
449 (void *) entry_freq + sizeof(__le16),
450 priv->output_limit->entry_size);
451 } else {
452 struct pda_channel_output_limit *limits =
453 (void *) entry_freq;
454
455 body->normal.val_barker = 0x38;
456 body->normal.val_bpsk = body->normal.dup_bpsk =
457 limits->val_bpsk;
458 body->normal.val_qpsk = body->normal.dup_qpsk =
459 limits->val_qpsk;
460 body->normal.val_16qam = body->normal.dup_16qam =
461 limits->val_16qam;
462 body->normal.val_64qam = body->normal.dup_64qam =
463 limits->val_64qam;
464 }
465 break;
466 }
467 if (i == priv->output_limit->entries)
468 goto err;
469
470 entry = (void *)(priv->curve_data->data + priv->curve_data->offset);
471 for (i = 0; i < priv->curve_data->entries; i++) {
472 if (*((__le16 *)entry) != freq) {
473 entry += priv->curve_data->entry_size;
474 continue;
475 }
476
477 if (priv->rxhw == PDR_SYNTH_FRONTEND_LONGBOW) {
478 memcpy(&body->longbow.curve_data,
479 (void *) entry + sizeof(__le16),
480 priv->curve_data->entry_size);
481 } else {
482 struct p54_scan_body *chan = &body->normal;
483 struct pda_pa_curve_data *curve_data =
484 (void *) priv->curve_data->data;
485
486 entry += sizeof(__le16);
487 chan->pa_points_per_curve = 8;
488 memset(chan->curve_data, 0, sizeof(*chan->curve_data));
489 memcpy(chan->curve_data, entry,
490 sizeof(struct p54_pa_curve_data_sample) *
491 min((u8)8, curve_data->points_per_channel));
492 }
493 break;
494 }
495 if (i == priv->curve_data->entries)
496 goto err;
497
498 if ((priv->fw_var >= 0x500) && (priv->fw_var < 0x509)) {
499 rate = (void *) skb_put(skb, sizeof(*rate));
500 rate->basic_rate_mask = cpu_to_le32(priv->basic_rate_mask);
501 for (i = 0; i < sizeof(rate->rts_rates); i++)
502 rate->rts_rates[i] = i;
503 }
504
505 rssi = (struct pda_rssi_cal_entry *) skb_put(skb, sizeof(*rssi));
506 rssi->mul = cpu_to_le16(priv->rssical_db[band].mul);
507 rssi->add = cpu_to_le16(priv->rssical_db[band].add);
508 if (priv->rxhw == PDR_SYNTH_FRONTEND_LONGBOW) {
509 /* Longbow frontend needs ever more */
510 rssi = (void *) skb_put(skb, sizeof(*rssi));
511 rssi->mul = cpu_to_le16(priv->rssical_db[band].longbow_unkn);
512 rssi->add = cpu_to_le16(priv->rssical_db[band].longbow_unk2);
513 }
514
515 if (priv->fw_var >= 0x509) {
516 rate = (void *) skb_put(skb, sizeof(*rate));
517 rate->basic_rate_mask = cpu_to_le32(priv->basic_rate_mask);
518 for (i = 0; i < sizeof(rate->rts_rates); i++)
519 rate->rts_rates[i] = i;
520 }
521
522 hdr = (struct p54_hdr *) skb->data;
523 hdr->len = cpu_to_le16(skb->len - sizeof(*hdr));
524
525 p54_tx(priv, skb);
526 return 0;
527
528err:
c96c31e4
JP		 529 wiphy_err(priv->hw->wiphy, "frequency change to channel %d failed.\n",
530 ieee80211_frequency_to_channel(
531 priv->hw->conf.channel->center_freq));
76074e16
CL		 532
533 dev_kfree_skb_any(skb);
534 return -EINVAL;
535}
536
537int p54_set_leds(struct p54_common *priv)
538{
539 struct sk_buff *skb;
540 struct p54_led *led;
541
542 skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*led),
543 P54_CONTROL_TYPE_LED, GFP_ATOMIC);
544 if (unlikely(!skb))
545 return -ENOMEM;
546
547 led = (struct p54_led *) skb_put(skb, sizeof(*led));
548 led->flags = cpu_to_le16(0x0003);
549 led->mask[0] = led->mask[1] = cpu_to_le16(priv->softled_state);
550 led->delay[0] = cpu_to_le16(1);
551 led->delay[1] = cpu_to_le16(0);
552 p54_tx(priv, skb);
553 return 0;
554}
555
556int p54_set_edcf(struct p54_common *priv)
557{
558 struct sk_buff *skb;
559 struct p54_edcf *edcf;
560
561 skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*edcf),
562 P54_CONTROL_TYPE_DCFINIT, GFP_ATOMIC);
563 if (unlikely(!skb))
564 return -ENOMEM;
565
566 edcf = (struct p54_edcf *)skb_put(skb, sizeof(*edcf));
567 if (priv->use_short_slot) {
568 edcf->slottime = 9;
569 edcf->sifs = 0x10;
570 edcf->eofpad = 0x00;
571 } else {
572 edcf->slottime = 20;
573 edcf->sifs = 0x0a;
574 edcf->eofpad = 0x06;
575 }
576 /* (see prism54/isl_oid.h for further details) */
577 edcf->frameburst = cpu_to_le16(0);
578 edcf->round_trip_delay = cpu_to_le16(0);
579 edcf->flags = 0;
580 memset(edcf->mapping, 0, sizeof(edcf->mapping));
581 memcpy(edcf->queue, priv->qos_params, sizeof(edcf->queue));
582 p54_tx(priv, skb);
583 return 0;
584}
585
586int p54_set_ps(struct p54_common *priv)
587{
588 struct sk_buff *skb;
589 struct p54_psm *psm;
590 unsigned int i;
591 u16 mode;
592
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CL		 593 if (priv->hw->conf.flags & IEEE80211_CONF_PS &&
594 !priv->powersave_override)
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CL		 595 mode = P54_PSM | P54_PSM_BEACON_TIMEOUT | P54_PSM_DTIM |
596 P54_PSM_CHECKSUM | P54_PSM_MCBC;
597 else
598 mode = P54_PSM_CAM;
599
600 skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*psm),
601 P54_CONTROL_TYPE_PSM, GFP_ATOMIC);
602 if (!skb)
603 return -ENOMEM;
604
605 psm = (struct p54_psm *)skb_put(skb, sizeof(*psm));
606 psm->mode = cpu_to_le16(mode);
607 psm->aid = cpu_to_le16(priv->aid);
608 for (i = 0; i < ARRAY_SIZE(psm->intervals); i++) {
609 psm->intervals[i].interval =
610 cpu_to_le16(priv->hw->conf.listen_interval);
611 psm->intervals[i].periods = cpu_to_le16(1);
612 }
613
614 psm->beacon_rssi_skip_max = 200;
615 psm->rssi_delta_threshold = 0;
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CL		 616 psm->nr = 1;
617 psm->exclude[0] = WLAN_EID_TIM;
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CL		 618
619 p54_tx(priv, skb);
620 return 0;
621}
622
623int p54_init_xbow_synth(struct p54_common *priv)
624{
625 struct sk_buff *skb;
626 struct p54_xbow_synth *xbow;
627
628 skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*xbow),
629 P54_CONTROL_TYPE_XBOW_SYNTH_CFG, GFP_KERNEL);
630 if (unlikely(!skb))
631 return -ENOMEM;
632
633 xbow = (struct p54_xbow_synth *)skb_put(skb, sizeof(*xbow));
634 xbow->magic1 = cpu_to_le16(0x1);
635 xbow->magic2 = cpu_to_le16(0x2);
636 xbow->freq = cpu_to_le16(5390);
637 memset(xbow->padding, 0, sizeof(xbow->padding));
638 p54_tx(priv, skb);
639 return 0;
640}
641
642int p54_upload_key(struct p54_common *priv, u8 algo, int slot, u8 idx, u8 len,
643 u8 *addr, u8* key)
644{
645 struct sk_buff *skb;
646 struct p54_keycache *rxkey;
647
648 skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*rxkey),
649 P54_CONTROL_TYPE_RX_KEYCACHE, GFP_KERNEL);
650 if (unlikely(!skb))
651 return -ENOMEM;
652
653 rxkey = (struct p54_keycache *)skb_put(skb, sizeof(*rxkey));
654 rxkey->entry = slot;
655 rxkey->key_id = idx;
656 rxkey->key_type = algo;
657 if (addr)
658 memcpy(rxkey->mac, addr, ETH_ALEN);
659 else
660 memset(rxkey->mac, ~0, ETH_ALEN);
661
662 switch (algo) {
663 case P54_CRYPTO_WEP:
664 case P54_CRYPTO_AESCCMP:
665 rxkey->key_len = min_t(u8, 16, len);
666 memcpy(rxkey->key, key, rxkey->key_len);
667 break;
668
669 case P54_CRYPTO_TKIPMICHAEL:
670 rxkey->key_len = 24;
671 memcpy(rxkey->key, key, 16);
672 memcpy(&(rxkey->key[16]), &(key
673 [NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY]), 8);
674 break;
675
676 case P54_CRYPTO_NONE:
677 rxkey->key_len = 0;
678 memset(rxkey->key, 0, sizeof(rxkey->key));
679 break;
680
681 default:
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JP		 682 wiphy_err(priv->hw->wiphy,
683 "invalid cryptographic algorithm: %d\n", algo);
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CL		 684 dev_kfree_skb(skb);
685 return -EINVAL;
686 }
687
688 p54_tx(priv, skb);
689 return 0;
690}
691
692int p54_fetch_statistics(struct p54_common *priv)
693{
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CL		 694 struct ieee80211_tx_info *txinfo;
695 struct p54_tx_info *p54info;
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CL		 696 struct sk_buff *skb;
697
698 skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL,
699 sizeof(struct p54_statistics),
700 P54_CONTROL_TYPE_STAT_READBACK, GFP_KERNEL);
701 if (!skb)
702 return -ENOMEM;
703
436b37c5
CL		 704 /*
705 * The statistic feedback causes some extra headaches here, if it
706 * is not to crash/corrupt the firmware data structures.
707 *
708 * Unlike all other Control Get OIDs we can not use helpers like
709 * skb_put to reserve the space for the data we're requesting.
710 * Instead the extra frame length -which will hold the results later-
711 * will only be told to the p54_assign_address, so that following
712 * frames won't be placed into the allegedly empty area.
713 */
714 txinfo = IEEE80211_SKB_CB(skb);
715 p54info = (void *) txinfo->rate_driver_data;
716 p54info->extra_len = sizeof(struct p54_statistics);
717
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CL		 718 p54_tx(priv, skb);
719 return 0;
720}
Clone of davem's net-next-2.6 tree