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Commit | Line | Data |
---|---|---|
876c9d3a MT |
1 | /** |
2 | * This file contains the handling of command | |
3 | * responses as well as events generated by firmware. | |
4 | */ | |
5 | #include <linux/delay.h> | |
6 | #include <linux/if_arp.h> | |
7 | #include <linux/netdevice.h> | |
2c5b9e51 | 8 | #include <asm/unaligned.h> |
876c9d3a MT |
9 | #include <net/iw_handler.h> |
10 | ||
11 | #include "host.h" | |
876c9d3a MT |
12 | #include "decl.h" |
13 | #include "defs.h" | |
14 | #include "dev.h" | |
697900ac | 15 | #include "assoc.h" |
876c9d3a MT |
16 | #include "wext.h" |
17 | ||
18 | /** | |
19 | * @brief This function handles disconnect event. it | |
20 | * reports disconnect to upper layer, clean tx/rx packets, | |
21 | * reset link state etc. | |
22 | * | |
69f9032d | 23 | * @param priv A pointer to struct lbs_private structure |
876c9d3a MT |
24 | * @return n/a |
25 | */ | |
69f9032d | 26 | void lbs_mac_event_disconnected(struct lbs_private *priv) |
876c9d3a | 27 | { |
876c9d3a MT |
28 | union iwreq_data wrqu; |
29 | ||
aa21c004 | 30 | if (priv->connect_status != LBS_CONNECTED) |
876c9d3a MT |
31 | return; |
32 | ||
91843463 | 33 | lbs_deb_enter(LBS_DEB_ASSOC); |
876c9d3a MT |
34 | |
35 | memset(wrqu.ap_addr.sa_data, 0x00, ETH_ALEN); | |
36 | wrqu.ap_addr.sa_family = ARPHRD_ETHER; | |
37 | ||
38 | /* | |
39 | * Cisco AP sends EAP failure and de-auth in less than 0.5 ms. | |
40 | * It causes problem in the Supplicant | |
41 | */ | |
42 | ||
43 | msleep_interruptible(1000); | |
634b8f49 | 44 | wireless_send_event(priv->dev, SIOCGIWAP, &wrqu, NULL); |
876c9d3a | 45 | |
876c9d3a | 46 | /* report disconnect to upper layer */ |
634b8f49 HS |
47 | netif_stop_queue(priv->dev); |
48 | netif_carrier_off(priv->dev); | |
876c9d3a | 49 | |
a27b9f96 DW |
50 | /* Free Tx and Rx packets */ |
51 | kfree_skb(priv->currenttxskb); | |
52 | priv->currenttxskb = NULL; | |
53 | priv->tx_pending_len = 0; | |
54 | ||
876c9d3a | 55 | /* reset SNR/NF/RSSI values */ |
aa21c004 DW |
56 | memset(priv->SNR, 0x00, sizeof(priv->SNR)); |
57 | memset(priv->NF, 0x00, sizeof(priv->NF)); | |
58 | memset(priv->RSSI, 0x00, sizeof(priv->RSSI)); | |
59 | memset(priv->rawSNR, 0x00, sizeof(priv->rawSNR)); | |
60 | memset(priv->rawNF, 0x00, sizeof(priv->rawNF)); | |
61 | priv->nextSNRNF = 0; | |
62 | priv->numSNRNF = 0; | |
63 | priv->connect_status = LBS_DISCONNECTED; | |
876c9d3a | 64 | |
e76850d6 DW |
65 | /* Clear out associated SSID and BSSID since connection is |
66 | * no longer valid. | |
67 | */ | |
aa21c004 DW |
68 | memset(&priv->curbssparams.bssid, 0, ETH_ALEN); |
69 | memset(&priv->curbssparams.ssid, 0, IW_ESSID_MAX_SIZE); | |
70 | priv->curbssparams.ssid_len = 0; | |
876c9d3a | 71 | |
aa21c004 | 72 | if (priv->psstate != PS_STATE_FULL_POWER) { |
876c9d3a | 73 | /* make firmware to exit PS mode */ |
a6c8700f | 74 | lbs_deb_cmd("disconnected, so exit PS mode\n"); |
10078321 | 75 | lbs_ps_wakeup(priv, 0); |
876c9d3a | 76 | } |
52507c20 | 77 | lbs_deb_leave(LBS_DEB_ASSOC); |
876c9d3a MT |
78 | } |
79 | ||
80 | /** | |
81 | * @brief This function handles MIC failure event. | |
82 | * | |
69f9032d | 83 | * @param priv A pointer to struct lbs_private structure |
876c9d3a MT |
84 | * @para event the event id |
85 | * @return n/a | |
86 | */ | |
69f9032d | 87 | static void handle_mic_failureevent(struct lbs_private *priv, u32 event) |
876c9d3a MT |
88 | { |
89 | char buf[50]; | |
90 | ||
a6c8700f | 91 | lbs_deb_enter(LBS_DEB_CMD); |
876c9d3a MT |
92 | memset(buf, 0, sizeof(buf)); |
93 | ||
94 | sprintf(buf, "%s", "MLME-MICHAELMICFAILURE.indication "); | |
95 | ||
96 | if (event == MACREG_INT_CODE_MIC_ERR_UNICAST) { | |
97 | strcat(buf, "unicast "); | |
98 | } else { | |
99 | strcat(buf, "multicast "); | |
100 | } | |
101 | ||
10078321 | 102 | lbs_send_iwevcustom_event(priv, buf); |
a6c8700f | 103 | lbs_deb_leave(LBS_DEB_CMD); |
876c9d3a MT |
104 | } |
105 | ||
69f9032d | 106 | static int lbs_ret_reg_access(struct lbs_private *priv, |
876c9d3a MT |
107 | u16 type, struct cmd_ds_command *resp) |
108 | { | |
9012b28a | 109 | int ret = 0; |
876c9d3a | 110 | |
9012b28a | 111 | lbs_deb_enter(LBS_DEB_CMD); |
876c9d3a MT |
112 | |
113 | switch (type) { | |
6b63cd0f | 114 | case CMD_RET(CMD_MAC_REG_ACCESS): |
876c9d3a | 115 | { |
981f187b | 116 | struct cmd_ds_mac_reg_access *reg = &resp->params.macreg; |
876c9d3a | 117 | |
aa21c004 DW |
118 | priv->offsetvalue.offset = (u32)le16_to_cpu(reg->offset); |
119 | priv->offsetvalue.value = le32_to_cpu(reg->value); | |
876c9d3a MT |
120 | break; |
121 | } | |
122 | ||
6b63cd0f | 123 | case CMD_RET(CMD_BBP_REG_ACCESS): |
876c9d3a | 124 | { |
981f187b | 125 | struct cmd_ds_bbp_reg_access *reg = &resp->params.bbpreg; |
876c9d3a | 126 | |
aa21c004 DW |
127 | priv->offsetvalue.offset = (u32)le16_to_cpu(reg->offset); |
128 | priv->offsetvalue.value = reg->value; | |
876c9d3a MT |
129 | break; |
130 | } | |
131 | ||
6b63cd0f | 132 | case CMD_RET(CMD_RF_REG_ACCESS): |
876c9d3a | 133 | { |
981f187b | 134 | struct cmd_ds_rf_reg_access *reg = &resp->params.rfreg; |
876c9d3a | 135 | |
aa21c004 DW |
136 | priv->offsetvalue.offset = (u32)le16_to_cpu(reg->offset); |
137 | priv->offsetvalue.value = reg->value; | |
876c9d3a MT |
138 | break; |
139 | } | |
140 | ||
141 | default: | |
9012b28a | 142 | ret = -1; |
876c9d3a MT |
143 | } |
144 | ||
8b17d723 | 145 | lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret); |
9012b28a | 146 | return ret; |
876c9d3a MT |
147 | } |
148 | ||
69f9032d | 149 | static int lbs_ret_802_11_rssi(struct lbs_private *priv, |
876c9d3a MT |
150 | struct cmd_ds_command *resp) |
151 | { | |
152 | struct cmd_ds_802_11_rssi_rsp *rssirsp = &resp->params.rssirsp; | |
876c9d3a | 153 | |
a6c8700f HS |
154 | lbs_deb_enter(LBS_DEB_CMD); |
155 | ||
876c9d3a | 156 | /* store the non average value */ |
2c5b9e51 CC |
157 | priv->SNR[TYPE_BEACON][TYPE_NOAVG] = get_unaligned_le16(&rssirsp->SNR); |
158 | priv->NF[TYPE_BEACON][TYPE_NOAVG] = get_unaligned_le16(&rssirsp->noisefloor); | |
876c9d3a | 159 | |
2c5b9e51 CC |
160 | priv->SNR[TYPE_BEACON][TYPE_AVG] = get_unaligned_le16(&rssirsp->avgSNR); |
161 | priv->NF[TYPE_BEACON][TYPE_AVG] = get_unaligned_le16(&rssirsp->avgnoisefloor); | |
876c9d3a | 162 | |
aa21c004 DW |
163 | priv->RSSI[TYPE_BEACON][TYPE_NOAVG] = |
164 | CAL_RSSI(priv->SNR[TYPE_BEACON][TYPE_NOAVG], | |
165 | priv->NF[TYPE_BEACON][TYPE_NOAVG]); | |
876c9d3a | 166 | |
aa21c004 DW |
167 | priv->RSSI[TYPE_BEACON][TYPE_AVG] = |
168 | CAL_RSSI(priv->SNR[TYPE_BEACON][TYPE_AVG] / AVG_SCALE, | |
169 | priv->NF[TYPE_BEACON][TYPE_AVG] / AVG_SCALE); | |
876c9d3a | 170 | |
a6c8700f | 171 | lbs_deb_cmd("RSSI: beacon %d, avg %d\n", |
aa21c004 DW |
172 | priv->RSSI[TYPE_BEACON][TYPE_NOAVG], |
173 | priv->RSSI[TYPE_BEACON][TYPE_AVG]); | |
876c9d3a | 174 | |
a6c8700f | 175 | lbs_deb_leave(LBS_DEB_CMD); |
876c9d3a MT |
176 | return 0; |
177 | } | |
178 | ||
96287ac4 BD |
179 | static int lbs_ret_802_11_bcn_ctrl(struct lbs_private * priv, |
180 | struct cmd_ds_command *resp) | |
181 | { | |
182 | struct cmd_ds_802_11_beacon_control *bcn_ctrl = | |
183 | &resp->params.bcn_ctrl; | |
96287ac4 BD |
184 | |
185 | lbs_deb_enter(LBS_DEB_CMD); | |
186 | ||
187 | if (bcn_ctrl->action == CMD_ACT_GET) { | |
aa21c004 DW |
188 | priv->beacon_enable = (u8) le16_to_cpu(bcn_ctrl->beacon_enable); |
189 | priv->beacon_period = le16_to_cpu(bcn_ctrl->beacon_period); | |
96287ac4 BD |
190 | } |
191 | ||
192 | lbs_deb_enter(LBS_DEB_CMD); | |
193 | return 0; | |
194 | } | |
195 | ||
1309b55b | 196 | static inline int handle_cmd_response(struct lbs_private *priv, |
ddac4526 | 197 | struct cmd_header *cmd_response) |
876c9d3a | 198 | { |
ddac4526 | 199 | struct cmd_ds_command *resp = (struct cmd_ds_command *) cmd_response; |
876c9d3a MT |
200 | int ret = 0; |
201 | unsigned long flags; | |
1309b55b | 202 | uint16_t respcmd = le16_to_cpu(resp->command); |
876c9d3a | 203 | |
a6c8700f HS |
204 | lbs_deb_enter(LBS_DEB_HOST); |
205 | ||
876c9d3a | 206 | switch (respcmd) { |
6b63cd0f HS |
207 | case CMD_RET(CMD_MAC_REG_ACCESS): |
208 | case CMD_RET(CMD_BBP_REG_ACCESS): | |
209 | case CMD_RET(CMD_RF_REG_ACCESS): | |
10078321 | 210 | ret = lbs_ret_reg_access(priv, respcmd, resp); |
876c9d3a MT |
211 | break; |
212 | ||
6b63cd0f HS |
213 | case CMD_RET(CMD_802_11_SET_AFC): |
214 | case CMD_RET(CMD_802_11_GET_AFC): | |
aa21c004 | 215 | spin_lock_irqsave(&priv->driver_lock, flags); |
75567670 | 216 | memmove((void *)priv->cur_cmd->callback_arg, &resp->params.afc, |
876c9d3a | 217 | sizeof(struct cmd_ds_802_11_afc)); |
aa21c004 | 218 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a MT |
219 | |
220 | break; | |
876c9d3a | 221 | |
6b63cd0f | 222 | case CMD_RET(CMD_802_11_BEACON_STOP): |
18c96c34 DW |
223 | break; |
224 | ||
6b63cd0f | 225 | case CMD_RET(CMD_802_11_RSSI): |
10078321 | 226 | ret = lbs_ret_802_11_rssi(priv, resp); |
876c9d3a MT |
227 | break; |
228 | ||
6b63cd0f | 229 | case CMD_RET(CMD_802_11D_DOMAIN_INFO): |
e98a88dd | 230 | ret = lbs_ret_802_11d_domain_info(resp); |
876c9d3a MT |
231 | break; |
232 | ||
6b63cd0f | 233 | case CMD_RET(CMD_802_11_TPC_CFG): |
aa21c004 | 234 | spin_lock_irqsave(&priv->driver_lock, flags); |
75567670 | 235 | memmove((void *)priv->cur_cmd->callback_arg, &resp->params.tpccfg, |
876c9d3a | 236 | sizeof(struct cmd_ds_802_11_tpc_cfg)); |
aa21c004 | 237 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a | 238 | break; |
6b63cd0f | 239 | case CMD_RET(CMD_802_11_LED_GPIO_CTRL): |
aa21c004 | 240 | spin_lock_irqsave(&priv->driver_lock, flags); |
75567670 | 241 | memmove((void *)priv->cur_cmd->callback_arg, &resp->params.ledgpio, |
876c9d3a | 242 | sizeof(struct cmd_ds_802_11_led_ctrl)); |
aa21c004 | 243 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a | 244 | break; |
3a188649 | 245 | |
6b63cd0f | 246 | case CMD_RET(CMD_GET_TSF): |
aa21c004 | 247 | spin_lock_irqsave(&priv->driver_lock, flags); |
75567670 | 248 | memcpy((void *)priv->cur_cmd->callback_arg, |
876c9d3a | 249 | &resp->params.gettsf.tsfvalue, sizeof(u64)); |
aa21c004 | 250 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a | 251 | break; |
6b63cd0f | 252 | case CMD_RET(CMD_BT_ACCESS): |
aa21c004 | 253 | spin_lock_irqsave(&priv->driver_lock, flags); |
75567670 DW |
254 | if (priv->cur_cmd->callback_arg) |
255 | memcpy((void *)priv->cur_cmd->callback_arg, | |
876c9d3a | 256 | &resp->params.bt.addr1, 2 * ETH_ALEN); |
aa21c004 | 257 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a | 258 | break; |
6b63cd0f | 259 | case CMD_RET(CMD_FWT_ACCESS): |
aa21c004 | 260 | spin_lock_irqsave(&priv->driver_lock, flags); |
75567670 DW |
261 | if (priv->cur_cmd->callback_arg) |
262 | memcpy((void *)priv->cur_cmd->callback_arg, &resp->params.fwt, | |
981f187b | 263 | sizeof(resp->params.fwt)); |
aa21c004 | 264 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a | 265 | break; |
96287ac4 BD |
266 | case CMD_RET(CMD_802_11_BEACON_CTRL): |
267 | ret = lbs_ret_802_11_bcn_ctrl(priv, resp); | |
268 | break; | |
269 | ||
876c9d3a | 270 | default: |
e37fc6e1 DW |
271 | lbs_pr_err("CMD_RESP: unknown cmd response 0x%04x\n", |
272 | le16_to_cpu(resp->command)); | |
876c9d3a MT |
273 | break; |
274 | } | |
a6c8700f | 275 | lbs_deb_leave(LBS_DEB_HOST); |
876c9d3a MT |
276 | return ret; |
277 | } | |
278 | ||
7919b89c | 279 | int lbs_process_command_response(struct lbs_private *priv, u8 *data, u32 len) |
876c9d3a | 280 | { |
e1258177 | 281 | uint16_t respcmd, curcmd; |
ddac4526 | 282 | struct cmd_header *resp; |
876c9d3a | 283 | int ret = 0; |
e1258177 DW |
284 | unsigned long flags; |
285 | uint16_t result; | |
876c9d3a | 286 | |
a6c8700f | 287 | lbs_deb_enter(LBS_DEB_HOST); |
876c9d3a | 288 | |
aa21c004 DW |
289 | mutex_lock(&priv->lock); |
290 | spin_lock_irqsave(&priv->driver_lock, flags); | |
876c9d3a | 291 | |
aa21c004 | 292 | if (!priv->cur_cmd) { |
a6c8700f | 293 | lbs_deb_host("CMD_RESP: cur_cmd is NULL\n"); |
876c9d3a | 294 | ret = -1; |
aa21c004 | 295 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a MT |
296 | goto done; |
297 | } | |
e1258177 | 298 | |
7919b89c | 299 | resp = (void *)data; |
8a96df80 | 300 | curcmd = le16_to_cpu(priv->cur_cmd->cmdbuf->command); |
876c9d3a | 301 | respcmd = le16_to_cpu(resp->command); |
876c9d3a MT |
302 | result = le16_to_cpu(resp->result); |
303 | ||
e5225b39 | 304 | lbs_deb_cmd("CMD_RESP: response 0x%04x, seq %d, size %d\n", |
7919b89c HS |
305 | respcmd, le16_to_cpu(resp->seqnum), len); |
306 | lbs_deb_hex(LBS_DEB_CMD, "CMD_RESP", (void *) resp, len); | |
876c9d3a | 307 | |
6305f498 | 308 | if (resp->seqnum != priv->cur_cmd->cmdbuf->seqnum) { |
e1258177 | 309 | lbs_pr_info("Received CMD_RESP with invalid sequence %d (expected %d)\n", |
6305f498 | 310 | le16_to_cpu(resp->seqnum), le16_to_cpu(priv->cur_cmd->cmdbuf->seqnum)); |
aa21c004 | 311 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a MT |
312 | ret = -1; |
313 | goto done; | |
314 | } | |
e1258177 | 315 | if (respcmd != CMD_RET(curcmd) && |
5f0547c2 | 316 | respcmd != CMD_RET_802_11_ASSOCIATE && curcmd != CMD_802_11_ASSOCIATE) { |
e1258177 DW |
317 | lbs_pr_info("Invalid CMD_RESP %x to command %x!\n", respcmd, curcmd); |
318 | spin_unlock_irqrestore(&priv->driver_lock, flags); | |
319 | ret = -1; | |
320 | goto done; | |
321 | } | |
322 | ||
8538823f DW |
323 | if (resp->result == cpu_to_le16(0x0004)) { |
324 | /* 0x0004 means -EAGAIN. Drop the response, let it time out | |
325 | and be resubmitted */ | |
326 | lbs_pr_info("Firmware returns DEFER to command %x. Will let it time out...\n", | |
327 | le16_to_cpu(resp->command)); | |
328 | spin_unlock_irqrestore(&priv->driver_lock, flags); | |
329 | ret = -1; | |
330 | goto done; | |
331 | } | |
332 | ||
e1258177 DW |
333 | /* Now we got response from FW, cancel the command timer */ |
334 | del_timer(&priv->command_timer); | |
2a345099 DW |
335 | priv->cmd_timed_out = 0; |
336 | if (priv->nr_retries) { | |
337 | lbs_pr_info("Received result %x to command %x after %d retries\n", | |
338 | result, curcmd, priv->nr_retries); | |
339 | priv->nr_retries = 0; | |
340 | } | |
876c9d3a MT |
341 | |
342 | /* Store the response code to cur_cmd_retcode. */ | |
aa21c004 | 343 | priv->cur_cmd_retcode = result; |
876c9d3a | 344 | |
6b63cd0f | 345 | if (respcmd == CMD_RET(CMD_802_11_PS_MODE)) { |
38bfab1a | 346 | struct cmd_ds_802_11_ps_mode *psmode = (void *) &resp[1]; |
981f187b | 347 | u16 action = le16_to_cpu(psmode->action); |
876c9d3a | 348 | |
a6c8700f HS |
349 | lbs_deb_host( |
350 | "CMD_RESP: PS_MODE cmd reply result 0x%x, action 0x%x\n", | |
981f187b | 351 | result, action); |
876c9d3a MT |
352 | |
353 | if (result) { | |
a6c8700f | 354 | lbs_deb_host("CMD_RESP: PS command failed with 0x%x\n", |
981f187b DW |
355 | result); |
356 | /* | |
357 | * We should not re-try enter-ps command in | |
358 | * ad-hoc mode. It takes place in | |
10078321 | 359 | * lbs_execute_next_command(). |
981f187b | 360 | */ |
aa21c004 | 361 | if (priv->mode == IW_MODE_ADHOC && |
0aef64d7 | 362 | action == CMD_SUBCMD_ENTER_PS) |
aa21c004 | 363 | priv->psmode = LBS802_11POWERMODECAM; |
0aef64d7 | 364 | } else if (action == CMD_SUBCMD_ENTER_PS) { |
aa21c004 DW |
365 | priv->needtowakeup = 0; |
366 | priv->psstate = PS_STATE_AWAKE; | |
876c9d3a | 367 | |
a6c8700f | 368 | lbs_deb_host("CMD_RESP: ENTER_PS command response\n"); |
aa21c004 | 369 | if (priv->connect_status != LBS_CONNECTED) { |
876c9d3a MT |
370 | /* |
371 | * When Deauth Event received before Enter_PS command | |
372 | * response, We need to wake up the firmware. | |
373 | */ | |
a6c8700f | 374 | lbs_deb_host( |
10078321 | 375 | "disconnected, invoking lbs_ps_wakeup\n"); |
876c9d3a | 376 | |
aa21c004 DW |
377 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
378 | mutex_unlock(&priv->lock); | |
10078321 | 379 | lbs_ps_wakeup(priv, 0); |
aa21c004 DW |
380 | mutex_lock(&priv->lock); |
381 | spin_lock_irqsave(&priv->driver_lock, flags); | |
876c9d3a | 382 | } |
0aef64d7 | 383 | } else if (action == CMD_SUBCMD_EXIT_PS) { |
aa21c004 DW |
384 | priv->needtowakeup = 0; |
385 | priv->psstate = PS_STATE_FULL_POWER; | |
a6c8700f | 386 | lbs_deb_host("CMD_RESP: EXIT_PS command response\n"); |
876c9d3a | 387 | } else { |
a6c8700f | 388 | lbs_deb_host("CMD_RESP: PS action 0x%X\n", action); |
876c9d3a MT |
389 | } |
390 | ||
183aeac1 | 391 | lbs_complete_command(priv, priv->cur_cmd, result); |
aa21c004 | 392 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a MT |
393 | |
394 | ret = 0; | |
395 | goto done; | |
396 | } | |
397 | ||
876c9d3a MT |
398 | /* If the command is not successful, cleanup and return failure */ |
399 | if ((result != 0 || !(respcmd & 0x8000))) { | |
a6c8700f HS |
400 | lbs_deb_host("CMD_RESP: error 0x%04x in command reply 0x%04x\n", |
401 | result, respcmd); | |
876c9d3a MT |
402 | /* |
403 | * Handling errors here | |
404 | */ | |
405 | switch (respcmd) { | |
6b63cd0f HS |
406 | case CMD_RET(CMD_GET_HW_SPEC): |
407 | case CMD_RET(CMD_802_11_RESET): | |
a6c8700f | 408 | lbs_deb_host("CMD_RESP: reset failed\n"); |
876c9d3a MT |
409 | break; |
410 | ||
411 | } | |
183aeac1 | 412 | lbs_complete_command(priv, priv->cur_cmd, result); |
aa21c004 | 413 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a MT |
414 | |
415 | ret = -1; | |
416 | goto done; | |
417 | } | |
418 | ||
aa21c004 | 419 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
1723047d | 420 | |
7ad994de DW |
421 | if (priv->cur_cmd && priv->cur_cmd->callback) { |
422 | ret = priv->cur_cmd->callback(priv, priv->cur_cmd->callback_arg, | |
ddac4526 | 423 | resp); |
7ad994de | 424 | } else |
e98a88dd | 425 | ret = handle_cmd_response(priv, resp); |
1723047d | 426 | |
aa21c004 | 427 | spin_lock_irqsave(&priv->driver_lock, flags); |
1723047d | 428 | |
aa21c004 | 429 | if (priv->cur_cmd) { |
876c9d3a | 430 | /* Clean up and Put current command back to cmdfreeq */ |
183aeac1 | 431 | lbs_complete_command(priv, priv->cur_cmd, result); |
876c9d3a | 432 | } |
aa21c004 | 433 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a MT |
434 | |
435 | done: | |
aa21c004 | 436 | mutex_unlock(&priv->lock); |
a6c8700f | 437 | lbs_deb_leave_args(LBS_DEB_HOST, "ret %d", ret); |
876c9d3a MT |
438 | return ret; |
439 | } | |
440 | ||
b47ef243 DW |
441 | static int lbs_send_confirmwake(struct lbs_private *priv) |
442 | { | |
f539f2ef | 443 | struct cmd_header cmd; |
b47ef243 DW |
444 | int ret = 0; |
445 | ||
446 | lbs_deb_enter(LBS_DEB_HOST); | |
447 | ||
f539f2ef HS |
448 | cmd.command = cpu_to_le16(CMD_802_11_WAKEUP_CONFIRM); |
449 | cmd.size = cpu_to_le16(sizeof(cmd)); | |
450 | cmd.seqnum = cpu_to_le16(++priv->seqnum); | |
451 | cmd.result = 0; | |
b47ef243 | 452 | |
f539f2ef HS |
453 | lbs_deb_hex(LBS_DEB_HOST, "wake confirm", (u8 *) &cmd, |
454 | sizeof(cmd)); | |
b47ef243 | 455 | |
f539f2ef | 456 | ret = priv->hw_host_to_card(priv, MVMS_CMD, (u8 *) &cmd, sizeof(cmd)); |
b47ef243 DW |
457 | if (ret) |
458 | lbs_pr_alert("SEND_WAKEC_CMD: Host to Card failed for Confirm Wake\n"); | |
459 | ||
460 | lbs_deb_leave_args(LBS_DEB_HOST, "ret %d", ret); | |
461 | return ret; | |
462 | } | |
463 | ||
7919b89c | 464 | int lbs_process_event(struct lbs_private *priv, u32 event) |
876c9d3a MT |
465 | { |
466 | int ret = 0; | |
876c9d3a | 467 | |
9556d212 HS |
468 | lbs_deb_enter(LBS_DEB_CMD); |
469 | ||
7919b89c | 470 | switch (event) { |
876c9d3a | 471 | case MACREG_INT_CODE_LINK_SENSED: |
d4ff0ef6 | 472 | lbs_deb_cmd("EVENT: link sensed\n"); |
876c9d3a MT |
473 | break; |
474 | ||
475 | case MACREG_INT_CODE_DEAUTHENTICATED: | |
a6c8700f | 476 | lbs_deb_cmd("EVENT: deauthenticated\n"); |
10078321 | 477 | lbs_mac_event_disconnected(priv); |
876c9d3a MT |
478 | break; |
479 | ||
480 | case MACREG_INT_CODE_DISASSOCIATED: | |
a6c8700f | 481 | lbs_deb_cmd("EVENT: disassociated\n"); |
10078321 | 482 | lbs_mac_event_disconnected(priv); |
876c9d3a MT |
483 | break; |
484 | ||
0b3c07ff | 485 | case MACREG_INT_CODE_LINK_LOST_NO_SCAN: |
a6c8700f | 486 | lbs_deb_cmd("EVENT: link lost\n"); |
10078321 | 487 | lbs_mac_event_disconnected(priv); |
876c9d3a MT |
488 | break; |
489 | ||
490 | case MACREG_INT_CODE_PS_SLEEP: | |
d4ff0ef6 | 491 | lbs_deb_cmd("EVENT: ps sleep\n"); |
876c9d3a MT |
492 | |
493 | /* handle unexpected PS SLEEP event */ | |
aa21c004 | 494 | if (priv->psstate == PS_STATE_FULL_POWER) { |
9012b28a | 495 | lbs_deb_cmd( |
a6c8700f | 496 | "EVENT: in FULL POWER mode, ignoreing PS_SLEEP\n"); |
876c9d3a MT |
497 | break; |
498 | } | |
aa21c004 | 499 | priv->psstate = PS_STATE_PRE_SLEEP; |
876c9d3a | 500 | |
d4ff0ef6 | 501 | lbs_ps_confirm_sleep(priv); |
876c9d3a MT |
502 | |
503 | break; | |
504 | ||
b47ef243 | 505 | case MACREG_INT_CODE_HOST_AWAKE: |
d4ff0ef6 | 506 | lbs_deb_cmd("EVENT: host awake\n"); |
b47ef243 DW |
507 | lbs_send_confirmwake(priv); |
508 | break; | |
509 | ||
876c9d3a | 510 | case MACREG_INT_CODE_PS_AWAKE: |
d4ff0ef6 | 511 | lbs_deb_cmd("EVENT: ps awake\n"); |
876c9d3a | 512 | /* handle unexpected PS AWAKE event */ |
aa21c004 | 513 | if (priv->psstate == PS_STATE_FULL_POWER) { |
9012b28a | 514 | lbs_deb_cmd( |
876c9d3a MT |
515 | "EVENT: In FULL POWER mode - ignore PS AWAKE\n"); |
516 | break; | |
517 | } | |
518 | ||
aa21c004 | 519 | priv->psstate = PS_STATE_AWAKE; |
876c9d3a | 520 | |
aa21c004 | 521 | if (priv->needtowakeup) { |
876c9d3a MT |
522 | /* |
523 | * wait for the command processing to finish | |
524 | * before resuming sending | |
aa21c004 | 525 | * priv->needtowakeup will be set to FALSE |
10078321 | 526 | * in lbs_ps_wakeup() |
876c9d3a | 527 | */ |
a6c8700f | 528 | lbs_deb_cmd("waking up ...\n"); |
10078321 | 529 | lbs_ps_wakeup(priv, 0); |
876c9d3a MT |
530 | } |
531 | break; | |
532 | ||
533 | case MACREG_INT_CODE_MIC_ERR_UNICAST: | |
9012b28a | 534 | lbs_deb_cmd("EVENT: UNICAST MIC ERROR\n"); |
876c9d3a MT |
535 | handle_mic_failureevent(priv, MACREG_INT_CODE_MIC_ERR_UNICAST); |
536 | break; | |
537 | ||
538 | case MACREG_INT_CODE_MIC_ERR_MULTICAST: | |
9012b28a | 539 | lbs_deb_cmd("EVENT: MULTICAST MIC ERROR\n"); |
876c9d3a MT |
540 | handle_mic_failureevent(priv, MACREG_INT_CODE_MIC_ERR_MULTICAST); |
541 | break; | |
d4ff0ef6 | 542 | |
876c9d3a | 543 | case MACREG_INT_CODE_MIB_CHANGED: |
d4ff0ef6 HS |
544 | lbs_deb_cmd("EVENT: MIB CHANGED\n"); |
545 | break; | |
876c9d3a | 546 | case MACREG_INT_CODE_INIT_DONE: |
d4ff0ef6 | 547 | lbs_deb_cmd("EVENT: INIT DONE\n"); |
876c9d3a | 548 | break; |
876c9d3a | 549 | case MACREG_INT_CODE_ADHOC_BCN_LOST: |
a6c8700f | 550 | lbs_deb_cmd("EVENT: ADHOC beacon lost\n"); |
876c9d3a | 551 | break; |
876c9d3a | 552 | case MACREG_INT_CODE_RSSI_LOW: |
a6c8700f | 553 | lbs_pr_alert("EVENT: rssi low\n"); |
876c9d3a MT |
554 | break; |
555 | case MACREG_INT_CODE_SNR_LOW: | |
a6c8700f | 556 | lbs_pr_alert("EVENT: snr low\n"); |
876c9d3a MT |
557 | break; |
558 | case MACREG_INT_CODE_MAX_FAIL: | |
a6c8700f | 559 | lbs_pr_alert("EVENT: max fail\n"); |
876c9d3a MT |
560 | break; |
561 | case MACREG_INT_CODE_RSSI_HIGH: | |
a6c8700f | 562 | lbs_pr_alert("EVENT: rssi high\n"); |
876c9d3a MT |
563 | break; |
564 | case MACREG_INT_CODE_SNR_HIGH: | |
a6c8700f | 565 | lbs_pr_alert("EVENT: snr high\n"); |
876c9d3a MT |
566 | break; |
567 | ||
7d8d28b3 | 568 | case MACREG_INT_CODE_MESH_AUTO_STARTED: |
5612c014 DW |
569 | /* Ignore spurious autostart events if autostart is disabled */ |
570 | if (!priv->mesh_autostart_enabled) { | |
571 | lbs_pr_info("EVENT: MESH_AUTO_STARTED (ignoring)\n"); | |
572 | break; | |
573 | } | |
9cdc6d29 | 574 | lbs_pr_info("EVENT: MESH_AUTO_STARTED\n"); |
aa21c004 | 575 | priv->mesh_connect_status = LBS_CONNECTED; |
a27b9f96 | 576 | if (priv->mesh_open) { |
9cdc6d29 | 577 | netif_carrier_on(priv->mesh_dev); |
a27b9f96 DW |
578 | if (!priv->tx_pending_len) |
579 | netif_wake_queue(priv->mesh_dev); | |
7d8d28b3 | 580 | } |
aa21c004 | 581 | priv->mode = IW_MODE_ADHOC; |
b8bedefd | 582 | schedule_work(&priv->sync_channel); |
7d8d28b3 LCCR |
583 | break; |
584 | ||
876c9d3a | 585 | default: |
7919b89c | 586 | lbs_pr_alert("EVENT: unknown event id %d\n", event); |
876c9d3a MT |
587 | break; |
588 | } | |
589 | ||
9556d212 | 590 | lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret); |
876c9d3a MT |
591 | return ret; |
592 | } |