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Commit | Line | Data |
---|---|---|
876c9d3a MT |
1 | /** |
2 | * This file contains the handling of command | |
3 | * responses as well as events generated by firmware. | |
4 | */ | |
5 | #include <linux/delay.h> | |
6 | #include <linux/if_arp.h> | |
7 | #include <linux/netdevice.h> | |
8 | ||
9 | #include <net/iw_handler.h> | |
10 | ||
11 | #include "host.h" | |
876c9d3a MT |
12 | #include "decl.h" |
13 | #include "defs.h" | |
14 | #include "dev.h" | |
15 | #include "join.h" | |
16 | #include "wext.h" | |
17 | ||
18 | /** | |
19 | * @brief This function handles disconnect event. it | |
20 | * reports disconnect to upper layer, clean tx/rx packets, | |
21 | * reset link state etc. | |
22 | * | |
69f9032d | 23 | * @param priv A pointer to struct lbs_private structure |
876c9d3a MT |
24 | * @return n/a |
25 | */ | |
69f9032d | 26 | void lbs_mac_event_disconnected(struct lbs_private *priv) |
876c9d3a | 27 | { |
876c9d3a MT |
28 | union iwreq_data wrqu; |
29 | ||
aa21c004 | 30 | if (priv->connect_status != LBS_CONNECTED) |
876c9d3a MT |
31 | return; |
32 | ||
91843463 | 33 | lbs_deb_enter(LBS_DEB_ASSOC); |
876c9d3a MT |
34 | |
35 | memset(wrqu.ap_addr.sa_data, 0x00, ETH_ALEN); | |
36 | wrqu.ap_addr.sa_family = ARPHRD_ETHER; | |
37 | ||
38 | /* | |
39 | * Cisco AP sends EAP failure and de-auth in less than 0.5 ms. | |
40 | * It causes problem in the Supplicant | |
41 | */ | |
42 | ||
43 | msleep_interruptible(1000); | |
634b8f49 | 44 | wireless_send_event(priv->dev, SIOCGIWAP, &wrqu, NULL); |
876c9d3a | 45 | |
876c9d3a | 46 | /* report disconnect to upper layer */ |
634b8f49 HS |
47 | netif_stop_queue(priv->dev); |
48 | netif_carrier_off(priv->dev); | |
876c9d3a | 49 | |
a27b9f96 DW |
50 | /* Free Tx and Rx packets */ |
51 | kfree_skb(priv->currenttxskb); | |
52 | priv->currenttxskb = NULL; | |
53 | priv->tx_pending_len = 0; | |
54 | ||
876c9d3a | 55 | /* reset SNR/NF/RSSI values */ |
aa21c004 DW |
56 | memset(priv->SNR, 0x00, sizeof(priv->SNR)); |
57 | memset(priv->NF, 0x00, sizeof(priv->NF)); | |
58 | memset(priv->RSSI, 0x00, sizeof(priv->RSSI)); | |
59 | memset(priv->rawSNR, 0x00, sizeof(priv->rawSNR)); | |
60 | memset(priv->rawNF, 0x00, sizeof(priv->rawNF)); | |
61 | priv->nextSNRNF = 0; | |
62 | priv->numSNRNF = 0; | |
63 | priv->connect_status = LBS_DISCONNECTED; | |
876c9d3a | 64 | |
e76850d6 DW |
65 | /* Clear out associated SSID and BSSID since connection is |
66 | * no longer valid. | |
67 | */ | |
aa21c004 DW |
68 | memset(&priv->curbssparams.bssid, 0, ETH_ALEN); |
69 | memset(&priv->curbssparams.ssid, 0, IW_ESSID_MAX_SIZE); | |
70 | priv->curbssparams.ssid_len = 0; | |
876c9d3a | 71 | |
aa21c004 | 72 | if (priv->psstate != PS_STATE_FULL_POWER) { |
876c9d3a | 73 | /* make firmware to exit PS mode */ |
a6c8700f | 74 | lbs_deb_cmd("disconnected, so exit PS mode\n"); |
10078321 | 75 | lbs_ps_wakeup(priv, 0); |
876c9d3a | 76 | } |
52507c20 | 77 | lbs_deb_leave(LBS_DEB_ASSOC); |
876c9d3a MT |
78 | } |
79 | ||
80 | /** | |
81 | * @brief This function handles MIC failure event. | |
82 | * | |
69f9032d | 83 | * @param priv A pointer to struct lbs_private structure |
876c9d3a MT |
84 | * @para event the event id |
85 | * @return n/a | |
86 | */ | |
69f9032d | 87 | static void handle_mic_failureevent(struct lbs_private *priv, u32 event) |
876c9d3a MT |
88 | { |
89 | char buf[50]; | |
90 | ||
a6c8700f | 91 | lbs_deb_enter(LBS_DEB_CMD); |
876c9d3a MT |
92 | memset(buf, 0, sizeof(buf)); |
93 | ||
94 | sprintf(buf, "%s", "MLME-MICHAELMICFAILURE.indication "); | |
95 | ||
96 | if (event == MACREG_INT_CODE_MIC_ERR_UNICAST) { | |
97 | strcat(buf, "unicast "); | |
98 | } else { | |
99 | strcat(buf, "multicast "); | |
100 | } | |
101 | ||
10078321 | 102 | lbs_send_iwevcustom_event(priv, buf); |
a6c8700f | 103 | lbs_deb_leave(LBS_DEB_CMD); |
876c9d3a MT |
104 | } |
105 | ||
69f9032d | 106 | static int lbs_ret_reg_access(struct lbs_private *priv, |
876c9d3a MT |
107 | u16 type, struct cmd_ds_command *resp) |
108 | { | |
9012b28a | 109 | int ret = 0; |
876c9d3a | 110 | |
9012b28a | 111 | lbs_deb_enter(LBS_DEB_CMD); |
876c9d3a MT |
112 | |
113 | switch (type) { | |
6b63cd0f | 114 | case CMD_RET(CMD_MAC_REG_ACCESS): |
876c9d3a | 115 | { |
981f187b | 116 | struct cmd_ds_mac_reg_access *reg = &resp->params.macreg; |
876c9d3a | 117 | |
aa21c004 DW |
118 | priv->offsetvalue.offset = (u32)le16_to_cpu(reg->offset); |
119 | priv->offsetvalue.value = le32_to_cpu(reg->value); | |
876c9d3a MT |
120 | break; |
121 | } | |
122 | ||
6b63cd0f | 123 | case CMD_RET(CMD_BBP_REG_ACCESS): |
876c9d3a | 124 | { |
981f187b | 125 | struct cmd_ds_bbp_reg_access *reg = &resp->params.bbpreg; |
876c9d3a | 126 | |
aa21c004 DW |
127 | priv->offsetvalue.offset = (u32)le16_to_cpu(reg->offset); |
128 | priv->offsetvalue.value = reg->value; | |
876c9d3a MT |
129 | break; |
130 | } | |
131 | ||
6b63cd0f | 132 | case CMD_RET(CMD_RF_REG_ACCESS): |
876c9d3a | 133 | { |
981f187b | 134 | struct cmd_ds_rf_reg_access *reg = &resp->params.rfreg; |
876c9d3a | 135 | |
aa21c004 DW |
136 | priv->offsetvalue.offset = (u32)le16_to_cpu(reg->offset); |
137 | priv->offsetvalue.value = reg->value; | |
876c9d3a MT |
138 | break; |
139 | } | |
140 | ||
141 | default: | |
9012b28a | 142 | ret = -1; |
876c9d3a MT |
143 | } |
144 | ||
8b17d723 | 145 | lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret); |
9012b28a | 146 | return ret; |
876c9d3a MT |
147 | } |
148 | ||
69f9032d | 149 | static int lbs_ret_802_11_snmp_mib(struct lbs_private *priv, |
876c9d3a MT |
150 | struct cmd_ds_command *resp) |
151 | { | |
152 | struct cmd_ds_802_11_snmp_mib *smib = &resp->params.smib; | |
153 | u16 oid = le16_to_cpu(smib->oid); | |
154 | u16 querytype = le16_to_cpu(smib->querytype); | |
155 | ||
9012b28a | 156 | lbs_deb_enter(LBS_DEB_CMD); |
876c9d3a | 157 | |
a6c8700f | 158 | lbs_deb_cmd("SNMP_RESP: oid 0x%x, querytype 0x%x\n", oid, |
876c9d3a | 159 | querytype); |
a6c8700f | 160 | lbs_deb_cmd("SNMP_RESP: Buf size %d\n", le16_to_cpu(smib->bufsize)); |
876c9d3a | 161 | |
0aef64d7 | 162 | if (querytype == CMD_ACT_GET) { |
876c9d3a | 163 | switch (oid) { |
0aef64d7 | 164 | case FRAGTHRESH_I: |
aa21c004 | 165 | priv->fragthsd = |
981f187b | 166 | le16_to_cpu(*((__le16 *)(smib->value))); |
a6c8700f | 167 | lbs_deb_cmd("SNMP_RESP: frag threshold %u\n", |
aa21c004 | 168 | priv->fragthsd); |
876c9d3a | 169 | break; |
0aef64d7 | 170 | case RTSTHRESH_I: |
aa21c004 | 171 | priv->rtsthsd = |
981f187b | 172 | le16_to_cpu(*((__le16 *)(smib->value))); |
a6c8700f | 173 | lbs_deb_cmd("SNMP_RESP: rts threshold %u\n", |
aa21c004 | 174 | priv->rtsthsd); |
876c9d3a | 175 | break; |
0aef64d7 | 176 | case SHORT_RETRYLIM_I: |
aa21c004 | 177 | priv->txretrycount = |
981f187b | 178 | le16_to_cpu(*((__le16 *)(smib->value))); |
a6c8700f | 179 | lbs_deb_cmd("SNMP_RESP: tx retry count %u\n", |
aa21c004 | 180 | priv->rtsthsd); |
876c9d3a MT |
181 | break; |
182 | default: | |
183 | break; | |
184 | } | |
185 | } | |
186 | ||
9012b28a | 187 | lbs_deb_enter(LBS_DEB_CMD); |
876c9d3a MT |
188 | return 0; |
189 | } | |
190 | ||
69f9032d | 191 | static int lbs_ret_802_11_rf_tx_power(struct lbs_private *priv, |
876c9d3a MT |
192 | struct cmd_ds_command *resp) |
193 | { | |
194 | struct cmd_ds_802_11_rf_tx_power *rtp = &resp->params.txp; | |
876c9d3a | 195 | |
9012b28a | 196 | lbs_deb_enter(LBS_DEB_CMD); |
876c9d3a | 197 | |
aa21c004 | 198 | priv->txpowerlevel = le16_to_cpu(rtp->currentlevel); |
876c9d3a | 199 | |
aa21c004 | 200 | lbs_deb_cmd("TX power currently %d\n", priv->txpowerlevel); |
876c9d3a | 201 | |
a6c8700f | 202 | lbs_deb_leave(LBS_DEB_CMD); |
876c9d3a MT |
203 | return 0; |
204 | } | |
205 | ||
69f9032d | 206 | static int lbs_ret_802_11_rate_adapt_rateset(struct lbs_private *priv, |
876c9d3a MT |
207 | struct cmd_ds_command *resp) |
208 | { | |
981f187b | 209 | struct cmd_ds_802_11_rate_adapt_rateset *rates = &resp->params.rateset; |
876c9d3a | 210 | |
9012b28a | 211 | lbs_deb_enter(LBS_DEB_CMD); |
876c9d3a | 212 | |
0aef64d7 | 213 | if (rates->action == CMD_ACT_GET) { |
aa21c004 DW |
214 | priv->enablehwauto = le16_to_cpu(rates->enablehwauto); |
215 | priv->ratebitmap = le16_to_cpu(rates->bitmap); | |
876c9d3a MT |
216 | } |
217 | ||
a6c8700f | 218 | lbs_deb_leave(LBS_DEB_CMD); |
876c9d3a MT |
219 | return 0; |
220 | } | |
221 | ||
69f9032d | 222 | static int lbs_ret_802_11_rssi(struct lbs_private *priv, |
876c9d3a MT |
223 | struct cmd_ds_command *resp) |
224 | { | |
225 | struct cmd_ds_802_11_rssi_rsp *rssirsp = &resp->params.rssirsp; | |
876c9d3a | 226 | |
a6c8700f HS |
227 | lbs_deb_enter(LBS_DEB_CMD); |
228 | ||
876c9d3a | 229 | /* store the non average value */ |
aa21c004 DW |
230 | priv->SNR[TYPE_BEACON][TYPE_NOAVG] = le16_to_cpu(rssirsp->SNR); |
231 | priv->NF[TYPE_BEACON][TYPE_NOAVG] = le16_to_cpu(rssirsp->noisefloor); | |
876c9d3a | 232 | |
aa21c004 DW |
233 | priv->SNR[TYPE_BEACON][TYPE_AVG] = le16_to_cpu(rssirsp->avgSNR); |
234 | priv->NF[TYPE_BEACON][TYPE_AVG] = le16_to_cpu(rssirsp->avgnoisefloor); | |
876c9d3a | 235 | |
aa21c004 DW |
236 | priv->RSSI[TYPE_BEACON][TYPE_NOAVG] = |
237 | CAL_RSSI(priv->SNR[TYPE_BEACON][TYPE_NOAVG], | |
238 | priv->NF[TYPE_BEACON][TYPE_NOAVG]); | |
876c9d3a | 239 | |
aa21c004 DW |
240 | priv->RSSI[TYPE_BEACON][TYPE_AVG] = |
241 | CAL_RSSI(priv->SNR[TYPE_BEACON][TYPE_AVG] / AVG_SCALE, | |
242 | priv->NF[TYPE_BEACON][TYPE_AVG] / AVG_SCALE); | |
876c9d3a | 243 | |
a6c8700f | 244 | lbs_deb_cmd("RSSI: beacon %d, avg %d\n", |
aa21c004 DW |
245 | priv->RSSI[TYPE_BEACON][TYPE_NOAVG], |
246 | priv->RSSI[TYPE_BEACON][TYPE_AVG]); | |
876c9d3a | 247 | |
a6c8700f | 248 | lbs_deb_leave(LBS_DEB_CMD); |
876c9d3a MT |
249 | return 0; |
250 | } | |
251 | ||
96287ac4 BD |
252 | static int lbs_ret_802_11_bcn_ctrl(struct lbs_private * priv, |
253 | struct cmd_ds_command *resp) | |
254 | { | |
255 | struct cmd_ds_802_11_beacon_control *bcn_ctrl = | |
256 | &resp->params.bcn_ctrl; | |
96287ac4 BD |
257 | |
258 | lbs_deb_enter(LBS_DEB_CMD); | |
259 | ||
260 | if (bcn_ctrl->action == CMD_ACT_GET) { | |
aa21c004 DW |
261 | priv->beacon_enable = (u8) le16_to_cpu(bcn_ctrl->beacon_enable); |
262 | priv->beacon_period = le16_to_cpu(bcn_ctrl->beacon_period); | |
96287ac4 BD |
263 | } |
264 | ||
265 | lbs_deb_enter(LBS_DEB_CMD); | |
266 | return 0; | |
267 | } | |
268 | ||
1309b55b | 269 | static inline int handle_cmd_response(struct lbs_private *priv, |
ddac4526 | 270 | struct cmd_header *cmd_response) |
876c9d3a | 271 | { |
ddac4526 | 272 | struct cmd_ds_command *resp = (struct cmd_ds_command *) cmd_response; |
876c9d3a MT |
273 | int ret = 0; |
274 | unsigned long flags; | |
1309b55b | 275 | uint16_t respcmd = le16_to_cpu(resp->command); |
876c9d3a | 276 | |
a6c8700f HS |
277 | lbs_deb_enter(LBS_DEB_HOST); |
278 | ||
876c9d3a | 279 | switch (respcmd) { |
6b63cd0f HS |
280 | case CMD_RET(CMD_MAC_REG_ACCESS): |
281 | case CMD_RET(CMD_BBP_REG_ACCESS): | |
282 | case CMD_RET(CMD_RF_REG_ACCESS): | |
10078321 | 283 | ret = lbs_ret_reg_access(priv, respcmd, resp); |
876c9d3a MT |
284 | break; |
285 | ||
0aef64d7 | 286 | case CMD_RET_802_11_ASSOCIATE: |
6b63cd0f HS |
287 | case CMD_RET(CMD_802_11_ASSOCIATE): |
288 | case CMD_RET(CMD_802_11_REASSOCIATE): | |
10078321 | 289 | ret = lbs_ret_80211_associate(priv, resp); |
876c9d3a MT |
290 | break; |
291 | ||
6b63cd0f HS |
292 | case CMD_RET(CMD_802_11_DISASSOCIATE): |
293 | case CMD_RET(CMD_802_11_DEAUTHENTICATE): | |
e98a88dd | 294 | ret = lbs_ret_80211_disassociate(priv); |
876c9d3a MT |
295 | break; |
296 | ||
6b63cd0f HS |
297 | case CMD_RET(CMD_802_11_AD_HOC_START): |
298 | case CMD_RET(CMD_802_11_AD_HOC_JOIN): | |
10078321 | 299 | ret = lbs_ret_80211_ad_hoc_start(priv, resp); |
876c9d3a MT |
300 | break; |
301 | ||
6b63cd0f | 302 | case CMD_RET(CMD_802_11_SNMP_MIB): |
10078321 | 303 | ret = lbs_ret_802_11_snmp_mib(priv, resp); |
876c9d3a MT |
304 | break; |
305 | ||
6b63cd0f | 306 | case CMD_RET(CMD_802_11_RF_TX_POWER): |
10078321 | 307 | ret = lbs_ret_802_11_rf_tx_power(priv, resp); |
876c9d3a MT |
308 | break; |
309 | ||
6b63cd0f HS |
310 | case CMD_RET(CMD_802_11_SET_AFC): |
311 | case CMD_RET(CMD_802_11_GET_AFC): | |
aa21c004 | 312 | spin_lock_irqsave(&priv->driver_lock, flags); |
75567670 | 313 | memmove((void *)priv->cur_cmd->callback_arg, &resp->params.afc, |
876c9d3a | 314 | sizeof(struct cmd_ds_802_11_afc)); |
aa21c004 | 315 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a MT |
316 | |
317 | break; | |
876c9d3a | 318 | |
6b63cd0f | 319 | case CMD_RET(CMD_MAC_MULTICAST_ADR): |
6b63cd0f HS |
320 | case CMD_RET(CMD_802_11_RESET): |
321 | case CMD_RET(CMD_802_11_AUTHENTICATE): | |
6b63cd0f | 322 | case CMD_RET(CMD_802_11_BEACON_STOP): |
18c96c34 DW |
323 | break; |
324 | ||
6b63cd0f | 325 | case CMD_RET(CMD_802_11_RATE_ADAPT_RATESET): |
10078321 | 326 | ret = lbs_ret_802_11_rate_adapt_rateset(priv, resp); |
876c9d3a | 327 | break; |
876c9d3a | 328 | |
6b63cd0f | 329 | case CMD_RET(CMD_802_11_RSSI): |
10078321 | 330 | ret = lbs_ret_802_11_rssi(priv, resp); |
876c9d3a MT |
331 | break; |
332 | ||
6b63cd0f | 333 | case CMD_RET(CMD_802_11_AD_HOC_STOP): |
e98a88dd | 334 | ret = lbs_ret_80211_ad_hoc_stop(priv); |
876c9d3a MT |
335 | break; |
336 | ||
6b63cd0f | 337 | case CMD_RET(CMD_802_11D_DOMAIN_INFO): |
e98a88dd | 338 | ret = lbs_ret_802_11d_domain_info(resp); |
876c9d3a MT |
339 | break; |
340 | ||
6b63cd0f | 341 | case CMD_RET(CMD_802_11_TPC_CFG): |
aa21c004 | 342 | spin_lock_irqsave(&priv->driver_lock, flags); |
75567670 | 343 | memmove((void *)priv->cur_cmd->callback_arg, &resp->params.tpccfg, |
876c9d3a | 344 | sizeof(struct cmd_ds_802_11_tpc_cfg)); |
aa21c004 | 345 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a | 346 | break; |
6b63cd0f | 347 | case CMD_RET(CMD_802_11_LED_GPIO_CTRL): |
aa21c004 | 348 | spin_lock_irqsave(&priv->driver_lock, flags); |
75567670 | 349 | memmove((void *)priv->cur_cmd->callback_arg, &resp->params.ledgpio, |
876c9d3a | 350 | sizeof(struct cmd_ds_802_11_led_ctrl)); |
aa21c004 | 351 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a | 352 | break; |
3a188649 | 353 | |
6b63cd0f | 354 | case CMD_RET(CMD_GET_TSF): |
aa21c004 | 355 | spin_lock_irqsave(&priv->driver_lock, flags); |
75567670 | 356 | memcpy((void *)priv->cur_cmd->callback_arg, |
876c9d3a | 357 | &resp->params.gettsf.tsfvalue, sizeof(u64)); |
aa21c004 | 358 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a | 359 | break; |
6b63cd0f | 360 | case CMD_RET(CMD_BT_ACCESS): |
aa21c004 | 361 | spin_lock_irqsave(&priv->driver_lock, flags); |
75567670 DW |
362 | if (priv->cur_cmd->callback_arg) |
363 | memcpy((void *)priv->cur_cmd->callback_arg, | |
876c9d3a | 364 | &resp->params.bt.addr1, 2 * ETH_ALEN); |
aa21c004 | 365 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a | 366 | break; |
6b63cd0f | 367 | case CMD_RET(CMD_FWT_ACCESS): |
aa21c004 | 368 | spin_lock_irqsave(&priv->driver_lock, flags); |
75567670 DW |
369 | if (priv->cur_cmd->callback_arg) |
370 | memcpy((void *)priv->cur_cmd->callback_arg, &resp->params.fwt, | |
981f187b | 371 | sizeof(resp->params.fwt)); |
aa21c004 | 372 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a | 373 | break; |
96287ac4 BD |
374 | case CMD_RET(CMD_802_11_BEACON_CTRL): |
375 | ret = lbs_ret_802_11_bcn_ctrl(priv, resp); | |
376 | break; | |
377 | ||
876c9d3a | 378 | default: |
a6c8700f | 379 | lbs_deb_host("CMD_RESP: unknown cmd response 0x%04x\n", |
e1258177 | 380 | le16_to_cpu(resp->command)); |
876c9d3a MT |
381 | break; |
382 | } | |
a6c8700f | 383 | lbs_deb_leave(LBS_DEB_HOST); |
876c9d3a MT |
384 | return ret; |
385 | } | |
386 | ||
69f9032d | 387 | int lbs_process_rx_command(struct lbs_private *priv) |
876c9d3a | 388 | { |
e1258177 | 389 | uint16_t respcmd, curcmd; |
ddac4526 | 390 | struct cmd_header *resp; |
876c9d3a | 391 | int ret = 0; |
e1258177 DW |
392 | unsigned long flags; |
393 | uint16_t result; | |
876c9d3a | 394 | |
a6c8700f | 395 | lbs_deb_enter(LBS_DEB_HOST); |
876c9d3a | 396 | |
aa21c004 DW |
397 | mutex_lock(&priv->lock); |
398 | spin_lock_irqsave(&priv->driver_lock, flags); | |
876c9d3a | 399 | |
aa21c004 | 400 | if (!priv->cur_cmd) { |
a6c8700f | 401 | lbs_deb_host("CMD_RESP: cur_cmd is NULL\n"); |
876c9d3a | 402 | ret = -1; |
aa21c004 | 403 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a MT |
404 | goto done; |
405 | } | |
e1258177 | 406 | |
7003b078 | 407 | resp = (void *)priv->upld_buf; |
8a96df80 | 408 | curcmd = le16_to_cpu(priv->cur_cmd->cmdbuf->command); |
876c9d3a | 409 | respcmd = le16_to_cpu(resp->command); |
876c9d3a MT |
410 | result = le16_to_cpu(resp->result); |
411 | ||
e5225b39 HS |
412 | lbs_deb_cmd("CMD_RESP: response 0x%04x, seq %d, size %d\n", |
413 | respcmd, le16_to_cpu(resp->seqnum), priv->upld_len); | |
1afc09ab | 414 | lbs_deb_hex(LBS_DEB_CMD, "CMD_RESP", (void *) resp, priv->upld_len); |
876c9d3a | 415 | |
6305f498 | 416 | if (resp->seqnum != priv->cur_cmd->cmdbuf->seqnum) { |
e1258177 | 417 | lbs_pr_info("Received CMD_RESP with invalid sequence %d (expected %d)\n", |
6305f498 | 418 | le16_to_cpu(resp->seqnum), le16_to_cpu(priv->cur_cmd->cmdbuf->seqnum)); |
aa21c004 | 419 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a MT |
420 | ret = -1; |
421 | goto done; | |
422 | } | |
e1258177 | 423 | if (respcmd != CMD_RET(curcmd) && |
5f0547c2 | 424 | respcmd != CMD_RET_802_11_ASSOCIATE && curcmd != CMD_802_11_ASSOCIATE) { |
e1258177 DW |
425 | lbs_pr_info("Invalid CMD_RESP %x to command %x!\n", respcmd, curcmd); |
426 | spin_unlock_irqrestore(&priv->driver_lock, flags); | |
427 | ret = -1; | |
428 | goto done; | |
429 | } | |
430 | ||
8538823f DW |
431 | if (resp->result == cpu_to_le16(0x0004)) { |
432 | /* 0x0004 means -EAGAIN. Drop the response, let it time out | |
433 | and be resubmitted */ | |
434 | lbs_pr_info("Firmware returns DEFER to command %x. Will let it time out...\n", | |
435 | le16_to_cpu(resp->command)); | |
436 | spin_unlock_irqrestore(&priv->driver_lock, flags); | |
437 | ret = -1; | |
438 | goto done; | |
439 | } | |
440 | ||
e1258177 DW |
441 | /* Now we got response from FW, cancel the command timer */ |
442 | del_timer(&priv->command_timer); | |
2a345099 DW |
443 | priv->cmd_timed_out = 0; |
444 | if (priv->nr_retries) { | |
445 | lbs_pr_info("Received result %x to command %x after %d retries\n", | |
446 | result, curcmd, priv->nr_retries); | |
447 | priv->nr_retries = 0; | |
448 | } | |
876c9d3a MT |
449 | |
450 | /* Store the response code to cur_cmd_retcode. */ | |
aa21c004 | 451 | priv->cur_cmd_retcode = result; |
876c9d3a | 452 | |
6b63cd0f | 453 | if (respcmd == CMD_RET(CMD_802_11_PS_MODE)) { |
38bfab1a | 454 | struct cmd_ds_802_11_ps_mode *psmode = (void *) &resp[1]; |
981f187b | 455 | u16 action = le16_to_cpu(psmode->action); |
876c9d3a | 456 | |
a6c8700f HS |
457 | lbs_deb_host( |
458 | "CMD_RESP: PS_MODE cmd reply result 0x%x, action 0x%x\n", | |
981f187b | 459 | result, action); |
876c9d3a MT |
460 | |
461 | if (result) { | |
a6c8700f | 462 | lbs_deb_host("CMD_RESP: PS command failed with 0x%x\n", |
981f187b DW |
463 | result); |
464 | /* | |
465 | * We should not re-try enter-ps command in | |
466 | * ad-hoc mode. It takes place in | |
10078321 | 467 | * lbs_execute_next_command(). |
981f187b | 468 | */ |
aa21c004 | 469 | if (priv->mode == IW_MODE_ADHOC && |
0aef64d7 | 470 | action == CMD_SUBCMD_ENTER_PS) |
aa21c004 | 471 | priv->psmode = LBS802_11POWERMODECAM; |
0aef64d7 | 472 | } else if (action == CMD_SUBCMD_ENTER_PS) { |
aa21c004 DW |
473 | priv->needtowakeup = 0; |
474 | priv->psstate = PS_STATE_AWAKE; | |
876c9d3a | 475 | |
a6c8700f | 476 | lbs_deb_host("CMD_RESP: ENTER_PS command response\n"); |
aa21c004 | 477 | if (priv->connect_status != LBS_CONNECTED) { |
876c9d3a MT |
478 | /* |
479 | * When Deauth Event received before Enter_PS command | |
480 | * response, We need to wake up the firmware. | |
481 | */ | |
a6c8700f | 482 | lbs_deb_host( |
10078321 | 483 | "disconnected, invoking lbs_ps_wakeup\n"); |
876c9d3a | 484 | |
aa21c004 DW |
485 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
486 | mutex_unlock(&priv->lock); | |
10078321 | 487 | lbs_ps_wakeup(priv, 0); |
aa21c004 DW |
488 | mutex_lock(&priv->lock); |
489 | spin_lock_irqsave(&priv->driver_lock, flags); | |
876c9d3a | 490 | } |
0aef64d7 | 491 | } else if (action == CMD_SUBCMD_EXIT_PS) { |
aa21c004 DW |
492 | priv->needtowakeup = 0; |
493 | priv->psstate = PS_STATE_FULL_POWER; | |
a6c8700f | 494 | lbs_deb_host("CMD_RESP: EXIT_PS command response\n"); |
876c9d3a | 495 | } else { |
a6c8700f | 496 | lbs_deb_host("CMD_RESP: PS action 0x%X\n", action); |
876c9d3a MT |
497 | } |
498 | ||
183aeac1 | 499 | lbs_complete_command(priv, priv->cur_cmd, result); |
aa21c004 | 500 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a MT |
501 | |
502 | ret = 0; | |
503 | goto done; | |
504 | } | |
505 | ||
876c9d3a MT |
506 | /* If the command is not successful, cleanup and return failure */ |
507 | if ((result != 0 || !(respcmd & 0x8000))) { | |
a6c8700f HS |
508 | lbs_deb_host("CMD_RESP: error 0x%04x in command reply 0x%04x\n", |
509 | result, respcmd); | |
876c9d3a MT |
510 | /* |
511 | * Handling errors here | |
512 | */ | |
513 | switch (respcmd) { | |
6b63cd0f HS |
514 | case CMD_RET(CMD_GET_HW_SPEC): |
515 | case CMD_RET(CMD_802_11_RESET): | |
a6c8700f | 516 | lbs_deb_host("CMD_RESP: reset failed\n"); |
876c9d3a MT |
517 | break; |
518 | ||
519 | } | |
183aeac1 | 520 | lbs_complete_command(priv, priv->cur_cmd, result); |
aa21c004 | 521 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a MT |
522 | |
523 | ret = -1; | |
524 | goto done; | |
525 | } | |
526 | ||
aa21c004 | 527 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
1723047d | 528 | |
7ad994de DW |
529 | if (priv->cur_cmd && priv->cur_cmd->callback) { |
530 | ret = priv->cur_cmd->callback(priv, priv->cur_cmd->callback_arg, | |
ddac4526 | 531 | resp); |
7ad994de | 532 | } else |
e98a88dd | 533 | ret = handle_cmd_response(priv, resp); |
1723047d | 534 | |
aa21c004 | 535 | spin_lock_irqsave(&priv->driver_lock, flags); |
1723047d | 536 | |
aa21c004 | 537 | if (priv->cur_cmd) { |
876c9d3a | 538 | /* Clean up and Put current command back to cmdfreeq */ |
183aeac1 | 539 | lbs_complete_command(priv, priv->cur_cmd, result); |
876c9d3a | 540 | } |
aa21c004 | 541 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a MT |
542 | |
543 | done: | |
aa21c004 | 544 | mutex_unlock(&priv->lock); |
a6c8700f | 545 | lbs_deb_leave_args(LBS_DEB_HOST, "ret %d", ret); |
876c9d3a MT |
546 | return ret; |
547 | } | |
548 | ||
b47ef243 DW |
549 | static int lbs_send_confirmwake(struct lbs_private *priv) |
550 | { | |
f539f2ef | 551 | struct cmd_header cmd; |
b47ef243 DW |
552 | int ret = 0; |
553 | ||
554 | lbs_deb_enter(LBS_DEB_HOST); | |
555 | ||
f539f2ef HS |
556 | cmd.command = cpu_to_le16(CMD_802_11_WAKEUP_CONFIRM); |
557 | cmd.size = cpu_to_le16(sizeof(cmd)); | |
558 | cmd.seqnum = cpu_to_le16(++priv->seqnum); | |
559 | cmd.result = 0; | |
b47ef243 | 560 | |
f539f2ef HS |
561 | lbs_deb_hex(LBS_DEB_HOST, "wake confirm", (u8 *) &cmd, |
562 | sizeof(cmd)); | |
b47ef243 | 563 | |
f539f2ef | 564 | ret = priv->hw_host_to_card(priv, MVMS_CMD, (u8 *) &cmd, sizeof(cmd)); |
b47ef243 DW |
565 | if (ret) |
566 | lbs_pr_alert("SEND_WAKEC_CMD: Host to Card failed for Confirm Wake\n"); | |
567 | ||
568 | lbs_deb_leave_args(LBS_DEB_HOST, "ret %d", ret); | |
569 | return ret; | |
570 | } | |
571 | ||
69f9032d | 572 | int lbs_process_event(struct lbs_private *priv) |
876c9d3a MT |
573 | { |
574 | int ret = 0; | |
876c9d3a MT |
575 | u32 eventcause; |
576 | ||
9556d212 HS |
577 | lbs_deb_enter(LBS_DEB_CMD); |
578 | ||
aa21c004 DW |
579 | spin_lock_irq(&priv->driver_lock); |
580 | eventcause = priv->eventcause >> SBI_EVENT_CAUSE_SHIFT; | |
581 | spin_unlock_irq(&priv->driver_lock); | |
876c9d3a | 582 | |
0b3c07ff | 583 | switch (eventcause) { |
876c9d3a | 584 | case MACREG_INT_CODE_LINK_SENSED: |
d4ff0ef6 | 585 | lbs_deb_cmd("EVENT: link sensed\n"); |
876c9d3a MT |
586 | break; |
587 | ||
588 | case MACREG_INT_CODE_DEAUTHENTICATED: | |
a6c8700f | 589 | lbs_deb_cmd("EVENT: deauthenticated\n"); |
10078321 | 590 | lbs_mac_event_disconnected(priv); |
876c9d3a MT |
591 | break; |
592 | ||
593 | case MACREG_INT_CODE_DISASSOCIATED: | |
a6c8700f | 594 | lbs_deb_cmd("EVENT: disassociated\n"); |
10078321 | 595 | lbs_mac_event_disconnected(priv); |
876c9d3a MT |
596 | break; |
597 | ||
0b3c07ff | 598 | case MACREG_INT_CODE_LINK_LOST_NO_SCAN: |
a6c8700f | 599 | lbs_deb_cmd("EVENT: link lost\n"); |
10078321 | 600 | lbs_mac_event_disconnected(priv); |
876c9d3a MT |
601 | break; |
602 | ||
603 | case MACREG_INT_CODE_PS_SLEEP: | |
d4ff0ef6 | 604 | lbs_deb_cmd("EVENT: ps sleep\n"); |
876c9d3a MT |
605 | |
606 | /* handle unexpected PS SLEEP event */ | |
aa21c004 | 607 | if (priv->psstate == PS_STATE_FULL_POWER) { |
9012b28a | 608 | lbs_deb_cmd( |
a6c8700f | 609 | "EVENT: in FULL POWER mode, ignoreing PS_SLEEP\n"); |
876c9d3a MT |
610 | break; |
611 | } | |
aa21c004 | 612 | priv->psstate = PS_STATE_PRE_SLEEP; |
876c9d3a | 613 | |
d4ff0ef6 | 614 | lbs_ps_confirm_sleep(priv); |
876c9d3a MT |
615 | |
616 | break; | |
617 | ||
b47ef243 | 618 | case MACREG_INT_CODE_HOST_AWAKE: |
d4ff0ef6 | 619 | lbs_deb_cmd("EVENT: host awake\n"); |
b47ef243 DW |
620 | lbs_send_confirmwake(priv); |
621 | break; | |
622 | ||
876c9d3a | 623 | case MACREG_INT_CODE_PS_AWAKE: |
d4ff0ef6 | 624 | lbs_deb_cmd("EVENT: ps awake\n"); |
876c9d3a | 625 | /* handle unexpected PS AWAKE event */ |
aa21c004 | 626 | if (priv->psstate == PS_STATE_FULL_POWER) { |
9012b28a | 627 | lbs_deb_cmd( |
876c9d3a MT |
628 | "EVENT: In FULL POWER mode - ignore PS AWAKE\n"); |
629 | break; | |
630 | } | |
631 | ||
aa21c004 | 632 | priv->psstate = PS_STATE_AWAKE; |
876c9d3a | 633 | |
aa21c004 | 634 | if (priv->needtowakeup) { |
876c9d3a MT |
635 | /* |
636 | * wait for the command processing to finish | |
637 | * before resuming sending | |
aa21c004 | 638 | * priv->needtowakeup will be set to FALSE |
10078321 | 639 | * in lbs_ps_wakeup() |
876c9d3a | 640 | */ |
a6c8700f | 641 | lbs_deb_cmd("waking up ...\n"); |
10078321 | 642 | lbs_ps_wakeup(priv, 0); |
876c9d3a MT |
643 | } |
644 | break; | |
645 | ||
646 | case MACREG_INT_CODE_MIC_ERR_UNICAST: | |
9012b28a | 647 | lbs_deb_cmd("EVENT: UNICAST MIC ERROR\n"); |
876c9d3a MT |
648 | handle_mic_failureevent(priv, MACREG_INT_CODE_MIC_ERR_UNICAST); |
649 | break; | |
650 | ||
651 | case MACREG_INT_CODE_MIC_ERR_MULTICAST: | |
9012b28a | 652 | lbs_deb_cmd("EVENT: MULTICAST MIC ERROR\n"); |
876c9d3a MT |
653 | handle_mic_failureevent(priv, MACREG_INT_CODE_MIC_ERR_MULTICAST); |
654 | break; | |
d4ff0ef6 | 655 | |
876c9d3a | 656 | case MACREG_INT_CODE_MIB_CHANGED: |
d4ff0ef6 HS |
657 | lbs_deb_cmd("EVENT: MIB CHANGED\n"); |
658 | break; | |
876c9d3a | 659 | case MACREG_INT_CODE_INIT_DONE: |
d4ff0ef6 | 660 | lbs_deb_cmd("EVENT: INIT DONE\n"); |
876c9d3a | 661 | break; |
876c9d3a | 662 | case MACREG_INT_CODE_ADHOC_BCN_LOST: |
a6c8700f | 663 | lbs_deb_cmd("EVENT: ADHOC beacon lost\n"); |
876c9d3a | 664 | break; |
876c9d3a | 665 | case MACREG_INT_CODE_RSSI_LOW: |
a6c8700f | 666 | lbs_pr_alert("EVENT: rssi low\n"); |
876c9d3a MT |
667 | break; |
668 | case MACREG_INT_CODE_SNR_LOW: | |
a6c8700f | 669 | lbs_pr_alert("EVENT: snr low\n"); |
876c9d3a MT |
670 | break; |
671 | case MACREG_INT_CODE_MAX_FAIL: | |
a6c8700f | 672 | lbs_pr_alert("EVENT: max fail\n"); |
876c9d3a MT |
673 | break; |
674 | case MACREG_INT_CODE_RSSI_HIGH: | |
a6c8700f | 675 | lbs_pr_alert("EVENT: rssi high\n"); |
876c9d3a MT |
676 | break; |
677 | case MACREG_INT_CODE_SNR_HIGH: | |
a6c8700f | 678 | lbs_pr_alert("EVENT: snr high\n"); |
876c9d3a MT |
679 | break; |
680 | ||
7d8d28b3 | 681 | case MACREG_INT_CODE_MESH_AUTO_STARTED: |
5612c014 DW |
682 | /* Ignore spurious autostart events if autostart is disabled */ |
683 | if (!priv->mesh_autostart_enabled) { | |
684 | lbs_pr_info("EVENT: MESH_AUTO_STARTED (ignoring)\n"); | |
685 | break; | |
686 | } | |
9cdc6d29 | 687 | lbs_pr_info("EVENT: MESH_AUTO_STARTED\n"); |
aa21c004 | 688 | priv->mesh_connect_status = LBS_CONNECTED; |
a27b9f96 | 689 | if (priv->mesh_open) { |
9cdc6d29 | 690 | netif_carrier_on(priv->mesh_dev); |
a27b9f96 DW |
691 | if (!priv->tx_pending_len) |
692 | netif_wake_queue(priv->mesh_dev); | |
7d8d28b3 | 693 | } |
aa21c004 | 694 | priv->mode = IW_MODE_ADHOC; |
b8bedefd | 695 | schedule_work(&priv->sync_channel); |
7d8d28b3 LCCR |
696 | break; |
697 | ||
876c9d3a | 698 | default: |
0b3c07ff | 699 | lbs_pr_alert("EVENT: unknown event id %d\n", eventcause); |
876c9d3a MT |
700 | break; |
701 | } | |
702 | ||
aa21c004 DW |
703 | spin_lock_irq(&priv->driver_lock); |
704 | priv->eventcause = 0; | |
705 | spin_unlock_irq(&priv->driver_lock); | |
9012b28a | 706 | |
9556d212 | 707 | lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret); |
876c9d3a MT |
708 | return ret; |
709 | } |