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b481de9c ZY |
1 | /****************************************************************************** |
2 | * | |
01f8162a | 3 | * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. |
b481de9c ZY |
4 | * |
5 | * Portions of this file are derived from the ipw3945 project, as well | |
6 | * as portions of the ieee80211 subsystem header files. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of version 2 of the GNU General Public License as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
15 | * more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License along with | |
18 | * this program; if not, write to the Free Software Foundation, Inc., | |
19 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA | |
20 | * | |
21 | * The full GNU General Public License is included in this distribution in the | |
22 | * file called LICENSE. | |
23 | * | |
24 | * Contact Information: | |
759ef89f | 25 | * Intel Linux Wireless <ilw@linux.intel.com> |
b481de9c ZY |
26 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
27 | * | |
28 | *****************************************************************************/ | |
29 | ||
b481de9c ZY |
30 | #include <linux/kernel.h> |
31 | #include <linux/module.h> | |
b481de9c ZY |
32 | #include <linux/init.h> |
33 | #include <linux/pci.h> | |
34 | #include <linux/dma-mapping.h> | |
35 | #include <linux/delay.h> | |
36 | #include <linux/skbuff.h> | |
37 | #include <linux/netdevice.h> | |
38 | #include <linux/wireless.h> | |
39 | #include <linux/firmware.h> | |
b481de9c ZY |
40 | #include <linux/etherdevice.h> |
41 | #include <linux/if_arp.h> | |
42 | ||
43 | #include <net/ieee80211_radiotap.h> | |
7e272fcf | 44 | #include <net/lib80211.h> |
b481de9c ZY |
45 | #include <net/mac80211.h> |
46 | ||
47 | #include <asm/div64.h> | |
48 | ||
a3139c59 SO |
49 | #define DRV_NAME "iwl3945" |
50 | ||
dbb6654c WT |
51 | #include "iwl-fh.h" |
52 | #include "iwl-3945-fh.h" | |
600c0e11 | 53 | #include "iwl-commands.h" |
17f841cd | 54 | #include "iwl-sta.h" |
b481de9c ZY |
55 | #include "iwl-3945.h" |
56 | #include "iwl-helpers.h" | |
5747d47f | 57 | #include "iwl-core.h" |
d20b3c65 | 58 | #include "iwl-dev.h" |
b481de9c | 59 | |
b481de9c ZY |
60 | /* |
61 | * module name, copyright, version, etc. | |
b481de9c ZY |
62 | */ |
63 | ||
64 | #define DRV_DESCRIPTION \ | |
65 | "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux" | |
66 | ||
d08853a3 | 67 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
68 | #define VD "d" |
69 | #else | |
70 | #define VD | |
71 | #endif | |
72 | ||
c8b0e6e1 | 73 | #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT |
b481de9c ZY |
74 | #define VS "s" |
75 | #else | |
76 | #define VS | |
77 | #endif | |
78 | ||
eaa686c3 | 79 | #define IWL39_VERSION "1.2.26k" VD VS |
01f8162a | 80 | #define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation" |
a7b75207 | 81 | #define DRV_AUTHOR "<ilw@linux.intel.com>" |
eaa686c3 | 82 | #define DRV_VERSION IWL39_VERSION |
b481de9c | 83 | |
b481de9c ZY |
84 | |
85 | MODULE_DESCRIPTION(DRV_DESCRIPTION); | |
86 | MODULE_VERSION(DRV_VERSION); | |
a7b75207 | 87 | MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR); |
b481de9c ZY |
88 | MODULE_LICENSE("GPL"); |
89 | ||
df878d8f KA |
90 | /* module parameters */ |
91 | struct iwl_mod_params iwl3945_mod_params = { | |
92 | .num_of_queues = IWL39_MAX_NUM_QUEUES, | |
9c74d9fb | 93 | .sw_crypto = 1, |
af48d048 | 94 | .restart_fw = 1, |
df878d8f KA |
95 | /* the rest are 0 by default */ |
96 | }; | |
97 | ||
b481de9c | 98 | /*************** STATION TABLE MANAGEMENT **** |
9fbab516 | 99 | * mac80211 should be examined to determine if sta_info is duplicating |
b481de9c ZY |
100 | * the functionality provided here |
101 | */ | |
102 | ||
103 | /**************************************************************/ | |
01ebd063 | 104 | #if 0 /* temporary disable till we add real remove station */ |
6440adb5 BC |
105 | /** |
106 | * iwl3945_remove_station - Remove driver's knowledge of station. | |
107 | * | |
108 | * NOTE: This does not remove station from device's station table. | |
109 | */ | |
4a8a4322 | 110 | static u8 iwl3945_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap) |
b481de9c ZY |
111 | { |
112 | int index = IWL_INVALID_STATION; | |
113 | int i; | |
114 | unsigned long flags; | |
115 | ||
116 | spin_lock_irqsave(&priv->sta_lock, flags); | |
117 | ||
118 | if (is_ap) | |
119 | index = IWL_AP_ID; | |
120 | else if (is_broadcast_ether_addr(addr)) | |
3832ec9d | 121 | index = priv->hw_params.bcast_sta_id; |
b481de9c | 122 | else |
3832ec9d | 123 | for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) |
f2c7e521 AK |
124 | if (priv->stations_39[i].used && |
125 | !compare_ether_addr(priv->stations_39[i].sta.sta.addr, | |
b481de9c ZY |
126 | addr)) { |
127 | index = i; | |
128 | break; | |
129 | } | |
130 | ||
131 | if (unlikely(index == IWL_INVALID_STATION)) | |
132 | goto out; | |
133 | ||
f2c7e521 AK |
134 | if (priv->stations_39[index].used) { |
135 | priv->stations_39[index].used = 0; | |
b481de9c ZY |
136 | priv->num_stations--; |
137 | } | |
138 | ||
139 | BUG_ON(priv->num_stations < 0); | |
140 | ||
141 | out: | |
142 | spin_unlock_irqrestore(&priv->sta_lock, flags); | |
143 | return 0; | |
144 | } | |
556f8db7 | 145 | #endif |
6440adb5 BC |
146 | |
147 | /** | |
148 | * iwl3945_clear_stations_table - Clear the driver's station table | |
149 | * | |
150 | * NOTE: This does not clear or otherwise alter the device's station table. | |
151 | */ | |
4a8a4322 | 152 | static void iwl3945_clear_stations_table(struct iwl_priv *priv) |
b481de9c ZY |
153 | { |
154 | unsigned long flags; | |
155 | ||
156 | spin_lock_irqsave(&priv->sta_lock, flags); | |
157 | ||
158 | priv->num_stations = 0; | |
f2c7e521 | 159 | memset(priv->stations_39, 0, sizeof(priv->stations_39)); |
b481de9c ZY |
160 | |
161 | spin_unlock_irqrestore(&priv->sta_lock, flags); | |
162 | } | |
163 | ||
6440adb5 BC |
164 | /** |
165 | * iwl3945_add_station - Add station to station tables in driver and device | |
166 | */ | |
4a8a4322 | 167 | u8 iwl3945_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags) |
b481de9c ZY |
168 | { |
169 | int i; | |
170 | int index = IWL_INVALID_STATION; | |
bb8c093b | 171 | struct iwl3945_station_entry *station; |
b481de9c | 172 | unsigned long flags_spin; |
c14c521e | 173 | u8 rate; |
b481de9c ZY |
174 | |
175 | spin_lock_irqsave(&priv->sta_lock, flags_spin); | |
176 | if (is_ap) | |
177 | index = IWL_AP_ID; | |
178 | else if (is_broadcast_ether_addr(addr)) | |
3832ec9d | 179 | index = priv->hw_params.bcast_sta_id; |
b481de9c | 180 | else |
3832ec9d | 181 | for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) { |
f2c7e521 | 182 | if (!compare_ether_addr(priv->stations_39[i].sta.sta.addr, |
b481de9c ZY |
183 | addr)) { |
184 | index = i; | |
185 | break; | |
186 | } | |
187 | ||
f2c7e521 | 188 | if (!priv->stations_39[i].used && |
b481de9c ZY |
189 | index == IWL_INVALID_STATION) |
190 | index = i; | |
191 | } | |
192 | ||
01ebd063 | 193 | /* These two conditions has the same outcome but keep them separate |
b481de9c ZY |
194 | since they have different meaning */ |
195 | if (unlikely(index == IWL_INVALID_STATION)) { | |
196 | spin_unlock_irqrestore(&priv->sta_lock, flags_spin); | |
197 | return index; | |
198 | } | |
199 | ||
f2c7e521 AK |
200 | if (priv->stations_39[index].used && |
201 | !compare_ether_addr(priv->stations_39[index].sta.sta.addr, addr)) { | |
b481de9c ZY |
202 | spin_unlock_irqrestore(&priv->sta_lock, flags_spin); |
203 | return index; | |
204 | } | |
205 | ||
e1623446 | 206 | IWL_DEBUG_ASSOC(priv, "Add STA ID %d: %pM\n", index, addr); |
f2c7e521 | 207 | station = &priv->stations_39[index]; |
b481de9c ZY |
208 | station->used = 1; |
209 | priv->num_stations++; | |
210 | ||
6440adb5 | 211 | /* Set up the REPLY_ADD_STA command to send to device */ |
bb8c093b | 212 | memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd)); |
b481de9c ZY |
213 | memcpy(station->sta.sta.addr, addr, ETH_ALEN); |
214 | station->sta.mode = 0; | |
215 | station->sta.sta.sta_id = index; | |
216 | station->sta.station_flags = 0; | |
217 | ||
8318d78a | 218 | if (priv->band == IEEE80211_BAND_5GHZ) |
69946333 TW |
219 | rate = IWL_RATE_6M_PLCP; |
220 | else | |
221 | rate = IWL_RATE_1M_PLCP; | |
c14c521e ZY |
222 | |
223 | /* Turn on both antennas for the station... */ | |
224 | station->sta.rate_n_flags = | |
bb8c093b | 225 | iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK); |
c14c521e | 226 | |
b481de9c | 227 | spin_unlock_irqrestore(&priv->sta_lock, flags_spin); |
6440adb5 BC |
228 | |
229 | /* Add station to device's station table */ | |
17f841cd SO |
230 | iwl_send_add_sta(priv, |
231 | (struct iwl_addsta_cmd *)&station->sta, flags); | |
b481de9c ZY |
232 | return index; |
233 | ||
234 | } | |
235 | ||
4a8a4322 | 236 | static int iwl3945_send_rxon_assoc(struct iwl_priv *priv) |
b481de9c ZY |
237 | { |
238 | int rc = 0; | |
3d24a9f7 | 239 | struct iwl_rx_packet *res = NULL; |
bb8c093b | 240 | struct iwl3945_rxon_assoc_cmd rxon_assoc; |
c2d79b48 | 241 | struct iwl_host_cmd cmd = { |
b481de9c ZY |
242 | .id = REPLY_RXON_ASSOC, |
243 | .len = sizeof(rxon_assoc), | |
244 | .meta.flags = CMD_WANT_SKB, | |
245 | .data = &rxon_assoc, | |
246 | }; | |
8ccde88a SO |
247 | const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon; |
248 | const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon; | |
b481de9c ZY |
249 | |
250 | if ((rxon1->flags == rxon2->flags) && | |
251 | (rxon1->filter_flags == rxon2->filter_flags) && | |
252 | (rxon1->cck_basic_rates == rxon2->cck_basic_rates) && | |
253 | (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) { | |
e1623446 | 254 | IWL_DEBUG_INFO(priv, "Using current RXON_ASSOC. Not resending.\n"); |
b481de9c ZY |
255 | return 0; |
256 | } | |
257 | ||
8ccde88a SO |
258 | rxon_assoc.flags = priv->staging_rxon.flags; |
259 | rxon_assoc.filter_flags = priv->staging_rxon.filter_flags; | |
260 | rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates; | |
261 | rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates; | |
b481de9c ZY |
262 | rxon_assoc.reserved = 0; |
263 | ||
518099a8 | 264 | rc = iwl_send_cmd_sync(priv, &cmd); |
b481de9c ZY |
265 | if (rc) |
266 | return rc; | |
267 | ||
3d24a9f7 | 268 | res = (struct iwl_rx_packet *)cmd.meta.u.skb->data; |
b481de9c | 269 | if (res->hdr.flags & IWL_CMD_FAILED_MSK) { |
15b1687c | 270 | IWL_ERR(priv, "Bad return from REPLY_RXON_ASSOC command\n"); |
b481de9c ZY |
271 | rc = -EIO; |
272 | } | |
273 | ||
274 | priv->alloc_rxb_skb--; | |
275 | dev_kfree_skb_any(cmd.meta.u.skb); | |
276 | ||
277 | return rc; | |
278 | } | |
279 | ||
7e4bca5e SO |
280 | /** |
281 | * iwl3945_get_antenna_flags - Get antenna flags for RXON command | |
282 | * @priv: eeprom and antenna fields are used to determine antenna flags | |
283 | * | |
284 | * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed | |
285 | * iwl3945_mod_params.antenna specifies the antenna diversity mode: | |
286 | * | |
287 | * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself | |
288 | * IWL_ANTENNA_MAIN - Force MAIN antenna | |
289 | * IWL_ANTENNA_AUX - Force AUX antenna | |
290 | */ | |
291 | __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv) | |
292 | { | |
293 | struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom; | |
294 | ||
295 | switch (iwl3945_mod_params.antenna) { | |
296 | case IWL_ANTENNA_DIVERSITY: | |
297 | return 0; | |
298 | ||
299 | case IWL_ANTENNA_MAIN: | |
300 | if (eeprom->antenna_switch_type) | |
301 | return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK; | |
302 | return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK; | |
303 | ||
304 | case IWL_ANTENNA_AUX: | |
305 | if (eeprom->antenna_switch_type) | |
306 | return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK; | |
307 | return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK; | |
308 | } | |
309 | ||
310 | /* bad antenna selector value */ | |
311 | IWL_ERR(priv, "Bad antenna selector value (0x%x)\n", | |
312 | iwl3945_mod_params.antenna); | |
313 | ||
314 | return 0; /* "diversity" is default if error */ | |
315 | } | |
316 | ||
b481de9c | 317 | /** |
bb8c093b | 318 | * iwl3945_commit_rxon - commit staging_rxon to hardware |
b481de9c | 319 | * |
01ebd063 | 320 | * The RXON command in staging_rxon is committed to the hardware and |
b481de9c ZY |
321 | * the active_rxon structure is updated with the new data. This |
322 | * function correctly transitions out of the RXON_ASSOC_MSK state if | |
323 | * a HW tune is required based on the RXON structure changes. | |
324 | */ | |
4a8a4322 | 325 | static int iwl3945_commit_rxon(struct iwl_priv *priv) |
b481de9c ZY |
326 | { |
327 | /* cast away the const for active_rxon in this function */ | |
8ccde88a SO |
328 | struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active_rxon; |
329 | struct iwl3945_rxon_cmd *staging_rxon = (void *)&priv->staging_rxon; | |
b481de9c | 330 | int rc = 0; |
8337031e AK |
331 | bool new_assoc = |
332 | !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK); | |
b481de9c | 333 | |
775a6e27 | 334 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
335 | return -1; |
336 | ||
337 | /* always get timestamp with Rx frame */ | |
8ccde88a | 338 | staging_rxon->flags |= RXON_FLG_TSF2HOST_MSK; |
b481de9c ZY |
339 | |
340 | /* select antenna */ | |
8ccde88a | 341 | staging_rxon->flags &= |
b481de9c | 342 | ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK); |
8ccde88a | 343 | staging_rxon->flags |= iwl3945_get_antenna_flags(priv); |
b481de9c | 344 | |
8ccde88a | 345 | rc = iwl_check_rxon_cmd(priv); |
b481de9c | 346 | if (rc) { |
15b1687c | 347 | IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n"); |
b481de9c ZY |
348 | return -EINVAL; |
349 | } | |
350 | ||
351 | /* If we don't need to send a full RXON, we can use | |
bb8c093b | 352 | * iwl3945_rxon_assoc_cmd which is used to reconfigure filter |
b481de9c | 353 | * and other flags for the current radio configuration. */ |
8ccde88a | 354 | if (!iwl_full_rxon_required(priv)) { |
bb8c093b | 355 | rc = iwl3945_send_rxon_assoc(priv); |
b481de9c | 356 | if (rc) { |
15b1687c | 357 | IWL_ERR(priv, "Error setting RXON_ASSOC " |
b481de9c ZY |
358 | "configuration (%d).\n", rc); |
359 | return rc; | |
360 | } | |
361 | ||
8ccde88a | 362 | memcpy(active_rxon, staging_rxon, sizeof(*active_rxon)); |
b481de9c ZY |
363 | |
364 | return 0; | |
365 | } | |
366 | ||
367 | /* If we are currently associated and the new config requires | |
368 | * an RXON_ASSOC and the new config wants the associated mask enabled, | |
369 | * we must clear the associated from the active configuration | |
370 | * before we apply the new config */ | |
8337031e | 371 | if (iwl_is_associated(priv) && new_assoc) { |
e1623446 | 372 | IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n"); |
b481de9c ZY |
373 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
374 | ||
8ccde88a SO |
375 | /* |
376 | * reserved4 and 5 could have been filled by the iwlcore code. | |
377 | * Let's clear them before pushing to the 3945. | |
378 | */ | |
379 | active_rxon->reserved4 = 0; | |
380 | active_rxon->reserved5 = 0; | |
518099a8 | 381 | rc = iwl_send_cmd_pdu(priv, REPLY_RXON, |
bb8c093b | 382 | sizeof(struct iwl3945_rxon_cmd), |
8ccde88a | 383 | &priv->active_rxon); |
b481de9c ZY |
384 | |
385 | /* If the mask clearing failed then we set | |
386 | * active_rxon back to what it was previously */ | |
387 | if (rc) { | |
388 | active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK; | |
15b1687c | 389 | IWL_ERR(priv, "Error clearing ASSOC_MSK on current " |
b481de9c ZY |
390 | "configuration (%d).\n", rc); |
391 | return rc; | |
392 | } | |
b481de9c ZY |
393 | } |
394 | ||
e1623446 | 395 | IWL_DEBUG_INFO(priv, "Sending RXON\n" |
b481de9c ZY |
396 | "* with%s RXON_FILTER_ASSOC_MSK\n" |
397 | "* channel = %d\n" | |
e174961c | 398 | "* bssid = %pM\n", |
8337031e | 399 | (new_assoc ? "" : "out"), |
8ccde88a SO |
400 | le16_to_cpu(staging_rxon->channel), |
401 | staging_rxon->bssid_addr); | |
402 | ||
403 | /* | |
404 | * reserved4 and 5 could have been filled by the iwlcore code. | |
405 | * Let's clear them before pushing to the 3945. | |
406 | */ | |
407 | staging_rxon->reserved4 = 0; | |
408 | staging_rxon->reserved5 = 0; | |
b481de9c | 409 | |
6e21f15c AK |
410 | iwl_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto); |
411 | ||
b481de9c | 412 | /* Apply the new configuration */ |
518099a8 | 413 | rc = iwl_send_cmd_pdu(priv, REPLY_RXON, |
8ccde88a SO |
414 | sizeof(struct iwl3945_rxon_cmd), |
415 | staging_rxon); | |
b481de9c | 416 | if (rc) { |
15b1687c | 417 | IWL_ERR(priv, "Error setting new configuration (%d).\n", rc); |
b481de9c ZY |
418 | return rc; |
419 | } | |
420 | ||
8ccde88a | 421 | memcpy(active_rxon, staging_rxon, sizeof(*active_rxon)); |
b481de9c | 422 | |
bb8c093b | 423 | iwl3945_clear_stations_table(priv); |
556f8db7 | 424 | |
b481de9c ZY |
425 | /* If we issue a new RXON command which required a tune then we must |
426 | * send a new TXPOWER command or we won't be able to Tx any frames */ | |
75bcfae9 | 427 | rc = priv->cfg->ops->lib->send_tx_power(priv); |
b481de9c | 428 | if (rc) { |
15b1687c | 429 | IWL_ERR(priv, "Error setting Tx power (%d).\n", rc); |
b481de9c ZY |
430 | return rc; |
431 | } | |
432 | ||
433 | /* Add the broadcast address so we can send broadcast frames */ | |
b5323d36 | 434 | if (iwl3945_add_station(priv, iwl_bcast_addr, 0, 0) == |
b481de9c | 435 | IWL_INVALID_STATION) { |
15b1687c | 436 | IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n"); |
b481de9c ZY |
437 | return -EIO; |
438 | } | |
439 | ||
440 | /* If we have set the ASSOC_MSK and we are in BSS mode then | |
441 | * add the IWL_AP_ID to the station rate table */ | |
8ccde88a | 442 | if (iwl_is_associated(priv) && |
05c914fe | 443 | (priv->iw_mode == NL80211_IFTYPE_STATION)) |
8ccde88a SO |
444 | if (iwl3945_add_station(priv, priv->active_rxon.bssid_addr, |
445 | 1, 0) | |
b481de9c | 446 | == IWL_INVALID_STATION) { |
15b1687c | 447 | IWL_ERR(priv, "Error adding AP address for transmit\n"); |
b481de9c ZY |
448 | return -EIO; |
449 | } | |
450 | ||
8318d78a | 451 | /* Init the hardware's rate fallback order based on the band */ |
b481de9c ZY |
452 | rc = iwl3945_init_hw_rate_table(priv); |
453 | if (rc) { | |
15b1687c | 454 | IWL_ERR(priv, "Error setting HW rate table: %02X\n", rc); |
b481de9c ZY |
455 | return -EIO; |
456 | } | |
457 | ||
458 | return 0; | |
459 | } | |
460 | ||
6e21f15c | 461 | static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv, |
b481de9c ZY |
462 | struct ieee80211_key_conf *keyconf, |
463 | u8 sta_id) | |
464 | { | |
465 | unsigned long flags; | |
466 | __le16 key_flags = 0; | |
6e21f15c AK |
467 | int ret; |
468 | ||
469 | key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK); | |
470 | key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS); | |
471 | ||
472 | if (sta_id == priv->hw_params.bcast_sta_id) | |
473 | key_flags |= STA_KEY_MULTICAST_MSK; | |
474 | ||
475 | keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV; | |
476 | keyconf->hw_key_idx = keyconf->keyidx; | |
477 | key_flags &= ~STA_KEY_FLG_INVALID; | |
b481de9c | 478 | |
b481de9c | 479 | spin_lock_irqsave(&priv->sta_lock, flags); |
f2c7e521 AK |
480 | priv->stations_39[sta_id].keyinfo.alg = keyconf->alg; |
481 | priv->stations_39[sta_id].keyinfo.keylen = keyconf->keylen; | |
482 | memcpy(priv->stations_39[sta_id].keyinfo.key, keyconf->key, | |
b481de9c ZY |
483 | keyconf->keylen); |
484 | ||
f2c7e521 | 485 | memcpy(priv->stations_39[sta_id].sta.key.key, keyconf->key, |
b481de9c | 486 | keyconf->keylen); |
6e21f15c | 487 | |
43da9192 | 488 | if ((priv->stations_39[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK) |
6e21f15c | 489 | == STA_KEY_FLG_NO_ENC) |
43da9192 | 490 | priv->stations_39[sta_id].sta.key.key_offset = |
6e21f15c AK |
491 | iwl_get_free_ucode_key_index(priv); |
492 | /* else, we are overriding an existing key => no need to allocated room | |
493 | * in uCode. */ | |
494 | ||
43da9192 | 495 | WARN(priv->stations_39[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET, |
6e21f15c AK |
496 | "no space for a new key"); |
497 | ||
f2c7e521 AK |
498 | priv->stations_39[sta_id].sta.key.key_flags = key_flags; |
499 | priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; | |
500 | priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; | |
b481de9c | 501 | |
6e21f15c AK |
502 | IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n"); |
503 | ||
504 | ret = iwl_send_add_sta(priv, | |
505 | (struct iwl_addsta_cmd *)&priv->stations_39[sta_id].sta, CMD_ASYNC); | |
506 | ||
b481de9c ZY |
507 | spin_unlock_irqrestore(&priv->sta_lock, flags); |
508 | ||
6e21f15c AK |
509 | return ret; |
510 | } | |
511 | ||
512 | static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv, | |
513 | struct ieee80211_key_conf *keyconf, | |
514 | u8 sta_id) | |
515 | { | |
516 | return -EOPNOTSUPP; | |
517 | } | |
518 | ||
519 | static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv, | |
520 | struct ieee80211_key_conf *keyconf, | |
521 | u8 sta_id) | |
522 | { | |
523 | return -EOPNOTSUPP; | |
b481de9c ZY |
524 | } |
525 | ||
4a8a4322 | 526 | static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id) |
b481de9c ZY |
527 | { |
528 | unsigned long flags; | |
529 | ||
530 | spin_lock_irqsave(&priv->sta_lock, flags); | |
f2c7e521 AK |
531 | memset(&priv->stations_39[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key)); |
532 | memset(&priv->stations_39[sta_id].sta.key, 0, | |
4c897253 | 533 | sizeof(struct iwl4965_keyinfo)); |
f2c7e521 AK |
534 | priv->stations_39[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC; |
535 | priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; | |
536 | priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; | |
b481de9c ZY |
537 | spin_unlock_irqrestore(&priv->sta_lock, flags); |
538 | ||
e1623446 | 539 | IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n"); |
17f841cd SO |
540 | iwl_send_add_sta(priv, |
541 | (struct iwl_addsta_cmd *)&priv->stations_39[sta_id].sta, 0); | |
b481de9c ZY |
542 | return 0; |
543 | } | |
544 | ||
fa11d525 | 545 | static int iwl3945_set_dynamic_key(struct iwl_priv *priv, |
6e21f15c AK |
546 | struct ieee80211_key_conf *keyconf, u8 sta_id) |
547 | { | |
548 | int ret = 0; | |
549 | ||
550 | keyconf->hw_key_idx = HW_KEY_DYNAMIC; | |
551 | ||
552 | switch (keyconf->alg) { | |
553 | case ALG_CCMP: | |
554 | ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id); | |
555 | break; | |
556 | case ALG_TKIP: | |
557 | ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id); | |
558 | break; | |
559 | case ALG_WEP: | |
560 | ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id); | |
561 | break; | |
562 | default: | |
1e680233 | 563 | IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg); |
6e21f15c AK |
564 | ret = -EINVAL; |
565 | } | |
566 | ||
567 | IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n", | |
568 | keyconf->alg, keyconf->keylen, keyconf->keyidx, | |
569 | sta_id, ret); | |
570 | ||
571 | return ret; | |
572 | } | |
573 | ||
574 | static int iwl3945_remove_static_key(struct iwl_priv *priv) | |
575 | { | |
576 | int ret = -EOPNOTSUPP; | |
577 | ||
578 | return ret; | |
579 | } | |
580 | ||
581 | static int iwl3945_set_static_key(struct iwl_priv *priv, | |
582 | struct ieee80211_key_conf *key) | |
583 | { | |
584 | if (key->alg == ALG_WEP) | |
585 | return -EOPNOTSUPP; | |
586 | ||
587 | IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg); | |
588 | return -EINVAL; | |
589 | } | |
590 | ||
4a8a4322 | 591 | static void iwl3945_clear_free_frames(struct iwl_priv *priv) |
b481de9c ZY |
592 | { |
593 | struct list_head *element; | |
594 | ||
e1623446 | 595 | IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n", |
b481de9c ZY |
596 | priv->frames_count); |
597 | ||
598 | while (!list_empty(&priv->free_frames)) { | |
599 | element = priv->free_frames.next; | |
600 | list_del(element); | |
bb8c093b | 601 | kfree(list_entry(element, struct iwl3945_frame, list)); |
b481de9c ZY |
602 | priv->frames_count--; |
603 | } | |
604 | ||
605 | if (priv->frames_count) { | |
39aadf8c | 606 | IWL_WARN(priv, "%d frames still in use. Did we lose one?\n", |
b481de9c ZY |
607 | priv->frames_count); |
608 | priv->frames_count = 0; | |
609 | } | |
610 | } | |
611 | ||
4a8a4322 | 612 | static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv) |
b481de9c | 613 | { |
bb8c093b | 614 | struct iwl3945_frame *frame; |
b481de9c ZY |
615 | struct list_head *element; |
616 | if (list_empty(&priv->free_frames)) { | |
617 | frame = kzalloc(sizeof(*frame), GFP_KERNEL); | |
618 | if (!frame) { | |
15b1687c | 619 | IWL_ERR(priv, "Could not allocate frame!\n"); |
b481de9c ZY |
620 | return NULL; |
621 | } | |
622 | ||
623 | priv->frames_count++; | |
624 | return frame; | |
625 | } | |
626 | ||
627 | element = priv->free_frames.next; | |
628 | list_del(element); | |
bb8c093b | 629 | return list_entry(element, struct iwl3945_frame, list); |
b481de9c ZY |
630 | } |
631 | ||
4a8a4322 | 632 | static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame) |
b481de9c ZY |
633 | { |
634 | memset(frame, 0, sizeof(*frame)); | |
635 | list_add(&frame->list, &priv->free_frames); | |
636 | } | |
637 | ||
4a8a4322 | 638 | unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv, |
b481de9c | 639 | struct ieee80211_hdr *hdr, |
73ec1cc2 | 640 | int left) |
b481de9c ZY |
641 | { |
642 | ||
8ccde88a | 643 | if (!iwl_is_associated(priv) || !priv->ibss_beacon || |
05c914fe JB |
644 | ((priv->iw_mode != NL80211_IFTYPE_ADHOC) && |
645 | (priv->iw_mode != NL80211_IFTYPE_AP))) | |
b481de9c ZY |
646 | return 0; |
647 | ||
648 | if (priv->ibss_beacon->len > left) | |
649 | return 0; | |
650 | ||
651 | memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len); | |
652 | ||
653 | return priv->ibss_beacon->len; | |
654 | } | |
655 | ||
4a8a4322 | 656 | static int iwl3945_send_beacon_cmd(struct iwl_priv *priv) |
b481de9c | 657 | { |
bb8c093b | 658 | struct iwl3945_frame *frame; |
b481de9c ZY |
659 | unsigned int frame_size; |
660 | int rc; | |
661 | u8 rate; | |
662 | ||
bb8c093b | 663 | frame = iwl3945_get_free_frame(priv); |
b481de9c ZY |
664 | |
665 | if (!frame) { | |
15b1687c | 666 | IWL_ERR(priv, "Could not obtain free frame buffer for beacon " |
b481de9c ZY |
667 | "command.\n"); |
668 | return -ENOMEM; | |
669 | } | |
670 | ||
8ccde88a | 671 | rate = iwl_rate_get_lowest_plcp(priv); |
b481de9c | 672 | |
bb8c093b | 673 | frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate); |
b481de9c | 674 | |
518099a8 | 675 | rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size, |
b481de9c ZY |
676 | &frame->u.cmd[0]); |
677 | ||
bb8c093b | 678 | iwl3945_free_frame(priv, frame); |
b481de9c ZY |
679 | |
680 | return rc; | |
681 | } | |
682 | ||
4a8a4322 | 683 | static void iwl3945_unset_hw_params(struct iwl_priv *priv) |
b481de9c | 684 | { |
3832ec9d | 685 | if (priv->shared_virt) |
b481de9c | 686 | pci_free_consistent(priv->pci_dev, |
bb8c093b | 687 | sizeof(struct iwl3945_shared), |
3832ec9d AK |
688 | priv->shared_virt, |
689 | priv->shared_phys); | |
b481de9c ZY |
690 | } |
691 | ||
b481de9c | 692 | #define MAX_UCODE_BEACON_INTERVAL 1024 |
c1b4aa3f | 693 | #define INTEL_CONN_LISTEN_INTERVAL cpu_to_le16(0xA) |
b481de9c | 694 | |
bb8c093b | 695 | static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val) |
b481de9c ZY |
696 | { |
697 | u16 new_val = 0; | |
698 | u16 beacon_factor = 0; | |
699 | ||
700 | beacon_factor = | |
701 | (beacon_val + MAX_UCODE_BEACON_INTERVAL) | |
702 | / MAX_UCODE_BEACON_INTERVAL; | |
703 | new_val = beacon_val / beacon_factor; | |
704 | ||
705 | return cpu_to_le16(new_val); | |
706 | } | |
707 | ||
4a8a4322 | 708 | static void iwl3945_setup_rxon_timing(struct iwl_priv *priv) |
b481de9c ZY |
709 | { |
710 | u64 interval_tm_unit; | |
711 | u64 tsf, result; | |
712 | unsigned long flags; | |
713 | struct ieee80211_conf *conf = NULL; | |
714 | u16 beacon_int = 0; | |
715 | ||
716 | conf = ieee80211_get_hw_conf(priv->hw); | |
717 | ||
718 | spin_lock_irqsave(&priv->lock, flags); | |
28afaf91 | 719 | priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp); |
b481de9c ZY |
720 | priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL; |
721 | ||
28afaf91 | 722 | tsf = priv->timestamp; |
b481de9c ZY |
723 | |
724 | beacon_int = priv->beacon_int; | |
725 | spin_unlock_irqrestore(&priv->lock, flags); | |
726 | ||
05c914fe | 727 | if (priv->iw_mode == NL80211_IFTYPE_STATION) { |
b481de9c ZY |
728 | if (beacon_int == 0) { |
729 | priv->rxon_timing.beacon_interval = cpu_to_le16(100); | |
730 | priv->rxon_timing.beacon_init_val = cpu_to_le32(102400); | |
731 | } else { | |
732 | priv->rxon_timing.beacon_interval = | |
733 | cpu_to_le16(beacon_int); | |
734 | priv->rxon_timing.beacon_interval = | |
bb8c093b | 735 | iwl3945_adjust_beacon_interval( |
b481de9c ZY |
736 | le16_to_cpu(priv->rxon_timing.beacon_interval)); |
737 | } | |
738 | ||
739 | priv->rxon_timing.atim_window = 0; | |
740 | } else { | |
741 | priv->rxon_timing.beacon_interval = | |
bb8c093b | 742 | iwl3945_adjust_beacon_interval(conf->beacon_int); |
b481de9c ZY |
743 | /* TODO: we need to get atim_window from upper stack |
744 | * for now we set to 0 */ | |
745 | priv->rxon_timing.atim_window = 0; | |
746 | } | |
747 | ||
748 | interval_tm_unit = | |
749 | (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024); | |
750 | result = do_div(tsf, interval_tm_unit); | |
751 | priv->rxon_timing.beacon_init_val = | |
752 | cpu_to_le32((u32) ((u64) interval_tm_unit - result)); | |
753 | ||
e1623446 TW |
754 | IWL_DEBUG_ASSOC(priv, |
755 | "beacon interval %d beacon timer %d beacon tim %d\n", | |
b481de9c ZY |
756 | le16_to_cpu(priv->rxon_timing.beacon_interval), |
757 | le32_to_cpu(priv->rxon_timing.beacon_init_val), | |
758 | le16_to_cpu(priv->rxon_timing.atim_window)); | |
759 | } | |
760 | ||
4a8a4322 | 761 | static int iwl3945_set_mode(struct iwl_priv *priv, int mode) |
b481de9c | 762 | { |
05c914fe | 763 | if (mode == NL80211_IFTYPE_ADHOC) { |
d20b3c65 | 764 | const struct iwl_channel_info *ch_info; |
b481de9c | 765 | |
e6148917 | 766 | ch_info = iwl_get_channel_info(priv, |
8318d78a | 767 | priv->band, |
8ccde88a | 768 | le16_to_cpu(priv->staging_rxon.channel)); |
b481de9c ZY |
769 | |
770 | if (!ch_info || !is_channel_ibss(ch_info)) { | |
15b1687c | 771 | IWL_ERR(priv, "channel %d not IBSS channel\n", |
8ccde88a | 772 | le16_to_cpu(priv->staging_rxon.channel)); |
b481de9c ZY |
773 | return -EINVAL; |
774 | } | |
775 | } | |
776 | ||
8ccde88a | 777 | iwl_connection_init_rx_config(priv, mode); |
b481de9c | 778 | |
bb8c093b | 779 | iwl3945_clear_stations_table(priv); |
b481de9c | 780 | |
a96a27f9 | 781 | /* don't commit rxon if rf-kill is on*/ |
775a6e27 | 782 | if (!iwl_is_ready_rf(priv)) |
fde3571f MA |
783 | return -EAGAIN; |
784 | ||
785 | cancel_delayed_work(&priv->scan_check); | |
af0053d6 | 786 | if (iwl_scan_cancel_timeout(priv, 100)) { |
39aadf8c | 787 | IWL_WARN(priv, "Aborted scan still in progress after 100ms\n"); |
e1623446 | 788 | IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n"); |
fde3571f MA |
789 | return -EAGAIN; |
790 | } | |
791 | ||
bb8c093b | 792 | iwl3945_commit_rxon(priv); |
b481de9c ZY |
793 | |
794 | return 0; | |
795 | } | |
796 | ||
4a8a4322 | 797 | static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv, |
e039fa4a | 798 | struct ieee80211_tx_info *info, |
c2d79b48 | 799 | struct iwl_cmd *cmd, |
b481de9c | 800 | struct sk_buff *skb_frag, |
6e21f15c | 801 | int sta_id) |
b481de9c | 802 | { |
e52119c5 | 803 | struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload; |
1c014420 | 804 | struct iwl3945_hw_key *keyinfo = |
6e21f15c | 805 | &priv->stations_39[sta_id].keyinfo; |
b481de9c ZY |
806 | |
807 | switch (keyinfo->alg) { | |
808 | case ALG_CCMP: | |
e52119c5 WT |
809 | tx->sec_ctl = TX_CMD_SEC_CCM; |
810 | memcpy(tx->key, keyinfo->key, keyinfo->keylen); | |
e1623446 | 811 | IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n"); |
b481de9c ZY |
812 | break; |
813 | ||
814 | case ALG_TKIP: | |
b481de9c ZY |
815 | break; |
816 | ||
817 | case ALG_WEP: | |
e52119c5 | 818 | tx->sec_ctl = TX_CMD_SEC_WEP | |
e039fa4a | 819 | (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT; |
b481de9c ZY |
820 | |
821 | if (keyinfo->keylen == 13) | |
e52119c5 | 822 | tx->sec_ctl |= TX_CMD_SEC_KEY128; |
b481de9c | 823 | |
e52119c5 | 824 | memcpy(&tx->key[3], keyinfo->key, keyinfo->keylen); |
b481de9c | 825 | |
e1623446 | 826 | IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption " |
e039fa4a | 827 | "with key %d\n", info->control.hw_key->hw_key_idx); |
b481de9c ZY |
828 | break; |
829 | ||
b481de9c | 830 | default: |
978785a3 | 831 | IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg); |
b481de9c ZY |
832 | break; |
833 | } | |
834 | } | |
835 | ||
836 | /* | |
837 | * handle build REPLY_TX command notification. | |
838 | */ | |
4a8a4322 | 839 | static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv, |
c2d79b48 | 840 | struct iwl_cmd *cmd, |
e039fa4a | 841 | struct ieee80211_tx_info *info, |
e52119c5 | 842 | struct ieee80211_hdr *hdr, u8 std_id) |
b481de9c | 843 | { |
e52119c5 WT |
844 | struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload; |
845 | __le32 tx_flags = tx->tx_flags; | |
fd7c8a40 | 846 | __le16 fc = hdr->frame_control; |
e6a9854b | 847 | u8 rc_flags = info->control.rates[0].flags; |
b481de9c | 848 | |
e52119c5 | 849 | tx->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; |
e039fa4a | 850 | if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) { |
b481de9c | 851 | tx_flags |= TX_CMD_FLG_ACK_MSK; |
fd7c8a40 | 852 | if (ieee80211_is_mgmt(fc)) |
b481de9c | 853 | tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; |
fd7c8a40 | 854 | if (ieee80211_is_probe_resp(fc) && |
b481de9c ZY |
855 | !(le16_to_cpu(hdr->seq_ctrl) & 0xf)) |
856 | tx_flags |= TX_CMD_FLG_TSF_MSK; | |
857 | } else { | |
858 | tx_flags &= (~TX_CMD_FLG_ACK_MSK); | |
859 | tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; | |
860 | } | |
861 | ||
e52119c5 | 862 | tx->sta_id = std_id; |
8b7b1e05 | 863 | if (ieee80211_has_morefrags(fc)) |
b481de9c ZY |
864 | tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK; |
865 | ||
fd7c8a40 HH |
866 | if (ieee80211_is_data_qos(fc)) { |
867 | u8 *qc = ieee80211_get_qos_ctl(hdr); | |
e52119c5 | 868 | tx->tid_tspec = qc[0] & 0xf; |
b481de9c | 869 | tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK; |
54dbb525 | 870 | } else { |
b481de9c | 871 | tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; |
54dbb525 | 872 | } |
b481de9c | 873 | |
e6a9854b | 874 | if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) { |
b481de9c ZY |
875 | tx_flags |= TX_CMD_FLG_RTS_MSK; |
876 | tx_flags &= ~TX_CMD_FLG_CTS_MSK; | |
e6a9854b | 877 | } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) { |
b481de9c ZY |
878 | tx_flags &= ~TX_CMD_FLG_RTS_MSK; |
879 | tx_flags |= TX_CMD_FLG_CTS_MSK; | |
880 | } | |
881 | ||
882 | if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK)) | |
883 | tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK; | |
884 | ||
885 | tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK); | |
fd7c8a40 HH |
886 | if (ieee80211_is_mgmt(fc)) { |
887 | if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc)) | |
e52119c5 | 888 | tx->timeout.pm_frame_timeout = cpu_to_le16(3); |
b481de9c | 889 | else |
e52119c5 | 890 | tx->timeout.pm_frame_timeout = cpu_to_le16(2); |
ab53d8af | 891 | } else { |
e52119c5 | 892 | tx->timeout.pm_frame_timeout = 0; |
5c8df2d5 | 893 | #ifdef CONFIG_IWLWIFI_LEDS |
ab53d8af MA |
894 | priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len); |
895 | #endif | |
896 | } | |
b481de9c | 897 | |
e52119c5 WT |
898 | tx->driver_txop = 0; |
899 | tx->tx_flags = tx_flags; | |
900 | tx->next_frame_len = 0; | |
b481de9c ZY |
901 | } |
902 | ||
6440adb5 BC |
903 | /** |
904 | * iwl3945_get_sta_id - Find station's index within station table | |
905 | */ | |
4a8a4322 | 906 | static int iwl3945_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr) |
b481de9c ZY |
907 | { |
908 | int sta_id; | |
909 | u16 fc = le16_to_cpu(hdr->frame_control); | |
910 | ||
6440adb5 | 911 | /* If this frame is broadcast or management, use broadcast station id */ |
b481de9c ZY |
912 | if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) || |
913 | is_multicast_ether_addr(hdr->addr1)) | |
3832ec9d | 914 | return priv->hw_params.bcast_sta_id; |
b481de9c ZY |
915 | |
916 | switch (priv->iw_mode) { | |
917 | ||
6440adb5 BC |
918 | /* If we are a client station in a BSS network, use the special |
919 | * AP station entry (that's the only station we communicate with) */ | |
05c914fe | 920 | case NL80211_IFTYPE_STATION: |
b481de9c ZY |
921 | return IWL_AP_ID; |
922 | ||
923 | /* If we are an AP, then find the station, or use BCAST */ | |
05c914fe | 924 | case NL80211_IFTYPE_AP: |
bb8c093b | 925 | sta_id = iwl3945_hw_find_station(priv, hdr->addr1); |
b481de9c ZY |
926 | if (sta_id != IWL_INVALID_STATION) |
927 | return sta_id; | |
3832ec9d | 928 | return priv->hw_params.bcast_sta_id; |
b481de9c | 929 | |
6440adb5 BC |
930 | /* If this frame is going out to an IBSS network, find the station, |
931 | * or create a new station table entry */ | |
05c914fe | 932 | case NL80211_IFTYPE_ADHOC: { |
6440adb5 | 933 | /* Create new station table entry */ |
bb8c093b | 934 | sta_id = iwl3945_hw_find_station(priv, hdr->addr1); |
b481de9c ZY |
935 | if (sta_id != IWL_INVALID_STATION) |
936 | return sta_id; | |
937 | ||
bb8c093b | 938 | sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC); |
b481de9c ZY |
939 | |
940 | if (sta_id != IWL_INVALID_STATION) | |
941 | return sta_id; | |
942 | ||
e1623446 | 943 | IWL_DEBUG_DROP(priv, "Station %pM not in station map. " |
b481de9c | 944 | "Defaulting to broadcast...\n", |
e174961c | 945 | hdr->addr1); |
40b8ec0b | 946 | iwl_print_hex_dump(priv, IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr)); |
3832ec9d | 947 | return priv->hw_params.bcast_sta_id; |
0795af57 | 948 | } |
914233d6 SG |
949 | /* If we are in monitor mode, use BCAST. This is required for |
950 | * packet injection. */ | |
05c914fe | 951 | case NL80211_IFTYPE_MONITOR: |
3832ec9d | 952 | return priv->hw_params.bcast_sta_id; |
914233d6 | 953 | |
b481de9c | 954 | default: |
39aadf8c WT |
955 | IWL_WARN(priv, "Unknown mode of operation: %d\n", |
956 | priv->iw_mode); | |
3832ec9d | 957 | return priv->hw_params.bcast_sta_id; |
b481de9c ZY |
958 | } |
959 | } | |
960 | ||
961 | /* | |
962 | * start REPLY_TX command process | |
963 | */ | |
4a8a4322 | 964 | static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb) |
b481de9c ZY |
965 | { |
966 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; | |
e039fa4a | 967 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
e52119c5 | 968 | struct iwl3945_tx_cmd *tx; |
188cf6c7 | 969 | struct iwl_tx_queue *txq = NULL; |
d20b3c65 | 970 | struct iwl_queue *q = NULL; |
e52119c5 | 971 | struct iwl_cmd *out_cmd = NULL; |
b481de9c ZY |
972 | dma_addr_t phys_addr; |
973 | dma_addr_t txcmd_phys; | |
e52119c5 | 974 | int txq_id = skb_get_queue_mapping(skb); |
df833b1d | 975 | u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */ |
54dbb525 TW |
976 | u8 id; |
977 | u8 unicast; | |
b481de9c | 978 | u8 sta_id; |
54dbb525 | 979 | u8 tid = 0; |
b481de9c | 980 | u16 seq_number = 0; |
fd7c8a40 | 981 | __le16 fc; |
b481de9c | 982 | u8 wait_write_ptr = 0; |
54dbb525 | 983 | u8 *qc = NULL; |
b481de9c ZY |
984 | unsigned long flags; |
985 | int rc; | |
986 | ||
987 | spin_lock_irqsave(&priv->lock, flags); | |
775a6e27 | 988 | if (iwl_is_rfkill(priv)) { |
e1623446 | 989 | IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n"); |
b481de9c ZY |
990 | goto drop_unlock; |
991 | } | |
992 | ||
e039fa4a | 993 | if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) { |
15b1687c | 994 | IWL_ERR(priv, "ERROR: No TX rate available.\n"); |
b481de9c ZY |
995 | goto drop_unlock; |
996 | } | |
997 | ||
998 | unicast = !is_multicast_ether_addr(hdr->addr1); | |
999 | id = 0; | |
1000 | ||
fd7c8a40 | 1001 | fc = hdr->frame_control; |
b481de9c | 1002 | |
d08853a3 | 1003 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c | 1004 | if (ieee80211_is_auth(fc)) |
e1623446 | 1005 | IWL_DEBUG_TX(priv, "Sending AUTH frame\n"); |
fd7c8a40 | 1006 | else if (ieee80211_is_assoc_req(fc)) |
e1623446 | 1007 | IWL_DEBUG_TX(priv, "Sending ASSOC frame\n"); |
fd7c8a40 | 1008 | else if (ieee80211_is_reassoc_req(fc)) |
e1623446 | 1009 | IWL_DEBUG_TX(priv, "Sending REASSOC frame\n"); |
b481de9c ZY |
1010 | #endif |
1011 | ||
7878a5a4 | 1012 | /* drop all data frame if we are not associated */ |
914233d6 | 1013 | if (ieee80211_is_data(fc) && |
05c914fe | 1014 | (priv->iw_mode != NL80211_IFTYPE_MONITOR) && /* packet injection */ |
8ccde88a | 1015 | (!iwl_is_associated(priv) || |
05c914fe | 1016 | ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) { |
e1623446 | 1017 | IWL_DEBUG_DROP(priv, "Dropping - !iwl_is_associated\n"); |
b481de9c ZY |
1018 | goto drop_unlock; |
1019 | } | |
1020 | ||
1021 | spin_unlock_irqrestore(&priv->lock, flags); | |
1022 | ||
7294ec95 | 1023 | hdr_len = ieee80211_hdrlen(fc); |
6440adb5 BC |
1024 | |
1025 | /* Find (or create) index into station table for destination station */ | |
bb8c093b | 1026 | sta_id = iwl3945_get_sta_id(priv, hdr); |
b481de9c | 1027 | if (sta_id == IWL_INVALID_STATION) { |
e1623446 | 1028 | IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n", |
e174961c | 1029 | hdr->addr1); |
b481de9c ZY |
1030 | goto drop; |
1031 | } | |
1032 | ||
e1623446 | 1033 | IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id); |
b481de9c | 1034 | |
fd7c8a40 HH |
1035 | if (ieee80211_is_data_qos(fc)) { |
1036 | qc = ieee80211_get_qos_ctl(hdr); | |
7294ec95 | 1037 | tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK; |
f2c7e521 | 1038 | seq_number = priv->stations_39[sta_id].tid[tid].seq_number & |
b481de9c ZY |
1039 | IEEE80211_SCTL_SEQ; |
1040 | hdr->seq_ctrl = cpu_to_le16(seq_number) | | |
1041 | (hdr->seq_ctrl & | |
c1b4aa3f | 1042 | cpu_to_le16(IEEE80211_SCTL_FRAG)); |
b481de9c ZY |
1043 | seq_number += 0x10; |
1044 | } | |
6440adb5 BC |
1045 | |
1046 | /* Descriptor for chosen Tx queue */ | |
188cf6c7 | 1047 | txq = &priv->txq[txq_id]; |
b481de9c ZY |
1048 | q = &txq->q; |
1049 | ||
1050 | spin_lock_irqsave(&priv->lock, flags); | |
1051 | ||
fc4b6853 | 1052 | idx = get_cmd_index(q, q->write_ptr, 0); |
b481de9c | 1053 | |
6440adb5 | 1054 | /* Set up driver data for this TFD */ |
dbb6654c | 1055 | memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info)); |
fc4b6853 | 1056 | txq->txb[q->write_ptr].skb[0] = skb; |
6440adb5 BC |
1057 | |
1058 | /* Init first empty entry in queue's array of Tx/cmd buffers */ | |
188cf6c7 | 1059 | out_cmd = txq->cmd[idx]; |
e52119c5 | 1060 | tx = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload; |
b481de9c | 1061 | memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr)); |
e52119c5 | 1062 | memset(tx, 0, sizeof(*tx)); |
6440adb5 BC |
1063 | |
1064 | /* | |
1065 | * Set up the Tx-command (not MAC!) header. | |
1066 | * Store the chosen Tx queue and TFD index within the sequence field; | |
1067 | * after Tx, uCode's Tx response will return this value so driver can | |
1068 | * locate the frame within the tx queue and do post-tx processing. | |
1069 | */ | |
b481de9c ZY |
1070 | out_cmd->hdr.cmd = REPLY_TX; |
1071 | out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) | | |
fc4b6853 | 1072 | INDEX_TO_SEQ(q->write_ptr))); |
6440adb5 BC |
1073 | |
1074 | /* Copy MAC header from skb into command buffer */ | |
e52119c5 | 1075 | memcpy(tx->hdr, hdr, hdr_len); |
b481de9c | 1076 | |
df833b1d RC |
1077 | |
1078 | if (info->control.hw_key) | |
1079 | iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id); | |
1080 | ||
1081 | /* TODO need this for burst mode later on */ | |
1082 | iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id); | |
1083 | ||
1084 | /* set is_hcca to 0; it probably will never be implemented */ | |
1085 | iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0); | |
1086 | ||
1087 | /* Total # bytes to be transmitted */ | |
1088 | len = (u16)skb->len; | |
1089 | tx->len = cpu_to_le16(len); | |
1090 | ||
1091 | ||
1092 | tx->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK; | |
1093 | tx->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK; | |
1094 | ||
1095 | if (!ieee80211_has_morefrags(hdr->frame_control)) { | |
1096 | txq->need_update = 1; | |
1097 | if (qc) | |
1098 | priv->stations_39[sta_id].tid[tid].seq_number = seq_number; | |
1099 | } else { | |
1100 | wait_write_ptr = 1; | |
1101 | txq->need_update = 0; | |
1102 | } | |
1103 | ||
1104 | IWL_DEBUG_TX(priv, "sequence nr = 0X%x \n", | |
1105 | le16_to_cpu(out_cmd->hdr.sequence)); | |
1106 | IWL_DEBUG_TX(priv, "tx_flags = 0X%x \n", le32_to_cpu(tx->tx_flags)); | |
1107 | iwl_print_hex_dump(priv, IWL_DL_TX, tx, sizeof(*tx)); | |
1108 | iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx->hdr, | |
1109 | ieee80211_hdrlen(fc)); | |
1110 | ||
6440adb5 BC |
1111 | /* |
1112 | * Use the first empty entry in this queue's command buffer array | |
1113 | * to contain the Tx command and MAC header concatenated together | |
1114 | * (payload data will be in another buffer). | |
1115 | * Size of this varies, due to varying MAC header length. | |
1116 | * If end is not dword aligned, we'll have 2 extra bytes at the end | |
1117 | * of the MAC header (device reads on dword boundaries). | |
1118 | * We'll tell device about this padding later. | |
1119 | */ | |
3832ec9d | 1120 | len = sizeof(struct iwl3945_tx_cmd) + |
4c897253 | 1121 | sizeof(struct iwl_cmd_header) + hdr_len; |
b481de9c ZY |
1122 | |
1123 | len_org = len; | |
1124 | len = (len + 3) & ~3; | |
1125 | ||
1126 | if (len_org != len) | |
1127 | len_org = 1; | |
1128 | else | |
1129 | len_org = 0; | |
1130 | ||
6440adb5 BC |
1131 | /* Physical address of this Tx command's header (not MAC header!), |
1132 | * within command buffer array. */ | |
df833b1d RC |
1133 | txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr, |
1134 | len, PCI_DMA_TODEVICE); | |
1135 | /* we do not map meta data ... so we can safely access address to | |
1136 | * provide to unmap command*/ | |
188cf6c7 | 1137 | pci_unmap_addr_set(&out_cmd->meta, mapping, txcmd_phys); |
df833b1d | 1138 | pci_unmap_len_set(&out_cmd->meta, len, len); |
b481de9c | 1139 | |
6440adb5 BC |
1140 | /* Add buffer containing Tx command and MAC(!) header to TFD's |
1141 | * first entry */ | |
7aaa1d79 SO |
1142 | priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq, |
1143 | txcmd_phys, len, 1, 0); | |
b481de9c | 1144 | |
b481de9c | 1145 | |
6440adb5 BC |
1146 | /* Set up TFD's 2nd entry to point directly to remainder of skb, |
1147 | * if any (802.11 null frames have no payload). */ | |
b481de9c ZY |
1148 | len = skb->len - hdr_len; |
1149 | if (len) { | |
1150 | phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len, | |
1151 | len, PCI_DMA_TODEVICE); | |
7aaa1d79 SO |
1152 | priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq, |
1153 | phys_addr, len, | |
1154 | 0, U32_PAD(len)); | |
b481de9c ZY |
1155 | } |
1156 | ||
b481de9c | 1157 | |
6440adb5 | 1158 | /* Tell device the write index *just past* this latest filled TFD */ |
c54b679d | 1159 | q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd); |
4f3602c8 | 1160 | rc = iwl_txq_update_write_ptr(priv, txq); |
b481de9c ZY |
1161 | spin_unlock_irqrestore(&priv->lock, flags); |
1162 | ||
1163 | if (rc) | |
1164 | return rc; | |
1165 | ||
d20b3c65 | 1166 | if ((iwl_queue_space(q) < q->high_mark) |
b481de9c ZY |
1167 | && priv->mac80211_registered) { |
1168 | if (wait_write_ptr) { | |
1169 | spin_lock_irqsave(&priv->lock, flags); | |
1170 | txq->need_update = 1; | |
4f3602c8 | 1171 | iwl_txq_update_write_ptr(priv, txq); |
b481de9c ZY |
1172 | spin_unlock_irqrestore(&priv->lock, flags); |
1173 | } | |
1174 | ||
e4e72fb4 | 1175 | iwl_stop_queue(priv, skb_get_queue_mapping(skb)); |
b481de9c ZY |
1176 | } |
1177 | ||
1178 | return 0; | |
1179 | ||
1180 | drop_unlock: | |
1181 | spin_unlock_irqrestore(&priv->lock, flags); | |
1182 | drop: | |
1183 | return -1; | |
1184 | } | |
1185 | ||
c8b0e6e1 | 1186 | #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT |
b481de9c ZY |
1187 | |
1188 | #include "iwl-spectrum.h" | |
1189 | ||
1190 | #define BEACON_TIME_MASK_LOW 0x00FFFFFF | |
1191 | #define BEACON_TIME_MASK_HIGH 0xFF000000 | |
1192 | #define TIME_UNIT 1024 | |
1193 | ||
1194 | /* | |
1195 | * extended beacon time format | |
1196 | * time in usec will be changed into a 32-bit value in 8:24 format | |
1197 | * the high 1 byte is the beacon counts | |
1198 | * the lower 3 bytes is the time in usec within one beacon interval | |
1199 | */ | |
1200 | ||
bb8c093b | 1201 | static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval) |
b481de9c ZY |
1202 | { |
1203 | u32 quot; | |
1204 | u32 rem; | |
1205 | u32 interval = beacon_interval * 1024; | |
1206 | ||
1207 | if (!interval || !usec) | |
1208 | return 0; | |
1209 | ||
1210 | quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24); | |
1211 | rem = (usec % interval) & BEACON_TIME_MASK_LOW; | |
1212 | ||
1213 | return (quot << 24) + rem; | |
1214 | } | |
1215 | ||
1216 | /* base is usually what we get from ucode with each received frame, | |
1217 | * the same as HW timer counter counting down | |
1218 | */ | |
1219 | ||
bb8c093b | 1220 | static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval) |
b481de9c ZY |
1221 | { |
1222 | u32 base_low = base & BEACON_TIME_MASK_LOW; | |
1223 | u32 addon_low = addon & BEACON_TIME_MASK_LOW; | |
1224 | u32 interval = beacon_interval * TIME_UNIT; | |
1225 | u32 res = (base & BEACON_TIME_MASK_HIGH) + | |
1226 | (addon & BEACON_TIME_MASK_HIGH); | |
1227 | ||
1228 | if (base_low > addon_low) | |
1229 | res += base_low - addon_low; | |
1230 | else if (base_low < addon_low) { | |
1231 | res += interval + base_low - addon_low; | |
1232 | res += (1 << 24); | |
1233 | } else | |
1234 | res += (1 << 24); | |
1235 | ||
1236 | return cpu_to_le32(res); | |
1237 | } | |
1238 | ||
4a8a4322 | 1239 | static int iwl3945_get_measurement(struct iwl_priv *priv, |
b481de9c ZY |
1240 | struct ieee80211_measurement_params *params, |
1241 | u8 type) | |
1242 | { | |
600c0e11 | 1243 | struct iwl_spectrum_cmd spectrum; |
3d24a9f7 | 1244 | struct iwl_rx_packet *res; |
c2d79b48 | 1245 | struct iwl_host_cmd cmd = { |
b481de9c ZY |
1246 | .id = REPLY_SPECTRUM_MEASUREMENT_CMD, |
1247 | .data = (void *)&spectrum, | |
1248 | .meta.flags = CMD_WANT_SKB, | |
1249 | }; | |
1250 | u32 add_time = le64_to_cpu(params->start_time); | |
1251 | int rc; | |
1252 | int spectrum_resp_status; | |
1253 | int duration = le16_to_cpu(params->duration); | |
1254 | ||
8ccde88a | 1255 | if (iwl_is_associated(priv)) |
b481de9c | 1256 | add_time = |
bb8c093b | 1257 | iwl3945_usecs_to_beacons( |
b481de9c ZY |
1258 | le64_to_cpu(params->start_time) - priv->last_tsf, |
1259 | le16_to_cpu(priv->rxon_timing.beacon_interval)); | |
1260 | ||
1261 | memset(&spectrum, 0, sizeof(spectrum)); | |
1262 | ||
1263 | spectrum.channel_count = cpu_to_le16(1); | |
1264 | spectrum.flags = | |
1265 | RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK; | |
1266 | spectrum.filter_flags = MEASUREMENT_FILTER_FLAG; | |
1267 | cmd.len = sizeof(spectrum); | |
1268 | spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len)); | |
1269 | ||
8ccde88a | 1270 | if (iwl_is_associated(priv)) |
b481de9c | 1271 | spectrum.start_time = |
bb8c093b | 1272 | iwl3945_add_beacon_time(priv->last_beacon_time, |
b481de9c ZY |
1273 | add_time, |
1274 | le16_to_cpu(priv->rxon_timing.beacon_interval)); | |
1275 | else | |
1276 | spectrum.start_time = 0; | |
1277 | ||
1278 | spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT); | |
1279 | spectrum.channels[0].channel = params->channel; | |
1280 | spectrum.channels[0].type = type; | |
8ccde88a | 1281 | if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK) |
b481de9c ZY |
1282 | spectrum.flags |= RXON_FLG_BAND_24G_MSK | |
1283 | RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK; | |
1284 | ||
518099a8 | 1285 | rc = iwl_send_cmd_sync(priv, &cmd); |
b481de9c ZY |
1286 | if (rc) |
1287 | return rc; | |
1288 | ||
3d24a9f7 | 1289 | res = (struct iwl_rx_packet *)cmd.meta.u.skb->data; |
b481de9c | 1290 | if (res->hdr.flags & IWL_CMD_FAILED_MSK) { |
15b1687c | 1291 | IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n"); |
b481de9c ZY |
1292 | rc = -EIO; |
1293 | } | |
1294 | ||
1295 | spectrum_resp_status = le16_to_cpu(res->u.spectrum.status); | |
1296 | switch (spectrum_resp_status) { | |
1297 | case 0: /* Command will be handled */ | |
1298 | if (res->u.spectrum.id != 0xff) { | |
e1623446 | 1299 | IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n", |
bc434dd2 | 1300 | res->u.spectrum.id); |
b481de9c ZY |
1301 | priv->measurement_status &= ~MEASUREMENT_READY; |
1302 | } | |
1303 | priv->measurement_status |= MEASUREMENT_ACTIVE; | |
1304 | rc = 0; | |
1305 | break; | |
1306 | ||
1307 | case 1: /* Command will not be handled */ | |
1308 | rc = -EAGAIN; | |
1309 | break; | |
1310 | } | |
1311 | ||
1312 | dev_kfree_skb_any(cmd.meta.u.skb); | |
1313 | ||
1314 | return rc; | |
1315 | } | |
1316 | #endif | |
1317 | ||
4a8a4322 | 1318 | static void iwl3945_rx_reply_alive(struct iwl_priv *priv, |
6100b588 | 1319 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1320 | { |
3d24a9f7 TW |
1321 | struct iwl_rx_packet *pkt = (void *)rxb->skb->data; |
1322 | struct iwl_alive_resp *palive; | |
b481de9c ZY |
1323 | struct delayed_work *pwork; |
1324 | ||
1325 | palive = &pkt->u.alive_frame; | |
1326 | ||
e1623446 | 1327 | IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision " |
b481de9c ZY |
1328 | "0x%01X 0x%01X\n", |
1329 | palive->is_valid, palive->ver_type, | |
1330 | palive->ver_subtype); | |
1331 | ||
1332 | if (palive->ver_subtype == INITIALIZE_SUBTYPE) { | |
e1623446 | 1333 | IWL_DEBUG_INFO(priv, "Initialization Alive received.\n"); |
3d24a9f7 TW |
1334 | memcpy(&priv->card_alive_init, &pkt->u.alive_frame, |
1335 | sizeof(struct iwl_alive_resp)); | |
b481de9c ZY |
1336 | pwork = &priv->init_alive_start; |
1337 | } else { | |
e1623446 | 1338 | IWL_DEBUG_INFO(priv, "Runtime Alive received.\n"); |
b481de9c | 1339 | memcpy(&priv->card_alive, &pkt->u.alive_frame, |
3d24a9f7 | 1340 | sizeof(struct iwl_alive_resp)); |
b481de9c | 1341 | pwork = &priv->alive_start; |
bb8c093b | 1342 | iwl3945_disable_events(priv); |
b481de9c ZY |
1343 | } |
1344 | ||
1345 | /* We delay the ALIVE response by 5ms to | |
1346 | * give the HW RF Kill time to activate... */ | |
1347 | if (palive->is_valid == UCODE_VALID_OK) | |
1348 | queue_delayed_work(priv->workqueue, pwork, | |
1349 | msecs_to_jiffies(5)); | |
1350 | else | |
39aadf8c | 1351 | IWL_WARN(priv, "uCode did not respond OK.\n"); |
b481de9c ZY |
1352 | } |
1353 | ||
4a8a4322 | 1354 | static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv, |
6100b588 | 1355 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1356 | { |
c7e035a9 | 1357 | #ifdef CONFIG_IWLWIFI_DEBUG |
3d24a9f7 | 1358 | struct iwl_rx_packet *pkt = (void *)rxb->skb->data; |
c7e035a9 | 1359 | #endif |
b481de9c | 1360 | |
e1623446 | 1361 | IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status); |
b481de9c ZY |
1362 | return; |
1363 | } | |
1364 | ||
bb8c093b | 1365 | static void iwl3945_bg_beacon_update(struct work_struct *work) |
b481de9c | 1366 | { |
4a8a4322 AK |
1367 | struct iwl_priv *priv = |
1368 | container_of(work, struct iwl_priv, beacon_update); | |
b481de9c ZY |
1369 | struct sk_buff *beacon; |
1370 | ||
1371 | /* Pull updated AP beacon from mac80211. will fail if not in AP mode */ | |
e039fa4a | 1372 | beacon = ieee80211_beacon_get(priv->hw, priv->vif); |
b481de9c ZY |
1373 | |
1374 | if (!beacon) { | |
15b1687c | 1375 | IWL_ERR(priv, "update beacon failed\n"); |
b481de9c ZY |
1376 | return; |
1377 | } | |
1378 | ||
1379 | mutex_lock(&priv->mutex); | |
1380 | /* new beacon skb is allocated every time; dispose previous.*/ | |
1381 | if (priv->ibss_beacon) | |
1382 | dev_kfree_skb(priv->ibss_beacon); | |
1383 | ||
1384 | priv->ibss_beacon = beacon; | |
1385 | mutex_unlock(&priv->mutex); | |
1386 | ||
bb8c093b | 1387 | iwl3945_send_beacon_cmd(priv); |
b481de9c ZY |
1388 | } |
1389 | ||
4a8a4322 | 1390 | static void iwl3945_rx_beacon_notif(struct iwl_priv *priv, |
6100b588 | 1391 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1392 | { |
d08853a3 | 1393 | #ifdef CONFIG_IWLWIFI_DEBUG |
3d24a9f7 | 1394 | struct iwl_rx_packet *pkt = (void *)rxb->skb->data; |
bb8c093b | 1395 | struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status); |
b481de9c ZY |
1396 | u8 rate = beacon->beacon_notify_hdr.rate; |
1397 | ||
e1623446 | 1398 | IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d " |
b481de9c ZY |
1399 | "tsf %d %d rate %d\n", |
1400 | le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK, | |
1401 | beacon->beacon_notify_hdr.failure_frame, | |
1402 | le32_to_cpu(beacon->ibss_mgr_status), | |
1403 | le32_to_cpu(beacon->high_tsf), | |
1404 | le32_to_cpu(beacon->low_tsf), rate); | |
1405 | #endif | |
1406 | ||
05c914fe | 1407 | if ((priv->iw_mode == NL80211_IFTYPE_AP) && |
b481de9c ZY |
1408 | (!test_bit(STATUS_EXIT_PENDING, &priv->status))) |
1409 | queue_work(priv->workqueue, &priv->beacon_update); | |
1410 | } | |
1411 | ||
b481de9c ZY |
1412 | /* Handle notification from uCode that card's power state is changing |
1413 | * due to software, hardware, or critical temperature RFKILL */ | |
4a8a4322 | 1414 | static void iwl3945_rx_card_state_notif(struct iwl_priv *priv, |
6100b588 | 1415 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1416 | { |
3d24a9f7 | 1417 | struct iwl_rx_packet *pkt = (void *)rxb->skb->data; |
b481de9c ZY |
1418 | u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags); |
1419 | unsigned long status = priv->status; | |
1420 | ||
e1623446 | 1421 | IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n", |
b481de9c ZY |
1422 | (flags & HW_CARD_DISABLED) ? "Kill" : "On", |
1423 | (flags & SW_CARD_DISABLED) ? "Kill" : "On"); | |
1424 | ||
5d49f498 | 1425 | iwl_write32(priv, CSR_UCODE_DRV_GP1_SET, |
b481de9c ZY |
1426 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
1427 | ||
1428 | if (flags & HW_CARD_DISABLED) | |
1429 | set_bit(STATUS_RF_KILL_HW, &priv->status); | |
1430 | else | |
1431 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | |
1432 | ||
1433 | ||
1434 | if (flags & SW_CARD_DISABLED) | |
1435 | set_bit(STATUS_RF_KILL_SW, &priv->status); | |
1436 | else | |
1437 | clear_bit(STATUS_RF_KILL_SW, &priv->status); | |
1438 | ||
af0053d6 | 1439 | iwl_scan_cancel(priv); |
b481de9c ZY |
1440 | |
1441 | if ((test_bit(STATUS_RF_KILL_HW, &status) != | |
1442 | test_bit(STATUS_RF_KILL_HW, &priv->status)) || | |
1443 | (test_bit(STATUS_RF_KILL_SW, &status) != | |
1444 | test_bit(STATUS_RF_KILL_SW, &priv->status))) | |
1445 | queue_work(priv->workqueue, &priv->rf_kill); | |
1446 | else | |
1447 | wake_up_interruptible(&priv->wait_command_queue); | |
1448 | } | |
1449 | ||
1450 | /** | |
bb8c093b | 1451 | * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks |
b481de9c ZY |
1452 | * |
1453 | * Setup the RX handlers for each of the reply types sent from the uCode | |
1454 | * to the host. | |
1455 | * | |
1456 | * This function chains into the hardware specific files for them to setup | |
1457 | * any hardware specific handlers as well. | |
1458 | */ | |
4a8a4322 | 1459 | static void iwl3945_setup_rx_handlers(struct iwl_priv *priv) |
b481de9c | 1460 | { |
bb8c093b CH |
1461 | priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive; |
1462 | priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta; | |
261b9c33 | 1463 | priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error; |
8ccde88a | 1464 | priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa; |
030f05ed | 1465 | priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif; |
b481de9c | 1466 | priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] = |
030f05ed | 1467 | iwl_rx_pm_debug_statistics_notif; |
bb8c093b | 1468 | priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif; |
b481de9c | 1469 | |
9fbab516 BC |
1470 | /* |
1471 | * The same handler is used for both the REPLY to a discrete | |
1472 | * statistics request from the host as well as for the periodic | |
1473 | * statistics notifications (after received beacons) from the uCode. | |
b481de9c | 1474 | */ |
bb8c093b CH |
1475 | priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics; |
1476 | priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics; | |
b481de9c | 1477 | |
261b9c33 | 1478 | iwl_setup_spectrum_handlers(priv); |
cade0eb2 | 1479 | iwl_setup_rx_scan_handlers(priv); |
bb8c093b | 1480 | priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif; |
b481de9c | 1481 | |
9fbab516 | 1482 | /* Set up hardware specific Rx handlers */ |
bb8c093b | 1483 | iwl3945_hw_rx_handler_setup(priv); |
b481de9c ZY |
1484 | } |
1485 | ||
b481de9c ZY |
1486 | /************************** RX-FUNCTIONS ****************************/ |
1487 | /* | |
1488 | * Rx theory of operation | |
1489 | * | |
1490 | * The host allocates 32 DMA target addresses and passes the host address | |
1491 | * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is | |
1492 | * 0 to 31 | |
1493 | * | |
1494 | * Rx Queue Indexes | |
1495 | * The host/firmware share two index registers for managing the Rx buffers. | |
1496 | * | |
1497 | * The READ index maps to the first position that the firmware may be writing | |
1498 | * to -- the driver can read up to (but not including) this position and get | |
1499 | * good data. | |
1500 | * The READ index is managed by the firmware once the card is enabled. | |
1501 | * | |
1502 | * The WRITE index maps to the last position the driver has read from -- the | |
1503 | * position preceding WRITE is the last slot the firmware can place a packet. | |
1504 | * | |
1505 | * The queue is empty (no good data) if WRITE = READ - 1, and is full if | |
1506 | * WRITE = READ. | |
1507 | * | |
9fbab516 | 1508 | * During initialization, the host sets up the READ queue position to the first |
b481de9c ZY |
1509 | * INDEX position, and WRITE to the last (READ - 1 wrapped) |
1510 | * | |
9fbab516 | 1511 | * When the firmware places a packet in a buffer, it will advance the READ index |
b481de9c ZY |
1512 | * and fire the RX interrupt. The driver can then query the READ index and |
1513 | * process as many packets as possible, moving the WRITE index forward as it | |
1514 | * resets the Rx queue buffers with new memory. | |
1515 | * | |
1516 | * The management in the driver is as follows: | |
1517 | * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When | |
1518 | * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled | |
01ebd063 | 1519 | * to replenish the iwl->rxq->rx_free. |
bb8c093b | 1520 | * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the |
b481de9c ZY |
1521 | * iwl->rxq is replenished and the READ INDEX is updated (updating the |
1522 | * 'processed' and 'read' driver indexes as well) | |
1523 | * + A received packet is processed and handed to the kernel network stack, | |
1524 | * detached from the iwl->rxq. The driver 'processed' index is updated. | |
1525 | * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free | |
1526 | * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ | |
1527 | * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there | |
1528 | * were enough free buffers and RX_STALLED is set it is cleared. | |
1529 | * | |
1530 | * | |
1531 | * Driver sequence: | |
1532 | * | |
9fbab516 | 1533 | * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls |
bb8c093b | 1534 | * iwl3945_rx_queue_restock |
9fbab516 | 1535 | * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx |
b481de9c ZY |
1536 | * queue, updates firmware pointers, and updates |
1537 | * the WRITE index. If insufficient rx_free buffers | |
bb8c093b | 1538 | * are available, schedules iwl3945_rx_replenish |
b481de9c ZY |
1539 | * |
1540 | * -- enable interrupts -- | |
6100b588 | 1541 | * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the |
b481de9c ZY |
1542 | * READ INDEX, detaching the SKB from the pool. |
1543 | * Moves the packet buffer from queue to rx_used. | |
bb8c093b | 1544 | * Calls iwl3945_rx_queue_restock to refill any empty |
b481de9c ZY |
1545 | * slots. |
1546 | * ... | |
1547 | * | |
1548 | */ | |
1549 | ||
b481de9c | 1550 | /** |
9fbab516 | 1551 | * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr |
b481de9c | 1552 | */ |
4a8a4322 | 1553 | static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv, |
b481de9c ZY |
1554 | dma_addr_t dma_addr) |
1555 | { | |
1556 | return cpu_to_le32((u32)dma_addr); | |
1557 | } | |
1558 | ||
1559 | /** | |
bb8c093b | 1560 | * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool |
b481de9c | 1561 | * |
9fbab516 | 1562 | * If there are slots in the RX queue that need to be restocked, |
b481de9c | 1563 | * and we have free pre-allocated buffers, fill the ranks as much |
9fbab516 | 1564 | * as we can, pulling from rx_free. |
b481de9c ZY |
1565 | * |
1566 | * This moves the 'write' index forward to catch up with 'processed', and | |
1567 | * also updates the memory address in the firmware to reference the new | |
1568 | * target buffer. | |
1569 | */ | |
4a8a4322 | 1570 | static int iwl3945_rx_queue_restock(struct iwl_priv *priv) |
b481de9c | 1571 | { |
cc2f362c | 1572 | struct iwl_rx_queue *rxq = &priv->rxq; |
b481de9c | 1573 | struct list_head *element; |
6100b588 | 1574 | struct iwl_rx_mem_buffer *rxb; |
b481de9c ZY |
1575 | unsigned long flags; |
1576 | int write, rc; | |
1577 | ||
1578 | spin_lock_irqsave(&rxq->lock, flags); | |
1579 | write = rxq->write & ~0x7; | |
37d68317 | 1580 | while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) { |
6440adb5 | 1581 | /* Get next free Rx buffer, remove from free list */ |
b481de9c | 1582 | element = rxq->rx_free.next; |
6100b588 | 1583 | rxb = list_entry(element, struct iwl_rx_mem_buffer, list); |
b481de9c | 1584 | list_del(element); |
6440adb5 BC |
1585 | |
1586 | /* Point to Rx buffer via next RBD in circular buffer */ | |
6100b588 | 1587 | rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr); |
b481de9c ZY |
1588 | rxq->queue[rxq->write] = rxb; |
1589 | rxq->write = (rxq->write + 1) & RX_QUEUE_MASK; | |
1590 | rxq->free_count--; | |
1591 | } | |
1592 | spin_unlock_irqrestore(&rxq->lock, flags); | |
1593 | /* If the pre-allocated buffer pool is dropping low, schedule to | |
1594 | * refill it */ | |
1595 | if (rxq->free_count <= RX_LOW_WATERMARK) | |
1596 | queue_work(priv->workqueue, &priv->rx_replenish); | |
1597 | ||
1598 | ||
6440adb5 BC |
1599 | /* If we've added more space for the firmware to place data, tell it. |
1600 | * Increment device's write pointer in multiples of 8. */ | |
b481de9c ZY |
1601 | if ((write != (rxq->write & ~0x7)) |
1602 | || (abs(rxq->write - rxq->read) > 7)) { | |
1603 | spin_lock_irqsave(&rxq->lock, flags); | |
1604 | rxq->need_update = 1; | |
1605 | spin_unlock_irqrestore(&rxq->lock, flags); | |
141c43a3 | 1606 | rc = iwl_rx_queue_update_write_ptr(priv, rxq); |
b481de9c ZY |
1607 | if (rc) |
1608 | return rc; | |
1609 | } | |
1610 | ||
1611 | return 0; | |
1612 | } | |
1613 | ||
1614 | /** | |
bb8c093b | 1615 | * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free |
b481de9c ZY |
1616 | * |
1617 | * When moving to rx_free an SKB is allocated for the slot. | |
1618 | * | |
bb8c093b | 1619 | * Also restock the Rx queue via iwl3945_rx_queue_restock. |
01ebd063 | 1620 | * This is called as a scheduled work item (except for during initialization) |
b481de9c | 1621 | */ |
4a8a4322 | 1622 | static void iwl3945_rx_allocate(struct iwl_priv *priv) |
b481de9c | 1623 | { |
cc2f362c | 1624 | struct iwl_rx_queue *rxq = &priv->rxq; |
b481de9c | 1625 | struct list_head *element; |
6100b588 | 1626 | struct iwl_rx_mem_buffer *rxb; |
b481de9c ZY |
1627 | unsigned long flags; |
1628 | spin_lock_irqsave(&rxq->lock, flags); | |
1629 | while (!list_empty(&rxq->rx_used)) { | |
1630 | element = rxq->rx_used.next; | |
6100b588 | 1631 | rxb = list_entry(element, struct iwl_rx_mem_buffer, list); |
6440adb5 BC |
1632 | |
1633 | /* Alloc a new receive buffer */ | |
b481de9c | 1634 | rxb->skb = |
1e33dc64 WT |
1635 | alloc_skb(priv->hw_params.rx_buf_size, |
1636 | __GFP_NOWARN | GFP_ATOMIC); | |
b481de9c ZY |
1637 | if (!rxb->skb) { |
1638 | if (net_ratelimit()) | |
978785a3 | 1639 | IWL_CRIT(priv, ": Can not allocate SKB buffers\n"); |
b481de9c ZY |
1640 | /* We don't reschedule replenish work here -- we will |
1641 | * call the restock method and if it still needs | |
1642 | * more buffers it will schedule replenish */ | |
1643 | break; | |
1644 | } | |
12342c47 ZY |
1645 | |
1646 | /* If radiotap head is required, reserve some headroom here. | |
1647 | * The physical head count is a variable rx_stats->phy_count. | |
1648 | * We reserve 4 bytes here. Plus these extra bytes, the | |
1649 | * headroom of the physical head should be enough for the | |
1650 | * radiotap head that iwl3945 supported. See iwl3945_rt. | |
1651 | */ | |
1652 | skb_reserve(rxb->skb, 4); | |
1653 | ||
b481de9c ZY |
1654 | priv->alloc_rxb_skb++; |
1655 | list_del(element); | |
6440adb5 BC |
1656 | |
1657 | /* Get physical address of RB/SKB */ | |
1e33dc64 WT |
1658 | rxb->real_dma_addr = pci_map_single(priv->pci_dev, |
1659 | rxb->skb->data, | |
1660 | priv->hw_params.rx_buf_size, | |
1661 | PCI_DMA_FROMDEVICE); | |
b481de9c ZY |
1662 | list_add_tail(&rxb->list, &rxq->rx_free); |
1663 | rxq->free_count++; | |
1664 | } | |
1665 | spin_unlock_irqrestore(&rxq->lock, flags); | |
5c0eef96 MA |
1666 | } |
1667 | ||
df833b1d RC |
1668 | void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq) |
1669 | { | |
1670 | unsigned long flags; | |
1671 | int i; | |
1672 | spin_lock_irqsave(&rxq->lock, flags); | |
1673 | INIT_LIST_HEAD(&rxq->rx_free); | |
1674 | INIT_LIST_HEAD(&rxq->rx_used); | |
1675 | /* Fill the rx_used queue with _all_ of the Rx buffers */ | |
1676 | for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) { | |
1677 | /* In the reset function, these buffers may have been allocated | |
1678 | * to an SKB, so we need to unmap and free potential storage */ | |
1679 | if (rxq->pool[i].skb != NULL) { | |
1680 | pci_unmap_single(priv->pci_dev, | |
1681 | rxq->pool[i].real_dma_addr, | |
1682 | priv->hw_params.rx_buf_size, | |
1683 | PCI_DMA_FROMDEVICE); | |
1684 | priv->alloc_rxb_skb--; | |
1685 | dev_kfree_skb(rxq->pool[i].skb); | |
1686 | rxq->pool[i].skb = NULL; | |
1687 | } | |
1688 | list_add_tail(&rxq->pool[i].list, &rxq->rx_used); | |
1689 | } | |
1690 | ||
1691 | /* Set us so that we have processed and used all buffers, but have | |
1692 | * not restocked the Rx queue with fresh buffers */ | |
1693 | rxq->read = rxq->write = 0; | |
1694 | rxq->free_count = 0; | |
1695 | spin_unlock_irqrestore(&rxq->lock, flags); | |
1696 | } | |
df833b1d | 1697 | |
5c0eef96 MA |
1698 | /* |
1699 | * this should be called while priv->lock is locked | |
1700 | */ | |
4fd1f841 | 1701 | static void __iwl3945_rx_replenish(void *data) |
5c0eef96 | 1702 | { |
4a8a4322 | 1703 | struct iwl_priv *priv = data; |
5c0eef96 MA |
1704 | |
1705 | iwl3945_rx_allocate(priv); | |
1706 | iwl3945_rx_queue_restock(priv); | |
1707 | } | |
1708 | ||
1709 | ||
1710 | void iwl3945_rx_replenish(void *data) | |
1711 | { | |
4a8a4322 | 1712 | struct iwl_priv *priv = data; |
5c0eef96 MA |
1713 | unsigned long flags; |
1714 | ||
1715 | iwl3945_rx_allocate(priv); | |
b481de9c ZY |
1716 | |
1717 | spin_lock_irqsave(&priv->lock, flags); | |
bb8c093b | 1718 | iwl3945_rx_queue_restock(priv); |
b481de9c ZY |
1719 | spin_unlock_irqrestore(&priv->lock, flags); |
1720 | } | |
1721 | ||
df833b1d RC |
1722 | /* Assumes that the skb field of the buffers in 'pool' is kept accurate. |
1723 | * If an SKB has been detached, the POOL needs to have its SKB set to NULL | |
1724 | * This free routine walks the list of POOL entries and if SKB is set to | |
1725 | * non NULL it is unmapped and freed | |
1726 | */ | |
1727 | static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq) | |
1728 | { | |
1729 | int i; | |
1730 | for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) { | |
1731 | if (rxq->pool[i].skb != NULL) { | |
1732 | pci_unmap_single(priv->pci_dev, | |
1733 | rxq->pool[i].real_dma_addr, | |
1734 | priv->hw_params.rx_buf_size, | |
1735 | PCI_DMA_FROMDEVICE); | |
1736 | dev_kfree_skb(rxq->pool[i].skb); | |
1737 | } | |
1738 | } | |
1739 | ||
1740 | pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd, | |
1741 | rxq->dma_addr); | |
1742 | pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status), | |
1743 | rxq->rb_stts, rxq->rb_stts_dma); | |
1744 | rxq->bd = NULL; | |
1745 | rxq->rb_stts = NULL; | |
1746 | } | |
1747 | EXPORT_SYMBOL(iwl3945_rx_queue_free); | |
1748 | ||
1749 | ||
b481de9c ZY |
1750 | /* Convert linear signal-to-noise ratio into dB */ |
1751 | static u8 ratio2dB[100] = { | |
1752 | /* 0 1 2 3 4 5 6 7 8 9 */ | |
1753 | 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */ | |
1754 | 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */ | |
1755 | 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */ | |
1756 | 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */ | |
1757 | 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */ | |
1758 | 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */ | |
1759 | 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */ | |
1760 | 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */ | |
1761 | 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */ | |
1762 | 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */ | |
1763 | }; | |
1764 | ||
1765 | /* Calculates a relative dB value from a ratio of linear | |
1766 | * (i.e. not dB) signal levels. | |
1767 | * Conversion assumes that levels are voltages (20*log), not powers (10*log). */ | |
bb8c093b | 1768 | int iwl3945_calc_db_from_ratio(int sig_ratio) |
b481de9c | 1769 | { |
221c80cf AB |
1770 | /* 1000:1 or higher just report as 60 dB */ |
1771 | if (sig_ratio >= 1000) | |
b481de9c ZY |
1772 | return 60; |
1773 | ||
221c80cf | 1774 | /* 100:1 or higher, divide by 10 and use table, |
b481de9c | 1775 | * add 20 dB to make up for divide by 10 */ |
221c80cf | 1776 | if (sig_ratio >= 100) |
3ac7f146 | 1777 | return 20 + (int)ratio2dB[sig_ratio/10]; |
b481de9c ZY |
1778 | |
1779 | /* We shouldn't see this */ | |
1780 | if (sig_ratio < 1) | |
1781 | return 0; | |
1782 | ||
1783 | /* Use table for ratios 1:1 - 99:1 */ | |
1784 | return (int)ratio2dB[sig_ratio]; | |
1785 | } | |
1786 | ||
1787 | #define PERFECT_RSSI (-20) /* dBm */ | |
1788 | #define WORST_RSSI (-95) /* dBm */ | |
1789 | #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI) | |
1790 | ||
1791 | /* Calculate an indication of rx signal quality (a percentage, not dBm!). | |
1792 | * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info | |
1793 | * about formulas used below. */ | |
bb8c093b | 1794 | int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm) |
b481de9c ZY |
1795 | { |
1796 | int sig_qual; | |
1797 | int degradation = PERFECT_RSSI - rssi_dbm; | |
1798 | ||
1799 | /* If we get a noise measurement, use signal-to-noise ratio (SNR) | |
1800 | * as indicator; formula is (signal dbm - noise dbm). | |
1801 | * SNR at or above 40 is a great signal (100%). | |
1802 | * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator. | |
1803 | * Weakest usable signal is usually 10 - 15 dB SNR. */ | |
1804 | if (noise_dbm) { | |
1805 | if (rssi_dbm - noise_dbm >= 40) | |
1806 | return 100; | |
1807 | else if (rssi_dbm < noise_dbm) | |
1808 | return 0; | |
1809 | sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2; | |
1810 | ||
1811 | /* Else use just the signal level. | |
1812 | * This formula is a least squares fit of data points collected and | |
1813 | * compared with a reference system that had a percentage (%) display | |
1814 | * for signal quality. */ | |
1815 | } else | |
1816 | sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation * | |
1817 | (15 * RSSI_RANGE + 62 * degradation)) / | |
1818 | (RSSI_RANGE * RSSI_RANGE); | |
1819 | ||
1820 | if (sig_qual > 100) | |
1821 | sig_qual = 100; | |
1822 | else if (sig_qual < 1) | |
1823 | sig_qual = 0; | |
1824 | ||
1825 | return sig_qual; | |
1826 | } | |
1827 | ||
1828 | /** | |
9fbab516 | 1829 | * iwl3945_rx_handle - Main entry function for receiving responses from uCode |
b481de9c ZY |
1830 | * |
1831 | * Uses the priv->rx_handlers callback function array to invoke | |
1832 | * the appropriate handlers, including command responses, | |
1833 | * frame-received notifications, and other notifications. | |
1834 | */ | |
4a8a4322 | 1835 | static void iwl3945_rx_handle(struct iwl_priv *priv) |
b481de9c | 1836 | { |
6100b588 | 1837 | struct iwl_rx_mem_buffer *rxb; |
3d24a9f7 | 1838 | struct iwl_rx_packet *pkt; |
cc2f362c | 1839 | struct iwl_rx_queue *rxq = &priv->rxq; |
b481de9c ZY |
1840 | u32 r, i; |
1841 | int reclaim; | |
1842 | unsigned long flags; | |
5c0eef96 | 1843 | u8 fill_rx = 0; |
d68ab680 | 1844 | u32 count = 8; |
b481de9c | 1845 | |
6440adb5 BC |
1846 | /* uCode's read index (stored in shared DRAM) indicates the last Rx |
1847 | * buffer that the driver may process (last buffer filled by ucode). */ | |
8cd812bc | 1848 | r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF; |
b481de9c ZY |
1849 | i = rxq->read; |
1850 | ||
37d68317 | 1851 | if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2)) |
5c0eef96 | 1852 | fill_rx = 1; |
b481de9c ZY |
1853 | /* Rx interrupt, but nothing sent from uCode */ |
1854 | if (i == r) | |
e1623446 | 1855 | IWL_DEBUG(priv, IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i); |
b481de9c ZY |
1856 | |
1857 | while (i != r) { | |
1858 | rxb = rxq->queue[i]; | |
1859 | ||
9fbab516 | 1860 | /* If an RXB doesn't have a Rx queue slot associated with it, |
b481de9c ZY |
1861 | * then a bug has been introduced in the queue refilling |
1862 | * routines -- catch it here */ | |
1863 | BUG_ON(rxb == NULL); | |
1864 | ||
1865 | rxq->queue[i] = NULL; | |
1866 | ||
df833b1d RC |
1867 | pci_unmap_single(priv->pci_dev, rxb->real_dma_addr, |
1868 | priv->hw_params.rx_buf_size, | |
1869 | PCI_DMA_FROMDEVICE); | |
3d24a9f7 | 1870 | pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
1871 | |
1872 | /* Reclaim a command buffer only if this packet is a response | |
1873 | * to a (driver-originated) command. | |
1874 | * If the packet (e.g. Rx frame) originated from uCode, | |
1875 | * there is no command buffer to reclaim. | |
1876 | * Ucode should set SEQ_RX_FRAME bit if ucode-originated, | |
1877 | * but apparently a few don't get set; catch them here. */ | |
1878 | reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) && | |
1879 | (pkt->hdr.cmd != STATISTICS_NOTIFICATION) && | |
1880 | (pkt->hdr.cmd != REPLY_TX); | |
1881 | ||
1882 | /* Based on type of command response or notification, | |
1883 | * handle those that need handling via function in | |
bb8c093b | 1884 | * rx_handlers table. See iwl3945_setup_rx_handlers() */ |
b481de9c | 1885 | if (priv->rx_handlers[pkt->hdr.cmd]) { |
e1623446 | 1886 | IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR, |
b481de9c ZY |
1887 | "r = %d, i = %d, %s, 0x%02x\n", r, i, |
1888 | get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd); | |
1889 | priv->rx_handlers[pkt->hdr.cmd] (priv, rxb); | |
1890 | } else { | |
1891 | /* No handling needed */ | |
e1623446 | 1892 | IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR, |
b481de9c ZY |
1893 | "r %d i %d No handler needed for %s, 0x%02x\n", |
1894 | r, i, get_cmd_string(pkt->hdr.cmd), | |
1895 | pkt->hdr.cmd); | |
1896 | } | |
1897 | ||
1898 | if (reclaim) { | |
9fbab516 | 1899 | /* Invoke any callbacks, transfer the skb to caller, and |
518099a8 | 1900 | * fire off the (possibly) blocking iwl_send_cmd() |
b481de9c ZY |
1901 | * as we reclaim the driver command queue */ |
1902 | if (rxb && rxb->skb) | |
732587ab | 1903 | iwl_tx_cmd_complete(priv, rxb); |
b481de9c | 1904 | else |
39aadf8c | 1905 | IWL_WARN(priv, "Claim null rxb?\n"); |
b481de9c ZY |
1906 | } |
1907 | ||
1908 | /* For now we just don't re-use anything. We can tweak this | |
1909 | * later to try and re-use notification packets and SKBs that | |
1910 | * fail to Rx correctly */ | |
1911 | if (rxb->skb != NULL) { | |
1912 | priv->alloc_rxb_skb--; | |
1913 | dev_kfree_skb_any(rxb->skb); | |
1914 | rxb->skb = NULL; | |
1915 | } | |
1916 | ||
b481de9c ZY |
1917 | spin_lock_irqsave(&rxq->lock, flags); |
1918 | list_add_tail(&rxb->list, &priv->rxq.rx_used); | |
1919 | spin_unlock_irqrestore(&rxq->lock, flags); | |
1920 | i = (i + 1) & RX_QUEUE_MASK; | |
5c0eef96 MA |
1921 | /* If there are a lot of unused frames, |
1922 | * restock the Rx queue so ucode won't assert. */ | |
1923 | if (fill_rx) { | |
1924 | count++; | |
1925 | if (count >= 8) { | |
1926 | priv->rxq.read = i; | |
1927 | __iwl3945_rx_replenish(priv); | |
1928 | count = 0; | |
1929 | } | |
1930 | } | |
b481de9c ZY |
1931 | } |
1932 | ||
1933 | /* Backtrack one entry */ | |
1934 | priv->rxq.read = i; | |
bb8c093b | 1935 | iwl3945_rx_queue_restock(priv); |
b481de9c ZY |
1936 | } |
1937 | ||
0359facc | 1938 | /* call this function to flush any scheduled tasklet */ |
4a8a4322 | 1939 | static inline void iwl_synchronize_irq(struct iwl_priv *priv) |
0359facc | 1940 | { |
a96a27f9 | 1941 | /* wait to make sure we flush pending tasklet*/ |
0359facc MA |
1942 | synchronize_irq(priv->pci_dev->irq); |
1943 | tasklet_kill(&priv->irq_tasklet); | |
1944 | } | |
1945 | ||
b481de9c ZY |
1946 | static const char *desc_lookup(int i) |
1947 | { | |
1948 | switch (i) { | |
1949 | case 1: | |
1950 | return "FAIL"; | |
1951 | case 2: | |
1952 | return "BAD_PARAM"; | |
1953 | case 3: | |
1954 | return "BAD_CHECKSUM"; | |
1955 | case 4: | |
1956 | return "NMI_INTERRUPT"; | |
1957 | case 5: | |
1958 | return "SYSASSERT"; | |
1959 | case 6: | |
1960 | return "FATAL_ERROR"; | |
1961 | } | |
1962 | ||
1963 | return "UNKNOWN"; | |
1964 | } | |
1965 | ||
1966 | #define ERROR_START_OFFSET (1 * sizeof(u32)) | |
1967 | #define ERROR_ELEM_SIZE (7 * sizeof(u32)) | |
1968 | ||
4a8a4322 | 1969 | static void iwl3945_dump_nic_error_log(struct iwl_priv *priv) |
b481de9c ZY |
1970 | { |
1971 | u32 i; | |
1972 | u32 desc, time, count, base, data1; | |
1973 | u32 blink1, blink2, ilink1, ilink2; | |
1974 | int rc; | |
1975 | ||
1976 | base = le32_to_cpu(priv->card_alive.error_event_table_ptr); | |
1977 | ||
bb8c093b | 1978 | if (!iwl3945_hw_valid_rtc_data_addr(base)) { |
15b1687c | 1979 | IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base); |
b481de9c ZY |
1980 | return; |
1981 | } | |
1982 | ||
5d49f498 | 1983 | rc = iwl_grab_nic_access(priv); |
b481de9c | 1984 | if (rc) { |
39aadf8c | 1985 | IWL_WARN(priv, "Can not read from adapter at this time.\n"); |
b481de9c ZY |
1986 | return; |
1987 | } | |
1988 | ||
5d49f498 | 1989 | count = iwl_read_targ_mem(priv, base); |
b481de9c ZY |
1990 | |
1991 | if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) { | |
15b1687c WT |
1992 | IWL_ERR(priv, "Start IWL Error Log Dump:\n"); |
1993 | IWL_ERR(priv, "Status: 0x%08lX, count: %d\n", | |
1994 | priv->status, count); | |
b481de9c ZY |
1995 | } |
1996 | ||
15b1687c | 1997 | IWL_ERR(priv, "Desc Time asrtPC blink2 " |
b481de9c ZY |
1998 | "ilink1 nmiPC Line\n"); |
1999 | for (i = ERROR_START_OFFSET; | |
2000 | i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET; | |
2001 | i += ERROR_ELEM_SIZE) { | |
5d49f498 | 2002 | desc = iwl_read_targ_mem(priv, base + i); |
b481de9c | 2003 | time = |
5d49f498 | 2004 | iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32)); |
b481de9c | 2005 | blink1 = |
5d49f498 | 2006 | iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32)); |
b481de9c | 2007 | blink2 = |
5d49f498 | 2008 | iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32)); |
b481de9c | 2009 | ilink1 = |
5d49f498 | 2010 | iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32)); |
b481de9c | 2011 | ilink2 = |
5d49f498 | 2012 | iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32)); |
b481de9c | 2013 | data1 = |
5d49f498 | 2014 | iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32)); |
b481de9c | 2015 | |
15b1687c WT |
2016 | IWL_ERR(priv, |
2017 | "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n", | |
2018 | desc_lookup(desc), desc, time, blink1, blink2, | |
2019 | ilink1, ilink2, data1); | |
b481de9c ZY |
2020 | } |
2021 | ||
5d49f498 | 2022 | iwl_release_nic_access(priv); |
b481de9c ZY |
2023 | |
2024 | } | |
2025 | ||
f58177b9 | 2026 | #define EVENT_START_OFFSET (6 * sizeof(u32)) |
b481de9c ZY |
2027 | |
2028 | /** | |
bb8c093b | 2029 | * iwl3945_print_event_log - Dump error event log to syslog |
b481de9c | 2030 | * |
5d49f498 | 2031 | * NOTE: Must be called with iwl_grab_nic_access() already obtained! |
b481de9c | 2032 | */ |
4a8a4322 | 2033 | static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx, |
b481de9c ZY |
2034 | u32 num_events, u32 mode) |
2035 | { | |
2036 | u32 i; | |
2037 | u32 base; /* SRAM byte address of event log header */ | |
2038 | u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */ | |
2039 | u32 ptr; /* SRAM byte address of log data */ | |
2040 | u32 ev, time, data; /* event log data */ | |
2041 | ||
2042 | if (num_events == 0) | |
2043 | return; | |
2044 | ||
2045 | base = le32_to_cpu(priv->card_alive.log_event_table_ptr); | |
2046 | ||
2047 | if (mode == 0) | |
2048 | event_size = 2 * sizeof(u32); | |
2049 | else | |
2050 | event_size = 3 * sizeof(u32); | |
2051 | ||
2052 | ptr = base + EVENT_START_OFFSET + (start_idx * event_size); | |
2053 | ||
2054 | /* "time" is actually "data" for mode 0 (no timestamp). | |
2055 | * place event id # at far right for easier visual parsing. */ | |
2056 | for (i = 0; i < num_events; i++) { | |
5d49f498 | 2057 | ev = iwl_read_targ_mem(priv, ptr); |
b481de9c | 2058 | ptr += sizeof(u32); |
5d49f498 | 2059 | time = iwl_read_targ_mem(priv, ptr); |
b481de9c | 2060 | ptr += sizeof(u32); |
15b1687c WT |
2061 | if (mode == 0) { |
2062 | /* data, ev */ | |
2063 | IWL_ERR(priv, "0x%08x\t%04u\n", time, ev); | |
2064 | } else { | |
5d49f498 | 2065 | data = iwl_read_targ_mem(priv, ptr); |
b481de9c | 2066 | ptr += sizeof(u32); |
15b1687c | 2067 | IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev); |
b481de9c ZY |
2068 | } |
2069 | } | |
2070 | } | |
2071 | ||
4a8a4322 | 2072 | static void iwl3945_dump_nic_event_log(struct iwl_priv *priv) |
b481de9c ZY |
2073 | { |
2074 | int rc; | |
2075 | u32 base; /* SRAM byte address of event log header */ | |
2076 | u32 capacity; /* event log capacity in # entries */ | |
2077 | u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */ | |
2078 | u32 num_wraps; /* # times uCode wrapped to top of log */ | |
2079 | u32 next_entry; /* index of next entry to be written by uCode */ | |
2080 | u32 size; /* # entries that we'll print */ | |
2081 | ||
2082 | base = le32_to_cpu(priv->card_alive.log_event_table_ptr); | |
bb8c093b | 2083 | if (!iwl3945_hw_valid_rtc_data_addr(base)) { |
15b1687c | 2084 | IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base); |
b481de9c ZY |
2085 | return; |
2086 | } | |
2087 | ||
5d49f498 | 2088 | rc = iwl_grab_nic_access(priv); |
b481de9c | 2089 | if (rc) { |
39aadf8c | 2090 | IWL_WARN(priv, "Can not read from adapter at this time.\n"); |
b481de9c ZY |
2091 | return; |
2092 | } | |
2093 | ||
2094 | /* event log header */ | |
5d49f498 AK |
2095 | capacity = iwl_read_targ_mem(priv, base); |
2096 | mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32))); | |
2097 | num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32))); | |
2098 | next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32))); | |
b481de9c ZY |
2099 | |
2100 | size = num_wraps ? capacity : next_entry; | |
2101 | ||
2102 | /* bail out if nothing in log */ | |
2103 | if (size == 0) { | |
15b1687c | 2104 | IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n"); |
5d49f498 | 2105 | iwl_release_nic_access(priv); |
b481de9c ZY |
2106 | return; |
2107 | } | |
2108 | ||
15b1687c | 2109 | IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n", |
b481de9c ZY |
2110 | size, num_wraps); |
2111 | ||
2112 | /* if uCode has wrapped back to top of log, start at the oldest entry, | |
2113 | * i.e the next one that uCode would fill. */ | |
2114 | if (num_wraps) | |
bb8c093b | 2115 | iwl3945_print_event_log(priv, next_entry, |
b481de9c ZY |
2116 | capacity - next_entry, mode); |
2117 | ||
2118 | /* (then/else) start at top of log */ | |
bb8c093b | 2119 | iwl3945_print_event_log(priv, 0, next_entry, mode); |
b481de9c | 2120 | |
5d49f498 | 2121 | iwl_release_nic_access(priv); |
b481de9c ZY |
2122 | } |
2123 | ||
4a8a4322 | 2124 | static void iwl3945_error_recovery(struct iwl_priv *priv) |
b481de9c ZY |
2125 | { |
2126 | unsigned long flags; | |
2127 | ||
8ccde88a SO |
2128 | memcpy(&priv->staging_rxon, &priv->recovery_rxon, |
2129 | sizeof(priv->staging_rxon)); | |
2130 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 2131 | iwl3945_commit_rxon(priv); |
b481de9c | 2132 | |
bb8c093b | 2133 | iwl3945_add_station(priv, priv->bssid, 1, 0); |
b481de9c ZY |
2134 | |
2135 | spin_lock_irqsave(&priv->lock, flags); | |
8ccde88a | 2136 | priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id); |
b481de9c ZY |
2137 | priv->error_recovering = 0; |
2138 | spin_unlock_irqrestore(&priv->lock, flags); | |
2139 | } | |
2140 | ||
4a8a4322 | 2141 | static void iwl3945_irq_tasklet(struct iwl_priv *priv) |
b481de9c ZY |
2142 | { |
2143 | u32 inta, handled = 0; | |
2144 | u32 inta_fh; | |
2145 | unsigned long flags; | |
d08853a3 | 2146 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
2147 | u32 inta_mask; |
2148 | #endif | |
2149 | ||
2150 | spin_lock_irqsave(&priv->lock, flags); | |
2151 | ||
2152 | /* Ack/clear/reset pending uCode interrupts. | |
2153 | * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS, | |
2154 | * and will clear only when CSR_FH_INT_STATUS gets cleared. */ | |
5d49f498 AK |
2155 | inta = iwl_read32(priv, CSR_INT); |
2156 | iwl_write32(priv, CSR_INT, inta); | |
b481de9c ZY |
2157 | |
2158 | /* Ack/clear/reset pending flow-handler (DMA) interrupts. | |
2159 | * Any new interrupts that happen after this, either while we're | |
2160 | * in this tasklet, or later, will show up in next ISR/tasklet. */ | |
5d49f498 AK |
2161 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); |
2162 | iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh); | |
b481de9c | 2163 | |
d08853a3 | 2164 | #ifdef CONFIG_IWLWIFI_DEBUG |
40b8ec0b | 2165 | if (priv->debug_level & IWL_DL_ISR) { |
9fbab516 | 2166 | /* just for debug */ |
5d49f498 | 2167 | inta_mask = iwl_read32(priv, CSR_INT_MASK); |
e1623446 | 2168 | IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", |
b481de9c ZY |
2169 | inta, inta_mask, inta_fh); |
2170 | } | |
2171 | #endif | |
2172 | ||
2173 | /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not | |
2174 | * atomic, make sure that inta covers all the interrupts that | |
2175 | * we've discovered, even if FH interrupt came in just after | |
2176 | * reading CSR_INT. */ | |
6f83eaa1 | 2177 | if (inta_fh & CSR39_FH_INT_RX_MASK) |
b481de9c | 2178 | inta |= CSR_INT_BIT_FH_RX; |
6f83eaa1 | 2179 | if (inta_fh & CSR39_FH_INT_TX_MASK) |
b481de9c ZY |
2180 | inta |= CSR_INT_BIT_FH_TX; |
2181 | ||
2182 | /* Now service all interrupt bits discovered above. */ | |
2183 | if (inta & CSR_INT_BIT_HW_ERR) { | |
15b1687c | 2184 | IWL_ERR(priv, "Microcode HW error detected. Restarting.\n"); |
b481de9c ZY |
2185 | |
2186 | /* Tell the device to stop sending interrupts */ | |
ed3b932e | 2187 | iwl_disable_interrupts(priv); |
b481de9c | 2188 | |
8ccde88a | 2189 | iwl_irq_handle_error(priv); |
b481de9c ZY |
2190 | |
2191 | handled |= CSR_INT_BIT_HW_ERR; | |
2192 | ||
2193 | spin_unlock_irqrestore(&priv->lock, flags); | |
2194 | ||
2195 | return; | |
2196 | } | |
2197 | ||
d08853a3 | 2198 | #ifdef CONFIG_IWLWIFI_DEBUG |
40b8ec0b | 2199 | if (priv->debug_level & (IWL_DL_ISR)) { |
b481de9c | 2200 | /* NIC fires this, but we don't use it, redundant with WAKEUP */ |
25c03d8e | 2201 | if (inta & CSR_INT_BIT_SCD) |
e1623446 | 2202 | IWL_DEBUG_ISR(priv, "Scheduler finished to transmit " |
25c03d8e | 2203 | "the frame/frames.\n"); |
b481de9c ZY |
2204 | |
2205 | /* Alive notification via Rx interrupt will do the real work */ | |
2206 | if (inta & CSR_INT_BIT_ALIVE) | |
e1623446 | 2207 | IWL_DEBUG_ISR(priv, "Alive interrupt\n"); |
b481de9c ZY |
2208 | } |
2209 | #endif | |
2210 | /* Safely ignore these bits for debug checks below */ | |
25c03d8e | 2211 | inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE); |
b481de9c | 2212 | |
b481de9c ZY |
2213 | /* Error detected by uCode */ |
2214 | if (inta & CSR_INT_BIT_SW_ERR) { | |
15b1687c WT |
2215 | IWL_ERR(priv, "Microcode SW error detected. " |
2216 | "Restarting 0x%X.\n", inta); | |
8ccde88a | 2217 | iwl_irq_handle_error(priv); |
b481de9c ZY |
2218 | handled |= CSR_INT_BIT_SW_ERR; |
2219 | } | |
2220 | ||
2221 | /* uCode wakes up after power-down sleep */ | |
2222 | if (inta & CSR_INT_BIT_WAKEUP) { | |
e1623446 | 2223 | IWL_DEBUG_ISR(priv, "Wakeup interrupt\n"); |
141c43a3 | 2224 | iwl_rx_queue_update_write_ptr(priv, &priv->rxq); |
4f3602c8 SO |
2225 | iwl_txq_update_write_ptr(priv, &priv->txq[0]); |
2226 | iwl_txq_update_write_ptr(priv, &priv->txq[1]); | |
2227 | iwl_txq_update_write_ptr(priv, &priv->txq[2]); | |
2228 | iwl_txq_update_write_ptr(priv, &priv->txq[3]); | |
2229 | iwl_txq_update_write_ptr(priv, &priv->txq[4]); | |
2230 | iwl_txq_update_write_ptr(priv, &priv->txq[5]); | |
b481de9c ZY |
2231 | |
2232 | handled |= CSR_INT_BIT_WAKEUP; | |
2233 | } | |
2234 | ||
2235 | /* All uCode command responses, including Tx command responses, | |
2236 | * Rx "responses" (frame-received notification), and other | |
2237 | * notifications from uCode come through here*/ | |
2238 | if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) { | |
bb8c093b | 2239 | iwl3945_rx_handle(priv); |
b481de9c ZY |
2240 | handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX); |
2241 | } | |
2242 | ||
2243 | if (inta & CSR_INT_BIT_FH_TX) { | |
e1623446 | 2244 | IWL_DEBUG_ISR(priv, "Tx interrupt\n"); |
b481de9c | 2245 | |
5d49f498 AK |
2246 | iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6)); |
2247 | if (!iwl_grab_nic_access(priv)) { | |
2248 | iwl_write_direct32(priv, FH39_TCSR_CREDIT | |
bddadf86 | 2249 | (FH39_SRVC_CHNL), 0x0); |
5d49f498 | 2250 | iwl_release_nic_access(priv); |
b481de9c ZY |
2251 | } |
2252 | handled |= CSR_INT_BIT_FH_TX; | |
2253 | } | |
2254 | ||
2255 | if (inta & ~handled) | |
15b1687c | 2256 | IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled); |
b481de9c ZY |
2257 | |
2258 | if (inta & ~CSR_INI_SET_MASK) { | |
39aadf8c | 2259 | IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n", |
b481de9c | 2260 | inta & ~CSR_INI_SET_MASK); |
39aadf8c | 2261 | IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh); |
b481de9c ZY |
2262 | } |
2263 | ||
2264 | /* Re-enable all interrupts */ | |
0359facc MA |
2265 | /* only Re-enable if disabled by irq */ |
2266 | if (test_bit(STATUS_INT_ENABLED, &priv->status)) | |
ed3b932e | 2267 | iwl_enable_interrupts(priv); |
b481de9c | 2268 | |
d08853a3 | 2269 | #ifdef CONFIG_IWLWIFI_DEBUG |
40b8ec0b | 2270 | if (priv->debug_level & (IWL_DL_ISR)) { |
5d49f498 AK |
2271 | inta = iwl_read32(priv, CSR_INT); |
2272 | inta_mask = iwl_read32(priv, CSR_INT_MASK); | |
2273 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); | |
e1623446 | 2274 | IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, " |
b481de9c ZY |
2275 | "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags); |
2276 | } | |
2277 | #endif | |
2278 | spin_unlock_irqrestore(&priv->lock, flags); | |
2279 | } | |
2280 | ||
4a8a4322 | 2281 | static int iwl3945_get_channels_for_scan(struct iwl_priv *priv, |
8318d78a | 2282 | enum ieee80211_band band, |
f9340520 | 2283 | u8 is_active, u8 n_probes, |
bb8c093b | 2284 | struct iwl3945_scan_channel *scan_ch) |
b481de9c ZY |
2285 | { |
2286 | const struct ieee80211_channel *channels = NULL; | |
8318d78a | 2287 | const struct ieee80211_supported_band *sband; |
d20b3c65 | 2288 | const struct iwl_channel_info *ch_info; |
b481de9c ZY |
2289 | u16 passive_dwell = 0; |
2290 | u16 active_dwell = 0; | |
2291 | int added, i; | |
2292 | ||
cbba18c6 | 2293 | sband = iwl_get_hw_mode(priv, band); |
8318d78a | 2294 | if (!sband) |
b481de9c ZY |
2295 | return 0; |
2296 | ||
8318d78a | 2297 | channels = sband->channels; |
b481de9c | 2298 | |
77fecfb8 SO |
2299 | active_dwell = iwl_get_active_dwell_time(priv, band, n_probes); |
2300 | passive_dwell = iwl_get_passive_dwell_time(priv, band); | |
b481de9c | 2301 | |
8f4807a1 AK |
2302 | if (passive_dwell <= active_dwell) |
2303 | passive_dwell = active_dwell + 1; | |
2304 | ||
8318d78a | 2305 | for (i = 0, added = 0; i < sband->n_channels; i++) { |
182e2e66 JB |
2306 | if (channels[i].flags & IEEE80211_CHAN_DISABLED) |
2307 | continue; | |
2308 | ||
8318d78a | 2309 | scan_ch->channel = channels[i].hw_value; |
b481de9c | 2310 | |
e6148917 | 2311 | ch_info = iwl_get_channel_info(priv, band, scan_ch->channel); |
b481de9c | 2312 | if (!is_channel_valid(ch_info)) { |
e1623446 | 2313 | IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n", |
b481de9c ZY |
2314 | scan_ch->channel); |
2315 | continue; | |
2316 | } | |
2317 | ||
011a0330 AK |
2318 | scan_ch->active_dwell = cpu_to_le16(active_dwell); |
2319 | scan_ch->passive_dwell = cpu_to_le16(passive_dwell); | |
2320 | /* If passive , set up for auto-switch | |
2321 | * and use long active_dwell time. | |
2322 | */ | |
b481de9c | 2323 | if (!is_active || is_channel_passive(ch_info) || |
011a0330 | 2324 | (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN)) { |
b481de9c | 2325 | scan_ch->type = 0; /* passive */ |
011a0330 AK |
2326 | if (IWL_UCODE_API(priv->ucode_ver) == 1) |
2327 | scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1); | |
2328 | } else { | |
b481de9c | 2329 | scan_ch->type = 1; /* active */ |
011a0330 | 2330 | } |
b481de9c | 2331 | |
011a0330 AK |
2332 | /* Set direct probe bits. These may be used both for active |
2333 | * scan channels (probes gets sent right away), | |
2334 | * or for passive channels (probes get se sent only after | |
2335 | * hearing clear Rx packet).*/ | |
2336 | if (IWL_UCODE_API(priv->ucode_ver) >= 2) { | |
2337 | if (n_probes) | |
0d21044e | 2338 | scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes); |
011a0330 AK |
2339 | } else { |
2340 | /* uCode v1 does not allow setting direct probe bits on | |
2341 | * passive channel. */ | |
2342 | if ((scan_ch->type & 1) && n_probes) | |
0d21044e | 2343 | scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes); |
011a0330 | 2344 | } |
b481de9c | 2345 | |
9fbab516 | 2346 | /* Set txpower levels to defaults */ |
b481de9c ZY |
2347 | scan_ch->tpc.dsp_atten = 110; |
2348 | /* scan_pwr_info->tpc.dsp_atten; */ | |
2349 | ||
2350 | /*scan_pwr_info->tpc.tx_gain; */ | |
8318d78a | 2351 | if (band == IEEE80211_BAND_5GHZ) |
b481de9c ZY |
2352 | scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3; |
2353 | else { | |
2354 | scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3)); | |
2355 | /* NOTE: if we were doing 6Mb OFDM for scans we'd use | |
9fbab516 | 2356 | * power level: |
8a1b0245 | 2357 | * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3; |
b481de9c ZY |
2358 | */ |
2359 | } | |
2360 | ||
e1623446 | 2361 | IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n", |
b481de9c ZY |
2362 | scan_ch->channel, |
2363 | (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE", | |
2364 | (scan_ch->type & 1) ? | |
2365 | active_dwell : passive_dwell); | |
2366 | ||
2367 | scan_ch++; | |
2368 | added++; | |
2369 | } | |
2370 | ||
e1623446 | 2371 | IWL_DEBUG_SCAN(priv, "total channels to scan %d \n", added); |
b481de9c ZY |
2372 | return added; |
2373 | } | |
2374 | ||
4a8a4322 | 2375 | static void iwl3945_init_hw_rates(struct iwl_priv *priv, |
b481de9c ZY |
2376 | struct ieee80211_rate *rates) |
2377 | { | |
2378 | int i; | |
2379 | ||
2380 | for (i = 0; i < IWL_RATE_COUNT; i++) { | |
8318d78a JB |
2381 | rates[i].bitrate = iwl3945_rates[i].ieee * 5; |
2382 | rates[i].hw_value = i; /* Rate scaling will work on indexes */ | |
2383 | rates[i].hw_value_short = i; | |
2384 | rates[i].flags = 0; | |
d9829a67 | 2385 | if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) { |
b481de9c | 2386 | /* |
8318d78a | 2387 | * If CCK != 1M then set short preamble rate flag. |
b481de9c | 2388 | */ |
bb8c093b | 2389 | rates[i].flags |= (iwl3945_rates[i].plcp == 10) ? |
8318d78a | 2390 | 0 : IEEE80211_RATE_SHORT_PREAMBLE; |
b481de9c | 2391 | } |
b481de9c ZY |
2392 | } |
2393 | } | |
2394 | ||
b481de9c ZY |
2395 | /****************************************************************************** |
2396 | * | |
2397 | * uCode download functions | |
2398 | * | |
2399 | ******************************************************************************/ | |
2400 | ||
4a8a4322 | 2401 | static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv) |
b481de9c | 2402 | { |
98c92211 TW |
2403 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code); |
2404 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data); | |
2405 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup); | |
2406 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init); | |
2407 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data); | |
2408 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot); | |
b481de9c ZY |
2409 | } |
2410 | ||
2411 | /** | |
bb8c093b | 2412 | * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host, |
b481de9c ZY |
2413 | * looking at all data. |
2414 | */ | |
4a8a4322 | 2415 | static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len) |
b481de9c ZY |
2416 | { |
2417 | u32 val; | |
2418 | u32 save_len = len; | |
2419 | int rc = 0; | |
2420 | u32 errcnt; | |
2421 | ||
e1623446 | 2422 | IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len); |
b481de9c | 2423 | |
5d49f498 | 2424 | rc = iwl_grab_nic_access(priv); |
b481de9c ZY |
2425 | if (rc) |
2426 | return rc; | |
2427 | ||
5d49f498 | 2428 | iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, |
250bdd21 | 2429 | IWL39_RTC_INST_LOWER_BOUND); |
b481de9c ZY |
2430 | |
2431 | errcnt = 0; | |
2432 | for (; len > 0; len -= sizeof(u32), image++) { | |
2433 | /* read data comes through single port, auto-incr addr */ | |
2434 | /* NOTE: Use the debugless read so we don't flood kernel log | |
2435 | * if IWL_DL_IO is set */ | |
5d49f498 | 2436 | val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); |
b481de9c | 2437 | if (val != le32_to_cpu(*image)) { |
15b1687c | 2438 | IWL_ERR(priv, "uCode INST section is invalid at " |
b481de9c ZY |
2439 | "offset 0x%x, is 0x%x, s/b 0x%x\n", |
2440 | save_len - len, val, le32_to_cpu(*image)); | |
2441 | rc = -EIO; | |
2442 | errcnt++; | |
2443 | if (errcnt >= 20) | |
2444 | break; | |
2445 | } | |
2446 | } | |
2447 | ||
5d49f498 | 2448 | iwl_release_nic_access(priv); |
b481de9c ZY |
2449 | |
2450 | if (!errcnt) | |
e1623446 TW |
2451 | IWL_DEBUG_INFO(priv, |
2452 | "ucode image in INSTRUCTION memory is good\n"); | |
b481de9c ZY |
2453 | |
2454 | return rc; | |
2455 | } | |
2456 | ||
2457 | ||
2458 | /** | |
bb8c093b | 2459 | * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host, |
b481de9c ZY |
2460 | * using sample data 100 bytes apart. If these sample points are good, |
2461 | * it's a pretty good bet that everything between them is good, too. | |
2462 | */ | |
4a8a4322 | 2463 | static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len) |
b481de9c ZY |
2464 | { |
2465 | u32 val; | |
2466 | int rc = 0; | |
2467 | u32 errcnt = 0; | |
2468 | u32 i; | |
2469 | ||
e1623446 | 2470 | IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len); |
b481de9c | 2471 | |
5d49f498 | 2472 | rc = iwl_grab_nic_access(priv); |
b481de9c ZY |
2473 | if (rc) |
2474 | return rc; | |
2475 | ||
2476 | for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) { | |
2477 | /* read data comes through single port, auto-incr addr */ | |
2478 | /* NOTE: Use the debugless read so we don't flood kernel log | |
2479 | * if IWL_DL_IO is set */ | |
5d49f498 | 2480 | iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, |
250bdd21 | 2481 | i + IWL39_RTC_INST_LOWER_BOUND); |
5d49f498 | 2482 | val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); |
b481de9c ZY |
2483 | if (val != le32_to_cpu(*image)) { |
2484 | #if 0 /* Enable this if you want to see details */ | |
15b1687c | 2485 | IWL_ERR(priv, "uCode INST section is invalid at " |
b481de9c ZY |
2486 | "offset 0x%x, is 0x%x, s/b 0x%x\n", |
2487 | i, val, *image); | |
2488 | #endif | |
2489 | rc = -EIO; | |
2490 | errcnt++; | |
2491 | if (errcnt >= 3) | |
2492 | break; | |
2493 | } | |
2494 | } | |
2495 | ||
5d49f498 | 2496 | iwl_release_nic_access(priv); |
b481de9c ZY |
2497 | |
2498 | return rc; | |
2499 | } | |
2500 | ||
2501 | ||
2502 | /** | |
bb8c093b | 2503 | * iwl3945_verify_ucode - determine which instruction image is in SRAM, |
b481de9c ZY |
2504 | * and verify its contents |
2505 | */ | |
4a8a4322 | 2506 | static int iwl3945_verify_ucode(struct iwl_priv *priv) |
b481de9c ZY |
2507 | { |
2508 | __le32 *image; | |
2509 | u32 len; | |
2510 | int rc = 0; | |
2511 | ||
2512 | /* Try bootstrap */ | |
2513 | image = (__le32 *)priv->ucode_boot.v_addr; | |
2514 | len = priv->ucode_boot.len; | |
bb8c093b | 2515 | rc = iwl3945_verify_inst_sparse(priv, image, len); |
b481de9c | 2516 | if (rc == 0) { |
e1623446 | 2517 | IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n"); |
b481de9c ZY |
2518 | return 0; |
2519 | } | |
2520 | ||
2521 | /* Try initialize */ | |
2522 | image = (__le32 *)priv->ucode_init.v_addr; | |
2523 | len = priv->ucode_init.len; | |
bb8c093b | 2524 | rc = iwl3945_verify_inst_sparse(priv, image, len); |
b481de9c | 2525 | if (rc == 0) { |
e1623446 | 2526 | IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n"); |
b481de9c ZY |
2527 | return 0; |
2528 | } | |
2529 | ||
2530 | /* Try runtime/protocol */ | |
2531 | image = (__le32 *)priv->ucode_code.v_addr; | |
2532 | len = priv->ucode_code.len; | |
bb8c093b | 2533 | rc = iwl3945_verify_inst_sparse(priv, image, len); |
b481de9c | 2534 | if (rc == 0) { |
e1623446 | 2535 | IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n"); |
b481de9c ZY |
2536 | return 0; |
2537 | } | |
2538 | ||
15b1687c | 2539 | IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n"); |
b481de9c | 2540 | |
9fbab516 BC |
2541 | /* Since nothing seems to match, show first several data entries in |
2542 | * instruction SRAM, so maybe visual inspection will give a clue. | |
2543 | * Selection of bootstrap image (vs. other images) is arbitrary. */ | |
b481de9c ZY |
2544 | image = (__le32 *)priv->ucode_boot.v_addr; |
2545 | len = priv->ucode_boot.len; | |
bb8c093b | 2546 | rc = iwl3945_verify_inst_full(priv, image, len); |
b481de9c ZY |
2547 | |
2548 | return rc; | |
2549 | } | |
2550 | ||
4a8a4322 | 2551 | static void iwl3945_nic_start(struct iwl_priv *priv) |
b481de9c ZY |
2552 | { |
2553 | /* Remove all resets to allow NIC to operate */ | |
5d49f498 | 2554 | iwl_write32(priv, CSR_RESET, 0); |
b481de9c ZY |
2555 | } |
2556 | ||
2557 | /** | |
bb8c093b | 2558 | * iwl3945_read_ucode - Read uCode images from disk file. |
b481de9c ZY |
2559 | * |
2560 | * Copy into buffers for card to fetch via bus-mastering | |
2561 | */ | |
4a8a4322 | 2562 | static int iwl3945_read_ucode(struct iwl_priv *priv) |
b481de9c | 2563 | { |
a78fe754 | 2564 | struct iwl_ucode *ucode; |
a0987a8d | 2565 | int ret = -EINVAL, index; |
b481de9c ZY |
2566 | const struct firmware *ucode_raw; |
2567 | /* firmware file name contains uCode/driver compatibility version */ | |
a0987a8d RC |
2568 | const char *name_pre = priv->cfg->fw_name_pre; |
2569 | const unsigned int api_max = priv->cfg->ucode_api_max; | |
2570 | const unsigned int api_min = priv->cfg->ucode_api_min; | |
2571 | char buf[25]; | |
b481de9c ZY |
2572 | u8 *src; |
2573 | size_t len; | |
a0987a8d | 2574 | u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size; |
b481de9c ZY |
2575 | |
2576 | /* Ask kernel firmware_class module to get the boot firmware off disk. | |
2577 | * request_firmware() is synchronous, file is in memory on return. */ | |
a0987a8d RC |
2578 | for (index = api_max; index >= api_min; index--) { |
2579 | sprintf(buf, "%s%u%s", name_pre, index, ".ucode"); | |
2580 | ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev); | |
2581 | if (ret < 0) { | |
15b1687c | 2582 | IWL_ERR(priv, "%s firmware file req failed: %d\n", |
a0987a8d RC |
2583 | buf, ret); |
2584 | if (ret == -ENOENT) | |
2585 | continue; | |
2586 | else | |
2587 | goto error; | |
2588 | } else { | |
2589 | if (index < api_max) | |
15b1687c WT |
2590 | IWL_ERR(priv, "Loaded firmware %s, " |
2591 | "which is deprecated. " | |
2592 | " Please use API v%u instead.\n", | |
a0987a8d | 2593 | buf, api_max); |
e1623446 TW |
2594 | IWL_DEBUG_INFO(priv, "Got firmware '%s' file " |
2595 | "(%zd bytes) from disk\n", | |
a0987a8d RC |
2596 | buf, ucode_raw->size); |
2597 | break; | |
2598 | } | |
b481de9c ZY |
2599 | } |
2600 | ||
a0987a8d RC |
2601 | if (ret < 0) |
2602 | goto error; | |
b481de9c ZY |
2603 | |
2604 | /* Make sure that we got at least our header! */ | |
2605 | if (ucode_raw->size < sizeof(*ucode)) { | |
15b1687c | 2606 | IWL_ERR(priv, "File size way too small!\n"); |
90e759d1 | 2607 | ret = -EINVAL; |
b481de9c ZY |
2608 | goto err_release; |
2609 | } | |
2610 | ||
2611 | /* Data from ucode file: header followed by uCode images */ | |
2612 | ucode = (void *)ucode_raw->data; | |
2613 | ||
c02b3acd | 2614 | priv->ucode_ver = le32_to_cpu(ucode->ver); |
a0987a8d | 2615 | api_ver = IWL_UCODE_API(priv->ucode_ver); |
b481de9c ZY |
2616 | inst_size = le32_to_cpu(ucode->inst_size); |
2617 | data_size = le32_to_cpu(ucode->data_size); | |
2618 | init_size = le32_to_cpu(ucode->init_size); | |
2619 | init_data_size = le32_to_cpu(ucode->init_data_size); | |
2620 | boot_size = le32_to_cpu(ucode->boot_size); | |
2621 | ||
a0987a8d RC |
2622 | /* api_ver should match the api version forming part of the |
2623 | * firmware filename ... but we don't check for that and only rely | |
877d0310 | 2624 | * on the API version read from firmware header from here on forward */ |
a0987a8d RC |
2625 | |
2626 | if (api_ver < api_min || api_ver > api_max) { | |
15b1687c | 2627 | IWL_ERR(priv, "Driver unable to support your firmware API. " |
a0987a8d RC |
2628 | "Driver supports v%u, firmware is v%u.\n", |
2629 | api_max, api_ver); | |
2630 | priv->ucode_ver = 0; | |
2631 | ret = -EINVAL; | |
2632 | goto err_release; | |
2633 | } | |
2634 | if (api_ver != api_max) | |
15b1687c | 2635 | IWL_ERR(priv, "Firmware has old API version. Expected %u, " |
a0987a8d RC |
2636 | "got %u. New firmware can be obtained " |
2637 | "from http://www.intellinuxwireless.org.\n", | |
2638 | api_max, api_ver); | |
2639 | ||
978785a3 TW |
2640 | IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n", |
2641 | IWL_UCODE_MAJOR(priv->ucode_ver), | |
2642 | IWL_UCODE_MINOR(priv->ucode_ver), | |
2643 | IWL_UCODE_API(priv->ucode_ver), | |
2644 | IWL_UCODE_SERIAL(priv->ucode_ver)); | |
2645 | ||
e1623446 | 2646 | IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n", |
a0987a8d | 2647 | priv->ucode_ver); |
e1623446 TW |
2648 | IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n", |
2649 | inst_size); | |
2650 | IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n", | |
2651 | data_size); | |
2652 | IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n", | |
2653 | init_size); | |
2654 | IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n", | |
2655 | init_data_size); | |
2656 | IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n", | |
2657 | boot_size); | |
b481de9c | 2658 | |
a0987a8d | 2659 | |
b481de9c ZY |
2660 | /* Verify size of file vs. image size info in file's header */ |
2661 | if (ucode_raw->size < sizeof(*ucode) + | |
2662 | inst_size + data_size + init_size + | |
2663 | init_data_size + boot_size) { | |
2664 | ||
e1623446 TW |
2665 | IWL_DEBUG_INFO(priv, "uCode file size %zd too small\n", |
2666 | ucode_raw->size); | |
90e759d1 | 2667 | ret = -EINVAL; |
b481de9c ZY |
2668 | goto err_release; |
2669 | } | |
2670 | ||
2671 | /* Verify that uCode images will fit in card's SRAM */ | |
250bdd21 | 2672 | if (inst_size > IWL39_MAX_INST_SIZE) { |
e1623446 | 2673 | IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n", |
90e759d1 TW |
2674 | inst_size); |
2675 | ret = -EINVAL; | |
b481de9c ZY |
2676 | goto err_release; |
2677 | } | |
2678 | ||
250bdd21 | 2679 | if (data_size > IWL39_MAX_DATA_SIZE) { |
e1623446 | 2680 | IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n", |
90e759d1 TW |
2681 | data_size); |
2682 | ret = -EINVAL; | |
b481de9c ZY |
2683 | goto err_release; |
2684 | } | |
250bdd21 | 2685 | if (init_size > IWL39_MAX_INST_SIZE) { |
e1623446 TW |
2686 | IWL_DEBUG_INFO(priv, |
2687 | "uCode init instr len %d too large to fit in\n", | |
90e759d1 TW |
2688 | init_size); |
2689 | ret = -EINVAL; | |
b481de9c ZY |
2690 | goto err_release; |
2691 | } | |
250bdd21 | 2692 | if (init_data_size > IWL39_MAX_DATA_SIZE) { |
e1623446 TW |
2693 | IWL_DEBUG_INFO(priv, |
2694 | "uCode init data len %d too large to fit in\n", | |
90e759d1 TW |
2695 | init_data_size); |
2696 | ret = -EINVAL; | |
b481de9c ZY |
2697 | goto err_release; |
2698 | } | |
250bdd21 | 2699 | if (boot_size > IWL39_MAX_BSM_SIZE) { |
e1623446 TW |
2700 | IWL_DEBUG_INFO(priv, |
2701 | "uCode boot instr len %d too large to fit in\n", | |
90e759d1 TW |
2702 | boot_size); |
2703 | ret = -EINVAL; | |
b481de9c ZY |
2704 | goto err_release; |
2705 | } | |
2706 | ||
2707 | /* Allocate ucode buffers for card's bus-master loading ... */ | |
2708 | ||
2709 | /* Runtime instructions and 2 copies of data: | |
2710 | * 1) unmodified from disk | |
2711 | * 2) backup cache for save/restore during power-downs */ | |
2712 | priv->ucode_code.len = inst_size; | |
98c92211 | 2713 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code); |
b481de9c ZY |
2714 | |
2715 | priv->ucode_data.len = data_size; | |
98c92211 | 2716 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data); |
b481de9c ZY |
2717 | |
2718 | priv->ucode_data_backup.len = data_size; | |
98c92211 | 2719 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup); |
b481de9c | 2720 | |
90e759d1 TW |
2721 | if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr || |
2722 | !priv->ucode_data_backup.v_addr) | |
2723 | goto err_pci_alloc; | |
b481de9c ZY |
2724 | |
2725 | /* Initialization instructions and data */ | |
90e759d1 TW |
2726 | if (init_size && init_data_size) { |
2727 | priv->ucode_init.len = init_size; | |
98c92211 | 2728 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init); |
90e759d1 TW |
2729 | |
2730 | priv->ucode_init_data.len = init_data_size; | |
98c92211 | 2731 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data); |
90e759d1 TW |
2732 | |
2733 | if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr) | |
2734 | goto err_pci_alloc; | |
2735 | } | |
b481de9c ZY |
2736 | |
2737 | /* Bootstrap (instructions only, no data) */ | |
90e759d1 TW |
2738 | if (boot_size) { |
2739 | priv->ucode_boot.len = boot_size; | |
98c92211 | 2740 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot); |
b481de9c | 2741 | |
90e759d1 TW |
2742 | if (!priv->ucode_boot.v_addr) |
2743 | goto err_pci_alloc; | |
2744 | } | |
b481de9c ZY |
2745 | |
2746 | /* Copy images into buffers for card's bus-master reads ... */ | |
2747 | ||
2748 | /* Runtime instructions (first block of data in file) */ | |
2749 | src = &ucode->data[0]; | |
2750 | len = priv->ucode_code.len; | |
e1623446 TW |
2751 | IWL_DEBUG_INFO(priv, |
2752 | "Copying (but not loading) uCode instr len %zd\n", len); | |
b481de9c | 2753 | memcpy(priv->ucode_code.v_addr, src, len); |
e1623446 | 2754 | IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n", |
b481de9c ZY |
2755 | priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr); |
2756 | ||
2757 | /* Runtime data (2nd block) | |
bb8c093b | 2758 | * NOTE: Copy into backup buffer will be done in iwl3945_up() */ |
b481de9c ZY |
2759 | src = &ucode->data[inst_size]; |
2760 | len = priv->ucode_data.len; | |
e1623446 TW |
2761 | IWL_DEBUG_INFO(priv, |
2762 | "Copying (but not loading) uCode data len %zd\n", len); | |
b481de9c ZY |
2763 | memcpy(priv->ucode_data.v_addr, src, len); |
2764 | memcpy(priv->ucode_data_backup.v_addr, src, len); | |
2765 | ||
2766 | /* Initialization instructions (3rd block) */ | |
2767 | if (init_size) { | |
2768 | src = &ucode->data[inst_size + data_size]; | |
2769 | len = priv->ucode_init.len; | |
e1623446 TW |
2770 | IWL_DEBUG_INFO(priv, |
2771 | "Copying (but not loading) init instr len %zd\n", len); | |
b481de9c ZY |
2772 | memcpy(priv->ucode_init.v_addr, src, len); |
2773 | } | |
2774 | ||
2775 | /* Initialization data (4th block) */ | |
2776 | if (init_data_size) { | |
2777 | src = &ucode->data[inst_size + data_size + init_size]; | |
2778 | len = priv->ucode_init_data.len; | |
e1623446 TW |
2779 | IWL_DEBUG_INFO(priv, |
2780 | "Copying (but not loading) init data len %zd\n", len); | |
b481de9c ZY |
2781 | memcpy(priv->ucode_init_data.v_addr, src, len); |
2782 | } | |
2783 | ||
2784 | /* Bootstrap instructions (5th block) */ | |
2785 | src = &ucode->data[inst_size + data_size + init_size + init_data_size]; | |
2786 | len = priv->ucode_boot.len; | |
e1623446 TW |
2787 | IWL_DEBUG_INFO(priv, |
2788 | "Copying (but not loading) boot instr len %zd\n", len); | |
b481de9c ZY |
2789 | memcpy(priv->ucode_boot.v_addr, src, len); |
2790 | ||
2791 | /* We have our copies now, allow OS release its copies */ | |
2792 | release_firmware(ucode_raw); | |
2793 | return 0; | |
2794 | ||
2795 | err_pci_alloc: | |
15b1687c | 2796 | IWL_ERR(priv, "failed to allocate pci memory\n"); |
90e759d1 | 2797 | ret = -ENOMEM; |
bb8c093b | 2798 | iwl3945_dealloc_ucode_pci(priv); |
b481de9c ZY |
2799 | |
2800 | err_release: | |
2801 | release_firmware(ucode_raw); | |
2802 | ||
2803 | error: | |
90e759d1 | 2804 | return ret; |
b481de9c ZY |
2805 | } |
2806 | ||
2807 | ||
2808 | /** | |
bb8c093b | 2809 | * iwl3945_set_ucode_ptrs - Set uCode address location |
b481de9c ZY |
2810 | * |
2811 | * Tell initialization uCode where to find runtime uCode. | |
2812 | * | |
2813 | * BSM registers initially contain pointers to initialization uCode. | |
2814 | * We need to replace them to load runtime uCode inst and data, | |
2815 | * and to save runtime data when powering down. | |
2816 | */ | |
4a8a4322 | 2817 | static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv) |
b481de9c ZY |
2818 | { |
2819 | dma_addr_t pinst; | |
2820 | dma_addr_t pdata; | |
2821 | int rc = 0; | |
2822 | unsigned long flags; | |
2823 | ||
2824 | /* bits 31:0 for 3945 */ | |
2825 | pinst = priv->ucode_code.p_addr; | |
2826 | pdata = priv->ucode_data_backup.p_addr; | |
2827 | ||
2828 | spin_lock_irqsave(&priv->lock, flags); | |
5d49f498 | 2829 | rc = iwl_grab_nic_access(priv); |
b481de9c ZY |
2830 | if (rc) { |
2831 | spin_unlock_irqrestore(&priv->lock, flags); | |
2832 | return rc; | |
2833 | } | |
2834 | ||
2835 | /* Tell bootstrap uCode where to find image to load */ | |
5d49f498 AK |
2836 | iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst); |
2837 | iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata); | |
2838 | iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, | |
b481de9c ZY |
2839 | priv->ucode_data.len); |
2840 | ||
a96a27f9 | 2841 | /* Inst byte count must be last to set up, bit 31 signals uCode |
b481de9c | 2842 | * that all new ptr/size info is in place */ |
5d49f498 | 2843 | iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, |
b481de9c ZY |
2844 | priv->ucode_code.len | BSM_DRAM_INST_LOAD); |
2845 | ||
5d49f498 | 2846 | iwl_release_nic_access(priv); |
b481de9c ZY |
2847 | |
2848 | spin_unlock_irqrestore(&priv->lock, flags); | |
2849 | ||
e1623446 | 2850 | IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n"); |
b481de9c ZY |
2851 | |
2852 | return rc; | |
2853 | } | |
2854 | ||
2855 | /** | |
bb8c093b | 2856 | * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received |
b481de9c ZY |
2857 | * |
2858 | * Called after REPLY_ALIVE notification received from "initialize" uCode. | |
2859 | * | |
b481de9c | 2860 | * Tell "initialize" uCode to go ahead and load the runtime uCode. |
9fbab516 | 2861 | */ |
4a8a4322 | 2862 | static void iwl3945_init_alive_start(struct iwl_priv *priv) |
b481de9c ZY |
2863 | { |
2864 | /* Check alive response for "valid" sign from uCode */ | |
2865 | if (priv->card_alive_init.is_valid != UCODE_VALID_OK) { | |
2866 | /* We had an error bringing up the hardware, so take it | |
2867 | * all the way back down so we can try again */ | |
e1623446 | 2868 | IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n"); |
b481de9c ZY |
2869 | goto restart; |
2870 | } | |
2871 | ||
2872 | /* Bootstrap uCode has loaded initialize uCode ... verify inst image. | |
2873 | * This is a paranoid check, because we would not have gotten the | |
2874 | * "initialize" alive if code weren't properly loaded. */ | |
bb8c093b | 2875 | if (iwl3945_verify_ucode(priv)) { |
b481de9c ZY |
2876 | /* Runtime instruction load was bad; |
2877 | * take it all the way back down so we can try again */ | |
e1623446 | 2878 | IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n"); |
b481de9c ZY |
2879 | goto restart; |
2880 | } | |
2881 | ||
2882 | /* Send pointers to protocol/runtime uCode image ... init code will | |
2883 | * load and launch runtime uCode, which will send us another "Alive" | |
2884 | * notification. */ | |
e1623446 | 2885 | IWL_DEBUG_INFO(priv, "Initialization Alive received.\n"); |
bb8c093b | 2886 | if (iwl3945_set_ucode_ptrs(priv)) { |
b481de9c ZY |
2887 | /* Runtime instruction load won't happen; |
2888 | * take it all the way back down so we can try again */ | |
e1623446 | 2889 | IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n"); |
b481de9c ZY |
2890 | goto restart; |
2891 | } | |
2892 | return; | |
2893 | ||
2894 | restart: | |
2895 | queue_work(priv->workqueue, &priv->restart); | |
2896 | } | |
2897 | ||
2898 | ||
9bdf5eca MA |
2899 | /* temporary */ |
2900 | static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, | |
2901 | struct sk_buff *skb); | |
2902 | ||
b481de9c | 2903 | /** |
bb8c093b | 2904 | * iwl3945_alive_start - called after REPLY_ALIVE notification received |
b481de9c | 2905 | * from protocol/runtime uCode (initialization uCode's |
bb8c093b | 2906 | * Alive gets handled by iwl3945_init_alive_start()). |
b481de9c | 2907 | */ |
4a8a4322 | 2908 | static void iwl3945_alive_start(struct iwl_priv *priv) |
b481de9c ZY |
2909 | { |
2910 | int rc = 0; | |
2911 | int thermal_spin = 0; | |
2912 | u32 rfkill; | |
2913 | ||
e1623446 | 2914 | IWL_DEBUG_INFO(priv, "Runtime Alive received.\n"); |
b481de9c ZY |
2915 | |
2916 | if (priv->card_alive.is_valid != UCODE_VALID_OK) { | |
2917 | /* We had an error bringing up the hardware, so take it | |
2918 | * all the way back down so we can try again */ | |
e1623446 | 2919 | IWL_DEBUG_INFO(priv, "Alive failed.\n"); |
b481de9c ZY |
2920 | goto restart; |
2921 | } | |
2922 | ||
2923 | /* Initialize uCode has loaded Runtime uCode ... verify inst image. | |
2924 | * This is a paranoid check, because we would not have gotten the | |
2925 | * "runtime" alive if code weren't properly loaded. */ | |
bb8c093b | 2926 | if (iwl3945_verify_ucode(priv)) { |
b481de9c ZY |
2927 | /* Runtime instruction load was bad; |
2928 | * take it all the way back down so we can try again */ | |
e1623446 | 2929 | IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n"); |
b481de9c ZY |
2930 | goto restart; |
2931 | } | |
2932 | ||
bb8c093b | 2933 | iwl3945_clear_stations_table(priv); |
b481de9c | 2934 | |
5d49f498 | 2935 | rc = iwl_grab_nic_access(priv); |
b481de9c | 2936 | if (rc) { |
39aadf8c | 2937 | IWL_WARN(priv, "Can not read RFKILL status from adapter\n"); |
b481de9c ZY |
2938 | return; |
2939 | } | |
2940 | ||
5d49f498 | 2941 | rfkill = iwl_read_prph(priv, APMG_RFKILL_REG); |
e1623446 | 2942 | IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill); |
5d49f498 | 2943 | iwl_release_nic_access(priv); |
b481de9c ZY |
2944 | |
2945 | if (rfkill & 0x1) { | |
2946 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | |
a96a27f9 | 2947 | /* if RFKILL is not on, then wait for thermal |
b481de9c | 2948 | * sensor in adapter to kick in */ |
bb8c093b | 2949 | while (iwl3945_hw_get_temperature(priv) == 0) { |
b481de9c ZY |
2950 | thermal_spin++; |
2951 | udelay(10); | |
2952 | } | |
2953 | ||
2954 | if (thermal_spin) | |
e1623446 | 2955 | IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n", |
b481de9c ZY |
2956 | thermal_spin * 10); |
2957 | } else | |
2958 | set_bit(STATUS_RF_KILL_HW, &priv->status); | |
2959 | ||
9fbab516 | 2960 | /* After the ALIVE response, we can send commands to 3945 uCode */ |
b481de9c ZY |
2961 | set_bit(STATUS_ALIVE, &priv->status); |
2962 | ||
2963 | /* Clear out the uCode error bit if it is set */ | |
2964 | clear_bit(STATUS_FW_ERROR, &priv->status); | |
2965 | ||
775a6e27 | 2966 | if (iwl_is_rfkill(priv)) |
b481de9c ZY |
2967 | return; |
2968 | ||
36d6825b | 2969 | ieee80211_wake_queues(priv->hw); |
b481de9c ZY |
2970 | |
2971 | priv->active_rate = priv->rates_mask; | |
2972 | priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK; | |
2973 | ||
d25aabb0 | 2974 | iwl_power_update_mode(priv, false); |
b481de9c | 2975 | |
8ccde88a | 2976 | if (iwl_is_associated(priv)) { |
bb8c093b | 2977 | struct iwl3945_rxon_cmd *active_rxon = |
8ccde88a | 2978 | (struct iwl3945_rxon_cmd *)(&priv->active_rxon); |
b481de9c | 2979 | |
8ccde88a SO |
2980 | memcpy(&priv->staging_rxon, &priv->active_rxon, |
2981 | sizeof(priv->staging_rxon)); | |
b481de9c ZY |
2982 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
2983 | } else { | |
2984 | /* Initialize our rx_config data */ | |
8ccde88a | 2985 | iwl_connection_init_rx_config(priv, priv->iw_mode); |
b481de9c ZY |
2986 | } |
2987 | ||
9fbab516 | 2988 | /* Configure Bluetooth device coexistence support */ |
17f841cd | 2989 | iwl_send_bt_config(priv); |
b481de9c ZY |
2990 | |
2991 | /* Configure the adapter for unassociated operation */ | |
bb8c093b | 2992 | iwl3945_commit_rxon(priv); |
b481de9c | 2993 | |
b481de9c ZY |
2994 | iwl3945_reg_txpower_periodic(priv); |
2995 | ||
fe00b5a5 RC |
2996 | iwl3945_led_register(priv); |
2997 | ||
e1623446 | 2998 | IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n"); |
a9f46786 | 2999 | set_bit(STATUS_READY, &priv->status); |
5a66926a | 3000 | wake_up_interruptible(&priv->wait_command_queue); |
b481de9c ZY |
3001 | |
3002 | if (priv->error_recovering) | |
bb8c093b | 3003 | iwl3945_error_recovery(priv); |
b481de9c | 3004 | |
9bdf5eca MA |
3005 | /* reassociate for ADHOC mode */ |
3006 | if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) { | |
3007 | struct sk_buff *beacon = ieee80211_beacon_get(priv->hw, | |
3008 | priv->vif); | |
3009 | if (beacon) | |
3010 | iwl3945_mac_beacon_update(priv->hw, beacon); | |
3011 | } | |
3012 | ||
b481de9c ZY |
3013 | return; |
3014 | ||
3015 | restart: | |
3016 | queue_work(priv->workqueue, &priv->restart); | |
3017 | } | |
3018 | ||
4a8a4322 | 3019 | static void iwl3945_cancel_deferred_work(struct iwl_priv *priv); |
b481de9c | 3020 | |
4a8a4322 | 3021 | static void __iwl3945_down(struct iwl_priv *priv) |
b481de9c ZY |
3022 | { |
3023 | unsigned long flags; | |
3024 | int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status); | |
3025 | struct ieee80211_conf *conf = NULL; | |
3026 | ||
e1623446 | 3027 | IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n"); |
b481de9c ZY |
3028 | |
3029 | conf = ieee80211_get_hw_conf(priv->hw); | |
3030 | ||
3031 | if (!exit_pending) | |
3032 | set_bit(STATUS_EXIT_PENDING, &priv->status); | |
3033 | ||
ab53d8af | 3034 | iwl3945_led_unregister(priv); |
bb8c093b | 3035 | iwl3945_clear_stations_table(priv); |
b481de9c ZY |
3036 | |
3037 | /* Unblock any waiting calls */ | |
3038 | wake_up_interruptible_all(&priv->wait_command_queue); | |
3039 | ||
b481de9c ZY |
3040 | /* Wipe out the EXIT_PENDING status bit if we are not actually |
3041 | * exiting the module */ | |
3042 | if (!exit_pending) | |
3043 | clear_bit(STATUS_EXIT_PENDING, &priv->status); | |
3044 | ||
3045 | /* stop and reset the on-board processor */ | |
5d49f498 | 3046 | iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); |
b481de9c ZY |
3047 | |
3048 | /* tell the device to stop sending interrupts */ | |
0359facc | 3049 | spin_lock_irqsave(&priv->lock, flags); |
ed3b932e | 3050 | iwl_disable_interrupts(priv); |
0359facc MA |
3051 | spin_unlock_irqrestore(&priv->lock, flags); |
3052 | iwl_synchronize_irq(priv); | |
b481de9c ZY |
3053 | |
3054 | if (priv->mac80211_registered) | |
3055 | ieee80211_stop_queues(priv->hw); | |
3056 | ||
bb8c093b | 3057 | /* If we have not previously called iwl3945_init() then |
b481de9c | 3058 | * clear all bits but the RF Kill and SUSPEND bits and return */ |
775a6e27 | 3059 | if (!iwl_is_init(priv)) { |
b481de9c ZY |
3060 | priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) << |
3061 | STATUS_RF_KILL_HW | | |
3062 | test_bit(STATUS_RF_KILL_SW, &priv->status) << | |
3063 | STATUS_RF_KILL_SW | | |
9788864e RC |
3064 | test_bit(STATUS_GEO_CONFIGURED, &priv->status) << |
3065 | STATUS_GEO_CONFIGURED | | |
b481de9c | 3066 | test_bit(STATUS_IN_SUSPEND, &priv->status) << |
ebef2008 AK |
3067 | STATUS_IN_SUSPEND | |
3068 | test_bit(STATUS_EXIT_PENDING, &priv->status) << | |
3069 | STATUS_EXIT_PENDING; | |
b481de9c ZY |
3070 | goto exit; |
3071 | } | |
3072 | ||
3073 | /* ...otherwise clear out all the status bits but the RF Kill and | |
3074 | * SUSPEND bits and continue taking the NIC down. */ | |
3075 | priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) << | |
3076 | STATUS_RF_KILL_HW | | |
3077 | test_bit(STATUS_RF_KILL_SW, &priv->status) << | |
3078 | STATUS_RF_KILL_SW | | |
9788864e RC |
3079 | test_bit(STATUS_GEO_CONFIGURED, &priv->status) << |
3080 | STATUS_GEO_CONFIGURED | | |
b481de9c ZY |
3081 | test_bit(STATUS_IN_SUSPEND, &priv->status) << |
3082 | STATUS_IN_SUSPEND | | |
3083 | test_bit(STATUS_FW_ERROR, &priv->status) << | |
ebef2008 AK |
3084 | STATUS_FW_ERROR | |
3085 | test_bit(STATUS_EXIT_PENDING, &priv->status) << | |
3086 | STATUS_EXIT_PENDING; | |
b481de9c | 3087 | |
e9414b6b | 3088 | priv->cfg->ops->lib->apm_ops.reset(priv); |
b481de9c | 3089 | spin_lock_irqsave(&priv->lock, flags); |
5d49f498 | 3090 | iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); |
b481de9c ZY |
3091 | spin_unlock_irqrestore(&priv->lock, flags); |
3092 | ||
bb8c093b CH |
3093 | iwl3945_hw_txq_ctx_stop(priv); |
3094 | iwl3945_hw_rxq_stop(priv); | |
b481de9c ZY |
3095 | |
3096 | spin_lock_irqsave(&priv->lock, flags); | |
5d49f498 AK |
3097 | if (!iwl_grab_nic_access(priv)) { |
3098 | iwl_write_prph(priv, APMG_CLK_DIS_REG, | |
b481de9c | 3099 | APMG_CLK_VAL_DMA_CLK_RQT); |
5d49f498 | 3100 | iwl_release_nic_access(priv); |
b481de9c ZY |
3101 | } |
3102 | spin_unlock_irqrestore(&priv->lock, flags); | |
3103 | ||
3104 | udelay(5); | |
3105 | ||
e9414b6b AM |
3106 | if (exit_pending || test_bit(STATUS_IN_SUSPEND, &priv->status)) |
3107 | priv->cfg->ops->lib->apm_ops.stop(priv); | |
3108 | else | |
3109 | priv->cfg->ops->lib->apm_ops.reset(priv); | |
3110 | ||
b481de9c | 3111 | exit: |
3d24a9f7 | 3112 | memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp)); |
b481de9c ZY |
3113 | |
3114 | if (priv->ibss_beacon) | |
3115 | dev_kfree_skb(priv->ibss_beacon); | |
3116 | priv->ibss_beacon = NULL; | |
3117 | ||
3118 | /* clear out any free frames */ | |
bb8c093b | 3119 | iwl3945_clear_free_frames(priv); |
b481de9c ZY |
3120 | } |
3121 | ||
4a8a4322 | 3122 | static void iwl3945_down(struct iwl_priv *priv) |
b481de9c ZY |
3123 | { |
3124 | mutex_lock(&priv->mutex); | |
bb8c093b | 3125 | __iwl3945_down(priv); |
b481de9c | 3126 | mutex_unlock(&priv->mutex); |
b24d22b1 | 3127 | |
bb8c093b | 3128 | iwl3945_cancel_deferred_work(priv); |
b481de9c ZY |
3129 | } |
3130 | ||
3131 | #define MAX_HW_RESTARTS 5 | |
3132 | ||
4a8a4322 | 3133 | static int __iwl3945_up(struct iwl_priv *priv) |
b481de9c ZY |
3134 | { |
3135 | int rc, i; | |
3136 | ||
3137 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) { | |
39aadf8c | 3138 | IWL_WARN(priv, "Exit pending; will not bring the NIC up\n"); |
b481de9c ZY |
3139 | return -EIO; |
3140 | } | |
3141 | ||
3142 | if (test_bit(STATUS_RF_KILL_SW, &priv->status)) { | |
39aadf8c | 3143 | IWL_WARN(priv, "Radio disabled by SW RF kill (module " |
b481de9c | 3144 | "parameter)\n"); |
e655b9f0 ZY |
3145 | return -ENODEV; |
3146 | } | |
3147 | ||
e903fbd4 | 3148 | if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) { |
15b1687c | 3149 | IWL_ERR(priv, "ucode not available for device bring up\n"); |
e903fbd4 RC |
3150 | return -EIO; |
3151 | } | |
3152 | ||
e655b9f0 | 3153 | /* If platform's RF_KILL switch is NOT set to KILL */ |
5d49f498 | 3154 | if (iwl_read32(priv, CSR_GP_CNTRL) & |
e655b9f0 ZY |
3155 | CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) |
3156 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | |
3157 | else { | |
3158 | set_bit(STATUS_RF_KILL_HW, &priv->status); | |
3159 | if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) { | |
39aadf8c | 3160 | IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n"); |
e655b9f0 ZY |
3161 | return -ENODEV; |
3162 | } | |
b481de9c | 3163 | } |
80fcc9e2 | 3164 | |
5d49f498 | 3165 | iwl_write32(priv, CSR_INT, 0xFFFFFFFF); |
b481de9c | 3166 | |
bb8c093b | 3167 | rc = iwl3945_hw_nic_init(priv); |
b481de9c | 3168 | if (rc) { |
15b1687c | 3169 | IWL_ERR(priv, "Unable to int nic\n"); |
b481de9c ZY |
3170 | return rc; |
3171 | } | |
3172 | ||
3173 | /* make sure rfkill handshake bits are cleared */ | |
5d49f498 AK |
3174 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
3175 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, | |
b481de9c ZY |
3176 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
3177 | ||
3178 | /* clear (again), then enable host interrupts */ | |
5d49f498 | 3179 | iwl_write32(priv, CSR_INT, 0xFFFFFFFF); |
ed3b932e | 3180 | iwl_enable_interrupts(priv); |
b481de9c ZY |
3181 | |
3182 | /* really make sure rfkill handshake bits are cleared */ | |
5d49f498 AK |
3183 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
3184 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); | |
b481de9c ZY |
3185 | |
3186 | /* Copy original ucode data image from disk into backup cache. | |
3187 | * This will be used to initialize the on-board processor's | |
3188 | * data SRAM for a clean start when the runtime program first loads. */ | |
3189 | memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr, | |
5a66926a | 3190 | priv->ucode_data.len); |
b481de9c | 3191 | |
e655b9f0 ZY |
3192 | /* We return success when we resume from suspend and rf_kill is on. */ |
3193 | if (test_bit(STATUS_RF_KILL_HW, &priv->status)) | |
3194 | return 0; | |
3195 | ||
b481de9c ZY |
3196 | for (i = 0; i < MAX_HW_RESTARTS; i++) { |
3197 | ||
bb8c093b | 3198 | iwl3945_clear_stations_table(priv); |
b481de9c ZY |
3199 | |
3200 | /* load bootstrap state machine, | |
3201 | * load bootstrap program into processor's memory, | |
3202 | * prepare to load the "initialize" uCode */ | |
0164b9b4 | 3203 | priv->cfg->ops->lib->load_ucode(priv); |
b481de9c ZY |
3204 | |
3205 | if (rc) { | |
15b1687c WT |
3206 | IWL_ERR(priv, |
3207 | "Unable to set up bootstrap uCode: %d\n", rc); | |
b481de9c ZY |
3208 | continue; |
3209 | } | |
3210 | ||
3211 | /* start card; "initialize" will load runtime ucode */ | |
bb8c093b | 3212 | iwl3945_nic_start(priv); |
b481de9c | 3213 | |
e1623446 | 3214 | IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n"); |
b481de9c ZY |
3215 | |
3216 | return 0; | |
3217 | } | |
3218 | ||
3219 | set_bit(STATUS_EXIT_PENDING, &priv->status); | |
bb8c093b | 3220 | __iwl3945_down(priv); |
ebef2008 | 3221 | clear_bit(STATUS_EXIT_PENDING, &priv->status); |
b481de9c ZY |
3222 | |
3223 | /* tried to restart and config the device for as long as our | |
3224 | * patience could withstand */ | |
15b1687c | 3225 | IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i); |
b481de9c ZY |
3226 | return -EIO; |
3227 | } | |
3228 | ||
3229 | ||
3230 | /***************************************************************************** | |
3231 | * | |
3232 | * Workqueue callbacks | |
3233 | * | |
3234 | *****************************************************************************/ | |
3235 | ||
bb8c093b | 3236 | static void iwl3945_bg_init_alive_start(struct work_struct *data) |
b481de9c | 3237 | { |
4a8a4322 AK |
3238 | struct iwl_priv *priv = |
3239 | container_of(data, struct iwl_priv, init_alive_start.work); | |
b481de9c ZY |
3240 | |
3241 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
3242 | return; | |
3243 | ||
3244 | mutex_lock(&priv->mutex); | |
bb8c093b | 3245 | iwl3945_init_alive_start(priv); |
b481de9c ZY |
3246 | mutex_unlock(&priv->mutex); |
3247 | } | |
3248 | ||
bb8c093b | 3249 | static void iwl3945_bg_alive_start(struct work_struct *data) |
b481de9c | 3250 | { |
4a8a4322 AK |
3251 | struct iwl_priv *priv = |
3252 | container_of(data, struct iwl_priv, alive_start.work); | |
b481de9c ZY |
3253 | |
3254 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
3255 | return; | |
3256 | ||
3257 | mutex_lock(&priv->mutex); | |
bb8c093b | 3258 | iwl3945_alive_start(priv); |
b481de9c ZY |
3259 | mutex_unlock(&priv->mutex); |
3260 | } | |
3261 | ||
2663516d HS |
3262 | static void iwl3945_rfkill_poll(struct work_struct *data) |
3263 | { | |
3264 | struct iwl_priv *priv = | |
3265 | container_of(data, struct iwl_priv, rfkill_poll.work); | |
3266 | unsigned long status = priv->status; | |
3267 | ||
3268 | if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) | |
3269 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | |
3270 | else | |
3271 | set_bit(STATUS_RF_KILL_HW, &priv->status); | |
3272 | ||
3273 | if (test_bit(STATUS_RF_KILL_HW, &status) != test_bit(STATUS_RF_KILL_HW, &priv->status)) | |
3274 | queue_work(priv->workqueue, &priv->rf_kill); | |
3275 | ||
3276 | queue_delayed_work(priv->workqueue, &priv->rfkill_poll, | |
3277 | round_jiffies_relative(2 * HZ)); | |
3278 | ||
3279 | } | |
3280 | ||
b481de9c | 3281 | #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ) |
bb8c093b | 3282 | static void iwl3945_bg_request_scan(struct work_struct *data) |
b481de9c | 3283 | { |
4a8a4322 AK |
3284 | struct iwl_priv *priv = |
3285 | container_of(data, struct iwl_priv, request_scan); | |
c2d79b48 | 3286 | struct iwl_host_cmd cmd = { |
b481de9c | 3287 | .id = REPLY_SCAN_CMD, |
bb8c093b | 3288 | .len = sizeof(struct iwl3945_scan_cmd), |
b481de9c ZY |
3289 | .meta.flags = CMD_SIZE_HUGE, |
3290 | }; | |
3291 | int rc = 0; | |
bb8c093b | 3292 | struct iwl3945_scan_cmd *scan; |
b481de9c | 3293 | struct ieee80211_conf *conf = NULL; |
f9340520 | 3294 | u8 n_probes = 2; |
8318d78a | 3295 | enum ieee80211_band band; |
9387b7ca | 3296 | DECLARE_SSID_BUF(ssid); |
b481de9c ZY |
3297 | |
3298 | conf = ieee80211_get_hw_conf(priv->hw); | |
3299 | ||
3300 | mutex_lock(&priv->mutex); | |
3301 | ||
775a6e27 | 3302 | if (!iwl_is_ready(priv)) { |
39aadf8c | 3303 | IWL_WARN(priv, "request scan called when driver not ready.\n"); |
b481de9c ZY |
3304 | goto done; |
3305 | } | |
3306 | ||
a96a27f9 | 3307 | /* Make sure the scan wasn't canceled before this queued work |
b481de9c ZY |
3308 | * was given the chance to run... */ |
3309 | if (!test_bit(STATUS_SCANNING, &priv->status)) | |
3310 | goto done; | |
3311 | ||
3312 | /* This should never be called or scheduled if there is currently | |
3313 | * a scan active in the hardware. */ | |
3314 | if (test_bit(STATUS_SCAN_HW, &priv->status)) { | |
e1623446 TW |
3315 | IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests " |
3316 | "Ignoring second request.\n"); | |
b481de9c ZY |
3317 | rc = -EIO; |
3318 | goto done; | |
3319 | } | |
3320 | ||
3321 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) { | |
e1623446 | 3322 | IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n"); |
b481de9c ZY |
3323 | goto done; |
3324 | } | |
3325 | ||
3326 | if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) { | |
e1623446 TW |
3327 | IWL_DEBUG_HC(priv, |
3328 | "Scan request while abort pending. Queuing.\n"); | |
b481de9c ZY |
3329 | goto done; |
3330 | } | |
3331 | ||
775a6e27 | 3332 | if (iwl_is_rfkill(priv)) { |
e1623446 | 3333 | IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n"); |
b481de9c ZY |
3334 | goto done; |
3335 | } | |
3336 | ||
3337 | if (!test_bit(STATUS_READY, &priv->status)) { | |
e1623446 TW |
3338 | IWL_DEBUG_HC(priv, |
3339 | "Scan request while uninitialized. Queuing.\n"); | |
b481de9c ZY |
3340 | goto done; |
3341 | } | |
3342 | ||
3343 | if (!priv->scan_bands) { | |
e1623446 | 3344 | IWL_DEBUG_HC(priv, "Aborting scan due to no requested bands\n"); |
b481de9c ZY |
3345 | goto done; |
3346 | } | |
3347 | ||
805cee5b WT |
3348 | if (!priv->scan) { |
3349 | priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) + | |
b481de9c | 3350 | IWL_MAX_SCAN_SIZE, GFP_KERNEL); |
805cee5b | 3351 | if (!priv->scan) { |
b481de9c ZY |
3352 | rc = -ENOMEM; |
3353 | goto done; | |
3354 | } | |
3355 | } | |
805cee5b | 3356 | scan = priv->scan; |
bb8c093b | 3357 | memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE); |
b481de9c ZY |
3358 | |
3359 | scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH; | |
3360 | scan->quiet_time = IWL_ACTIVE_QUIET_TIME; | |
3361 | ||
8ccde88a | 3362 | if (iwl_is_associated(priv)) { |
b481de9c ZY |
3363 | u16 interval = 0; |
3364 | u32 extra; | |
3365 | u32 suspend_time = 100; | |
3366 | u32 scan_suspend_time = 100; | |
3367 | unsigned long flags; | |
3368 | ||
e1623446 | 3369 | IWL_DEBUG_INFO(priv, "Scanning while associated...\n"); |
b481de9c ZY |
3370 | |
3371 | spin_lock_irqsave(&priv->lock, flags); | |
3372 | interval = priv->beacon_int; | |
3373 | spin_unlock_irqrestore(&priv->lock, flags); | |
3374 | ||
3375 | scan->suspend_time = 0; | |
15e869d8 | 3376 | scan->max_out_time = cpu_to_le32(200 * 1024); |
b481de9c ZY |
3377 | if (!interval) |
3378 | interval = suspend_time; | |
3379 | /* | |
3380 | * suspend time format: | |
3381 | * 0-19: beacon interval in usec (time before exec.) | |
3382 | * 20-23: 0 | |
3383 | * 24-31: number of beacons (suspend between channels) | |
3384 | */ | |
3385 | ||
3386 | extra = (suspend_time / interval) << 24; | |
3387 | scan_suspend_time = 0xFF0FFFFF & | |
3388 | (extra | ((suspend_time % interval) * 1024)); | |
3389 | ||
3390 | scan->suspend_time = cpu_to_le32(scan_suspend_time); | |
e1623446 | 3391 | IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n", |
b481de9c ZY |
3392 | scan_suspend_time, interval); |
3393 | } | |
3394 | ||
3395 | /* We should add the ability for user to lock to PASSIVE ONLY */ | |
3396 | if (priv->one_direct_scan) { | |
e1623446 TW |
3397 | IWL_DEBUG_SCAN(priv, "Kicking off one direct scan for '%s'\n", |
3398 | print_ssid(ssid, priv->direct_ssid, | |
9387b7ca | 3399 | priv->direct_ssid_len)); |
b481de9c ZY |
3400 | scan->direct_scan[0].id = WLAN_EID_SSID; |
3401 | scan->direct_scan[0].len = priv->direct_ssid_len; | |
3402 | memcpy(scan->direct_scan[0].ssid, | |
3403 | priv->direct_ssid, priv->direct_ssid_len); | |
f9340520 | 3404 | n_probes++; |
f9340520 | 3405 | } else |
e1623446 | 3406 | IWL_DEBUG_SCAN(priv, "Kicking off one indirect scan.\n"); |
b481de9c ZY |
3407 | |
3408 | /* We don't build a direct scan probe request; the uCode will do | |
3409 | * that based on the direct_mask added to each channel entry */ | |
b481de9c | 3410 | scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK; |
3832ec9d | 3411 | scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id; |
b481de9c ZY |
3412 | scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; |
3413 | ||
3414 | /* flags + rate selection */ | |
3415 | ||
66b5004d | 3416 | if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) { |
b481de9c ZY |
3417 | scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK; |
3418 | scan->tx_cmd.rate = IWL_RATE_1M_PLCP; | |
3419 | scan->good_CRC_th = 0; | |
8318d78a | 3420 | band = IEEE80211_BAND_2GHZ; |
66b5004d | 3421 | } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) { |
b481de9c ZY |
3422 | scan->tx_cmd.rate = IWL_RATE_6M_PLCP; |
3423 | scan->good_CRC_th = IWL_GOOD_CRC_TH; | |
8318d78a | 3424 | band = IEEE80211_BAND_5GHZ; |
66b5004d | 3425 | } else { |
39aadf8c | 3426 | IWL_WARN(priv, "Invalid scan band count\n"); |
b481de9c ZY |
3427 | goto done; |
3428 | } | |
3429 | ||
77fecfb8 SO |
3430 | scan->tx_cmd.len = cpu_to_le16( |
3431 | iwl_fill_probe_req(priv, band, | |
3432 | (struct ieee80211_mgmt *)scan->data, | |
3433 | IWL_MAX_SCAN_SIZE - sizeof(*scan))); | |
3434 | ||
b481de9c ZY |
3435 | /* select Rx antennas */ |
3436 | scan->flags |= iwl3945_get_antenna_flags(priv); | |
3437 | ||
05c914fe | 3438 | if (priv->iw_mode == NL80211_IFTYPE_MONITOR) |
b481de9c ZY |
3439 | scan->filter_flags = RXON_FILTER_PROMISC_MSK; |
3440 | ||
f9340520 AK |
3441 | scan->channel_count = |
3442 | iwl3945_get_channels_for_scan(priv, band, 1, /* active */ | |
3443 | n_probes, | |
3444 | (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]); | |
b481de9c | 3445 | |
14b54336 | 3446 | if (scan->channel_count == 0) { |
e1623446 | 3447 | IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count); |
14b54336 RC |
3448 | goto done; |
3449 | } | |
3450 | ||
b481de9c | 3451 | cmd.len += le16_to_cpu(scan->tx_cmd.len) + |
bb8c093b | 3452 | scan->channel_count * sizeof(struct iwl3945_scan_channel); |
b481de9c ZY |
3453 | cmd.data = scan; |
3454 | scan->len = cpu_to_le16(cmd.len); | |
3455 | ||
3456 | set_bit(STATUS_SCAN_HW, &priv->status); | |
518099a8 | 3457 | rc = iwl_send_cmd_sync(priv, &cmd); |
b481de9c ZY |
3458 | if (rc) |
3459 | goto done; | |
3460 | ||
3461 | queue_delayed_work(priv->workqueue, &priv->scan_check, | |
3462 | IWL_SCAN_CHECK_WATCHDOG); | |
3463 | ||
3464 | mutex_unlock(&priv->mutex); | |
3465 | return; | |
3466 | ||
3467 | done: | |
2420ebc1 MA |
3468 | /* can not perform scan make sure we clear scanning |
3469 | * bits from status so next scan request can be performed. | |
3470 | * if we dont clear scanning status bit here all next scan | |
3471 | * will fail | |
3472 | */ | |
3473 | clear_bit(STATUS_SCAN_HW, &priv->status); | |
3474 | clear_bit(STATUS_SCANNING, &priv->status); | |
3475 | ||
01ebd063 | 3476 | /* inform mac80211 scan aborted */ |
b481de9c ZY |
3477 | queue_work(priv->workqueue, &priv->scan_completed); |
3478 | mutex_unlock(&priv->mutex); | |
3479 | } | |
3480 | ||
bb8c093b | 3481 | static void iwl3945_bg_up(struct work_struct *data) |
b481de9c | 3482 | { |
4a8a4322 | 3483 | struct iwl_priv *priv = container_of(data, struct iwl_priv, up); |
b481de9c ZY |
3484 | |
3485 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
3486 | return; | |
3487 | ||
3488 | mutex_lock(&priv->mutex); | |
bb8c093b | 3489 | __iwl3945_up(priv); |
b481de9c | 3490 | mutex_unlock(&priv->mutex); |
c0af96a6 | 3491 | iwl_rfkill_set_hw_state(priv); |
b481de9c ZY |
3492 | } |
3493 | ||
bb8c093b | 3494 | static void iwl3945_bg_restart(struct work_struct *data) |
b481de9c | 3495 | { |
4a8a4322 | 3496 | struct iwl_priv *priv = container_of(data, struct iwl_priv, restart); |
b481de9c ZY |
3497 | |
3498 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
3499 | return; | |
3500 | ||
bb8c093b | 3501 | iwl3945_down(priv); |
b481de9c ZY |
3502 | queue_work(priv->workqueue, &priv->up); |
3503 | } | |
3504 | ||
bb8c093b | 3505 | static void iwl3945_bg_rx_replenish(struct work_struct *data) |
b481de9c | 3506 | { |
4a8a4322 AK |
3507 | struct iwl_priv *priv = |
3508 | container_of(data, struct iwl_priv, rx_replenish); | |
b481de9c ZY |
3509 | |
3510 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
3511 | return; | |
3512 | ||
3513 | mutex_lock(&priv->mutex); | |
bb8c093b | 3514 | iwl3945_rx_replenish(priv); |
b481de9c ZY |
3515 | mutex_unlock(&priv->mutex); |
3516 | } | |
3517 | ||
7878a5a4 MA |
3518 | #define IWL_DELAY_NEXT_SCAN (HZ*2) |
3519 | ||
4a8a4322 | 3520 | static void iwl3945_post_associate(struct iwl_priv *priv) |
b481de9c | 3521 | { |
b481de9c ZY |
3522 | int rc = 0; |
3523 | struct ieee80211_conf *conf = NULL; | |
3524 | ||
05c914fe | 3525 | if (priv->iw_mode == NL80211_IFTYPE_AP) { |
15b1687c | 3526 | IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__); |
b481de9c ZY |
3527 | return; |
3528 | } | |
3529 | ||
3530 | ||
e1623446 | 3531 | IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n", |
8ccde88a | 3532 | priv->assoc_id, priv->active_rxon.bssid_addr); |
b481de9c ZY |
3533 | |
3534 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
3535 | return; | |
3536 | ||
322a9811 | 3537 | if (!priv->vif || !priv->is_open) |
6ef89d0a | 3538 | return; |
322a9811 | 3539 | |
af0053d6 | 3540 | iwl_scan_cancel_timeout(priv, 200); |
15e869d8 | 3541 | |
b481de9c ZY |
3542 | conf = ieee80211_get_hw_conf(priv->hw); |
3543 | ||
8ccde88a | 3544 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
bb8c093b | 3545 | iwl3945_commit_rxon(priv); |
b481de9c | 3546 | |
28afaf91 | 3547 | memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd)); |
bb8c093b | 3548 | iwl3945_setup_rxon_timing(priv); |
518099a8 | 3549 | rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING, |
b481de9c ZY |
3550 | sizeof(priv->rxon_timing), &priv->rxon_timing); |
3551 | if (rc) | |
39aadf8c | 3552 | IWL_WARN(priv, "REPLY_RXON_TIMING failed - " |
b481de9c ZY |
3553 | "Attempting to continue.\n"); |
3554 | ||
8ccde88a | 3555 | priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; |
b481de9c | 3556 | |
8ccde88a | 3557 | priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id); |
b481de9c | 3558 | |
e1623446 | 3559 | IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n", |
b481de9c ZY |
3560 | priv->assoc_id, priv->beacon_int); |
3561 | ||
3562 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE) | |
8ccde88a | 3563 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; |
b481de9c | 3564 | else |
8ccde88a | 3565 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; |
b481de9c | 3566 | |
8ccde88a | 3567 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { |
b481de9c | 3568 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME) |
8ccde88a | 3569 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; |
b481de9c | 3570 | else |
8ccde88a | 3571 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; |
b481de9c | 3572 | |
05c914fe | 3573 | if (priv->iw_mode == NL80211_IFTYPE_ADHOC) |
8ccde88a | 3574 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; |
b481de9c ZY |
3575 | |
3576 | } | |
3577 | ||
bb8c093b | 3578 | iwl3945_commit_rxon(priv); |
b481de9c ZY |
3579 | |
3580 | switch (priv->iw_mode) { | |
05c914fe | 3581 | case NL80211_IFTYPE_STATION: |
bb8c093b | 3582 | iwl3945_rate_scale_init(priv->hw, IWL_AP_ID); |
b481de9c ZY |
3583 | break; |
3584 | ||
05c914fe | 3585 | case NL80211_IFTYPE_ADHOC: |
b481de9c | 3586 | |
ce546fd2 | 3587 | priv->assoc_id = 1; |
bb8c093b | 3588 | iwl3945_add_station(priv, priv->bssid, 0, 0); |
b481de9c | 3589 | iwl3945_sync_sta(priv, IWL_STA_ID, |
8318d78a | 3590 | (priv->band == IEEE80211_BAND_5GHZ) ? |
b481de9c ZY |
3591 | IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP, |
3592 | CMD_ASYNC); | |
bb8c093b CH |
3593 | iwl3945_rate_scale_init(priv->hw, IWL_STA_ID); |
3594 | iwl3945_send_beacon_cmd(priv); | |
b481de9c ZY |
3595 | |
3596 | break; | |
3597 | ||
3598 | default: | |
15b1687c | 3599 | IWL_ERR(priv, "%s Should not be called in %d mode\n", |
3ac7f146 | 3600 | __func__, priv->iw_mode); |
b481de9c ZY |
3601 | break; |
3602 | } | |
3603 | ||
14d2aac5 | 3604 | iwl_activate_qos(priv, 0); |
292ae174 | 3605 | |
7878a5a4 MA |
3606 | /* we have just associated, don't start scan too early */ |
3607 | priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN; | |
cd56d331 AK |
3608 | } |
3609 | ||
e8975581 | 3610 | static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed); |
76bb77e0 | 3611 | |
b481de9c ZY |
3612 | /***************************************************************************** |
3613 | * | |
3614 | * mac80211 entry point functions | |
3615 | * | |
3616 | *****************************************************************************/ | |
3617 | ||
5a66926a ZY |
3618 | #define UCODE_READY_TIMEOUT (2 * HZ) |
3619 | ||
bb8c093b | 3620 | static int iwl3945_mac_start(struct ieee80211_hw *hw) |
b481de9c | 3621 | { |
4a8a4322 | 3622 | struct iwl_priv *priv = hw->priv; |
5a66926a | 3623 | int ret; |
b481de9c | 3624 | |
e1623446 | 3625 | IWL_DEBUG_MAC80211(priv, "enter\n"); |
b481de9c ZY |
3626 | |
3627 | /* we should be verifying the device is ready to be opened */ | |
3628 | mutex_lock(&priv->mutex); | |
3629 | ||
8ccde88a | 3630 | memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon)); |
5a66926a ZY |
3631 | /* fetch ucode file from disk, alloc and copy to bus-master buffers ... |
3632 | * ucode filename and max sizes are card-specific. */ | |
3633 | ||
3634 | if (!priv->ucode_code.len) { | |
3635 | ret = iwl3945_read_ucode(priv); | |
3636 | if (ret) { | |
15b1687c | 3637 | IWL_ERR(priv, "Could not read microcode: %d\n", ret); |
5a66926a ZY |
3638 | mutex_unlock(&priv->mutex); |
3639 | goto out_release_irq; | |
3640 | } | |
3641 | } | |
b481de9c | 3642 | |
e655b9f0 | 3643 | ret = __iwl3945_up(priv); |
b481de9c ZY |
3644 | |
3645 | mutex_unlock(&priv->mutex); | |
5a66926a | 3646 | |
c0af96a6 | 3647 | iwl_rfkill_set_hw_state(priv); |
80fcc9e2 | 3648 | |
e655b9f0 ZY |
3649 | if (ret) |
3650 | goto out_release_irq; | |
3651 | ||
e1623446 | 3652 | IWL_DEBUG_INFO(priv, "Start UP work.\n"); |
e655b9f0 ZY |
3653 | |
3654 | if (test_bit(STATUS_IN_SUSPEND, &priv->status)) | |
3655 | return 0; | |
3656 | ||
5a66926a ZY |
3657 | /* Wait for START_ALIVE from ucode. Otherwise callbacks from |
3658 | * mac80211 will not be run successfully. */ | |
3659 | ret = wait_event_interruptible_timeout(priv->wait_command_queue, | |
3660 | test_bit(STATUS_READY, &priv->status), | |
3661 | UCODE_READY_TIMEOUT); | |
3662 | if (!ret) { | |
3663 | if (!test_bit(STATUS_READY, &priv->status)) { | |
15b1687c WT |
3664 | IWL_ERR(priv, |
3665 | "Wait for START_ALIVE timeout after %dms.\n", | |
3666 | jiffies_to_msecs(UCODE_READY_TIMEOUT)); | |
5a66926a ZY |
3667 | ret = -ETIMEDOUT; |
3668 | goto out_release_irq; | |
3669 | } | |
3670 | } | |
3671 | ||
2663516d HS |
3672 | /* ucode is running and will send rfkill notifications, |
3673 | * no need to poll the killswitch state anymore */ | |
3674 | cancel_delayed_work(&priv->rfkill_poll); | |
3675 | ||
e655b9f0 | 3676 | priv->is_open = 1; |
e1623446 | 3677 | IWL_DEBUG_MAC80211(priv, "leave\n"); |
b481de9c | 3678 | return 0; |
5a66926a ZY |
3679 | |
3680 | out_release_irq: | |
e655b9f0 | 3681 | priv->is_open = 0; |
e1623446 | 3682 | IWL_DEBUG_MAC80211(priv, "leave - failed\n"); |
5a66926a | 3683 | return ret; |
b481de9c ZY |
3684 | } |
3685 | ||
bb8c093b | 3686 | static void iwl3945_mac_stop(struct ieee80211_hw *hw) |
b481de9c | 3687 | { |
4a8a4322 | 3688 | struct iwl_priv *priv = hw->priv; |
b481de9c | 3689 | |
e1623446 | 3690 | IWL_DEBUG_MAC80211(priv, "enter\n"); |
6ef89d0a | 3691 | |
e655b9f0 | 3692 | if (!priv->is_open) { |
e1623446 | 3693 | IWL_DEBUG_MAC80211(priv, "leave - skip\n"); |
e655b9f0 ZY |
3694 | return; |
3695 | } | |
3696 | ||
b481de9c | 3697 | priv->is_open = 0; |
5a66926a | 3698 | |
775a6e27 | 3699 | if (iwl_is_ready_rf(priv)) { |
e655b9f0 ZY |
3700 | /* stop mac, cancel any scan request and clear |
3701 | * RXON_FILTER_ASSOC_MSK BIT | |
3702 | */ | |
5a66926a | 3703 | mutex_lock(&priv->mutex); |
af0053d6 | 3704 | iwl_scan_cancel_timeout(priv, 100); |
fde3571f | 3705 | mutex_unlock(&priv->mutex); |
fde3571f MA |
3706 | } |
3707 | ||
5a66926a ZY |
3708 | iwl3945_down(priv); |
3709 | ||
3710 | flush_workqueue(priv->workqueue); | |
2663516d HS |
3711 | |
3712 | /* start polling the killswitch state again */ | |
3713 | queue_delayed_work(priv->workqueue, &priv->rfkill_poll, | |
3714 | round_jiffies_relative(2 * HZ)); | |
6ef89d0a | 3715 | |
e1623446 | 3716 | IWL_DEBUG_MAC80211(priv, "leave\n"); |
b481de9c ZY |
3717 | } |
3718 | ||
e039fa4a | 3719 | static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb) |
b481de9c | 3720 | { |
4a8a4322 | 3721 | struct iwl_priv *priv = hw->priv; |
b481de9c | 3722 | |
e1623446 | 3723 | IWL_DEBUG_MAC80211(priv, "enter\n"); |
b481de9c | 3724 | |
e1623446 | 3725 | IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len, |
e039fa4a | 3726 | ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate); |
b481de9c | 3727 | |
e039fa4a | 3728 | if (iwl3945_tx_skb(priv, skb)) |
b481de9c ZY |
3729 | dev_kfree_skb_any(skb); |
3730 | ||
e1623446 | 3731 | IWL_DEBUG_MAC80211(priv, "leave\n"); |
637f8837 | 3732 | return NETDEV_TX_OK; |
b481de9c ZY |
3733 | } |
3734 | ||
bb8c093b | 3735 | static int iwl3945_mac_add_interface(struct ieee80211_hw *hw, |
b481de9c ZY |
3736 | struct ieee80211_if_init_conf *conf) |
3737 | { | |
4a8a4322 | 3738 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
3739 | unsigned long flags; |
3740 | ||
e1623446 | 3741 | IWL_DEBUG_MAC80211(priv, "enter: type %d\n", conf->type); |
b481de9c | 3742 | |
32bfd35d | 3743 | if (priv->vif) { |
e1623446 | 3744 | IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n"); |
864792e3 | 3745 | return -EOPNOTSUPP; |
b481de9c ZY |
3746 | } |
3747 | ||
3748 | spin_lock_irqsave(&priv->lock, flags); | |
32bfd35d | 3749 | priv->vif = conf->vif; |
60294de3 | 3750 | priv->iw_mode = conf->type; |
b481de9c ZY |
3751 | |
3752 | spin_unlock_irqrestore(&priv->lock, flags); | |
3753 | ||
3754 | mutex_lock(&priv->mutex); | |
864792e3 TW |
3755 | |
3756 | if (conf->mac_addr) { | |
e1623446 | 3757 | IWL_DEBUG_MAC80211(priv, "Set: %pM\n", conf->mac_addr); |
864792e3 TW |
3758 | memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN); |
3759 | } | |
3760 | ||
775a6e27 | 3761 | if (iwl_is_ready(priv)) |
5a66926a | 3762 | iwl3945_set_mode(priv, conf->type); |
b481de9c | 3763 | |
b481de9c ZY |
3764 | mutex_unlock(&priv->mutex); |
3765 | ||
e1623446 | 3766 | IWL_DEBUG_MAC80211(priv, "leave\n"); |
b481de9c ZY |
3767 | return 0; |
3768 | } | |
3769 | ||
3770 | /** | |
bb8c093b | 3771 | * iwl3945_mac_config - mac80211 config callback |
b481de9c ZY |
3772 | * |
3773 | * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to | |
3774 | * be set inappropriately and the driver currently sets the hardware up to | |
3775 | * use it whenever needed. | |
3776 | */ | |
e8975581 | 3777 | static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed) |
b481de9c | 3778 | { |
4a8a4322 | 3779 | struct iwl_priv *priv = hw->priv; |
d20b3c65 | 3780 | const struct iwl_channel_info *ch_info; |
e8975581 | 3781 | struct ieee80211_conf *conf = &hw->conf; |
b481de9c | 3782 | unsigned long flags; |
76bb77e0 | 3783 | int ret = 0; |
b481de9c ZY |
3784 | |
3785 | mutex_lock(&priv->mutex); | |
e1623446 TW |
3786 | IWL_DEBUG_MAC80211(priv, "enter to channel %d\n", |
3787 | conf->channel->hw_value); | |
b481de9c | 3788 | |
775a6e27 | 3789 | if (!iwl_is_ready(priv)) { |
e1623446 | 3790 | IWL_DEBUG_MAC80211(priv, "leave - not ready\n"); |
76bb77e0 ZY |
3791 | ret = -EIO; |
3792 | goto out; | |
b481de9c ZY |
3793 | } |
3794 | ||
df878d8f | 3795 | if (unlikely(!iwl3945_mod_params.disable_hw_scan && |
b481de9c | 3796 | test_bit(STATUS_SCANNING, &priv->status))) { |
e1623446 | 3797 | IWL_DEBUG_MAC80211(priv, "leave - scanning\n"); |
a0646470 | 3798 | set_bit(STATUS_CONF_PENDING, &priv->status); |
b481de9c | 3799 | mutex_unlock(&priv->mutex); |
a0646470 | 3800 | return 0; |
b481de9c ZY |
3801 | } |
3802 | ||
3803 | spin_lock_irqsave(&priv->lock, flags); | |
3804 | ||
e6148917 SO |
3805 | ch_info = iwl_get_channel_info(priv, conf->channel->band, |
3806 | conf->channel->hw_value); | |
b481de9c | 3807 | if (!is_channel_valid(ch_info)) { |
e1623446 TW |
3808 | IWL_DEBUG_SCAN(priv, |
3809 | "Channel %d [%d] is INVALID for this band.\n", | |
3810 | conf->channel->hw_value, conf->channel->band); | |
3811 | IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n"); | |
b481de9c | 3812 | spin_unlock_irqrestore(&priv->lock, flags); |
76bb77e0 ZY |
3813 | ret = -EINVAL; |
3814 | goto out; | |
b481de9c ZY |
3815 | } |
3816 | ||
8ccde88a | 3817 | iwl_set_rxon_channel(priv, conf->channel); |
b481de9c | 3818 | |
8ccde88a | 3819 | iwl_set_flags_for_band(priv, conf->channel->band); |
b481de9c ZY |
3820 | |
3821 | /* The list of supported rates and rate mask can be different | |
3822 | * for each phymode; since the phymode may have changed, reset | |
3823 | * the rate mask to what mac80211 lists */ | |
8ccde88a | 3824 | iwl_set_rate(priv); |
b481de9c ZY |
3825 | |
3826 | spin_unlock_irqrestore(&priv->lock, flags); | |
3827 | ||
3828 | #ifdef IEEE80211_CONF_CHANNEL_SWITCH | |
3829 | if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) { | |
bb8c093b | 3830 | iwl3945_hw_channel_switch(priv, conf->channel); |
76bb77e0 | 3831 | goto out; |
b481de9c ZY |
3832 | } |
3833 | #endif | |
3834 | ||
37fec384 MA |
3835 | if (changed & IEEE80211_CONF_CHANGE_RADIO_ENABLED) { |
3836 | if (conf->radio_enabled && | |
3837 | iwl_radio_kill_sw_enable_radio(priv)) { | |
3838 | IWL_DEBUG_MAC80211(priv, "leave - RF-KILL - " | |
3839 | "waiting for uCode\n"); | |
3840 | goto out; | |
3841 | } | |
b481de9c | 3842 | |
37fec384 MA |
3843 | if (!conf->radio_enabled) { |
3844 | iwl_radio_kill_sw_disable_radio(priv); | |
3845 | IWL_DEBUG_MAC80211(priv, "leave - radio disabled\n"); | |
3846 | goto out; | |
3847 | } | |
b481de9c ZY |
3848 | } |
3849 | ||
775a6e27 | 3850 | if (iwl_is_rfkill(priv)) { |
e1623446 | 3851 | IWL_DEBUG_MAC80211(priv, "leave - RF kill\n"); |
76bb77e0 ZY |
3852 | ret = -EIO; |
3853 | goto out; | |
b481de9c ZY |
3854 | } |
3855 | ||
8ccde88a | 3856 | iwl_set_rate(priv); |
b481de9c | 3857 | |
8ccde88a SO |
3858 | if (memcmp(&priv->active_rxon, |
3859 | &priv->staging_rxon, sizeof(priv->staging_rxon))) | |
bb8c093b | 3860 | iwl3945_commit_rxon(priv); |
b481de9c | 3861 | else |
e1623446 | 3862 | IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration\n"); |
b481de9c | 3863 | |
e1623446 | 3864 | IWL_DEBUG_MAC80211(priv, "leave\n"); |
b481de9c | 3865 | |
76bb77e0 | 3866 | out: |
a0646470 | 3867 | clear_bit(STATUS_CONF_PENDING, &priv->status); |
b481de9c | 3868 | mutex_unlock(&priv->mutex); |
76bb77e0 | 3869 | return ret; |
b481de9c ZY |
3870 | } |
3871 | ||
4a8a4322 | 3872 | static void iwl3945_config_ap(struct iwl_priv *priv) |
b481de9c ZY |
3873 | { |
3874 | int rc = 0; | |
3875 | ||
d986bcd1 | 3876 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
b481de9c ZY |
3877 | return; |
3878 | ||
3879 | /* The following should be done only at AP bring up */ | |
8ccde88a | 3880 | if (!(iwl_is_associated(priv))) { |
b481de9c ZY |
3881 | |
3882 | /* RXON - unassoc (to set timing command) */ | |
8ccde88a | 3883 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
bb8c093b | 3884 | iwl3945_commit_rxon(priv); |
b481de9c ZY |
3885 | |
3886 | /* RXON Timing */ | |
28afaf91 | 3887 | memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd)); |
bb8c093b | 3888 | iwl3945_setup_rxon_timing(priv); |
518099a8 SO |
3889 | rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING, |
3890 | sizeof(priv->rxon_timing), | |
3891 | &priv->rxon_timing); | |
b481de9c | 3892 | if (rc) |
39aadf8c | 3893 | IWL_WARN(priv, "REPLY_RXON_TIMING failed - " |
b481de9c ZY |
3894 | "Attempting to continue.\n"); |
3895 | ||
3896 | /* FIXME: what should be the assoc_id for AP? */ | |
8ccde88a | 3897 | priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id); |
b481de9c | 3898 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE) |
8ccde88a | 3899 | priv->staging_rxon.flags |= |
b481de9c ZY |
3900 | RXON_FLG_SHORT_PREAMBLE_MSK; |
3901 | else | |
8ccde88a | 3902 | priv->staging_rxon.flags &= |
b481de9c ZY |
3903 | ~RXON_FLG_SHORT_PREAMBLE_MSK; |
3904 | ||
8ccde88a | 3905 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { |
b481de9c ZY |
3906 | if (priv->assoc_capability & |
3907 | WLAN_CAPABILITY_SHORT_SLOT_TIME) | |
8ccde88a | 3908 | priv->staging_rxon.flags |= |
b481de9c ZY |
3909 | RXON_FLG_SHORT_SLOT_MSK; |
3910 | else | |
8ccde88a | 3911 | priv->staging_rxon.flags &= |
b481de9c ZY |
3912 | ~RXON_FLG_SHORT_SLOT_MSK; |
3913 | ||
05c914fe | 3914 | if (priv->iw_mode == NL80211_IFTYPE_ADHOC) |
8ccde88a | 3915 | priv->staging_rxon.flags &= |
b481de9c ZY |
3916 | ~RXON_FLG_SHORT_SLOT_MSK; |
3917 | } | |
3918 | /* restore RXON assoc */ | |
8ccde88a | 3919 | priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; |
bb8c093b | 3920 | iwl3945_commit_rxon(priv); |
b5323d36 | 3921 | iwl3945_add_station(priv, iwl_bcast_addr, 0, 0); |
556f8db7 | 3922 | } |
bb8c093b | 3923 | iwl3945_send_beacon_cmd(priv); |
b481de9c ZY |
3924 | |
3925 | /* FIXME - we need to add code here to detect a totally new | |
3926 | * configuration, reset the AP, unassoc, rxon timing, assoc, | |
3927 | * clear sta table, add BCAST sta... */ | |
3928 | } | |
3929 | ||
32bfd35d JB |
3930 | static int iwl3945_mac_config_interface(struct ieee80211_hw *hw, |
3931 | struct ieee80211_vif *vif, | |
4a8a4322 | 3932 | struct ieee80211_if_conf *conf) |
b481de9c | 3933 | { |
4a8a4322 | 3934 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
3935 | int rc; |
3936 | ||
3937 | if (conf == NULL) | |
3938 | return -EIO; | |
3939 | ||
b716bb91 | 3940 | if (priv->vif != vif) { |
e1623446 | 3941 | IWL_DEBUG_MAC80211(priv, "leave - priv->vif != vif\n"); |
b716bb91 EG |
3942 | return 0; |
3943 | } | |
3944 | ||
9d139c81 | 3945 | /* handle this temporarily here */ |
05c914fe | 3946 | if (priv->iw_mode == NL80211_IFTYPE_ADHOC && |
9d139c81 JB |
3947 | conf->changed & IEEE80211_IFCC_BEACON) { |
3948 | struct sk_buff *beacon = ieee80211_beacon_get(hw, vif); | |
3949 | if (!beacon) | |
3950 | return -ENOMEM; | |
9bdf5eca | 3951 | mutex_lock(&priv->mutex); |
9d139c81 | 3952 | rc = iwl3945_mac_beacon_update(hw, beacon); |
9bdf5eca | 3953 | mutex_unlock(&priv->mutex); |
9d139c81 JB |
3954 | if (rc) |
3955 | return rc; | |
3956 | } | |
3957 | ||
775a6e27 | 3958 | if (!iwl_is_alive(priv)) |
5a66926a ZY |
3959 | return -EAGAIN; |
3960 | ||
b481de9c ZY |
3961 | mutex_lock(&priv->mutex); |
3962 | ||
b481de9c | 3963 | if (conf->bssid) |
e1623446 | 3964 | IWL_DEBUG_MAC80211(priv, "bssid: %pM\n", conf->bssid); |
b481de9c | 3965 | |
4150c572 JB |
3966 | /* |
3967 | * very dubious code was here; the probe filtering flag is never set: | |
3968 | * | |
b481de9c ZY |
3969 | if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) && |
3970 | !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) { | |
4150c572 | 3971 | */ |
b481de9c | 3972 | |
05c914fe | 3973 | if (priv->iw_mode == NL80211_IFTYPE_AP) { |
b481de9c ZY |
3974 | if (!conf->bssid) { |
3975 | conf->bssid = priv->mac_addr; | |
3976 | memcpy(priv->bssid, priv->mac_addr, ETH_ALEN); | |
e1623446 | 3977 | IWL_DEBUG_MAC80211(priv, "bssid was set to: %pM\n", |
e174961c | 3978 | conf->bssid); |
b481de9c ZY |
3979 | } |
3980 | if (priv->ibss_beacon) | |
3981 | dev_kfree_skb(priv->ibss_beacon); | |
3982 | ||
9d139c81 | 3983 | priv->ibss_beacon = ieee80211_beacon_get(hw, vif); |
b481de9c ZY |
3984 | } |
3985 | ||
775a6e27 | 3986 | if (iwl_is_rfkill(priv)) |
fde3571f MA |
3987 | goto done; |
3988 | ||
b481de9c ZY |
3989 | if (conf->bssid && !is_zero_ether_addr(conf->bssid) && |
3990 | !is_multicast_ether_addr(conf->bssid)) { | |
3991 | /* If there is currently a HW scan going on in the background | |
3992 | * then we need to cancel it else the RXON below will fail. */ | |
af0053d6 | 3993 | if (iwl_scan_cancel_timeout(priv, 100)) { |
39aadf8c | 3994 | IWL_WARN(priv, "Aborted scan still in progress " |
b481de9c | 3995 | "after 100ms\n"); |
e1623446 | 3996 | IWL_DEBUG_MAC80211(priv, "leaving:scan abort failed\n"); |
b481de9c ZY |
3997 | mutex_unlock(&priv->mutex); |
3998 | return -EAGAIN; | |
3999 | } | |
8ccde88a | 4000 | memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN); |
b481de9c ZY |
4001 | |
4002 | /* TODO: Audit driver for usage of these members and see | |
4003 | * if mac80211 deprecates them (priv->bssid looks like it | |
4004 | * shouldn't be there, but I haven't scanned the IBSS code | |
4005 | * to verify) - jpk */ | |
4006 | memcpy(priv->bssid, conf->bssid, ETH_ALEN); | |
4007 | ||
05c914fe | 4008 | if (priv->iw_mode == NL80211_IFTYPE_AP) |
bb8c093b | 4009 | iwl3945_config_ap(priv); |
b481de9c | 4010 | else { |
bb8c093b | 4011 | rc = iwl3945_commit_rxon(priv); |
05c914fe | 4012 | if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc) |
bb8c093b | 4013 | iwl3945_add_station(priv, |
8ccde88a | 4014 | priv->active_rxon.bssid_addr, 1, 0); |
b481de9c ZY |
4015 | } |
4016 | ||
4017 | } else { | |
af0053d6 | 4018 | iwl_scan_cancel_timeout(priv, 100); |
8ccde88a | 4019 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
bb8c093b | 4020 | iwl3945_commit_rxon(priv); |
b481de9c ZY |
4021 | } |
4022 | ||
fde3571f | 4023 | done: |
e1623446 | 4024 | IWL_DEBUG_MAC80211(priv, "leave\n"); |
b481de9c ZY |
4025 | mutex_unlock(&priv->mutex); |
4026 | ||
4027 | return 0; | |
4028 | } | |
4029 | ||
bb8c093b | 4030 | static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw, |
b481de9c ZY |
4031 | struct ieee80211_if_init_conf *conf) |
4032 | { | |
4a8a4322 | 4033 | struct iwl_priv *priv = hw->priv; |
b481de9c | 4034 | |
e1623446 | 4035 | IWL_DEBUG_MAC80211(priv, "enter\n"); |
b481de9c ZY |
4036 | |
4037 | mutex_lock(&priv->mutex); | |
6ef89d0a | 4038 | |
775a6e27 | 4039 | if (iwl_is_ready_rf(priv)) { |
af0053d6 | 4040 | iwl_scan_cancel_timeout(priv, 100); |
8ccde88a | 4041 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
fde3571f MA |
4042 | iwl3945_commit_rxon(priv); |
4043 | } | |
32bfd35d JB |
4044 | if (priv->vif == conf->vif) { |
4045 | priv->vif = NULL; | |
b481de9c | 4046 | memset(priv->bssid, 0, ETH_ALEN); |
b481de9c ZY |
4047 | } |
4048 | mutex_unlock(&priv->mutex); | |
4049 | ||
e1623446 | 4050 | IWL_DEBUG_MAC80211(priv, "leave\n"); |
b481de9c ZY |
4051 | } |
4052 | ||
cd56d331 AK |
4053 | #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6) |
4054 | ||
4055 | static void iwl3945_bss_info_changed(struct ieee80211_hw *hw, | |
4056 | struct ieee80211_vif *vif, | |
4057 | struct ieee80211_bss_conf *bss_conf, | |
4058 | u32 changes) | |
4059 | { | |
4a8a4322 | 4060 | struct iwl_priv *priv = hw->priv; |
cd56d331 | 4061 | |
e1623446 | 4062 | IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes); |
cd56d331 AK |
4063 | |
4064 | if (changes & BSS_CHANGED_ERP_PREAMBLE) { | |
e1623446 | 4065 | IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n", |
cd56d331 AK |
4066 | bss_conf->use_short_preamble); |
4067 | if (bss_conf->use_short_preamble) | |
8ccde88a | 4068 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; |
cd56d331 | 4069 | else |
8ccde88a SO |
4070 | priv->staging_rxon.flags &= |
4071 | ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
cd56d331 AK |
4072 | } |
4073 | ||
4074 | if (changes & BSS_CHANGED_ERP_CTS_PROT) { | |
e1623446 TW |
4075 | IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", |
4076 | bss_conf->use_cts_prot); | |
cd56d331 | 4077 | if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ)) |
8ccde88a | 4078 | priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK; |
cd56d331 | 4079 | else |
8ccde88a | 4080 | priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK; |
cd56d331 AK |
4081 | } |
4082 | ||
4083 | if (changes & BSS_CHANGED_ASSOC) { | |
e1623446 | 4084 | IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc); |
cd56d331 AK |
4085 | /* This should never happen as this function should |
4086 | * never be called from interrupt context. */ | |
4087 | if (WARN_ON_ONCE(in_interrupt())) | |
4088 | return; | |
4089 | if (bss_conf->assoc) { | |
4090 | priv->assoc_id = bss_conf->aid; | |
4091 | priv->beacon_int = bss_conf->beacon_int; | |
28afaf91 | 4092 | priv->timestamp = bss_conf->timestamp; |
cd56d331 | 4093 | priv->assoc_capability = bss_conf->assoc_capability; |
3dae0c42 | 4094 | priv->power_data.dtim_period = bss_conf->dtim_period; |
cd56d331 AK |
4095 | priv->next_scan_jiffies = jiffies + |
4096 | IWL_DELAY_NEXT_SCAN_AFTER_ASSOC; | |
4097 | mutex_lock(&priv->mutex); | |
4098 | iwl3945_post_associate(priv); | |
4099 | mutex_unlock(&priv->mutex); | |
4100 | } else { | |
4101 | priv->assoc_id = 0; | |
e1623446 TW |
4102 | IWL_DEBUG_MAC80211(priv, |
4103 | "DISASSOC %d\n", bss_conf->assoc); | |
cd56d331 | 4104 | } |
8ccde88a | 4105 | } else if (changes && iwl_is_associated(priv) && priv->assoc_id) { |
e1623446 TW |
4106 | IWL_DEBUG_MAC80211(priv, |
4107 | "Associated Changes %d\n", changes); | |
cd56d331 AK |
4108 | iwl3945_send_rxon_assoc(priv); |
4109 | } | |
4110 | ||
4111 | } | |
4112 | ||
bb8c093b | 4113 | static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, |
dc822b5d JB |
4114 | struct ieee80211_vif *vif, |
4115 | struct ieee80211_sta *sta, | |
4116 | struct ieee80211_key_conf *key) | |
b481de9c | 4117 | { |
4a8a4322 | 4118 | struct iwl_priv *priv = hw->priv; |
dc822b5d | 4119 | const u8 *addr; |
6e21f15c AK |
4120 | int ret = 0; |
4121 | u8 sta_id = IWL_INVALID_STATION; | |
4122 | u8 static_key; | |
b481de9c | 4123 | |
e1623446 | 4124 | IWL_DEBUG_MAC80211(priv, "enter\n"); |
b481de9c | 4125 | |
df878d8f | 4126 | if (iwl3945_mod_params.sw_crypto) { |
e1623446 | 4127 | IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n"); |
b481de9c ZY |
4128 | return -EOPNOTSUPP; |
4129 | } | |
4130 | ||
42986796 | 4131 | addr = sta ? sta->addr : iwl_bcast_addr; |
6e21f15c AK |
4132 | static_key = !iwl_is_associated(priv); |
4133 | ||
4134 | if (!static_key) { | |
4135 | sta_id = iwl3945_hw_find_station(priv, addr); | |
4136 | if (sta_id == IWL_INVALID_STATION) { | |
12514396 | 4137 | IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n", |
6e21f15c AK |
4138 | addr); |
4139 | return -EINVAL; | |
4140 | } | |
b481de9c ZY |
4141 | } |
4142 | ||
4143 | mutex_lock(&priv->mutex); | |
af0053d6 | 4144 | iwl_scan_cancel_timeout(priv, 100); |
6e21f15c | 4145 | mutex_unlock(&priv->mutex); |
15e869d8 | 4146 | |
b481de9c | 4147 | switch (cmd) { |
6e21f15c AK |
4148 | case SET_KEY: |
4149 | if (static_key) | |
4150 | ret = iwl3945_set_static_key(priv, key); | |
4151 | else | |
4152 | ret = iwl3945_set_dynamic_key(priv, key, sta_id); | |
4153 | IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n"); | |
b481de9c ZY |
4154 | break; |
4155 | case DISABLE_KEY: | |
6e21f15c AK |
4156 | if (static_key) |
4157 | ret = iwl3945_remove_static_key(priv); | |
4158 | else | |
4159 | ret = iwl3945_clear_sta_key_info(priv, sta_id); | |
4160 | IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n"); | |
b481de9c ZY |
4161 | break; |
4162 | default: | |
42986796 | 4163 | ret = -EINVAL; |
b481de9c ZY |
4164 | } |
4165 | ||
e1623446 | 4166 | IWL_DEBUG_MAC80211(priv, "leave\n"); |
b481de9c | 4167 | |
42986796 | 4168 | return ret; |
b481de9c ZY |
4169 | } |
4170 | ||
e100bb64 | 4171 | static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, u16 queue, |
b481de9c ZY |
4172 | const struct ieee80211_tx_queue_params *params) |
4173 | { | |
4a8a4322 | 4174 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
4175 | unsigned long flags; |
4176 | int q; | |
b481de9c | 4177 | |
e1623446 | 4178 | IWL_DEBUG_MAC80211(priv, "enter\n"); |
b481de9c | 4179 | |
775a6e27 | 4180 | if (!iwl_is_ready_rf(priv)) { |
e1623446 | 4181 | IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n"); |
b481de9c ZY |
4182 | return -EIO; |
4183 | } | |
4184 | ||
4185 | if (queue >= AC_NUM) { | |
e1623446 | 4186 | IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue); |
b481de9c ZY |
4187 | return 0; |
4188 | } | |
4189 | ||
b481de9c ZY |
4190 | q = AC_NUM - 1 - queue; |
4191 | ||
4192 | spin_lock_irqsave(&priv->lock, flags); | |
4193 | ||
4194 | priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min); | |
4195 | priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max); | |
4196 | priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs; | |
4197 | priv->qos_data.def_qos_parm.ac[q].edca_txop = | |
3330d7be | 4198 | cpu_to_le16((params->txop * 32)); |
b481de9c ZY |
4199 | |
4200 | priv->qos_data.def_qos_parm.ac[q].reserved1 = 0; | |
4201 | priv->qos_data.qos_active = 1; | |
4202 | ||
4203 | spin_unlock_irqrestore(&priv->lock, flags); | |
4204 | ||
4205 | mutex_lock(&priv->mutex); | |
05c914fe | 4206 | if (priv->iw_mode == NL80211_IFTYPE_AP) |
14d2aac5 | 4207 | iwl_activate_qos(priv, 1); |
8ccde88a | 4208 | else if (priv->assoc_id && iwl_is_associated(priv)) |
14d2aac5 | 4209 | iwl_activate_qos(priv, 0); |
b481de9c ZY |
4210 | |
4211 | mutex_unlock(&priv->mutex); | |
4212 | ||
e1623446 | 4213 | IWL_DEBUG_MAC80211(priv, "leave\n"); |
b481de9c ZY |
4214 | return 0; |
4215 | } | |
4216 | ||
bb8c093b | 4217 | static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw, |
b481de9c ZY |
4218 | struct ieee80211_tx_queue_stats *stats) |
4219 | { | |
4a8a4322 | 4220 | struct iwl_priv *priv = hw->priv; |
b481de9c | 4221 | int i, avail; |
188cf6c7 | 4222 | struct iwl_tx_queue *txq; |
d20b3c65 | 4223 | struct iwl_queue *q; |
b481de9c ZY |
4224 | unsigned long flags; |
4225 | ||
e1623446 | 4226 | IWL_DEBUG_MAC80211(priv, "enter\n"); |
b481de9c | 4227 | |
775a6e27 | 4228 | if (!iwl_is_ready_rf(priv)) { |
e1623446 | 4229 | IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n"); |
b481de9c ZY |
4230 | return -EIO; |
4231 | } | |
4232 | ||
4233 | spin_lock_irqsave(&priv->lock, flags); | |
4234 | ||
4235 | for (i = 0; i < AC_NUM; i++) { | |
188cf6c7 | 4236 | txq = &priv->txq[i]; |
b481de9c | 4237 | q = &txq->q; |
d20b3c65 | 4238 | avail = iwl_queue_space(q); |
b481de9c | 4239 | |
57ffc589 JB |
4240 | stats[i].len = q->n_window - avail; |
4241 | stats[i].limit = q->n_window - q->high_mark; | |
4242 | stats[i].count = q->n_window; | |
b481de9c ZY |
4243 | |
4244 | } | |
4245 | spin_unlock_irqrestore(&priv->lock, flags); | |
4246 | ||
e1623446 | 4247 | IWL_DEBUG_MAC80211(priv, "leave\n"); |
b481de9c ZY |
4248 | |
4249 | return 0; | |
4250 | } | |
4251 | ||
bb8c093b | 4252 | static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw) |
b481de9c | 4253 | { |
4a8a4322 | 4254 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
4255 | unsigned long flags; |
4256 | ||
4257 | mutex_lock(&priv->mutex); | |
e1623446 | 4258 | IWL_DEBUG_MAC80211(priv, "enter\n"); |
b481de9c | 4259 | |
775a6e27 | 4260 | iwl_reset_qos(priv); |
292ae174 | 4261 | |
b481de9c ZY |
4262 | spin_lock_irqsave(&priv->lock, flags); |
4263 | priv->assoc_id = 0; | |
4264 | priv->assoc_capability = 0; | |
b481de9c ZY |
4265 | |
4266 | /* new association get rid of ibss beacon skb */ | |
4267 | if (priv->ibss_beacon) | |
4268 | dev_kfree_skb(priv->ibss_beacon); | |
4269 | ||
4270 | priv->ibss_beacon = NULL; | |
4271 | ||
4272 | priv->beacon_int = priv->hw->conf.beacon_int; | |
28afaf91 | 4273 | priv->timestamp = 0; |
05c914fe | 4274 | if ((priv->iw_mode == NL80211_IFTYPE_STATION)) |
b481de9c ZY |
4275 | priv->beacon_int = 0; |
4276 | ||
4277 | spin_unlock_irqrestore(&priv->lock, flags); | |
4278 | ||
775a6e27 | 4279 | if (!iwl_is_ready_rf(priv)) { |
e1623446 | 4280 | IWL_DEBUG_MAC80211(priv, "leave - not ready\n"); |
fde3571f MA |
4281 | mutex_unlock(&priv->mutex); |
4282 | return; | |
4283 | } | |
4284 | ||
15e869d8 MA |
4285 | /* we are restarting association process |
4286 | * clear RXON_FILTER_ASSOC_MSK bit | |
4287 | */ | |
05c914fe | 4288 | if (priv->iw_mode != NL80211_IFTYPE_AP) { |
af0053d6 | 4289 | iwl_scan_cancel_timeout(priv, 100); |
8ccde88a | 4290 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
bb8c093b | 4291 | iwl3945_commit_rxon(priv); |
15e869d8 MA |
4292 | } |
4293 | ||
b481de9c | 4294 | /* Per mac80211.h: This is only used in IBSS mode... */ |
05c914fe | 4295 | if (priv->iw_mode != NL80211_IFTYPE_ADHOC) { |
15e869d8 | 4296 | |
e1623446 | 4297 | IWL_DEBUG_MAC80211(priv, "leave - not in IBSS\n"); |
b481de9c ZY |
4298 | mutex_unlock(&priv->mutex); |
4299 | return; | |
b481de9c ZY |
4300 | } |
4301 | ||
8ccde88a | 4302 | iwl_set_rate(priv); |
b481de9c ZY |
4303 | |
4304 | mutex_unlock(&priv->mutex); | |
4305 | ||
e1623446 | 4306 | IWL_DEBUG_MAC80211(priv, "leave\n"); |
b481de9c ZY |
4307 | |
4308 | } | |
4309 | ||
e039fa4a | 4310 | static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb) |
b481de9c | 4311 | { |
4a8a4322 | 4312 | struct iwl_priv *priv = hw->priv; |
b481de9c | 4313 | unsigned long flags; |
7c4cbb6e | 4314 | __le64 timestamp; |
b481de9c | 4315 | |
e1623446 | 4316 | IWL_DEBUG_MAC80211(priv, "enter\n"); |
b481de9c | 4317 | |
775a6e27 | 4318 | if (!iwl_is_ready_rf(priv)) { |
e1623446 | 4319 | IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n"); |
b481de9c ZY |
4320 | return -EIO; |
4321 | } | |
4322 | ||
05c914fe | 4323 | if (priv->iw_mode != NL80211_IFTYPE_ADHOC) { |
e1623446 | 4324 | IWL_DEBUG_MAC80211(priv, "leave - not IBSS\n"); |
b481de9c ZY |
4325 | return -EIO; |
4326 | } | |
4327 | ||
4328 | spin_lock_irqsave(&priv->lock, flags); | |
4329 | ||
4330 | if (priv->ibss_beacon) | |
4331 | dev_kfree_skb(priv->ibss_beacon); | |
4332 | ||
4333 | priv->ibss_beacon = skb; | |
4334 | ||
4335 | priv->assoc_id = 0; | |
7c4cbb6e AK |
4336 | timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp; |
4337 | priv->timestamp = le64_to_cpu(timestamp); | |
b481de9c | 4338 | |
e1623446 | 4339 | IWL_DEBUG_MAC80211(priv, "leave\n"); |
b481de9c ZY |
4340 | spin_unlock_irqrestore(&priv->lock, flags); |
4341 | ||
775a6e27 | 4342 | iwl_reset_qos(priv); |
b481de9c | 4343 | |
dc4b1e7d | 4344 | iwl3945_post_associate(priv); |
b481de9c | 4345 | |
b481de9c ZY |
4346 | |
4347 | return 0; | |
4348 | } | |
4349 | ||
4350 | /***************************************************************************** | |
4351 | * | |
4352 | * sysfs attributes | |
4353 | * | |
4354 | *****************************************************************************/ | |
4355 | ||
d08853a3 | 4356 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
4357 | |
4358 | /* | |
4359 | * The following adds a new attribute to the sysfs representation | |
4360 | * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/) | |
4361 | * used for controlling the debug level. | |
4362 | * | |
4363 | * See the level definitions in iwl for details. | |
4364 | */ | |
40b8ec0b SO |
4365 | static ssize_t show_debug_level(struct device *d, |
4366 | struct device_attribute *attr, char *buf) | |
b481de9c | 4367 | { |
4a8a4322 | 4368 | struct iwl_priv *priv = d->driver_data; |
40b8ec0b SO |
4369 | |
4370 | return sprintf(buf, "0x%08X\n", priv->debug_level); | |
b481de9c | 4371 | } |
40b8ec0b SO |
4372 | static ssize_t store_debug_level(struct device *d, |
4373 | struct device_attribute *attr, | |
b481de9c ZY |
4374 | const char *buf, size_t count) |
4375 | { | |
4a8a4322 | 4376 | struct iwl_priv *priv = d->driver_data; |
40b8ec0b SO |
4377 | unsigned long val; |
4378 | int ret; | |
b481de9c | 4379 | |
40b8ec0b SO |
4380 | ret = strict_strtoul(buf, 0, &val); |
4381 | if (ret) | |
978785a3 | 4382 | IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf); |
b481de9c | 4383 | else |
40b8ec0b | 4384 | priv->debug_level = val; |
b481de9c ZY |
4385 | |
4386 | return strnlen(buf, count); | |
4387 | } | |
4388 | ||
40b8ec0b SO |
4389 | static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO, |
4390 | show_debug_level, store_debug_level); | |
b481de9c | 4391 | |
d08853a3 | 4392 | #endif /* CONFIG_IWLWIFI_DEBUG */ |
b481de9c | 4393 | |
b481de9c ZY |
4394 | static ssize_t show_temperature(struct device *d, |
4395 | struct device_attribute *attr, char *buf) | |
4396 | { | |
4a8a4322 | 4397 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c | 4398 | |
775a6e27 | 4399 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
4400 | return -EAGAIN; |
4401 | ||
bb8c093b | 4402 | return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv)); |
b481de9c ZY |
4403 | } |
4404 | ||
4405 | static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL); | |
4406 | ||
b481de9c ZY |
4407 | static ssize_t show_tx_power(struct device *d, |
4408 | struct device_attribute *attr, char *buf) | |
4409 | { | |
4a8a4322 | 4410 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
62ea9c5b | 4411 | return sprintf(buf, "%d\n", priv->tx_power_user_lmt); |
b481de9c ZY |
4412 | } |
4413 | ||
4414 | static ssize_t store_tx_power(struct device *d, | |
4415 | struct device_attribute *attr, | |
4416 | const char *buf, size_t count) | |
4417 | { | |
4a8a4322 | 4418 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
4419 | char *p = (char *)buf; |
4420 | u32 val; | |
4421 | ||
4422 | val = simple_strtoul(p, &p, 10); | |
4423 | if (p == buf) | |
978785a3 | 4424 | IWL_INFO(priv, ": %s is not in decimal form.\n", buf); |
b481de9c | 4425 | else |
bb8c093b | 4426 | iwl3945_hw_reg_set_txpower(priv, val); |
b481de9c ZY |
4427 | |
4428 | return count; | |
4429 | } | |
4430 | ||
4431 | static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power); | |
4432 | ||
4433 | static ssize_t show_flags(struct device *d, | |
4434 | struct device_attribute *attr, char *buf) | |
4435 | { | |
4a8a4322 | 4436 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c | 4437 | |
8ccde88a | 4438 | return sprintf(buf, "0x%04X\n", priv->active_rxon.flags); |
b481de9c ZY |
4439 | } |
4440 | ||
4441 | static ssize_t store_flags(struct device *d, | |
4442 | struct device_attribute *attr, | |
4443 | const char *buf, size_t count) | |
4444 | { | |
4a8a4322 | 4445 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
4446 | u32 flags = simple_strtoul(buf, NULL, 0); |
4447 | ||
4448 | mutex_lock(&priv->mutex); | |
8ccde88a | 4449 | if (le32_to_cpu(priv->staging_rxon.flags) != flags) { |
b481de9c | 4450 | /* Cancel any currently running scans... */ |
af0053d6 | 4451 | if (iwl_scan_cancel_timeout(priv, 100)) |
39aadf8c | 4452 | IWL_WARN(priv, "Could not cancel scan.\n"); |
b481de9c | 4453 | else { |
e1623446 | 4454 | IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n", |
b481de9c | 4455 | flags); |
8ccde88a | 4456 | priv->staging_rxon.flags = cpu_to_le32(flags); |
bb8c093b | 4457 | iwl3945_commit_rxon(priv); |
b481de9c ZY |
4458 | } |
4459 | } | |
4460 | mutex_unlock(&priv->mutex); | |
4461 | ||
4462 | return count; | |
4463 | } | |
4464 | ||
4465 | static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags); | |
4466 | ||
4467 | static ssize_t show_filter_flags(struct device *d, | |
4468 | struct device_attribute *attr, char *buf) | |
4469 | { | |
4a8a4322 | 4470 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
4471 | |
4472 | return sprintf(buf, "0x%04X\n", | |
8ccde88a | 4473 | le32_to_cpu(priv->active_rxon.filter_flags)); |
b481de9c ZY |
4474 | } |
4475 | ||
4476 | static ssize_t store_filter_flags(struct device *d, | |
4477 | struct device_attribute *attr, | |
4478 | const char *buf, size_t count) | |
4479 | { | |
4a8a4322 | 4480 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
4481 | u32 filter_flags = simple_strtoul(buf, NULL, 0); |
4482 | ||
4483 | mutex_lock(&priv->mutex); | |
8ccde88a | 4484 | if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) { |
b481de9c | 4485 | /* Cancel any currently running scans... */ |
af0053d6 | 4486 | if (iwl_scan_cancel_timeout(priv, 100)) |
39aadf8c | 4487 | IWL_WARN(priv, "Could not cancel scan.\n"); |
b481de9c | 4488 | else { |
e1623446 | 4489 | IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = " |
b481de9c | 4490 | "0x%04X\n", filter_flags); |
8ccde88a | 4491 | priv->staging_rxon.filter_flags = |
b481de9c | 4492 | cpu_to_le32(filter_flags); |
bb8c093b | 4493 | iwl3945_commit_rxon(priv); |
b481de9c ZY |
4494 | } |
4495 | } | |
4496 | mutex_unlock(&priv->mutex); | |
4497 | ||
4498 | return count; | |
4499 | } | |
4500 | ||
4501 | static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags, | |
4502 | store_filter_flags); | |
4503 | ||
c8b0e6e1 | 4504 | #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT |
b481de9c ZY |
4505 | |
4506 | static ssize_t show_measurement(struct device *d, | |
4507 | struct device_attribute *attr, char *buf) | |
4508 | { | |
4a8a4322 | 4509 | struct iwl_priv *priv = dev_get_drvdata(d); |
600c0e11 | 4510 | struct iwl_spectrum_notification measure_report; |
b481de9c | 4511 | u32 size = sizeof(measure_report), len = 0, ofs = 0; |
3ac7f146 | 4512 | u8 *data = (u8 *)&measure_report; |
b481de9c ZY |
4513 | unsigned long flags; |
4514 | ||
4515 | spin_lock_irqsave(&priv->lock, flags); | |
4516 | if (!(priv->measurement_status & MEASUREMENT_READY)) { | |
4517 | spin_unlock_irqrestore(&priv->lock, flags); | |
4518 | return 0; | |
4519 | } | |
4520 | memcpy(&measure_report, &priv->measure_report, size); | |
4521 | priv->measurement_status = 0; | |
4522 | spin_unlock_irqrestore(&priv->lock, flags); | |
4523 | ||
4524 | while (size && (PAGE_SIZE - len)) { | |
4525 | hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len, | |
4526 | PAGE_SIZE - len, 1); | |
4527 | len = strlen(buf); | |
4528 | if (PAGE_SIZE - len) | |
4529 | buf[len++] = '\n'; | |
4530 | ||
4531 | ofs += 16; | |
4532 | size -= min(size, 16U); | |
4533 | } | |
4534 | ||
4535 | return len; | |
4536 | } | |
4537 | ||
4538 | static ssize_t store_measurement(struct device *d, | |
4539 | struct device_attribute *attr, | |
4540 | const char *buf, size_t count) | |
4541 | { | |
4a8a4322 | 4542 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c | 4543 | struct ieee80211_measurement_params params = { |
8ccde88a | 4544 | .channel = le16_to_cpu(priv->active_rxon.channel), |
b481de9c ZY |
4545 | .start_time = cpu_to_le64(priv->last_tsf), |
4546 | .duration = cpu_to_le16(1), | |
4547 | }; | |
4548 | u8 type = IWL_MEASURE_BASIC; | |
4549 | u8 buffer[32]; | |
4550 | u8 channel; | |
4551 | ||
4552 | if (count) { | |
4553 | char *p = buffer; | |
4554 | strncpy(buffer, buf, min(sizeof(buffer), count)); | |
4555 | channel = simple_strtoul(p, NULL, 0); | |
4556 | if (channel) | |
4557 | params.channel = channel; | |
4558 | ||
4559 | p = buffer; | |
4560 | while (*p && *p != ' ') | |
4561 | p++; | |
4562 | if (*p) | |
4563 | type = simple_strtoul(p + 1, NULL, 0); | |
4564 | } | |
4565 | ||
e1623446 | 4566 | IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on " |
b481de9c | 4567 | "channel %d (for '%s')\n", type, params.channel, buf); |
bb8c093b | 4568 | iwl3945_get_measurement(priv, ¶ms, type); |
b481de9c ZY |
4569 | |
4570 | return count; | |
4571 | } | |
4572 | ||
4573 | static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR, | |
4574 | show_measurement, store_measurement); | |
c8b0e6e1 | 4575 | #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */ |
b481de9c | 4576 | |
b481de9c ZY |
4577 | static ssize_t store_retry_rate(struct device *d, |
4578 | struct device_attribute *attr, | |
4579 | const char *buf, size_t count) | |
4580 | { | |
4a8a4322 | 4581 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
4582 | |
4583 | priv->retry_rate = simple_strtoul(buf, NULL, 0); | |
4584 | if (priv->retry_rate <= 0) | |
4585 | priv->retry_rate = 1; | |
4586 | ||
4587 | return count; | |
4588 | } | |
4589 | ||
4590 | static ssize_t show_retry_rate(struct device *d, | |
4591 | struct device_attribute *attr, char *buf) | |
4592 | { | |
4a8a4322 | 4593 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
4594 | return sprintf(buf, "%d", priv->retry_rate); |
4595 | } | |
4596 | ||
4597 | static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate, | |
4598 | store_retry_rate); | |
4599 | ||
d25aabb0 | 4600 | |
b481de9c ZY |
4601 | static ssize_t store_power_level(struct device *d, |
4602 | struct device_attribute *attr, | |
4603 | const char *buf, size_t count) | |
4604 | { | |
4a8a4322 | 4605 | struct iwl_priv *priv = dev_get_drvdata(d); |
d25aabb0 WT |
4606 | int ret; |
4607 | unsigned long mode; | |
4608 | ||
b481de9c | 4609 | |
b481de9c ZY |
4610 | mutex_lock(&priv->mutex); |
4611 | ||
d25aabb0 WT |
4612 | ret = strict_strtoul(buf, 10, &mode); |
4613 | if (ret) | |
4614 | goto out; | |
b481de9c | 4615 | |
d25aabb0 WT |
4616 | ret = iwl_power_set_user_mode(priv, mode); |
4617 | if (ret) { | |
4618 | IWL_DEBUG_MAC80211(priv, "failed setting power mode.\n"); | |
4619 | goto out; | |
b481de9c | 4620 | } |
d25aabb0 | 4621 | ret = count; |
b481de9c ZY |
4622 | |
4623 | out: | |
4624 | mutex_unlock(&priv->mutex); | |
d25aabb0 | 4625 | return ret; |
b481de9c ZY |
4626 | } |
4627 | ||
d25aabb0 WT |
4628 | static ssize_t show_power_level(struct device *d, |
4629 | struct device_attribute *attr, char *buf) | |
4630 | { | |
4631 | struct iwl_priv *priv = dev_get_drvdata(d); | |
4632 | int mode = priv->power_data.user_power_setting; | |
4633 | int system = priv->power_data.system_power_setting; | |
4634 | int level = priv->power_data.power_mode; | |
4635 | char *p = buf; | |
4636 | ||
4637 | switch (system) { | |
4638 | case IWL_POWER_SYS_AUTO: | |
4639 | p += sprintf(p, "SYSTEM:auto"); | |
4640 | break; | |
4641 | case IWL_POWER_SYS_AC: | |
4642 | p += sprintf(p, "SYSTEM:ac"); | |
4643 | break; | |
4644 | case IWL_POWER_SYS_BATTERY: | |
4645 | p += sprintf(p, "SYSTEM:battery"); | |
4646 | break; | |
4647 | } | |
4648 | ||
4649 | p += sprintf(p, "\tMODE:%s", (mode < IWL_POWER_AUTO) ? | |
4650 | "fixed" : "auto"); | |
4651 | p += sprintf(p, "\tINDEX:%d", level); | |
4652 | p += sprintf(p, "\n"); | |
4653 | return p - buf + 1; | |
4654 | } | |
4655 | ||
4656 | static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, | |
4657 | show_power_level, store_power_level); | |
4658 | ||
b481de9c ZY |
4659 | #define MAX_WX_STRING 80 |
4660 | ||
4661 | /* Values are in microsecond */ | |
4662 | static const s32 timeout_duration[] = { | |
4663 | 350000, | |
4664 | 250000, | |
4665 | 75000, | |
4666 | 37000, | |
4667 | 25000, | |
4668 | }; | |
4669 | static const s32 period_duration[] = { | |
4670 | 400000, | |
4671 | 700000, | |
4672 | 1000000, | |
4673 | 1000000, | |
4674 | 1000000 | |
4675 | }; | |
4676 | ||
b481de9c ZY |
4677 | static ssize_t show_channels(struct device *d, |
4678 | struct device_attribute *attr, char *buf) | |
4679 | { | |
8318d78a JB |
4680 | /* all this shit doesn't belong into sysfs anyway */ |
4681 | return 0; | |
b481de9c ZY |
4682 | } |
4683 | ||
4684 | static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL); | |
4685 | ||
4686 | static ssize_t show_statistics(struct device *d, | |
4687 | struct device_attribute *attr, char *buf) | |
4688 | { | |
4a8a4322 | 4689 | struct iwl_priv *priv = dev_get_drvdata(d); |
bb8c093b | 4690 | u32 size = sizeof(struct iwl3945_notif_statistics); |
b481de9c | 4691 | u32 len = 0, ofs = 0; |
f2c7e521 | 4692 | u8 *data = (u8 *)&priv->statistics_39; |
b481de9c ZY |
4693 | int rc = 0; |
4694 | ||
775a6e27 | 4695 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
4696 | return -EAGAIN; |
4697 | ||
4698 | mutex_lock(&priv->mutex); | |
17f841cd | 4699 | rc = iwl_send_statistics_request(priv, 0); |
b481de9c ZY |
4700 | mutex_unlock(&priv->mutex); |
4701 | ||
4702 | if (rc) { | |
4703 | len = sprintf(buf, | |
4704 | "Error sending statistics request: 0x%08X\n", rc); | |
4705 | return len; | |
4706 | } | |
4707 | ||
4708 | while (size && (PAGE_SIZE - len)) { | |
4709 | hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len, | |
4710 | PAGE_SIZE - len, 1); | |
4711 | len = strlen(buf); | |
4712 | if (PAGE_SIZE - len) | |
4713 | buf[len++] = '\n'; | |
4714 | ||
4715 | ofs += 16; | |
4716 | size -= min(size, 16U); | |
4717 | } | |
4718 | ||
4719 | return len; | |
4720 | } | |
4721 | ||
4722 | static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL); | |
4723 | ||
4724 | static ssize_t show_antenna(struct device *d, | |
4725 | struct device_attribute *attr, char *buf) | |
4726 | { | |
4a8a4322 | 4727 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c | 4728 | |
775a6e27 | 4729 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
4730 | return -EAGAIN; |
4731 | ||
7e4bca5e | 4732 | return sprintf(buf, "%d\n", iwl3945_mod_params.antenna); |
b481de9c ZY |
4733 | } |
4734 | ||
4735 | static ssize_t store_antenna(struct device *d, | |
4736 | struct device_attribute *attr, | |
4737 | const char *buf, size_t count) | |
4738 | { | |
7530f85f | 4739 | struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d); |
b481de9c | 4740 | int ant; |
b481de9c ZY |
4741 | |
4742 | if (count == 0) | |
4743 | return 0; | |
4744 | ||
4745 | if (sscanf(buf, "%1i", &ant) != 1) { | |
e1623446 | 4746 | IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n"); |
b481de9c ZY |
4747 | return count; |
4748 | } | |
4749 | ||
4750 | if ((ant >= 0) && (ant <= 2)) { | |
e1623446 | 4751 | IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant); |
7e4bca5e | 4752 | iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant; |
b481de9c | 4753 | } else |
e1623446 | 4754 | IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant); |
b481de9c ZY |
4755 | |
4756 | ||
4757 | return count; | |
4758 | } | |
4759 | ||
4760 | static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna); | |
4761 | ||
4762 | static ssize_t show_status(struct device *d, | |
4763 | struct device_attribute *attr, char *buf) | |
4764 | { | |
4a8a4322 | 4765 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
775a6e27 | 4766 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
4767 | return -EAGAIN; |
4768 | return sprintf(buf, "0x%08x\n", (int)priv->status); | |
4769 | } | |
4770 | ||
4771 | static DEVICE_ATTR(status, S_IRUGO, show_status, NULL); | |
4772 | ||
4773 | static ssize_t dump_error_log(struct device *d, | |
4774 | struct device_attribute *attr, | |
4775 | const char *buf, size_t count) | |
4776 | { | |
4777 | char *p = (char *)buf; | |
4778 | ||
4779 | if (p[0] == '1') | |
4a8a4322 | 4780 | iwl3945_dump_nic_error_log((struct iwl_priv *)d->driver_data); |
b481de9c ZY |
4781 | |
4782 | return strnlen(buf, count); | |
4783 | } | |
4784 | ||
4785 | static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log); | |
4786 | ||
4787 | static ssize_t dump_event_log(struct device *d, | |
4788 | struct device_attribute *attr, | |
4789 | const char *buf, size_t count) | |
4790 | { | |
4791 | char *p = (char *)buf; | |
4792 | ||
4793 | if (p[0] == '1') | |
4a8a4322 | 4794 | iwl3945_dump_nic_event_log((struct iwl_priv *)d->driver_data); |
b481de9c ZY |
4795 | |
4796 | return strnlen(buf, count); | |
4797 | } | |
4798 | ||
4799 | static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log); | |
4800 | ||
4801 | /***************************************************************************** | |
4802 | * | |
a96a27f9 | 4803 | * driver setup and tear down |
b481de9c ZY |
4804 | * |
4805 | *****************************************************************************/ | |
4806 | ||
4a8a4322 | 4807 | static void iwl3945_setup_deferred_work(struct iwl_priv *priv) |
b481de9c | 4808 | { |
d21050c7 | 4809 | priv->workqueue = create_singlethread_workqueue(DRV_NAME); |
b481de9c ZY |
4810 | |
4811 | init_waitqueue_head(&priv->wait_command_queue); | |
4812 | ||
bb8c093b CH |
4813 | INIT_WORK(&priv->up, iwl3945_bg_up); |
4814 | INIT_WORK(&priv->restart, iwl3945_bg_restart); | |
4815 | INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish); | |
c0af96a6 | 4816 | INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill); |
bb8c093b | 4817 | INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update); |
bb8c093b CH |
4818 | INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start); |
4819 | INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start); | |
2663516d | 4820 | INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll); |
77fecfb8 SO |
4821 | INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed); |
4822 | INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan); | |
4823 | INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan); | |
4824 | INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check); | |
bb8c093b CH |
4825 | |
4826 | iwl3945_hw_setup_deferred_work(priv); | |
b481de9c ZY |
4827 | |
4828 | tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long)) | |
bb8c093b | 4829 | iwl3945_irq_tasklet, (unsigned long)priv); |
b481de9c ZY |
4830 | } |
4831 | ||
4a8a4322 | 4832 | static void iwl3945_cancel_deferred_work(struct iwl_priv *priv) |
b481de9c | 4833 | { |
bb8c093b | 4834 | iwl3945_hw_cancel_deferred_work(priv); |
b481de9c | 4835 | |
e47eb6ad | 4836 | cancel_delayed_work_sync(&priv->init_alive_start); |
b481de9c ZY |
4837 | cancel_delayed_work(&priv->scan_check); |
4838 | cancel_delayed_work(&priv->alive_start); | |
b481de9c ZY |
4839 | cancel_work_sync(&priv->beacon_update); |
4840 | } | |
4841 | ||
bb8c093b | 4842 | static struct attribute *iwl3945_sysfs_entries[] = { |
b481de9c ZY |
4843 | &dev_attr_antenna.attr, |
4844 | &dev_attr_channels.attr, | |
4845 | &dev_attr_dump_errors.attr, | |
4846 | &dev_attr_dump_events.attr, | |
4847 | &dev_attr_flags.attr, | |
4848 | &dev_attr_filter_flags.attr, | |
c8b0e6e1 | 4849 | #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT |
b481de9c ZY |
4850 | &dev_attr_measurement.attr, |
4851 | #endif | |
4852 | &dev_attr_power_level.attr, | |
b481de9c | 4853 | &dev_attr_retry_rate.attr, |
b481de9c ZY |
4854 | &dev_attr_statistics.attr, |
4855 | &dev_attr_status.attr, | |
4856 | &dev_attr_temperature.attr, | |
b481de9c | 4857 | &dev_attr_tx_power.attr, |
d08853a3 | 4858 | #ifdef CONFIG_IWLWIFI_DEBUG |
40b8ec0b SO |
4859 | &dev_attr_debug_level.attr, |
4860 | #endif | |
b481de9c ZY |
4861 | NULL |
4862 | }; | |
4863 | ||
bb8c093b | 4864 | static struct attribute_group iwl3945_attribute_group = { |
b481de9c | 4865 | .name = NULL, /* put in device directory */ |
bb8c093b | 4866 | .attrs = iwl3945_sysfs_entries, |
b481de9c ZY |
4867 | }; |
4868 | ||
bb8c093b CH |
4869 | static struct ieee80211_ops iwl3945_hw_ops = { |
4870 | .tx = iwl3945_mac_tx, | |
4871 | .start = iwl3945_mac_start, | |
4872 | .stop = iwl3945_mac_stop, | |
4873 | .add_interface = iwl3945_mac_add_interface, | |
4874 | .remove_interface = iwl3945_mac_remove_interface, | |
4875 | .config = iwl3945_mac_config, | |
4876 | .config_interface = iwl3945_mac_config_interface, | |
8ccde88a | 4877 | .configure_filter = iwl_configure_filter, |
bb8c093b | 4878 | .set_key = iwl3945_mac_set_key, |
bb8c093b CH |
4879 | .get_tx_stats = iwl3945_mac_get_tx_stats, |
4880 | .conf_tx = iwl3945_mac_conf_tx, | |
bb8c093b | 4881 | .reset_tsf = iwl3945_mac_reset_tsf, |
cd56d331 | 4882 | .bss_info_changed = iwl3945_bss_info_changed, |
e9dde6f6 | 4883 | .hw_scan = iwl_mac_hw_scan |
b481de9c ZY |
4884 | }; |
4885 | ||
e52119c5 | 4886 | static int iwl3945_init_drv(struct iwl_priv *priv) |
90a30a02 KA |
4887 | { |
4888 | int ret; | |
e6148917 | 4889 | struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom; |
90a30a02 KA |
4890 | |
4891 | priv->retry_rate = 1; | |
4892 | priv->ibss_beacon = NULL; | |
4893 | ||
4894 | spin_lock_init(&priv->lock); | |
3dae0c42 | 4895 | spin_lock_init(&priv->power_data.lock); |
90a30a02 KA |
4896 | spin_lock_init(&priv->sta_lock); |
4897 | spin_lock_init(&priv->hcmd_lock); | |
4898 | ||
4899 | INIT_LIST_HEAD(&priv->free_frames); | |
4900 | ||
4901 | mutex_init(&priv->mutex); | |
4902 | ||
4903 | /* Clear the driver's (not device's) station table */ | |
4904 | iwl3945_clear_stations_table(priv); | |
4905 | ||
4906 | priv->data_retry_limit = -1; | |
4907 | priv->ieee_channels = NULL; | |
4908 | priv->ieee_rates = NULL; | |
4909 | priv->band = IEEE80211_BAND_2GHZ; | |
4910 | ||
4911 | priv->iw_mode = NL80211_IFTYPE_STATION; | |
4912 | ||
4913 | iwl_reset_qos(priv); | |
4914 | ||
4915 | priv->qos_data.qos_active = 0; | |
4916 | priv->qos_data.qos_cap.val = 0; | |
4917 | ||
4918 | priv->rates_mask = IWL_RATES_MASK; | |
d25aabb0 WT |
4919 | /* If power management is turned on, default to CAM mode */ |
4920 | priv->power_mode = IWL_POWER_MODE_CAM; | |
62ea9c5b | 4921 | priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER; |
90a30a02 | 4922 | |
e6148917 SO |
4923 | if (eeprom->version < EEPROM_3945_EEPROM_VERSION) { |
4924 | IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n", | |
4925 | eeprom->version); | |
4926 | ret = -EINVAL; | |
4927 | goto err; | |
4928 | } | |
4929 | ret = iwl_init_channel_map(priv); | |
90a30a02 KA |
4930 | if (ret) { |
4931 | IWL_ERR(priv, "initializing regulatory failed: %d\n", ret); | |
4932 | goto err; | |
4933 | } | |
4934 | ||
e6148917 SO |
4935 | /* Set up txpower settings in driver for all channels */ |
4936 | if (iwl3945_txpower_set_from_eeprom(priv)) { | |
4937 | ret = -EIO; | |
4938 | goto err_free_channel_map; | |
4939 | } | |
4940 | ||
534166de | 4941 | ret = iwlcore_init_geos(priv); |
90a30a02 KA |
4942 | if (ret) { |
4943 | IWL_ERR(priv, "initializing geos failed: %d\n", ret); | |
4944 | goto err_free_channel_map; | |
4945 | } | |
534166de SO |
4946 | iwl3945_init_hw_rates(priv, priv->ieee_rates); |
4947 | ||
2a4ddaab AK |
4948 | return 0; |
4949 | ||
4950 | err_free_channel_map: | |
4951 | iwl_free_channel_map(priv); | |
4952 | err: | |
4953 | return ret; | |
4954 | } | |
4955 | ||
4956 | static int iwl3945_setup_mac(struct iwl_priv *priv) | |
4957 | { | |
4958 | int ret; | |
4959 | struct ieee80211_hw *hw = priv->hw; | |
4960 | ||
4961 | hw->rate_control_algorithm = "iwl-3945-rs"; | |
4962 | hw->sta_data_size = sizeof(struct iwl3945_sta_priv); | |
4963 | ||
4964 | /* Tell mac80211 our characteristics */ | |
4965 | hw->flags = IEEE80211_HW_SIGNAL_DBM | | |
b1c6019b MA |
4966 | IEEE80211_HW_NOISE_DBM | |
4967 | IEEE80211_HW_SPECTRUM_MGMT; | |
2a4ddaab AK |
4968 | |
4969 | hw->wiphy->interface_modes = | |
4970 | BIT(NL80211_IFTYPE_STATION) | | |
4971 | BIT(NL80211_IFTYPE_ADHOC); | |
4972 | ||
4973 | hw->wiphy->custom_regulatory = true; | |
4974 | ||
d60cc91a JB |
4975 | hw->wiphy->max_scan_ssids = 1; /* WILL FIX */ |
4976 | ||
2a4ddaab AK |
4977 | /* Default value; 4 EDCA QOS priorities */ |
4978 | hw->queues = 4; | |
4979 | ||
4980 | hw->conf.beacon_int = 100; | |
4981 | ||
534166de SO |
4982 | if (priv->bands[IEEE80211_BAND_2GHZ].n_channels) |
4983 | priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = | |
4984 | &priv->bands[IEEE80211_BAND_2GHZ]; | |
2a4ddaab | 4985 | |
534166de SO |
4986 | if (priv->bands[IEEE80211_BAND_5GHZ].n_channels) |
4987 | priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = | |
4988 | &priv->bands[IEEE80211_BAND_5GHZ]; | |
90a30a02 | 4989 | |
2a4ddaab AK |
4990 | ret = ieee80211_register_hw(priv->hw); |
4991 | if (ret) { | |
4992 | IWL_ERR(priv, "Failed to register hw (error %d)\n", ret); | |
4993 | return ret; | |
4994 | } | |
4995 | priv->mac80211_registered = 1; | |
90a30a02 | 4996 | |
2a4ddaab | 4997 | return 0; |
90a30a02 KA |
4998 | } |
4999 | ||
bb8c093b | 5000 | static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) |
b481de9c ZY |
5001 | { |
5002 | int err = 0; | |
4a8a4322 | 5003 | struct iwl_priv *priv; |
b481de9c | 5004 | struct ieee80211_hw *hw; |
c0f20d91 | 5005 | struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data); |
e6148917 | 5006 | struct iwl3945_eeprom *eeprom; |
0359facc | 5007 | unsigned long flags; |
b481de9c | 5008 | |
cee53ddb KA |
5009 | /*********************** |
5010 | * 1. Allocating HW data | |
5011 | * ********************/ | |
5012 | ||
b481de9c ZY |
5013 | /* mac80211 allocates memory for this device instance, including |
5014 | * space for this driver's private structure */ | |
90a30a02 | 5015 | hw = iwl_alloc_all(cfg, &iwl3945_hw_ops); |
b481de9c | 5016 | if (hw == NULL) { |
a3139c59 | 5017 | printk(KERN_ERR DRV_NAME "Can not allocate network device\n"); |
b481de9c ZY |
5018 | err = -ENOMEM; |
5019 | goto out; | |
5020 | } | |
b481de9c | 5021 | priv = hw->priv; |
90a30a02 | 5022 | SET_IEEE80211_DEV(hw, &pdev->dev); |
6440adb5 | 5023 | |
df878d8f KA |
5024 | if ((iwl3945_mod_params.num_of_queues > IWL39_MAX_NUM_QUEUES) || |
5025 | (iwl3945_mod_params.num_of_queues < IWL_MIN_NUM_QUEUES)) { | |
15b1687c WT |
5026 | IWL_ERR(priv, |
5027 | "invalid queues_num, should be between %d and %d\n", | |
5028 | IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES); | |
a3139c59 | 5029 | err = -EINVAL; |
c8f16138 | 5030 | goto out_ieee80211_free_hw; |
a3139c59 SO |
5031 | } |
5032 | ||
90a30a02 KA |
5033 | /* |
5034 | * Disabling hardware scan means that mac80211 will perform scans | |
5035 | * "the hard way", rather than using device's scan. | |
5036 | */ | |
df878d8f | 5037 | if (iwl3945_mod_params.disable_hw_scan) { |
e1623446 | 5038 | IWL_DEBUG_INFO(priv, "Disabling hw_scan\n"); |
40b8ec0b SO |
5039 | iwl3945_hw_ops.hw_scan = NULL; |
5040 | } | |
5041 | ||
90a30a02 | 5042 | |
e1623446 | 5043 | IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n"); |
90a30a02 KA |
5044 | priv->cfg = cfg; |
5045 | priv->pci_dev = pdev; | |
cee53ddb | 5046 | |
d08853a3 | 5047 | #ifdef CONFIG_IWLWIFI_DEBUG |
df878d8f | 5048 | priv->debug_level = iwl3945_mod_params.debug; |
b481de9c ZY |
5049 | atomic_set(&priv->restrict_refcnt, 0); |
5050 | #endif | |
b481de9c | 5051 | |
cee53ddb KA |
5052 | /*************************** |
5053 | * 2. Initializing PCI bus | |
5054 | * *************************/ | |
b481de9c ZY |
5055 | if (pci_enable_device(pdev)) { |
5056 | err = -ENODEV; | |
5057 | goto out_ieee80211_free_hw; | |
5058 | } | |
5059 | ||
5060 | pci_set_master(pdev); | |
5061 | ||
284901a9 | 5062 | err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); |
b481de9c | 5063 | if (!err) |
284901a9 | 5064 | err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); |
b481de9c | 5065 | if (err) { |
978785a3 | 5066 | IWL_WARN(priv, "No suitable DMA available.\n"); |
b481de9c ZY |
5067 | goto out_pci_disable_device; |
5068 | } | |
5069 | ||
5070 | pci_set_drvdata(pdev, priv); | |
5071 | err = pci_request_regions(pdev, DRV_NAME); | |
5072 | if (err) | |
5073 | goto out_pci_disable_device; | |
6440adb5 | 5074 | |
cee53ddb KA |
5075 | /*********************** |
5076 | * 3. Read REV Register | |
5077 | * ********************/ | |
b481de9c ZY |
5078 | priv->hw_base = pci_iomap(pdev, 0, 0); |
5079 | if (!priv->hw_base) { | |
5080 | err = -ENODEV; | |
5081 | goto out_pci_release_regions; | |
5082 | } | |
5083 | ||
e1623446 | 5084 | IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n", |
b481de9c | 5085 | (unsigned long long) pci_resource_len(pdev, 0)); |
e1623446 | 5086 | IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base); |
b481de9c | 5087 | |
cee53ddb KA |
5088 | /* We disable the RETRY_TIMEOUT register (0x41) to keep |
5089 | * PCI Tx retries from interfering with C3 CPU state */ | |
5090 | pci_write_config_byte(pdev, 0x41, 0x00); | |
b481de9c | 5091 | |
90a30a02 KA |
5092 | /* amp init */ |
5093 | err = priv->cfg->ops->lib->apm_ops.init(priv); | |
cee53ddb | 5094 | if (err < 0) { |
d5df2a16 | 5095 | IWL_DEBUG_INFO(priv, "Failed to init the card\n"); |
90a30a02 | 5096 | goto out_iounmap; |
cee53ddb | 5097 | } |
b481de9c | 5098 | |
cee53ddb KA |
5099 | /*********************** |
5100 | * 4. Read EEPROM | |
5101 | * ********************/ | |
90a30a02 | 5102 | |
cee53ddb | 5103 | /* Read the EEPROM */ |
e6148917 | 5104 | err = iwl_eeprom_init(priv); |
cee53ddb | 5105 | if (err) { |
15b1687c | 5106 | IWL_ERR(priv, "Unable to init EEPROM\n"); |
c8f16138 | 5107 | goto out_iounmap; |
cee53ddb KA |
5108 | } |
5109 | /* MAC Address location in EEPROM same for 3945/4965 */ | |
e6148917 SO |
5110 | eeprom = (struct iwl3945_eeprom *)priv->eeprom; |
5111 | memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN); | |
e1623446 | 5112 | IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr); |
cee53ddb | 5113 | SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr); |
b481de9c | 5114 | |
cee53ddb KA |
5115 | /*********************** |
5116 | * 5. Setup HW Constants | |
5117 | * ********************/ | |
b481de9c | 5118 | /* Device-specific setup */ |
3832ec9d | 5119 | if (iwl3945_hw_set_hw_params(priv)) { |
15b1687c | 5120 | IWL_ERR(priv, "failed to set hw settings\n"); |
c8f16138 | 5121 | goto out_eeprom_free; |
b481de9c ZY |
5122 | } |
5123 | ||
cee53ddb KA |
5124 | /*********************** |
5125 | * 6. Setup priv | |
5126 | * ********************/ | |
cee53ddb | 5127 | |
90a30a02 | 5128 | err = iwl3945_init_drv(priv); |
b481de9c | 5129 | if (err) { |
90a30a02 | 5130 | IWL_ERR(priv, "initializing driver failed\n"); |
c8f16138 | 5131 | goto out_unset_hw_params; |
b481de9c ZY |
5132 | } |
5133 | ||
978785a3 TW |
5134 | IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n", |
5135 | priv->cfg->name); | |
cee53ddb KA |
5136 | |
5137 | /*********************************** | |
5138 | * 7. Initialize Module Parameters | |
5139 | * **********************************/ | |
5140 | ||
5141 | /* Initialize module parameter values here */ | |
5142 | /* Disable radio (SW RF KILL) via parameter when loading driver */ | |
df878d8f | 5143 | if (iwl3945_mod_params.disable) { |
cee53ddb | 5144 | set_bit(STATUS_RF_KILL_SW, &priv->status); |
e1623446 | 5145 | IWL_DEBUG_INFO(priv, "Radio disabled.\n"); |
849e0dce RC |
5146 | } |
5147 | ||
cee53ddb KA |
5148 | |
5149 | /*********************** | |
5150 | * 8. Setup Services | |
5151 | * ********************/ | |
5152 | ||
5153 | spin_lock_irqsave(&priv->lock, flags); | |
ed3b932e | 5154 | iwl_disable_interrupts(priv); |
cee53ddb KA |
5155 | spin_unlock_irqrestore(&priv->lock, flags); |
5156 | ||
2663516d HS |
5157 | pci_enable_msi(priv->pci_dev); |
5158 | ||
f17d08a6 | 5159 | err = request_irq(priv->pci_dev->irq, iwl_isr, IRQF_SHARED, |
2663516d HS |
5160 | DRV_NAME, priv); |
5161 | if (err) { | |
5162 | IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq); | |
5163 | goto out_disable_msi; | |
5164 | } | |
5165 | ||
cee53ddb | 5166 | err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group); |
849e0dce | 5167 | if (err) { |
15b1687c | 5168 | IWL_ERR(priv, "failed to create sysfs device attributes\n"); |
90a30a02 | 5169 | goto out_release_irq; |
849e0dce | 5170 | } |
849e0dce | 5171 | |
8ccde88a SO |
5172 | iwl_set_rxon_channel(priv, |
5173 | &priv->bands[IEEE80211_BAND_2GHZ].channels[5]); | |
cee53ddb KA |
5174 | iwl3945_setup_deferred_work(priv); |
5175 | iwl3945_setup_rx_handlers(priv); | |
5176 | ||
cee53ddb | 5177 | /********************************* |
2663516d | 5178 | * 9. Setup and Register mac80211 |
cee53ddb KA |
5179 | * *******************************/ |
5180 | ||
2a4ddaab | 5181 | iwl_enable_interrupts(priv); |
b481de9c | 5182 | |
2a4ddaab AK |
5183 | err = iwl3945_setup_mac(priv); |
5184 | if (err) | |
5185 | goto out_remove_sysfs; | |
cee53ddb | 5186 | |
c0af96a6 | 5187 | err = iwl_rfkill_init(priv); |
ebef2008 | 5188 | if (err) |
15b1687c | 5189 | IWL_ERR(priv, "Unable to initialize RFKILL system. " |
ebef2008 | 5190 | "Ignoring error: %d\n", err); |
2a4ddaab AK |
5191 | else |
5192 | iwl_rfkill_set_hw_state(priv); | |
ebef2008 | 5193 | |
2663516d HS |
5194 | /* Start monitoring the killswitch */ |
5195 | queue_delayed_work(priv->workqueue, &priv->rfkill_poll, | |
5196 | 2 * HZ); | |
5197 | ||
b481de9c ZY |
5198 | return 0; |
5199 | ||
cee53ddb | 5200 | out_remove_sysfs: |
c8f16138 RC |
5201 | destroy_workqueue(priv->workqueue); |
5202 | priv->workqueue = NULL; | |
cee53ddb | 5203 | sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group); |
b481de9c | 5204 | out_release_irq: |
2663516d | 5205 | free_irq(priv->pci_dev->irq, priv); |
2663516d HS |
5206 | out_disable_msi: |
5207 | pci_disable_msi(priv->pci_dev); | |
c8f16138 RC |
5208 | iwlcore_free_geos(priv); |
5209 | iwl_free_channel_map(priv); | |
5210 | out_unset_hw_params: | |
5211 | iwl3945_unset_hw_params(priv); | |
5212 | out_eeprom_free: | |
5213 | iwl_eeprom_free(priv); | |
b481de9c ZY |
5214 | out_iounmap: |
5215 | pci_iounmap(pdev, priv->hw_base); | |
5216 | out_pci_release_regions: | |
5217 | pci_release_regions(pdev); | |
5218 | out_pci_disable_device: | |
b481de9c | 5219 | pci_set_drvdata(pdev, NULL); |
623d563e | 5220 | pci_disable_device(pdev); |
b481de9c ZY |
5221 | out_ieee80211_free_hw: |
5222 | ieee80211_free_hw(priv->hw); | |
5223 | out: | |
5224 | return err; | |
5225 | } | |
5226 | ||
c83dbf68 | 5227 | static void __devexit iwl3945_pci_remove(struct pci_dev *pdev) |
b481de9c | 5228 | { |
4a8a4322 | 5229 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
0359facc | 5230 | unsigned long flags; |
b481de9c ZY |
5231 | |
5232 | if (!priv) | |
5233 | return; | |
5234 | ||
e1623446 | 5235 | IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n"); |
b481de9c | 5236 | |
b481de9c | 5237 | set_bit(STATUS_EXIT_PENDING, &priv->status); |
b24d22b1 | 5238 | |
d552bfb6 KA |
5239 | if (priv->mac80211_registered) { |
5240 | ieee80211_unregister_hw(priv->hw); | |
5241 | priv->mac80211_registered = 0; | |
5242 | } else { | |
5243 | iwl3945_down(priv); | |
5244 | } | |
b481de9c | 5245 | |
0359facc MA |
5246 | /* make sure we flush any pending irq or |
5247 | * tasklet for the driver | |
5248 | */ | |
5249 | spin_lock_irqsave(&priv->lock, flags); | |
ed3b932e | 5250 | iwl_disable_interrupts(priv); |
0359facc MA |
5251 | spin_unlock_irqrestore(&priv->lock, flags); |
5252 | ||
5253 | iwl_synchronize_irq(priv); | |
5254 | ||
bb8c093b | 5255 | sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group); |
b481de9c | 5256 | |
c0af96a6 | 5257 | iwl_rfkill_unregister(priv); |
71d449b5 | 5258 | cancel_delayed_work_sync(&priv->rfkill_poll); |
2663516d | 5259 | |
bb8c093b | 5260 | iwl3945_dealloc_ucode_pci(priv); |
b481de9c ZY |
5261 | |
5262 | if (priv->rxq.bd) | |
df833b1d | 5263 | iwl3945_rx_queue_free(priv, &priv->rxq); |
bb8c093b | 5264 | iwl3945_hw_txq_ctx_free(priv); |
b481de9c | 5265 | |
3832ec9d | 5266 | iwl3945_unset_hw_params(priv); |
bb8c093b | 5267 | iwl3945_clear_stations_table(priv); |
b481de9c | 5268 | |
6ef89d0a MA |
5269 | /*netif_stop_queue(dev); */ |
5270 | flush_workqueue(priv->workqueue); | |
5271 | ||
bb8c093b | 5272 | /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes |
b481de9c ZY |
5273 | * priv->workqueue... so we can't take down the workqueue |
5274 | * until now... */ | |
5275 | destroy_workqueue(priv->workqueue); | |
5276 | priv->workqueue = NULL; | |
5277 | ||
2663516d HS |
5278 | free_irq(pdev->irq, priv); |
5279 | pci_disable_msi(pdev); | |
5280 | ||
b481de9c ZY |
5281 | pci_iounmap(pdev, priv->hw_base); |
5282 | pci_release_regions(pdev); | |
5283 | pci_disable_device(pdev); | |
5284 | pci_set_drvdata(pdev, NULL); | |
5285 | ||
e6148917 | 5286 | iwl_free_channel_map(priv); |
534166de | 5287 | iwlcore_free_geos(priv); |
805cee5b | 5288 | kfree(priv->scan); |
b481de9c ZY |
5289 | if (priv->ibss_beacon) |
5290 | dev_kfree_skb(priv->ibss_beacon); | |
5291 | ||
5292 | ieee80211_free_hw(priv->hw); | |
5293 | } | |
5294 | ||
5295 | #ifdef CONFIG_PM | |
5296 | ||
bb8c093b | 5297 | static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state) |
b481de9c | 5298 | { |
4a8a4322 | 5299 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
b481de9c | 5300 | |
e655b9f0 ZY |
5301 | if (priv->is_open) { |
5302 | set_bit(STATUS_IN_SUSPEND, &priv->status); | |
5303 | iwl3945_mac_stop(priv->hw); | |
5304 | priv->is_open = 1; | |
5305 | } | |
2663516d HS |
5306 | pci_save_state(pdev); |
5307 | pci_disable_device(pdev); | |
b481de9c ZY |
5308 | pci_set_power_state(pdev, PCI_D3hot); |
5309 | ||
b481de9c ZY |
5310 | return 0; |
5311 | } | |
5312 | ||
bb8c093b | 5313 | static int iwl3945_pci_resume(struct pci_dev *pdev) |
b481de9c | 5314 | { |
4a8a4322 | 5315 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
450154e4 | 5316 | int ret; |
b481de9c | 5317 | |
b481de9c | 5318 | pci_set_power_state(pdev, PCI_D0); |
450154e4 WT |
5319 | ret = pci_enable_device(pdev); |
5320 | if (ret) | |
5321 | return ret; | |
2663516d | 5322 | pci_restore_state(pdev); |
b481de9c | 5323 | |
e655b9f0 ZY |
5324 | if (priv->is_open) |
5325 | iwl3945_mac_start(priv->hw); | |
b481de9c | 5326 | |
e655b9f0 | 5327 | clear_bit(STATUS_IN_SUSPEND, &priv->status); |
b481de9c ZY |
5328 | return 0; |
5329 | } | |
5330 | ||
5331 | #endif /* CONFIG_PM */ | |
5332 | ||
5333 | /***************************************************************************** | |
5334 | * | |
5335 | * driver and module entry point | |
5336 | * | |
5337 | *****************************************************************************/ | |
5338 | ||
bb8c093b | 5339 | static struct pci_driver iwl3945_driver = { |
b481de9c | 5340 | .name = DRV_NAME, |
bb8c093b CH |
5341 | .id_table = iwl3945_hw_card_ids, |
5342 | .probe = iwl3945_pci_probe, | |
5343 | .remove = __devexit_p(iwl3945_pci_remove), | |
b481de9c | 5344 | #ifdef CONFIG_PM |
bb8c093b CH |
5345 | .suspend = iwl3945_pci_suspend, |
5346 | .resume = iwl3945_pci_resume, | |
b481de9c ZY |
5347 | #endif |
5348 | }; | |
5349 | ||
bb8c093b | 5350 | static int __init iwl3945_init(void) |
b481de9c ZY |
5351 | { |
5352 | ||
5353 | int ret; | |
5354 | printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n"); | |
5355 | printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n"); | |
897e1cf2 RC |
5356 | |
5357 | ret = iwl3945_rate_control_register(); | |
5358 | if (ret) { | |
a3139c59 SO |
5359 | printk(KERN_ERR DRV_NAME |
5360 | "Unable to register rate control algorithm: %d\n", ret); | |
897e1cf2 RC |
5361 | return ret; |
5362 | } | |
5363 | ||
bb8c093b | 5364 | ret = pci_register_driver(&iwl3945_driver); |
b481de9c | 5365 | if (ret) { |
a3139c59 | 5366 | printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n"); |
897e1cf2 | 5367 | goto error_register; |
b481de9c | 5368 | } |
b481de9c ZY |
5369 | |
5370 | return ret; | |
897e1cf2 | 5371 | |
897e1cf2 RC |
5372 | error_register: |
5373 | iwl3945_rate_control_unregister(); | |
5374 | return ret; | |
b481de9c ZY |
5375 | } |
5376 | ||
bb8c093b | 5377 | static void __exit iwl3945_exit(void) |
b481de9c | 5378 | { |
bb8c093b | 5379 | pci_unregister_driver(&iwl3945_driver); |
897e1cf2 | 5380 | iwl3945_rate_control_unregister(); |
b481de9c ZY |
5381 | } |
5382 | ||
a0987a8d | 5383 | MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX)); |
25cb6cad | 5384 | |
df878d8f | 5385 | module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444); |
b481de9c | 5386 | MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])"); |
df878d8f | 5387 | module_param_named(disable, iwl3945_mod_params.disable, int, 0444); |
b481de9c | 5388 | MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])"); |
9c74d9fb SO |
5389 | module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, 0444); |
5390 | MODULE_PARM_DESC(swcrypto, | |
5391 | "using software crypto (default 1 [software])\n"); | |
df878d8f | 5392 | module_param_named(debug, iwl3945_mod_params.debug, uint, 0444); |
b481de9c | 5393 | MODULE_PARM_DESC(debug, "debug output mask"); |
df878d8f | 5394 | module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan, int, 0444); |
b481de9c ZY |
5395 | MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)"); |
5396 | ||
df878d8f | 5397 | module_param_named(queues_num, iwl3945_mod_params.num_of_queues, int, 0444); |
b481de9c ZY |
5398 | MODULE_PARM_DESC(queues_num, "number of hw queues."); |
5399 | ||
af48d048 SO |
5400 | module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, 0444); |
5401 | MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error"); | |
5402 | ||
bb8c093b CH |
5403 | module_exit(iwl3945_exit); |
5404 | module_init(iwl3945_init); |